; -------------------------------------------------------------------------------- ; @Title: TegraX1 On-Chip Peripherals ; @Props: Released ; @Author: KOB, SIK, MJW ; @Changelog: 2017-09-08 KOB ; 2017-10-16 BFG ; 2018-05-29 SIK ; @Manufacturer: NVIDIA - NVIDIA Corporation ; @Doc: Tegra_X1_TRM_DP07225001_v1.2p.pdf (Rev. v1.2p, 2016-12-06) ; @Core: Cortex-A57, CortexA53 ; @Chip: TEGRAX1 ; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pertegrax1.per 15981 2023-04-17 07:25:16Z bschroefel $ ; Known problems: ; Module Register Description ; Timers SHARED_TIMER_SECURE_CFG_0 USEC,WDT,TMR: the same description but different states ; Host Subsystem * There should be 14 channels but only CH0:11 base addresses were given ; * Class & Proto were omitted in .ph because of lack of base addresses ; Memory Controller MC consists of 2 channels but base addresses were given for 3? (MC,MC0,MC1) <-- the same goes for EMC ; SATA SATA_AUX_MISC_CNTL_1_0 bitflds AUX_RX_IDLE_STATUS_MASK & AUX_OR_CORE_IDLE_STATUS_SEL in the same ; position (18.). AUX_RX_IDLE_STATUS_MASK should be 19. (like in TEGRA K1) ; SATA0 There is lack of data about where exactly SATA0 configuration spaces are mapped to. ; DFD CORESIGHT_ETF_HUGO_CXTMC_REGS_RSZ_0 Bit number 6 is repeated two times ; PCIe T_PCIE2_RP_ECTL_2_R2,T_PCIE2_RP_ECTL_2_R2 Bits 8 to 19 are repeated ; AFI whole module No base address ; DISPHDMI DPAUX Registers offsets for all registers in DPAUX ;tree are broken ; GPIO VGPIO_MSK_OE_ Register mentioned in Table 33, but there is no information about its bitfields of it in pdf ; USB XHCI_OP_PORTPMSCSS/HS Two registers on same offset ; SOR,SOR1 Some registers description are different, than provided tables with bits ; --------------------------------------------------------------------------------- config 16. 8. sif (CORENAME()=="CORTEXA57") tree "Core Registers (Cortex-A57)" AUTOINDENT.ON center tree tree.open "AArch64" tree "ID Registers" rgroup.quad spr:0x30000++0x0 line.long 0x0 "MIDR_EL1,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code" bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. "ARCH,Architecture" "Reserved,ARMv4,ARMv4T,ARMv5,ARMv5T,ARMv5TE,ARMv5TEJ,ARMv6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme" newline hexmask.long.word 0x0 4.--15. 0x1 "PART,Primary Part Number" bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x30005++0x00 line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register" bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" newline hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" bitfld.quad 0x00 0.--1. "CPUID,CPU ID" "1,2,3,4" elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30005++0x00 line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity level 3. Third highest level affinity field" newline bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" newline hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" endif rgroup.quad SPR:0x30006++0x0 line.long 0x0 "REVIDR_EL1,Revision ID Register" rgroup.quad SPR:0x30014++0x00 line.long 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..." newline bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30015++0x00 line.long 0x00 "ID_MMFR1_EL1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." newline bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.quad SPR:0x30016++0x00 line.long 0x00 "ID_MMFR2_EL1,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.quad SPR:0x30017++0x00 line.long 0x00 "ID_MMFR3_EL1,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..." bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,Reserved,?..." newline bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup.quad spr:0x30026++0x00 line.long 0x00 "ID_MMFR4_EL1,Memory Model Feature Register 4" bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented,Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30070++0x00 line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0" bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..." bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..." bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..." newline bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..." newline bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,Reserved,Reserved,44 bits/16 TB,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30070++0x00 line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0" bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..." bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..." bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..." newline bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..." newline bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..." endif if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30071++0x00 line.quad 0x00 "ID_AA64MMFR1_EL1,AArch64 Memory Model Feature Register 1" endif rgroup.quad SPR:0x30020++0x00 line.long 0x00 "ID_ISAR0_EL1,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..." newline bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..." rgroup.quad SPR:0x30021++0x00 line.long 0x00 "ID_ISAR1_EL1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30022++0x00 line.long 0x00 "ID_ISAR2_EL1,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30023++0x00 line.long 0x00 "ID_ISAR3_EL1,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..." bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..." bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30024++0x00 line.long 0x00 "ID_ISAR4_EL1,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..." bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..." newline bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30025++0x00 line.long 0x00 "ID_ISAR5_EL1,Instruction Set Attribute Register 5" bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..." newline bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..." rgroup.quad spr:0x30060++0x00 line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0" bitfld.quad 0x00 16.--19. "CRC32,CRC32" "Reserved,Implemented,?..." bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions are implemented" "Not implemented,Implemented,?..." bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions are implemented" "Not implemented,Implemented,?..." newline bitfld.quad 0x00 4.--7. "AES,AES instructions are implemented" "Not implemented,Reserved,Implemented,?..." if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30061++0x00 line.quad 0x00 "ID_AA64ISAR1_EL1,AArch64 Instruction Set Attribute Register 1" endif rgroup.quad SPR:0x30010++0x00 line.long 0x00 "ID_PFR0_EL1,Processor Feature Register 0" bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..." bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30011++0x00 line.long 0x00 "ID_PFR1_EL1,Processor Feature Register 1" bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..." bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x30040++0x00 line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0" bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..." bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,?..." bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,?..." newline bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." newline bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30040++0x00 line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0" bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..." bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" newline bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." newline bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." endif if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30041++0x00 line.quad 0x00 "ID_AA64PFR1_EL1,AArch64 Processor Feature Register 1" endif if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x30012++0x00 line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x30012++0x00 line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif rgroup.quad spr:0x30050++0x00 line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0" bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware minus 1" "Reserved,2,?..." bitfld.quad 0x00 20.--23. "WRPS,The number of watchpoints minus 1" "Reserved,Reserved,Reserved,4,?..." bitfld.quad 0x00 12.--15. "BRPS,The number of breakpoints minus 1" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..." newline bitfld.quad 0x00 8.--11. "PMUVER,Performance Monitors extension version" "Reserved,Implemented,?..." bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension" "Not implemented,?..." bitfld.quad 0x00 0.--3. "DEBUGGER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented,?..." if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30051++0x00 line.quad 0x00 "ID_AA64DFR1_EL1,AArch64 Debug Feature Register 1" rgroup.quad spr:0x30054++0x00 line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0" rgroup.quad spr:0x30055++0x00 line.quad 0x00 "ID_AA64AFR1_EL1,AArch64 Auxiliary Feature Register 1" endif rgroup.quad SPR:0x30013++0x00 line.long 0x00 "ID_AFR0_EL1,Auxiliary Feature Register 0" rgroup.quad SPR:0x31007++0x00 line.long 0x00 "AIDR_EL1,Auxiliary ID Register" rgroup.quad SPR:0x33007++0x00 line.long 0x00 "DCZID_EL0,Data Cache Zero ID" bitfld.long 0x00 4. "DZP,Prohibit the DC ZVA instruction" "Not prohibited,Prohibited" bitfld.long 0x00 0.--3. "BS,Block Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." tree.end tree "System Control and Configuration" group.quad spr:0x36111++0x00 line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register" bitfld.quad 0x00 1. "SUNIDEN,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled" bitfld.quad 0x00 0. "SUIDEN,Enable debug exceptions in Secure User mode" "Disabled,Enabled" group.quad SPR:0x30100++0x0 line.long 0x00 "SCTLR_EL1,System Control Register (EL1)" bitfld.long 0x0 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 24. "E0E,Endianness of explicit data access at EL0" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled" bitfld.long 0x0 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 9. "UMA,User Mask Access" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT instruction disable" "No,Yes" newline bitfld.long 0x00 6. "THEE,Thumb EE enable" "Disabled,Enabled" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad SPR:0x34100++0x0 line.long 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad SPR:0x36100++0x0 line.long 0x00 "SCTLR_EL3,System Control Register (EL3)" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" rgroup.quad SPR:0x30101++0x0 line.long 0x00 "ACTLR_EL1,Auxiliary Control Register (EL1)" group.quad SPR:0x34101++0x0 line.long 0x00 "ACTLR_EL2,Auxiliary Control Register (EL2)" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" group.quad SPR:0x36101++0x0 line.long 0x00 "ACTLR_EL3,Auxiliary Control Register (EL3)" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" group.quad SPR:0x30102++0x00 line.long 0x00 "CPACR_EL1,Architectural Feature Access Control Register" bitfld.long 0x00 28. "TTA,Causes access to the Trace functionality to trap to EL1 when executed from EL0 or EL1" "Disabled,?..." bitfld.long 0x00 20.--21. "FPEN,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution to trap to EL1 when executed from EL0 or EL1" "Trap all,Trap El0,Trap all,Not trapped" group.quad SPR:0x36110++0x0 line.long 0x0 "SCR_EL3,Secure Configuration Register" bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped" bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped" newline bitfld.long 0x00 11. "ST,Enable secure EL1 access" "Disabled,Enabled" bitfld.long 0x00 10. "RW,Register width control for lower exception levels" "AArch32,AArch64" newline bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes" newline bitfld.long 0x00 7. "SMD,Secure Monitor Call disable" "No,Yes" bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" newline bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" newline bitfld.long 0x00 0. "NS,Secure mode" "Secure,Non-secure" group.quad spr:0x34110++0x00 line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register" bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes" newline bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit" bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" newline bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled" newline bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled" bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled" bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled" bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled" bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled" newline bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System" bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced" newline bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending" bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending" newline bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending" bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled" newline bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled" bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled" newline bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled" newline bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled" group.quad spr:0x30510++0x00 line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)" group.quad spr:0x30511++0x00 line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)" group.quad spr:0x34510++0x00 line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)" group.quad spr:0x34511++0x00 line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)" group.quad spr:0x36510++0x00 line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)" group.quad spr:0x36511++0x00 line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)" tree.open "Exception Syndrome Registers" if (CORENAME()=="CORTEXA57") if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..." elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined" elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..." elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif elif (CORENAME()=="CORTEXA53") if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SES,System Error Source" "Processor,System,External," newline hexmask.long.tbyte 0x00 0.--21. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined" elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif endif tree.end newline if (CORENAME()=="CORTEXA57") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif (CORENAME()=="CORTEXA53") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif group.quad spr:0x30600++0x00 line.quad 0x00 "FAR_EL1,Fault Address Register" group.quad spr:0x34600++0x00 line.quad 0x00 "FAR_EL2,Fault Address Register" group.quad spr:0x36600++0x00 line.quad 0x00 "FAR_EL3,Fault Address Register" group.quad spr:0x34604++0x00 line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register" group.quad spr:0x30C00++0x00 line.quad 0x00 "VBAR_EL1,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" group.quad spr:0x34C00++0x00 line.quad 0x00 "VBAR_EL2,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" group.quad spr:0x36C00++0x00 line.quad 0x00 "VBAR_EL3,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" rgroup.quad spr:0x36C01++0x00 line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register" hexmask.quad 0x00 2.--43. 0x4 "RVBA,Reset Vector Base Address" rgroup.quad SPR:0x30C10++0x00 line.long 0x00 "ISR_EL1,Interrupt Status Register" bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" newline bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" group.quad SPR:0x36C02++0x00 line.long 0x00 "RMR_EL3,Reset Management Register" bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested" bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warmreset" "AArch32,AArch64" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x31F30++0x00 line.quad 0x00 "CBAR_EL1,Configuration Base Address Register" hexmask.quad.long 0x00 18.--43. 1. "PERIPHBASE[43:18],Periphbase[43:18]" elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x31F30++0x00 line.quad 0x00 "CBAR_EL1,Configuration Base Address Register" hexmask.quad.tbyte 0x00 18.--39. 1. "PERIPHBASE[39:18],Periphbase[39:18]" endif group.quad spr:0x30D01++0x00 line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register" group.quad spr:0x33D02++0x00 line.quad 0x00 "TPIDR_EL0,Software Thread ID Register" group.quad spr:0x33D03++0x00 line.quad 0x00 "TPIDRRO_EL0,Software Thread ID Register" group.quad spr:0x30D04++0x00 line.quad 0x00 "TPIDR_EL1,Software Thread ID Register" group.quad spr:0x34D02++0x00 line.quad 0x00 "TPIDR_EL2,Software Thread ID Register" group.quad spr:0x36D02++0x00 line.quad 0x00 "TPIDR_EL3,Software Thread ID Register" tree.end tree "Memory Management Unit" group.quad spr:0x30100++0x0 line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)" bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" newline bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes" bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled" bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled" newline bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes" bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes" newline bitfld.quad 0x00 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x36100++0x0 line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x30200++0x00 line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)" hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad spr:0x30201++0x00 line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)" hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x30202++0x00 line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)" bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored" bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored" newline bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit" bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 30. "TG1,TTBR1_EL1 granule size" "4 KByte,64 KByte" bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled" bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1" newline bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 14. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB" newline bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x30202++0x00 line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)" bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored" bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored" newline bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit" bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,Reserved,4 KB,64 KB" bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled" bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1" newline bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB,?..." newline bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 7. "EPD0,Translation table walk disable for translations using TTBR0" "Enabled,Disabled" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x34200++0x00 line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x34202++0x00 line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 14. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB" bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x34202++0x00 line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x36200++0x00 line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x36202++0x00 line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 14. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB" bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x36202++0x00 line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad SPR:0x34300++0x00 line.long 0x00 "DACR32_EL2,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager" if (CORENAME()=="CORTEXA57") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif (CORENAME()=="CORTEXA53") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif rgroup.quad SPR:0x30510++0x00 line.long 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)" rgroup.quad SPR:0x34510++0x00 line.long 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)" rgroup.quad SPR:0x36510++0x00 line.long 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)" rgroup.quad SPR:0x30511++0x00 line.long 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)" rgroup.quad SPR:0x34511++0x00 line.long 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)" rgroup.quad SPR:0x36511++0x00 line.long 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)" if (((per.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000) group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device-not nGnRnE,?..." newline hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address" bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" elif (((per.q(spr:0x30740))&0x01)==0x00) group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" newline hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address" bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" else group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" newline bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes" newline bitfld.quad 0x00 1.--6. "FST,Fault status field" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Reserved,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,?..." newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" endif tree.open "Memory Attribute Indirection Registers" group.quad spr:0x30A20++0x00 line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register (EL1)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" group.quad spr:0x34A20++0x00 line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register (EL2)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" group.quad spr:0x36A20++0x00 line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register (EL3)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" rgroup.quad spr:0x30A30++0x00 line.quad 0x00 "AMAIR_EL1,Memory Attribute Indirection Register (EL1)" rgroup.quad spr:0x34A30++0x00 line.quad 0x00 "AMAIR_EL2,Memory Attribute Indirection Register (EL2)" rgroup.quad spr:0x36A30++0x00 line.quad 0x00 "AMAIR_EL3,Memory Attribute Indirection Register (EL3)" tree.end newline group.quad SPR:0x30D01++0x00 line.long 0x0 "CONTEXTIDR_EL1,Context ID Register" tree.end tree "Virtualization Extensions" group.quad SPR:0x34000++0x0 line.long 0x0 "VPIDR_EL2,Virtualization Processor ID Register" if (CORENAME()=="CORTEXA57") group.quad spr:0x34005++0x00 line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register" hexmask.quad.long 0x00 0.--31. 1. "VMPIDR_EL2,MPIDR value returned by Non-secure EL1 reads of the MPIDR_EL1" elif (CORENAME()=="CORTEXA53") group.quad spr:0x34005++0x00 line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register" endif group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34110++0x00 line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register" bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes" newline bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit" bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" newline bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled" newline bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled" bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled" bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled" bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled" bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled" newline bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System" bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced" newline bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending" bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending" newline bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending" bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled" newline bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled" bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled" newline bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled" newline bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled" if (CORENAME()=="CORTEXA57") group.quad SPR:0x34111++0x00 line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" newline bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x34111++0x00 line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" newline bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6" endif group.quad SPR:0x34112++0x00 line.long 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped" group.quad SPR:0x36131++0x00 line.long 0x00 "MDCR_EL3,Hypervisor Debug Control Register (EL3)" bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes" bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes" bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "SDD,AArch64 secure debug disable" "No,Yes" bitfld.long 0x00 14.--15. "SPD32,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" newline bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" group.quad SPR:0x36112++0x00 line.long 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped" group.quad SPR:0x34113++0x00 line.long 0x00 "HSTR_EL2,Hypervisor System Trap Register" bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Not supported,?..." bitfld.long 0x00 15. "T15,Trap coprocessor primary register CRn = 15" "No effect,Trapped" bitfld.long 0x00 13. "T13,Trap coprocessor primary register CRn = 13" "No effect,Trapped" newline bitfld.long 0x00 12. "T12,Trap coprocessor primary register CRn = 12" "No effect,Trapped" bitfld.long 0x00 11. "T11,Trap coprocessor primary register CRn = 11" "No effect,Trapped" bitfld.long 0x00 10. "T10,Trap coprocessor primary register CRn = 10" "No effect,Trapped" newline bitfld.long 0x00 9. "T9,Trap coprocessor primary register CRn = 9" "No effect,Trapped" bitfld.long 0x00 8. "T8,Trap coprocessor primary register CRn = 8" "No effect,Trapped" bitfld.long 0x00 7. "T7,Trap coprocessor primary register CRn = 7" "No effect,Trapped" newline bitfld.long 0x00 6. "T6,Trap coprocessor primary register CRn = 6" "No effect,Trapped" bitfld.long 0x00 5. "T5,Trap coprocessor primary register CRn = 5" "No effect,Trapped" bitfld.long 0x00 3. "T3,Trap coprocessor primary register CRn = 3" "No effect,Trapped" newline bitfld.long 0x00 2. "T2,Trap coprocessor primary register CRn = 2" "No effect,Trapped" bitfld.long 0x00 1. "T1,Trap coprocessor primary register CRn = 1" "No effect,Trapped" bitfld.long 0x00 0. "T0,Trap coprocessor primary register CRn = 0" "No effect,Trapped" rgroup.quad SPR:0x34117++0x00 line.long 0x00 "HACR_EL2,Hypervisor Auxiliary Configuration Register" group.quad spr:0x34210++0x00 line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. "VMID,VMID for the translation table" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad SPR:0x34212++0x00 line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register" bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,42 bits/4TB,44 bits/16TB,48 bits/256TB,?..." bitfld.long 0x00 14. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x34212++0x00 line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register" bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,?..." bitfld.long 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,?..." bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x34604++0x00 line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register" hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting IPA bits" tree.end tree "Cache Control and Configuration" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif group.quad SPR:0x32000++0x0 line.long 0x0 "CSSELR_EL1,Cache Size Selection Register" bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction" if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x31001++0x0 line.long 0x0 "CLIDR_EL1,Cache Level ID Register" bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..." newline bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..." bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..." newline bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." rgroup.quad SPR:0x31000++0x0 line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..." bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. "RA,Read-Allocate" "Reserved,Supported" newline bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "Reserved,Reserved,64 bytes,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x31001++0x0 line.long 0x0 "CLIDR_EL1,Cache Level ID Register" bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..." newline bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." rgroup.quad SPR:0x31000++0x0 line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..." bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported" newline bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "1Reserved,Reserved,64 bytes,?..." endif tree "Level 1 memory system" if (CORENAME()=="CORTEXA57") group.quad SPR:0x30F10++0x00 line.long 0x00 "DL1DATA0_EL1,Data L1 Data 0 Register" group.quad SPR:0x30F11++0x00 line.long 0x00 "DL1DATA1_EL1,Data L1 Data 1 Register" group.quad SPR:0x30F12++0x00 line.long 0x00 "DL1DATA2_EL1,Data L1 Data 2 Register" group.quad SPR:0x30F13++0x00 line.long 0x00 "DL1DATA3_EL1,Data L1 Data 3 Register" group.quad SPR:0x30F00++0x00 line.long 0x00 "IL1DATA0_EL1,Instruction L1 Data 0 Register" group.quad SPR:0x30F01++0x00 line.long 0x00 "IL1DATA1_EL1,Instruction L1 Data 1 Register" group.quad SPR:0x30F02++0x00 line.long 0x00 "IL1DATA2_EL1,Instruction L1 Data 2 Register" group.quad SPR:0x30F03++0x00 line.long 0x00 "IL1DATA3_EL1,Instruction L1 Data 3 Register" group.quad spr:0x31F20++0x00 line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register" bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced" bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes" bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes" newline bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled" bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes" bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes" newline bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled" bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled" bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes" newline bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes" bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes" bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes" newline bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes" bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes" bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" newline bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes" bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced" bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes" newline bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced" bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes" bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes" newline bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes" bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled" bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced" newline bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled" bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" newline bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled" bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced" bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced" newline bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes" bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes" bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes" newline bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes" bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes" bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled" newline bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced" bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced" bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled" newline bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled" bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled" bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced" newline bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes" bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled" bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled" newline bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled" bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes" bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes" newline bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes" bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled" group.quad spr:0x31F21++0x00 line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register" bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes" bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines" newline bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..." bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..." elif (CORENAME()=="CORTEXA53") group.quad spr:0x31F20++0x00 line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register" bitfld.quad 0x00 44. "ENDCCASCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes" bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" newline bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes" newline bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes" bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes" bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes" newline bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams" bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled" bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled" newline bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8" bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes" bitfld.quad 0x00 6. "L1DEIEN,L1 D-cache data RAM error injection enable" "Disabled,Enabled" group.quad spr:0x31F21++0x00 line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" endif if (CORENAME()=="CORTEXA57") group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address" elif (CORENAME()=="CORTEXA53") group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7" newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" endif tree.end tree "Level 2 memory system" if (CORENAME()=="CORTEXA57") group.quad SPR:0x31B02++0x0 line.long 0x00 "L2CTLR_EL1,L2 Control Register" bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes" bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4" rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" newline bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" bitfld.long 0x00 20. "DIECCE,Data inline ECC enable" "Disabled,Enabled" rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not presented,Presented" newline rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not presented,Presented" rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not presented,1,2,?..." bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle" newline bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" group.quad SPR:0x31B03++0x0 line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad SPR:0x31F00++0x00 line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register" bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled" bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled" bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced" newline bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled" bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes" bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes" newline bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled" bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit" bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes" newline bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled" bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes" bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes" bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes" newline bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes" bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes" newline bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited" newline bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled" bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes" group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x31B02++0x0 line.long 0x00 "L2CTLR_EL1,L2 Control Register" bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4" bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" newline rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles" group.quad SPR:0x31B03++0x0 line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad SPR:0x31F00++0x00 line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register" bitfld.long 0x00 30.--31. "L2VC,L2 Victim Control" "0,1,2,3" bitfld.long 0x00 29. "L2DEIEN,L2 cache data RAM error injection enable" "Disabled,Enabled" bitfld.long 0x00 24. "L2TEIEN,L2 cache tag RAM error injection enable." "Disabled,Enabled" newline bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address" endif tree.end tree.end tree "System Performance Monitor" group.quad SPR:0x339C0++0x00 line.long 0x0 "PMCR_EL0,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code" hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code" bitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset" newline bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled" group.quad SPR:0x339C1++0x00 line.long 0x00 "PMCNTENSET_EL0,Count Enable Set Register" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled" bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled" bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled" bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled" bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled" bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled" bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled" bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled" bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled" bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled" bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled" bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled" bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled" bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled" bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled" bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled" bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled" bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled" bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled" bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled" bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled" group.quad SPR:0x339C2++0x00 line.long 0x00 "PMCNTENCLR_EL0,Count Enable Clear Register" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Event Counter 27 clear bit" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Event Counter 26 clear bit" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 clear bit" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Event Counter 23 clear bit" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 clear bit" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Event Counter 21 clear bit" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Event Counter 19 clear bit" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 clear bit" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 clear bit" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Event Counter 16 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled" group.quad SPR:0x339C3++0x00 line.long 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Flag Status Clear Register" bitfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" eventfld.long 0x00 30. "P30,Event Counter 30 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Event Counter 27 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Event Counter 26 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Event Counter 23 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Event Counter 21 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Event Counter 19 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Event Counter 16 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Event Counter 15 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Event Counter 7 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Event Counter 6 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Event Counter 3 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Event Counter 1 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 overflow clear bit" "Disabled,Enabled" wgroup.quad SPR:0x339C4++0x00 line.long 0x00 "PMSWINC_EL0,Performance Monitor Software Increment" bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment" bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment" bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment" bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment" newline bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment" bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment" bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment" bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment" newline bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment" bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment" bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment" bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment" newline bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment" bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment" bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment" bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment" newline bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment" bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment" bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment" bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment" newline bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment" bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment" bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment" bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment" newline bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment" bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment" newline bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment" group.quad SPR:0x339C5++0x00 line.long 0x00 "PMSELR_EL0,Performance Monitor Select Register" bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.open "Common Event Identification Registers" if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x339C6++0x0 line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" newline bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" newline bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" newline bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" newline bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" newline bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" newline bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" newline bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" newline bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x339C6++0x0 line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0" bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" newline bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" newline bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" newline bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" newline bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" newline bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" newline bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" newline bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" newline bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" newline bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" endif rgroup.quad SPR:0x339C7++0x0 line.long 0x00 "PMCEID1_EL0,Common Event Identification Register 1" bitfld.long 0x00 0. "EVENT32,Level 2 cache allocate" "Not implemented,Implemented" tree.end newline group.quad spr:0x339D0++0x00 line.quad 0x00 "PMCCNTR_EL0,Performance Monitor Cycle Count Register" group.quad SPR:0x339D1++0x00 line.long 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register" group.quad SPR:0x339D2++0x00 line.long 0x00 "PMXEVCNTR_EL0,Performance Monitor Event Count Register" group.quad SPR:0x339E0++0x00 line.long 0x00 "PMUSERENR_EL0,Performance Monitor User Enable Register" bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.long 0x00 2. "EC,Cycle counter read enable" "Disabled,Enabled" bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled" group.quad SPR:0x309E1++0x00 line.long 0x00 "PMINTENSET_EL1,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled" bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.quad SPR:0x309E2++0x00 line.long 0x00 "PMINTENCLR_EL1,Performance Monitor Interrupt Enable Clear" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled" group.quad SPR:0x339E3++0x00 line.long 0x00 "PMOVSSET_EL0,Performance Monitor Overflow Flag Status Set Register" group.quad SPR:(0x33E80+0x0)++0x00 line.long 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0" group.quad SPR:(0x33EC0+0x0)++0x00 line.long 0x00 "PMEVTYPER0_EL0,Performance Monitors Selected Event Type Register 0" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x1)++0x00 line.long 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1" group.quad SPR:(0x33EC0+0x1)++0x00 line.long 0x00 "PMEVTYPER1_EL0,Performance Monitors Selected Event Type Register 1" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x2)++0x00 line.long 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2" group.quad SPR:(0x33EC0+0x2)++0x00 line.long 0x00 "PMEVTYPER2_EL0,Performance Monitors Selected Event Type Register 2" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x3)++0x00 line.long 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3" group.quad SPR:(0x33EC0+0x3)++0x00 line.long 0x00 "PMEVTYPER3_EL0,Performance Monitors Selected Event Type Register 3" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x4)++0x00 line.long 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4" group.quad SPR:(0x33EC0+0x4)++0x00 line.long 0x00 "PMEVTYPER4_EL0,Performance Monitors Selected Event Type Register 4" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x5)++0x00 line.long 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5" group.quad SPR:(0x33EC0+0x5)++0x00 line.long 0x00 "PMEVTYPER5_EL0,Performance Monitors Selected Event Type Register 5" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:0x33EF7++0x00 line.long 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" group.quad SPR:0x33E00++0x00 line.long 0x00 "CNTFRQ_EL0,Counter Frequency Register" rgroup.quad spr:0x33E01++0x00 line.quad 0x00 "CNTPCT_EL0,Counter Physical Count Register" group.quad SPR:0x30E10++0x00 line.long 0x00 "CNTKCTL_EL1,Timer PL1 Control Register" bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" newline bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.quad SPR:0x33E20++0x00 line.long 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue register" group.quad SPR:0x33E21++0x00 line.long 0x00 "CNTP_CTL_EL0,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad SPR:0x33E30++0x00 line.long 0x00 "CNTV_TVAL_EL0,Counter PL1 Virtual Timer Value Register" group.quad SPR:0x33E31++0x00 line.long 0x00 "CNTV_CTL_EL0,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x33E02++0x00 line.quad 0x00 "CNTVCT_EL0,Counter Virtual Count Register" group.quad spr:0x33E22++0x00 line.quad 0x00 "CNTP_CVAL_EL0,Counter PL1 Physical Compare Value Register" group.quad spr:0x33E32++0x00 line.quad 0x00 "CNTV_CVAL_EL0,Counter PL1 Virtual Compare Value Register" group.quad spr:0x34E03++0x00 line.quad 0x00 "CNTVOFF_EL2,Counter Virtual Offset Register" group.quad SPR:0x34E10++0x00 line.long 0x00 "CNTHCTL_EL2,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit is the trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" newline bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.quad SPR:0x34E20++0x00 line.long 0x00 "CNTHP_TVAL_EL2,Counter Non-secure PL2 Physical Timer Value Register" group.quad SPR:0x34E21++0x00 line.long 0x00 "CNTHP_CTL_EL2,Counter Non-secure PL2 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x34E22++0x00 line.quad 0x00 "CNTHP_CVAL_EL2,Counter Non-secure PL2 Physical Compare Value Register" group.quad SPR:0x37E20++0x00 line.long 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical SecureTimer TimerValue register" group.quad SPR:0x37E21++0x00 line.long 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x37E22++0x00 line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue register" tree.end tree "Generic Interrupt Controller CPU Interface" tree "AArch64 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.quad spr:0x30C84++0x00 line.quad 0x00 "ICC_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)" bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.quad spr:0x30C90++0x00 line.quad 0x00 "ICC_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)" bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline if (((per.q(spr:0x30CB6))&0x10000000000)==0x00) wgroup.quad spr:0x30CB6++0x00 line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated" else wgroup.quad spr:0x30CB6++0x00 line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.quad spr:0x30C83++0x00 line.quad 0x00 "ICC_BPR0_EL1,Interrupt Controller Binary Point Register 0" bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" group.quad spr:0x30CC3++0x00 line.quad 0x00 "ICC_BPR1_EL1,Interrupt Controller Binary Point Register 1" bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" group.quad spr:0x30CC4++0x00 line.quad 0x00 "ICC_CTLR_EL1,Interrupt Controller Control Register (EL1)" rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported" rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255" newline rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Zero,Non-zero" rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 6. "PMHE,Controls whether the priority mask Register is used as a hint for interrupt distribution" "Disabled,Enabled" bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an End of Interrupt Register also deactivates the interrupt" "Disabled,Enabled" newline bitfld.quad 0x00 0. "CBPR,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 interrupts" "Separate registers,Same Register" group.quad spr:0x36CC4++0x00 line.quad 0x00 "ICC_CTLR_EL3,Interrupt Controller Control Register (EL3)" rbitfld.quad 0x00 19. "ExtRange,Extended INTID range" "Not supported,Supported" rbitfld.quad 0x00 18. "RSS,Range Selector Support" "0 - 15,0 - 255" newline rbitfld.quad 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported" rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported" newline rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" newline bitfld.quad 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Non-secure EL1 and EL2)" "Priority drop/Deactivation,Priority drop" bitfld.quad 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Secure EL1)" "Priority drop/Deactivation,Priority drop" bitfld.quad 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (EL3)" "Enabled,Disabled" newline bitfld.quad 0x00 1. "CBPR_EL1NS,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same Register" bitfld.quad 0x00 0. "CBPR_EL1S,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same Register" if (((per.q(spr:0x30CC4))&0x3800)==0x00) wgroup.quad spr:0x30CB1++0x00 line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.quad spr:0x30C81++0x00 line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.quad spr:0x30CC1++0x00 line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.quad spr:0x30C82++0x00 line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" rgroup.quad spr:0x30CC2++0x00 line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" elif (((per.q(spr:0x30CC4))&0x3800)==0x800) wgroup.quad spr:0x30CB1++0x00 line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.quad spr:0x30C81++0x00 line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.quad spr:0x30CC1++0x00 line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.quad spr:0x30C82++0x00 line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" rgroup.quad spr:0x30CC2++0x00 line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" endif hgroup.quad spr:0x30C80++0x00 hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0" in hgroup.quad spr:0x30CC0++0x00 hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1" in newline group.quad SPR:0x30CC6++0x00 line.long 0x00 "ICC_IGRPEN0_EL1,Interrupt Group Enable Register 0" bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled" group.quad SPR:0x30CC7++0x00 line.long 0x00 "ICC_IGRPEN1_EL1,Interrupt Group Enable Register 1 (EL1)" bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled" group.quad SPR:0x36CC7++0x00 line.long 0x00 "ICC_IGRPEN1_EL3,Interrupt Group Enable Register 1 (EL3)" bitfld.long 0x00 1. "ENABLEGRP1S,Enable Group 1 interrupts for the Secure state" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEGRP1NS,Enable Group 1 interrupts for the Non-secure state" "Disabled,Enabled" group.quad SPR:0x30460++0x00 line.long 0x00 "ICC_PMR_EL1,Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface" rgroup.quad SPR:0x30CB3++0x00 line.long 0x00 "ICC_RPR_EL1,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" if (((per.q(spr:0x30CB7))&0x10000000000)==0x00) wgroup.quad spr:0x30CB7++0x00 line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated." else wgroup.quad spr:0x30CB7++0x00 line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif if (((per.q(spr:0x30CB5))&0x10000000000)==0x00) wgroup.quad spr:0x30CB5++0x00 line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated" else wgroup.quad spr:0x30CB5++0x00 line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.quad SPR:0x30CC5++0x00 line.long 0x00 "ICC_SRE_EL1,System Register Enable Register for EL1" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.quad SPR:0x34C95++0x00 line.long 0x00 "ICC_SRE_EL2,System Register Enable Register for EL2" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.quad SPR:0x36CC5++0x00 line.long 0x00 "ICC_SRE_EL3,System Register Enable Register for EL3" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" tree.end tree "AArch64 Virtual Interface Control System Registers" tree.open "Hypervisor Active Priorities Registers" group.quad SPR:0x34C80++0x00 line.long 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" if (CORENAME()=="CORTEXA53") group.quad SPR:0x34C90++0x00 line.long 0x00 "ICH_AP1R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" endif tree.end newline rgroup.quad SPR:0x34CB3++0x00 line.long 0x00 "ICH_EISR_EL2,Interrupt Controller End of Interrupt Status Register" bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt" rgroup.quad SPR:0x34CB5++0x00 line.long 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register" bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt" bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt" bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt" newline bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt" group.quad SPR:0x34CB0++0x00 line.long 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..." bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" if (((d.q(spr:(0x34CC0+0x0)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x0)++0x00 line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x0)++0x00 line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x1)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x1)++0x00 line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x1)++0x00 line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x2)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x2)++0x00 line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x2)++0x00 line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x3)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x3)++0x00 line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x3)++0x00 line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif rgroup.quad SPR:0x34CB2++0x00 line.long 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register" bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted" bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted" bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted" newline bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted" bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted" bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted" newline bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted" bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted" group.quad SPR:0x34CB7++0x00 line.long 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register" hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface" bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" newline bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled" bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register" bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs" newline bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt" bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled" group.quad SPR:0x34C94++0x00 line.long 0x00 "ICH_VSEIR_EL2,Interrupt Controller Virtual System Error Interrupt Register" rgroup.quad SPR:0x34CB1++0x00 line.long 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register" bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported" bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported" newline bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported" bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "Debug Registers" rgroup.quad SPR:0x23010++0x00 line.long 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" group.quad SPR:0x20020++0x00 line.long 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable register" bitfld.long 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled" bitfld.long 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled" group.quad spr:0x23040++0x00 line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register" rgroup.quad SPR:0x23050++0x00 line.long 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register" wgroup.quad SPR:0x23050++0x00 line.long 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register" group.quad SPR:0x24070++0x00 line.long 0x00 "DBGVCR32_EL2,Vector Catch Register" bitfld.long 0x00 31. "NSF,FIQ vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 30. "NSI,IRQ vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 28. "NSD,Data Abort vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 27. "NSP,Prefetch Abort vector catch enable in Non-secure state" "Low,High" newline bitfld.long 0x00 26. "NSS,Supervisor Call (SVC) vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 25. "NSU,Undefined Instruction vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 7. "SF,FIQ vector catch enable in Secure state" "Low,High" bitfld.long 0x00 6. "SI,IRQ vector catch enable in Secure state" "Low,High" newline bitfld.long 0x00 4. "SD,Data Abort vector catch enable in Secure state" "Low,High" bitfld.long 0x00 3. "SP,Prefetch Abort vector catch enable in Secure state" "Low,High" bitfld.long 0x00 2. "SS,Supervisor Call (SVC) vector catch enable in Secure state" "Low,High" bitfld.long 0x00 1. "SU,Undefined Instruction vector catch enable in Secure state" "Low,High" group.quad SPR:0x20002++0x00 line.long 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register" group.quad SPR:0x20022++0x00 line.long 0x00 "MDSCR_EL1,Monitor Debug System Control Register" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. "RXO,Save/restore bit" "Low,High" bitfld.long 0x00 26. "TXU,Save/restore bit" "Low,High" newline bitfld.long 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3" bitfld.long 0x00 21. "TDA,Save/restore bit" "Low,High" bitfld.long 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled" bitfld.long 0x00 14. "HDE,Save/restore bit" "Low,High" newline bitfld.long 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled" bitfld.long 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled" bitfld.long 0x00 6. "ERR,Save/restore bit" "Low,High" bitfld.long 0x00 0. "SS,Software step control" "Disabled,Enabled" group.quad SPR:0x20032++0x00 line.long 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register" group.quad SPR:0x20062++0x00 line.long 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register" rgroup.quad spr:0x20100++0x00 line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register" hexmask.quad 0x00 12.--47. 0x1000 "ROMADDR,ROM base physical address" bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid" wgroup.quad SPR:0x20104++0x00 line.long 0x00 "OSLAR_EL1,OS Lock Access Register" bitfld.long 0x00 0. "OSLK,OS lock" "Unlock,Lock" rgroup.quad SPR:0x20114++0x00 line.long 0x00 "OSLSR_EL1,OS Lock Status Register" bitfld.long 0x00 2. "NTT,Not 32-bit access" "Low,High" bitfld.long 0x00 1. "OSLK,OS lock status" "Not locked,Locked" bitfld.long 0x00 0. 3. "OSLM,OS lock model implemented field" "Reserved,Reserved,Impelemented,?..." group.quad SPR:0x20134++0x00 line.long 0x00 "OSDLR_EL1,OS Double-lock Register" bitfld.long 0x00 0. "DLK,OS double-lock control" "Not locked,Locked" group.quad SPR:0x20144++0x00 line.long 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register" bitfld.long 0x00 0. "CORENPDRQ,Core no powerdown request" "No,Yes" group.quad SPR:0x20786++0x00 line.long 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set" bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set" bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set" newline bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set" bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set" group.quad SPR:0x20796++0x00 line.long 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear" bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.quad SPR:0x207E6++0x00 line.long 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register" bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled" bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled" newline bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled" bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled" group.quad SPR:0x33450++0x00 line.long 0x00 "DSPSR_EL0,Debug Saved Processor Status Register" group.quad spr:0x33451++0x00 line.quad 0x00 "DLR_EL0,Debug Link Register" tree.end tree "Breakpoint Registers" if (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x0)++0x0 line.long 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x10)++0x0 line.long 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x20)++0x0 line.long 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x30)++0x0 line.long 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x40)++0x0 line.long 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x50)++0x0 line.long 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" tree.end tree "Watchpoint Control Registers" group.quad spr:(0x20006+0x0)++0x00 "Watchpoint 0" line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x0)++0x00 line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x10)++0x00 "Watchpoint 1" line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x10)++0x00 line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x20)++0x00 "Watchpoint 2" line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x20)++0x00 line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x30)++0x00 "Watchpoint 3" line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x30)++0x00 line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" tree.end tree.end tree.open "AArch32" tree "ID Registers" rgroup.long c15:0x0000++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code" bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. "ARCH, Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8" newline hexmask.long.word 0x0 4.--15. 0x10 "PART,Primary Part Number" bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (CORENAME()=="CORTEXA57") rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif if corename()=="CORTEXA57" rgroup.long c15:0x0300++0x0 line.long 0x0 "TLBTR,TLB Type Register" endif if corename()=="CORTEXA57" rgroup.long c15:0x0500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." newline bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,Implemented" hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" newline bitfld.long 0x00 0.--1. "CPUID,Indicates the core number in the device" "1,2,3,4" elif corename()=="CORTEXA53" rgroup.long c15:0x0500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." newline bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,?..." hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" newline hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" endif rgroup.long c15:0x0600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..." newline bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." newline bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..." bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup.long c15:0x0620++0x00 line.long 0x00 "ID_MMFR4,ID_MMFR4" bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented, implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..." newline bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..." rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..." bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..." bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..." bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..." newline bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0520++0x00 line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5" bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..." newline bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..." bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..." newline bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." if corename()=="CORTEXA57" rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." elif corename()=="CORTEXA53" rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif group.long c15:0x0310++0x00 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" if corename()=="CORTEXA57" rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" newline bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" newline bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" newline bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" newline bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" newline bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" rgroup.long c15:0x7C9++0x0 line.long 0x00 "PMCEID1,Common Event Identification Register 1" elif corename()=="CORTEXA53" rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" newline bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" newline bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" newline bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" newline bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" newline bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" rgroup.long c15:0x7C9++0x0 line.long 0x00 "PMCEID1,Common Event Identification Register 1" bitfld.long 0x00 0. "EVENT32,L2D Cache Allocate" "Not implemented,Implemented" endif group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register" tree.end tree "System Control and Configuration" if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" else group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" endif group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register" bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced" bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes" newline bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes" bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled" newline bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes" bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes" newline bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled" bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled" newline bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes" bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes" newline bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes" bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes" newline bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes" bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes" newline bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes" newline bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced" bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes" newline bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced" bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes" newline bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes" bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes" newline bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled" bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced" newline bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled" bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" newline bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled" newline bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced" bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced" newline bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes" bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes" newline bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes" bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes" newline bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes" bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled" newline bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced" bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced" newline bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled" bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled" newline bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled" bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced" newline bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes" bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled" newline bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled" bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled" newline bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes" bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes" newline bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes" bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled" group.quad c15:0x110F0++0x01 line.quad 0x00 "CPUECTLR,CPU Extended Control Register" bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes" bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" newline bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" newline bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address" group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" elif corename()=="CORTEXA53" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register" bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes" bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" newline bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" newline bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes" bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes" newline bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes" bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes" newline bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams" bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled" newline bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled" bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes" group.quad c15:0x110F0++0x01 line.quad 0x00 "CPUECTLR,CPU Extended Control Register" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" newline bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7" newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" endif if corename()=="CORTEXA57" group.long c15:0x0201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 28. "TRCDIS,Disable CP14 access to trace registers" "No,Yes" newline bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full" bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full" elif corename()=="CORTEXA53" group.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 only,Reserved,Full" newline bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 only,Reserved,Full" endif group.long c15:0x0011++0x0 line.long 0x00 "SCR,Secure Configuration Register" bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped" bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped" newline bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes" newline bitfld.long 0x00 7. "SCD,Secure Monitor Call disable" "No,Yes" bitfld.long 0x00 5. "AW,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" newline bitfld.long 0x00 4. "FW,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" newline bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" newline bitfld.long 0x00 0. "NS,Secure mode " "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. "SUNIDEN,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. "SUIDEN,Invasive Secure User Debug Enable bit" "Denied,Permitted" group.long c15:0x0131++0x00 line.long 0x00 "SDCR,Secure Debug Control Register" bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes" bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes" newline bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. "SPD,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled" group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 15. "NSASEDIS,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 11. "CP11,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" newline bitfld.long 0x00 10. "CP10,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" if corename()=="CORTEXA57" group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address" elif corename()=="CORTEXA53" group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" endif rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" newline bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" group.long c15:0x020C++0x00 line.long 0x00 "RMR,Reset Management Register" bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested" bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64" group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" group.long c15:0x0115++0x00 line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register" if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable" bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable" newline bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Async. external,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Async. parity/on memory access,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable" bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable" newline bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/1st level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/1st level,Permission/1nd level,Sync. external/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..." endif elif corename()=="CORTEXA53" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX/STREX,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/section,Instruction cache maintenance,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/1st level,Permission/section,Sync. external/2nd level,Permission/2nd level,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..." endif endif if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif corename()=="CORTEXA53" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" if corename()=="CORTEXA57" rgroup.long c15:0x103F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]" hexmask.long.word 0x00 0.--11. 1. "PERIPHBASE[42:32],Periphbase[42:32]" elif corename()=="CORTEXA53" rgroup.long c15:0x103F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]" hexmask.long.byte 0x00 0.--7. 1. "PERIPHBASE[39:32],Periphbase[39:32]" endif group.long c15:0x000D++0x00 line.long 0x00 "FCSEIDR,FCSE Process ID register" group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,PL1 Software Thread ID Register" tree.end tree "Memory Management Unit" if corename()=="CORTEXA57" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" if (((per.l(c15:0x0202))&0x80000000)==0x00000000) // MPIDR[31]==1 case is missing here for TTBR0 and TTBR1 group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Registers" hexmask.long 0x00 6.--31. 0x40 "TTB1,Translation table base address" bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner" newline bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. "IMP,Implementation" "Low,High" newline bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable" bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Registers" hexmask.long 0x00 6.--31. 0x40 "TTBA,Translation table base address" bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner" newline bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. "IMP,Implementation" "Low,High" newline bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable" bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable" else group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Registers" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Registers" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" endif if (((per.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes" newline bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes" bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7" else group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable" newline bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" newline bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes" bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected" newline bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" endif elif corename()=="CORTEXA53" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" newline bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes" bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected" newline bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" else group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long 0x00 7.--31. 0x80 "TTB0,Translation table base 0 address" bitfld.long 0x00 6. 0. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long 0x00 7.--31. 0x80 "TTB1,Translation table base 1 address" bitfld.long 0x00 0. 6. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes" newline bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes" bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7" endif endif if corename()=="CORTEXA57" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" elif corename()=="CORTEXA53" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" endif group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hypervisor Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.quad c15:0x10070++0x01 line.quad 0x00 "PAR,Physical Address Register" else group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" endif tree.open "Memory Attribute Indirection Registers" group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. "NOS7,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. "NOS6,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 29. "NOS5,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 28. "NOS4,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 27. "NOS3,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. "NOS2,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 25. "NOS1,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. "NOS0,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 19. "NS1,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" bitfld.long 0x00 18. "NS0,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" newline bitfld.long 0x00 17. "DS1,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. "DS0,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" newline bitfld.long 0x00 14.--15. "TR7,{TEX[0] C B} = b111 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 12.--13. "TR6,{TEX[0] C B} = b110 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 10.--11. "TR5,{TEX[0] C B} = b101 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 8.--9. "TR4,{TEX[0] C B} = b100 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 6.--7. "TR3,{TEX[0] C B} = b011 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 4.--5. "TR2,{TEX[0] C B} = b010 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 2.--3. "TR1,{TEX[0] C B} = b001 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 0.--1. "TR0,{TEX[0] C B} = b000 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. "OR7,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 28.--29. "OR6,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 26.--27. "OR5,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 24.--25. "OR4,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 22.--23. "OR3,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 20.--21. "OR2,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 18.--19. "OR1,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 16.--17. "OR0,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 14.--15. "IR7,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 12.--13. "IR6,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 10.--11. "IR5,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 8.--9. "IR4,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 6.--7. "IR3,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 4.--5. "IR2,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 2.--3. "IR1,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 0.--1. "IR0,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline endif tree.end newline if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x10d++0x00 line.long 0x00 "CONTEXTIDR,Context ID Register" else group.long c15:0x10d++0x00 line.long 0x00 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. "PROCID,Process identifier" hexmask.long.byte 0x00 0.--7. 1. "ASID,Address space identifier" endif tree.end tree "Virtualization Extensions" group.long c15:0x4000++0x0 line.long 0x00 "VPIDR,Virtualization Processor ID Register" group.long c15:0x4500++0x00 line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" group.long c15:0x4101++0x00 line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" if corename()=="CORTEXA57" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hypervisor Configuration Register" bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled" newline bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled" newline bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" newline bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" newline bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled" bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" newline bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" newline bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" newline bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" newline bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3" newline bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "Not aborted,Aborted" newline bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed" bitfld.long 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed" newline bitfld.long 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed" bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" newline bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override" bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled" elif corename()=="CORTEXA53" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hypervisor Configuration Register" bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" bitfld.long 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" newline bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled" newline bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled" bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" newline bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" newline bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled" newline bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3" bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" newline bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "No aborted,Aborted" bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. "AMO,A-bit Mask Override" "No override,Override" newline bitfld.long 0x00 4. "IMO,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. "FMO,F-bit Mask Override" "No override,Override" newline bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override" newline bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled" endif group.long c15:0x4411++0x00 line.long 0x00 "HCR2,Hypervisor Configuration Register 2" bitfld.long 0x00 1. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.long 0x00 0. "CD,Stage 2 Data cache disable" "No,Yes" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hypervisor Debug Control Register" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" newline bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" newline bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 20. "TTA,Trap Trace Access" "Not trapped,?..." newline bitfld.long 0x0 15. "TASE,Trap Advanced SIMD extensions" "Not trapped,Trapped" bitfld.long 0x0 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped" newline bitfld.long 0x0 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hypervisor System Trap Register" bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Disabled,Enabled" bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "Reserved,?..." newline hexmask.long.word 0x00 5.--13. 1. "T4_15,Trap to Hypervisor mode Non-secure priv 5 - 13" bitfld.long 0x00 0.--3. "T0_13,Trap to Hypervisor mode Non-secure priv 0 - 3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4711++0x00 line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register" if corename()=="CORTEXA57" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" elif corename()=="CORTEXA53" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" endif group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hypervisor Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 4. "S,Sign-extension of the T0SZ field" "Low,High" bitfld.long 0x00 0.--3. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register" group.long c15:0x4115++0x00 line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Syndrome Register" group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to c15,Trapped MCRR/MRRC to c15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,Reserved,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline hexmask.long 0x00 0.--24. 1. "ISS,Instruction specific syndrome" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. "FIPA[39:12],Bits [39:12] of the faulting intermediate physical address" tree.open "Hypervisor Memory Attribute Indirection Registers" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" tree.end newline group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "HVBADDR,Hypervisor Vector Base Address" tree.end tree "Cache Control and Configuration" rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,PIPT" newline bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." if corename()=="CORTEXA57" rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..." newline bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..." bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..." newline bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." elif corename()=="CORTEXA53" rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..." newline bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." endif rgroup.long c15:0x1700++0x0 line.long 0x00 "AIDR,Auxiliary ID Register" rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" newline bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported" bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" newline hexmask.long.word 0x00 13.--27. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "16 bytes,32 bytes,64 bytes,128 bytes,?..." group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction" tree "Level 1 memory system" if corename()=="CORTEXA57" group.long c15:0x001F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" group.long c15:0x011F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" group.long c15:0x021F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" group.long c15:0x031F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" group.long c15:0x000F++0x00 line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register" group.long c15:0x010F++0x00 line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register" group.long c15:0x020F++0x00 line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register" group.long c15:0x030F++0x00 line.long 0x00 "IL1DATA3,Instruction L1 Data 3 Register" wgroup.long c15:0x04F++0x00 line.long 0x00 "RAMINDEX,RAM Index Operation Register" elif corename()=="CORTEXA53" rgroup.long c15:0x300F++0x00 line.long 0x00 "CDBGDR0,Cache Debug Data Register 0" rgroup.long c15:0x310F++0x00 line.long 0x00 "CDBGDR1,Cache Debug Data Register 1" rgroup.long c15:0x320F++0x00 line.long 0x00 "CDBGDR2,Cache Debug Data Register 2" rgroup.long c15:0x330F++0x00 line.long 0x00 "CDBGDR3,Cache Debug Data Register 3" wgroup.long c15:0x302F++0x00 line.long 0x00 "CDBGDCT,Cache Debug Data Cache Tag Read Operation Register" wgroup.long c15:0x312F++0x00 line.long 0x00 "CDBGICT,Cache Debug Instruction Cache Tag Read Operation Register" wgroup.long c15:0x304F++0x00 line.long 0x00 "CDBGDCD,Cache Debug Cache Debug Data Cache Data Read Operation Register" wgroup.long c15:0x314F++0x00 line.long 0x00 "CDBGICD,Cache Debug Instruction Cache Data Read Operation Register" wgroup.long c15:0x324F++0x00 line.long 0x00 "CDBGTD,Cache Debug TLB Data Read Operation Register" endif tree.end tree "Level 2 memory system" if corename()=="CORTEXA57" group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes" bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4" newline rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Not supported,Supported" bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" newline bitfld.long 0x00 20. "DIECCE,Data in-line ECC enable" "Disabled,Enabled" rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not present,Present" newline rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not present,Present" rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not present,1,2,Present" newline bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" newline rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "0 cycle,1 cycle" bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" newline bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled" bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled" newline bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced" bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled" newline bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes" bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes" newline bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled" bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit" newline bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes" bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled" newline bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes" bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes" newline bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes" bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes" newline bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes" newline bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" newline bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited" bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled" newline bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes" group.quad c15:0x130F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index" elif corename()=="CORTEXA53" group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4" bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" newline rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" newline rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles" group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" newline bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 30.--31. "L2VC,L2 victim Control" "0,1,2,3" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" group.quad c15:0x110F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address" endif tree.end tree.end tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code" hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code" rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset" newline bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled" newline group.long c15:0x1c9++0x00 line.long 0x00 "PMNCNTENSET,Count Enable Set Register " bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled" bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled" bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled" bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled" bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled" bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled" bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled" bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled" bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled" bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled" bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled" bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled" bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled" bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled" bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled" bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled" bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled" bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled" bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled" bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled" bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled" bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit " "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 clear bit " "Disabled,Enabled" eventfld.long 0x00 27. "P27,Event Counter 27 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 26. "P26,Event Counter 26 clear bit " "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 clear bit " "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 clear bit " "Disabled,Enabled" eventfld.long 0x00 23. "P23,Event Counter 23 clear bit " "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 21. "P21,Event Counter 21 clear bit " "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 clear bit " "Disabled,Enabled" eventfld.long 0x00 19. "P19,Event Counter 19 clear bit " "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 clear bit " "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 16. "P16,Event Counter 16 clear bit " "Disabled,Enabled" eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled" eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" eventfld.long 0x00 30. "P30,PMN30 overflow" "No overflow,Overflow" eventfld.long 0x00 29. "P29,PMN29 overflow" "No overflow,Overflow" eventfld.long 0x00 28. "P28,PMN28 overflow" "No overflow,Overflow" eventfld.long 0x00 27. "P27,PMN27 overflow" "No overflow,Overflow" newline eventfld.long 0x00 26. "P26,PMN26 overflow" "No overflow,Overflow" eventfld.long 0x00 25. "P25,PMN25 overflow" "No overflow,Overflow" eventfld.long 0x00 24. "P24,PMN24 overflow" "No overflow,Overflow" eventfld.long 0x00 23. "P23,PMN23 overflow" "No overflow,Overflow" eventfld.long 0x00 22. "P22,PMN22 overflow" "No overflow,Overflow" newline eventfld.long 0x00 21. "P21,PMN21 overflow" "No overflow,Overflow" eventfld.long 0x00 20. "P20,PMN20 overflow" "No overflow,Overflow" eventfld.long 0x00 19. "P19,PMN19 overflow" "No overflow,Overflow" eventfld.long 0x00 18. "P18,PMN18 overflow" "No overflow,Overflow" eventfld.long 0x00 17. "P17,PMN17 overflow" "No overflow,Overflow" newline eventfld.long 0x00 16. "P16,PMN16 overflow" "No overflow,Overflow" eventfld.long 0x00 15. "P15,PMN15 overflow" "No overflow,Overflow" eventfld.long 0x00 14. "P14,PMN14 overflow" "No overflow,Overflow" eventfld.long 0x00 13. "P13,PMN13 overflow" "No overflow,Overflow" eventfld.long 0x00 12. "P12,PMN12 overflow" "No overflow,Overflow" newline eventfld.long 0x00 11. "P11,PMN11 overflow" "No overflow,Overflow" eventfld.long 0x00 10. "P10,PMN10 overflow" "No overflow,Overflow" eventfld.long 0x00 9. "P9,PMN9 overflow" "No overflow,Overflow" eventfld.long 0x00 8. "P8,PMN8 overflow" "No overflow,Overflow" eventfld.long 0x00 7. "P7,PMN7 overflow" "No overflow,Overflow" newline eventfld.long 0x00 6. "P6,PMN6 overflow" "No overflow,Overflow" eventfld.long 0x00 5. "P5,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. "P4,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow" eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow" newline eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment" bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment" bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment" bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment" bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment" newline bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment" bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment" bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment" bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment" bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment" newline bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment" bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment" bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment" bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment" bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment" newline bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment" bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment" bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment" bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment" bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment" newline bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment" bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment" bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment" bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment" bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment" newline bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment" bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment" newline bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" group.long c15:0x1d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" group.long c15:0x2d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled" bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x3e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" group.long c15:0x8E++0x00 line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0" group.long c15:(0x8E+0x40)++0x00 line.long 0x00 "PMEVTYPER0,Performance Monitors Selected Event Type Register 0" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x18E++0x00 line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1" group.long c15:(0x18E+0x40)++0x00 line.long 0x00 "PMEVTYPER1,Performance Monitors Selected Event Type Register 1" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x28E++0x00 line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2" group.long c15:(0x28E+0x40)++0x00 line.long 0x00 "PMEVTYPER2,Performance Monitors Selected Event Type Register 2" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x38E++0x00 line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3" group.long c15:(0x38E+0x40)++0x00 line.long 0x00 "PMEVTYPER3,Performance Monitors Selected Event Type Register 3" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x48E++0x00 line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4" group.long c15:(0x48E+0x40)++0x00 line.long 0x00 "PMEVTYPER4,Performance Monitors Selected Event Type Register 4" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x58E++0x00 line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5" group.long c15:(0x58E+0x40)++0x00 line.long 0x00 "PMEVTYPER5,Performance Monitors Selected Event Type Register 5" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x07FE++0x00 line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" rgroup.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" newline bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Compare Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. "EVNTI,Select trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" newline bitfld.long 0x00 1. "EL1VCTEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" tree.end tree "Generic Interrupt Controller CPU Interface" tree "AArch32 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.long c15:0x048C++0x00 line.long 0x00 "ICC_AP0R0,Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x009C++0x00 line.long 0x00 "ICC_AP1R0,Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline wgroup.quad c15:0x110C0++0x01 line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "SGIID,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" group.long c15:0x038C++0x00 line.long 0x00 "ICC_BPR0,Binary Point Register 0" bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7" group.long c15:0x03CC++0x00 line.long 0x00 "ICC_BPR1,Binary Point Register 1" bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7" group.long c15:0x04CC++0x00 line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1" rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.long 0x00 14. "SEIS,SEI Support" "Not supported,Supported" rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1" newline bitfld.long 0x00 0. "CBPR,Common Binary Point Register" "0,1" group.long c15:0x64CC++0x00 line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3" rbitfld.long 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported" rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.long 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported" newline rbitfld.long 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." rbitfld.long 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Non-secure EL1 and EL2)" "Enabled,Disabled" bitfld.long 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Secure EL1)" "Enabled,Disabled" bitfld.long 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt register also deactivates the interrupt(EL3)" "Enabled,Disabled" newline bitfld.long 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same register" bitfld.long 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same register" if (((per.l(c15:0x4CC))&0x3800)==0x00) wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.long c15:0x018C++0x00 line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.long c15:0x01CC++0x00 line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.long c15:0x028C++0x00 line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" rgroup.long c15:0x02CC++0x00 line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" elif (((per.l(c15:0x4CC))&0x3800)==0x800) wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.long c15:0x018C++0x00 line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.long c15:0x01CC++0x00 line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.long c15:0x028C++0x00 line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" rgroup.long c15:0x02CC++0x00 line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" endif hgroup.long c15:0x008C++0x00 hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0" in hgroup.long c15:0x00CC++0x00 hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1" in group.long c15:0x06CC++0x00 line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0" bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.long c15:0x07CC++0x00 line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1" bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.long c15:0x0064++0x00 line.long 0x00 "ICC_PMR,Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface" rgroup.long c15:0x03BC++0x00 line.long 0x00 "ICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" wgroup.quad c15:0x120C0++0x01 line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" wgroup.quad c15:0x100C0++0x01 line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" group.long c15:0x05CC++0x00 line.long 0x00 "ICC_SRE,System Register Enable Register for EL1" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" if corename()=="CORTEXA53" group.long c15:0x459C++0x00 line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" endif group.long c15:0x65CC++0x00 line.long 0x00 "ICC_MSRE,System Register Enable Register for EL3" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.long c15:0x67CC++0x00 line.long 0x00 "ICC_MGRPEN1,Monitor Group1 Interrupt Group Enable" bitfld.long 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled" tree.end tree "AArch32 Virtual Interface Control System Registers" tree.open "Hypervisor Active Priorities Registers" group.long c15:0x408C++0x00 line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x409C++0x00 line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline rgroup.long c15:0x43BC++0x00 line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register" bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt" rgroup.long c15:0x45BC++0x00 line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register" bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt" bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt" bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt" newline bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt" group.long c15:0x40BC++0x00 line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" group.long c15:(0x40CC+0x0)++0x00 line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x100)++0x00 line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x200)++0x00 line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x300)++0x00 line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40EC+0x0)++0x00 line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x100)++0x00 line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x200)++0x00 line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x300)++0x00 line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" rgroup.long c15:0x42BC++0x00 line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register" bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted" bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted" bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted" newline bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted" bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted" bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted" newline bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted" bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted" group.long c15:0x459C++0x00 line.long 0x00 "ICH_SRE,Hypervisor System Register" group.long c15:0x47BC++0x00 line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register" hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface" bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" newline bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled" bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register" bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs" newline bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt" bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled" group.long c15:0x449C++0x00 line.long 0x00 "ICH_VSEIR,Virtual System Error Interrupt Register" rgroup.long c15:0x41BC++0x00 line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register" bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported" bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported" newline bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported" bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "Debug Registers" tree "Coresight Management Registers" if corename()=="CORTEXA57" rgroup.long c14:0x0000++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version" bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported" bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented" elif corename()=="CORTEXA53" rgroup.long c14:0x0000++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version" bitfld.long 0x0 15. "DEVID,Debug Device ID" "Low,High" bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported" newline bitfld.long 0x0 13. "PCSR,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented" hexmask.long.byte 0x0 4.--7. 1. "VARIANT,Implementation-defined Variant Number" newline hexmask.long.byte 0x0 0.--3. 1. "REVISION,Implementation-defined Revision Number" endif rgroup.long c14:0x0060++0x0 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" group.long c14:0x0070++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. "FIQVCE_NS,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. "IRQVCE_NS,IRG vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. "DAVCE_NS,Data Abort vector catch in Non-secure state" "Disabled,Enabled" newline bitfld.long 0x00 27. "PAVCE_NS,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. "SVCVCE_NS,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. "UIVCE_NS,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" newline bitfld.long 0x00 15. "FIQVCE_SM,FIQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. "IRQVCE_SM,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 12. "DAVCE_SM,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" newline bitfld.long 0x00 11. "PAVCE_SM,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. "SMCVCE_S,SMC vector catch enable in Secure state" "Disabled,Enabled" bitfld.long 0x00 7. "FIQVCE_S,FIQ vector catch in Secure state" "Disabled,Enabled" newline bitfld.long 0x00 6. "IRQVCE_S,IRG vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. "DAVCE_S,Data Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 3. "PAVCE_S,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" newline bitfld.long 0x00 2. "SVCVCE_S,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. "UIVCE_S,Undefined instruction vector catch in Secure state" "Disabled,Enabled" group.long c14:0x0020++0x00 line.long 0x00 "DBGDCCINT,DCC Interrupt Enable Register" bitfld.long 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled" bitfld.long 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled" group.long c14:0x0200++0x0 line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)" group.long c14:0x0220++0x0 line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled" newline bitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled" bitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled" bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" newline bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" newline bitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled" bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" bitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled" newline bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." rgroup.long c14:0x0010++0x0 line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" newline bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" newline bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." wgroup.long c14:0x0230++0x0 line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)" group.long c14:0x0050++0x0 line.long 0x00 "DBGDTRTXINT,Debug Transmit/Receive Register (Internal View)" group.long c14:0x0687++0x0 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set" newline bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set" newline bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set" group.long c14:0x0697++0x0 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.long c14:0x06E7++0x0 line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. "SNDFI,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. "SNDE,Secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 5. "SIDFI,Secure invasive debug features implementation" "No effect,Implemented" newline bitfld.long 0x00 4. "SIDE,Secure invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 3. "NSNDFI,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. "NSNDE,Non-secure non-invasive debug enable" "0,1" newline bitfld.long 0x00 1. "NSIDFI,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. "NSIDE,Non-secure invasive debug enable" "0,1" rgroup.long c14:0x0707++0x0 line.long 0x0 "DBGDEVID2,Debug Device ID Register 2" rgroup.long c14:0x0717++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. "PCSROFFSET,This field defines the offset applied to DBGPCSR samples" "0,1,No offset,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:0x0727++0x00 line.long 0x00 "DBGDEVID,Debug Device ID Register 0" bitfld.long 0x00 28.--31. "CIDMASK,Specifies the level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..." bitfld.long 0x00 24.--27. "AUXREGS,Specifies support for the Debug External Auxiliary Control Register" "Not implemented,?..." bitfld.long 0x00 20.--23. "DOUBLELOCK,Specifies support for the Debug OS Double Lock Register" "Reserved,Implemented,?..." newline bitfld.long 0x00 16.--19. "VIREXTNS,Specifies whether EL2 is implemented" "Reserved,Implemented,?..." bitfld.long 0x00 12.--15. "VECTORCATCH,Defines the form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x00 8.--11. "BPADDRMASK,Indicates the level of support for the Immediate Virtual Address(IVA) matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented" newline bitfld.long 0x00 4.--7. "WPADDRMASK,Indicates the level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." bitfld.long 0x00 0.--3. "PCSAMPLE,Indicates the level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." tree.end newline rgroup.quad c14:0x10010++0x1 line.quad 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.quad.word 0x0 32.--47. 0x1 "ROMADDR,ROM physical address" hexmask.quad.tbyte 0x0 12.--31. 0x10 "ROMADDR,ROM physical address" bitfld.quad 0x0 1. "VALID1,ROM table address valid" "Not valid,Valid" newline bitfld.quad 0x0 0. "VALID0,ROM table address valid" "Not valid,Valid" rgroup.quad c14:0x10020++0x1 line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" wgroup.long c14:0x0401++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:0x0411++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 2. "NTT,32-Bit Access" "Not required,Required" bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..." if (((per.l(c14:0x0411))&0x2)==0x2) group.long c14:0x0260++0x00 line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" else hgroup.long c14:0x0260++0x00 hide.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" endif group.long c14:0x0431++0x00 line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register" bitfld.long 0x00 0. "DLK,OS Double Lock control bit" "Not locked,Locked" group.long c14:0x0441++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Low,High" tree.end tree "Breakpoint Registers" if (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" hide.long 0x00 "DBGBVR0,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x0)++0x0 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" hide.long 0x00 "DBGBVR1,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x10)++0x0 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" hide.long 0x00 "DBGBVR2,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x20)++0x0 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" hide.long 0x00 "DBGBVR3,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x30)++0x0 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" hide.long 0x00 "DBGBVR4,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x40)++0x0 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" hide.long 0x00 "DBGBVR5,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x50)++0x0 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" group.long c14:0x0141++0x0 line.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register 4" hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value" group.long c14:0x0151++0x0 line.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register 5" hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value" tree.end tree "Watchpoint Control Registers" group.long c14:(0x0600+0x0)++0x00 "Breakpoint 0" line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x0)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x10)++0x00 "Breakpoint 1" line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x10)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x20)++0x00 "Breakpoint 2" line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x20)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x30)++0x00 "Breakpoint 3" line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x30)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" tree.end tree.end AUTOINDENT.OFF tree.open "Interrupt Controller (GIC-400)" width 17. width 17. base ad:0x50041000 tree "Distributor Interface" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0x50041000) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" if PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0080) group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)" else group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0084)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else rgroup.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0088)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else rgroup.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x008C)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else rgroup.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0090)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else rgroup.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0094)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else rgroup.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0098)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else rgroup.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x009C)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else rgroup.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00A0)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else rgroup.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00A4)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else rgroup.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00A8)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else rgroup.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00AC)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else rgroup.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00B0)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else rgroup.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00B4)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else rgroup.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00B8)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else rgroup.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00BC)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else rgroup.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00C0)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else rgroup.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00C4)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else rgroup.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00C8)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else rgroup.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00CC)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else rgroup.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00D0)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else rgroup.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00D4)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else rgroup.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00D8)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else rgroup.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00DC)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else rgroup.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00E0)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else rgroup.long 0x0E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00E4)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else rgroup.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00E8)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else rgroup.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00EC)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else rgroup.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00F0)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else rgroup.long 0x0F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00F4)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else rgroup.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00F8)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else rgroup.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00FC)) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else rgroup.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else rgroup.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else rgroup.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else rgroup.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else rgroup.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else rgroup.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else rgroup.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else rgroup.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else rgroup.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else rgroup.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else rgroup.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else rgroup.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else rgroup.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else rgroup.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else rgroup.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else rgroup.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else rgroup.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else rgroup.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else rgroup.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else rgroup.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else rgroup.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else rgroup.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else rgroup.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else rgroup.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else rgroup.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else rgroup.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else rgroup.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else rgroup.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else rgroup.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else rgroup.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else rgroup.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else rgroup.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending" else rgroup.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending" else rgroup.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending" else rgroup.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending" else rgroup.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending" else rgroup.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending" else rgroup.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending" else rgroup.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending" else rgroup.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending" else rgroup.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending" else rgroup.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending" else rgroup.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending" else rgroup.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending" else rgroup.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending" else rgroup.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending" else rgroup.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending" else rgroup.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending" else rgroup.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending" else rgroup.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending" else rgroup.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending" else rgroup.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending" else rgroup.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending" else rgroup.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending" else rgroup.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending" else rgroup.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending" else rgroup.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending" else rgroup.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending" else rgroup.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending" else rgroup.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending" else rgroup.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending" else rgroup.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending" else rgroup.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" if (((per.l(ad:0x50041000+0x08))&0xFF000000)==(0x0000000||0x1000000)) rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif else group.long 0x0300++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif rgroup.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x037C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else rgroup.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" rgroup.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" rgroup.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" rgroup.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" rgroup.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" rgroup.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" rgroup.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" rgroup.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else rgroup.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" rgroup.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" rgroup.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" rgroup.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" rgroup.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" rgroup.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" rgroup.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" rgroup.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else rgroup.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" rgroup.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" rgroup.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" rgroup.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" rgroup.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" rgroup.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" rgroup.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" rgroup.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else rgroup.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" rgroup.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" rgroup.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" rgroup.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" rgroup.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" rgroup.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" rgroup.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" rgroup.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else rgroup.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" rgroup.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" rgroup.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" rgroup.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" rgroup.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" rgroup.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" rgroup.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" rgroup.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else rgroup.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" rgroup.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" rgroup.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" rgroup.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" rgroup.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" rgroup.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" rgroup.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" rgroup.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else rgroup.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" rgroup.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" rgroup.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" rgroup.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" rgroup.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" rgroup.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" rgroup.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" rgroup.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else rgroup.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" rgroup.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" rgroup.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" rgroup.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" rgroup.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" rgroup.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" rgroup.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" rgroup.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else rgroup.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" rgroup.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" rgroup.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" rgroup.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" rgroup.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" rgroup.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" rgroup.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" rgroup.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else rgroup.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" rgroup.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" rgroup.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" rgroup.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" rgroup.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" rgroup.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" rgroup.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" rgroup.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else rgroup.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" rgroup.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" rgroup.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" rgroup.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" rgroup.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" rgroup.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" rgroup.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" rgroup.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else rgroup.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" rgroup.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" rgroup.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" rgroup.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" rgroup.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" rgroup.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" rgroup.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" rgroup.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else rgroup.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" rgroup.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" rgroup.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" rgroup.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" rgroup.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" rgroup.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" rgroup.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" rgroup.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else rgroup.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" rgroup.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" rgroup.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" rgroup.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" rgroup.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" rgroup.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" rgroup.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" rgroup.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else rgroup.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" rgroup.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" rgroup.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" rgroup.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" rgroup.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" rgroup.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" rgroup.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" rgroup.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else rgroup.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" rgroup.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" rgroup.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" rgroup.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" rgroup.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" rgroup.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" rgroup.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" rgroup.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else rgroup.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" rgroup.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" rgroup.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" rgroup.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" rgroup.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" rgroup.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" rgroup.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" rgroup.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else rgroup.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" rgroup.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" rgroup.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" rgroup.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" rgroup.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" rgroup.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" rgroup.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" rgroup.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else rgroup.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" rgroup.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" rgroup.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" rgroup.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" rgroup.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" rgroup.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" rgroup.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" rgroup.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else rgroup.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" rgroup.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" rgroup.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" rgroup.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" rgroup.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" rgroup.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" rgroup.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" rgroup.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else rgroup.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" rgroup.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" rgroup.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" rgroup.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" rgroup.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" rgroup.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" rgroup.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" rgroup.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else rgroup.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" rgroup.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" rgroup.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" rgroup.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" rgroup.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" rgroup.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" rgroup.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" rgroup.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else rgroup.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" rgroup.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" rgroup.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" rgroup.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" rgroup.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" rgroup.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" rgroup.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" rgroup.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else rgroup.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" rgroup.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" rgroup.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" rgroup.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" rgroup.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" rgroup.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" rgroup.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" rgroup.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else rgroup.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" rgroup.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" rgroup.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" rgroup.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" rgroup.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" rgroup.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" rgroup.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" rgroup.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else rgroup.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" rgroup.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" rgroup.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" rgroup.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" rgroup.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" rgroup.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" rgroup.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" rgroup.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else rgroup.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" rgroup.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" rgroup.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" rgroup.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" rgroup.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" rgroup.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" rgroup.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" rgroup.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else rgroup.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" rgroup.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" rgroup.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" rgroup.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" rgroup.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" rgroup.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" rgroup.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" rgroup.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else rgroup.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" rgroup.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" rgroup.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" rgroup.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" rgroup.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" rgroup.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" rgroup.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" rgroup.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else rgroup.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" rgroup.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" rgroup.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" rgroup.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" rgroup.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" rgroup.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" rgroup.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" rgroup.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else rgroup.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" rgroup.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" rgroup.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" rgroup.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" rgroup.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" rgroup.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" rgroup.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((per.l(ad:0x50041000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" rgroup.long 0xC00++0x03 line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" rgroup.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" rgroup.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" rgroup.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" rgroup.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" rgroup.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" rgroup.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" rgroup.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" rgroup.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" rgroup.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" rgroup.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" rgroup.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" rgroup.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" rgroup.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" rgroup.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" rgroup.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" rgroup.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" rgroup.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" rgroup.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" rgroup.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" rgroup.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" rgroup.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" rgroup.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" rgroup.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" rgroup.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" rgroup.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" rgroup.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" rgroup.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" rgroup.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" rgroup.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" rgroup.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" rgroup.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" textline " " width 22. if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else rgroup.long 0x0D60++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x0F20++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F24++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F28++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F2C++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0xFD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" rgroup.byte 0xFD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" rgroup.byte 0xFDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.byte 0xFF0++0x00 line.byte 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " tree.end tree.end width 0x0B base ad:0x50042000 width 17. tree "CPU Interface" if (((per.l(ad:0x50041000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " else if PER.ADDRESS.isSECUREEX(ad:0x50042000) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)" bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " endif endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0x50042000+0x0008) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif hgroup.long 0x0020++0x003 hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" in if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) wgroup.long 0x0024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" else hgroup.long 0x0024++0x03 hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" hgroup.long 0x0028++0x03 hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" endif group.long 0x00D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) group.long 0x00E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" else hgroup.long 0x00E0++0x03 hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end sif CPU.FEATURE(hypervisor) base ad:0x50044000 width 12. tree "Virtual CPU Control Interface" group.long 0x0000++0x03 line.long 0x00 "GICH_HCR,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x0004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long 0x0010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long 0x020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long 0x0030++0x03 line.long 0x00 "GICH_ELSR0,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long 0x00F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" if (((per.l(ad:0x50044000+0x100))&0x80000000)==0x80000000) group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x50044000+0x104))&0x80000000)==0x80000000) group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x50044000+0x108))&0x80000000)==0x80000000) group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x50044000+0x10C))&0x80000000)==0x80000000) group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif tree.end base ad:0x50046000 width 12. tree "Virtual CPU Interface" group.long 0x0000++0x03 line.long 0x00 "GICV_CTLR,Virtual Machine Control Register" bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs" textline " " bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" group.long 0x0004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x0008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x000C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICV_EOIR,VM End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x001C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x0020++0x03 hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" in wgroup.long 0x0024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x00D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" rgroup.long 0x00FC++0x03 line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end endif width 0x0B tree.end tree.end elif CORENAME()=="CORTEXA53" tree "Core Registers (Cortex-A53)" AUTOINDENT.PUSH AUTOINDENT.ON center tree tree.open "AArch64" tree "ID Registers" rgroup.quad spr:0x30000++0x0 line.long 0x0 "MIDR_EL1,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code" bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. "ARCH,Architecture" "Reserved,ARMv4,ARMv4T,ARMv5,ARMv5T,ARMv5TE,ARMv5TEJ,ARMv6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme" newline hexmask.long.word 0x0 4.--15. 0x1 "PART,Primary Part Number" bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x30005++0x00 line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register" bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" newline hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" bitfld.quad 0x00 0.--1. "CPUID,CPU ID" "1,2,3,4" elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30005++0x00 line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity level 3. Third highest level affinity field" newline bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" newline hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" endif rgroup.quad SPR:0x30006++0x0 line.long 0x0 "REVIDR_EL1,Revision ID Register" rgroup.quad SPR:0x30014++0x00 line.long 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..." newline bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30015++0x00 line.long 0x00 "ID_MMFR1_EL1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." newline bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.quad SPR:0x30016++0x00 line.long 0x00 "ID_MMFR2_EL1,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.quad SPR:0x30017++0x00 line.long 0x00 "ID_MMFR3_EL1,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..." bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,Reserved,?..." newline bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup.quad spr:0x30026++0x00 line.long 0x00 "ID_MMFR4_EL1,Memory Model Feature Register 4" bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented,Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30070++0x00 line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0" bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..." bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..." bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..." newline bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..." newline bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,Reserved,Reserved,44 bits/16 TB,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30070++0x00 line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0" bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..." bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..." bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..." newline bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..." bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..." bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..." newline bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..." endif if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30071++0x00 line.quad 0x00 "ID_AA64MMFR1_EL1,AArch64 Memory Model Feature Register 1" endif rgroup.quad SPR:0x30020++0x00 line.long 0x00 "ID_ISAR0_EL1,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..." newline bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..." rgroup.quad SPR:0x30021++0x00 line.long 0x00 "ID_ISAR1_EL1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30022++0x00 line.long 0x00 "ID_ISAR2_EL1,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30023++0x00 line.long 0x00 "ID_ISAR3_EL1,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..." bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..." bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30024++0x00 line.long 0x00 "ID_ISAR4_EL1,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..." bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..." newline bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.quad SPR:0x30025++0x00 line.long 0x00 "ID_ISAR5_EL1,Instruction Set Attribute Register 5" bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..." newline bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..." rgroup.quad spr:0x30060++0x00 line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0" bitfld.quad 0x00 16.--19. "CRC32,CRC32" "Reserved,Implemented,?..." bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions are implemented" "Not implemented,Implemented,?..." bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions are implemented" "Not implemented,Implemented,?..." newline bitfld.quad 0x00 4.--7. "AES,AES instructions are implemented" "Not implemented,Reserved,Implemented,?..." if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30061++0x00 line.quad 0x00 "ID_AA64ISAR1_EL1,AArch64 Instruction Set Attribute Register 1" endif rgroup.quad SPR:0x30010++0x00 line.long 0x00 "ID_PFR0_EL1,Processor Feature Register 0" bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..." bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.quad SPR:0x30011++0x00 line.long 0x00 "ID_PFR1_EL1,Processor Feature Register 1" bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..." bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x30040++0x00 line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0" bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..." bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,?..." bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,?..." newline bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." newline bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30040++0x00 line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0" bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..." bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" newline bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." newline bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..." endif if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30041++0x00 line.quad 0x00 "ID_AA64PFR1_EL1,AArch64 Processor Feature Register 1" endif if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x30012++0x00 line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x30012++0x00 line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif rgroup.quad spr:0x30050++0x00 line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0" bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware minus 1" "Reserved,2,?..." bitfld.quad 0x00 20.--23. "WRPS,The number of watchpoints minus 1" "Reserved,Reserved,Reserved,4,?..." bitfld.quad 0x00 12.--15. "BRPS,The number of breakpoints minus 1" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..." newline bitfld.quad 0x00 8.--11. "PMUVER,Performance Monitors extension version" "Reserved,Implemented,?..." bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension" "Not implemented,?..." bitfld.quad 0x00 0.--3. "DEBUGGER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented,?..." if (CORENAME()=="CORTEXA53") rgroup.quad spr:0x30051++0x00 line.quad 0x00 "ID_AA64DFR1_EL1,AArch64 Debug Feature Register 1" rgroup.quad spr:0x30054++0x00 line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0" rgroup.quad spr:0x30055++0x00 line.quad 0x00 "ID_AA64AFR1_EL1,AArch64 Auxiliary Feature Register 1" endif rgroup.quad SPR:0x30013++0x00 line.long 0x00 "ID_AFR0_EL1,Auxiliary Feature Register 0" rgroup.quad SPR:0x31007++0x00 line.long 0x00 "AIDR_EL1,Auxiliary ID Register" rgroup.quad SPR:0x33007++0x00 line.long 0x00 "DCZID_EL0,Data Cache Zero ID" bitfld.long 0x00 4. "DZP,Prohibit the DC ZVA instruction" "Not prohibited,Prohibited" bitfld.long 0x00 0.--3. "BS,Block Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." tree.end tree "System Control and Configuration" group.quad spr:0x36111++0x00 line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register" bitfld.quad 0x00 1. "SUNIDEN,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled" bitfld.quad 0x00 0. "SUIDEN,Enable debug exceptions in Secure User mode" "Disabled,Enabled" group.quad SPR:0x30100++0x0 line.long 0x00 "SCTLR_EL1,System Control Register (EL1)" bitfld.long 0x0 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 24. "E0E,Endianness of explicit data access at EL0" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled" bitfld.long 0x0 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 9. "UMA,User Mask Access" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT instruction disable" "No,Yes" newline bitfld.long 0x00 6. "THEE,Thumb EE enable" "Disabled,Enabled" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad SPR:0x34100++0x0 line.long 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad SPR:0x36100++0x0 line.long 0x00 "SCTLR_EL3,System Control Register (EL3)" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" rgroup.quad SPR:0x30101++0x0 line.long 0x00 "ACTLR_EL1,Auxiliary Control Register (EL1)" group.quad SPR:0x34101++0x0 line.long 0x00 "ACTLR_EL2,Auxiliary Control Register (EL2)" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" group.quad SPR:0x36101++0x0 line.long 0x00 "ACTLR_EL3,Auxiliary Control Register (EL3)" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" group.quad SPR:0x30102++0x00 line.long 0x00 "CPACR_EL1,Architectural Feature Access Control Register" bitfld.long 0x00 28. "TTA,Causes access to the Trace functionality to trap to EL1 when executed from EL0 or EL1" "Disabled,?..." bitfld.long 0x00 20.--21. "FPEN,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution to trap to EL1 when executed from EL0 or EL1" "Trap all,Trap El0,Trap all,Not trapped" group.quad SPR:0x36110++0x0 line.long 0x0 "SCR_EL3,Secure Configuration Register" bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped" bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped" newline bitfld.long 0x00 11. "ST,Enable secure EL1 access" "Disabled,Enabled" bitfld.long 0x00 10. "RW,Register width control for lower exception levels" "AArch32,AArch64" newline bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes" newline bitfld.long 0x00 7. "SMD,Secure Monitor Call disable" "No,Yes" bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" newline bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" newline bitfld.long 0x00 0. "NS,Secure mode" "Secure,Non-secure" group.quad spr:0x34110++0x00 line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register" bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes" newline bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit" bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" newline bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled" newline bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled" bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled" bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled" bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled" bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled" newline bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System" bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced" newline bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending" bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending" newline bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending" bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled" newline bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled" bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled" newline bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled" newline bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled" group.quad spr:0x30510++0x00 line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)" group.quad spr:0x30511++0x00 line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)" group.quad spr:0x34510++0x00 line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)" group.quad spr:0x34511++0x00 line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)" group.quad spr:0x36510++0x00 line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)" group.quad spr:0x36511++0x00 line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)" tree.open "Exception Syndrome Registers" if (CORENAME()=="CORTEXA57") if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..." elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined" elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..." elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif elif (CORENAME()=="CORTEXA53") if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SES,System Error Source" "Processor,System,External," newline hexmask.long.tbyte 0x00 0.--21. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x30520++0x00 line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid" bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" newline bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..." elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000)) group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x34520++0x00 line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction" elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3" bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined" elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword" newline bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required" bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit" bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000)) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes" bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2" newline bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write" bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred" newline bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred" bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred" elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid" bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7" elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt" elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000) group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value" else group.quad SPR:0x36520++0x00 line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved" endif endif tree.end newline if (CORENAME()=="CORTEXA57") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif (CORENAME()=="CORTEXA53") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif group.quad spr:0x30600++0x00 line.quad 0x00 "FAR_EL1,Fault Address Register" group.quad spr:0x34600++0x00 line.quad 0x00 "FAR_EL2,Fault Address Register" group.quad spr:0x36600++0x00 line.quad 0x00 "FAR_EL3,Fault Address Register" group.quad spr:0x34604++0x00 line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register" group.quad spr:0x30C00++0x00 line.quad 0x00 "VBAR_EL1,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" group.quad spr:0x34C00++0x00 line.quad 0x00 "VBAR_EL2,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" group.quad spr:0x36C00++0x00 line.quad 0x00 "VBAR_EL3,Vector Base Address Register" hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address" rgroup.quad spr:0x36C01++0x00 line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register" hexmask.quad 0x00 2.--43. 0x4 "RVBA,Reset Vector Base Address" rgroup.quad SPR:0x30C10++0x00 line.long 0x00 "ISR_EL1,Interrupt Status Register" bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" newline bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" group.quad SPR:0x36C02++0x00 line.long 0x00 "RMR_EL3,Reset Management Register" bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested" bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warmreset" "AArch32,AArch64" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x31F30++0x00 line.quad 0x00 "CBAR_EL1,Configuration Base Address Register" hexmask.quad.long 0x00 18.--43. 1. "PERIPHBASE[43:18],Periphbase[43:18]" elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x31F30++0x00 line.quad 0x00 "CBAR_EL1,Configuration Base Address Register" hexmask.quad.tbyte 0x00 18.--39. 1. "PERIPHBASE[39:18],Periphbase[39:18]" endif group.quad spr:0x30D01++0x00 line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register" group.quad spr:0x33D02++0x00 line.quad 0x00 "TPIDR_EL0,Software Thread ID Register" group.quad spr:0x33D03++0x00 line.quad 0x00 "TPIDRRO_EL0,Software Thread ID Register" group.quad spr:0x30D04++0x00 line.quad 0x00 "TPIDR_EL1,Software Thread ID Register" group.quad spr:0x34D02++0x00 line.quad 0x00 "TPIDR_EL2,Software Thread ID Register" group.quad spr:0x36D02++0x00 line.quad 0x00 "TPIDR_EL3,Software Thread ID Register" tree.end tree "Memory Management Unit" group.quad spr:0x30100++0x0 line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)" bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" newline bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes" bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled" bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled" newline bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes" bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes" newline bitfld.quad 0x00 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x36100++0x0 line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x30200++0x00 line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)" hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad spr:0x30201++0x00 line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)" hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x30202++0x00 line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)" bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored" bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored" newline bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit" bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 30. "TG1,TTBR1_EL1 granule size" "4 KByte,64 KByte" bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled" bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1" newline bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 14. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB" newline bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x30202++0x00 line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)" bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored" bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored" newline bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit" bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,Reserved,4 KB,64 KB" bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled" bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1" newline bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB,?..." newline bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 7. "EPD0,Translation table walk disable for translations using TTBR0" "Enabled,Disabled" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x34200++0x00 line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x34202++0x00 line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 14. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB" bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x34202++0x00 line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x36200++0x00 line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad spr:0x36202++0x00 line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..." newline bitfld.quad 0x00 14. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB" bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad spr:0x36202++0x00 line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)" bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored" bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..." newline bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB,?..." bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad SPR:0x34300++0x00 line.long 0x00 "DACR32_EL2,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager" if (CORENAME()=="CORTEXA57") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif (CORENAME()=="CORTEXA53") if (((per.q(spr:0x34501))&0x200)==0x200) group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.quad spr:0x34501++0x00 line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register" bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long" newline bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif rgroup.quad SPR:0x30510++0x00 line.long 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)" rgroup.quad SPR:0x34510++0x00 line.long 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)" rgroup.quad SPR:0x36510++0x00 line.long 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)" rgroup.quad SPR:0x30511++0x00 line.long 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)" rgroup.quad SPR:0x34511++0x00 line.long 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)" rgroup.quad SPR:0x36511++0x00 line.long 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)" if (((per.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000) group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device-not nGnRnE,?..." newline hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address" bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" elif (((per.q(spr:0x30740))&0x01)==0x00) group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read" newline hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address" bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes" newline bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" else group.quad spr:0x30740++0x00 line.quad 0x00 "PAR_EL1,Physical Address Register" newline bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes" newline bitfld.quad 0x00 1.--6. "FST,Fault status field" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Reserved,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,?..." newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" endif tree.open "Memory Attribute Indirection Registers" group.quad spr:0x30A20++0x00 line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register (EL1)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" group.quad spr:0x34A20++0x00 line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register (EL2)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" group.quad spr:0x36A20++0x00 line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register (EL3)" bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" newline bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate" rgroup.quad spr:0x30A30++0x00 line.quad 0x00 "AMAIR_EL1,Memory Attribute Indirection Register (EL1)" rgroup.quad spr:0x34A30++0x00 line.quad 0x00 "AMAIR_EL2,Memory Attribute Indirection Register (EL2)" rgroup.quad spr:0x36A30++0x00 line.quad 0x00 "AMAIR_EL3,Memory Attribute Indirection Register (EL3)" tree.end newline group.quad SPR:0x30D01++0x00 line.long 0x0 "CONTEXTIDR_EL1,Context ID Register" tree.end tree "Virtualization Extensions" group.quad SPR:0x34000++0x0 line.long 0x0 "VPIDR_EL2,Virtualization Processor ID Register" if (CORENAME()=="CORTEXA57") group.quad spr:0x34005++0x00 line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register" hexmask.quad.long 0x00 0.--31. 1. "VMPIDR_EL2,MPIDR value returned by Non-secure EL1 reads of the MPIDR_EL1" elif (CORENAME()=="CORTEXA53") group.quad spr:0x34005++0x00 line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register" endif group.quad spr:0x34100++0x0 line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)" bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled" newline bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad spr:0x34110++0x00 line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register" bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes" newline bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit" bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" newline bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled" newline bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled" bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled" bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled" bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled" newline bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled" bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled" newline bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System" bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced" newline bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending" bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending" newline bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending" bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled" newline bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled" bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled" newline bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled" newline bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled" if (CORENAME()=="CORTEXA57") group.quad SPR:0x34111++0x00 line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" newline bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x34111++0x00 line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" newline bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6" endif group.quad SPR:0x34112++0x00 line.long 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped" group.quad SPR:0x36131++0x00 line.long 0x00 "MDCR_EL3,Hypervisor Debug Control Register (EL3)" bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes" bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes" bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "SDD,AArch64 secure debug disable" "No,Yes" bitfld.long 0x00 14.--15. "SPD32,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" newline bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" group.quad SPR:0x36112++0x00 line.long 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped" group.quad SPR:0x34113++0x00 line.long 0x00 "HSTR_EL2,Hypervisor System Trap Register" bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Not supported,?..." bitfld.long 0x00 15. "T15,Trap coprocessor primary register CRn = 15" "No effect,Trapped" bitfld.long 0x00 13. "T13,Trap coprocessor primary register CRn = 13" "No effect,Trapped" newline bitfld.long 0x00 12. "T12,Trap coprocessor primary register CRn = 12" "No effect,Trapped" bitfld.long 0x00 11. "T11,Trap coprocessor primary register CRn = 11" "No effect,Trapped" bitfld.long 0x00 10. "T10,Trap coprocessor primary register CRn = 10" "No effect,Trapped" newline bitfld.long 0x00 9. "T9,Trap coprocessor primary register CRn = 9" "No effect,Trapped" bitfld.long 0x00 8. "T8,Trap coprocessor primary register CRn = 8" "No effect,Trapped" bitfld.long 0x00 7. "T7,Trap coprocessor primary register CRn = 7" "No effect,Trapped" newline bitfld.long 0x00 6. "T6,Trap coprocessor primary register CRn = 6" "No effect,Trapped" bitfld.long 0x00 5. "T5,Trap coprocessor primary register CRn = 5" "No effect,Trapped" bitfld.long 0x00 3. "T3,Trap coprocessor primary register CRn = 3" "No effect,Trapped" newline bitfld.long 0x00 2. "T2,Trap coprocessor primary register CRn = 2" "No effect,Trapped" bitfld.long 0x00 1. "T1,Trap coprocessor primary register CRn = 1" "No effect,Trapped" bitfld.long 0x00 0. "T0,Trap coprocessor primary register CRn = 0" "No effect,Trapped" rgroup.quad SPR:0x34117++0x00 line.long 0x00 "HACR_EL2,Hypervisor Auxiliary Configuration Register" group.quad spr:0x34210++0x00 line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. "VMID,VMID for the translation table" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" if (CORENAME()=="CORTEXA57") group.quad SPR:0x34212++0x00 line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register" bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,42 bits/4TB,44 bits/16TB,48 bits/256TB,?..." bitfld.long 0x00 14. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x34212++0x00 line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register" bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,?..." bitfld.long 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,?..." bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.quad spr:0x34604++0x00 line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register" hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting IPA bits" tree.end tree "Cache Control and Configuration" if (CORENAME()=="CORTEXA57") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad spr:0x33001++0x0 line.long 0x0 "CTR_EL0,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif group.quad SPR:0x32000++0x0 line.long 0x0 "CSSELR_EL1,Cache Size Selection Register" bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction" if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x31001++0x0 line.long 0x0 "CLIDR_EL1,Cache Level ID Register" bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..." newline bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..." bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..." newline bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." rgroup.quad SPR:0x31000++0x0 line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..." bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. "RA,Read-Allocate" "Reserved,Supported" newline bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "Reserved,Reserved,64 bytes,?..." elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x31001++0x0 line.long 0x0 "CLIDR_EL1,Cache Level ID Register" bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..." newline bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." rgroup.quad SPR:0x31000++0x0 line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..." bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported" newline bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "1Reserved,Reserved,64 bytes,?..." endif tree "Level 1 memory system" if (CORENAME()=="CORTEXA57") group.quad SPR:0x30F10++0x00 line.long 0x00 "DL1DATA0_EL1,Data L1 Data 0 Register" group.quad SPR:0x30F11++0x00 line.long 0x00 "DL1DATA1_EL1,Data L1 Data 1 Register" group.quad SPR:0x30F12++0x00 line.long 0x00 "DL1DATA2_EL1,Data L1 Data 2 Register" group.quad SPR:0x30F13++0x00 line.long 0x00 "DL1DATA3_EL1,Data L1 Data 3 Register" group.quad SPR:0x30F00++0x00 line.long 0x00 "IL1DATA0_EL1,Instruction L1 Data 0 Register" group.quad SPR:0x30F01++0x00 line.long 0x00 "IL1DATA1_EL1,Instruction L1 Data 1 Register" group.quad SPR:0x30F02++0x00 line.long 0x00 "IL1DATA2_EL1,Instruction L1 Data 2 Register" group.quad SPR:0x30F03++0x00 line.long 0x00 "IL1DATA3_EL1,Instruction L1 Data 3 Register" group.quad spr:0x31F20++0x00 line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register" bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced" bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes" bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes" newline bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled" bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes" bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes" newline bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled" bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled" bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes" newline bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes" bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes" bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes" newline bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes" bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes" bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" newline bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes" bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced" bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes" newline bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced" bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes" bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes" newline bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes" bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled" bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced" newline bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled" bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" newline bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled" bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced" bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced" newline bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes" bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes" bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes" newline bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes" bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes" bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled" newline bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced" bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced" bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled" newline bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled" bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled" bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced" newline bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes" bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled" bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled" newline bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled" bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes" bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes" newline bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes" bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled" group.quad spr:0x31F21++0x00 line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register" bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes" bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines" newline bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..." bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..." elif (CORENAME()=="CORTEXA53") group.quad spr:0x31F20++0x00 line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register" bitfld.quad 0x00 44. "ENDCCASCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes" bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" newline bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes" newline bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes" bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes" bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes" newline bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams" bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled" bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled" newline bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8" bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes" bitfld.quad 0x00 6. "L1DEIEN,L1 D-cache data RAM error injection enable" "Disabled,Enabled" group.quad spr:0x31F21++0x00 line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" endif if (CORENAME()=="CORTEXA57") group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address" elif (CORENAME()=="CORTEXA53") group.quad spr:0x31F22++0x00 line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7" newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" endif tree.end tree "Level 2 memory system" if (CORENAME()=="CORTEXA57") group.quad SPR:0x31B02++0x0 line.long 0x00 "L2CTLR_EL1,L2 Control Register" bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes" bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4" rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" newline bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" bitfld.long 0x00 20. "DIECCE,Data inline ECC enable" "Disabled,Enabled" rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not presented,Presented" newline rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not presented,Presented" rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not presented,1,2,?..." bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle" newline bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" group.quad SPR:0x31B03++0x0 line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad SPR:0x31F00++0x00 line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register" bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled" bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled" bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced" newline bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled" bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes" bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes" newline bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled" bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit" bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes" newline bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled" bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes" bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes" bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes" newline bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes" bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes" newline bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited" newline bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled" bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes" group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index" elif (CORENAME()=="CORTEXA53") group.quad SPR:0x31B02++0x0 line.long 0x00 "L2CTLR_EL1,L2 Control Register" bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4" bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" newline rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles" group.quad SPR:0x31B03++0x0 line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad SPR:0x31F00++0x00 line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register" bitfld.long 0x00 30.--31. "L2VC,L2 Victim Control" "0,1,2,3" bitfld.long 0x00 29. "L2DEIEN,L2 cache data RAM error injection enable" "Disabled,Enabled" bitfld.long 0x00 24. "L2TEIEN,L2 cache tag RAM error injection enable." "Disabled,Enabled" newline bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" group.quad spr:0x31F23++0x00 line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" newline bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address" endif tree.end tree.end tree "System Performance Monitor" group.quad SPR:0x339C0++0x00 line.long 0x0 "PMCR_EL0,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code" hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code" bitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset" newline bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled" group.quad SPR:0x339C1++0x00 line.long 0x00 "PMCNTENSET_EL0,Count Enable Set Register" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled" bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled" bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled" bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled" bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled" bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled" bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled" bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled" bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled" bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled" bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled" bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled" bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled" bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled" bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled" bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled" bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled" bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled" bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled" bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled" bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled" group.quad SPR:0x339C2++0x00 line.long 0x00 "PMCNTENCLR_EL0,Count Enable Clear Register" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Event Counter 27 clear bit" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Event Counter 26 clear bit" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 clear bit" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Event Counter 23 clear bit" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 clear bit" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Event Counter 21 clear bit" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Event Counter 19 clear bit" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 clear bit" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 clear bit" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Event Counter 16 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled" group.quad SPR:0x339C3++0x00 line.long 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Flag Status Clear Register" bitfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" eventfld.long 0x00 30. "P30,Event Counter 30 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Event Counter 27 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Event Counter 26 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Event Counter 23 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Event Counter 21 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Event Counter 19 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Event Counter 16 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Event Counter 15 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Event Counter 7 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Event Counter 6 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 overflow clear bit" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Event Counter 3 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Event Counter 1 overflow clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 overflow clear bit" "Disabled,Enabled" wgroup.quad SPR:0x339C4++0x00 line.long 0x00 "PMSWINC_EL0,Performance Monitor Software Increment" bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment" bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment" bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment" bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment" newline bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment" bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment" bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment" bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment" newline bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment" bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment" bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment" bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment" newline bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment" bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment" bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment" bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment" newline bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment" bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment" bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment" bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment" newline bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment" bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment" bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment" bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment" newline bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment" bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment" newline bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment" group.quad SPR:0x339C5++0x00 line.long 0x00 "PMSELR_EL0,Performance Monitor Select Register" bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.open "Common Event Identification Registers" if (CORENAME()=="CORTEXA57") rgroup.quad SPR:0x339C6++0x0 line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" newline bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" newline bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" newline bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" newline bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" newline bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" newline bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" newline bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" newline bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" elif (CORENAME()=="CORTEXA53") rgroup.quad SPR:0x339C6++0x0 line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0" bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" newline bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" newline bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" newline bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" newline bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" newline bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" newline bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" newline bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" newline bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" newline bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" endif rgroup.quad SPR:0x339C7++0x0 line.long 0x00 "PMCEID1_EL0,Common Event Identification Register 1" bitfld.long 0x00 0. "EVENT32,Level 2 cache allocate" "Not implemented,Implemented" tree.end newline group.quad spr:0x339D0++0x00 line.quad 0x00 "PMCCNTR_EL0,Performance Monitor Cycle Count Register" group.quad SPR:0x339D1++0x00 line.long 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register" group.quad SPR:0x339D2++0x00 line.long 0x00 "PMXEVCNTR_EL0,Performance Monitor Event Count Register" group.quad SPR:0x339E0++0x00 line.long 0x00 "PMUSERENR_EL0,Performance Monitor User Enable Register" bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.long 0x00 2. "EC,Cycle counter read enable" "Disabled,Enabled" bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled" group.quad SPR:0x309E1++0x00 line.long 0x00 "PMINTENSET_EL1,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled" bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.quad SPR:0x309E2++0x00 line.long 0x00 "PMINTENCLR_EL1,Performance Monitor Interrupt Enable Clear" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled" group.quad SPR:0x339E3++0x00 line.long 0x00 "PMOVSSET_EL0,Performance Monitor Overflow Flag Status Set Register" group.quad SPR:(0x33E80+0x0)++0x00 line.long 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0" group.quad SPR:(0x33EC0+0x0)++0x00 line.long 0x00 "PMEVTYPER0_EL0,Performance Monitors Selected Event Type Register 0" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x1)++0x00 line.long 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1" group.quad SPR:(0x33EC0+0x1)++0x00 line.long 0x00 "PMEVTYPER1_EL0,Performance Monitors Selected Event Type Register 1" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x2)++0x00 line.long 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2" group.quad SPR:(0x33EC0+0x2)++0x00 line.long 0x00 "PMEVTYPER2_EL0,Performance Monitors Selected Event Type Register 2" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x3)++0x00 line.long 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3" group.quad SPR:(0x33EC0+0x3)++0x00 line.long 0x00 "PMEVTYPER3_EL0,Performance Monitors Selected Event Type Register 3" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x4)++0x00 line.long 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4" group.quad SPR:(0x33EC0+0x4)++0x00 line.long 0x00 "PMEVTYPER4_EL0,Performance Monitors Selected Event Type Register 4" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:(0x33E80+0x5)++0x00 line.long 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5" group.quad SPR:(0x33EC0+0x5)++0x00 line.long 0x00 "PMEVTYPER5_EL0,Performance Monitors Selected Event Type Register 5" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.quad SPR:0x33EF7++0x00 line.long 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" group.quad SPR:0x33E00++0x00 line.long 0x00 "CNTFRQ_EL0,Counter Frequency Register" rgroup.quad spr:0x33E01++0x00 line.quad 0x00 "CNTPCT_EL0,Counter Physical Count Register" group.quad SPR:0x30E10++0x00 line.long 0x00 "CNTKCTL_EL1,Timer PL1 Control Register" bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" newline bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.quad SPR:0x33E20++0x00 line.long 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue register" group.quad SPR:0x33E21++0x00 line.long 0x00 "CNTP_CTL_EL0,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad SPR:0x33E30++0x00 line.long 0x00 "CNTV_TVAL_EL0,Counter PL1 Virtual Timer Value Register" group.quad SPR:0x33E31++0x00 line.long 0x00 "CNTV_CTL_EL0,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x33E02++0x00 line.quad 0x00 "CNTVCT_EL0,Counter Virtual Count Register" group.quad spr:0x33E22++0x00 line.quad 0x00 "CNTP_CVAL_EL0,Counter PL1 Physical Compare Value Register" group.quad spr:0x33E32++0x00 line.quad 0x00 "CNTV_CVAL_EL0,Counter PL1 Virtual Compare Value Register" group.quad spr:0x34E03++0x00 line.quad 0x00 "CNTVOFF_EL2,Counter Virtual Offset Register" group.quad SPR:0x34E10++0x00 line.long 0x00 "CNTHCTL_EL2,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit is the trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" newline bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.quad SPR:0x34E20++0x00 line.long 0x00 "CNTHP_TVAL_EL2,Counter Non-secure PL2 Physical Timer Value Register" group.quad SPR:0x34E21++0x00 line.long 0x00 "CNTHP_CTL_EL2,Counter Non-secure PL2 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x34E22++0x00 line.quad 0x00 "CNTHP_CVAL_EL2,Counter Non-secure PL2 Physical Compare Value Register" group.quad SPR:0x37E20++0x00 line.long 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical SecureTimer TimerValue register" group.quad SPR:0x37E21++0x00 line.long 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad spr:0x37E22++0x00 line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue register" tree.end tree "Generic Interrupt Controller CPU Interface" tree "AArch64 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.quad spr:0x30C84++0x00 line.quad 0x00 "ICC_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)" bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.quad spr:0x30C90++0x00 line.quad 0x00 "ICC_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)" bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" newline bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" newline bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" newline bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline if (((per.q(spr:0x30CB6))&0x10000000000)==0x00) wgroup.quad spr:0x30CB6++0x00 line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated" else wgroup.quad spr:0x30CB6++0x00 line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.quad spr:0x30C83++0x00 line.quad 0x00 "ICC_BPR0_EL1,Interrupt Controller Binary Point Register 0" bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" group.quad spr:0x30CC3++0x00 line.quad 0x00 "ICC_BPR1_EL1,Interrupt Controller Binary Point Register 1" bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" group.quad spr:0x30CC4++0x00 line.quad 0x00 "ICC_CTLR_EL1,Interrupt Controller Control Register (EL1)" rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported" rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255" newline rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Zero,Non-zero" rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 6. "PMHE,Controls whether the priority mask Register is used as a hint for interrupt distribution" "Disabled,Enabled" bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an End of Interrupt Register also deactivates the interrupt" "Disabled,Enabled" newline bitfld.quad 0x00 0. "CBPR,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 interrupts" "Separate registers,Same Register" group.quad spr:0x36CC4++0x00 line.quad 0x00 "ICC_CTLR_EL3,Interrupt Controller Control Register (EL3)" rbitfld.quad 0x00 19. "ExtRange,Extended INTID range" "Not supported,Supported" rbitfld.quad 0x00 18. "RSS,Range Selector Support" "0 - 15,0 - 255" newline rbitfld.quad 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported" rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported" newline rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" newline bitfld.quad 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Non-secure EL1 and EL2)" "Priority drop/Deactivation,Priority drop" bitfld.quad 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Secure EL1)" "Priority drop/Deactivation,Priority drop" bitfld.quad 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (EL3)" "Enabled,Disabled" newline bitfld.quad 0x00 1. "CBPR_EL1NS,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same Register" bitfld.quad 0x00 0. "CBPR_EL1S,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same Register" if (((per.q(spr:0x30CC4))&0x3800)==0x00) wgroup.quad spr:0x30CB1++0x00 line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.quad spr:0x30C81++0x00 line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.quad spr:0x30CC1++0x00 line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.quad spr:0x30C82++0x00 line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" rgroup.quad spr:0x30CC2++0x00 line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" elif (((per.q(spr:0x30CC4))&0x3800)==0x800) wgroup.quad spr:0x30CB1++0x00 line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.quad spr:0x30C81++0x00 line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.quad spr:0x30CC1++0x00 line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.quad spr:0x30C82++0x00 line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" rgroup.quad spr:0x30CC2++0x00 line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level" endif hgroup.quad spr:0x30C80++0x00 hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0" in hgroup.quad spr:0x30CC0++0x00 hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1" in newline group.quad SPR:0x30CC6++0x00 line.long 0x00 "ICC_IGRPEN0_EL1,Interrupt Group Enable Register 0" bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled" group.quad SPR:0x30CC7++0x00 line.long 0x00 "ICC_IGRPEN1_EL1,Interrupt Group Enable Register 1 (EL1)" bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled" group.quad SPR:0x36CC7++0x00 line.long 0x00 "ICC_IGRPEN1_EL3,Interrupt Group Enable Register 1 (EL3)" bitfld.long 0x00 1. "ENABLEGRP1S,Enable Group 1 interrupts for the Secure state" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEGRP1NS,Enable Group 1 interrupts for the Non-secure state" "Disabled,Enabled" group.quad SPR:0x30460++0x00 line.long 0x00 "ICC_PMR_EL1,Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface" rgroup.quad SPR:0x30CB3++0x00 line.long 0x00 "ICC_RPR_EL1,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" if (((per.q(spr:0x30CB7))&0x10000000000)==0x00) wgroup.quad spr:0x30CB7++0x00 line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated." else wgroup.quad spr:0x30CB7++0x00 line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif if (((per.q(spr:0x30CB5))&0x10000000000)==0x00) wgroup.quad spr:0x30CB5++0x00 line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated" else wgroup.quad spr:0x30CB5++0x00 line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register" newline bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline endif group.quad SPR:0x30CC5++0x00 line.long 0x00 "ICC_SRE_EL1,System Register Enable Register for EL1" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.quad SPR:0x34C95++0x00 line.long 0x00 "ICC_SRE_EL2,System Register Enable Register for EL2" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.quad SPR:0x36CC5++0x00 line.long 0x00 "ICC_SRE_EL3,System Register Enable Register for EL3" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" tree.end tree "AArch64 Virtual Interface Control System Registers" tree.open "Hypervisor Active Priorities Registers" group.quad SPR:0x34C80++0x00 line.long 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" if (CORENAME()=="CORTEXA53") group.quad SPR:0x34C90++0x00 line.long 0x00 "ICH_AP1R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" endif tree.end newline rgroup.quad SPR:0x34CB3++0x00 line.long 0x00 "ICH_EISR_EL2,Interrupt Controller End of Interrupt Status Register" bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt" rgroup.quad SPR:0x34CB5++0x00 line.long 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register" bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt" bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt" bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt" newline bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt" group.quad SPR:0x34CB0++0x00 line.long 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..." bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" if (((d.q(spr:(0x34CC0+0x0)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x0)++0x00 line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x0)++0x00 line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x1)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x1)++0x00 line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x1)++0x00 line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x2)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x2)++0x00 line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x2)++0x00 line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif if (((d.q(spr:(0x34CC0+0x3)))&0x2000000000000000)==0x00) group.quad spr:(0x34CC0+0x3)++0x00 line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" else group.quad spr:(0x34CC0+0x3)++0x00 line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3" bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware" bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1" newline hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt" hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts" hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" endif rgroup.quad SPR:0x34CB2++0x00 line.long 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register" bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted" bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted" bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted" newline bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted" bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted" bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted" newline bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted" bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted" group.quad SPR:0x34CB7++0x00 line.long 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register" hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface" bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" newline bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled" bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register" bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs" newline bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt" bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled" group.quad SPR:0x34C94++0x00 line.long 0x00 "ICH_VSEIR_EL2,Interrupt Controller Virtual System Error Interrupt Register" rgroup.quad SPR:0x34CB1++0x00 line.long 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register" bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported" bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported" newline bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported" bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "Debug Registers" rgroup.quad SPR:0x23010++0x00 line.long 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" group.quad SPR:0x20020++0x00 line.long 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable register" bitfld.long 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled" bitfld.long 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled" group.quad spr:0x23040++0x00 line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register" rgroup.quad SPR:0x23050++0x00 line.long 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register" wgroup.quad SPR:0x23050++0x00 line.long 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register" group.quad SPR:0x24070++0x00 line.long 0x00 "DBGVCR32_EL2,Vector Catch Register" bitfld.long 0x00 31. "NSF,FIQ vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 30. "NSI,IRQ vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 28. "NSD,Data Abort vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 27. "NSP,Prefetch Abort vector catch enable in Non-secure state" "Low,High" newline bitfld.long 0x00 26. "NSS,Supervisor Call (SVC) vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 25. "NSU,Undefined Instruction vector catch enable in Non-secure state" "Low,High" bitfld.long 0x00 7. "SF,FIQ vector catch enable in Secure state" "Low,High" bitfld.long 0x00 6. "SI,IRQ vector catch enable in Secure state" "Low,High" newline bitfld.long 0x00 4. "SD,Data Abort vector catch enable in Secure state" "Low,High" bitfld.long 0x00 3. "SP,Prefetch Abort vector catch enable in Secure state" "Low,High" bitfld.long 0x00 2. "SS,Supervisor Call (SVC) vector catch enable in Secure state" "Low,High" bitfld.long 0x00 1. "SU,Undefined Instruction vector catch enable in Secure state" "Low,High" group.quad SPR:0x20002++0x00 line.long 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register" group.quad SPR:0x20022++0x00 line.long 0x00 "MDSCR_EL1,Monitor Debug System Control Register" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. "RXO,Save/restore bit" "Low,High" bitfld.long 0x00 26. "TXU,Save/restore bit" "Low,High" newline bitfld.long 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3" bitfld.long 0x00 21. "TDA,Save/restore bit" "Low,High" bitfld.long 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled" bitfld.long 0x00 14. "HDE,Save/restore bit" "Low,High" newline bitfld.long 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled" bitfld.long 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled" bitfld.long 0x00 6. "ERR,Save/restore bit" "Low,High" bitfld.long 0x00 0. "SS,Software step control" "Disabled,Enabled" group.quad SPR:0x20032++0x00 line.long 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register" group.quad SPR:0x20062++0x00 line.long 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register" rgroup.quad spr:0x20100++0x00 line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register" hexmask.quad 0x00 12.--47. 0x1000 "ROMADDR,ROM base physical address" bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid" wgroup.quad SPR:0x20104++0x00 line.long 0x00 "OSLAR_EL1,OS Lock Access Register" bitfld.long 0x00 0. "OSLK,OS lock" "Unlock,Lock" rgroup.quad SPR:0x20114++0x00 line.long 0x00 "OSLSR_EL1,OS Lock Status Register" bitfld.long 0x00 2. "NTT,Not 32-bit access" "Low,High" bitfld.long 0x00 1. "OSLK,OS lock status" "Not locked,Locked" bitfld.long 0x00 0. 3. "OSLM,OS lock model implemented field" "Reserved,Reserved,Impelemented,?..." group.quad SPR:0x20134++0x00 line.long 0x00 "OSDLR_EL1,OS Double-lock Register" bitfld.long 0x00 0. "DLK,OS double-lock control" "Not locked,Locked" group.quad SPR:0x20144++0x00 line.long 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register" bitfld.long 0x00 0. "CORENPDRQ,Core no powerdown request" "No,Yes" group.quad SPR:0x20786++0x00 line.long 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set" bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set" bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set" newline bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set" bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set" group.quad SPR:0x20796++0x00 line.long 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear" bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.quad SPR:0x207E6++0x00 line.long 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register" bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled" bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled" newline bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled" bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented" bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled" group.quad SPR:0x33450++0x00 line.long 0x00 "DSPSR_EL0,Debug Saved Processor Status Register" group.quad spr:0x33451++0x00 line.quad 0x00 "DLR_EL0,Debug Link Register" tree.end tree "Breakpoint Registers" if (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0" line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x0)++0x0 line.long 0x00 "DBGBCR0_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1" line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x10)++0x0 line.long 0x00 "DBGBCR1_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2" line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x20)++0x0 line.long 0x00 "DBGBCR2_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3" line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x30)++0x0 line.long 0x00 "DBGBCR3_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4" line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x40)++0x0 line.long 0x00 "DBGBCR4_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000)) group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000)) else group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5" line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register" hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison" hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID" endif group.quad SPR:(0x20005+0x50)++0x0 line.long 0x00 "DBGBCR5_EL1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" tree.end tree "Watchpoint Control Registers" group.quad spr:(0x20006+0x0)++0x00 "Watchpoint 0" line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x0)++0x00 line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x10)++0x00 "Watchpoint 1" line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x10)++0x00 line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x20)++0x00 "Watchpoint 2" line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x20)++0x00 line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" group.quad spr:(0x20006+0x30)++0x00 "Watchpoint 3" line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)" hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address" group.quad spr:(0x20007+0x30)++0x00 line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register" bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled" hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select" newline bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both" bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled" tree.end tree.end tree.open "AArch32" tree "ID Registers" rgroup.long c15:0x0000++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code" bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. "ARCH, Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8" newline hexmask.long.word 0x0 4.--15. 0x10 "PART,Primary Part Number" bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (CORENAME()=="CORTEXA57") rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." elif (CORENAME()=="CORTEXA53") rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." endif if corename()=="CORTEXA57" rgroup.long c15:0x0300++0x0 line.long 0x0 "TLBTR,TLB Type Register" endif if corename()=="CORTEXA57" rgroup.long c15:0x0500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." newline bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,Implemented" hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" newline bitfld.long 0x00 0.--1. "CPUID,Indicates the core number in the device" "1,2,3,4" elif corename()=="CORTEXA53" rgroup.long c15:0x0500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..." newline bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,?..." hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field" newline hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field" endif rgroup.long c15:0x0600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..." newline bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." newline bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..." bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup.long c15:0x0620++0x00 line.long 0x00 "ID_MMFR4,ID_MMFR4" bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented, implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..." newline bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..." rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..." bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..." bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..." bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..." newline bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0520++0x00 line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5" bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..." newline bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..." bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..." newline bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." if corename()=="CORTEXA57" rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." elif corename()=="CORTEXA53" rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif group.long c15:0x0310++0x00 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" if corename()=="CORTEXA57" rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" newline bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" newline bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" newline bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" newline bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" newline bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" rgroup.long c15:0x7C9++0x0 line.long 0x00 "PMCEID1,Common Event Identification Register 1" elif corename()=="CORTEXA53" rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented" bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented" newline bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented" bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented" bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented" bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented" newline bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass unaligned load or store" "Not implemented,Implemented" newline bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" newline bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented" newline bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" newline bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented" newline bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented" rgroup.long c15:0x7C9++0x0 line.long 0x00 "PMCEID1,Common Event Identification Register 1" bitfld.long 0x00 0. "EVENT32,L2D Cache Allocate" "Not implemented,Implemented" endif group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register" tree.end tree "System Control and Configuration" if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" else group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" endif group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register" bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced" bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes" newline bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes" bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled" newline bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes" bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes" newline bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled" bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled" newline bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes" bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes" newline bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes" bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes" newline bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes" bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes" newline bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled" bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes" newline bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced" bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes" newline bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced" bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes" newline bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes" bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes" newline bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled" bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced" newline bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled" bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" newline bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled" newline bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced" bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced" newline bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes" bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes" newline bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes" bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes" newline bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes" bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled" newline bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced" bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced" newline bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled" bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled" newline bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled" bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced" newline bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes" bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled" newline bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled" bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled" newline bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes" bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes" newline bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes" bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled" group.quad c15:0x110F0++0x01 line.quad 0x00 "CPUECTLR,CPU Extended Control Register" bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes" bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" newline bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" newline bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address" group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" elif corename()=="CORTEXA53" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register" bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes" bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" newline bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled" bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled" newline bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes" bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes" newline bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes" bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes" newline bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams" bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled" newline bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled" bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,7" newline bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes" group.quad c15:0x110F0++0x01 line.quad 0x00 "CPUECTLR,CPU Extended Control Register" bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled" bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" newline bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.quad c15:0x120F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7" newline hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address" group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" endif if corename()=="CORTEXA57" group.long c15:0x0201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 28. "TRCDIS,Disable CP14 access to trace registers" "No,Yes" newline bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full" bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full" elif corename()=="CORTEXA53" group.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 only,Reserved,Full" newline bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 only,Reserved,Full" endif group.long c15:0x0011++0x0 line.long 0x00 "SCR,Secure Configuration Register" bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped" bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped" newline bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes" newline bitfld.long 0x00 7. "SCD,Secure Monitor Call disable" "No,Yes" bitfld.long 0x00 5. "AW,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" newline bitfld.long 0x00 4. "FW,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" newline bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" newline bitfld.long 0x00 0. "NS,Secure mode " "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. "SUNIDEN,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. "SUIDEN,Invasive Secure User Debug Enable bit" "Denied,Permitted" group.long c15:0x0131++0x00 line.long 0x00 "SDCR,Secure Debug Control Register" bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes" bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes" newline bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. "SPD,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled" group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 15. "NSASEDIS,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 11. "CP11,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" newline bitfld.long 0x00 10. "CP10,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" if corename()=="CORTEXA57" group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address" elif corename()=="CORTEXA53" group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" endif rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" newline bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" group.long c15:0x020C++0x00 line.long 0x00 "RMR,Reset Management Register" bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested" bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64" group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" group.long c15:0x0115++0x00 line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register" if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable" bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable" newline bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Async. external,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Async. parity/on memory access,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable" bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable" newline bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/1st level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/1st level,Permission/1nd level,Sync. external/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..." endif elif corename()=="CORTEXA53" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX/STREX,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write" bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/section,Instruction cache maintenance,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/1st level,Permission/section,Sync. external/2nd level,Permission/2nd level,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..." endif endif if corename()=="CORTEXA57" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif elif corename()=="CORTEXA53" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled" newline bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..." endif endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" if corename()=="CORTEXA57" rgroup.long c15:0x103F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]" hexmask.long.word 0x00 0.--11. 1. "PERIPHBASE[42:32],Periphbase[42:32]" elif corename()=="CORTEXA53" rgroup.long c15:0x103F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]" hexmask.long.byte 0x00 0.--7. 1. "PERIPHBASE[39:32],Periphbase[39:32]" endif group.long c15:0x000D++0x00 line.long 0x00 "FCSEIDR,FCSE Process ID register" group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,PL1 Software Thread ID Register" tree.end tree "Memory Management Unit" if corename()=="CORTEXA57" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" if (((per.l(c15:0x0202))&0x80000000)==0x00000000) // MPIDR[31]==1 case is missing here for TTBR0 and TTBR1 group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Registers" hexmask.long 0x00 6.--31. 0x40 "TTB1,Translation table base address" bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner" newline bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. "IMP,Implementation" "Low,High" newline bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable" bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Registers" hexmask.long 0x00 6.--31. 0x40 "TTBA,Translation table base address" bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner" newline bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. "IMP,Implementation" "Low,High" newline bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable" bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable" else group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Registers" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Registers" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" endif if (((per.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes" newline bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes" bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7" else group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable" newline bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" newline bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes" bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected" newline bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" endif elif corename()=="CORTEXA53" group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32" bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled" newline bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced" newline bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes" bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes" newline bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" newline bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes" newline bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled" bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" newline bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3" newline bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes" bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected" newline bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" newline bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" else group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long 0x00 7.--31. 0x80 "TTB0,Translation table base 0 address" bitfld.long 0x00 6. 0. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long 0x00 7.--31. 0x80 "TTB1,Translation table base 1 address" bitfld.long 0x00 0. 6. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" newline bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes" newline bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes" bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7" endif endif if corename()=="CORTEXA57" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" elif corename()=="CORTEXA53" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" endif group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hypervisor Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager" newline bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager" if (((per.l(c15:0x202))&0x80000000)==0x80000000) group.quad c15:0x10070++0x01 line.quad 0x00 "PAR,Physical Address Register" else group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" endif tree.open "Memory Attribute Indirection Registers" group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. "NOS7,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. "NOS6,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 29. "NOS5,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 28. "NOS4,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 27. "NOS3,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. "NOS2,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 25. "NOS1,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. "NOS0,Outer Shareable property mapping for memory attributes" "Outer,Inner" newline bitfld.long 0x00 19. "NS1,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" bitfld.long 0x00 18. "NS0,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" newline bitfld.long 0x00 17. "DS1,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. "DS0,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" newline bitfld.long 0x00 14.--15. "TR7,{TEX[0] C B} = b111 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 12.--13. "TR6,{TEX[0] C B} = b110 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 10.--11. "TR5,{TEX[0] C B} = b101 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 8.--9. "TR4,{TEX[0] C B} = b100 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 6.--7. "TR3,{TEX[0] C B} = b011 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 4.--5. "TR2,{TEX[0] C B} = b010 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." newline bitfld.long 0x00 2.--3. "TR1,{TEX[0] C B} = b001 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." bitfld.long 0x00 0.--1. "TR0,{TEX[0] C B} = b000 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..." group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. "OR7,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 28.--29. "OR6,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 26.--27. "OR5,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 24.--25. "OR4,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 22.--23. "OR3,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 20.--21. "OR2,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 18.--19. "OR1,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 16.--17. "OR0,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 14.--15. "IR7,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 12.--13. "IR6,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 10.--11. "IR5,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 8.--9. "IR4,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 6.--7. "IR3,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 4.--5. "IR2,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline bitfld.long 0x00 2.--3. "IR1,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 0.--1. "IR0,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate" newline endif tree.end newline if (((per.l(c15:0x202))&0x80000000)==0x00000000) group.long c15:0x10d++0x00 line.long 0x00 "CONTEXTIDR,Context ID Register" else group.long c15:0x10d++0x00 line.long 0x00 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. "PROCID,Process identifier" hexmask.long.byte 0x00 0.--7. 1. "ASID,Address space identifier" endif tree.end tree "Virtualization Extensions" group.long c15:0x4000++0x0 line.long 0x00 "VPIDR,Virtualization Processor ID Register" group.long c15:0x4500++0x00 line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register" group.long c15:0x4001++0x0 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big" newline bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled" bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced" newline bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes" newline bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes" bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled" newline bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled" newline bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled" group.long c15:0x4101++0x00 line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register" bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled" bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled" bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled" newline bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled" if corename()=="CORTEXA57" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hypervisor Configuration Register" bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled" newline bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled" newline bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" newline bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" newline bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled" bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" newline bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" newline bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" newline bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" newline bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3" newline bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "Not aborted,Aborted" newline bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed" bitfld.long 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed" newline bitfld.long 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed" bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" newline bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override" bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled" elif corename()=="CORTEXA53" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hypervisor Configuration Register" bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled" bitfld.long 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes" newline bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled" newline bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled" bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" newline bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" newline bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled" newline bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled" bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" newline bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" newline bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3" bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" newline bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "No aborted,Aborted" bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. "AMO,A-bit Mask Override" "No override,Override" newline bitfld.long 0x00 4. "IMO,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. "FMO,F-bit Mask Override" "No override,Override" newline bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override" newline bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled" endif group.long c15:0x4411++0x00 line.long 0x00 "HCR2,Hypervisor Configuration Register 2" bitfld.long 0x00 1. "ID,Stage 2 Instruction cache disable" "No,Yes" bitfld.long 0x00 0. "CD,Stage 2 Data cache disable" "No,Yes" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hypervisor Debug Control Register" bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid" newline bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid" bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid" newline bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid" newline bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register" bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 20. "TTA,Trap Trace Access" "Not trapped,?..." newline bitfld.long 0x0 15. "TASE,Trap Advanced SIMD extensions" "Not trapped,Trapped" bitfld.long 0x0 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped" newline bitfld.long 0x0 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hypervisor System Trap Register" bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Disabled,Enabled" bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "Reserved,?..." newline hexmask.long.word 0x00 5.--13. 1. "T4_15,Trap to Hypervisor mode Non-secure priv 5 - 13" bitfld.long 0x00 0.--3. "T0_13,Trap to Hypervisor mode Non-secure priv 0 - 3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4711++0x00 line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register" if corename()=="CORTEXA57" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address" elif corename()=="CORTEXA53" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register" endif group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hypervisor Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3" bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3" newline bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3" bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3" newline bitfld.long 0x00 4. "S,Sign-extension of the T0SZ field" "Low,High" bitfld.long 0x00 0.--3. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register" group.long c15:0x4115++0x00 line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Syndrome Register" group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to c15,Trapped MCRR/MRRC to c15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,Reserved,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..." bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit" newline hexmask.long 0x00 0.--24. 1. "ISS,Instruction specific syndrome" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. "FIPA[39:12],Bits [39:12] of the faulting intermediate physical address" tree.open "Hypervisor Memory Attribute Indirection Registers" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient" group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" tree.end newline group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "HVBADDR,Hypervisor Vector Base Address" tree.end tree "Cache Control and Configuration" rgroup.long c15:0x0100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,PIPT" newline bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." if corename()=="CORTEXA57" rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..." newline bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..." bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..." newline bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." elif corename()=="CORTEXA53" rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..." newline bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..." newline bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..." endif rgroup.long c15:0x1700++0x0 line.long 0x00 "AIDR,Auxiliary ID Register" rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported" newline bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported" bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported" newline hexmask.long.word 0x00 13.--27. 1. "SETS,Number of Sets" hexmask.long.word 0x00 3.--12. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Line Size" "16 bytes,32 bytes,64 bytes,128 bytes,?..." group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction" tree "Level 1 memory system" if corename()=="CORTEXA57" group.long c15:0x001F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" group.long c15:0x011F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" group.long c15:0x021F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" group.long c15:0x031F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" group.long c15:0x000F++0x00 line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register" group.long c15:0x010F++0x00 line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register" group.long c15:0x020F++0x00 line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register" group.long c15:0x030F++0x00 line.long 0x00 "IL1DATA3,Instruction L1 Data 3 Register" wgroup.long c15:0x04F++0x00 line.long 0x00 "RAMINDEX,RAM Index Operation Register" elif corename()=="CORTEXA53" rgroup.long c15:0x300F++0x00 line.long 0x00 "CDBGDR0,Cache Debug Data Register 0" rgroup.long c15:0x310F++0x00 line.long 0x00 "CDBGDR1,Cache Debug Data Register 1" rgroup.long c15:0x320F++0x00 line.long 0x00 "CDBGDR2,Cache Debug Data Register 2" rgroup.long c15:0x330F++0x00 line.long 0x00 "CDBGDR3,Cache Debug Data Register 3" wgroup.long c15:0x302F++0x00 line.long 0x00 "CDBGDCT,Cache Debug Data Cache Tag Read Operation Register" wgroup.long c15:0x312F++0x00 line.long 0x00 "CDBGICT,Cache Debug Instruction Cache Tag Read Operation Register" wgroup.long c15:0x304F++0x00 line.long 0x00 "CDBGDCD,Cache Debug Cache Debug Data Cache Data Read Operation Register" wgroup.long c15:0x314F++0x00 line.long 0x00 "CDBGICD,Cache Debug Instruction Cache Data Read Operation Register" wgroup.long c15:0x324F++0x00 line.long 0x00 "CDBGTD,Cache Debug TLB Data Read Operation Register" endif tree.end tree "Level 2 memory system" if corename()=="CORTEXA57" group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes" bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4" newline rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Not supported,Supported" bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" newline bitfld.long 0x00 20. "DIECCE,Data in-line ECC enable" "Disabled,Enabled" rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not present,Present" newline rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not present,Present" rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not present,1,2,Present" newline bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" newline rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "0 cycle,1 cycle" bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" newline bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled" bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled" newline bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced" bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled" newline bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes" bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes" newline bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled" bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit" newline bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes" bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled" newline bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes" bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes" newline bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes" bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes" newline bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes" newline bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled" bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" newline bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited" bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled" newline bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes" group.quad c15:0x130F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index" elif corename()=="CORTEXA53" group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4" bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled" newline rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled" rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle" newline rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles" group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error" newline bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 30.--31. "L2VC,L2 victim Control" "0,1,2,3" bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled" newline bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes" group.quad c15:0x110F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count" newline hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count" bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid" newline hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier" bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." newline hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address" endif tree.end tree.end tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code" hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code" rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset" newline bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled" newline group.long c15:0x1c9++0x00 line.long 0x00 "PMNCNTENSET,Count Enable Set Register " bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled" bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled" bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled" bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled" bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled" bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled" bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled" bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled" bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled" bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled" bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled" bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled" bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled" bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled" bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled" bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled" bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled" bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled" bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled" bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled" bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled" bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Event Counter 29 clear bit " "Disabled,Enabled" eventfld.long 0x00 28. "P28,Event Counter 28 clear bit " "Disabled,Enabled" eventfld.long 0x00 27. "P27,Event Counter 27 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 26. "P26,Event Counter 26 clear bit " "Disabled,Enabled" eventfld.long 0x00 25. "P25,Event Counter 25 clear bit " "Disabled,Enabled" eventfld.long 0x00 24. "P24,Event Counter 24 clear bit " "Disabled,Enabled" eventfld.long 0x00 23. "P23,Event Counter 23 clear bit " "Disabled,Enabled" eventfld.long 0x00 22. "P22,Event Counter 22 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 21. "P21,Event Counter 21 clear bit " "Disabled,Enabled" eventfld.long 0x00 20. "P20,Event Counter 20 clear bit " "Disabled,Enabled" eventfld.long 0x00 19. "P19,Event Counter 19 clear bit " "Disabled,Enabled" eventfld.long 0x00 18. "P18,Event Counter 18 clear bit " "Disabled,Enabled" eventfld.long 0x00 17. "P17,Event Counter 17 clear bit " "Disabled,Enabled" newline eventfld.long 0x00 16. "P16,Event Counter 16 clear bit " "Disabled,Enabled" eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled" eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled" newline eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" eventfld.long 0x00 30. "P30,PMN30 overflow" "No overflow,Overflow" eventfld.long 0x00 29. "P29,PMN29 overflow" "No overflow,Overflow" eventfld.long 0x00 28. "P28,PMN28 overflow" "No overflow,Overflow" eventfld.long 0x00 27. "P27,PMN27 overflow" "No overflow,Overflow" newline eventfld.long 0x00 26. "P26,PMN26 overflow" "No overflow,Overflow" eventfld.long 0x00 25. "P25,PMN25 overflow" "No overflow,Overflow" eventfld.long 0x00 24. "P24,PMN24 overflow" "No overflow,Overflow" eventfld.long 0x00 23. "P23,PMN23 overflow" "No overflow,Overflow" eventfld.long 0x00 22. "P22,PMN22 overflow" "No overflow,Overflow" newline eventfld.long 0x00 21. "P21,PMN21 overflow" "No overflow,Overflow" eventfld.long 0x00 20. "P20,PMN20 overflow" "No overflow,Overflow" eventfld.long 0x00 19. "P19,PMN19 overflow" "No overflow,Overflow" eventfld.long 0x00 18. "P18,PMN18 overflow" "No overflow,Overflow" eventfld.long 0x00 17. "P17,PMN17 overflow" "No overflow,Overflow" newline eventfld.long 0x00 16. "P16,PMN16 overflow" "No overflow,Overflow" eventfld.long 0x00 15. "P15,PMN15 overflow" "No overflow,Overflow" eventfld.long 0x00 14. "P14,PMN14 overflow" "No overflow,Overflow" eventfld.long 0x00 13. "P13,PMN13 overflow" "No overflow,Overflow" eventfld.long 0x00 12. "P12,PMN12 overflow" "No overflow,Overflow" newline eventfld.long 0x00 11. "P11,PMN11 overflow" "No overflow,Overflow" eventfld.long 0x00 10. "P10,PMN10 overflow" "No overflow,Overflow" eventfld.long 0x00 9. "P9,PMN9 overflow" "No overflow,Overflow" eventfld.long 0x00 8. "P8,PMN8 overflow" "No overflow,Overflow" eventfld.long 0x00 7. "P7,PMN7 overflow" "No overflow,Overflow" newline eventfld.long 0x00 6. "P6,PMN6 overflow" "No overflow,Overflow" eventfld.long 0x00 5. "P5,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. "P4,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow" eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow" newline eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment" bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment" bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment" bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment" bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment" newline bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment" bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment" bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment" bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment" bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment" newline bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment" bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment" bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment" bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment" bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment" newline bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment" bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment" bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment" bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment" bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment" newline bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment" bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment" bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment" bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment" bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment" newline bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment" bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment" newline bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" group.long c15:0x1d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" group.long c15:0x2d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled" bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled" eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled" newline eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x3e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" group.long c15:0x8E++0x00 line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0" group.long c15:(0x8E+0x40)++0x00 line.long 0x00 "PMEVTYPER0,Performance Monitors Selected Event Type Register 0" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x18E++0x00 line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1" group.long c15:(0x18E+0x40)++0x00 line.long 0x00 "PMEVTYPER1,Performance Monitors Selected Event Type Register 1" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x28E++0x00 line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2" group.long c15:(0x28E+0x40)++0x00 line.long 0x00 "PMEVTYPER2,Performance Monitors Selected Event Type Register 2" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x38E++0x00 line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3" group.long c15:(0x38E+0x40)++0x00 line.long 0x00 "PMEVTYPER3,Performance Monitors Selected Event Type Register 3" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x48E++0x00 line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4" group.long c15:(0x48E+0x40)++0x00 line.long 0x00 "PMEVTYPER4,Performance Monitors Selected Event Type Register 4" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x58E++0x00 line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5" group.long c15:(0x58E+0x40)++0x00 line.long 0x00 "PMEVTYPER5,Performance Monitors Selected Event Type Register 5" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count" group.long c15:0x07FE++0x00 line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" rgroup.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" newline bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Compare Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. "EVNTI,Select trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" newline bitfld.long 0x00 1. "EL1VCTEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" tree.end tree "Generic Interrupt Controller CPU Interface" tree "AArch32 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.long c15:0x048C++0x00 line.long 0x00 "ICC_AP0R0,Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x009C++0x00 line.long 0x00 "ICC_AP1R0,Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline wgroup.quad c15:0x110C0++0x01 line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "SGIID,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" group.long c15:0x038C++0x00 line.long 0x00 "ICC_BPR0,Binary Point Register 0" bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7" group.long c15:0x03CC++0x00 line.long 0x00 "ICC_BPR1,Binary Point Register 1" bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7" group.long c15:0x04CC++0x00 line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1" rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.long 0x00 14. "SEIS,SEI Support" "Not supported,Supported" rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1" newline bitfld.long 0x00 0. "CBPR,Common Binary Point Register" "0,1" group.long c15:0x64CC++0x00 line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3" rbitfld.long 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported" rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported" rbitfld.long 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported" newline rbitfld.long 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." rbitfld.long 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Non-secure EL1 and EL2)" "Enabled,Disabled" bitfld.long 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Secure EL1)" "Enabled,Disabled" bitfld.long 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt register also deactivates the interrupt(EL3)" "Enabled,Disabled" newline bitfld.long 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same register" bitfld.long 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same register" if (((per.l(c15:0x4CC))&0x3800)==0x00) wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.long c15:0x018C++0x00 line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.long c15:0x01CC++0x00 line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.long c15:0x028C++0x00 line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" rgroup.long c15:0x02CC++0x00 line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" elif (((per.l(c15:0x4CC))&0x3800)==0x800) wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated" wgroup.long c15:0x018C++0x00 line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access" wgroup.long c15:0x01CC++0x00 line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access" rgroup.long c15:0x028C++0x00 line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" rgroup.long c15:0x02CC++0x00 line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level" endif hgroup.long c15:0x008C++0x00 hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0" in hgroup.long c15:0x00CC++0x00 hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1" in group.long c15:0x06CC++0x00 line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0" bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.long c15:0x07CC++0x00 line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1" bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled" group.long c15:0x0064++0x00 line.long 0x00 "ICC_PMR,Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface" rgroup.long c15:0x03BC++0x00 line.long 0x00 "ICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" wgroup.quad c15:0x120C0++0x01 line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" wgroup.quad c15:0x100C0++0x01 line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List" group.long c15:0x05CC++0x00 line.long 0x00 "ICC_SRE,System Register Enable Register for EL1" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" if corename()=="CORTEXA53" group.long c15:0x459C++0x00 line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" endif group.long c15:0x65CC++0x00 line.long 0x00 "ICC_MSRE,System Register Enable Register for EL3" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes" newline bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled" group.long c15:0x67CC++0x00 line.long 0x00 "ICC_MGRPEN1,Monitor Group1 Interrupt Group Enable" bitfld.long 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled" tree.end tree "AArch32 Virtual Interface Control System Registers" tree.open "Hypervisor Active Priorities Registers" group.long c15:0x408C++0x00 line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x409C++0x00 line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" newline bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" newline bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" newline bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" newline bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" newline bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" newline bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" newline bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" newline bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline rgroup.long c15:0x43BC++0x00 line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register" bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt" newline bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt" rgroup.long c15:0x45BC++0x00 line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register" bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt" bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt" bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt" newline bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt" group.long c15:0x40BC++0x00 line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped" newline bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" group.long c15:(0x40CC+0x0)++0x00 line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x100)++0x00 line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x200)++0x00 line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x300)++0x00 line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3" hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt" group.long c15:(0x40EC+0x0)++0x00 line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x100)++0x00 line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x200)++0x00 line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" group.long c15:(0x40EC+0x300)++0x00 line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3" bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt" bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0" newline hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" rgroup.long c15:0x42BC++0x00 line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register" bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted" bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted" bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted" newline bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted" bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted" bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted" newline bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted" bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted" group.long c15:0x459C++0x00 line.long 0x00 "ICH_SRE,Hypervisor System Register" group.long c15:0x47BC++0x00 line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register" hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface" bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]" bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]" newline bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled" bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register" bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs" newline bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt" bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled" group.long c15:0x449C++0x00 line.long 0x00 "ICH_VSEIR,Virtual System Error Interrupt Register" rgroup.long c15:0x41BC++0x00 line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register" bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..." newline bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported" bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported" bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported" newline bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported" bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree.end tree "Debug Registers" tree "Coresight Management Registers" if corename()=="CORTEXA57" rgroup.long c14:0x0000++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version" bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported" bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented" elif corename()=="CORTEXA53" rgroup.long c14:0x0000++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version" bitfld.long 0x0 15. "DEVID,Debug Device ID" "Low,High" bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported" newline bitfld.long 0x0 13. "PCSR,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented" hexmask.long.byte 0x0 4.--7. 1. "VARIANT,Implementation-defined Variant Number" newline hexmask.long.byte 0x0 0.--3. 1. "REVISION,Implementation-defined Revision Number" endif rgroup.long c14:0x0060++0x0 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" group.long c14:0x0070++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. "FIQVCE_NS,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. "IRQVCE_NS,IRG vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. "DAVCE_NS,Data Abort vector catch in Non-secure state" "Disabled,Enabled" newline bitfld.long 0x00 27. "PAVCE_NS,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. "SVCVCE_NS,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. "UIVCE_NS,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" newline bitfld.long 0x00 15. "FIQVCE_SM,FIQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. "IRQVCE_SM,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 12. "DAVCE_SM,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" newline bitfld.long 0x00 11. "PAVCE_SM,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. "SMCVCE_S,SMC vector catch enable in Secure state" "Disabled,Enabled" bitfld.long 0x00 7. "FIQVCE_S,FIQ vector catch in Secure state" "Disabled,Enabled" newline bitfld.long 0x00 6. "IRQVCE_S,IRG vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. "DAVCE_S,Data Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 3. "PAVCE_S,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" newline bitfld.long 0x00 2. "SVCVCE_S,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. "UIVCE_S,Undefined instruction vector catch in Secure state" "Disabled,Enabled" group.long c14:0x0020++0x00 line.long 0x00 "DBGDCCINT,DCC Interrupt Enable Register" bitfld.long 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled" bitfld.long 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled" group.long c14:0x0200++0x0 line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)" group.long c14:0x0220++0x0 line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled" newline bitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled" bitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled" bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" newline bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" newline bitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled" bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" bitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled" newline bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." rgroup.long c14:0x0010++0x0 line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" newline bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" newline bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..." wgroup.long c14:0x0230++0x0 line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)" group.long c14:0x0050++0x0 line.long 0x00 "DBGDTRTXINT,Debug Transmit/Receive Register (Internal View)" group.long c14:0x0687++0x0 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set" newline bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set" newline bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set" group.long c14:0x0697++0x0 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" newline bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.long c14:0x06E7++0x0 line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. "SNDFI,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. "SNDE,Secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 5. "SIDFI,Secure invasive debug features implementation" "No effect,Implemented" newline bitfld.long 0x00 4. "SIDE,Secure invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 3. "NSNDFI,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. "NSNDE,Non-secure non-invasive debug enable" "0,1" newline bitfld.long 0x00 1. "NSIDFI,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. "NSIDE,Non-secure invasive debug enable" "0,1" rgroup.long c14:0x0707++0x0 line.long 0x0 "DBGDEVID2,Debug Device ID Register 2" rgroup.long c14:0x0717++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. "PCSROFFSET,This field defines the offset applied to DBGPCSR samples" "0,1,No offset,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:0x0727++0x00 line.long 0x00 "DBGDEVID,Debug Device ID Register 0" bitfld.long 0x00 28.--31. "CIDMASK,Specifies the level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..." bitfld.long 0x00 24.--27. "AUXREGS,Specifies support for the Debug External Auxiliary Control Register" "Not implemented,?..." bitfld.long 0x00 20.--23. "DOUBLELOCK,Specifies support for the Debug OS Double Lock Register" "Reserved,Implemented,?..." newline bitfld.long 0x00 16.--19. "VIREXTNS,Specifies whether EL2 is implemented" "Reserved,Implemented,?..." bitfld.long 0x00 12.--15. "VECTORCATCH,Defines the form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x00 8.--11. "BPADDRMASK,Indicates the level of support for the Immediate Virtual Address(IVA) matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented" newline bitfld.long 0x00 4.--7. "WPADDRMASK,Indicates the level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." bitfld.long 0x00 0.--3. "PCSAMPLE,Indicates the level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." tree.end newline rgroup.quad c14:0x10010++0x1 line.quad 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.quad.word 0x0 32.--47. 0x1 "ROMADDR,ROM physical address" hexmask.quad.tbyte 0x0 12.--31. 0x10 "ROMADDR,ROM physical address" bitfld.quad 0x0 1. "VALID1,ROM table address valid" "Not valid,Valid" newline bitfld.quad 0x0 0. "VALID0,ROM table address valid" "Not valid,Valid" rgroup.quad c14:0x10020++0x1 line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" wgroup.long c14:0x0401++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:0x0411++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 2. "NTT,32-Bit Access" "Not required,Required" bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..." if (((per.l(c14:0x0411))&0x2)==0x2) group.long c14:0x0260++0x00 line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" else hgroup.long c14:0x0260++0x00 hide.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" endif group.long c14:0x0431++0x00 line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register" bitfld.long 0x00 0. "DLK,OS Double Lock control bit" "Not locked,Locked" group.long c14:0x0441++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Low,High" tree.end tree "Breakpoint Registers" if (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" hide.long 0x00 "DBGBVR0,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0" line.long 0x00 "DBGBVR0,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x0)++0x0 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" hide.long 0x00 "DBGBVR1,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1" line.long 0x00 "DBGBVR1,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x10)++0x0 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" hide.long 0x00 "DBGBVR2,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2" line.long 0x00 "DBGBVR2,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x20)++0x0 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" hide.long 0x00 "DBGBVR3,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3" line.long 0x00 "DBGBVR3,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x30)++0x0 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" hide.long 0x00 "DBGBVR4,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4" line.long 0x00 "DBGBVR4,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x40)++0x0 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" if (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000)) group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register (Instruction address)" hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison" elif (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000)) hgroup.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" hide.long 0x00 "DBGBVR5,Breakpoint Value Register (VMID)" else group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5" line.long 0x00 "DBGBVR5,Breakpoint Value Register (Context ID)" endif group.long c14:(0x0500+0x50)++0x0 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched" newline bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode" bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled" group.long c14:0x0141++0x0 line.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register 4" hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value" group.long c14:0x0151++0x0 line.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register 5" hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value" tree.end tree "Watchpoint Control Registers" group.long c14:(0x0600+0x0)++0x00 "Breakpoint 0" line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x0)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x10)++0x00 "Breakpoint 1" line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x10)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x20)++0x00 "Breakpoint 2" line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x20)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" group.long c14:(0x0600+0x30)++0x00 "Breakpoint 3" line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "DA,Data address" group.long c14:(0x0700+0x30)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match" bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" newline bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled" hexmask.long.byte 0x0 5.--12. "BAS,Byte address select" newline bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled" tree.end tree.end AUTOINDENT.OFF AUTOINDENT.POP tree.open "Interrupt Controller (GIC-400)" width 17. width 17. base ad:0x50041000 tree "Distributor Interface" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0x50041000) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" if PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0080) group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)" else group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0084)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else rgroup.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0088)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else rgroup.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x008C)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else rgroup.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0090)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else rgroup.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0094)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else rgroup.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x0098)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else rgroup.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x009C)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else rgroup.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00A0)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else rgroup.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00A4)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else rgroup.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00A8)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else rgroup.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00AC)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else rgroup.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00B0)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else rgroup.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00B4)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else rgroup.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00B8)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else rgroup.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00BC)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else rgroup.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00C0)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else rgroup.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00C4)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else rgroup.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00C8)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else rgroup.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00CC)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else rgroup.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00D0)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else rgroup.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00D4)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else rgroup.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00D8)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else rgroup.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00DC)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else rgroup.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00E0)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else rgroup.long 0x0E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00E4)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else rgroup.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00E8)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else rgroup.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00EC)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else rgroup.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00F0)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else rgroup.long 0x0F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00F4)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else rgroup.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00F8)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else rgroup.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0x50041000+0x00FC)) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else rgroup.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else rgroup.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else rgroup.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else rgroup.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else rgroup.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else rgroup.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else rgroup.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else rgroup.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else rgroup.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else rgroup.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else rgroup.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else rgroup.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else rgroup.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else rgroup.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else rgroup.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else rgroup.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else rgroup.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else rgroup.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else rgroup.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else rgroup.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else rgroup.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else rgroup.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else rgroup.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else rgroup.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else rgroup.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else rgroup.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else rgroup.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else rgroup.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else rgroup.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else rgroup.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else rgroup.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else rgroup.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending" else rgroup.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending" else rgroup.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending" else rgroup.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending" else rgroup.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending" else rgroup.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending" else rgroup.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending" else rgroup.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending" else rgroup.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending" else rgroup.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending" else rgroup.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending" else rgroup.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending" else rgroup.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending" else rgroup.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending" else rgroup.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending" else rgroup.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending" else rgroup.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending" else rgroup.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending" else rgroup.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending" else rgroup.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending" else rgroup.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending" else rgroup.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending" else rgroup.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending" else rgroup.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending" else rgroup.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending" else rgroup.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending" else rgroup.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending" else rgroup.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending" else rgroup.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending" else rgroup.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending" else rgroup.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending" else rgroup.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" if (((per.l(ad:0x50041000+0x08))&0xFF000000)==(0x0000000||0x1000000)) rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif else group.long 0x0300++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif rgroup.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x037C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else rgroup.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" rgroup.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" rgroup.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" rgroup.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" rgroup.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" rgroup.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" rgroup.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" rgroup.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else rgroup.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" rgroup.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" rgroup.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" rgroup.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" rgroup.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" rgroup.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" rgroup.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" rgroup.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else rgroup.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" rgroup.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" rgroup.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" rgroup.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" rgroup.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" rgroup.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" rgroup.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" rgroup.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else rgroup.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" rgroup.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" rgroup.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" rgroup.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" rgroup.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" rgroup.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" rgroup.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" rgroup.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else rgroup.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" rgroup.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" rgroup.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" rgroup.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" rgroup.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" rgroup.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" rgroup.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" rgroup.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else rgroup.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" rgroup.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" rgroup.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" rgroup.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" rgroup.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" rgroup.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" rgroup.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" rgroup.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else rgroup.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" rgroup.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" rgroup.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" rgroup.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" rgroup.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" rgroup.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" rgroup.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" rgroup.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else rgroup.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" rgroup.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" rgroup.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" rgroup.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" rgroup.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" rgroup.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" rgroup.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" rgroup.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else rgroup.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" rgroup.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" rgroup.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" rgroup.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" rgroup.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" rgroup.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" rgroup.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" rgroup.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else rgroup.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" rgroup.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" rgroup.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" rgroup.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" rgroup.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" rgroup.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" rgroup.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" rgroup.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else rgroup.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" rgroup.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" rgroup.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" rgroup.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" rgroup.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" rgroup.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" rgroup.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" rgroup.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else rgroup.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" rgroup.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" rgroup.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" rgroup.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" rgroup.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" rgroup.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" rgroup.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" rgroup.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else rgroup.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" rgroup.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" rgroup.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" rgroup.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" rgroup.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" rgroup.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" rgroup.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" rgroup.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else rgroup.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" rgroup.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" rgroup.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" rgroup.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" rgroup.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" rgroup.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" rgroup.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" rgroup.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else rgroup.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" rgroup.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" rgroup.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" rgroup.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" rgroup.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" rgroup.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" rgroup.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" rgroup.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else rgroup.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" rgroup.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" rgroup.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" rgroup.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" rgroup.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" rgroup.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" rgroup.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" rgroup.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else rgroup.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" rgroup.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" rgroup.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" rgroup.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" rgroup.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" rgroup.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" rgroup.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" rgroup.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else rgroup.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" rgroup.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" rgroup.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" rgroup.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" rgroup.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" rgroup.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" rgroup.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" rgroup.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else rgroup.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" rgroup.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" rgroup.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" rgroup.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" rgroup.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" rgroup.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" rgroup.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" rgroup.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else rgroup.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" rgroup.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" rgroup.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" rgroup.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" rgroup.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" rgroup.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" rgroup.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" rgroup.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else rgroup.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" rgroup.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" rgroup.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" rgroup.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" rgroup.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" rgroup.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" rgroup.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" rgroup.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else rgroup.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" rgroup.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" rgroup.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" rgroup.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" rgroup.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" rgroup.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" rgroup.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" rgroup.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else rgroup.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" rgroup.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" rgroup.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" rgroup.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" rgroup.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" rgroup.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" rgroup.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" rgroup.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else rgroup.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" rgroup.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" rgroup.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" rgroup.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" rgroup.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" rgroup.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" rgroup.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" rgroup.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else rgroup.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" rgroup.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" rgroup.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" rgroup.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" rgroup.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" rgroup.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" rgroup.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" rgroup.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else rgroup.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" rgroup.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" rgroup.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" rgroup.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" rgroup.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" rgroup.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" rgroup.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" rgroup.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else rgroup.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" rgroup.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" rgroup.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" rgroup.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" rgroup.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" rgroup.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" rgroup.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" rgroup.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else rgroup.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" rgroup.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" rgroup.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" rgroup.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" rgroup.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" rgroup.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" rgroup.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" rgroup.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else rgroup.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" rgroup.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" rgroup.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" rgroup.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" rgroup.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" rgroup.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" rgroup.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" rgroup.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else rgroup.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" rgroup.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" rgroup.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" rgroup.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" rgroup.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" rgroup.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" rgroup.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" rgroup.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else rgroup.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" rgroup.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" rgroup.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" rgroup.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" rgroup.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" rgroup.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" rgroup.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((per.l(ad:0x50041000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" rgroup.long 0xC00++0x03 line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" rgroup.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" rgroup.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" rgroup.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" rgroup.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" rgroup.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" rgroup.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" rgroup.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" rgroup.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" rgroup.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" rgroup.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" rgroup.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" rgroup.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" rgroup.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" rgroup.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" rgroup.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" rgroup.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" rgroup.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" rgroup.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" rgroup.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" rgroup.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" rgroup.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" rgroup.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" rgroup.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" rgroup.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" rgroup.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" rgroup.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" rgroup.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" rgroup.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" rgroup.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" rgroup.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" rgroup.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" textline " " width 22. if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else rgroup.long 0x0D60++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0x50041000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x0F20++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F24++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F28++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F2C++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0xFD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" rgroup.byte 0xFD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" rgroup.byte 0xFDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.byte 0xFF0++0x00 line.byte 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " tree.end tree.end width 0x0B base ad:0x50042000 width 17. tree "CPU Interface" if (((per.l(ad:0x50041000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " else if PER.ADDRESS.isSECUREEX(ad:0x50042000) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)" bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " endif endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0x50042000+0x0008) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif hgroup.long 0x0020++0x003 hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" in if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) wgroup.long 0x0024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" else hgroup.long 0x0024++0x03 hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" hgroup.long 0x0028++0x03 hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" endif group.long 0x00D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" if (((per.l(ad:0x50041000+0x04))&0x400)==0x400) group.long 0x00E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" else hgroup.long 0x00E0++0x03 hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end sif CPU.FEATURE(hypervisor) base ad:0x50044000 width 12. tree "Virtual CPU Control Interface" group.long 0x0000++0x03 line.long 0x00 "GICH_HCR,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x0004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long 0x0010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long 0x020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long 0x0030++0x03 line.long 0x00 "GICH_ELSR0,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long 0x00F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" if (((per.l(ad:0x50044000+0x100))&0x80000000)==0x80000000) group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x50044000+0x104))&0x80000000)==0x80000000) group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x50044000+0x108))&0x80000000)==0x80000000) group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0x50044000+0x10C))&0x80000000)==0x80000000) group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif tree.end base ad:0x50046000 width 12. tree "Virtual CPU Interface" group.long 0x0000++0x03 line.long 0x00 "GICV_CTLR,Virtual Machine Control Register" bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs" textline " " bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" group.long 0x0004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x0008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x000C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICV_EOIR,VM End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x001C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x0020++0x03 hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" in wgroup.long 0x0024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x00D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" rgroup.long 0x00FC++0x03 line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end endif width 0x0B tree.end tree.end endif tree "Interrupt Controller" base ad:0x60004000 width 30. tree "Primary Interrupt Controller" rgroup.long 0x00++0x13 line.long 0x00 "PRI_ICTLR_VIRQ_CPU_0,Valid Interrupt Request Status for CPU0 Register" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" line.long 0x04 "PRI_ICTLR_VIRQ_COP_0,Valid Interrupt Request Status for BPMP-Lite Register" bitfld.long 0x04 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" line.long 0x08 "PRI_ICTLR_VFIQ_CPU_0,FIQ Valid Interrupt Status for CPU0 Register" bitfld.long 0x08 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x08 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x08 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x08 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x08 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x08 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x08 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x08 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x08 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x08 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x08 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x08 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" line.long 0x0C "PRI_ICTLR_VFIQ_COP_0,FIQ Valid Interrupt Status for BPMP-Lite Register" bitfld.long 0x0C 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" line.long 0x10 "PRI_ICTLR_ISR_0,Latched Interrupt Status Register" bitfld.long 0x10 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x10 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x10 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x10 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x10 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x10 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x10 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x10 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x10 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x10 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x10 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x10 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x14++0x03 line.long 0x00 "PRI_ICTLR_FIR_0_SET/CLR,Forced Interrupt Status Register)" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 26. 0x04 26. 0x08 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x20++0x03 line.long 0x00 "PRI_ICTLR_CPU_IER_0_SET/CLR,Enabled Interrupt Source for CPU0 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 26. 0x04 26. 0x08 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x2C++0x3 line.long 0x00 "PRI_ICTLR_CPU_IEP_CLASS_0,CPU0 Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x30++0x03 line.long 0x00 "PRI_ICTLR_COP_IER_0_SET/CLR,Enabled Interrupt Source for BPMP-Lite Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 26. 0x04 26. 0x08 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x3C++0x3 line.long 0x00 "PRI_ICTLR_COP_IEP_CLASS_0,BPMP-Lite Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" rgroup.long 0x60++0x07 line.long 0x00 "PRI_ICTLR__VIRQ_CPU1_0,Valid Interrupt Request Status for CPU1 Register" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" line.long 0x04 "PRI_ICTLR__VFIQ_CPU1_0,FIQ Valid Interrupt Status for CPU Register" bitfld.long 0x04 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x68++0x03 line.long 0x00 "PRI_ICTLR_CPU1_IER_0_SET/CLR,Enabled Interrupt Source for CPU1 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 26. 0x04 26. 0x08 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x74++0x03 line.long 0x00 "PRI_ICTLR_CPU1_IEP_CLASS_0,CPU1 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" rgroup.long 0x78++0x07 line.long 0x00 "PRI_ICTLR_VIRQ_CPU2_0,Valid Interrupt Request Status for CPU2 Register" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" line.long 0x04 "PRI_ICTLR_VFIQ_CPU2_0,FIQ Valid Interrupt Status for CPU2 Register" bitfld.long 0x04 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x80++0x03 line.long 0x00 "PRI_ICTLR_CPU2_IER_0_SET/CLR,Enabled Interrupt Source for CPU2 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 26. 0x04 26. 0x08 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x8C++0x03 line.long 0x00 "PRI_ICTLR_CPU2_IEP_CLASS_0,CPU2 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" rgroup.long 0x90++0x07 line.long 0x00 "PRI_ICTLR_VIRQ_CPU3_0,Valid Interrupt Request Status for CPU3 Register" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" line.long 0x04 "PRI_ICTLR_VFIQ_CPU3_0,FIQ Valid Interrupt Status for CPU3 Register" bitfld.long 0x04 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0x98++0x03 line.long 0x00 "PRI_ICTLR_CPU3_IER_0_SET/CLR,Enabled Interrupt Source for CPU3 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 26. 0x04 26. 0x08 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" group.long 0xA4++0x03 line.long 0x00 "PRI_ICTLR_CPU3_IEP_CLASS_0,CPU3 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " SDMMC4 ,SDMMC4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " ARB_SEM_GNT_CPU ,ARB_SEM_GNT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " ARB_SEM_GNT_COP ,ARB_SEM_GNT_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " APB_DMA_CPU ,APB_DMA_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " FC_INT ,FC_INT interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " PMC_INT ,PMC_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " SATA_CTL ,SATA_CTL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " USB2 ,USB2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " USB ,USB interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " SDMMC3 ,SDMMC3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " VII2C ,VII2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " VGPIO_INT ,VGPIO_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " SDMMC2 ,SDMMC2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SDMMC1 ,SDMMC1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SATA_RX_STAT ,SATA_RX_STAT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " DPAUX_INT1 ,DPAUX_INT1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " QUAD_SPI ,QUAD_SPI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " NVDEC ,NVDEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " NVJPEG ,NVJPEG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " SHR_SEM_OUTBOX_EMPTY ,SHR_SEM_OUTBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " SHR_SEM_OUTBOX_FULL ,SHR_SEM_OUTBOX_FULL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " SHR_SEM_INBOX_EMPTY ,SHR_SEM_INBOX_EMPTY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " SHR_SEM_INBOX_FULL ,SHR_SEM_INBOX_FULL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " CEC ,CEC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RTC ,RTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " TMR2 ,TMR2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TMR1 ,TMR1 interrupt" "No interrupt,Interrupt" tree.end tree "Second Interrupt Controller" rgroup.long 0x100++0x13 line.long 0x00 "SEC_ICTLR_VIRQ_CPU_0,Valid Interrupt Request Status for CPU0 Register" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" line.long 0x04 "SEC_ICTLR_VIRQ_COP_0,Valid Interrupt Request Status for BPMP-Lite Register" bitfld.long 0x04 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" line.long 0x08 "SEC_ICTLR_VFIQ_CPU_0,FIQ Valid Interrupt Status for CPU0 Register" bitfld.long 0x08 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x08 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x08 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x08 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x08 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x08 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x08 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x08 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x08 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x08 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x08 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x08 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x08 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" line.long 0x0C "SEC_ICTLR_VFIQ_COP_0,FIQ Valid Interrupt Status for BPMP-Lite Register" bitfld.long 0x0C 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" line.long 0x10 "SEC_ICTLR_ISR_0,Latched Interrupt Status Register" bitfld.long 0x10 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x10 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x10 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x10 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x10 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x10 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x10 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x10 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x10 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x10 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x10 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x10 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x10 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x114++0x03 line.long 0x00 "SEC_ICTLR_FIR_0_SET/CLR,Forced Interrupt Status Register)" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE ,SE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 24. 0x04 24. 0x08 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x120++0x03 line.long 0x00 "SEC_ICTLR_CPU_IER_0_SET/CLR,Enabled Interrupt Source for CPU0 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE ,SE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 24. 0x04 24. 0x08 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x12C++0x3 line.long 0x00 "SEC_ICTLR_CPU_IEP_CLASS_0,CPU0 Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x130++0x03 line.long 0x00 "SEC_ICTLR_COP_IER_0_SET/CLR,Enabled Interrupt Source for BPMP-Lite Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE ,SE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 24. 0x04 24. 0x08 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x13C++0x3 line.long 0x00 "SEC_ICTLR_COP_IEP_CLASS_0,BPMP-Lite Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" rgroup.long 0x160++0x07 line.long 0x00 "SEC_ICTLR__VIRQ_CPU1_0,Valid Interrupt Request Status for CPU1 Register" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" line.long 0x04 "SEC_ICTLR__VFIQ_CPU1_0,FIQ Valid Interrupt Status for CPU Register" bitfld.long 0x04 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x168++0x03 line.long 0x00 "SEC_ICTLR_CPU1_IER_0_SET/CLR,Enabled Interrupt Source for CPU1 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE ,SE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 24. 0x04 24. 0x08 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x174++0x03 line.long 0x00 "SEC_ICTLR_CPU1_IEP_CLASS_0,CPU1 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" rgroup.long 0x178++0x07 line.long 0x00 "SEC_ICTLR_VIRQ_CPU2_0,Valid Interrupt Request Status for CPU2 Register" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" line.long 0x04 "SEC_ICTLR_VFIQ_CPU2_0,FIQ Valid Interrupt Status for CPU2 Register" bitfld.long 0x04 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x180++0x03 line.long 0x00 "SEC_ICTLR_CPU2_IER_0_SET/CLR,Enabled Interrupt Source for CPU2 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE ,SE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 24. 0x04 24. 0x08 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x18C++0x03 line.long 0x00 "SEC_ICTLR_CPU2_IEP_CLASS_0,CPU2 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" rgroup.long 0x190++0x07 line.long 0x00 "SEC_ICTLR_VIRQ_CPU3_0,Valid Interrupt Request Status for CPU3 Register" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" line.long 0x04 "SEC_ICTLR_VFIQ_CPU3_0,FIQ Valid Interrupt Status for CPU3 Register" bitfld.long 0x04 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x198++0x03 line.long 0x00 "SEC_ICTLR_CPU3_IER_0_SET/CLR,Enabled Interrupt Source for CPU3 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE ,SE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 24. 0x04 24. 0x08 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" group.long 0x1A4++0x03 line.long 0x00 "SEC_ICTLR_CPU3_IEP_CLASS_0,CPU3 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " I2C6 ,I2C6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " CLDVFS ,CLDVFS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_DMA_COP ,APB_DMA_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " SPI1 ,SPI1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " SE ,SE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " USB3_DEV_PME ,USB3_DEV_PME interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " USB3_DEV_SMI ,USB3_DEV_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO5 ,GPIO5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " I2C5 ,I2C5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " EDP ,EDP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TSEC ,TSEC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " XUSB_PADCTL ,XUSB_PADCTL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " THERMAL ,THERMAL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " UARTC ,UARTC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ACTMON ,ACTMON interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " USB3_DEV_HOST ,USB3_DEV_HOST interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " USB3_HOST_PME ,USB3_HOST_PME interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " TMR4 ,TMR4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " TMR3 ,TMR3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " USB3_HOST_SMI ,USB3_HOST_SMI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " USB3_HOST_INT ,USB3_HOST_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I2C ,I2C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " UARTB ,UARTB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " UARTA ,UARTA interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GPIO4 ,GPIO4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " GPIO3 ,GPIO3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " GPIO2 ,GPIO2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " GPIO1 ,GPIO1 interrupt" "No interrupt,Interrupt" tree.end tree "Third Interrupt Controller" rgroup.long 0x200++0x13 line.long 0x00 "TRI_ICTLR_VIRQ_CPU_0,Valid Interrupt Request Status for CPU0 Register" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" line.long 0x04 "TRI_ICTLR_VIRQ_COP_0,Valid Interrupt Request Status for BPMP-Lite Register" bitfld.long 0x04 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" line.long 0x08 "TRI_ICTLR_VFIQ_CPU_0,FIQ Valid Interrupt Status for CPU0 Register" bitfld.long 0x08 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x08 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x08 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x08 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x08 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x08 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x08 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x08 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x08 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x08 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x08 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x08 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" line.long 0x0C "TRI_ICTLR_VFIQ_COP_0,FIQ Valid Interrupt Status for BPMP-Lite Register" bitfld.long 0x0C 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" line.long 0x10 "TRI_ICTLR_ISR_0,Latched Interrupt Status Register" bitfld.long 0x10 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x10 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x10 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x10 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x10 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x10 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x10 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x10 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x10 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x10 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x10 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x10 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x214++0x03 line.long 0x00 "TRI_ICTLR_FIR_0_SET/CLR,Forced Interrupt Status Register)" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MC ,MC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x220++0x03 line.long 0x00 "TRI_ICTLR_CPU_IER_0_SET/CLR,Enabled Interrupt Source for CPU0 Register" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MC ,MC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x22C++0x3 line.long 0x00 "TRI_ICTLR_CPU_IEP_CLASS_0,CPU0 Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x230++0x03 line.long 0x00 "TRI_ICTLR_COP_IER_0_SET/CLR,Enabled Interrupt Source for BPMP-Lite Register" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MC ,MC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x23C++0x3 line.long 0x00 "TRI_ICTLR_COP_IEP_CLASS_0,BPMP-Lite Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" rgroup.long 0x260++0x07 line.long 0x00 "TRI_ICTLR__VIRQ_CPU1_0,Valid Interrupt Request Status for CPU1 Register" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" line.long 0x04 "TRI_ICTLR__VFIQ_CPU1_0,FIQ Valid Interrupt Status for CPU Register" bitfld.long 0x04 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x268++0x03 line.long 0x00 "TRI_ICTLR_CPU1_IER_0_SET/CLR,Enabled Interrupt Source for CPU1 Register" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MC ,MC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x274++0x03 line.long 0x00 "TRI_ICTLR_CPU1_IEP_CLASS_0,CPU1 Interrupt Enable Priority Class Register" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" rgroup.long 0x278++0x07 line.long 0x00 "TRI_ICTLR_VIRQ_CPU2_0,Valid Interrupt Request Status for CPU2 Register" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" line.long 0x04 "TRI_ICTLR_VFIQ_CPU2_0,FIQ Valid Interrupt Status for CPU2 Register" bitfld.long 0x04 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x280++0x03 line.long 0x00 "TRI_ICTLR_CPU2_IER_0_SET/CLR,Enabled Interrupt Source for CPU2 Register" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MC ,MC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x28C++0x03 line.long 0x00 "TRI_ICTLR_CPU2_IEP_CLASS_0,CPU2 Interrupt Enable Priority Class Register" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" rgroup.long 0x290++0x07 line.long 0x00 "TRI_ICTLR_VIRQ_CPU3_0,Valid Interrupt Request Status for CPU3 Register" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" line.long 0x04 "TRI_ICTLR_VFIQ_CPU3_0,FIQ Valid Interrupt Status for CPU3 Register" bitfld.long 0x04 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x298++0x03 line.long 0x00 "TRI_ICTLR_CPU3_IER_0_SET/CLR,Enabled Interrupt Source for CPU3 Register" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MC ,MC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" group.long 0x2A4++0x03 line.long 0x00 "TRI_ICTLR_CPU3_IEP_CLASS_0,CPU3 Interrupt Enable Priority Class Register" bitfld.long 0x00 29. " SPI4 ,SPI4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " I2C3 ,I2C3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " UARTD ,UARTD interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " GPIO7 ,GPIO7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " GPIO6 ,GPIO6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " PMU_EXT ,PMU_EXT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " I2C2 ,I2C2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " SPI3 ,SPI3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " SPI2 ,SPI2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " HDA ,HDA interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " TSECB ,TSECB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " EMC ,EMC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MC ,MC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " SOR ,SOR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " HDMI ,HDMI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " DISPLAYB ,DISPLAYB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " DISPLAY ,DISPLAY interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " VIC ,VIC interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " ISP ,ISP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " ISPB ,ISPB interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VI ,VI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " NVENC ,NVENC interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " HOST1X_GEN_CPU ,HOST1X_GEN_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " HOST1X_GEN_COP ,HOST1X_GEN_COP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " HOST1X_SYNCPT_CPU ,HOST1X_SYNCPT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " HOST1X_SYNCPT_COP ,HOST1X_SYNCPT_COP interrupt" "No interrupt,Interrupt" tree.end tree "Fourth Interrupt Controller" rgroup.long 0x300++0x13 line.long 0x00 "QUAD_ICTLR_VIRQ_CPU_0,Valid Interrupt Request Status for CPU0 Register" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" line.long 0x04 "QUAD_ICTLR_VIRQ_COP_0,Valid Interrupt Request Status for BPMP-Lite Register" bitfld.long 0x04 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" line.long 0x08 "QUAD_ICTLR_VFIQ_CPU_0,FIQ Valid Interrupt Status for CPU0 Register" bitfld.long 0x08 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x08 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x08 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x08 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x08 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" line.long 0x0C "QUAD_ICTLR_VFIQ_COP_0,FIQ Valid Interrupt Status for BPMP-Lite Register" bitfld.long 0x0C 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" line.long 0x10 "QUAD_ICTLR_ISR_0,Latched Interrupt Status Register" bitfld.long 0x10 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x10 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x10 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x10 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x10 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x314++0x03 line.long 0x00 "QUAD_ICTLR_FIR_0_SET/CLR,Forced Interrupt Status Register)" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x320++0x03 line.long 0x00 "QUAD_ICTLR_CPU_IER_0_SET/CLR,Enabled Interrupt Source for CPU0 Register" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x32C++0x3 line.long 0x00 "QUAD_ICTLR_CPU_IEP_CLASS_0,CPU0 Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x330++0x03 line.long 0x00 "QUAD_ICTLR_COP_IER_0_SET/CLR,Enabled Interrupt Source for BPMP-Lite Register" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x33C++0x3 line.long 0x00 "QUAD_ICTLR_COP_IEP_CLASS_0,BPMP-Lite Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" rgroup.long 0x360++0x07 line.long 0x00 "QUAD_ICTLR_VIRQ_CPU1_0,Valid Interrupt Request Status for CPU1 Register" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" line.long 0x04 "QUAD_ICTLR_VFIQ_CPU1_0,FIQ Valid Interrupt Status for CPU Register" bitfld.long 0x04 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x368++0x03 line.long 0x00 "QUAD_ICTLR_CPU1_IER_0_SET/CLR,Enabled Interrupt Source for CPU1 Register" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x374++0x03 line.long 0x00 "QUAD_ICTLR_CPU1_IEP_CLASS_0,CPU1 Interrupt Enable Priority Class Register" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" rgroup.long 0x378++0x07 line.long 0x00 "QUAD_ICTLR_VIRQ_CPU2_0,Valid Interrupt Request Status for CPU2 Register" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" line.long 0x04 "QUAD_ICTLR_VFIQ_CPU2_0,FIQ Valid Interrupt Status for CPU2 Register" bitfld.long 0x04 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x380++0x03 line.long 0x00 "QUAD_ICTLR_CPU2_IER_0,Enabled Interrupt Source for CPU2 Register" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x38C++0x03 line.long 0x00 "QUAD_ICTLR_CPU2_IEP_CLASS_0,CPU2 Interrupt Enable Priority Class Register" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" rgroup.long 0x390++0x07 line.long 0x00 "QUAD_ICTLR_VIRQ_CPU3_0,Valid Interrupt Request Status for CPU3 Register" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" line.long 0x04 "QUAD_ICTLR_VFIQ_CPU3_0,FIQ Valid Interrupt Status for CPU3 Register" bitfld.long 0x04 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x04 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x398++0x03 line.long 0x00 "QUAD_ICTLR_CPU3_IER_0_SET/CLR,Enabled Interrupt Source for CPU3 Register" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" group.long 0x3A4++0x03 line.long 0x00 "QUAD_ICTLR_CPU3_IEP_CLASS_0,CPU3 Interrupt Enable Priority Class Register" bitfld.long 0x00 30. " CAR ,CAR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPIO8 ,GPIO8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 28. " WDT_AVP ,WDT_AVP interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " WDT_CPU ,WDT_CPU interrupt" "No interrupt,Interrupt" bitfld.long 0x00 25. " TMR5 ,TMR5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " I2C4 ,I2C4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " APB_DMA_CH15 ,APB_DMA_CH15 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 22. " APB_DMA_CH14 ,APB_DMA_CH14 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " APB_DMA_CH13 ,APB_DMA_CH13 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " APB_DMA_CH12 ,APB_DMA_CH12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 19. " APB_DMA_CH11 ,APB_DMA_CH11 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " APB_DMA_CH10 ,APB_DMA_CH10 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " APB_DMA_CH9 ,APB_DMA_CH9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " APB_DMA_CH8 ,APB_DMA_CH8 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH7 ,APB_DMA_CH7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " APB_DMA_CH6 ,APB_DMA_CH6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " APB_DMA_CH5 ,APB_DMA_CH5 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH4 ,APB_DMA_CH4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " APB_DMA_CH3 ,APB_DMA_CH3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " APB_DMA_CH2 ,APB_DMA_CH2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH1 ,APB_DMA_CH1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " APB_DMA_CH0 ,APB_DMA_CH0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 7. " APE_INT0 ,APE_INT0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APE_INT1 ,APE_INT1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AVP_CACHE ,AVP_CACHE interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " PCIE_MSI ,PCIE_MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " PCIE_INT ,PCIE_INT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " DTV ,DTV interrupt" "No interrupt,Interrupt" tree.end tree "Fifth Interrupt Controller" rgroup.long 0x400++0x13 line.long 0x00 "PENTA_ICTLR_VIRQ_CPU_0,Valid Interrupt Request Status for CPU0 Register" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" line.long 0x04 "PENTA_ICTLR_VIRQ_COP_0,Valid Interrupt Request Status for BPMP-Lite Register" bitfld.long 0x04 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x04 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" line.long 0x08 "PENTA_ICTLR_VFIQ_CPU_0,FIQ Valid Interrupt Status for CPU0 Register" bitfld.long 0x08 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x08 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x08 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x08 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x08 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x08 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x08 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x08 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" line.long 0x0C "PENTA_ICTLR_VFIQ_COP_0,FIQ Valid Interrupt Status for BPMP-Lite Register" bitfld.long 0x0C 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" line.long 0x10 "PENTA_ICTLR_ISR_0,Latched Interrupt Status Register" bitfld.long 0x10 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x10 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x10 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x10 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x10 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x10 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x10 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x10 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x414++0x03 line.long 0x00 "PENTA_ICTLR_FIR_0_SET/CLR,Forced Interrupt Status Register)" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x420++0x03 line.long 0x00 "PENTA_ICTLR_CPU_IER_0_SET/CLR,Enabled Interrupt Source for CPU0 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x42C++0x3 line.long 0x00 "PENTA_ICTLR_CPU_IEP_CLASS_0,CPU0 Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x430++0x03 line.long 0x00 "PENTA_ICTLR_COP_IER_0_SET/CLR,Enabled Interrupt Source for BPMP-Lite Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x43C++0x3 line.long 0x00 "PENTA_ICTLR_COP_IEP_CLASS_0,BPMP-Lite Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" rgroup.long 0x460++0x07 line.long 0x00 "PENTA_ICTLR__VIRQ_CPU1_0,Valid Interrupt Request Status for CPU1 Register" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" line.long 0x04 "PENTA_ICTLR__VFIQ_CPU1_0,FIQ Valid Interrupt Status for CPU Register" bitfld.long 0x04 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x04 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x468++0x03 line.long 0x00 "PENTA_ICTLR_CPU1_IER_0_SET/CLR,Enabled Interrupt Source for CPU1 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x474++0x03 line.long 0x00 "PENTA_ICTLR_CPU1_IEP_CLASS_0,CPU1 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" rgroup.long 0x478++0x07 line.long 0x00 "PENTA_ICTLR_VIRQ_CPU2_0,Valid Interrupt Request Status for CPU2 Register" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" line.long 0x04 "PENTA_ICTLR_VFIQ_CPU2_0,FIQ Valid Interrupt Status for CPU2 Register" bitfld.long 0x04 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x04 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x480++0x03 line.long 0x00 "PENTA_ICTLR_CPU2_IER_0_SET/CLR,Enabled Interrupt Source for CPU2 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x48C++0x03 line.long 0x00 "PENTA_ICTLR_CPU2_IEP_CLASS_0,CPU2 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" rgroup.long 0x490++0x07 line.long 0x00 "PENTA_ICTLR_VIRQ_CPU3_0,Valid Interrupt Request Status for CPU3 Register" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" line.long 0x04 "PENTA_ICTLR_VFIQ_CPU3_0,FIQ Valid Interrupt Status for CPU3 Register" bitfld.long 0x04 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x04 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x04 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x04 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x498++0x03 line.long 0x00 "PENTA_ICTLR_CPU3_IER_0_SET/CLR,Enabled Interrupt Source for CPU3 Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" group.long 0x4A4++0x03 line.long 0x00 "PENTA_ICTLR_CPU3_IEP_CLASS_0,CPU3 Interrupt Enable Priority Class Register" bitfld.long 0x00 31. " DPAUX ,DPAUX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 30. " GPU_NONSTALL ,GPU_NONSTALL interrupt" "No interrupt,Interrupt" bitfld.long 0x00 29. " GPU_STALL ,GPU_STALL interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TMR0 ,TMR0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 27. " TMR9 ,TMR9 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 26. " TMR8 ,TMR8 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " TMR7 ,TMR7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 24. " TMR6 ,TMR6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 23. " SDMMC4_SYS ,SDMMC4_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " SDMMC3_SYS ,SDMMC3_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 21. " SDMMC2_SYS ,SDMMC2_SYS interrupt" "No interrupt,Interrupt" bitfld.long 0x00 20. " SDMMC1_SYS ,SDMMC1_SYS interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " CPU3_PMU_INTR ,CPU3_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " CPU2_PMU_INTR ,CPU2_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " CPU1_PMU_INTR ,CPU1_PMU_INTR interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " CPU0_PMU_INTR ,CPU0_PMU_INTR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " APB_DMA_CH31 ,APB_DMA_CH31 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " APB_DMA_CH30 ,APB_DMA_CH30 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " APB_DMA_CH29 ,APB_DMA_CH29 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " APB_DMA_CH28 ,APB_DMA_CH28 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " APB_DMA_CH27 ,APB_DMA_CH27 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " APB_DMA_CH26 ,APB_DMA_CH26 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " APB_DMA_CH25 ,APB_DMA_CH25 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " APB_DMA_CH24 ,APB_DMA_CH24 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " APB_DMA_CH23 ,APB_DMA_CH23 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " APB_DMA_CH22 ,APB_DMA_CH22 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " APB_DMA_CH21 ,APB_DMA_CH21 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " APB_DMA_CH20 ,APB_DMA_CH20 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " APB_DMA_CH19 ,APB_DMA_CH19 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " APB_DMA_CH18 ,APB_DMA_CH18 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " APB_DMA_CH17 ,APB_DMA_CH17 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " APB_DMA_CH16 ,APB_DMA_CH16 interrupt" "No interrupt,Interrupt" tree.end tree "Sixth Interrupt Controller" rgroup.long 0x500++0x13 line.long 0x00 "HEXA_ICTLR_VIRQ_CPU_0,Valid Interrupt Request Status for CPU0 Register" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" line.long 0x04 "HEXA_ICTLR_VIRQ_COP_0,Valid Interrupt Request Status for BPMP-Lite Register" bitfld.long 0x04 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" line.long 0x08 "HEXA_ICTLR_VFIQ_CPU_0,FIQ Valid Interrupt Status for CPU0 Register" bitfld.long 0x08 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x08 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x08 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x08 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x08 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x08 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x08 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x08 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" line.long 0x0C "HEXA_ICTLR_VFIQ_COP_0,FIQ Valid Interrupt Status for BPMP-Lite Register" bitfld.long 0x0C 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x0C 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" line.long 0x10 "HEXA_ICTLR_ISR_0,Latched Interrupt Status Register" bitfld.long 0x10 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x10 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x10 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x10 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x10 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x10 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x10 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x514++0x03 line.long 0x00 "HEXA_ICTLR_FIR_0_SET/CLR,Forced Interrupt Status Register)" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x520++0x03 line.long 0x00 "HEXA_ICTLR_CPU_IER_0_SET/CLR,Enabled Interrupt Source for CPU0 Register" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x52C++0x3 line.long 0x00 "HEXA_ICTLR_CPU_IEP_CLASS_0,CPU0 Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x530++0x03 line.long 0x00 "HEXA_ICTLR_COP_IER_0_SET/CLR,Enabled Interrupt Source for BPMP-Lite Register" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x53C++0x3 line.long 0x00 "HEXA_ICTLR_COP_IEP_CLASS_0,BPMP-Lite Interrupt Enable Priority Class Register (FIQ/IRQ)" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" rgroup.long 0x560++0x07 line.long 0x00 "HEXA_ICTLR__VIRQ_CPU1_0,Valid Interrupt Request Status for CPU1 Register" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" line.long 0x04 "HEXA_ICTLR__VFIQ_CPU1_0,FIQ Valid Interrupt Status for CPU Register" bitfld.long 0x04 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x568++0x03 line.long 0x00 "HEXA_ICTLR_CPU1_IER_0_SET/CLR,Enabled Interrupt Source for CPU1 Register" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x574++0x03 line.long 0x00 "HEXA_ICTLR_CPU1_IEP_CLASS_0,CPU1 Interrupt Enable Priority Class Register" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" rgroup.long 0x578++0x07 line.long 0x00 "HEXA_ICTLR_VIRQ_CPU2_0,Valid Interrupt Request Status for CPU2 Register" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" line.long 0x04 "HEXA_ICTLR_VFIQ_CPU2_0,FIQ Valid Interrupt Status for CPU2 Register" bitfld.long 0x04 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x580++0x03 line.long 0x00 "HEXA_ICTLR_CPU2_IER_0_SET/CLR,Enabled Interrupt Source for CPU2 Register" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x58C++0x03 line.long 0x00 "HEXA_ICTLR_CPU2_IEP_CLASS_0,CPU2 Interrupt Enable Priority Class Register" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" rgroup.long 0x590++0x07 line.long 0x00 "HEXA_ICTLR_VIRQ_CPU3_0,Valid Interrupt Request Status for CPU3 Register" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" line.long 0x04 "HEXA_ICTLR_VFIQ_CPU3_0,FIQ Valid Interrupt Status for CPU3 Register" bitfld.long 0x04 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x04 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x04 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x04 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x598++0x03 line.long 0x00 "HEXA_ICTLR_CPU3_IER_0_SET/CLR,Enabled Interrupt Source for CPU3 Register" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 11. 0x04 11. 0x08 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x04 4. 0x08 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" group.long 0x5A4++0x03 line.long 0x00 "HEXA_ICTLR_CPU3_IEP_CLASS_0,CPU3 Interrupt Enable Priority Class Register" bitfld.long 0x00 19. " TMR13 ,TMR13 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 18. " TMR12 ,TMR12 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 17. " TMR11 ,TMR11 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " TMR10 ,TMR10 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " MSELECT_ERROR ,MSELECT_ERROR interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " MPCORE_CTIIRQ3 ,MPCORE_CTIIRQ3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " MPCORE_CTIIRQ2 ,MPCORE_CTIIRQ2 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " MPCORE_CTIIRQ1 ,MPCORE_CTIIRQ1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " MPCORE_CTIIRQ0 ,MPCORE_CTIIRQ0 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " TMR_SHARED ,TMR_SHARED interrupt" "No interrupt,Interrupt" bitfld.long 0x00 9. " FLOW_RSM_COP ,FLOW_RSM_COP interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " FLOW_RSM_CPU ,FLOW_RSM_CPU interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " EVENT_GPIO_C ,EVENT_GPIO_C interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " EVENT_GPIO_B ,EVENT_GPIO_B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " EVENT_GPIO_A ,EVENT_GPIO_A interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " MPCORE_INTERRIRQ ,MPCORE_INTERRIRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " MPCORE_AXIERRIRQ ,MPCORE_AXIERRIRQ interrupt" "No interrupt,Interrupt" tree.end width 31. tree "Arbitration Semaphore Interrupt Register" rgroup.long 0x40++0x03 line.long 0x00 "PRI_ICTLR_ARBGNT_CPU_STATUS_0,CPU arbitration semaphore interrupt status register" bitfld.long 0x00 31. " GNT_31 ,Grant status 31" "No interrupt,Interrupt" bitfld.long 0x00 30. " GNT_30 ,Grant status 30" "No interrupt,Interrupt" bitfld.long 0x00 29. " GNT_29 ,Grant status 29" "No interrupt,Interrupt" bitfld.long 0x00 28. " GNT_28 ,Grant status 28" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " GNT_27 ,Grant status 27" "No interrupt,Interrupt" bitfld.long 0x00 26. " GNT_26 ,Grant status 26" "No interrupt,Interrupt" bitfld.long 0x00 25. " GNT_25 ,Grant status 25" "No interrupt,Interrupt" bitfld.long 0x00 24. " GNT_24 ,Grant status 24" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " GNT_23 ,Grant status 23" "No interrupt,Interrupt" bitfld.long 0x00 22. " GNT_22 ,Grant status 22" "No interrupt,Interrupt" bitfld.long 0x00 21. " GNT_21 ,Grant status 21" "No interrupt,Interrupt" bitfld.long 0x00 20. " GNT_20 ,Grant status 20" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " GNT_19 ,Grant status 19" "No interrupt,Interrupt" bitfld.long 0x00 18. " GNT_18 ,Grant status 18" "No interrupt,Interrupt" bitfld.long 0x00 17. " GNT_17 ,Grant status 17" "No interrupt,Interrupt" bitfld.long 0x00 16. " GNT_16 ,Grant status 16" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " GNT_15 ,Grant status 15" "No interrupt,Interrupt" bitfld.long 0x00 14. " GNT_14 ,Grant status 14" "No interrupt,Interrupt" bitfld.long 0x00 13. " GNT_13 ,Grant status 13" "No interrupt,Interrupt" bitfld.long 0x00 12. " GNT_12 ,Grant status 12" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " GNT_11 ,Grant status 11" "No interrupt,Interrupt" bitfld.long 0x00 10. " GNT_10 ,Grant status 10" "No interrupt,Interrupt" bitfld.long 0x00 9. " GNT_9 ,Grant status 9" "No interrupt,Interrupt" bitfld.long 0x00 8. " GNT_8 ,Grant status 8" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " GNT_7 ,Grant status 7" "No interrupt,Interrupt" bitfld.long 0x00 6. " GNT_6 ,Grant status 6" "No interrupt,Interrupt" bitfld.long 0x00 5. " GNT_5 ,Grant status 5" "No interrupt,Interrupt" bitfld.long 0x00 4. " GNT_4 ,Grant status 4" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GNT_3 ,Grant status 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " GNT_2 ,Grant status 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " GNT_1 ,Grant status 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " GNT_0 ,Grant status 0" "No interrupt,Interrupt" group.long 0x44++0x03 line.long 0x00 "PRI_ICTLR_ARBGNT_CPU_ENABLE_0,CPU arbitration semaphore interrupt enable register" bitfld.long 0x00 31. " GER_31 ,Arbitration semaphore interrupt enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " GER_30 ,Arbitration semaphore interrupt enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " GER_29 ,Arbitration semaphore interrupt enable 29" "Disabled,Enabled" bitfld.long 0x00 28. " GER_28 ,Arbitration semaphore interrupt enable 28" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " GER_27 ,Arbitration semaphore interrupt enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " GER_26 ,Arbitration semaphore interrupt enable 26" "Disabled,Enabled" bitfld.long 0x00 25. " GER_25 ,Arbitration semaphore interrupt enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " GER_24 ,Arbitration semaphore interrupt enable 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " GER_23 ,Arbitration semaphore interrupt enable 23" "Disabled,Enabled" bitfld.long 0x00 22. " GER_22 ,Arbitration semaphore interrupt enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " GER_21 ,Arbitration semaphore interrupt enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " GER_20 ,Arbitration semaphore interrupt enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " GER_19 ,Arbitration semaphore interrupt enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " GER_18 ,Arbitration semaphore interrupt enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " GER_17 ,Arbitration semaphore interrupt enable 17" "Disabled,Enabled" bitfld.long 0x00 16. " GER_16 ,Arbitration semaphore interrupt enable 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " GER_15 ,Arbitration semaphore interrupt enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " GER_14 ,Arbitration semaphore interrupt enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " GER_13 ,Arbitration semaphore interrupt enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " GER_12 ,Arbitration semaphore interrupt enable 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " GER_11 ,Arbitration semaphore interrupt enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " GER_10 ,Arbitration semaphore interrupt enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " GER_9 ,Arbitration semaphore interrupt enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " GER_8 ,Arbitration semaphore interrupt enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " GER_7 ,Arbitration semaphore interrupt enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " GER_6 ,Arbitration semaphore interrupt enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " GER_5 ,Arbitration semaphore interrupt enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " GER_4 ,Arbitration semaphore interrupt enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " GER_3 ,Arbitration semaphore interrupt enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " GER_2 ,Arbitration semaphore interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " GER_1 ,Arbitration semaphore interrupt enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " GER_0 ,Arbitration semaphore interrupt enable 0" "Disabled,Enabled" rgroup.long 0x48++0x03 line.long 0x00 "PRI_ICTLR_ARBGNT_COP_STATUS_0,COP arbitration semaphore interrupt status register" bitfld.long 0x00 31. " GNT_31 ,Grant status 31" "No interrupt,Interrupt" bitfld.long 0x00 30. " GNT_30 ,Grant status 30" "No interrupt,Interrupt" bitfld.long 0x00 29. " GNT_29 ,Grant status 29" "No interrupt,Interrupt" bitfld.long 0x00 28. " GNT_28 ,Grant status 28" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " GNT_27 ,Grant status 27" "No interrupt,Interrupt" bitfld.long 0x00 26. " GNT_26 ,Grant status 26" "No interrupt,Interrupt" bitfld.long 0x00 25. " GNT_25 ,Grant status 25" "No interrupt,Interrupt" bitfld.long 0x00 24. " GNT_24 ,Grant status 24" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " GNT_23 ,Grant status 23" "No interrupt,Interrupt" bitfld.long 0x00 22. " GNT_22 ,Grant status 22" "No interrupt,Interrupt" bitfld.long 0x00 21. " GNT_21 ,Grant status 21" "No interrupt,Interrupt" bitfld.long 0x00 20. " GNT_20 ,Grant status 20" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " GNT_19 ,Grant status 19" "No interrupt,Interrupt" bitfld.long 0x00 18. " GNT_18 ,Grant status 18" "No interrupt,Interrupt" bitfld.long 0x00 17. " GNT_17 ,Grant status 17" "No interrupt,Interrupt" bitfld.long 0x00 16. " GNT_16 ,Grant status 16" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " GNT_15 ,Grant status 15" "No interrupt,Interrupt" bitfld.long 0x00 14. " GNT_14 ,Grant status 14" "No interrupt,Interrupt" bitfld.long 0x00 13. " GNT_13 ,Grant status 13" "No interrupt,Interrupt" bitfld.long 0x00 12. " GNT_12 ,Grant status 12" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " GNT_11 ,Grant status 11" "No interrupt,Interrupt" bitfld.long 0x00 10. " GNT_10 ,Grant status 10" "No interrupt,Interrupt" bitfld.long 0x00 9. " GNT_9 ,Grant status 9" "No interrupt,Interrupt" bitfld.long 0x00 8. " GNT_8 ,Grant status 8" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " GNT_7 ,Grant status 7" "No interrupt,Interrupt" bitfld.long 0x00 6. " GNT_6 ,Grant status 6" "No interrupt,Interrupt" bitfld.long 0x00 5. " GNT_5 ,Grant status 5" "No interrupt,Interrupt" bitfld.long 0x00 4. " GNT_4 ,Grant status 4" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " GNT_3 ,Grant status 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " GNT_2 ,Grant status 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " GNT_1 ,Grant status 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " GNT_0 ,Grant status 0" "No interrupt,Interrupt" group.long 0x4C++0x03 line.long 0x00 "PRI_ICTLR_ARBGNT_COP_ENABLE_0,COP arbitration semaphore interrupt enable register" bitfld.long 0x00 31. " GER_31 ,Arbitration semaphore interrupt enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " GER_30 ,Arbitration semaphore interrupt enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " GER_29 ,Arbitration semaphore interrupt enable 29" "Disabled,Enabled" bitfld.long 0x00 28. " GER_28 ,Arbitration semaphore interrupt enable 28" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " GER_27 ,Arbitration semaphore interrupt enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " GER_26 ,Arbitration semaphore interrupt enable 26" "Disabled,Enabled" bitfld.long 0x00 25. " GER_25 ,Arbitration semaphore interrupt enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " GER_24 ,Arbitration semaphore interrupt enable 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " GER_23 ,Arbitration semaphore interrupt enable 23" "Disabled,Enabled" bitfld.long 0x00 22. " GER_22 ,Arbitration semaphore interrupt enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " GER_21 ,Arbitration semaphore interrupt enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " GER_20 ,Arbitration semaphore interrupt enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " GER_19 ,Arbitration semaphore interrupt enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " GER_18 ,Arbitration semaphore interrupt enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " GER_17 ,Arbitration semaphore interrupt enable 17" "Disabled,Enabled" bitfld.long 0x00 16. " GER_16 ,Arbitration semaphore interrupt enable 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " GER_15 ,Arbitration semaphore interrupt enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " GER_14 ,Arbitration semaphore interrupt enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " GER_13 ,Arbitration semaphore interrupt enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " GER_12 ,Arbitration semaphore interrupt enable 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " GER_11 ,Arbitration semaphore interrupt enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " GER_10 ,Arbitration semaphore interrupt enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " GER_9 ,Arbitration semaphore interrupt enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " GER_8 ,Arbitration semaphore interrupt enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " GER_7 ,Arbitration semaphore interrupt enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " GER_6 ,Arbitration semaphore interrupt enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " GER_5 ,Arbitration semaphore interrupt enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " GER_4 ,Arbitration semaphore interrupt enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " GER_3 ,Arbitration semaphore interrupt enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " GER_2 ,Arbitration semaphore interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " GER_1 ,Arbitration semaphore interrupt enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " GER_0 ,Arbitration semaphore interrupt enable 0" "Disabled,Enabled" tree.end width 0xb tree.end tree "Semaphores" tree "Arbitration Semaphores" base ad:0x60002000 width 15. group.long 0x00++0x03 line.long 0x00 "SMP_GNT_ST_0,Semaphore granted status register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " ARB_31 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " ARB_30 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " ARB_29 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " ARB_28 ,Semaphore granted status for processor" "Not granted,Granted" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " ARB_27 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " ARB_26 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " ARB_25 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " ARB_24 ,Semaphore granted status for processor" "Not granted,Granted" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " ARB_23 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " ARB_22 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " ARB_21 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " ARB_20 ,Semaphore granted status for processor" "Not granted,Granted" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " ARB_19 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " ARB_18 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " ARB_17 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " ARB_16 ,Semaphore granted status for processor" "Not granted,Granted" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " ARB_15 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " ARB_14 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ARB_13 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " ARB_12 ,Semaphore granted status for processor" "Not granted,Granted" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " ARB_11 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " ARB_10 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ARB_9 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " ARB_8 ,Semaphore granted status for processor" "Not granted,Granted" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ARB_7 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " ARB_6 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " ARB_5 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " ARB_4 ,Semaphore granted status for processor" "Not granted,Granted" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " ARB_3 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " ARB_2 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " ARB_1 ,Semaphore granted status for processor" "Not granted,Granted" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " ARB_0 ,Semaphore granted status for processor" "Not granted,Granted" rgroup.long 0x0C++0x03 line.long 0x00 "SMP_REQ_ST_0,Arbitration request pending status register" bitfld.long 0x00 31. " REQ_31 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 30. " REQ_30 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 29. " REQ_29 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 28. " REQ_28 ,Corresponding bit request pending status" "Not pending,Pending" textline " " bitfld.long 0x00 27. " REQ_27 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 26. " REQ_26 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 25. " REQ_25 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 24. " REQ_24 ,Corresponding bit request pending status" "Not pending,Pending" textline " " bitfld.long 0x00 23. " REQ_23 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 22. " REQ_22 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 21. " REQ_21 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 20. " REQ_20 ,Corresponding bit request pending status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " REQ_19 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 18. " REQ_18 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 17. " REQ_17 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 16. " REQ_16 ,Corresponding bit request pending status" "Not pending,Pending" textline " " bitfld.long 0x00 15. " REQ_15 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 14. " REQ_14 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 13. " REQ_13 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 12. " REQ_12 ,Corresponding bit request pending status" "Not pending,Pending" textline " " bitfld.long 0x00 11. " REQ_11 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 10. " REQ_10 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 9. " REQ_9 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 8. " REQ_8 ,Corresponding bit request pending status" "Not pending,Pending" textline " " bitfld.long 0x00 7. " REQ_7 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 6. " REQ_6 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 5. " REQ_5 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 4. " REQ_4 ,Corresponding bit request pending status" "Not pending,Pending" textline " " bitfld.long 0x00 3. " REQ_3 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 2. " REQ_2 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 1. " REQ_1 ,Corresponding bit request pending status" "Not pending,Pending" bitfld.long 0x00 0. " REQ_0 ,Corresponding bit request pending status" "Not pending,Pending" width 0xb tree.end tree "Resource Semaphores" base ad:0x60001000 width 15. group.long 0x00++0x03 line.long 0x00 "SMP_STA_0,Shared resource semaphore status register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP_31 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " SMP_30 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SMP_29 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SMP_28 ,Shared resource semaphore status bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " SMP_27 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SMP_26 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SMP_25 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " SMP_24 ,Shared resource semaphore status bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SMP_23 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SMP_22 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SMP_21 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " SMP_20 ,Shared resource semaphore status bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SMP_19 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SMP_18 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " SMP_17 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SMP_16 ,Shared resource semaphore status bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SMP_15 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " SMP_14 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SMP_13 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SMP_12 ,Shared resource semaphore status bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " SMP_11 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " SMP_10 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " SMP_9 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " SMP_8 ,Shared resource semaphore status bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SMP_7 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SMP_6 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SMP_5 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SMP_4 ,Shared resource semaphore status bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " SMP_3 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SMP_2 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SMP_1 ,Shared resource semaphore status bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SMP_0 ,Shared resource semaphore status bit" "Disabled,Enabled" textline " " group.long 0x10++0x03 line.long 0x00 "INBOX_0,Shared resource inbox" bitfld.long 0x00 31. " IE_IBF ,Interrupt CPU on INBOX Full" "Empty,Full" bitfld.long 0x00 30. " IE_IBE ,Interrupt COP on INBOX Empty" "Empty,Full" eventfld.long 0x00 29. " TAG ,TAG" "Invalid,Valid" bitfld.long 0x00 24.--27. " IN_BOX_STAT ,INBOX status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 17.--23. 1. " IN_BOX_CMD ,INBOX command" hexmask.long.tbyte 0x00 0.--16. 1. " IN_BOX_DATA ,INBOX data" group.long 0x20++0x03 line.long 0x00 "OUTBOX_0,Shared resource outbox" bitfld.long 0x00 31. " IE_OBF ,Interrupt CPU on OUTBOX Full" "Empty,Full" bitfld.long 0x00 30. " IE_OBE ,Interrupt COP on OUTBOX Empty" "Empty,Full" eventfld.long 0x00 29. " TAG ,TAG" "Invalid,Valid" bitfld.long 0x00 24.--27. " OUT_BOX_STAT ,OUTBOX status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 17.--23. 1. " OUT_BOX_CMD ,OUTBOX command" hexmask.long.tbyte 0x00 0.--16. 1. " OUT_BOX_DATA ,OUTBOX data" width 0xb tree.end tree.end tree "Clock And Reset Controller" base ad:0x60006000 width 33. tree "L, H & U Devices Reset Control" group.long 0x00++0x0F line.long 0x00 "RST_SOURCE_0,Reset Source Control" rbitfld.long 0x00 19. " WDT_CPU3_RST_STA ,CPU 3 reset by watchdog timer" "No,Yes" rbitfld.long 0x00 18. " WDT_CPU2_RST_STA ,CPU2 reset by watchdog timer" "No,Yes" textline " " rbitfld.long 0x00 17. " WDT_CPU1_RST_STA ,CPU1 reset by watchdog timer" "No,Yes" rbitfld.long 0x00 16. " WDT_CPU0_RST_STA ,CPU0 reset by watchdog timer" "No,Yes" textline " " rbitfld.long 0x00 13. " SWR_SYS_RST_STA ,System reset by SW" "No,Yes" rbitfld.long 0x00 12. " WDT_SYS_RST_STA ,System reset by watchdog timer" "No,Yes" textline " " rbitfld.long 0x00 11. " SWR_COP_RST_STA ,COP reset by SW" "No,Yes" rbitfld.long 0x00 10. " WDT_COP_RST_STA ,COP reset by watchdog timer" "No,Yes" textline " " rbitfld.long 0x00 9. " SWR_CPU_RST_STA ,CPU reset by SW" "No,Yes" rbitfld.long 0x00 8. " WDT_CPU_RST_STA ,CPU reset by watchdog timer" "No,Yes" textline " " bitfld.long 0x00 5. " WDT_EN ,Watchdog timer enable" "Disabled,Enabled" bitfld.long 0x00 4. " WDT_SEL ,Watchdog timer select" "Timer1,Timer2" textline " " bitfld.long 0x00 2. " WDT_SYS_RST_EN ,Watchdog timer reset for system enable" "Disabled,Enabled" bitfld.long 0x00 1. " WDT_COP_RST_EN ,Watchdog timer reset for COP enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " WDT_CPU_RST_EN ,Watchdog timer reset for CPU enable" "Disabled,Enabled" line.long 0x04 "RST_DEVICES_L_0,L Devices Reset Control" bitfld.long 0x04 31. " SWR_CACHE2_RST ,COP cache controller reset enable" "Disabled,Enabled" bitfld.long 0x04 28. " SWR_HOST1X_RST ,HOST1X reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " SWR_DISP1_RST ,DISP1 controller reset enable" "Disabled,Enabled" bitfld.long 0x04 26. " SWR_DISP2_RST ,DISP2 controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SWR_ISP_RST ,ISP controller reset enable" "Disabled,Enabled" bitfld.long 0x04 22. " SWR_USBD_RST ,USB controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " SWR_VI_RST ,VI controller reset enable" "Disabled,Enabled" bitfld.long 0x04 17. " SWR_PWM_RST ,Pulse width modulator reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " SWR_SDMMC4_RST ,SDMMC4 reset enable" "Disabled,Enabled" bitfld.long 0x04 14. " SWR_SDMMC1_RST ,SDMMC1 controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " SWR_I2C1_RST ,I2C1 controller reset enable" "Disabled,Enabled" bitfld.long 0x04 9. " SWR_SDMMC2_RST ,SDMMC2 controller reset enable" "Disabled,Enabled" textline " " rbitfld.long 0x04 8. " SWR_GPIO_RST ,GPIO controller reset enable" "Disabled,Enabled" bitfld.long 0x04 7. " SWR_UARTB_RST ,UARTB/VFIR controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " SWR_UARTA_RST ,UARTA controller reset enable" "Disabled,Enabled" rbitfld.long 0x04 5. " SWR_TMR_RST ,Reset Timer Controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " SWR_ISPB_RST ,ISPB controller reset enable" "Disabled,Enabled" bitfld.long 0x04 2. " SWR_TRIG_SYS_RST ,System reset signal pulse control" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SWR_COP_RST ,Force COP reset signal" "Disabled,Enabled" rbitfld.long 0x04 0. " SWR_CPU_RST ,Force CPU reset signal" "Disabled,Enabled" line.long 0x08 "RST_DEVICES_H_0,H devices reset control" bitfld.long 0x08 31. " SWR_BSEV_RST ,BSEV controller reset enable" "Disabled,Enabled" bitfld.long 0x08 26. " SWR_USB2_RST ,USB2 controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " SWR_EMC_RST ,EMC controller reset enable" "Disabled,Enabled" bitfld.long 0x08 24. " SWR_MIPI_CAL_RST ,MIPI CAL logic reset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " SWR_UARTC_RST ,UARTC controller reset enable" "Disabled,Enabled" bitfld.long 0x08 22. " SWR_I2C2_RST ,I2C2 controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " SWR_CSI_RST ,CSI controller reset enable" "Disabled,Enabled" bitfld.long 0x08 16. " SWR_DSI_RST ,DSI controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " SWR_I2C5_RST ,I2C5 controller reset enable" "Disabled,Enabled" bitfld.long 0x08 14. " SWR_SPI3_RST ,SPI 3 controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " SWR_SPI2_RST ,SPI 2 controller reset enable" "Disabled,Enabled" bitfld.long 0x08 9. " SWR_SPI1_RST ,SPI 1 controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " SWR_KFUSE_RST ,KFuse controller reset enable" "Disabled,Enabled" bitfld.long 0x08 5. " SWR_STAT_MON_RST ,Statistic monitor reset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " SWR_APBDMA_RST ,APB-DMA reset enable" "Disabled,Enabled" bitfld.long 0x08 1. " SWR_AHBDMA_RST ,AHB-DMA reset enable" "Disabled,Enabled" textline " " rbitfld.long 0x08 0. " SWR_MEM_RST ,MC reset enable" "Disabled,Enabled" line.long 0x0C "RST_DEVICES_U_0,U devices reset control" bitfld.long 0x0C 31. " SWR_XUSB_DEV_RST ,XUSB DEV reset enable" "Disabled,Enabled" bitfld.long 0x0C 25. " SWR_XUSB_HOST_RST ,XUSB HOST reset enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " SWR_EMUCIF_RST ,EMUCIF reset enable" "Disabled,Enabled" bitfld.long 0x0C 19. " SWR_TSEC_RST ,TSEC reset enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 18. " SWR_DSIB_RST ,DSIB reset enable" "Disabled,Enabled" bitfld.long 0x0C 17. " SWR_I2C_SLOW_RST ,I2C_SLOW reset enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 15. " SWR_DTV_RST ,DTV reset enable" "Disabled,Enabled" bitfld.long 0x0C 14. " SWR_SOC_THERM_RST ,SOC_THERM reset enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " SWR_PCIEXCLK_RST ,PCIEXCLK logic reset enable" "Disabled,Enabled" bitfld.long 0x0C 9. " SWR_CSITE_RST ,CoreSight controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " SWR_AFI_RST ,AFI controller reset enable" "Disabled,Enabled" bitfld.long 0x0C 6. " SWR_PCIE_RST ,PCIE controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " SWR_SDMMC3_RST ,SDMMC3 controller reset enable" "Disabled,Enabled" bitfld.long 0x0C 4. " SWR_SPI4_RST ,SPI4 controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " SWR_I2C3_RST ,I2C3 controller reset enable" "Disabled,Enabled" bitfld.long 0x0C 1. " SWR_UARTD_RST ,UARTD controller reset enable" "Disabled,Enabled" tree.end tree "L, H & U Devices Clock Control" group.long 0x10++0x0B line.long 0x00 "CLK_OUT_ENB_L_0,L devices clock control" bitfld.long 0x00 31. " CLK_ENB_CACHE2 ,COP cache controller clock enable" "Disabled,Enabled" bitfld.long 0x00 30. " CLK_ENB_I2S0 ,I2S 0 controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CLK_ENB_HOST1X ,HOST1X clock enable" "Disabled,Enabled" bitfld.long 0x00 27. " CLK_ENB_DISP1 ,DISP1 controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " CLK_ENB_DISP2 ,DISP2 controller clock enable" "Disabled,Enabled" bitfld.long 0x00 23. " CLK_ENB_ISP ,ISP controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " CLK_ENB_USBD ,USB controller clock enable" "Disabled,Enabled" bitfld.long 0x00 20. " CLK_ENB_VI ,VI controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CLK_ENB_I2S3 ,I2S3 controller clock enable" "Disabled,Enabled" bitfld.long 0x00 17. " CLK_ENB_PWM ,Pulse width modulator clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " CLK_ENB_SDMMC4 ,SDMMC4 clock enable" "Disabled,Enabled" bitfld.long 0x00 14. " CLK_ENB_SDMMC1 ,SDMMC1 controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " CLK_ENB_I2C1 ,I2C1 controller clock enable" "Disabled,Enabled" bitfld.long 0x00 11. " CLK_ENB_I2S2 ,I2S2 controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " CLK_ENB_SPDIF ,SPDIF controller clock enable" "Disabled,Enabled" bitfld.long 0x00 9. " CLK_ENB_SDMMC2 ,SDMMC2 Controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CLK_ENB_GPIO ,GPIO Controller clock enable" "Disabled,Enabled" bitfld.long 0x00 7. " CLK_ENB_UARTB ,UARTB/VFIR Controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CLK_ENB_UARTA ,UARTA Controller clock enable" "Disabled,Enabled" bitfld.long 0x00 5. " CLK_ENB_TMR ,Timer Controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CLK_ENB_RTC ,RTC Controller clock enable" "Disabled,Enabled" bitfld.long 0x00 3. " CLK_ENB_ISPB ,ISPB clock enable" "Disabled,Enabled" line.long 0x04 "CLK_OUT_ENB_H_0,H devices clock control" bitfld.long 0x04 31. " CLK_ENB_BSEV ,BSEV controller clock enable" "Disabled,Enabled" bitfld.long 0x04 26. " CLK_ENB_USB2 ,USB2 controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " CLK_ENB_EMC ,MC/EMC controller clock enable" "Disabled,Enabled" bitfld.long 0x04 24. " CLK_ENB_MIPI_CAL ,MIPI CAL logic clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " CLK_ENB_UARTC ,UARTC controller clock enable" "Disabled,Enabled" bitfld.long 0x04 22. " CLK_ENB_I2C2 ,I2C2 controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " CLK_ENB_CSI ,CSI controller clock enable" "Disabled,Enabled" bitfld.long 0x04 16. " CLK_ENB_DSI ,DSI controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " CLK_ENB_I2C5 ,I2C5 controller clock enable" "Disabled,Enabled" bitfld.long 0x04 14. " CLK_ENB_SPI3 ,SPI 3 controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " CLK_ENB_SPI2 ,SPI 2 controller clock enable" "Disabled,Enabled" bitfld.long 0x04 11. " CLK_ENB_JTAG2TBC ,JTAG2TBC interface clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " CLK_ENB_SPI1 ,SPI 1 controller clock enable" "Disabled,Enabled" bitfld.long 0x04 8. " CLK_ENB_KFUSE ,KFUSE controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " CLK_ENB_FUSE ,FUSE controller clock enable" "Disabled,Enabled" bitfld.long 0x04 6. " CLK_ENB_PMC ,PMC controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " CLK_ENB_STAT_MON ,Statistic monitor clock enable" "Disabled,Enabled" bitfld.long 0x04 2. " CLK_ENB_APBDMA ,APB-DMA clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CLK_ENB_AHBDMA ,AHB-DMA clock enable" "Disabled,Enabled" bitfld.long 0x04 0. " CLK_ENB_MEM ,MC clock enable" "Disabled,Enabled" line.long 0x08 "CLK_OUT_ENB_U_0,U devices clock control" bitfld.long 0x08 31. " CLK_ENB_XUSB_DEV ,XUSB DEV pad clock enable" "Disabled,Enabled" bitfld.long 0x08 30. " CLK_ENB_DEV1_OUT ,DEV1 pad clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " CLK_ENB_DEV2_OUT ,DEV2 pad clock enable" "Disabled,Enabled" bitfld.long 0x08 28. " CLK_ENB_SUS_OUT ,SUS pad clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 26. " CLK_M_DOUBLER_ENB ,CLK_M clock enable" "Disabled,Enabled" bitfld.long 0x08 25. " CLK_ENB_XUSB_HOST ,XUSB HOST clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 24. " CLK_ENB_CRAM2 ,BPMP-Lite cache RAM clock enable" "Disabled,Enabled" bitfld.long 0x08 23. " CLK_ENB_IRAMD ,IRAMD clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " CLK_ENB_IRAMC ,IRAMC clock enable" "Disabled,Enabled" bitfld.long 0x08 21. " CLK_ENB_IRAMB ,IRAMB engine clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " CLK_ENB_IRAMA ,IRAMA clock enable" "Disabled,Enabled" bitfld.long 0x08 19. " CLK_ENB_TSEC ,TSEC clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 18. " CLK_ENB_DSIB ,DSIB clock enable" "Disabled,Enabled" bitfld.long 0x08 17. " CLK_ENB_I2C_SLOW ,I2C_SLOW clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " CLK_ENB_DTV ,DTV controller clock enable" "Disabled,Enabled" bitfld.long 0x08 14. " CLK_ENB_SOC_THERM ,SOC_THERM controller clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CLK_ENB_CSITE ,Coresight clock enable" "Disabled,Enabled" bitfld.long 0x08 8. " CLK_ENB_AFI ,AFI clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " CLK_ENB_PCIE ,PCIE clock enable" "Disabled,Enabled" bitfld.long 0x08 5. " CLK_ENB_SDMMC3 ,SDMMC3 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " CLK_ENB_SPI4 ,SPI4 clock enable" "Disabled,Enabled" bitfld.long 0x08 3. " CLK_ENB_I2C3 ,I2C3 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " CLK_ENB_UARTD ,UARTD clock enable" "Disabled,Enabled" group.long 0x24++0x0F "CCLK & SCLK Control" line.long 0x00 "SUPER_CCLK_DIVIDER_0,CCLK super clock divider control" bitfld.long 0x00 31. " SUPER_CDIV_ENB ,Enable super clock divider" "Disabled,Enabled" bitfld.long 0x00 30. " SUPER_CDIV_USE_THERM_CONTROLS ,Enable therm control" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CCLK_INVERT_DCD ,Enable inversion of DCD" "Disabled,Enabled" bitfld.long 0x00 27. " SUPER_CDIV_DIS_FROM_COP_FIQ ,COP FIQ enable" "No,Yes" textline " " bitfld.long 0x00 26. " SUPER_CDIV_DIS_FROM_CPU_FIQ ,CPU FIQ enable" "No,Disabled" bitfld.long 0x00 25. " SUPER_CDIV_DIS_FROM_COP_IRQ ,COP IRQ enable" "No,Disabled" textline " " bitfld.long 0x00 24. " SUPER_CDIV_DIS_FROM_CPU_IRQ ,CPU IRQ enable" "No,Disabled" hexmask.long.byte 0x00 16.--23. 1. " CCLK_CLK_DIVISOR ,Clock divisor value" textline " " hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,Dividend value" hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,Divisor value" line.long 0x04 "SCLK_BURST_POLICY_0,SCLK clock control" bitfld.long 0x04 28.--31. " SYS_STATE ,CPU clock source" "STDBY,IDLE,RUN,RUN,IRQ,IRQ,IRQ,IRQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ" bitfld.long 0x04 27. " COP_AUTO_SWAKEUP_FROM_FIQ ,COP wake up from FIQ" "No,Yes" textline " " bitfld.long 0x04 26. " CPU_AUTO_SWAKEUP_FROM_FIQ ,CPU wake up from FIQ" "No,Yes" bitfld.long 0x04 25. " COP_AUTO_SWAKEUP_FROM_IRQ ,COP wake up from IRQ" "No,Yes" textline " " bitfld.long 0x04 24. " CPU_AUTO_SWAKEUP_FROM_IRQ ,CPU wake up from IRQ" "No,Yes" bitfld.long 0x04 12.--14. " SWAKEUP_FIQ_SOURCE ,FIQ source" "CLKM,PLLC_OUT1,PLLC4_OUT3,PLLP_OUT0,PLLP_OUT2,PLLC4_OUT1,CLK_S,PLLC4_OUT2" textline " " bitfld.long 0x04 8.--10. " SWAKEUP_IRQ_SOURCE ,IRQ source" "CLKM,PLLC_OUT1,PLLC4_OUT3/PLLP_OUT4,PLLP_OUT0,PLLP_OUT2,PLLC4_OUT1/PLLC_OUT0,CLK_SCLKS,PLLC4_OUT2" bitfld.long 0x04 4.--6. " SWAKEUP_RUN_SOURCE ,RUN source" "CLKM,PLLC_OUT1,PLLC4_OUT3/PLLP_OUT4,PLLP_OUT0,PLLP_OUT2,PLLC4_OUT1/PLLC_OUT0,CLK_SCLKS,PLLC4_OUT2" textline " " bitfld.long 0x04 0.--2. " SWAKEUP_IDLE_SOURCE ,IDLE source" "CLKM,PLLC_OUT1,PLLC4_OUT3/PLLP_OUT4,PLLP_OUT0,PLLP_OUT2,PLLC4_OUT1/PLLC_OUT0,CLK_SCLKS,PLLC4_OUT2" line.long 0x08 "SUPER_SCLK_DIVIDER_0,SCLK super clock divider control" bitfld.long 0x08 31. " SUPER_SDIV_ENB ,Enable super clock divider" "Disabled,Enabled" bitfld.long 0x08 27. " SUPER_SDIV_DIS_FROM_COP_FIQ ,COP FIQ enable" "Enabled,Disabled" textline " " bitfld.long 0x08 26. " SUPER_SDIV_DIS_FROM_CPU_FIQ ,CPU FIQ enable" "Enabled,Disabled" bitfld.long 0x08 25. " SUPER_SDIV_DIS_FROM_COP_IRQ ,COP IRQ enable" "Enabled,Disabled" textline " " bitfld.long 0x08 24. " SUPER_SDIV_DIS_FROM_CPU_IRQ ,CPU IRQ enable" "Enabled,Disabled" hexmask.long.byte 0x08 8.--15. 1. " SUPER_SDIV_DIVIDEND ,Dividend value" textline " " hexmask.long.byte 0x08 0.--7. 1. " SUPER_SDIV_DIVISOR ,Divisor value" line.long 0x0C "CLK_SYSTEM_RATE_0,Audio sync clock" bitfld.long 0x0C 7. " HCLK_DIS ,Disable HCLK" "No,Yes" bitfld.long 0x0C 4.--5. " AHB_RATE ,AHB clock rate" "1,1/2,1/3,1/4" textline " " bitfld.long 0x0C 3. " PCLK_DIS ,Disable PCLK" "No,Yes" bitfld.long 0x0C 0.--1. " APB_RATE ,APB clock rate" "1,1/2,1/3,1/4" group.long 0x44++0x07 line.long 0x00 "CLK_MASK_ARM_0,Clock masking" bitfld.long 0x00 16. " CLK_MASK_CPU_HALT ,CPU halt" "Not halted,Halted" textline " " bitfld.long 0x00 0.--1. " CLK_MASK_COP ,Clock masking" "Disabled,u2_nwait_r,u2_nwait_r,Disabled" line.long 0x04 "MISC_CLK_ENB_0,Misc clock" bitfld.long 0x04 22.--23. " DEV1_OSC_DIV_SEL ,DEV1 oscillator divide select" "osc,osc/2,osc/4,osc/8" bitfld.long 0x04 20.--21. " DEV2_OSC_DIV_SEL ,DEV1 oscillator divide select" "osc,osc/2,osc/4,osc/8" group.long 0x50++0x03 line.long 0x00 "OSC_CTRL_0,Oscillator control" bitfld.long 0x00 28.--31. " OSC_FREQ ,Oscillator frequency" "13 MHz,16.8 MHz,,,19.2 MHz,38.4 MHz,,,12 MHz,48 MHz,,,26 MHz,?..." bitfld.long 0x00 26.--27. " PLL_REF_DIV ,PLL reference clock divide" "/1,/2,/4,?..." textline " " hexmask.long.byte 0x00 18.--25. 1. " OSCFI_SPARE ,Crystal oscillator spare register" bitfld.long 0x00 12.--16. " XODS ,Crystal oscillator duty cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x00 4.--9. 1. " XOFS ,Crystal oscillator drive strength control" bitfld.long 0x00 2. " CLK_OK ,Crystal oscillator clk_ok" "0,1" textline " " bitfld.long 0x00 0. " XOE ,Crystal oscillator enable" "Disabled,Enabled" group.long 0x58++0x03 line.long 0x00 "OSC_FREQ_DET_0,Oscillator frequency detect" bitfld.long 0x00 31. " OSC_FREQ_DET_TRIG ,Osc frequency detect enable" "Disabled,Enabled" bitfld.long 0x00 0.--3. " REF_CLK_WIN_CFG ,Number of 32kHz clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x5C++0x03 line.long 0x00 "OSC_FREQ_DET_STATUS_0,Oscillator frequency detect status" bitfld.long 0x00 31. " OSC_FREQ_DET_BUSY ,Osc frequency detect status" "Not busy,Busy" hexmask.long.word 0x00 0.--15. 1. " OSC_FREQ_DET_CNT ,Number of osc count within the 32kHz clock" tree.end tree "PLL Control" group.long 0x68++0x07 line.long 0x00 "PLLE_SS_CNTL_0,PLLE_SS_CNTL_0 configuration" bitfld.long 0x00 30.--31. " PLLE_INTEGOFFSET ,Interpolator bias current" "0,1,2,3" bitfld.long 0x00 24.--29. " PLLE_SSCINCINTRV ,Triangle generator increment interval control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 16.--23. 1. " PLLE_SSCINC ,Triangle generator increment control" bitfld.long 0x00 15. " PLLE_SSCINVERT ,PLLE_SSCINVERT" "Down spread,Up-spread" textline " " bitfld.long 0x00 14. " PLLE_SSCCENTER ,Enables center spread" "Disabled,Enabled" bitfld.long 0x00 13. " PLLE_SSCPDMBYP ,Bypass from pulse density modulator" "0,1" textline " " bitfld.long 0x00 12. " PLLE_SSCBYP ,Spreading control" "Enabled,Disabled" bitfld.long 0x00 11. " PLLE_INTERP_RESET ,Interpolator reset" "Not reset,Reset" textline " " bitfld.long 0x00 10. " PLLE_BYPASS_SS ,When set feedback clock bypasses interpolator" "0,1" hexmask.long.word 0x00 0.--8. 1. " PLLE_SSCMAX ,Spread limit control" line.long 0x04 "PLLE_MISC1_0,PLLE_MISC1_0 configuration" bitfld.long 0x04 4. " PLLE_SDM_RESET ,SMD reset" "Not reset,Reset" bitfld.long 0x04 3. " PLLE_EN_DITHER2 ,DITHER2 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " PLLE_EN_DITHER ,DITHER enable" "Disabled,Enabled" bitfld.long 0x04 1. " PLLE_EN_SSC ,SSC enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " PLLE_EN_SDM ,SDM enable" "Disabled,Enabled" group.long 0x80++0x013 line.long 0x00 "PLLC_BASE_0,PLLC configuration" bitfld.long 0x00 31. " PLLC_BYPASS ,Bypass mode enable" "Disabled,Enabled" bitfld.long 0x00 30. " PLLC_ENABLE ,PLLC enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLC_REF_DIS ,Reference clock disable" "No,Yes" rbitfld.long 0x00 27. " PLLC_LOCK ,PLLC lock" "Not locked,Locked" textline " " rbitfld.long 0x00 26. " PLLC_LOCK ,PLLC lock" "Not locked,Locked" bitfld.long 0x00 20.--24. " PLLC_DIVP ,Post divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " hexmask.long.byte 0x00 10.--17. 1. " PLLC_DIVN ,PLL feedback divider" hexmask.long.byte 0x00 0.--7. 1. " PLLC_DIVM ,PLL input divider" line.long 0x04 "PLLC_OUT_0,PLLC_OUT configuration" bitfld.long 0x04 16. " PLLC_OUT1_DIV_BYP ,Divider bypass" "Glitchless,Not glitchless" hexmask.long.byte 0x04 8.--15. 1. " PLLC_OUT1_RATIO ,PLLC_OUT1 divider from base PLLC" textline " " bitfld.long 0x04 1. " PLLC_OUT1_CLKEN ,PLLC_OUT1 divider clock enable" "Disabled,Enabled" bitfld.long 0x04 0. " PLLC_OUT1_RSTN ,PLLC OUT1 divider reset" "Reset,Not reset" line.long 0x08 "PLLC_MISC_0,PLLC_MISC configuration" bitfld.long 0x08 30. " PLLC_RESET ,Reset for digital logic" "Disabled,Enabled" hexmask.long.word 0x08 4.--19. 1. " PLLC_EXT_FRU ,PLLC_EXT_FRU" textline " " bitfld.long 0x08 3. " PLLC_PTS ,Base PLLC test output select" "Disabled,FO" bitfld.long 0x08 0.--1. " PLLC_LOOP_CTRL ,PLLC loop control" "0,1,2,3" line.long 0x0C "PLLC_MISC_1_0,PLLC_MISC configuration" bitfld.long 0x0C 27. " PLLC_IDDQ ,PLLC_IDDQ" "OFF,ON" bitfld.long 0x0C 10.--13. " PLLC_EXT_SUBINT ,PLLC_EXT_SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PLLC_DIVN_FRAC ,PLLC_DIVN_FRAC" line.long 0x10 "PLLM_BASE_0,PLLM configuration" bitfld.long 0x10 31. " PLLM_BYPASS ,PLLM bypass" "Disabled,Enabled" bitfld.long 0x10 30. " PLLM_ENABLE ,PLLM enable" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " PLLM_REF_DIS ,PLLM reference clock disable" "No,Yes" rbitfld.long 0x10 27. " PLLM_LOCK ,PLLM lock status" "Not locked,Locked" textline " " rbitfld.long 0x10 26. " PLLM_FREQLOCK ,PLLM frequency lock status" "Not locked,Locked" bitfld.long 0x10 20.--24. " PLLM_DIVP ,Post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x10 8.--15. 1. " PLLM_DIVN ,PLL feedback divider" hexmask.long.byte 0x10 0.--7. 1. " PLLM_DIVM ,PLL input divider" group.long 0x98++0x03 line.long 0x00 "PLLM_MISC1_0,PLLM Misc configuration" hexmask.long.word 0x00 0.--15. 1. " PLLM_SETUP ,SETUP fields" group.long 0x9C++0x23 line.long 0x00 "PLLM_MISC2_0,PLLM Misc configuration" bitfld.long 0x00 13. " PLLM_OVERRIDE_SYNCMUX ,Overrides syncmux glltchless mechanism" "Not override,Override" bitfld.long 0x00 12. " PLLM_VCO_SEL ,Select b/w pllma,pllmb using sync mux ctrl" "pllma,pllmb" textline " " bitfld.long 0x00 11. " PLLM_SYNC_MUX_CTRL ,Controls clkoutp/n" "0,1" bitfld.long 0x00 10. " PLLM_ENABLE_SW_OVERRIDE ,Let software override values on clamp/bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PLLM_PTS ,PTS field for external mux" "0,FO" bitfld.long 0x00 8. " PLLMB_PTS ,PTS field for external mux" "0,FO" textline " " bitfld.long 0x00 6. " PLLM_EN_FSTLCK ,PLLM_EN_FSTLCK" "0,1" bitfld.long 0x00 5. " PLLM_IDDQ ,PLLM_IDDQ" "0,1" textline " " bitfld.long 0x00 4. " PLLM_EN_LCKDET ,Power down lock detect" "Disabled,Enabled" bitfld.long 0x00 3. " PLLM_LOCK_OVERRIDE ,Forces lock to 1" "Not override,Override" textline " " bitfld.long 0x00 1.--2. " PLLM_KCP ,Charge Pump Gain control" "0,1,2,3" bitfld.long 0x00 0. " PLLM_KVCO ,VCO gain" "0,1" line.long 0x04 "PLLP_BASE_0,PLLP configuration" bitfld.long 0x04 31. " PLLP_BYPASS ,PLLP bypass" "Disabled,Enabled" bitfld.long 0x04 30. " PLLP_ENABLE ,PLLP enable" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " PLLP_REF_DIS ,PLLP reference clock disable" "No,Yes" bitfld.long 0x04 28. " PLLP_BASE_OVERRIDE ,Base override control" "Disabled,Enabled" textline " " rbitfld.long 0x04 27. " PLLP_LOCK ,PLLP lock status" "Not locked,Locked" bitfld.long 0x04 20.--24. " PLLP_DIVP ,Post divider" "2^0,2^1,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29,2^30,2^31" textline " " hexmask.long.byte 0x04 10.--17. 1. " PLLP_DIVN ,PLL feedback divider" hexmask.long.byte 0x04 0.--7. 1. " PLLP_DIVM ,PLL input divider" line.long 0x08 "PLLP_OUTA_0,PLLP_OUTA configuration" hexmask.long.byte 0x08 8.--15. 1. " PLLP_OUT1_RATIO ,PLLP_OUT1 divider from base PLLM" bitfld.long 0x08 2. " PLLP_OUT1_OVERRIDE ,Ratio override" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " PLLP_OUT1_CLKEN ,Divider clock enable" "Disabled,Enabled" bitfld.long 0x08 0. " PLLP_OUT1_RSTN ,Divider reset" "Reset,Not reset" line.long 0x0C "PLLP_OUTB_0,PLLP_OUTB configuration" hexmask.long.byte 0x0C 24.--31. 1. " PLLP_OUT4_RATIO ,Divider from base PLLP" bitfld.long 0x0C 18. " PLLP_OUT4_OVERRIDE ,Ratio override" "Disabled,Enabled" textline " " bitfld.long 0x0C 17. " PLLP_OUT4_CLKEN ,Divider clock enable" "Disabled,Enabled" bitfld.long 0x0C 16. " PLLP_OUT4_RSTN ,Divider reset" "Reset,Not reset" textline " " hexmask.long.byte 0x0C 8.--15. 1. " PLLP_OUT3_RATIO ,PLLP_OUT3 divider from base PLLM" bitfld.long 0x0C 2. " PLLP_OUT3_OVERRIDE ,Ratio override" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " PLLP_OUT3_CLKEN ,Divider clock enable" "Disabled,Enabled" bitfld.long 0x0C 0. " PLLP_OUT3_RSTN ,Divider reset" "Reset,Not reset" line.long 0x10 "PLLP_MISC_0,PLLP Misc configuration" bitfld.long 0x10 27. " PLLP_OUT4_DIV_BYP ,PLLP_OUT4 divider bypass mode" "Disabled,Enabled" bitfld.long 0x10 26. " PLLP_OUT3_DIV_BYP ,PLLP_OUT3 divider bypass mode" "Disabled,Enabled" textline " " bitfld.long 0x10 24. " PLLP_OUT1_DIV_BYP ,PLLP_OUT1 divider bypass mode" "Disabled,Enabled" bitfld.long 0x10 22.--23. " PLLP_PTS ,Base PLLP test output select" "0,FO,VCO,0" textline " " bitfld.long 0x10 18. " PLLP_EN_LCKDET ,PLLP lock enable" "Disabled,Enabled" bitfld.long 0x10 17. " PLLP_LOCK_OVERRIDE ,Lock override" "Not override,Override" textline " " rbitfld.long 0x10 4. " PLLP_FREQLOCK ,PLLA frequency lock status" "Not locked,Locked" bitfld.long 0x10 3. " PLLP_IDDQ ,PLLP_IDDQ" "0,1" textline " " bitfld.long 0x10 2. " PLLP_KVCO ,Base PLLP VCO range setup control" "0,1" bitfld.long 0x10 0.--1. " PLLP_KCP ,PLLP_KCP" "0,1,2,3" line.long 0x14 "PLLA_BASE_0,PLLA configuration" bitfld.long 0x14 31. " PLLA_BYPASS ,PLLA bypass" "Disabled,Enabled" bitfld.long 0x14 30. " PLLA_ENABLE ,PLLA enable" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " PLLA_REF_DIS ,PLLA reference clock disable" "No,Yes" rbitfld.long 0x14 27. " PLLA_LOCK ,PLLA lock status" "Not locked,Locked" textline " " rbitfld.long 0x14 26. " PLLA_FREQLOCK ,PLLA frequency lock status" "Not locked,Locked" bitfld.long 0x14 25. " PLLA_IDDQ ,PLLA_IDDQ" "0,1" textline " " bitfld.long 0x14 20.--24. " PLLA_DIVP ,Post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x14 8.--15. 1. " PLLA_DIVN ,PLL feedback divider" textline " " hexmask.long.byte 0x14 0.--7. 1. " PLLA_DIVM ,PLL input divider" line.long 0x18 "PLLA_OUT_0,PLLA_OUT configuration" hexmask.long.byte 0x18 8.--15. 1. " PLLA_OUT0_RATIO ,PLLA_OUT0 divider from base PLLA" bitfld.long 0x18 1. " PLLA_OUT0_CLKEN ,Divider clock enable" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " PLLA_OUT0_RSTN ,Divider reset" "Reset,Not reset" line.long 0x1C "PLLA_MISC1_0,PLLA_MISC1_0 configuration" hexmask.long.word 0x1C 16.--31. 1. " PLLA_SDM_DIN_NEW ,PLLA_SDM_DIN_NEW" hexmask.long.word 0x1C 0.--15. 1. " PLLA_SDM_DIN ,PLLA_SDM_DIN" line.long 0x20 "PLLA_MISC_0,PLLA Misc configuration" bitfld.long 0x20 30. " PLLA_OUT0_DIV_BYP ,PLLA_OUT0 divider bypass mode" "Disabled,Enabled" bitfld.long 0x20 29. " PLLA_PTS ,Base PLLA test output select" "Disabled,FO" textline " " bitfld.long 0x20 28. " PLLA_EN_LCKDET ,PLLA_EN_LCKDET" "Disabled,Enabled" bitfld.long 0x20 27. " PLLA_LOCK_OVERRIDE ,Lock override" "Not override,Override" textline " " bitfld.long 0x20 25.--26. " PLLA_KCP ,Base PLLA charge pump setup control" "0,1,2,3" bitfld.long 0x20 24. " PLLA_KVCO ,Base PLLA VCO range setup control" "0,1" textline " " hexmask.long.tbyte 0x20 0.--23. 1. " PLLA_SETUP ,PLLA setup control" if (((per.l(ad:0x60006000+0xC0))&0x1000000)==0x1000000) group.long 0xC0++0x03 line.long 0x00 "PLLU_BASE_0,PLLU configuration" bitfld.long 0x00 31. " PLLU_BYPASS ,PLLU bypass" "Disabled,Enabled" bitfld.long 0x00 30. " PLLU_ENABLE ,PLLU enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLU_REF_DIS ,PLLU reference clock" "Enabled,Disabled" rbitfld.long 0x00 27. " PLLU_LOCK ,PLLU lock status" "Not locked,Locked" textline " " bitfld.long 0x00 25. " PLLU_CLKENABLE_48M ,FO_48M output enable" "Disabled,Enabled" bitfld.long 0x00 24. " PLLU_OVERRIDE ,PLLU override" "USB,PLLU_CLKENABLEs" textline " " bitfld.long 0x00 23. " PLLU_CLKENABLE_ICUSB ,FO_ICUSB output enable" "Disabled,Enabled" bitfld.long 0x00 22. " PLLU_CLKENABLE_HSIC ,FO_ICUSB output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " PLLU_CLKENABLE_USB ,FO_ICUSB output enable" "Disabled,Enabled" bitfld.long 0x00 16.--20. " PLLU_DIVP ,PLL divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x00 8.--15. 1. " PLLU_DIVN ,PLL feedback divider" hexmask.long.byte 0x00 0.--7. 1. " PLLU_DIVM ,PLL input divider" else group.long 0xC0++0x03 line.long 0x00 "PLLU_BASE_0,PLLU configuration" bitfld.long 0x00 31. " PLLU_BYPASS ,PLLU bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLU_REF_DIS ,PLLU reference clock" "Enabled,Disabled" rbitfld.long 0x00 27. " PLLU_LOCK ,PLLU lock status" "Not locked,Locked" textline " " bitfld.long 0x00 24. " PLLU_OVERRIDE ,PLLU override" "USB,PLLU_CLKENABLEs" textline " " textline " " bitfld.long 0x00 16.--20. " PLLU_DIVP ,PLL divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x00 8.--15. 1. " PLLU_DIVN ,PLL feedback divider" hexmask.long.byte 0x00 0.--7. 1. " PLLU_DIVM ,PLL input divider" endif group.long 0xC4++0x0B line.long 0x00 "PLLU_OUTA_0,PLLU OUTA_0 configuration" hexmask.long.byte 0x00 24.--31. 1. " PLLU_OUT2_RATIO ,PLLU_OUT2 divider from base" bitfld.long 0x00 18. " PLLU_OUT2_OVRRIDE ,PLLU_OUT2 ratio override" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " PLLU_OUT2_CLKEN ,PLLU_OUT2 divider clk enable" "Disabled,Enabled" bitfld.long 0x00 16. " PLLU_OUT2_RSTN ,PLLU_OUT2 divider reset" "Reset,Not reset" textline " " hexmask.long.byte 0x00 8.--15. 1. " PLLU_OUT1_RATIO ,PLLU_OUT1 divider from base" bitfld.long 0x00 2. " PLLU_OUT1_OVRRIDE ,PLLU_OUT1 ratio override" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PLLU_OUT1_CLKEN ,PLLU_OUT1 divider clk enable" "Disabled,Enabled" bitfld.long 0x00 0. " PLLU_OUT1_RSTN ,PLLU_OUT1 divider reset" "Reset,Not reset" line.long 0x04 "PLLU_MISC1_0,PLLU Misc1 configuration" bitfld.long 0x04 2. " PLLU_OUT2_DIV_BYP ,PLLU_OUT2 divider bypass" "Glitchless,Not glitchless" bitfld.long 0x04 1. " PLLU_OUT1_DIV_BYP ,PLLU_OUT1 divider bypass" "Glitchless,Not glitchless" textline " " bitfld.long 0x04 0. " PLLU_LOCK_OVERRIDE ,Lock override" "Not override,Override" line.long 0x08 "PLLU_MISC_0,PLLU Misc configuration" bitfld.long 0x08 31. " PLLU_IDDQ ,PLLU_IDDQ" "OFF,ON" rbitfld.long 0x08 30. " PLLU_FREQLOCK ,Frequency lock" "Not locked,Locked" textline " " bitfld.long 0x08 29. " PLLU_EN_LCKDET ,PLLU_EN_LCKDET" "Disabled,Enabled" bitfld.long 0x08 27.--28. " PLLU_PTS ,Base PLLU test output select" "0,VCO,FO,FO_ICUSB" textline " " bitfld.long 0x08 25.--26. " PLLU_KCP ,Base PLLU charge pump setup control" "0,1,2,3" bitfld.long 0x08 24. " PLLU_KVCO ,Base PLLU VCO gain settings" "0,1" textline " " hexmask.long.tbyte 0x08 0.--23. 1. " PLLU_SETUP ,Base PLLU setup control" group.long 0xD0++0x03 line.long 0x00 "PLLD_BASE_0,PLLD configuration" bitfld.long 0x00 31. " PLLD_BYPASS ,PLLD bypass" "Disabled,Enabled" bitfld.long 0x00 30. " PLLD_ENABLE ,PLLD enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLD_REF_DIS ,PLLD reference clock disable" "No,Yes" rbitfld.long 0x00 27. " PLLD_LOCK ,PLLD lock status" "Not locked,Locked" textline " " bitfld.long 0x00 25. " DSIA_CLK_SRC ,DSIA clock source" "PLL_D,PLL_D1" bitfld.long 0x00 23. " CSI_CLK_SRC ,CSI clock source" "Brick,PLL_D" textline " " bitfld.long 0x00 20.--22. " PLLD_DIVP ,Post divider" "1,2,4,8,16,32,64,128" hexmask.long.byte 0x00 11.--18. 1. " PLLD_DIVN ,PLL feedback divider" textline " " hexmask.long.byte 0x00 0.--7. 1. " PLLD_DIVM ,PLL input divider" group.long 0xD8++0x27 line.long 0x00 "PLLD_MISC1_0,PLLD Misc1 configuration" hexmask.long.tbyte 0x00 0.--23. 1. " PLLD_SETUP ,PLLD setup" line.long 0x04 "PLLD_MISC_0,PLLD Misc configuration" bitfld.long 0x04 27.--29. " PLLD_LDPULSE_ADJ ,Load pulse position adjust" "0,1,2,3,4,5,6,7" bitfld.long 0x04 25.--26. " PLLD_PTS ,Base PLLD test output select" "0,FO,0,0" textline " " bitfld.long 0x04 23.--24. " PLLD_KCP ,Base PLLD charge pump setup control" "0,1,2,3" bitfld.long 0x04 22. " PLLD_KVCO ,Base PLLD VCO range setup control" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " PLLD_ENABLE_CLK ,Controls the differential clock from PLLD to the DSI and CSI pads" "Disabled,Enabled" bitfld.long 0x04 20. " PLLD_IDDQ ,PLLD_IDDQ" "0,1" textline " " rbitfld.long 0x04 19. " PLLD_FREQLOCK ,PLLD_FREQLOCK" "0,1" bitfld.long 0x04 18. " PLLD_EN_LCKDET ,PLLD_EN_LCKDET" "0,1" textline " " bitfld.long 0x04 17. " PLLD_LOCK_OVERRIDE ,Lock select" "0,1" bitfld.long 0x04 16. " PLLD_EN_SDM ,PLLD_EN_SDM" "0,1" textline " " hexmask.long.word 0x04 0.--15. 1. " PLLD_SDM_DIN ,PLLD_SDM_DIN" line.long 0x08 "PLLX_BASE_0,PLLX configuration" bitfld.long 0x08 30. " PLLX_ENABLE ,PLLX enable" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " PLLX_REF_DIS ,PLLX reference clock disable" "No,Yes" rbitfld.long 0x08 27. " PLLX_LOCK ,PLLX lock status" "Not locked,Locked" textline " " bitfld.long 0x08 20.--24. " PLLA_DIVP ,Post divider" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648" hexmask.long.byte 0x08 8.--15. 1. " PLLA_DIVN ,PLL feedback divider" textline " " hexmask.long.byte 0x08 0.--7. 1. " PLLA_DIVM ,PLL input divider" line.long 0x0C "PLLX_MISC_0,PLLX Misc configuration" bitfld.long 0x0C 28. " PLLX_FO_G_DISABLE ,PLLX FO_G output disable" "ON,OFF" bitfld.long 0x0C 22.--23. " PLLX_PTS ,Base PLLX test output select" "0,FO,VCO,0" textline " " bitfld.long 0x0C 18. " PLLX_LOCK_ENABLE ,Lock enable" "Disabled,Enabled" line.long 0x10 "PLLE_BASE_0,PLLE configuration" bitfld.long 0x10 31. " PLLE_ENABLE ,PLL enable" "Disabled,Enabled" bitfld.long 0x10 30. " PLLE_LOCK_OVERRIDE ,Forces PLL Lock to 1" "No,Yes" textline " " bitfld.long 0x10 29. " PLLE_FDIV4B ,Clock divider value" "vclock/4,vclock/2" bitfld.long 0x10 24.--28. " PLLE_PLDIV_CML ,Divider control for CLOCKOUT_CML/CLOCKOUTB_CML" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x10 16.--23. 1. " PLLE_EXT_SETUP_23_16 ,Base PLLE setup [19:16]" hexmask.long.byte 0x10 8.--15. 1. " PLLE_NDIV ,Feedback divider" textline " " hexmask.long.byte 0x10 0.--7. 1. " PLLE_MDIV ,Input divider" line.long 0x14 "PLLE_MISC_0,PLLE Misc configuration" hexmask.long.word 0x14 16.--31. 1. " PLLE_SETUP ,Base PLLE setup [15:0]" bitfld.long 0x14 15. " PLLE_CLKENABLE ,Clock gate enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " PLLE_IDDQ_SWCTL ,PLLE_IDDQ software control" "OFF,ON" bitfld.long 0x14 13. " PLLE_IDDQ_OVERRIDE_VALUE ,PLLE_IDDQ override value" "OFF,ON" textline " " rbitfld.long 0x14 12. " PLLE_FREQLOCK ,PLLE_FREQLOCK" "Not achieved,Occurred" rbitfld.long 0x14 11. " PLLE_LOCK ,Lock status" "Not locked,Locked" textline " " bitfld.long 0x14 10. " PLLE_REF_DIS ,Reference clock disable" "No,Yes" bitfld.long 0x14 9. " PLLE_LOCK_ENABLE ,Lock enable" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " PLLE_PTS ,PTO value" "0,PLLE FO" bitfld.long 0x14 6.--7. " PLLE_KCP ,Base PLLE charge pump gain control" "0,1,2,3" textline " " bitfld.long 0x14 4.--5. " PLLE_VREG_BG_CTRL ,Base PLLE VREG BG control" "0,1,2,3" bitfld.long 0x14 2.--3. " PLLE_VREG_CTRL ,Base PLLE VREG control" "0,1,2,3" textline " " bitfld.long 0x14 0. " PLLE_KVCO ,Base PLLE VCO gain" "0,1" line.long 0x18 "PLLE_SS_CNTL1_0,PLLE_SS_CNTL1_0 configuration" hexmask.long.word 0x18 16.--31. 1. " PLLE_SDM_DIN ,PLLE_SDM_DIN" hexmask.long.word 0x18 0.--15. 1. " PLLE_SDM_SSC_STEP ,PLLE_SDM_SSC_STEP" line.long 0x1C "PLLE_SS_CNTL2_0,PLLE_SS_CNTL2_0 configuration" hexmask.long.word 0x1C 16.--31. 1. " PLLE_SDM_SSC_MAX ,PLLE_SDM_SSC_MAX" hexmask.long.word 0x1C 0.--15. 1. " PLLE_SDM_SSC_MIN ,PLLE_SDM_SSC_MIN" line.long 0x20 "LVL2_CLK_GATE_OVRA_0,LVL2_CLK_GATE_OVRA_0 configuration" bitfld.long 0x20 30. " PPCS_CLK_OVR_ON ,PPCS_CLK_OVR_ON" "Off,On" bitfld.long 0x20 28. " BSEV_CLK_OVR_ON ,BSEV_CLK_OVR_ON" "Off,On" textline " " bitfld.long 0x20 15. " VI_CLK_OVR_ON ,VI_CLK_OVR_ON" "Off,On" bitfld.long 0x20 13. " MPCORE_CLK_OVR_ON ,MPCORE_CLK_OVR_ON" "Off,On" textline " " bitfld.long 0x20 12. " MC_CLK_OVR_ON ,MC_CLK_OVR_ON" "Off,On" bitfld.long 0x20 10. " HC_RIF_CLK_OVR_ON ,HC_RIF_CLK_OVR_ON" "Off,On" textline " " bitfld.long 0x20 9. " HC_RDMA_CLK_OVR_ON ,HC_RDMA_CLK_OVR_ON" "Off,On" bitfld.long 0x20 8. " HC_INTFC_OVR_ON ,HC_INTFC_OVR_ON" "Off,On" textline " " bitfld.long 0x20 7. " HC_CLK_OVR_ON ,HC_CLK_OVR_ON" "Off,On" bitfld.long 0x20 6. " HC_CDMA_CLK_OVR_ON ,HC_CDMA_CLK_OVR_ON" "Off,On" textline " " bitfld.long 0x20 3. " EMC_CLK_OVR_ON ,EMC_CLK_OVR_ON" "Off,On" bitfld.long 0x20 2. " DCB_CLK_OVR_ON ,DCB_CLK_OVR_ON" "Off,On" textline " " bitfld.long 0x20 1. " DC_CLK_OVR_ON ,DC_CLK_OVR_ON" "Off,On" line.long 0x24 "LVL2_CLK_GATE_OVRB_0,LVL2_CLK_GATE_OVRB_0 configuration" bitfld.long 0x24 30. " SE_CLK_OVR_ON ,SE_CLK_OVR_ON" "Off,On" bitfld.long 0x24 28. " AFI_CLK_OVR_ON ,AFI_CLK_OVR_ON" "Off,On" textline " " bitfld.long 0x24 27. " MPCORELP_CLK_OVR_ON ,MPCORELP_CLK_OVR_ON" "Off,On" bitfld.long 0x24 26. " GR3D2_VPECLK_OVR_ON ,GR3D2_VPECLK_OVR_ON" "Off,On" textline " " bitfld.long 0x24 25. " GR3D2_TEXCLK_OVR_ON ,GR3D2_TEXCLK_OVR_ON" "Off,On" bitfld.long 0x24 24. " GR3D2_SETUPCLK_OVR_ON ,GR3D2_SETUPCLK_OVR_ON" "Off,On" textline " " bitfld.long 0x24 23. " GR3D2_QRASTCLK_OVR_ON ,GR3D2_QRASTCLK_OVR_ON" "Off,On" bitfld.long 0x24 22. " GR3D2_PSEQCLK_OVR_ON ,GR3D2_PSEQCLK_OVR_ON" "Off,On" textline " " bitfld.long 0x24 21. " GR3D2_IDXCLK_OVR_ON ,GR3D2_IDXCLK_OVR_ON" "Off,On" bitfld.long 0x24 20. " GR3D2_FDCCLK_OVR_ON ,GR3D2_FDCCLK_OVR_ON" "Off,On" textline " " bitfld.long 0x24 19. " GR3D2_DWRCLK_OVR_ON ,GR3D2_DWRCLK_OVR_ON" "Off,On" bitfld.long 0x24 18. " GR3D2_CLIPCLK_OVR_ON ,GR3D2_CLIPCLK_OVR_ON" "Off,On" textline " " bitfld.long 0x24 17. " GR3D2_ATRASTCLK_OVR_ON ,GR3D2_ATRASTCLK_OVR_ON" "Off,On" bitfld.long 0x24 16. " GR3D2_ALUCLK_OVR_ON ,GR3D2_ALUCLK_OVR_ON" "Off,On" textline " " bitfld.long 0x24 13. " USB1_CLK_OVR_ON ,USB1_CLK_OVR_ON" "Off,On" bitfld.long 0x24 11. " AVPC_CLK_OVR_ON ,AVPC_CLK_OVR_ON" "Off,On" textline " " bitfld.long 0x24 10. " USB2_CLK_OVR_ON ,USB2_CLK_OVR_ON" "Off,On" bitfld.long 0x24 1. " CSI_CLK_OVR_ON ,CSI_CLK_OVR_ON" "Off,On" group.long 0x3A0++0x07 line.long 0x00 "LVL2_CLK_GATE_OVRC_0,LVL2_CLK_GATE_OVRC_0 configuration" bitfld.long 0x00 31. " XUSB_DEV_CLK_OVR_ON ,XUSB_DEV_CLK_OVR_ON" "0,1" bitfld.long 0x00 30. " XUSB_HOST_CLK_OVR_ON ,XUSB_HOST_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 28. " TMS0_GRPCLK_CLK_OVR_ON ,TMS0_GRPCLK_CLK_OVR_ON" "0,1" bitfld.long 0x00 27. " SATA_12M_CLK_OVR_ON ,SATA_12M_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 26. " SATA_UFPCI_CLK_OVR_ON ,SATA_UFPCI_CLK_OVR_ON" "0,1" bitfld.long 0x00 25. " SATA_DFPCI_CLK_OVR_ON ,SATA_DFPCI_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 24. " SATA_CH1_RX_CLK_OVR_ON ,SATA_CH1_RX_CLK_OVR_ON" "0,1" bitfld.long 0x00 23. " SATA_CH1_TX_CLK_OVR_ON ,SATA_CH1_TX_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 22. " SATA_TX_CLK_OVR_ON ,SATA_TX_CLK_OVR_ON" "0,1" bitfld.long 0x00 21. " SATA_FPCI_CH1_CLK_OVR_ON ,SATA_FPCI_CH1_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 20. " SATA0_FPCI_CLK_OVR_ON ,SATA0_FPCI_CLK_OVR_ON" "0,1" bitfld.long 0x00 19. " SATA_FPCI_CLK_OVR_ON ,SATA_FPCI_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 18. " SATA_FPCI_ALWAYS_CLK_OVR_ON ,SATA_FPCI_ALWAYS_CLK_OVR_ON" "0,1" bitfld.long 0x00 17. " SATA_IPFS_CLK_OVR_ON ,SATA_IPFS_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 14. " SPI4_CLK_OVR_ON ,SPI4_CLK_OVR_ON" "0,1" bitfld.long 0x00 13. " SPI3_CLK_OVR_ON ,SPI3_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 12. " SPI2_CLK_OVR_ON ,SPI2_CLK_OVR_ON" "0,1" bitfld.long 0x00 11. " SPI1_CLK_OVR_ON ,SPI1_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 9. " MPCORE_MCCLK_OVR_ON ,Override clock-enables on the memory-clients for the G CPU" "0,1" bitfld.long 0x00 8. " TMS0_XCLK_CLK_OVR_ON ,TMS0_XCLK_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 7. " TMCS0_XTXCLK1X_CLK_OVR_ON ,TMCS0_XTXCLK1X_CLK_OVR_ON" "0,1" bitfld.long 0x00 6. " SDMMC4_CLK_OVR_ON ,SDMMC4_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 5. " SDMMC3_CLK_OVR_ON ,SDMMC3_CLK_OVR_ON" "0,1" bitfld.long 0x00 4. " SDMMC2_CLK_OVR_ON ,SDMMC2_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 3. " SDMMC1_CLK_OVR_ON ,SDMMC1_CLK_OVR_ON" "0,1" bitfld.long 0x00 2. " HDA_CLK_OVR_ON ,HDA_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 1. " AHUB_CLK_OVR_ON ,AHUB_CLK_OVR_ON" "0,1" bitfld.long 0x00 0. " SATA_CLK_OVR_ON ,SATA_CLK_OVR_ON" "0,1" line.long 0x04 "LVL2_CLK_GATE_OVRD_0,LVL2_CLK_GATE_OVRD_0 configuration" bitfld.long 0x04 31. " SDMMC4_LEGACY_TMCLK_OVR_ON ,SDMMC4_LEGACY_TMCLK_OVR_ON" "0,1" bitfld.long 0x04 30. " SDMMC3_LEGACY_TMCLK_OVR_ON ,SDMMC3_LEGACY_TMCLK_OVR_ON" "0,1" textline " " bitfld.long 0x04 29. " SDMMC2_LEGACY_TMCLK_OVR_ON ,SDMMC2_LEGACY_TMCLK_OVR_ON" "0,1" bitfld.long 0x04 28. " SDMMC1_LEGACY_TMCLK_OVR_ON ,SDMMC1_LEGACY_TMCLK_OVR_ON" "0,1" textline " " bitfld.long 0x04 27. " MPCORE_MSELECT_CLK_OVR_ON ,Override clock gating to the CPU cluster MSelectclock" "0,1" bitfld.long 0x04 26. " A9AVP_CLK_OVR_ON ,A9AVP_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x04 24. " QSPI_CLK_OVR_ON ,QSPI_CLK_OVR_ON" "0,1" bitfld.long 0x04 23. " TZRAM_CLK_OVR_ON ,TZRAM_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x04 22. " ISPB_CLK_OVR_ON ,ISPB_CLK_OVR_ON" "0,1" bitfld.long 0x04 21. " TSECB_CLK_OVR_ON ,On the MCCIF memory clients" "0,1" textline " " bitfld.long 0x04 20. " TSEC_CLK_OVR_ON ,On the MCCIF memory clients" "0,1" bitfld.long 0x04 19. " ARC_CLK_OVR_ON ,ARC_CLK_OVR_ON" "0,1" group.long 0x554++0x03 line.long 0x00 "LVL2_CLK_GATE_OVRE_0,LVL2_CLK_GATE_OVRE_0 configuration" bitfld.long 0x00 31. " NVDEC_CLK_OVR_ON ,NVDEC_CLK_OVR_ON" "0,1" bitfld.long 0x00 29. " NVENC_CLK_OVR_ON ,NVENC_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 27. " NVENC_WMVP_CLK_OVR_ON ,NVENC_WMVP_CLK_OVR_ON" "0,1" bitfld.long 0x00 26. " NVENC_RMVP_CLK_OVR_ON ,NVENC_RMVP_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 25. " NVENC_RHINT_CLK_OVR_ON ,NVENC_RHINT_CLK_OVR_ON" "0,1" bitfld.long 0x00 24. " NVENC_RCOL_CLK_OVR_ON ,NVENC_RCOL_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 23. " NVENC_PDMA_CLK_OVR_ON ,NVENC_PDMA_CLK_OVR_ON" "0,1" bitfld.long 0x00 22. " NVENC_MPEC_CLK_OVR_ON ,NVENC_MPEC_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 21. " NVENC_MPEB_CLK_OVR_ON ,NVENC_MPEB_CLK_OVR_ON" "0,1" bitfld.long 0x00 20. " NVENC_ME_CLK_OVR_ON ,NVENC_ME_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 19. " NVENC_MDP_CLK_OVR_ON ,NVENC_MDP_CLK_OVR_ON" "0,1" bitfld.long 0x00 18. " NVENC_HIST_CLK_OVR_ON ,NVENC_HIST_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 17. " NVENC_HHREG_CLK_OVR_ON ,NVENC_HHREG_CLK_OVR_ON" "0,1" bitfld.long 0x00 13. " ETR_CLK_OVR_ON ,ETR_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 12. " AXIAP_CLK_OVR_ON ,AXIAP_CLK_OVR_ON" "0,1" bitfld.long 0x00 11. " ADSP_CLK_OVR_ON ,ADSP_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 10. " APE_CLK_OVR_ON ,APE_CLK_OVR_ON" "0,1" bitfld.long 0x00 9. " NVJPG_CLK_OVR_ON ,NVJPG_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 8. " SOR1_CLK_OVR_ON ,SOR1_CLK_OVR_ON" "0,1" bitfld.long 0x00 7. " SOR0_CLK_OVR_ON ,SOR0_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 5. " VIC_CLK_OVR_ON ,VIC_CLK_OVR_ON" "0,1" bitfld.long 0x00 3. " ISP_CLK_OVR_ON ,ISP_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 2. " SATA_CH2_RX_CLK_OVR_ON ,SATA_CH2_RX_CLK_OVR_ON" "0,1" bitfld.long 0x00 1. " SATA_CH2_TX_CLK_OVR_ON ,SATA_CH2_TX_CLK_OVR_ON" "0,1" textline " " bitfld.long 0x00 0. " SATA_FPCI_CH2_CLK_OVR_ON ,SATA_FPCI_CH2_CLK_OVR_ON" "0,1" tree.end tree "L, H & U Devices Peripherals Control" group.long 0x100++0x13 line.long 0x00 "CLK_SOURCE_I2S2_0,Clock configuration for I2S2_0" bitfld.long 0x00 29.--31. " I2S2_CLK_SRC ,Clock source" "PLLA_OUT0,,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..." hexmask.long.byte 0x00 0.--7. 1. " I2S2_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_I2S3_0,Clock configuration for I2S3_0" bitfld.long 0x04 29.--31. " I2S3_CLK_SRC ,Clock source" "PLLA_OUT0,,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..." hexmask.long.byte 0x04 0.--7. 1. " I2S3_CLK_DIVISOR ,Clock divide value" line.long 0x08 "CLK_SOURCE_SPDIF_OUT_0,Clock configuration for SPDIFOUT" bitfld.long 0x08 29.--31. " SPDIFOUT_CLK_SRC ,Clock source" "PLLA_OUT0,,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..." hexmask.long.byte 0x08 0.--7. 1. " SPDIFOUT_CLK_DIVISOR ,Clock divide value" line.long 0x0C "CLK_SOURCE_SPDIF_IN_0,Clock configuration for SPDIFIN" bitfld.long 0x0C 29.--31. " SPDIF_IN_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,CLK_M,PLLC4_OUT1,PLLC4_OUT2" hexmask.long.byte 0x0C 0.--7. 1. " SPDIFIN_CLK_DIVISOR ,Clock divide value" line.long 0x10 "CLK_SOURCE_PWM_0,Clock configuration for PWM" bitfld.long 0x10 29.--31. " SPDIFOUT_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,CLK_S,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x10 0.--7. 1. " SPDIFOUT_CLK_DIVISOR ,Clock divide value" group.long 0x118++0x07 line.long 0x00 "CLK_SOURCE_SPI2_0,Clock configuration for SPI2" bitfld.long 0x00 29.--31. " SPI2_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x00 0.--7. 1. " SPI2_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_SPI3_0,Clock configuration for SPI3" bitfld.long 0x04 29.--31. " SPI3_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x04 0.--7. 1. " SPI3_CLK_DIVISOR ,Clock divide value" group.long 0x124++0x07 line.long 0x00 "CLK_SOURCE_I2C1_0,Clock configuration for I2C1" bitfld.long 0x00 29.--31. " I2C1_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.word 0x00 0.--15. 1. " I2C1_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_DVC_I2C5_0,Clock configuration for DVC_I2C5" bitfld.long 0x04 29.--31. " DVC_I2C5_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.word 0x04 0.--15. 1. " DVC_I2C5_CLK_DIVISOR ,Clock divide value" group.long 0x134++0x0B line.long 0x00 "CLK_SOURCE_SPI1_0,Clock configuration for SPI1" bitfld.long 0x00 29.--31. " SPI1_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x00 0.--7. 1. " SPI1_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_DISP1_0,Clock configuration for DISP1" bitfld.long 0x04 29.--31. " DISP1_CLK_SRC ,Clock source" "PLLP_OUT0,PLLD_OUT,PLLD_OUT0,,,PLLD2_OUT0,CLK_M,?..." line.long 0x08 "CLK_SOURCE_DISP2_0,Clock configuration for DISP2" bitfld.long 0x08 29.--31. " DISP2_CLK_SRC ,Clock source" "PLLP_OUT0,,PLLD_OUT0,,,PLLD2_OUT0,CLK_M,?..." group.long 0x144++0x07 line.long 0x00 "CLK_SOURCE_ISP_0,Clock configuration for ISP" bitfld.long 0x00 29.--31. " ISP_CLK_SRC ,Clock source" ",PLLC_OUT0,PLLP_OUT0,PLLA1_OUT0,PLLC2_OUT0,PLLC3_OUT0,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x00 0.--7. 1. " ISP_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_VI_0,Clock configuration for VI" bitfld.long 0x04 29.--31. " CVE_CLK_SRC ,Clock source" ",PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,PLLP_OUT0,CLK_M,PLLA1_OUT0,PLLC4_OUT0" bitfld.long 0x04 25. " PD2VI_CLK_SEL ,PD2VI clock select" "PD2VI_CLK,VI_SENSOR_CLK" textline " " bitfld.long 0x04 24. " VI_CLK_SEL ,VI clock select" "Internal,External" hexmask.long.byte 0x04 0.--7. 1. " CVE_CLK_DIVISOR ,Clock divide value" group.long 0x150++0x07 line.long 0x00 "CLK_SOURCE_SDMMC1_0,Clock configuration for SDMMC1" bitfld.long 0x00 29.--31. " SDMMC1_CLK_SRC ,Clock source" "PLLP_OUT0,PLLA_OUT,PLLC_OUT0,PLLC4_OUT2,PLLM_OUT0,PLLE_OUT0,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x00 0.--7. 1. " SDMMC1_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_SDMMC2_0,Clock configuration for SDMMC2" bitfld.long 0x04 29.--31. " SDMMC2_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC4_OUT2_LJ,PLLC4_OUT0_LJ,PLLC4_OUT2,PLLC4_OUT1,PLLC4_OUT1_LJ,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x04 0.--7. 1. " SDMMC2_CLK_DIVISOR ,Clock divide value" group.long 0x164++0x03 line.long 0x00 "CLK_SOURCE_SDMMC4_0,Clock configuration for SDMMC4" bitfld.long 0x00 29.--31. " SDMMC4_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC4_OUT2_LJ,PLLC4_OUT0_LJ,PLLC4_OUT2,PLLC4_OUT1,PLLC4_OUT1_LJ,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x00 0.--7. 1. " SDMMC4_CLK_DIVISOR ,Clock divide value" group.long 0x178++0x0B line.long 0x00 "CLK_SOURCE_UARTA_0,Clock configuration for UARTA" bitfld.long 0x00 29.--31. " UARTA_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" bitfld.long 0x00 24. " UARTA_DIV_ENB ,Divisor select" "UART DLM/DLL,UARTA_CLK_DIVISOR" textline " " hexmask.long.word 0x00 0.--15. 1. " UARTA_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_UARTB_0,Clock configuration for UARTB" bitfld.long 0x04 29.--31. " UARTB_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" bitfld.long 0x04 24. " UARTB_DIV_ENB ,Divisor select" "UART DLM/DLL,UARTB_CLK_DIVISOR" textline " " hexmask.long.word 0x04 0.--15. 1. " UARTB_CLK_DIVISOR ,Clock divide value" line.long 0x08 "CLK_SOURCE_HOST1X_0,Clock configuration for HOST1X" bitfld.long 0x08 29.--31. " HOST1X_CLK_SRC ,Clock source" "PLLC4_OUT1,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT2,PLLP_OUT0,CLK_M,PLLA_OUT0,PLLC4_OUT0" hexmask.long.byte 0x08 8.--15. 1. " HOST1X_IDLE_DIVISOR ,Idle divisor field" textline " " hexmask.long.byte 0x08 0.--7. 1. " HOST1X_CLK_DIVISOR ,Clock divide value" group.long 0x198++0x0B line.long 0x00 "CLK_SOURCE_I2C2_0,Clock configuration for I2C2" bitfld.long 0x00 29.--31. " I2C2_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.word 0x00 0.--15. 1. " I2C2_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_EMC_0,Clock configuration for EMC" bitfld.long 0x04 29.--31. " EMC_2X_CLK_SRC ,Clock source" "PLLM_OUT0,PLLC_OUT0,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD" bitfld.long 0x04 27. " FORCE_CC_TRIGGER ,Force a trigger of clock change sequence" "Not forced,Forced" textline " " bitfld.long 0x04 26. " EMC_INVERT_DCD , Enable inversion of DCD" "Disabled,Enabled" bitfld.long 0x04 25. " USE_32KHZ_AS_CLK_M ,USE_32KHZ_AS_CLK_M" "CLK_M,32kHz clock" textline " " bitfld.long 0x04 20. " PLLC_OUT_FOR_EMC_EN ,PLLC branch for EMC CLK switches" "Disabled,Enabled" bitfld.long 0x04 19. " PLLP_OUT_FOR_EMC_EN ,PLLP branch for EMC CLK switches" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " MC_EMC_SAME_FREQ ,MC frequency" "Disabled,Enabled" bitfld.long 0x04 15. " EMC_CLK_DIV2_EN ,EMC clock frequency" "DRAM,1/2 DRAM" textline " " hexmask.long.byte 0x04 0.--7. 1. " EMC_2X_CLK_DIVISOR ,Clock divide value" line.long 0x08 "CLK_SOURCE_UARTC_0,Clock configuration for UARTC" bitfld.long 0x08 29.--31. " UARTC_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" bitfld.long 0x08 24. " UARTC_DIV_ENB ,Divisor select" "UART DLM/DLL,UARTC_CLK_DIVISOR" textline " " hexmask.long.word 0x08 0.--15. 1. " UARTC_CLK_DIVISOR ,Clock divide value" group.long 0x1A8++0x03 line.long 0x00 "CLK_SOURCE_VI_SENSOR_0,Clock configuration for VI_SENSOR" bitfld.long 0x00 29.--31. " VI_SENSOR_CLK_SRC ,Clock source" ",PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,PLLP_OUT0,,PLLA_OUT0,?..." hexmask.long.byte 0x00 0.--7. 1. " VI_SENSOR_CLK_DIVISOR ,Clock divide value" group.long 0x1B4++0x0F line.long 0x00 "CLK_SOURCE_SPI4_0,Clock configuration for SPI4" bitfld.long 0x00 29.--31. " SPI4_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x00 0.--7. 1. " SPI4_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_I2C3_0,Clock configuration for I2C3" bitfld.long 0x04 29.--31. " I2C3_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.word 0x04 0.--15. 1. " I2C3_CLK_DIVISOR ,Clock divide value" line.long 0x08 "CLK_SOURCE_SDMMC3_0,Clock configuration for SDMMC3" bitfld.long 0x08 29.--31. " SDMMC3_CLK_SRC ,Clock source" "PLLP_OUT0,PLLA_OUT,PLLC_OUT0,PLLC4_OUT2,PLLC4_OUT1,PLLE_OUT0,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x08 0.--7. 1. " SDMMC3_CLK_DIVISOR ,Clock divide value" line.long 0x0C "CLK_SOURCE_UARTD_0,Clock configuration for UARTD" bitfld.long 0x0C 29.--31. " UARTD_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" bitfld.long 0x0C 24. " UARTD_DIV_ENB ,Divisor select" "UART DLM/DLL,UARTD_CLK_DIVISOR" textline " " hexmask.long.word 0x0C 0.--15. 1. " UARTD_CLK_DIVISOR ,Clock divide value" group.long 0x1D4++0x0B line.long 0x00 "CLK_SOURCE_CSITE_0,Clock configuration for CSITE" bitfld.long 0x00 29.--31. " CSITE_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,PLLREFE_OUT1,PLLA1_OUT0,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x00 0.--7. 1. " CSITE_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_I2S1_0,Clock configuration for I2S1" bitfld.long 0x04 29.--31. " I2S1_CLK_SRC ,Clock source" "PLLA_OUT0,,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..." hexmask.long.byte 0x04 0.--7. 1. " I2S1_CLK_DIVISOR ,Clock divide value" line.long 0x08 "CLK_SOURCE_DTV_0,Clock configuration for DTV" bitfld.long 0x08 25. " DTV_INV_CLK ,DTV clock inversion" "Not inverted,Inverted" group.long 0x1F4++0x03 line.long 0x00 "CLK_SOURCE_TSEC_0,Clock configuration for TSEC" bitfld.long 0x00 29.--31. " TSEC_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,PLLA1_OUT0,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x00 0.--7. 1. " TSEC_CLK_DIVISOR ,Clock divide value" group.long 0x280++0x03 line.long 0x00 "CLK_OUT_ENB_X_0_SET/CLR,X devices enable control" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " CLK_ENB_PLLG_REF ,Clock gate for reference clock branch going to PLLG" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CLK_ENB_PLLA_ADSP ,Clock gate for PLLA branch going to ADSP" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " CLK_ENB_PLLP_ADSP ,Clock gate for PLLP branch going to ADSP" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " CLK_ENB_HPLL_ADSP ,Clock gate for HPLL(PLLC/PLLC2/PLLC3) branches going to ADSP" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CLK_ENB_DBGAPB ,Enable clock - DBGAPB" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " CLK_ENB_GPU ,Enable clock - GPU" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " CLK_ENB_SOR1 ,Enable clock - SOR1" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CLK_ENB_SOR0 ,Enable clock - SOR0" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x04 21. 0x08 21. " CLK_ENB_DPAUX ,Enable clock - DPAUX" "Disabled,Enabled" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLK_ENB_VIC ,Enable clock - VIC" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CLK_ENB_UART_FST_MIPI_CAL ,Enable clock - UART_FST_MIPI_CAL" "Disabled,Enabled" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " CLK_ENB_EMC_DLL ,Enable clock - EMC DLL" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " CLK_ENB_VIM2_CLK ,Enable clock - CAMERA ifc 2" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CLK_ENB_MC_BBC ,Enable clock - MC BBC" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " CLK_ENB_MC_CPU ,Enable clock - MC CPU" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " CLK_ENB_MC_CBPA ,Enable clock - MC daisy chain2" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CLK_ENB_MC_CAPA ,Enable clock - MC daisy chain1" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CLK_ENB_I2C6 ,Enable clock - I2C6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " CLK_ENB_CAM_MCLK2 ,Enable clock - CAM_MCLK2" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CLK_ENB_CAM_MCLK ,Enable clock - CAM_MCLK" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CLK_ENB_ETR ,Enable ETR clk" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLK_ENB_DMIC2 ,Enable clock - DMIC2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLK_ENB_DMIC1 ,Enable clock - DMIC1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SPARE ,Enable clock - SPARE" "Disabled,Enabled" group.long 0x28C++0x03 line.long 0x00 "RST_DEVICES_X_0_SET/CLR,X devices reset control" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " SWR_GPU_RST ,Reset GPU" "Disabled,Enabled" setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SWR_SOR1_RST ,Reset SOR1 controller" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SWR_SOR0_RST ,Reset SOR0" "Disabled,Enabled" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SWR_DPAUX_RST ,Reset DPAUX" "Disabled,Enabled" textline " " setclrfld.long 0x00 18. 0x04 18. 0x08 18. " SWR_VIC_RST ,Reset VIC" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SWR_I2C6_RST ,Reset I2C6" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " SWR_ETR_RST ,Reset ETR logic" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SWR_SPARE_RST ,Reset SPARE" "Disabled,Enabled" group.long 0x298++0x03 line.long 0x00 "CLK_OUT_ENB_Y_0_SET/CLR,Y devices enable control" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CLK_ENB_PLLP_OUT_CPU ,Enable PLLP branches to CPU" "Disabled,Enabled" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " CLK_ENB_SOR_SAFE ,Enable SOR clk" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x04 29. 0x08 29. " CLK_ENB_IQC1 ,Enable IQC1 clk" "Disabled,Enabled" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CLK_ENB_IQC2 ,Enable IQC2 clk" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " CLK_ENB_NVENC ,Enable NVENC clk" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " CLK_ENB_ADSPNEON ,Enable ADSP neon clock" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. 0x04 20. 0x08 20. " CLK_ENB_UARTAPE ,Enable UART APE clock" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLK_ENB_QSPI ,Enable Quad SPI clk" "Disabled,Enabled" textline " " setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLK_ENB_USB2_TRK ,Enable USB2 Traking clock" "Disabled,Enabled" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " CLK_ENB_HSIC_TRK ,Enable HSIC Traking clock" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CLK_ENB_VI_I2C ,Enable HSIC Traking clock" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CLK_ENB_DPAUX1 ,Enable DPAUX1 clk" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " CLK_ENB_TSECB ,Enable TSECB clk" "Disabled,Enabled" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CLK_ENB_MAUD ,Enable maud clk" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " CLK_ENB_MC_CCPA ,Enable clock - MC daisy chain3" "Disabled,Enabled" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " CLK_ENB_MC_CDPA ,Enable clock - MC daisy chain4" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CLK_ENB_ADSP ,Enable ADSP clk" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CLK_ENB_APE ,Enable APE clk" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " CLK_ENB_DMIC3 ,Enable DMIC3 clk" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CLK_ENB_AXIAP ,Enable AXIAP clk" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CLK_ENB_NVJPG ,Enable NVJPG clk" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLK_ENB_NVDEC ,Enable NVDEC clk" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLK_ENB_SDMMC_LEGACY_TM ,Enable clock - sdmmc_legacy_tm" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SPARE1 ,Enable clock - SPARE" "Disabled,Enabled" group.long 0x2A4++0x03 line.long 0x00 "RST_DEVICES_Y_0_SET/CLR,Y devices reset control" setclrfld.long 0x00 27. 0x04 27. 0x08 27. " SWR_NVENC_RST ,Reset NVENC logic" "Disabled,Enabled" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SWR_ADSPNEON_RST ,Reset ADSP NEON logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SWR_ADSPSCU_RST ,Reset ADSP SCU logic" "Disabled,Enabled" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " SWR_ADSPWDT_RST ,Reset ADSP WDT logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " SWR_ADSPDBG_RST ,Reset ADSP DBG logic" "Disabled,Enabled" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SWR_ADSPPERIPH_RST ,Reset ADSP peripheral logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SWR_ADSPINTF_RST ,Reset ADSP Interface logic" "Disabled,Enabled" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SWR_QSPI_RST ,Reset Quad SPI logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SWR_VI_I2C_RST ,Reset I2C in VI" "Disabled,Enabled" setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SWR_DPAUX1_RST ,Reset DPAUX1 logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " SWR_TSECB_RST ,Reset TSECB logic" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SWR_PEX_USB_UPHY_RST ,Reset PEX_USB_PAD_PLL logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SWR_SATA_USB_UPHY_RST ,Reset SATA_USB_PAD_PLL logic" "Disabled,Enabled" setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SWR_ADSP_RST ,Reset ADSP CPU logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SWR_APE_RST ,Reset APE logic" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SWR_AXIAP_RST ,Reset AXIAP logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " SWR_NVJPG_RST ,Reset NVJPG logic" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SWR_NVDEC_RST ,Reset NVDEC logic" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SWR_SPARE1_RST ,Reset - SPARE" "Disabled,Enabled" group.long 0x2F4++0x03 line.long 0x00 "DFLL_BASE_0,DFLL base control" bitfld.long 0x00 0. " DVFS_DFLL_RESET ,Assert the reset to DFLL" "Disabled,Enabled" tree.end tree "L, H & U Devices Alternate Reset Control" group.long 0x300++0x17 line.long 0x00 "RST_DEV_L_SET_0,L devices set reset control" bitfld.long 0x00 31. " SET_CACHE2_RST ,Set reset BPMP-Lite cache controller" "Disabled,Enabled" bitfld.long 0x00 28. " SET_HOST1X_RST ,Set reset HOST1X" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " SET_DISP1_RST ,Set reset DISP1 controller" "Disabled,Enabled" bitfld.long 0x00 26. " SET_DISP2_RST ,Set reset DISP2 controller" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SET_ISP_RST ,Set reset ISP controller" "Disabled,Enabled" bitfld.long 0x00 22. " SET_USBD_RST ,Set reset USB controller" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SET_VI_RST ,Set reset VI controller" "Disabled,Enabled" bitfld.long 0x00 17. " SET_PWM_RST ,Set reset Pulse width modulator" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SET_SDMMC4_RST ,Set reset SDMMC4" "Disabled,Enabled" bitfld.long 0x00 14. " SET_SDMMC1_RST ,Set reset SDMMC1 controller" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SET_I2C1_RST ,Set reset I2C1 controller" "Disabled,Enabled" bitfld.long 0x00 9. " SET_SDMMC2_RST ,Set reset SDMMC2 Controller" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " SET_GPIO_RST ,Set reset GPIO Controller" "Disabled,Enabled" bitfld.long 0x00 7. " SET_UARTB_RST ,Set reset UARTB/VFIR Controller" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SET_UARTA_RST ,Set reset UARTA Controller" "Disabled,Enabled" bitfld.long 0x00 3. " SET_ISPB_RST ,Set reset - ISPB" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SET_TRIG_SYS_RST ,System reset signal pulse control" "Disabled,Enabled" bitfld.long 0x00 1. " SET_COP_RST ,Set reset COP" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " SET_CPU_RST ,Set reset CPU" "Disabled,Enabled" line.long 0x04 "RST_DEV_L_CLR_0,L devices clear reset control" bitfld.long 0x04 31. " CLR_CACHE2_RST ,Clear reset COP cache controller" "Disabled,Enabled" bitfld.long 0x04 28. " CLR_HOST1X_RST ,Clear reset HOST1X" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " CLR_DISP1_RST ,Clear reset DISP1 controller" "Disabled,Enabled" bitfld.long 0x04 26. " CLR_DISP2_RST ,Clear reset DISP2 controller" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " CLR_ISP_RST ,Clear reset ISP controller" "Disabled,Enabled" bitfld.long 0x04 22. " CLR_USBD_RST ,Clear reset USB controller" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " CLR_VI_RST ,Clear reset VI controller" "Disabled,Enabled" bitfld.long 0x04 17. " CLR_PWM_RST ,Clear reset Pulse width modulator" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " CLR_SDMMC4_RST ,Clear reset SDMMC4" "Disabled,Enabled" bitfld.long 0x04 14. " CLR_SDMMC1_RST ,Clear reset SDMMC1 controller" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " CLR_I2C1_RST ,Clear reset I2C1 controller" "Disabled,Enabled" bitfld.long 0x04 9. " CLR_SDMMC2_RST ,Clear reset SDMMC2 Controller" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " CLR_GPIO_RST ,Clear reset GPIO Controller" "Disabled,Enabled" bitfld.long 0x04 7. " CLR_UARTB_RST ,Clear reset UARTB/VFIR Controller" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " CLR_UARTA_RST ,Clear reset UARTA Controller" "Disabled,Enabled" bitfld.long 0x04 3. " CLR_ISPB_RST ,Clear reset - ISBP" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CLR_COP_RST ,Clear reset COP" "Disabled,Enabled" bitfld.long 0x04 0. " CLR_CPU_RST ,Clear reset CPU" "Disabled,Enabled" line.long 0x08 "RST_DEV_H_SET_0,H devices set reset control" bitfld.long 0x08 31. " SET_BSEV_RST ,Set reset BSEV controller" "Disabled,Enabled" bitfld.long 0x08 26. " SET_USB2_RST ,Set reset USB2 controller" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " SET_EMC_RST ,Set reset EMC controller" "Disabled,Enabled" bitfld.long 0x08 24. " SET_MIPI_CAL_RST ,Set reset for the MIPI CAL logic" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " SET_UARTC_RST ,Set reset UARTC controller" "Disabled,Enabled" bitfld.long 0x08 22. " SET_I2C2_RST ,Set reset I2C 2 controller" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " SET_CSI_RST ,Set reset CSI controller" "Disabled,Enabled" bitfld.long 0x08 16. " SET_DSI_RST ,Set reset DSI controller" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " SET_I2C5_RST ,Set reset I2C5 controller" "Disabled,Enabled" bitfld.long 0x08 14. " SET_SPI3_RST ,Set reset SPI 3 controller" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " SET_SPI2_RST ,Set reset SPI 2 controller" "Disabled,Enabled" bitfld.long 0x08 9. " SET_SPI1_RST ,Set reset SPI 1 controller" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " SET_KFUSE_RST ,Set reset KFuse controller" "Disabled,Enabled" bitfld.long 0x08 5. " SET_STAT_MON_RST ,Set reset Statistic monitor" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " SET_APBDMA_RST ,Set reset APB-DMA" "Disabled,Enabled" bitfld.long 0x08 1. " SET_AHBDMA_RST ,Set reset AHB-DMA" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " SET_MEM_RST ,Set reset MC" "Disabled,Enabled" line.long 0x0C "RST_DEV_H_CLR_0,H devices clear clear control" bitfld.long 0x0C 31. " CLR_BSEV_RST ,Clear reset BSEV controller" "Disabled,Enabled" bitfld.long 0x0C 26. " CLR_USB2_RST ,Clear reset USB2 controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " CLR_EMC_RST ,Clear reset EMC controller" "Disabled,Enabled" bitfld.long 0x0C 24. " CLR_MIPI_CAL_RST ,Clear reset for the MIPI CAL logic" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " CLR_UARTC_RST ,Clear reset UARTC controller" "Disabled,Enabled" bitfld.long 0x0C 22. " CLR_I2C2_RST ,Clear reset I2C 2 controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " CLR_CSI_RST ,Clear reset CSI controller" "Disabled,Enabled" bitfld.long 0x0C 16. " CLR_DSI_RST ,Clear reset DSI controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 15. " CLR_I2C_RST ,Clear reset I2C controller" "Disabled,Enabled" bitfld.long 0x0C 14. " CLR_SPI3_RST ,Clear reset SPI 3 controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " CLR_SPI2_RST ,Clear reset SPI 2 controller" "Disabled,Enabled" bitfld.long 0x0C 9. " CLR_SPI1_RST ,Clear reset SPI 1 controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " CLR_KFUSE_RST ,Clear reset KFuse controller" "Disabled,Enabled" bitfld.long 0x0C 5. " CLR_STAT_MON_RST ,Clear reset Statistic monitor" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " CLR_APBDMA_RST ,Clear reset APB-DMA" "Disabled,Enabled" bitfld.long 0x0C 1. " CLR_AHBDMA_RST ,Clear reset AHB-DMA" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " CLR_MEM_RST ,Clear reset MC" "Disabled,Enabled" line.long 0x10 "RST_DEV_U_SET_0,U devices set reset control" bitfld.long 0x10 31. " SET_XUSB_DEV_RST ,Set reset for the XUSB DEV logic" "Disabled,Enabled" bitfld.long 0x10 25. " SET_XUSB_HOST_RST ,Set reset for the XUSB HOST logic" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " SET_EMUCIF_RST ,Set reset for the EMUCIF logic" "Disabled,Enabled" bitfld.long 0x10 19. " SET_TSEC_RST ,Set reset for the TSEC logic" "Disabled,Enabled" textline " " bitfld.long 0x10 18. " SET_DSIB_RST ,Set reset DSIB" "Disabled,Enabled" bitfld.long 0x10 17. " SET_I2C_SLOW_RST ,Set reset I2C_SLOW" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET_DTV_RST ,Set reset DTV" "Disabled,Enabled" bitfld.long 0x10 14. " SET_SOC_THERM_RST ,Set reset for the SOC_THERM controller" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " SET_PCIEXCLK_RST ,Set reset PCIEXCLK logic" "Disabled,Enabled" bitfld.long 0x10 9. " SET_CSITE_RST ,Set reset CSITE controller" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " SET_AFI_RST ,Set reset AFI controller" "Disabled,Enabled" bitfld.long 0x10 6. " SET_PCIE_RST ,Set reset PCIE controller" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " SET_SDMMC3_RST ,Set reset SDMMC3 controller" "Disabled,Enabled" bitfld.long 0x10 4. " SET_SPI4_RST ,Set reset SPI4 controller" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " SET_I2C3_RST ,Set reset I2C3 controller" "Disabled,Enabled" bitfld.long 0x10 1. " SET_UARTD_RST ,Set reset UARTD controller" "Disabled,Enabled" line.long 0x14 "RST_DEV_U_CLR_0,U devices clear reset control" bitfld.long 0x14 31. " CLR_XUSB_DEV_RST ,Clear reset for the XUSB DEV logic" "Disabled,Enabled" bitfld.long 0x14 25. " CLR_XUSB_HOST_RST ,Clear reset for the XUSB HOST logic" "Disabled,Enabled" textline " " bitfld.long 0x14 23. " CLR_EMUCIF_RST ,Clear reset for the EMUCIF logic" "Disabled,Enabled" bitfld.long 0x14 19. " CLR_TSEC_RST ,Clear reset for the TSEC logic" "Disabled,Enabled" textline " " bitfld.long 0x14 18. " CLR_DSIB_RST ,Clear reset DSIB" "Disabled,Enabled" bitfld.long 0x14 17. " CLR_I2C_SLOW_RST ,Clear reset I2C_SLOW" "Disabled,Enabled" textline " " bitfld.long 0x14 15. " CLR_DTV_RST ,Clear reset DTV" "Disabled,Enabled" bitfld.long 0x14 14. " CLR_SOC_THERM_RST ,Clear reset for the SOC_THERM controller" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " CLR_PCIEXCLK_RST ,Clear reset PCIEXCLK logic" "Disabled,Enabled" bitfld.long 0x14 9. " CLR_CSITE_RST ,Clear reset CSITE controller" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " CLR_AFI_RST ,Clear reset AFI controller" "Disabled,Enabled" bitfld.long 0x14 6. " CLR_PCIE_RST ,Clear reset PCIE controller" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " CLR_SDMMC3_RST ,Clear reset SDMMC3 controller" "Disabled,Enabled" bitfld.long 0x14 4. " CLR_SPI4_RST ,Clear reset SPI4 controller" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " CLR_I2C3_RST ,Clear reset I2C3 controller" "Disabled,Enabled" bitfld.long 0x14 1. " CLR_UARTD_RST ,Clear reset UARTD controller" "Disabled,Enabled" tree.end tree "L, H & U Devices Alternate Clock Control" group.long 0x320++0x17 line.long 0x00 "CLK_ENB_L_SET_0,L devices set clock control" bitfld.long 0x00 31. " SET_CLK_ENB_CACHE2 ,Set enable clock to COP cache controller" "Disabled,Enabled" bitfld.long 0x00 30. " SET_CLK_ENB_I2S1 ,Set enable clock to I2S1 controller" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SET_CLK_ENB_HOST1X ,Set enable clock to HOST1X" "Disabled,Enabled" bitfld.long 0x00 27. " SET_CLK_ENB_DISP1 ,Set enable clock to DISP1 controller" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SET_CLK_ENB_DISP2 ,Set enable clock to DISP2 controller" "Disabled,Enabled" bitfld.long 0x00 23. " SET_CLK_ENB_ISP ,Set enable clock to ISP controller" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SET_CLK_ENB_USBD ,Set enable clock to USB controller" "Disabled,Enabled" bitfld.long 0x00 20. " SET_CLK_ENB_VI ,Set enable clock to VI controller" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " SET_CLK_ENB_I2S3 ,Set enable clock to I2S3 controller" "Disabled,Enabled" bitfld.long 0x00 17. " SET_CLK_ENB_PWM ,Set enable clock to Pulse width modulator" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SET_CLK_ENB_SDMMC4 ,Set enable clock to SDMMC4" "Disabled,Enabled" bitfld.long 0x00 14. " SET_CLK_ENB_SDMMC1 ,Set enable clock to SDMMC1 controller" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SET_CLK_ENB_I2C1 ,Set enable clock to I2C1 controller" "Disabled,Enabled" bitfld.long 0x00 11. " SET_CLK_ENB_I2S2 ,Set enable clock to I2S2 controller" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SET_CLK_ENB_SPDIF ,Set enable clock to SPDIF controller" "Disabled,Enabled" bitfld.long 0x00 9. " SET_CLK_ENB_SDMMC2 ,Set enable clock to SDMMC2 Controller" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " SET_CLK_ENB_GPIO ,Set enable clock to GPIO Controller" "Disabled,Enabled" bitfld.long 0x00 7. " SET_CLK_ENB_UARTB ,Set enable clock to UARTB/VFIR Controller" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SET_CLK_ENB_UARTA ,Set enable clock to UARTA Controller" "Disabled,Enabled" bitfld.long 0x00 5. " SET_CLK_ENB_TMR ,Set enable clock to Timer Controller" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SET_CLK_ENB_RTC ,Set enable clock to RTC Controller" "Disabled,Enabled" bitfld.long 0x00 3. " SET_CLK_ENB_ISPB ,Set enable clock - ISPB" "Disabled,Enabled" line.long 0x04 "CLK_ENB_L_CLR_0,L devices clear clock control" bitfld.long 0x04 31. " CLR_CLK_ENB_CACHE2 ,Clear enable clock to COP cache controller" "Disabled,Enabled" bitfld.long 0x04 30. " CLR_CLK_ENB_I2S1 ,Clear enable clock to I2S1 controller" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " CLR_CLK_ENB_HOST1X ,Clear enable clock to HOST1X" "Disabled,Enabled" bitfld.long 0x04 27. " CLR_CLK_ENB_DISP1 ,Clear enable clock to DISP1 controller" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " CLR_CLK_ENB_DISP2 ,Clear enable clock to DISP2 controller" "Disabled,Enabled" bitfld.long 0x04 23. " CLR_CLK_ENB_ISP ,Clear enable clock to ISP controller" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " CLR_CLK_ENB_USBD ,Clear enable clock to USB controller" "Disabled,Enabled" bitfld.long 0x04 20. " CLR_CLK_ENB_VI ,Clear enable clock to VI controller" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " CLR_CLK_ENB_I2S3 ,Clear enable clock to I2S3 controller" "Disabled,Enabled" bitfld.long 0x04 17. " CLR_CLK_ENB_PWM ,Clear enable clock to Pulse width modulator" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " CLR_CLK_ENB_SDMMC4 ,Clear enable clock to SDMMC4" "Disabled,Enabled" bitfld.long 0x04 14. " CLR_CLK_ENB_SDMMC1 ,Clear enable clock to SDMMC1 controller" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " CLR_CLK_ENB_I2C1 ,Clear enable clock to I2C1 controller" "Disabled,Enabled" bitfld.long 0x04 11. " CLR_CLK_ENB_I2S2 ,Clear enable clock to I2S2 controller" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " CLR_CLK_ENB_SPDIF ,Clear enable clock to SPDIF controller" "Disabled,Enabled" bitfld.long 0x04 9. " CLR_CLK_ENB_SDMMC2 ,Clear enable clock to SDMMC2 Controller" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " CLR_CLK_ENB_GPIO ,Clear enable clock to GPIO Controller" "Disabled,Enabled" bitfld.long 0x04 7. " CLR_CLK_ENB_UARTB ,Clear enable clock to UARTB/VFIR Controller" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " CLR_CLK_ENB_UARTA ,Clear enable clock to UARTA Controller" "Disabled,Enabled" bitfld.long 0x04 5. " CLR_CLK_ENB_TMR ,Clear enable clock to Timer Controller" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " CLR_CLK_ENB_RTC ,Clear enable clock to RTC Controller" "Disabled,Enabled" bitfld.long 0x04 3. " CLR_CLK_ENB_ISPB ,Clear enable clock - ISPB" "Disabled,Enabled" line.long 0x08 "CLK_ENB_H_SET_0,H devices set clock control" bitfld.long 0x08 31. " SET_CLK_ENB_BSEV ,Set enable clock to BSEV controller" "Disabled,Enabled" bitfld.long 0x08 26. " SET_CLK_ENB_USB2 ,Set enable clock to USB2 controller" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " SET_CLK_ENB_EMC ,Set enable clock to MC/EMC controller" "Disabled,Enabled" bitfld.long 0x08 24. " SET_CLK_ENB_MIPI_CAL ,Set enable clock to MIPI CAL logic" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " SET_CLK_ENB_UARTC ,Set enable clock to UARTC controller" "Disabled,Enabled" bitfld.long 0x08 22. " SET_CLK_ENB_I2C2 ,Set enable clock to I2C2 controller" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " SET_CLK_ENB_CSI ,Set enable clock to CSI controller" "Disabled,Enabled" bitfld.long 0x08 16. " SET_CLK_ENB_DSI ,Set enable clock to DSI controller" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " SET_CLK_ENB_I2C5 ,Set enable clock to I2C5 controller" "Disabled,Enabled" bitfld.long 0x08 14. " SET_CLK_ENB_SPI3 ,Set enable clock to SPI 3 controller" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " SET_CLK_ENB_SPI2 ,Set enable clock to SPI 2 controller" "Disabled,Enabled" bitfld.long 0x08 9. " SET_CLK_ENB_SPI1 ,Set enable clock to SPI 1 Controller" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " SET_CLK_ENB_KFUSE ,Set enable clock to KFUSE Controller" "Disabled,Enabled" bitfld.long 0x08 7. " SET_CLK_ENB_FUSE ,Set enable clock to FUSE Controller" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " SET_CLK_ENB_PMC ,Set enable clock to PMC Controller" "Disabled,Enabled" bitfld.long 0x08 5. " SET_CLK_ENB_STAT_MON ,Set enable clock to Statistic monitor" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " SET_CLK_ENB_APBDMA ,Set enable clock to APB-DMA" "Disabled,Enabled" bitfld.long 0x08 1. " SET_CLK_ENB_AHBDMA ,Set enable clock to AHB-DMA" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " SET_CLK_ENB_MEM ,Set enable clock to MC/EMC" "Disabled,Enabled" line.long 0x0C "CLK_ENB_H_CLR_0,H devices clear clock control" bitfld.long 0x0C 31. " CLEAR_CLK_ENB_BSEV ,Clear enable clock to BSEV controller" "Disabled,Enabled" bitfld.long 0x0C 26. " CLEAR_CLK_ENB_USB2 ,Clear enable clock to USB2 controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " CLEAR_CLK_ENB_EMC ,Clear enable clock to MC/EMC controller" "Disabled,Enabled" bitfld.long 0x0C 24. " CLEAR_CLK_ENB_MIPI_CAL ,Clear enable clock to MIPI CAL logic" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " CLEAR_CLK_ENB_UARTC ,Clear enable clock to UARTC controller" "Disabled,Enabled" bitfld.long 0x0C 22. " CLEAR_CLK_ENB_I2C2 ,Clear enable clock to I2C2 controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 20. " CLEAR_CLK_ENB_CSI ,Clear enable clock to CSI controller" "Disabled,Enabled" bitfld.long 0x0C 16. " CLEAR_CLK_ENB_DSI ,Clear enable clock to DSI controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 15. " CLEAR_CLK_ENB_I2C5 ,Clear enable clock to I2C5 controller" "Disabled,Enabled" bitfld.long 0x0C 14. " CLEAR_CLK_ENB_SPI3 ,Clear enable clock to SPI 3 controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " CLEAR_CLK_ENB_SPI2 ,Clear enable clock to SPI 2 controller" "Disabled,Enabled" bitfld.long 0x0C 9. " CLEAR_CLK_ENB_SPI1 ,Clear enable clock to SPI 1 Controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " CLEAR_CLK_ENB_KFUSE ,Clear enable clock to KFUSE Controller" "Disabled,Enabled" bitfld.long 0x0C 7. " CLEAR_CLK_ENB_FUSE ,Clear enable clock to FUSE Controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " CLEAR_CLK_ENB_PMC ,Clear enable clock to PMC Controller" "Disabled,Enabled" bitfld.long 0x0C 5. " CLEAR_CLK_ENB_STAT_MON ,Clear enable clock to Statistic monitor" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " CLEAR_CLK_ENB_APBDMA ,Clear enable clock to APB-DMA" "Disabled,Enabled" bitfld.long 0x0C 1. " CLEAR_CLK_ENB_AHBDMA ,Clear enable clock to AHB-DMA" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " CLEAR_CLK_ENB_MEM ,Clear enable clock to MC/EMC" "Disabled,Enabled" line.long 0x10 "CLK_ENB_U_SET_0,U devices set clock control" bitfld.long 0x10 31. " SET_CLK_ENB_XUSB_DEV ,Set enable clock to XUSB DEV" "Disabled,Enabled" bitfld.long 0x10 30. " SET_CLK_ENB_DEV1_OUT ,Set enable clock to DEV1 pad" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " SET_CLK_ENB_DEV2_OUT ,Set enable clock to DEV2 pad" "Disabled,Enabled" bitfld.long 0x10 28. " SET_CLK_ENB_SUS_OUT ,Set enable clock to SUS pad" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " SET_CLK_ENB_XUSB_HOST ,Set enable clock to XUSB HOST" "Disabled,Enabled" bitfld.long 0x10 24. " SET_CLK_ENB_CRAM2 ,Set enable clock to COP cache RAM" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " SET_CLK_ENB_IRAMD ,Set enable clock to IRAMD" "Disabled,Enabled" bitfld.long 0x10 22. " SET_CLK_ENB_IRAMC ,Set enable clock to IRAMC" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " SET_CLK_ENB_IRAMB ,Set enable clock to IRAMB engine" "Disabled,Enabled" bitfld.long 0x10 20. " SET_CLK_ENB_IRAMA ,Set enable clock to IRAMA" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " SET_CLK_ENB_TSEC ,Set enable clock for the TSEC clock" "Disabled,Enabled" bitfld.long 0x10 18. " SET_CLK_ENB_DSIB ,Set enable clock to DSIB" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " SET_CLK_ENB_I2C_SLOW ,Set enable clock to I2C_SLOW" "Disabled,Enabled" bitfld.long 0x10 15. " SET_CLK_ENB_DTV ,Set enable clock to DTV controller" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " SET_CLK_ENB_SOC_THERM ,Set enable clock to SOC_THERM controller" "Disabled,Enabled" bitfld.long 0x10 9. " SET_CLK_ENB_CSITE ,Set enable clock to CSITE" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " SET_CLK_ENB_AFI ,Set enable clock to AFI" "Disabled,Enabled" bitfld.long 0x10 6. " SET_CLK_ENB_PCIE ,Set enable clock to PCIE" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " SET_CLK_ENB_SDMMC3 ,Set enable clock to SDMMC3" "Disabled,Enabled" bitfld.long 0x10 4. " SET_CLK_ENB_SPI4 ,Set enable clock to SPI4" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " SET_CLK_ENB_I2C3 ,Set enable clock to I2C3" "Disabled,Enabled" bitfld.long 0x10 1. " SET_CLK_ENB_UARTD ,Set enable clock to UARTD" "Disabled,Enabled" line.long 0x14 "CLK_ENB_U_CLR_0,U devices clear clock control" bitfld.long 0x14 31. " CLR_CLK_ENB_XUSB_DEV ,Clear enable clock to XUSB DEV" "Disabled,Enabled" bitfld.long 0x14 30. " CLR_CLK_ENB_DEV1_OUT ,Clear enable clock to DEV1 pad" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " CLR_CLK_ENB_DEV2_OUT ,Clear enable clock to DEV2 pad" "Disabled,Enabled" bitfld.long 0x14 28. " CLR_CLK_ENB_SUS_OUT ,Clear enable clock to SUS pad" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " CLR_CLK_ENB_XUSB_HOST ,Clear enable clock to XUSB HOST" "Disabled,Enabled" bitfld.long 0x14 24. " CLR_CLK_ENB_CRAM2 ,Clear enable clock to COP cache RAM" "Disabled,Enabled" textline " " bitfld.long 0x14 23. " CLR_CLK_ENB_IRAMD ,Clear enable clock to IRAMD" "Disabled,Enabled" bitfld.long 0x14 22. " CLR_CLK_ENB_IRAMC ,Clear enable clock to IRAMC" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " CLR_CLK_ENB_IRAMB ,Clear enable clock to IRAMB engine" "Disabled,Enabled" bitfld.long 0x14 20. " CLR_CLK_ENB_IRAMA ,Clear enable clock to IRAMA" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " CLR_CLK_ENB_TSEC ,Clear enable clock for the TSEC clock" "Disabled,Enabled" bitfld.long 0x14 18. " CLR_CLK_ENB_DSIB ,Clear enable clock to DSIB" "Disabled,Enabled" textline " " bitfld.long 0x14 17. " CLR_CLK_ENB_I2C_SLOW ,Clear enable clock to I2C_SLOW" "Disabled,Enabled" bitfld.long 0x14 15. " CLR_CLK_ENB_DTV ,Clear enable clock to DTV controller" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " CLR_CLK_ENB_SOC_THERM ,Clear enable clock to SOC_THERM controller" "Disabled,Enabled" bitfld.long 0x14 9. " CLR_CLK_ENB_CSITE ,Clear enable clock to CSITE" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " CLR_CLK_ENB_AFI ,Clear enable clock to AFI" "Disabled,Enabled" bitfld.long 0x14 6. " CLR_CLK_ENB_PCIE ,Clear enable clock to PCIE" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " CLR_CLK_ENB_SDMMC3 ,Clear enable clock to SDMMC3" "Disabled,Enabled" bitfld.long 0x14 4. " CLR_CLK_ENB_SPI4 ,Clear enable clock to SPI4" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " CLR_CLK_ENB_I2C3 ,Clear enable clock to I2C3" "Disabled,Enabled" bitfld.long 0x14 1. " CLR_CLK_ENB_UARTD ,Clear enable clock to UARTD" "Disabled,Enabled" tree.end tree "CPU Complex Control" group.long 0x33C++0x07 line.long 0x00 "CCPLEX_PG_SM_OVRD_0,CCPLEX Power Gate State-Machine Overrides" bitfld.long 0x00 21. " CLKSTOP_OVRD_FCPU_RAIL ,Clamp the corresponding clocks for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 20. " CLKSTOP_OVRD_FCPU_NC ,Clamp the corresponding clocks for the active cluster at the time" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " CLKSTOP_OVRD_FCPU_3 ,Clamp the corresponding clocks for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 18. " CLKSTOP_OVRD_FCPU_2 ,Clamp the corresponding clocks for the active cluster at the time" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CLKSTOP_OVRD_FCPU_1 ,Clamp the corresponding clocks for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 16. " CLKSTOP_OVRD_FCPU_0 ,Clamp the corresponding clocks for the active cluster at the time" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RST_OVRD_FCPU_RAIL ,Assert the corresponding reset for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 12. " RST_OVRD_FCPU_NC ,Assert the corresponding reset for the active cluster at the time" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RST_OVRD_FCPU_3 ,Assert the corresponding reset for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 10. " RST_OVRD_FCPU_2 ,Assert the corresponding reset for the active cluster at the time" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RST_OVRD_FCPU_1 ,Assert the corresponding reset for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 8. " RST_OVRD_FCPU_0 ,Assert the corresponding reset for the active cluster at the time" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EN_RST_CG_OVRD_FCPU_RAIL ,Select the OVRD controls in this register for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 4. " EN_RST_CG_OVRD_FCPU_NC ,Select the OVRD controls in this register for the active cluster at the time" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EN_RST_CG_OVRD_FCPU_3 ,Select the OVRD controls in this register for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 2. " EN_RST_CG_OVRD_FCPU_2 ,Select the OVRD controls in this register for the active cluster at the time" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EN_RST_CG_OVRD_FCPU_1 ,Select the OVRD controls in this register for the active cluster at the time" "Disabled,Enabled" bitfld.long 0x00 0. " EN_RST_CG_OVRD_FCPU_0 ,Select the OVRD controls in this register for the active cluster at the time" "Disabled,Enabled" line.long 0x04 "RST_CPU_CMPLX_SET_0,Reset CPU complex set control" bitfld.long 0x04 30. " SET_PRESETDBG ,Assert nPRESETDBG to the debug APB interface" "Disabled,Enabled" bitfld.long 0x04 29. " SET_SCURESET ,Assert reset to the whole nonCPU region of the CPU" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " SET_L2RESET ,Assert nL2RESET to the CPU" "Disabled,Enabled" bitfld.long 0x04 19. " SET_CORERESET3 ,Assert nCORERESET to CPU3" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " SET_CORERESET2 ,Assert nCORERESET to CPU2" "Disabled,Enabled" bitfld.long 0x04 17. " SET_CORERESET1 ,Assert nCORERESET to CPU1" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " SET_CORERESET0 ,Assert nCORERESET to CPU0" "Disabled,Enabled" bitfld.long 0x04 3. " SET_CPURESET3 ,Assert nCPURESET to CPU3" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " SET_CPURESET2 ,Assert nCPURESET to CPU2" "Disabled,Enabled" bitfld.long 0x04 1. " SET_CPURESET1 ,Assert nCPURESET to CPU1" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " SET_CPURESET0 ,Assert nCPURESET to CPU0" "Disabled,Enabled" tree.end tree "V & W Devices Control" group.long 0x358++0x0F line.long 0x00 "RST_DEVICES_V_0,V devices reset control" bitfld.long 0x00 29. " SWR_HDA_RST ,High Def Audio reset enable" "Disabled,Enabled" bitfld.long 0x00 28. " SWR_SATA_RST ,SATA reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SWR_ACTMON_RST ,ACTMON reset enable" "Disabled,Enabled" bitfld.long 0x00 16. " SWR_ATOMICS_RST ,ATOMICS reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SWR_HDA2CODEC_2X_RST ,HDA2CODEC_2X reset enable" "Disabled,Enabled" bitfld.long 0x00 7. " SWR_I2C4_RST ,I2C4 Controller reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SWR_MSELECT_RST ,MSELECT reset enable" "Disabled,Enabled" line.long 0x04 "RST_DEVICES_W_0,W devices reset control" bitfld.long 0x04 28. " SWR_XUSB_SS_RST ,XUSB_SS reset enable" "Disabled,Enabled" bitfld.long 0x04 27. " SWR_DVFS_RST ,CLDVFS reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SWR_ENTROPY_RST ,Entropy reset enable" "Disabled,Enabled" bitfld.long 0x04 14. " SWR_XUSB_PADCTL_RST ,XUSB PADCTL reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " SWR_CEC_RST ,CEC reset enable" "Disabled,Enabled" bitfld.long 0x04 1. " SWR_SATACOLD_RST ,SATACOLD reset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " SWR_HDA2HDMICODEC_RST ,HDA2HDMICODEC reset enable" "Disabled,Enabled" line.long 0x08 "CLK_OUT_ENB_V_0,V devices clock control" bitfld.long 0x08 29. " CLK_ENB_HDA ,HDA clock enable" "Disabled,Enabled" bitfld.long 0x08 28. " CLK_ENB_SATA ,SATA clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " CLK_ENB_SATA_OOB ,SATA_OOB clock enable" "Disabled,Enabled" bitfld.long 0x08 26. " CLK_ENB_EXTPERIPH3 ,EXTPERIPH3 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " CLK_ENB_EXTPERIPH2 ,EXTPERIPH2 clock enable" "Disabled,Enabled" bitfld.long 0x08 24. " CLK_ENB_EXTPERIPH1 ,EXTPERIPH1 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " CLK_ENB_ACTMON ,ACTMON clock enable" "Disabled,Enabled" bitfld.long 0x08 22. " CLK_ENB_SPDIF_DOUBLER ,SPDIF audio sync clk doubler clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " CLK_ENB_ATOMICS ,ATOMICS clock enable" "Disabled,Enabled" bitfld.long 0x08 15. " CLK_ENB_HDA2CODEC_2X ,HDA2CODEC_2X clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " CLK_ENB_APB2APE ,APB2APE clock enable" "Disabled,Enabled" bitfld.long 0x08 10. " CLK_ENB_AHUB ,AHUB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " CLK_ENB_I2C4 ,I2C4 clock enable" "Disabled,Enabled" bitfld.long 0x08 6. " CLK_ENB_I2S5 ,I2S5 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " CLK_ENB_I2S4 ,I2S4 clock enable" "Disabled,Enabled" bitfld.long 0x08 4. " CLK_ENB_TSENSOR ,TSENSOR clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " CLK_ENB_MSELECT ,MSELECT clock enable" "Disabled,Enabled" bitfld.long 0x08 0. " CLK_ENB_CPUG ,CPUG clock enable" "Disabled,Enabled" line.long 0x0C "CLK_OUT_ENB_W_0,W devices clock control" bitfld.long 0x0C 30. " CLK_ENB_MC1 ,MC1 clock enable" "Disabled,Enabled" bitfld.long 0x0C 29. " CLK_ENB_EMC_LATENCY ,EMC clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 28. " CLK_ENB_XUSB_SS ,XUSB_SS clock enable" "Disabled,Enabled" bitfld.long 0x0C 27. " CLK_ENB_DVFS ,CLDVFS clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 21. " CLK_ENB_ENTROPY ,ENTROPY clock enable" "Disabled,Enabled" bitfld.long 0x0C 20. " CLK_ENB_DSIB_LP ,DSIB LP clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " CLK_ENB_DSIA_LP ,DSIA LP clock enable" "Disabled,Enabled" bitfld.long 0x0C 18. " CLK_ENB_CILEF ,CSI CILEF clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 17. " CLK_ENB_CILCD ,CSI CILC and CILD clock enable" "Disabled,Enabled" bitfld.long 0x0C 16. " CLK_ENB_CILAB ,CSI CILA and CILB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 15. " CLK_ENB_XUSB ,XUSB clock enable" "Disabled,Enabled" bitfld.long 0x0C 13. " CLK_ENB_MIPI_IOBIST ,MIPI IOBIST clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " CLK_ENB_SATA_IOBIST ,SATA IOBIST clock enable" "Disabled,Enabled" bitfld.long 0x0C 10. " CLK_ENB_EMC_IOBIST ,EMC IOBIST clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " CLK_ENB_PCIE2_IOBIST ,PCIE2 IOBIST clock enable" "Disabled,Enabled" bitfld.long 0x0C 8. " CLK_ENB_CEC ,CEC IOBIST clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " CLK_ENB_PCIERX5 ,PCIERX5 clock enable" "Disabled,Enabled" bitfld.long 0x0C 6. " CLK_ENB_PCIERX4 ,PCIERX4 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " CLK_ENB_PCIERX3 ,PCIERX3 clock enable" "Disabled,Enabled" bitfld.long 0x0C 4. " CLK_ENB_PCIERX2 ,PCIERX2 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " CLK_ENB_PCIERX1 ,PCIERX1 clock enable" "Disabled,Enabled" bitfld.long 0x0C 2. " CLK_ENB_PCIERX0 ,PCIERX0 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " CLK_ENB_HDA2HDMICODEC ,HDA2HDMICODEC clock enable" "Disabled,Enabled" tree.end tree "CCLKG & CCLKP Control" group.long 0x368++0x13 line.long 0x00 "CCLKG_BURST_POLICY_0,CCLKG clock control" bitfld.long 0x00 28.--31. " CPU_STATE ,CPU clock source" "STDBY,IDLE,RUN,RUN,IRQ,IRQ,IRQ,IRQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ" bitfld.long 0x00 27. " COP_AUTO_CWAKEUP_FROM_FIQ ,COP wake up from FIQ" "No,Yes" textline " " bitfld.long 0x00 26. " CPU_AUTO_CWAKEUP_FROM_FIQ ,CPU wake up from FIQ" "No,Yes" bitfld.long 0x00 25. " COP_AUTO_CWAKEUP_FROM_IRQ ,COP wake up from IRQ" "No,Yes" textline " " bitfld.long 0x00 24. " CPU_AUTO_CWAKEUP_FROM_IRQ ,CPU wake up from IRQ" "No,Yes" rbitfld.long 0x00 23. " TSENSOR_SLOWDOWN ,Temp sensor slowdown" "Normal,CPUG_CLK/2" textline " " bitfld.long 0x00 12.--15. " CWAKEUP_FIQ_SOURCE ,FIQ source" "CLKM,,CLKS,,PLLP_OUT0,PLLP_OUT4,,,PLLX_OUT0_LJ,DVFS_CPU_CLK,,,,,PLLX_OUT0,DVFS_CPU_CLK_LJ" bitfld.long 0x00 8.--11. " CWAKEUP_IRQ_SOURCE ,IRQ source" "CLKM,,CLKS,,PLLP_OUT0,PLLP_OUT4,,,PLLX_OUT0_LJ,DVFS_CPU_CLK,,,,,PLLX_OUT0,DVFS_CPU_CLK_LJ" textline " " bitfld.long 0x00 4.--7. " CWAKEUP_RUN_SOURCE ,RUN source" "CLKM,,CLKS,,PLLP_OUT0,PLLP_OUT4,,,PLLX_OUT0_LJ,DVFS_CPU_CLK,,,,,PLLX_OUT0,DVFS_CPU_CLK_LJ" bitfld.long 0x00 0.--3. " CWAKEUP_IDLE_SOURCE ,IDLE source" "CLKM,,CLKS,,PLLP_OUT0,PLLP_OUT4,,,PLLX_OUT0_LJ,DVFS_CPU_CLK,,,,,PLLX_OUT0,DVFS_CPU_CLK_LJ" line.long 0x04 "SUPER_CCLKG_DIVIDER_0,CCLKG super clock divider control" bitfld.long 0x04 31. " SUPER_CDIV_ENB ,Enable super clock divider" "Disabled,Enabled" bitfld.long 0x04 30. " SUPER_CDIV_USE_THERM_CONTROLS ,Use thermal controls for pulse skipper" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " CCLK_INVERT_DCD ,Inversion of DCD enable" "Disabled,Enabled" bitfld.long 0x04 27. " SUPER_CDIV_DIS_FROM_COP_FIQ ,COP FIQ enable" "Enabled,Disabled" textline " " bitfld.long 0x04 26. " SUPER_CDIV_DIS_FROM_CPU_FIQ ,CPU FIQ enable" "Enabled,Disabled" bitfld.long 0x04 25. " SUPER_CDIV_DIS_FROM_COP_IRQ ,COP IRQ enable" "Enabled,Disabled" textline " " bitfld.long 0x04 24. " SUPER_CDIV_DIS_FROM_CPU_IRQ ,CPU IRQ enable" "Enabled,Disabled" hexmask.long.byte 0x04 16.--23. 1. " CCLK_CLK_DIVISOR ,Clock divisor value" textline " " hexmask.long.byte 0x04 8.--15. 1. " SUPER_CDIV_DIVIDEND ,Dividend value" hexmask.long.byte 0x04 0.--7. 1. " SUPER_CDIV_DIVISOR ,Divisor value" line.long 0x08 "CCLKLP_BURST_POLICY_0,CCLKP clock control" bitfld.long 0x08 28.--31. " CPULP_STATE ,CPU clock source" "STDBY,IDLE,RUN,RUN,IRQ,IRQ,IRQ,IRQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ" bitfld.long 0x08 27. " COP_AUTO_CWAKEUP_FROM_FIQ ,COP wake up from FIQ" "No,Yes" textline " " bitfld.long 0x08 26. " CPU_AUTO_CWAKEUP_FROM_FIQ ,CPU wake up from FIQ" "No,Yes" bitfld.long 0x08 25. " COP_AUTO_CWAKEUP_FROM_IRQ ,COP wake up from IRQ" "No,Yes" textline " " bitfld.long 0x08 24. " CPU_AUTO_CWAKEUP_FROM_IRQ ,CPU wake up from IRQ" "No,Yes" bitfld.long 0x08 12.--15. " CWAKEUP_FIQ_SOURCE ,FIQ source" "CLKM,,CLKS,,PLLP_OUT0,PLLP_OUT4,,,PLLX_OUT0_LJ,DVFS_CPU_CLK,,,,,PLLX_OUT0,DVFS_CPU_CLK_LJ" textline " " bitfld.long 0x08 8.--11. " CWAKEUP_IRQ_SOURCE ,IRQ source" "CLKM,,CLKS,,PLLP_OUT0,PLLP_OUT4,,,PLLX_OUT0_LJ,DVFS_CPU_CLK,,,,,PLLX_OUT0,DVFS_CPU_CLK_LJ" bitfld.long 0x08 4.--7. " CWAKEUP_RUN_SOURCE ,RUN source" "CLKM,,CLKS,,PLLP_OUT0,PLLP_OUT4,,,PLLX_OUT0_LJ,DVFS_CPU_CLK,,,,,PLLX_OUT0,DVFS_CPU_CLK_LJ" textline " " bitfld.long 0x08 0.--3. " CWAKEUP_IDLE_SOURCE ,IDLE source" "CLKM,,CLKS,,PLLP_OUT0,PLLP_OUT4,,,PLLX_OUT0_LJ,DVFS_CPU_CLK,,,,,PLLX_OUT0,DVFS_CPU_CLK_LJ" line.long 0x0C "SUPER_CCLKLP_DIVIDER_0,CCLKP super clock divider control" bitfld.long 0x0C 31. " SUPER_CDIV_ENB ,Enable super clock divider" "Disabled,Enabled" bitfld.long 0x0C 30. " SUPER_CDIV_USE_THERM_CONTROLS ,Use thermal controls for pulse skipper" "Disabled,Enabled" textline " " bitfld.long 0x0C 29. " CCLK_INVERT_DCD ,Inversion of DCD enable" "Disabled,Enabled" bitfld.long 0x0C 27. " SUPER_CDIV_DIS_FROM_COP_FIQ ,COP FIQ enable" "Enabled,Disabled" textline " " bitfld.long 0x0C 26. " SUPER_CDIV_DIS_FROM_CPU_FIQ ,CPU FIQ enable" "Enabled,Disabled" bitfld.long 0x0C 25. " SUPER_CDIV_DIS_FROM_COP_IRQ ,COP IRQ enable" "Enabled,Disabled" textline " " bitfld.long 0x0C 24. " SUPER_CDIV_DIS_FROM_CPU_IRQ ,CPU IRQ enable" "Enabled,Disabled" hexmask.long.byte 0x0C 16.--23. 1. " CCLK_CLK_DIVISOR ,Clock divisor value" textline " " hexmask.long.byte 0x0C 8.--15. 1. " SUPER_CDIV_DIVIDEND ,Dividend value" hexmask.long.byte 0x0C 0.--7. 1. " SUPER_CDIV_DIVISOR ,Divisor value" line.long 0x10 "CLK_CPUG_CMPLX_0,CPUG complex control" bitfld.long 0x10 11. " CPUG3_CLK_STP ,CPUG3 clock control" "Running,Stopped" bitfld.long 0x10 10. " CPUG2_CLK_STP ,CPUG2 clock control" "Running,Stopped" textline " " bitfld.long 0x10 9. " CPUG1_CLK_STP ,CPUG1 clock control" "Running,Stopped" bitfld.long 0x10 8. " CPUG0_CLK_STP ,CPUG0 clock control" "Running,Stopped" textline " " rbitfld.long 0x10 0.--1. " CPUG_BRIGDE_CLKDIV ,Clock divider" "0,1,2,3" group.long 0x380++0x0B line.long 0x00 "CPU_SOFTRST_CTRL_0,CPU pulse width control" hexmask.long.byte 0x00 0.--7. 1. " CPU_SOFTRST_LEGACY_WIDTH ,CPU soft reset de-assertion counter value for legacy WDT resets" line.long 0x04 "CPU_SOFTRST_CTRL_1,CPU pulse width control" hexmask.long.word 0x04 16.--27. 1. " CPU_SOFTRST_DEASSERT_WIDTH ,CPU soft reset de-assertion counter value" hexmask.long.word 0x04 0.--11. 1. " CPU_SOFTRST_ASSERT_WIDTH ,CPU soft reset assertion counter value" line.long 0x08 "CPU_SOFTRST_CTRL_2,CPU pulse width control" bitfld.long 0x08 31. " IGNORE_HW_ACK_WIDTH ,Ignore the 16-cpuclk counter" "No,Yes" bitfld.long 0x08 30. " IGNORE_SW_ACK_WIDTH ,Ignore the ACK widths" "No,Yes" textline " " hexmask.long.word 0x08 16.--27. 1. " CAR2PMC_NONCPU_ACK_WIDTH ,Counter value for ack de-assertion" hexmask.long.word 0x08 0.--11. 1. " CAR2PMC_CPU_ACK_WIDTH ,Counter value for ack de-assertion" tree.end tree "V & W Devices Peripherals Control" group.long 0x3B4++0x23 line.long 0x00 "CLK_SOURCE_MSELECT_0,Clock configuration for MSELECT" bitfld.long 0x00 29.--31. " MSELECT_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT2,PLLC4_OUT1,CLK_S,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x00 0.--7. 1. " MSELECT_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_TSENSOR_0,Clock configuration for TSENSOR" bitfld.long 0x04 29.--31. " TSENSOR_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,CLK_M,PLLC4_OUT1,CLK_S,PLLC4_OUT2" hexmask.long.byte 0x04 0.--7. 1. " TSENSOR_CLK_DIVISOR ,Clock divide value" line.long 0x08 "CLK_SOURCE_I2S4_0,Clock configuration for I2S4" bitfld.long 0x08 29.--31. " I2S4_CLK_SRC ,Clock source" "PLLA_OUT0,,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..." hexmask.long.byte 0x08 0.--7. 1. " I2S4_CLK_DIVISOR ,Clock divide value" line.long 0x0C "CLK_SOURCE_I2S5_0,Clock configuration for I2S5" bitfld.long 0x0C 29.--31. " I2S5_CLK_SRC ,Clock source" "PLLA_OUT0,,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..." hexmask.long.byte 0x0C 0.--7. 1. " I2S5_CLK_DIVISOR ,Clock divide value" line.long 0x10 "CLK_SOURCE_I2C4_0,Clock configuration for I2C4" bitfld.long 0x10 29.--31. " I2C4_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.word 0x10 0.--15. 1. " I2C4_CLK_DIVISOR ,Clock divide value" group.long 0x3D0++0x03 line.long 0x00 "CLK_SOURCE_AHUB_0,Clock configuration for AHUB0" bitfld.long 0x00 29.--31. " AHUB_CLK_SRC ,Clock source" "PLLA_OUT0,PLLC4_OUT0,PLLC_OUT0,PLLC4_OUT0,PLLP_OUT0,PLLC4_OUT2,CLK_M,CLK_SRC_ALT" bitfld.long 0x00 20. " AHUB_CLK_SRC_DIS ,AHUB clock source disable" "Enabled,Disabled" textline " " bitfld.long 0x00 16.--19. " AHUB_CLK_SRC_RATE ,Clock source rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." hexmask.long.byte 0x00 0.--7. 1. " AHUB_CLK_DIVISOR ,Clock divide value" group.long 0x3E4++0x13 line.long 0x00 "CLK_SOURCE_HDA2CODEC_2X_0,Clock configuration for HDA2CODEC_2X" bitfld.long 0x00 29.--31. " HDA2CODEC_2X_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,PLLA_OUT0,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x00 0.--7. 1. " HDA2CODEC_2X_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_ACTMON_0,Clock configuration for ACTMON" bitfld.long 0x04 29.--31. " ACTMON_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,CLK_S,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x04 0.--7. 1. " ACTMON_CLK_DIVISOR ,Clock divide value" line.long 0x08 "CLK_SOURCE_EXTPERIPH1_0,Clock configuration for EXTPERIPH1" bitfld.long 0x08 29.--31. " EXTPERIPH1_CLK_SRC ,Clock source" "PLLA_OUT0,CLK_S,PLLP_OUT0,CLK_M,PLLE_OUT0,?..." hexmask.long.byte 0x08 0.--7. 1. " EXTPERIPH1_CLK_DIVISOR ,Clock divide value" line.long 0x0C "CLK_SOURCE_EXTPERIPH2_0,Clock configuration for EXTPERIPH2" bitfld.long 0x0C 29.--31. " EXTPERIPH2_CLK_SRC ,Clock source" "PLLA_OUT0,CLK_S,PLLP_OUT0,CLK_M,PLLE_OUT0,?..." hexmask.long.byte 0x0C 0.--7. 1. " EXTPERIPH2_CLK_DIVISOR ,Clock divide value" line.long 0x10 "CLK_SOURCE_EXTPERIPH3_0,Clock configuration for EXTPERIPH3" bitfld.long 0x10 29.--31. " EXTPERIPH3_CLK_SRC ,Clock source" "PLLA_OUT0,CLK_S,PLLP_OUT0,CLK_M,PLLE_OUT0,?..." hexmask.long.byte 0x10 0.--7. 1. " EXTPERIPH3_CLK_DIVISOR ,Clock divide value" group.long 0x3FC++0x07 line.long 0x00 "CLK_SOURCE_I2C_SLOW_0,Clock configuration for I2C_SLOW" bitfld.long 0x00 29.--31. " I2C_SLOW_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,CLK_S,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x00 0.--7. 1. " I2C_SLOW_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_SYS_0,Clock configuration for SYS" hexmask.long.byte 0x04 0.--7. 1. " SYS_CLK_DIVISOR ,Clock divide value" group.long 0x404++0x03 line.long 0x00 "CLK_SOURCE_ISPB_0,Clock configuration for ISPB_0" bitfld.long 0x00 29.--31. " CLK_SOURCE_ISPB ,Clock source" ",,PLLC_OUT0,,PLLP_OUT0,,PLLA_OUT0,?..." hexmask.long.byte 0x00 0.--7. 1. " ISPB_CLK_DIVISOR ,Clock divide value" group.long 0x410++0x07 line.long 0x00 "CLK_SOURCE_SOR1_0,Clock configuration for SOR1_0" bitfld.long 0x00 29.--31. " SOR1_CLK_SRC ,Clock source" "PLLP_OUT0,,PLLD_OUT0,,,PLLD2_OUT0,CLK_M,?..." bitfld.long 0x00 15. " SOR1_CLK_SEL1 ,Clock select" "24 MHz,SOR1" textline " " bitfld.long 0x00 14. " SOR1_CLK_SEL0 ,Clock select" "safe_clk/SOR1,Brick Output" hexmask.long.byte 0x00 0.--7. 1. " SOR1_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_SOR0_0,Clock configuration for SOR0_0" bitfld.long 0x04 14. " SOR0_CLK_SEL0 ,Clock select" "safe_clk/LVDS,eDP Macro output" group.long 0x420++0x0B line.long 0x00 "CLK_SOURCE_SATA_OOB_0,Clock configuration for SATA_OOB" bitfld.long 0x00 29.--31. " SATA_OOB_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC4_OUT0,PLLC_OUT0,PLLC4_OUT1,,PLLC4_OUT2,CLK_M,?..." hexmask.long.byte 0x00 0.--7. 1. " SATA_OOB_CLK_DIVISOR ,Clock divide value" line.long 0x04 "CLK_SOURCE_SATA_0,Clock configuration for SATA" bitfld.long 0x04 29.--31. " SATA_CLK_SRC ,Clock source" "PLLP_OUT0,,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" bitfld.long 0x04 20. " SATA_AUX_CLK_ENB ,SATA Tx/Rx clock enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 0.--7. 1. " SATA_CLK_DIVISOR ,Clock divide value" line.long 0x08 "CLK_SOURCE_HDA_0,Clock configuration for HDA" bitfld.long 0x08 29.--31. " HDA_CLK_SRC ,Clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x08 0.--7. 1. " HDA_CLK_DIVISOR ,Clock divide value" tree.end tree "V & W Devices Alternate Control" group.long 0x430++0x1F line.long 0x00 "RST_DEV_V_SET_0,V devices set reset control" bitfld.long 0x00 29. " SET_HDA_RST ,Set reset High Def Audio" "Disabled,Enabled" bitfld.long 0x00 28. " SET_SATA_RST ,Set reset SATA" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SET_ACTMON_RST ,Set reset ACTMON" "Disabled,Enabled" bitfld.long 0x00 16. " SET_ATOMICS_RST ,Set reset ATOMICS" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SET_HDA2CODEC_2X_RST ,Set reset HDA2CODEC_2X" "Disabled,Enabled" bitfld.long 0x00 7. " SET_I2C4_RST ,Set reset I2C4 Controller" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SET_MSELECT_RST ,Set reset MSELECT" "Disabled,Enabled" bitfld.long 0x00 1. " SET_CPULP_RST ,Set reset CPULP" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SET_CPUG_RST ,Set reset CPUG" "Disabled,Enabled" line.long 0x04 "RST_DEV_V_CLR_0,V devices clear reset control" bitfld.long 0x04 29. " CLR_HDA_RST ,Clear reset High Def Audio" "Disabled,Enabled" bitfld.long 0x04 28. " CLR_SATA_RST ,Clear reset SATA" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " CLR_ACTMON_RST ,Clear reset ACTMON" "Disabled,Enabled" bitfld.long 0x04 16. " CLR_ATOMICS_RST ,Clear reset ATOMICS" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " CLR_HDA2CODEC_2X_RST ,Clear reset HDA2CODEC_2X" "Disabled,Enabled" bitfld.long 0x04 7. " CLR_I2C4_RST ,Clear reset I2C4 Controller" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " CLR_MSELECT_RST ,Clear reset MSELECT" "Disabled,Enabled" bitfld.long 0x04 1. " CLR_CPULP_RST ,Clear reset CPULP" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CLR_CPUG_RST ,Clear reset CPUG" "Disabled,Enabled" line.long 0x08 "RST_DEV_W_SET_0,W devices set reset control" bitfld.long 0x08 28. " SET_XUSB_SS_RST ,Set reset XUSB_SS" "Disabled,Enabled" bitfld.long 0x08 27. " SET_DVFS_RST ,Set reset CLDVFS" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " SET_ENTROPY_RST ,Set reset ENTROPY" "Disabled,Enabled" bitfld.long 0x08 14. " SET_XUSB_PADCTL_RST ,Set reset XUSB_PADCTL" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " SET_CEC_RST ,Set reset CEC" "Disabled,Enabled" bitfld.long 0x08 1. " SET_SATACOLD_RST ,Set reset SATACOLD" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " SET_HDA2HDMICODEC_RST ,Set reset HDA2HDMICODEC" "Disabled,Enabled" line.long 0x0C "RST_DEV_W_CLR_0,W devices clear reset control" bitfld.long 0x0C 28. " CLR_XUSB_SS_RST ,Clear reset XUSB_SS" "Disabled,Enabled" bitfld.long 0x0C 27. " CLR_DVFS_RST ,Clear reset CLDVFS" "Disabled,Enabled" textline " " bitfld.long 0x0C 21. " CLR_ENTROPY_RST ,Clear reset ENTROPY" "Disabled,Enabled" bitfld.long 0x0C 14. " CLR_XUSB_PADCTL_RST ,Clear reset XUSB_PADCTL" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " CLR_CEC_RST ,Clear reset CEC" "Disabled,Enabled" bitfld.long 0x0C 1. " CLR_SATACOLD_RST ,Clear reset SATACOLD" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " CLR_HDA2HDMICODEC_RST ,Clear reset HDA2HDMICODEC" "Disabled,Enabled" line.long 0x10 "CLK_OUT_ENB_V_SET_0,V devices set clock control" bitfld.long 0x10 29. " SET_CLK_ENB_HDA ,Set enable clock to HDA" "Disabled,Enabled" bitfld.long 0x10 28. " SET_CLK_ENB_SATA ,Set enable clock to SATA" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " SET_CLK_ENB_SATA_OOB ,Set enable clock to SATA_OOB" "Disabled,Enabled" bitfld.long 0x10 26. " SET_CLK_ENB_EXTPERIPH3 ,Set enable clock to EXTPERIPH3" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " SET_CLK_ENB_EXTPERIPH2 ,Set enable clock to EXTPERIPH2" "Disabled,Enabled" bitfld.long 0x10 24. " SET_CLK_ENB_EXTPERIPH1 ,Set enable clock to EXTPERIPH1" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " SET_CLK_ENB_ACTMON ,Set enable clock to ACTMON" "Disabled,Enabled" bitfld.long 0x10 22. " SET_CLK_ENB_SPDIF_DOUBLER ,Set enable clock to SPDIF audio sync clk doubler" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " SET_CLK_ENB_ATOMICS ,Set enable clock to ATOMICS" "Disabled,Enabled" bitfld.long 0x10 15. " SET_CLK_ENB_HDA2CODEC_2X ,Set enable clock to HDA2CODEC_2X" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " SET_CLK_ENB_APB2APE ,Set enable clock to APB2APE" "Disabled,Enabled" bitfld.long 0x10 10. " SET_CLK_ENB_AHUB ,Set enable clock to AHUB" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " SET_CLK_ENB_I2C4 ,Set enable clock to I2C4" "Disabled,Enabled" bitfld.long 0x10 6. " SET_CLK_ENB_I2S5 ,Set enable clock to I2S5" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " SET_CLK_ENB_I2S4 ,Set enable clock to I2S4" "Disabled,Enabled" bitfld.long 0x10 4. " SET_CLK_ENB_TSENSOR ,Set enable clock to TSENSOR" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " SET_CLK_ENB_MSELECT ,Set enable clock to MSELECT" "Disabled,Enabled" bitfld.long 0x10 0. " SET_CLK_ENB_CPUG ,Set enable clock to CPUG" "Disabled,Enabled" line.long 0x14 "CLK_OUT_ENB_V_CLR_0,V devices clear clock control" bitfld.long 0x14 29. " CLR_CLK_ENB_HDA ,Clear enable clock to HDA" "Disabled,Enabled" bitfld.long 0x14 28. " CLR_CLK_ENB_SATA ,Clear enable clock to SATA" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " CLR_CLK_ENB_SATA_OOB ,Clear enable clock to SATA_OOB" "Disabled,Enabled" bitfld.long 0x14 26. " CLR_CLK_ENB_EXTPERIPH3 ,Clear enable clock to EXTPERIPH3" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " CLR_CLK_ENB_EXTPERIPH2 ,Clear enable clock to EXTPERIPH2" "Disabled,Enabled" bitfld.long 0x14 24. " CLR_CLK_ENB_EXTPERIPH1 ,Clear enable clock to EXTPERIPH1" "Disabled,Enabled" textline " " bitfld.long 0x14 23. " CLR_CLK_ENB_ACTMON ,Clear enable clock to ACTMON" "Disabled,Enabled" bitfld.long 0x14 22. " CLR_CLK_ENB_SPDIF_DOUBLER ,Clear enable clock to SPDIF audio sync clk doubler" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " CLR_CLK_ENB_ATOMICS ,Clear enable clock to ATOMICS" "Disabled,Enabled" bitfld.long 0x14 15. " CLR_CLK_ENB_HDA2CODEC_2X ,Clear enable clock to HDA2CODEC_2X" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " CLR_CLK_ENB_APB2APE ,Clear enable clock to APB2APE" "Disabled,Enabled" bitfld.long 0x14 10. " CLR_CLK_ENB_AHUB ,Clear enable clock to AHUB" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " CLR_CLK_ENB_I2C4 ,Clear enable clock to I2C4" "Disabled,Enabled" bitfld.long 0x14 6. " CLR_CLK_ENB_I2S5 ,Clear enable clock to I2S5" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " CLR_CLK_ENB_I2S4 ,Clear enable clock to I2S4" "Disabled,Enabled" bitfld.long 0x14 4. " CLR_CLK_ENB_TSENSOR ,Clear enable clock to TSENSOR" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " CLR_CLK_ENB_MSELECT ,Clear enable clock to MSELECT" "Disabled,Enabled" bitfld.long 0x14 0. " CLR_CLK_ENB_CPUG ,Clear enable clock to CPUG" "Disabled,Enabled" line.long 0x18 "CLK_OUT_ENB_W_SET_0,W devices set clock control" bitfld.long 0x18 30. " SET_CLK_ENB_MC1 ,Set enable clock to MC1" "Disabled,Enabled" bitfld.long 0x18 29. " SET_CLK_ENB_EMC_DLL ,Set enable clock to EMC_DLL" "Disabled,Enabled" textline " " bitfld.long 0x18 28. " SET_CLK_ENB_XUSB_SS ,Set enable clock to XUSB_SS" "Disabled,Enabled" bitfld.long 0x18 27. " SET_CLK_ENB_DVFS ,Set enable clock to CLDVFS" "Disabled,Enabled" textline " " bitfld.long 0x18 21. " SET_CLK_ENB_ENTROPY ,Set enable clock to ENTROPY" "Disabled,Enabled" bitfld.long 0x18 20. " SET_CLK_ENB_DSIB_LP ,Set enable clock to DSIB LP" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " SET_CLK_ENB_DSIA_LP ,Set enable clock to DSIA LP" "Disabled,Enabled" bitfld.long 0x18 18. " SET_CLK_ENB_CILEF ,Set enable clock to CSI CILEF" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " SET_CLK_ENB_CILCD ,Set enable clock to CILCD" "Disabled,Enabled" bitfld.long 0x18 16. " SET_CLK_ENB_CILAB ,Set enable clock to CILAB" "Disabled,Enabled" textline " " bitfld.long 0x18 15. " SET_CLK_ENB_XUSB ,Set enable clock to XUSB" "Disabled,Enabled" bitfld.long 0x18 13. " SET_CLK_ENB_MIPI_IOBIST ,Set enable clock to MIPI IOBIST" "Disabled,Enabled" textline " " bitfld.long 0x18 12. " SET_CLK_ENB_SATA_IOBIST ,Set enable clock to SATA IOBIST" "Disabled,Enabled" bitfld.long 0x18 11. " SET_CLK_ENB_HDMI_IOBIST ,Set enable clock to HDMI IOBIST" "Disabled,Enabled" textline " " bitfld.long 0x18 10. " SET_CLK_ENB_EMC_IOBIST ,Set enable clock to EMC IOBIST" "Disabled,Enabled" bitfld.long 0x18 9. " SET_CLK_ENB_PCIE2_IOBIST ,Set enable clock to PCIE2 IOBIST" "Disabled,Enabled" textline " " bitfld.long 0x18 8. " SET_CLK_ENB_CEC ,Set enable clock to CEC IOBIST" "Disabled,Enabled" bitfld.long 0x18 7. " SET_CLK_ENB_PCIERX5 ,Set enable clock to PCIERX5" "Disabled,Enabled" textline " " bitfld.long 0x18 6. " SET_CLK_ENB_PCIERX4 ,Set enable clock to PCIERX4" "Disabled,Enabled" bitfld.long 0x18 5. " SET_CLK_ENB_PCIERX3 ,Set enable clock to PCIERX3" "Disabled,Enabled" textline " " bitfld.long 0x18 4. " SET_CLK_ENB_PCIERX2 ,Set enable clock to PCIERX2" "Disabled,Enabled" bitfld.long 0x18 3. " SET_CLK_ENB_PCIERX1 ,Set enable clock to PCIERX1" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " SET_CLK_ENB_PCIERX0 ,Set enable clock to PCIERX0" "Disabled,Enabled" bitfld.long 0x18 0. " SET_CLK_ENB_HDA2HDMICODEC ,Set enable clock to HDA2HDMICODEC" "Disabled,Enabled" line.long 0x1C "CLK_OUT_ENB_W_CLR_0,W devices clear clock control" bitfld.long 0x1C 30. " CLR_CLK_ENB_MC1 ,Clear enable clock to MC1" "Disabled,Enabled" bitfld.long 0x1C 29. " CLR_CLK_ENB_EMC_DLL ,Clear enable clock to EMC_DLL" "Disabled,Enabled" textline " " bitfld.long 0x1C 28. " CLR_CLK_ENB_XUSB_SS ,Clear enable clock to XUSB_SS" "Disabled,Enabled" bitfld.long 0x1C 27. " CLR_CLK_ENB_DVFS ,Clear enable clock to CLDVFS" "Disabled,Enabled" textline " " bitfld.long 0x1C 21. " CLR_CLK_ENB_ENTROPY ,Clear enable clock to ENTROPY" "Disabled,Enabled" bitfld.long 0x1C 20. " CLR_CLK_ENB_DSIB_LP ,Clear enable clock to DSIB LP" "Disabled,Enabled" textline " " bitfld.long 0x1C 19. " CLR_CLK_ENB_DSIA_LP ,Clear enable clock to DSIA LP" "Disabled,Enabled" bitfld.long 0x1C 18. " CLR_CLK_ENB_CILEF ,Clear enable clock to CSI CILEF" "Disabled,Enabled" textline " " bitfld.long 0x1C 17. " CLR_CLK_ENB_CILCD ,Clear enable clock to CILCD" "Disabled,Enabled" bitfld.long 0x1C 16. " CLR_CLK_ENB_CILAB ,Clear enable clock to CILAB" "Disabled,Enabled" textline " " bitfld.long 0x1C 15. " CLR_CLK_ENB_XUSB ,Clear enable clock to XUSB" "Disabled,Enabled" bitfld.long 0x1C 13. " CLR_CLK_ENB_MIPI_IOBIST ,Clear enable clock to MIPI IOBIST" "Disabled,Enabled" textline " " bitfld.long 0x1C 12. " CLR_CLK_ENB_SATA_IOBIST ,Clear enable clock to SATA IOBIST" "Disabled,Enabled" bitfld.long 0x1C 11. " CLR_CLK_ENB_HDMI_IOBIST ,Clear enable clock to HDMI IOBIST" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " CLR_CLK_ENB_EMC_IOBIST ,Clear enable clock to EMC IOBIST" "Disabled,Enabled" bitfld.long 0x1C 9. " CLR_CLK_ENB_PCIE2_IOBIST ,Clear enable clock to PCIE2 IOBIST" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " CLR_CLK_ENB_CEC ,Clear enable clock to CEC IOBIST" "Disabled,Enabled" bitfld.long 0x1C 7. " CLR_CLK_ENB_PCIERX5 ,Clear enable clock to PCIERX5" "Disabled,Enabled" textline " " bitfld.long 0x1C 6. " CLR_CLK_ENB_PCIERX4 ,Clear enable clock to PCIERX4" "Disabled,Enabled" bitfld.long 0x1C 5. " CLR_CLK_ENB_PCIERX3 ,Clear enable clock to PCIERX3" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " CLR_CLK_ENB_PCIERX2 ,Clear enable clock to PCIERX2" "Disabled,Enabled" bitfld.long 0x1C 3. " CLR_CLK_ENB_PCIERX1 ,Clear enable clock to PCIERX1" "Disabled,Enabled" textline " " bitfld.long 0x1C 2. " CLR_CLK_ENB_PCIERX0 ,Clear enable clock to PCIERX0" "Disabled,Enabled" bitfld.long 0x1C 0. " CLR_CLK_ENB_HDA2HDMICODEC ,Clear enable clock to HDA2HDMICODEC" "Disabled,Enabled" tree.end tree "CPUG & CPULP Complex Control" group.long 0x450++0x07 line.long 0x00 "RST_CPUG_CMPLX_SET_0,Reset CPUG complex set control" bitfld.long 0x00 30. " SET_PRESETDBG ,Assert nPRESETDBG to CoreSight" "Disabled,Enabled" bitfld.long 0x00 29. " SET_NONCPURESET ,Assert reset to the whole nonCPU region of the CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " SET_L2RESET ,Assert nL2RESET to CPU" "Disabled,Enabled" bitfld.long 0x00 19. " SET_CORERESET3 ,Assert nCORERESET to CPU3" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " SET_CORERESET2 ,Assert nCORERESET to CPU2" "Disabled,Enabled" bitfld.long 0x00 17. " SET_CORERESET1 ,Assert nCORERESET to CPU1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SET_CORERESET0 ,Assert nCORERESET to CPU0" "Disabled,Enabled" bitfld.long 0x00 3. " SET_CPURESET3 ,Assert nCPURESET to CPU3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SET_CPURESET2 ,Assert nCPURESET to CPU2" "Disabled,Enabled" bitfld.long 0x00 1. " SET_CPURESET1 ,Assert nCPURESET to CPU1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SET_CPURESET0 ,Assert nCPURESET to CPU0" "Disabled,Enabled" line.long 0x04 "RST_CPUG_CMPLX_CLR_0,Reset CPUG complex clear control" bitfld.long 0x04 30. " CLR_PRESETDBG ,De-assert nPRESETDBG to CoreSight" "Disabled,Enabled" bitfld.long 0x04 29. " CLR_NONCPURESET ,De-assert reset to the whole nonCPU region of the CPU" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " CLR_L2RESET ,De-assert nL2RESET to CPU" "Disabled,Enabled" bitfld.long 0x04 19. " CLR_CORERESET3 ,De-assert nCORERESET to CPU3" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " CLR_CORERESET2 ,De-assert nCORERESET to CPU2" "Disabled,Enabled" bitfld.long 0x04 17. " CLR_CORERESET1 ,De-assert nCORERESET to CPU1" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " CLR_CORERESET0 ,De-assert nCORERESET to CPU0" "Disabled,Enabled" bitfld.long 0x04 3. " CLR_CPURESET3 ,De-assert nCPURESET to CPU3" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " CLR_CPURESET2 ,De-assert nCPURESET to CPU2" "Disabled,Enabled" bitfld.long 0x04 1. " CLR_CPURESET1 ,De-assert nCPURESET to CPU1" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CLR_CPURESET0 ,De-assert nCPURESET to CPU0" "Disabled,Enabled" group.long 0x460++0x07 line.long 0x00 "CLK_CPUG_CMPLX_SET_0,Clock CPUG complex set control" bitfld.long 0x00 11. " SET_CPU3_CLK_STP ,Assert CPU3 clock stop" "Disabled,Enabled" bitfld.long 0x00 10. " SET_CPU2_CLK_STP ,Assert CPU2 clock stop" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " SET_CPU1_CLK_STP ,Assert CPU1 clock stop" "Disabled,Enabled" bitfld.long 0x00 8. " SET_CPU0_CLK_STP ,Assert CPU0 clock stop" "Disabled,Enabled" line.long 0x04 "CLK_CPUG_CMPLX_CLR_0,Clock CPUG complex clear control" bitfld.long 0x04 11. " CLR_CPU3_CLK_STP ,De-assert CPU3 clock stop" "Disabled,Enabled" bitfld.long 0x04 10. " CLR_CPU2_CLK_STP ,De-assert CPU2 clock stop" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " CLR_CPU1_CLK_STP ,De-assert CPU1 clock stop" "Disabled,Enabled" bitfld.long 0x04 8. " CLR_CPU0_CLK_STP ,De-assert CPU0 clock stop" "Disabled,Enabled" rgroup.long 0x470++0x03 line.long 0x00 "CPU_CMPLX_STATUS_0,CPU complex status" bitfld.long 0x00 30. " PRESETDBG ,nPRESETDBG to CoreSight asserted" "Disabled,Enabled" bitfld.long 0x00 29. " NONCPURESET ,Reset asserted to the whole nonCPU region of the CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MCRESET ,MCRESET to CPU asserted" "Disabled,Enabled" bitfld.long 0x00 27. " CSITEPTMRESET ,nCSITEPTMRESET to CPU3 asserted" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " AXICIFRESET ,nAXICIFRESET to CPU2 asserted" "Disabled,Enabled" bitfld.long 0x00 25. " MPCORERESET ,nMPCORERESET to CPU1 asserted" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " L2RESET ,L2RESET to CPU0 asserted" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESET3 ,nCORERESET to CPU3 asserted" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CORERESET2 ,nCORERESET to CPU2 asserted" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESET1 ,nCORERESET to CPU1 asserted" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESET0 ,nCORERESET to CPU0 asserted" "Disabled,Enabled" bitfld.long 0x00 3. " CPURESET3 ,nCPURESET to CPU3 asserted" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CPURESET2 ,nCPURESET to CPU2 asserted" "Disabled,Enabled" bitfld.long 0x00 1. " CPURESET1 ,nCPURESET to CPU1 asserted" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CPURESET0 ,nCPURESET to CPU0 asserted" "Disabled,Enabled" tree.end tree "Interrupt Status & Mask" group.long 0x478++0x07 line.long 0x00 "INTSTATUS_0,Interrupt status register" eventfld.long 0x00 19. " SPARE ,Spare interrupt" "No interrupt,Interrupt" eventfld.long 0x00 18. " SPARE ,Spare interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " SPARE ,Spare interrupt" "No interrupt,Interrupt" eventfld.long 0x00 16. " TSENSOR2CAR_SLOWDOWN_SCLK ,Tsensor2car_slowdown_sclk interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " WDRESET_CPU3 ,Wdreset_cpu3 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 14. " WDRESET_CPU2 ,Wdreset_cpu2 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 13. " WDRESET_CPU1 ,Wdreset_cpu1 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 12. " WDRESET_CPU0 ,Wdreset_cpu0 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " DBGRESET_CPU3 ,Wbgreset_cpu3 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " DBGRESET_CPU3 ,Dbgreset_cpu2 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " DBGRESET_CPU2 ,Dbgreset_cpu1 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " DBGRESET_CPU0 ,Dbgreset_cpu0 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " CPURESET_CPU3 ,Cpureset_cpu3 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 6. " CPURESET_CPU2 ,Cpureset_cpu2 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 5. " CPURESET_CPU1 ,Cpureset_cpu1 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " CPURESET_CPU0 ,Cpureset_cpu0 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " SCURESET ,Scureset interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " PERIPHRESET ,Periphreset interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " CSITEPTMRESET ,Csiteptmreset interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " AXICIFRESET ,Axicifreset interrupt" "No interrupt,Interrupt" line.long 0x04 "INTMASK_0,Interrupt mask register" bitfld.long 0x04 19. " SPARE ,Spare mask" "Masked,Unmasked" bitfld.long 0x04 18. " SPARE ,Spare mask" "Masked,Unmasked" textline " " bitfld.long 0x04 17. " SPARE ,Spare mask" "Masked,Unmasked" bitfld.long 0x04 16. " TSENSOR2CAR_SLOWDOWN_SCLK ,Tsensor2car_slowdown_sclk mask" "Masked,Unmasked" textline " " bitfld.long 0x04 15. " WDRESET_CPU3 ,Wdreset_cpu3 mask" "Masked,Unmasked" bitfld.long 0x04 14. " WDRESET_CPU2 ,Wdreset_cpu2 mask" "Masked,Unmasked" textline " " bitfld.long 0x04 13. " WDRESET_CPU1 ,Wdreset_cpu1 mask" "Masked,Unmasked" bitfld.long 0x04 12. " WDRESET_CPU0 ,Wdreset_cpu0 mask" "Masked,Unmasked" textline " " bitfld.long 0x04 11. " DBGRESET_CPU3 ,Wbgreset_cpu3 mask" "Masked,Unmasked" bitfld.long 0x04 10. " DBGRESET_CPU3 ,Dbgreset_cpu2 mask" "Masked,Unmasked" textline " " bitfld.long 0x04 9. " DBGRESET_CPU2 ,Dbgreset_cpu1 mask" "Masked,Unmasked" bitfld.long 0x04 8. " DBGRESET_CPU0 ,Dbgreset_cpu0 mask" "Masked,Unmasked" textline " " bitfld.long 0x04 7. " CPURESET_CPU3 ,Cpureset_cpu3 mask" "Masked,Unmasked" bitfld.long 0x04 6. " CPURESET_CPU2 ,Cpureset_cpu2 mask" "Masked,Unmasked" textline " " bitfld.long 0x04 5. " CPURESET_CPU1 ,Cpureset_cpu1 mask" "Masked,Unmasked" bitfld.long 0x04 4. " CPURESET_CPU0 ,Cpureset_cpu0 mask" "Masked,Unmasked" textline " " bitfld.long 0x04 3. " SCURESET ,ScScureset mask" "Masked,Unmasked" bitfld.long 0x04 2. " PERIPHRESET ,Periphreset mask" "Masked,Unmasked" textline " " bitfld.long 0x04 1. " CSITEPTMRESET ,Csiteptmreset mask" "Masked,Unmasked" bitfld.long 0x04 0. " AXICIFRESET ,Axicifreset mask" "Masked,Unmasked" tree.end tree "PLL Configuration" group.long 0x480++0x17 line.long 0x00 "UTMIP_PLL_CFG0_0,UTMIP PLL configuration register" bitfld.long 0x00 27.--28. " UTMIP_PLL_VREG_CTRL ,Voltage regulator voltage level control" "0,1,2,3" bitfld.long 0x00 25.--26. " UTMIP_PLL_KCP , Charge Pump Gain control" "0,1,2,3" textline " " hexmask.long.byte 0x00 16.--23. 1. " UTMIP_PLL_NDIV ,Feedback divider on the VCO feedback" hexmask.long.byte 0x00 8.--15. 1. " UTMIP_PLL_MDIV ,Predivide on the PLL" textline " " bitfld.long 0x00 2. " UTMIP_PLL_LOCK_OVR ,LOCK_OVERRIDE control of the UTMIP PLL" "Not forced,Forced" bitfld.long 0x00 0. " UTMIP_PLL_EN_LCKDET , ENB_LCKDET input of UTMIP PLL" "Disabled,Enabled" line.long 0x04 "UTMIP_PLL_CFG1_0,PLL configuration and parameters" bitfld.long 0x04 27.--31. " UTMIP_PLLU_ENABLE_DLY_COUNT ,Wait time to enable PLL_U" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 17. " UTMIP_FORCE_PLLU_POWERUP ,Force PLL_U into power up" "Not forced,Forced" textline " " bitfld.long 0x04 16. " UTMIP_FORCE_PLLU_POWERDOWN ,Force PLL_U into power down" "Not forced,Forced" bitfld.long 0x04 15. " UTMIP_FORCE_PLL_ENABLE_POWERUP ,Force UTMIP PLL pll_enable input on" "Not forced,Forced" textline " " bitfld.long 0x04 14. " UTMIP_FORCE_PLL_ENABLE_POWERDOWN ,Force UTMIP PLL pll_enable input off" "Not forced,Forced" bitfld.long 0x04 13. " UTMIP_FORCE_PLL_ACTIVE_POWERUP ,Force UTMIP PLL pll_active input on" "Not forced,Forced" textline " " bitfld.long 0x04 12. " UTMIP_FORCE_PLL_ACTIVE_POWERDOWN ,Force UTMIP PLL pll_active input off" "Not forced,Forced" hexmask.long.word 0x04 0.--11. 1. " UTMIP_XTAL_FREQ_COUNT ,Wait time until output of UTMIP PLL is considered stable" line.long 0x08 "UTMIP_PLL_CFG2_0,UTMIP Miscellaneous configurations" bitfld.long 0x08 30. " UTMIP_PHY_XTAL_CLOCKEN ,Crystal clock enable" "Disabled,Enabled" bitfld.long 0x08 25. " UTMIP_FORCE_PD_SAMP_D_POWERUP ,Force PD_SAMP_D input into power up" "Not forced,Forced" textline " " bitfld.long 0x08 24. " UTMIP_FORCE_PD_SAMP_D_POWERDOWN ,Force PD_SAMP_D input into power down" "Not forced,Forced" bitfld.long 0x08 18.--23. " UTMIP_PLL_ACTIVE_DLY_COUNT ,Active delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.word 0x08 6.--17. 1. " UTMIP_PLLU_STABLE_COUNT ,LLU frequency lock delay" bitfld.long 0x08 5. " UTMIP_FORCE_PD_SAMP_C_POWERUP ,Force PD_SAMP_C iForce PD_SAMP_C input into power down" "Not forced,Forced" textline " " bitfld.long 0x08 4. " UTMIP_FORCE_PD_SAMP_C_POWERDOWN ,Force PD_SAMP_C input into power down" "Not forced,Forced" bitfld.long 0x08 3. " UTMIP_FORCE_PD_SAMP_B_POWERUP ,Force PD_SAMP_B input into power up" "Not forced,Forced" textline " " bitfld.long 0x08 2. " UTMIP_FORCE_PD_SAMP_B_POWERDOWN ,Force PD_SAMP_B input into power down" "Not forced,Forced" bitfld.long 0x08 1. " UTMIP_FORCE_PD_SAMP_A_POWERUP ,PD_SAMP_A input into power up" "Not forced,Forced" textline " " bitfld.long 0x08 0. " UTMIP_FORCE_PD_SAMP_A_POWERDOWN ,PD_SAMP_A input into power down" "Not forced,Forced" line.long 0x0C "PLLE_AUX_0,PLLE AUX configuration" bitfld.long 0x0C 31. " PLLE_SS_SEQ_INCLUDE ,PLLE spread spectrum power sequencer" "Skipped,Included" bitfld.long 0x0C 28. " PLLE_REF_SEL_PLLREFE ,PLLE input reference clock source select2" ",600M" textline " " rbitfld.long 0x0C 26.--27. " PLLE_SEQ_STATE ,PLLE power sequencer state" "Off,On,Busy,?..." bitfld.long 0x0C 25. " PLLE_SEQ_START_STATE ,PLLE power sequencer start state" "Off,On" textline " " bitfld.long 0x0C 24. " PLLE_SEQ_ENABLE ,PLLE power sequencer enable" "Disabled,Enabled" hexmask.long.byte 0x0C 16.--23. 1. " PLLE_SS_DLY ,Delay between spread spectrum" textline " " hexmask.long.byte 0x0C 8.--15. 1. " PLLE_LOCK_DLY ,Delay from PLLE ENABLE to lock" bitfld.long 0x0C 7. " TEST_FAST_PT ,Fast time steps enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " PLLE_SS_SWCTL ,PLLE spread spectrum config" "By HW,By SW" bitfld.long 0x0C 5. " PLLE_CONFIG_SWCTL ,PLLE config" "By HW,By SW" textline " " bitfld.long 0x0C 4. " PLLE_ENABLE_SWCTL ,PLLE enable" "By HW,By SW" bitfld.long 0x0C 3. " PLLE_USE_LOCKDET ,Lockdet signals enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " PLLE_REF_SRC ,PLLE input reference clock select" "OSV_DIV," bitfld.long 0x0C 1. " PLLE_CML1_OEN ,PLLE CML1 clock out enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " PLLE_CML0_OEN ,PLLE CML0 clock out enable" "Disabled,Enabled" line.long 0x10 "SATA_PLL_CFG0_0,SATA power sequencer input SW control" bitfld.long 0x10 28.--31. " SATA_PADPLL_IDDQ2_PADPLL_RCAL_DLY ,Delay from SATAX PAD PLL IDDQ DE assertion to the PAD PLL RCAL EN assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x10 26.--27. " SATA_SEQ_STATE ,SATA power sequencer state" "Off,On,Busy,?..." textline " " bitfld.long 0x10 25. " SATA_SEQ_START_STATE ,SATA power sequencer start state" "Off,On" bitfld.long 0x10 24. " SATA_SEQ_ENABLE ,SATA power sequencer enable" "Disabled,Enabled" textline " " rbitfld.long 0x10 16. " SATA_PADPLL_CAL_VALID ,Indicator that Brick PLL calibration was done and is valid" "Not done/invalid,Done/valid" bitfld.long 0x10 15. " SATA_PADPLL_REQ_PLL_RCAL_BYPASS ,Resistor calibration bypass" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " SATA_PADPLL_REQ_PLL_RCAL ,Force PLL Resistor Calibration" "Not forced,Forced" bitfld.long 0x10 13. " SATA_PADPLL_SLEEP_IDDQ ,IDDQ value during SLEEP mode" "0,1" textline " " bitfld.long 0x10 11.--12. " SATA_PADPLL_SLEEP_VAL ,Select type of PLL sleep states" ",1,2,3" bitfld.long 0x10 10. " SATA_PADPLL_CAL_VALID_RST ,reset the CAL VALID" "Power up,SW controlled" textline " " bitfld.long 0x10 9. " SATA_PADPLL_REQ_PLL_CAL_RESET ,Reset PLL VCO calibration" "Not reset,Reset" bitfld.long 0x10 7. " SATA_SEQ_PADPLL_PD_INPUT_VALUE ,Pad PLL input control" "Power up,SW controlled" textline " " bitfld.long 0x10 6. " SATA_SEQ_LANE_PD_INPUT_VALUE ,IOPHY control" "Power up,SW controlled" bitfld.long 0x10 5. " SATA_SEQ_RESET_INPUT_VALUE ,SATA reset control" "De-asserted,SW controlled" textline " " bitfld.long 0x10 4. " SATA_SEQ_IN_SWCTL ,SATA seq input" "By HW,By SW" bitfld.long 0x10 2. " SATA_PADPLL_USE_LOCKDET ,Lockdet signals from PLL enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " SATA_PADPLL_RESET_OVERRIDE_VALUE ,Pad PLL override control" "Power up,SW controlled" bitfld.long 0x10 0. " SATA_PADPLL_RESET_SWCTL ,Pad PLL reset" "By HW,By SW" line.long 0x14 "SATA_PLL_CFG1_0,SATA delay configuration" hexmask.long.byte 0x14 24.--31. 1. " SATA_LANE_IDDQ2_PADPLL_RESET_DLY ,Delay from placing lane out of IDDQ to PAD PLL in reset" hexmask.long.byte 0x14 16.--23. 1. " SATA_PADPLL_IDDQ2LANE_SLUMBER_DLY ,Delay from SATA PAD PLL out of IDDQ to lane placed out of IDDQ" textline " " hexmask.long.byte 0x14 8.--15. 1. " SATA_PADPLL_PU_POST_DLY ,Delay from RESET to SATA PAD PLL lock" hexmask.long.byte 0x14 0.--7. 1. " SATA_LANE_IDDQ2_PADPLL_IDDQ_DLY ,Delay from placing lane in IDDQ to PAD PLL in IDDQ" if (((per.l(ad:0x60006000+0x498))&0x04)==0x04) group.long 0x498++0x03 line.long 0x00 "PCIE_PLL_CFG0_0,PCIE power sequencer input SW control" rbitfld.long 0x00 26.--27. " PCIE_SEQ_STATE ,PCIE power sequencer state" "Off,On,Busy,?..." bitfld.long 0x00 25. " PCIE_SEQ_START_STATE ,PCIE power sequencer start state" "Off,On" textline " " bitfld.long 0x00 24. " PCIE_SEQ_ENABLE ,PCIE power sequencer enable" "Disabled,Enabled" bitfld.long 0x00 5. " PCIE_SEQ_RESET_INPUT_VALUE ,PCIE reset control" "De-asserted,SW controlled" textline " " bitfld.long 0x00 4. " PCIE_SEQ_IN_SWCTL ,PCIE seq input" "By HW,By SW" bitfld.long 0x00 3. " PCIE_XCLK_ENABLE_OVERRIDE_VALUE ,XCLK override value" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCIE_XCLK_ENABLE_SWCTL ,XCLK enable" "By HW,By SW" else group.long 0x498++0x03 line.long 0x00 "PCIE_PLL_CFG0_0,PCIE power sequencer input SW control" rbitfld.long 0x00 26.--27. " PCIE_SEQ_STATE ,PCIE power sequencer state" "Off,On,Busy,?..." bitfld.long 0x00 25. " PCIE_SEQ_START_STATE ,PCIE power sequencer start state" "Off,On" textline " " bitfld.long 0x00 24. " PCIE_SEQ_ENABLE ,PCIE power sequencer enable" "Disabled,Enabled" bitfld.long 0x00 5. " PCIE_SEQ_RESET_INPUT_VALUE ,PCIE reset control" "De-asserted,SW controlled" textline " " bitfld.long 0x00 4. " PCIE_SEQ_IN_SWCTL ,PCIE seq input" "By HW,By SW" textline " " bitfld.long 0x00 2. " PCIE_XCLK_ENABLE_SWCTL ,XCLK enable" "By HW,By SW" endif tree.end tree "Audio Sync Clock" group.long 0x49C++0x03 line.long 0x00 "PROG_AUDIO_DLY_CLK_0,Audio sync clock programmable delay" bitfld.long 0x00 29. " SPDIF_1X_SEL ,SPDIF clock select" "Sync_2x_clk,Sync_clk" bitfld.long 0x00 20.--23. " SYNC_CLK_SPDIF_DELCLK_SEL ,SPDIF taps of delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4A0++0x03 line.long 0x00 "AUDIO_SYNC_CLK_I2S1_0,Audio sync I2S1 source select" bitfld.long 0x00 4. " SYNC_CLK_DIS ,Sync clock disable" "Enabled,Disabled" bitfld.long 0x00 0.--3. " SYNC_CLK_RATE ,Clock select" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." group.long 0x4A4++0x03 line.long 0x00 "AUDIO_SYNC_CLK_I2S2_0,Audio sync I2S2 source select" bitfld.long 0x00 4. " SYNC_CLK_DIS ,Sync clock disable" "Enabled,Disabled" bitfld.long 0x00 0.--3. " SYNC_CLK_RATE ,Clock select" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." group.long 0x4A8++0x03 line.long 0x00 "AUDIO_SYNC_CLK_I2S3_0,Audio sync I2S3 source select" bitfld.long 0x00 4. " SYNC_CLK_DIS ,Sync clock disable" "Enabled,Disabled" bitfld.long 0x00 0.--3. " SYNC_CLK_RATE ,Clock select" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." group.long 0x4AC++0x03 line.long 0x00 "AUDIO_SYNC_CLK_I2S4_0,Audio sync I2S4 source select" bitfld.long 0x00 4. " SYNC_CLK_DIS ,Sync clock disable" "Enabled,Disabled" bitfld.long 0x00 0.--3. " SYNC_CLK_RATE ,Clock select" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." group.long 0x4B0++0x03 line.long 0x00 "AUDIO_SYNC_CLK_I2S5_0,Audio sync I2S5 source select" bitfld.long 0x00 4. " SYNC_CLK_DIS ,Sync clock disable" "Enabled,Disabled" bitfld.long 0x00 0.--3. " SYNC_CLK_RATE ,Clock select" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." group.long 0x4B4++0x03 line.long 0x00 "AUDIO_SYNC_CLK_SPDIF_0,Audio sync SPDIF source select" bitfld.long 0x00 4. " SYNC_CLK_DIS ,Sync clock disable" "Enabled,Disabled" bitfld.long 0x00 0.--3. " SYNC_CLK_RATE ,Clock select" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." tree.end tree "PLLD2 Control" group.long 0x4B8++0x07 line.long 0x00 "PLLD2_BASE_0,PLLD2 configuration" bitfld.long 0x00 31. " PLLD2_BYPASS ,PLLD2 bypass" "Disabled,Enabled" bitfld.long 0x00 30. " PLLD2_ENABLE ,PLLD2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLD2_REF_DIS ,PLLD2 reference clock" "Enabled,Disabled" rbitfld.long 0x00 28. " PLLD2_FREQLOCK ,PLLD2 frequency lock status" "Not locked,Locked" textline " " rbitfld.long 0x00 27. " PLLD2_LOCK ,PLLD2 lock status" "Not locked,Locked" bitfld.long 0x00 26. " PLLD2_REF_SRC_SEL0 ,Reference source select sel[0]" "PLL_D,PLL_D2" textline " " bitfld.long 0x00 25. " PLLD2_REF_SRC_SEL1 ,Reference source select sel[1]" "PLL_D,PLL_D2" bitfld.long 0x00 24. " PLLD2_LOCK_OVERRIDE ,Forces PLL_LOCK" "Not forced,Forced" textline " " bitfld.long 0x00 19.--23. " PLLD2_PDIV ,PLL P divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 18. " PLLD2_IDDQ ,Software can put the PLL in IDDQ by setting this bit" "Off,On" textline " " bitfld.long 0x00 16. " PLLD2_PTS ,Base PLLD2 test output select" "Disabled,FO" hexmask.long.byte 0x00 8.--15. 1. " PLLD2_NDIV ,N divider" textline " " hexmask.long.byte 0x00 0.--7. 1. " PLLD2_MDIV ,M divider" line.long 0x04 "PLLD2_MISC_0,PLLD2 Misc configuration" bitfld.long 0x04 30. " PLLD2_EN_LCKDET ,LCKDET enable" "Disabled,Enabled" bitfld.long 0x04 25.--26. " PLLD2_KCP ,Charge pump gain control" "0,1,2,3" textline " " bitfld.long 0x04 24. " PLLD2_KVCO ,VCO gain" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. " PLLD2_SETUP ,Setup[23:0]" tree.end tree "PLLREFE & FINETRIM Control" group.long 0x4C0++0x27 line.long 0x00 "UTMIP_PLL_CFG3_0,UTMIP PLL CFG3_0 configuration" bitfld.long 0x00 26. " UTMIP_PLL_REF_SRC_SEL ,Source Select for UTMIPLL reference clock" "osc_div_clk,480M" bitfld.long 0x00 25. " UTMIP_PLL_REF_DIS ,Reference clock disable" "Enabled,Disabled" textline " " bitfld.long 0x00 24. " UTMIP_PLL_PTS ,Base UTMIP_PLL test output select" "0,1" bitfld.long 0x00 21.--23. " UTMIP_PLL_SETUP[23:21] ,Phase selection on CLKOUTMUX60" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 11.--20. 1. " UTMIP_PLL_SETUP[20:11] ,TBD" bitfld.long 0x00 10. " UTMIP_PLL_SETUP[10] ,Corevdd detection override" "0,1" textline " " bitfld.long 0x00 9. " UTMIP_PLL_SETUP[9] ,Forces loop filter to VDDA/2" "0,1" bitfld.long 0x00 7.--8. " UTMIP_PLL_SETUP[8:7] ,Current source control" "0,1,2,3" textline " " hexmask.long.byte 0x00 0.--6. 1. " UTMIP_PLL_SETUP[6:0] ,Lock Detect Controls" line.long 0x04 "PLLREFE_BASE_0,PLLREFE BASE_0 configuration" bitfld.long 0x04 31. " PLLREFE_BYPASS ,PLLREFE Bypass" "Disabled,Enabled" bitfld.long 0x04 30. " PLLREFE_ENABLE ,PLLREFE Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " PLLREFE_REF_DIS ,Reference clock disable" "Enabled,Disabled" bitfld.long 0x04 27.--28. " PLLREFE_KCP ,PLLREFE_KCP" "0,1,2,3" textline " " bitfld.long 0x04 26. " PLLREFE_KVCO ,PLLPLLREFE_KVCO" "0,1" bitfld.long 0x04 16.--20. " PLLREFE_DIVP ,PLLREFE_DIVP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x04 8.--15. 1. " PLLREFE_DIVN ,PLLREFE_DIVN" hexmask.long.byte 0x04 0.--7. 1. " PLLREFE_DIVM ,PLLREFE_DIVM" line.long 0x08 "PLLREFE_MISC_0,PLLREFE MISC_0 configuration" bitfld.long 0x08 30. " PLLREFE_EN_LCKDET ,LCKDET Enable" "Disabled,Enabled" bitfld.long 0x08 29. " PLLREFE_LOCK_OVERRIDE ,Forces PLLREFE_LOCK and PLLREFE_FREQLOCK" "Not forced,Forced" textline " " rbitfld.long 0x08 28. " PLLREFE_FREQLOCK ,Frequency acquisition" "Not occurred,Occurred" rbitfld.long 0x08 27. " PLLREFE_LOCK ,Lock phase and frequency" "Not locked,Locked" textline " " bitfld.long 0x08 25.--26. " PLLREFE_PTS ,PLLREFE_PTS" "Disabled,FO,VCO,?..." bitfld.long 0x08 24. " PLLREFE_IDDQ ,LCKDET Enable" "OFF,ON" textline " " hexmask.long.tbyte 0x08 0.--23. 1. " PLLREFE_SETUP ,Setup[23:0]" line.long 0x0C "PLLREFE_OUT_0,PLLREFE OUT_0 configuration" bitfld.long 0x0C 17. " PLLREFE_OUT2_CLKEN ,PLLREFE_OUT2 branch clk enable" "Disabled,Enabled" bitfld.long 0x0C 16. " PLLREFE_OUT1_DIV_BYP ,PLLREFE_OUT1 divider bypass" "Glitchless,Not glitchless" textline " " hexmask.long.byte 0x0C 8.--15. 1. " PLLREFE_OUT1_RATIO ,PLLREFE_OUT1 divider from base" bitfld.long 0x0C 1. " PLLREFE_OUT1_CLKEN ,PLLREFE_OUT1 divider clk enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " PLLREFE_OUT1_RSTN ,PLLREFE_OUT1 divider reset" "Enabled,Disabled" textline " " line.long 0x10 "CPU_FINETRIM_BYP_0,FINETRIM_BYP_0 configuration" bitfld.long 0x10 5. " FCPU_6 ,FCPU_6" "0,1" bitfld.long 0x10 4. " FCPU_4 ,FCPU_4" "0,1" textline " " bitfld.long 0x10 3. " FCPU_4 ,FCPU_4" "0,1" bitfld.long 0x10 2. " FCPU_3 ,FCPU_3" "0,1" textline " " bitfld.long 0x10 1. " FCPU_2 ,FCPU_2" "0,1" bitfld.long 0x10 0. " FCPU_1 ,FCPU_1" "0,1" line.long 0x14 "CPU_FINETRIM_SELECT_0,CPU_FINETRIM_SELECT_0 configuration" bitfld.long 0x14 5. " FCPU_6 ,FCPU_6" "0,1" bitfld.long 0x14 4. " FCPU_4 ,FCPU_4" "0,1" textline " " bitfld.long 0x14 3. " FCPU_4 ,FCPU_4" "0,1" bitfld.long 0x14 2. " FCPU_3 ,FCPU_3" "0,1" textline " " bitfld.long 0x14 1. " FCPU_2 ,FCPU_2" "0,1" bitfld.long 0x14 0. " FCPU_1 ,FCPU_1" "0,1" line.long 0x18 "CPU_FINETRIM_DR_0,CPU_FINETRIM_DR_0 configuration" bitfld.long 0x18 5. " FCPU_6 ,FCPU_6" "0,1" bitfld.long 0x18 4. " FCPU_4 ,FCPU_4" "0,1" textline " " bitfld.long 0x18 3. " FCPU_4 ,FCPU_4" "0,1" bitfld.long 0x18 2. " FCPU_3 ,FCPU_3" "0,1" textline " " bitfld.long 0x18 1. " FCPU_2 ,FCPU_2" "0,1" bitfld.long 0x18 0. " FCPU_1 ,FCPU_1" "0,1" line.long 0x1C "CPU_FINETRIM_DF_0,CPU_FINETRIM_DF_0 configuration" bitfld.long 0x1C 5. " FCPU_6 ,FCPU_6" "0,1" bitfld.long 0x1C 4. " FCPU_4 ,FCPU_4" "0,1" textline " " bitfld.long 0x1C 3. " FCPU_4 ,FCPU_4" "0,1" bitfld.long 0x1C 2. " FCPU_3 ,FCPU_3" "0,1" textline " " bitfld.long 0x1C 1. " FCPU_2 ,FCPU_2" "0,1" bitfld.long 0x1C 0. " FCPU_1 ,FCPU_1" "0,1" line.long 0x20 "CPU_FINETRIM_F_0,CPU_FINETRIM_F_0 configuration" bitfld.long 0x20 10.--11. " FCPU_6 ,FCPU_6" "0,1,2,3" bitfld.long 0x20 8.--9. " FCPU_4 ,FCPU_4" "0,1,2,3" textline " " bitfld.long 0x20 6.--7. " FCPU_4 ,FCPU_4" "0,1,2,3" bitfld.long 0x20 4.--5. " FCPU_3 ,FCPU_3" "0,1,2,3" textline " " bitfld.long 0x20 2.--3. " FCPU_2 ,FCPU_2" "0,1,2,3" bitfld.long 0x20 0.--1. " FCPU_1 ,FCPU_1" "0,1,2,3" line.long 0x24 "CPU_FINETRIM_R_0,CPU_FINETRIM_R_0 configuration" bitfld.long 0x24 10.--11. " FCPU_6 ,FCPU_6" "0,1,2,3" bitfld.long 0x24 8.--9. " FCPU_4 ,FCPU_4" "0,1,2,3" textline " " bitfld.long 0x24 6.--7. " FCPU_4 ,FCPU_4" "0,1,2,3" bitfld.long 0x24 4.--5. " FCPU_3 ,FCPU_3" "0,1,2,3" textline " " bitfld.long 0x24 2.--3. " FCPU_2 ,FCPU_2" "0,1,2,3" bitfld.long 0x24 0.--1. " FCPU_1 ,FCPU_1" "0,1,2,3" tree.end tree "PLLC2,PLLC3 & PLLX control" group.long 0x4E8++0x13 line.long 0x00 "PLLC2_BASE_0,PLLC2_BASE_0 configuration" bitfld.long 0x00 31. " PLLC2_BYPASS ,PLLC2 Bypass" "Disabled,Enabled" bitfld.long 0x00 30. " PLLC2_ENABLE ,PLLC2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLC2_REF_DIS ,Reference clock disable" "No,Yes" rbitfld.long 0x00 27. " PLLC2_FREQ_LOCK ,PLLC2 frequency lock" "Not locked,Locked" textline " " rbitfld.long 0x00 26. " PLLC2_LOCK ,PLLC2 lock" "Not locked,Locked" bitfld.long 0x00 20.--24. " PLLC2_DIVP ,PLLC2_DIVP" "Post divider,?..." textline " " hexmask.long.byte 0x00 10.--17. 1. " PLLC2_DIVN ,PLL feedback divider" hexmask.long.byte 0x00 0.--7. 1. " PLLC2_DIVM ,PLL input divider" line.long 0x04 "PLLC2_MISC_0_0,PLLC2_MISC_0_0 configuration" bitfld.long 0x04 30. " PLLC2_RESET ,Reset for digital logic of the PLL" "Disabled,Enabled" hexmask.long.word 0x04 4.--19. 1. " PLLC2_EXT_FRU ,PLLC2_EXT_FRU" textline " " bitfld.long 0x04 3. " PLLC2_PTS ,Base PLLC2 test output select" "Disabled,FO" bitfld.long 0x04 0.--1. " PLLC2_LOOP_CTRL ,PLLC2 loop control" "0,1,2,3" line.long 0x08 "PLLC2_MISC_1_0,PLLC2_MISC_1_0 configuration" bitfld.long 0x08 27. " PLLC2_IDDQ ,PLLC2_IDDQ" "OFF,ON" bitfld.long 0x08 10.--13. " PLLC2_EXT_SUBINT ,PLLC2_EXT_SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x08 0.--7. 1. " PLLC2_DIVN_FRAC ,PLLC2_DIVN_FRAC" line.long 0x0C "PLLC2_MISC_2_0,PLLC2_MISC_2_0 configuration" hexmask.long.byte 0x0C 24.--31. 1. " PLLC2_PLL_LD_MEM ,PLLC2_PLL_LD_MEM" bitfld.long 0x0C 20.--23. " PLLC2_PLL_FRUG_HIGH ,PLLC2_PLL_FRUG_HIGH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 16.--19. " PLLC2_PLL_FRUG_LOW ,PLLC2_PLL_FRUG_LOW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x0C 8.--15. 1. " PLLC2_FLL_LD_MEM ,PLLC2_FLL_LD_MEM" textline " " bitfld.long 0x0C 4. " PLLC2_FLL_DIV ,PLLC2_FLL_DIV" "0,1" bitfld.long 0x0C 0.--2. " PLLC2_FLL_FRUG ,PLLC2_FLL_FRUG" "0,1,2,3,4,5,6,7" line.long 0x10 "PLLC2_MISC_3_0,PLLC2_MISC_3_0 configuration" hexmask.long.word 0x10 8.--23. 1. " PLLC2_SETUP ,PLLC2_SETUP" bitfld.long 0x10 6.--7. " PLLC2_KP ,PLLC2_KP" "0,1,2,3" textline " " bitfld.long 0x10 4.--5. " PLLC2_LDIV ,PLLC2_LDIV" "0,1,2,3" bitfld.long 0x10 0.--3. " PLLC2_PLL_LD_TOL ,PLLC2_PLL_LD_TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4FC++0x13 line.long 0x00 "PLLC3_BASE_0,PLLC3_BASE_0 configuration" bitfld.long 0x00 31. " PLLC3_BYPASS ,PLLC3 Bypass" "Disabled,Enabled" bitfld.long 0x00 30. " PLLC3_ENABLE ,PLLC3 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLC3_REF_DIS ,Reference clock disable" "No,Yes" rbitfld.long 0x00 27. " PLLC3_FREQ_LOCK ,PLLC3 frequency lock" "Not locked,Locked" textline " " rbitfld.long 0x00 26. " PLLC3_LOCK ,PLLC3 lock" "Not locked,Locked" bitfld.long 0x00 20.--24. " PLLC3_DIVP ,PLLC3_DIVP" "Post divider,?..." textline " " hexmask.long.byte 0x00 10.--17. 1. " PLLC3_DIVN ,PLL feedback divider" hexmask.long.byte 0x00 0.--7. 1. " PLLC3_DIVM ,PLL input divider" line.long 0x04 "PLLC3_MISC_0_0,PLLC3_MISC_0_0 configuration" bitfld.long 0x04 30. " PLLC3_RESET ,Reset for digital logic of the PLL" "Disabled,Enabled" hexmask.long.word 0x04 4.--19. 1. " PLLC3_EXT_FRU ,PLLC3_EXT_FRU" textline " " bitfld.long 0x04 3. " PLLC3_PTS ,Base PLLC3 test output select" "Disabled,FO" bitfld.long 0x04 0.--1. " PLLC3_LOOP_CTRL ,PLLC3 loop control" "0,1,2,3" line.long 0x08 "PLLC3_MISC_1_0,PLLC3_MISC_1_0 configuration" bitfld.long 0x08 27. " PLLC3_IDDQ ,PLLC3_IDDQ" "OFF,ON" bitfld.long 0x08 10.--13. " PLLC3_EXT_SUBINT ,PLLC3_EXT_SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x08 0.--7. 1. " PLLC3_DIVN_FRAC ,PLLC3_DIVN_FRAC" line.long 0x0C "PLLC3_MISC_2_0,PLLC3_MISC_2_0 configuration" hexmask.long.byte 0x0C 24.--31. 1. " PLLC3_PLL_LD_MEM ,PLLC3_PLL_LD_MEM" bitfld.long 0x0C 20.--23. " PLLC3_PLL_FRUG_HIGH ,PLLC3_PLL_FRUG_HIGH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 16.--19. " PLLC3_PLL_FRUG_LOW ,PLLC3_PLL_FRUG_LOW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x0C 8.--15. 1. " PLLC3_FLL_LD_MEM ,PLLC3_FLL_LD_MEM" textline " " bitfld.long 0x0C 4. " PLLC3_FLL_DIV ,PLLC3_FLL_DIV" "0,1" bitfld.long 0x0C 0.--2. " PLLC3_FLL_FRUG ,PLLC3_FLL_FRUG" "0,1,2,3,4,5,6,7" line.long 0x10 "PLLC3_MISC_3_0,PLLC3_MISC_3_0 configuration" hexmask.long.word 0x10 8.--23. 1. " PLLC3_SETUP ,PLLC3_SETUP" bitfld.long 0x10 6.--7. " PLLC3_KP ,PLLC3_KP" "0,1,2,3" textline " " bitfld.long 0x10 4.--5. " PLLC3_LDIV ,PLLC3_LDIV" "0,1,2,3" bitfld.long 0x10 0.--3. " PLLC3_PLL_LD_TOL ,PLLC3_PLL_LD_TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x510++0x0B line.long 0x00 "PLLX_MISC_1_0,PLLX_MISC_1_0 configuration" hexmask.long.tbyte 0x00 0.--23. 1. " PLLX_SETUP ,Base PLLX test output select" line.long 0x04 "PLLX_MISC_2_0,PLLX_MISC_2_0 configuration" hexmask.long.byte 0x04 24.--31. 1. " PLLX_DYNRAMP_STEPB ,MISC_2 PLLX DYNRAMP" hexmask.long.byte 0x04 16.--23. 1. " PLLX_DYNRAMP_STEPA ,MISC_2 PLLX DYNRAMP" textline " " hexmask.long.byte 0x04 8.--15. 1. " PLLX_NDIV_NEW ,MISC_2 PLLX DYNRAMP" bitfld.long 0x04 4. " PLLX_LOCK_OVERRIDE ,MISC_2 PLLX DYNRAMP" "0,1" textline " " rbitfld.long 0x04 3. " PLLX_PLL_FREQLOCK ,MISC_2 PLLX DYNRAMP" "0,1" rbitfld.long 0x04 2. " PLLX_DYNRAMP_DONE ,MISC_2 PLLX DYNRAMP" "0,1" textline " " bitfld.long 0x04 0. " PLLX_EN_DYNRAMP ,MISC_2 PLLX DYNRAMP" "0,1" line.long 0x08 "PLLX_MISC_3_0,PLLX_MISC_3_0 configuration" bitfld.long 0x08 24. " PLLX_PRB_OBS_SYS_SEL ,Select SYS Observation clock as PLLX Probe input" "0,1" hexmask.long.byte 0x08 16.--23. 1. " PLLX_PRB_OBS_SEL ,PLLX_PRB_OBS_SEL" textline " " bitfld.long 0x08 10.--11. " PLLX_PRB_DRV_CTRL ,PLLX_PRB_DRV_CTRL" "0,1,2,3" bitfld.long 0x08 8.--9. " PLLX_SEL_PRB ,PLLX_SEL_PRB" "0,1,2,3" textline " " bitfld.long 0x08 3. " PLLX_IDDQ ,PLLX_IDDQ" "OFF,ON" bitfld.long 0x08 1.--2. " PLLX_KCP ,Charge Pump Gain control" "0,1,2,3" textline " " bitfld.long 0x08 0. " PLLX_KVCO ,VCO gain" "0,1" tree.end textline " " if (((per.l(ad:0x60006000+0x51C))&0x05)==0x05) group.long 0x51C++0x03 line.long 0x00 "XUSBIO_PLL_CFG0_0,XUSBIO_PLL_CFG0_0 configuration" bitfld.long 0x00 28.--31. " XUSBIO_PADPLL_IDDQ2_PADPLL_RCAL_DLY ,Delay from XUSBIO PAD PLL IDDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 26.--27. " XUSBIO_SEQ_STATE ,XUSBIO power sequencer state" "SEQ_OFF,SEQ_ON,SEQ_BUSY,?..." textline " " bitfld.long 0x00 25. " XUSBIO_SEQ_START_STATE ,XUSBIO power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " XUSBIO_SEQ_ENABLE ,XUSBIO power sequencer enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 16. " XUSBIO_PADPLL_CAL_VALID ,Indicator that Brick PLL calibration was done and is valid" "Not done/invalid,Done/valid" bitfld.long 0x00 15. " XUSBIO_PADPLL_REQ_PLL_RCAL_BYPASS ,Register calibration bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " XUSBIO_PADPLL_REQ_PLL_RCAL ,Force PLL Resistor calibration" "Not forced,Forced" bitfld.long 0x00 13. " XUSBIO_PADPLL_SLEEP_IDDQ ,IDDQ value during SLEEP mode" "0,1" textline " " bitfld.long 0x00 11.--12. " XUSBIO_PADPLL_SLEEP_VAL ,Sleep state select" ",1,2,3" bitfld.long 0x00 10. " XUSBIO_PADPLL_CAL_VALID_RST ,CAL_VALID reset" "Not reset,Reset" textline " " bitfld.long 0x00 9. " XUSBIO_PADPLL_REQ_PLL_CAL_RESET ,Reset PLL VCO calibration" "Not reset,Reset" bitfld.long 0x00 8. " XUSBIO_PADPLL_REQ_PLL_CAL ,Force PLL VCO calibration" "Not forced,Forced" textline " " bitfld.long 0x00 6. " XUSBIO_PADPLL_USE_LOCKDET ,XUSBIO_PADPLL_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" bitfld.long 0x00 5. " XUSBIO_SEQ_RESET_INPUT_VALUE ,XUSBIO reset input value" "OFF,ON" textline " " bitfld.long 0x00 4. " XUSBIO_SEQ_IN_SWCTL ,Seq input" "Hardware,software" bitfld.long 0x00 3. " XUSBIO_CLK_ENABLE_OVERRIDE_VALUE ,Override value enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " XUSBIO_CLK_ENABLE_SWCTL ,SWCTL enable" "Disabled,Enabled" bitfld.long 0x00 1. " XUSBIO_PADPLL_RESET_OVERRIDE_VALUE ,Override value" "0,1" textline " " bitfld.long 0x00 0. " XUSBIO_PADPLL_RESET_SWCTL ,SWCTL reset" "Not reset,Reset" elif (((per.l(ad:0x60006000+0x51C))&0x05)==0x04) group.long 0x51C++0x03 line.long 0x00 "XUSBIO_PLL_CFG0_0,XUSBIO_PLL_CFG0_0 configuration" bitfld.long 0x00 28.--31. " XUSBIO_PADPLL_IDDQ2_PADPLL_RCAL_DLY ,Delay from XUSBIO PAD PLL IDDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 26.--27. " XUSBIO_SEQ_STATE ,XUSBIO power sequencer state" "SEQ_OFF,SEQ_ON,SEQ_BUSY,?..." textline " " bitfld.long 0x00 25. " XUSBIO_SEQ_START_STATE ,XUSBIO power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " XUSBIO_SEQ_ENABLE ,XUSBIO power sequencer enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 16. " XUSBIO_PADPLL_CAL_VALID ,Indicator that Brick PLL calibration was done and is valid" "Not done/invalid,Done/valid" bitfld.long 0x00 15. " XUSBIO_PADPLL_REQ_PLL_RCAL_BYPASS ,Register calibration bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " XUSBIO_PADPLL_REQ_PLL_RCAL ,Force PLL Resistor calibration" "Not forced,Forced" bitfld.long 0x00 13. " XUSBIO_PADPLL_SLEEP_IDDQ ,IDDQ value during SLEEP mode" "0,1" textline " " bitfld.long 0x00 11.--12. " XUSBIO_PADPLL_SLEEP_VAL ,Sleep state select" ",1,2,3" bitfld.long 0x00 10. " XUSBIO_PADPLL_CAL_VALID_RST ,CAL_VALID reset" "Not reset,Reset" textline " " bitfld.long 0x00 9. " XUSBIO_PADPLL_REQ_PLL_CAL_RESET ,Reset PLL VCO calibration" "Not reset,Reset" bitfld.long 0x00 8. " XUSBIO_PADPLL_REQ_PLL_CAL ,Force PLL VCO calibration" "Not forced,Forced" textline " " bitfld.long 0x00 6. " XUSBIO_PADPLL_USE_LOCKDET ,XUSBIO_PADPLL_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" bitfld.long 0x00 5. " XUSBIO_SEQ_RESET_INPUT_VALUE ,XUSBIO reset input value" "OFF,ON" textline " " bitfld.long 0x00 4. " XUSBIO_SEQ_IN_SWCTL ,Seq input" "Hardware,software" bitfld.long 0x00 3. " XUSBIO_CLK_ENABLE_OVERRIDE_VALUE ,Override value enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " XUSBIO_CLK_ENABLE_SWCTL ,SWCTL enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XUSBIO_PADPLL_RESET_SWCTL ,SWCTL reset" "Not reset,Reset" elif (((per.l(ad:0x60006000+0x51C))&0x05)==0x01) group.long 0x51C++0x03 line.long 0x00 "XUSBIO_PLL_CFG0_0,XUSBIO_PLL_CFG0_0 configuration" bitfld.long 0x00 28.--31. " XUSBIO_PADPLL_IDDQ2_PADPLL_RCAL_DLY ,Delay from XUSBIO PAD PLL IDDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 26.--27. " XUSBIO_SEQ_STATE ,XUSBIO power sequencer state" "SEQ_OFF,SEQ_ON,SEQ_BUSY,?..." textline " " bitfld.long 0x00 25. " XUSBIO_SEQ_START_STATE ,XUSBIO power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " XUSBIO_SEQ_ENABLE ,XUSBIO power sequencer enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 16. " XUSBIO_PADPLL_CAL_VALID ,Indicator that Brick PLL calibration was done and is valid" "Not done/invalid,Done/valid" bitfld.long 0x00 15. " XUSBIO_PADPLL_REQ_PLL_RCAL_BYPASS ,Register calibration bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " XUSBIO_PADPLL_REQ_PLL_RCAL ,Force PLL Resistor calibration" "Not forced,Forced" bitfld.long 0x00 13. " XUSBIO_PADPLL_SLEEP_IDDQ ,IDDQ value during SLEEP mode" "0,1" textline " " bitfld.long 0x00 11.--12. " XUSBIO_PADPLL_SLEEP_VAL ,Sleep state select" ",1,2,3" bitfld.long 0x00 10. " XUSBIO_PADPLL_CAL_VALID_RST ,CAL_VALID reset" "Not reset,Reset" textline " " bitfld.long 0x00 9. " XUSBIO_PADPLL_REQ_PLL_CAL_RESET ,Reset PLL VCO calibration" "Not reset,Reset" bitfld.long 0x00 8. " XUSBIO_PADPLL_REQ_PLL_CAL ,Force PLL VCO calibration" "Not forced,Forced" textline " " bitfld.long 0x00 6. " XUSBIO_PADPLL_USE_LOCKDET ,XUSBIO_PADPLL_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" bitfld.long 0x00 5. " XUSBIO_SEQ_RESET_INPUT_VALUE ,XUSBIO reset input value" "OFF,ON" textline " " bitfld.long 0x00 4. " XUSBIO_SEQ_IN_SWCTL ,Seq input" "Hardware,software" textline " " bitfld.long 0x00 2. " XUSBIO_CLK_ENABLE_SWCTL ,SWCTL enable" "Disabled,Enabled" bitfld.long 0x00 1. " XUSBIO_PADPLL_RESET_OVERRIDE_VALUE ,Override value" "0,1" textline " " bitfld.long 0x00 0. " XUSBIO_PADPLL_RESET_SWCTL ,SWCTL reset" "Not reset,Reset" else group.long 0x51C++0x03 line.long 0x00 "XUSBIO_PLL_CFG0_0,XUSBIO_PLL_CFG0_0 configuration" bitfld.long 0x00 28.--31. " XUSBIO_PADPLL_IDDQ2_PADPLL_RCAL_DLY ,Delay from XUSBIO PAD PLL IDDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 26.--27. " XUSBIO_SEQ_STATE ,XUSBIO power sequencer state" "SEQ_OFF,SEQ_ON,SEQ_BUSY,?..." textline " " bitfld.long 0x00 25. " XUSBIO_SEQ_START_STATE ,XUSBIO power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " XUSBIO_SEQ_ENABLE ,XUSBIO power sequencer enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 16. " XUSBIO_PADPLL_CAL_VALID ,Indicator that Brick PLL calibration was done and is valid" "Not done/invalid,Done/valid" bitfld.long 0x00 15. " XUSBIO_PADPLL_REQ_PLL_RCAL_BYPASS ,Register calibration bypass" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " XUSBIO_PADPLL_REQ_PLL_RCAL ,Force PLL Resistor calibration" "Not forced,Forced" bitfld.long 0x00 13. " XUSBIO_PADPLL_SLEEP_IDDQ ,IDDQ value during SLEEP mode" "0,1" textline " " bitfld.long 0x00 11.--12. " XUSBIO_PADPLL_SLEEP_VAL ,Sleep state select" ",1,2,3" bitfld.long 0x00 10. " XUSBIO_PADPLL_CAL_VALID_RST ,CAL_VALID reset" "Not reset,Reset" textline " " bitfld.long 0x00 9. " XUSBIO_PADPLL_REQ_PLL_CAL_RESET ,Reset PLL VCO calibration" "Not reset,Reset" bitfld.long 0x00 8. " XUSBIO_PADPLL_REQ_PLL_CAL ,Force PLL VCO calibration" "Not forced,Forced" textline " " bitfld.long 0x00 6. " XUSBIO_PADPLL_USE_LOCKDET ,XUSBIO_PADPLL_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" bitfld.long 0x00 5. " XUSBIO_SEQ_RESET_INPUT_VALUE ,XUSBIO reset input value" "OFF,ON" textline " " bitfld.long 0x00 4. " XUSBIO_SEQ_IN_SWCTL ,Seq input" "Hardware,Software" textline " " bitfld.long 0x00 2. " XUSBIO_CLK_ENABLE_SWCTL ,SWCTL enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " XUSBIO_PADPLL_RESET_SWCTL ,SWCTL reset" "Not reset,Reset" endif group.long 0x520++0x0B line.long 0x00 "XUSBIO_PLL_CFG1_0,XUSBIO_PLL_CFG1_0 configuration" hexmask.long.byte 0x00 16.--23. 1. " XUSBIO_PADPLL_RESET2_PADPLL_IDDQ_DLY ,Delay from XUSBIO PAD PLL SLEEP assertion" hexmask.long.byte 0x00 8.--15. 1. " XUSBIO_PADPLL_IDDQ2_PADPLL_RESET_DLY ,Delay from XUSBIO PAD PLL SLEEP de-assertion" textline " " hexmask.long.byte 0x00 0.--7. 1. " XUSBIO_PADPLL_PU_POST_DLY ,Delay from XUSBIO PAD PLL Enable assertion" line.long 0x04 "PLLE_AUX1_0,PLLE_AUX1_0 configuration" hexmask.long.byte 0x04 8.--15. 1. " PLLE_INTRESET_DLY ,Delay between PLLE SSC_BYP -> PLLE INTERP_RESET" hexmask.long.byte 0x04 0.--7. 1. " PLLE_ENABLE_DLY , Delay from PLLE IDDQ de-assertion" line.long 0x08 "PLLP_RESHIFT_0,PLLP_RESHIFT_0 configuration" hexmask.long.byte 0x08 2.--9. 1. " PLLP_OUT0_RATIO ,PLLP_OUT0 divider from base PLLP" bitfld.long 0x08 1. " PLLP_OUT0_CLKEN ,PLLP_OUT0 divider clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " PLLP_OUT0_RSTN ,PLLP_OUT0 divider reset" "Not reset,Reset" if (((per.l(ad:0x60006000+0x52C))&0x05)==0x05) group.long 0x52C++0x03 line.long 0x00 "UTMIPLL_HW_PWRDN_CFG0_0,UTMIPLL_HW_PWRDN_CFG0_0 configuration" rbitfld.long 0x00 31. " UTMIPLL_LOCK ,UTMIPLL_LOCK" "Not locked,Locked" rbitfld.long 0x00 26.--27. " UTMIPLL_SEQ_STATE ,UTMIPLL power sequencer state" "OFF,ON,Busy,?..." textline " " bitfld.long 0x00 25. " UTMIPLL_SEQ_START_STATE ,UTMIPLL power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " UTMIPLL_SEQ_ENABLE ,UTMIPLL power sequencer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " UTMIPLL_IDDQ_PD_INCLUDE ,UTMIPLL_IDDQ_PD_INCLUDE" "0,1" bitfld.long 0x00 6. " UTMIPLL_USE_LOCKDET ,UTMIPLL_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" textline " " bitfld.long 0x00 5. " UTMIPLL_SEQ_RESET_INPUT_VALUE ,UTMIPLL_SEQ_RESET_INPUT_VALUE" "ON,OFF" bitfld.long 0x00 4. " UTMIPLL_SEQ_IN_SWCTL ,UTMIPLL_SEQ_IN_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 3. " UTMIPLL_CLK_ENABLE_OVERRIDE_VALUE ,UTMIPLL_CLK_ENABLE_OVERRIDE_VALUE" "Disabled,Enabled" bitfld.long 0x00 2. " UTMIPLL_CLK_ENABLE_SWCTL ,UTMIPLL_CLK_ENABLE_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 1. " UTMIPLL_IDDQ_OVERRIDE_VALUE ,IDDQ override" "Not IDDQ mode,IDDQ mode" bitfld.long 0x00 0. " UTMIPLL_IDDQ_SWCTL ,UTMIPLL_IDDQ_SWCTL" "Hardware,Software" elif (((per.l(ad:0x60006000+0x52C))&0x05)==0x04) group.long 0x52C++0x03 line.long 0x00 "UTMIPLL_HW_PWRDN_CFG0_0,UTMIPLL_HW_PWRDN_CFG0_0 configuration" rbitfld.long 0x00 31. " UTMIPLL_LOCK ,UTMIPLL_LOCK" "Not locked,Locked" rbitfld.long 0x00 26.--27. " UTMIPLL_SEQ_STATE ,UTMIPLL power sequencer state" "OFF,ON,Busy,?..." textline " " bitfld.long 0x00 25. " UTMIPLL_SEQ_START_STATE ,UTMIPLL power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " UTMIPLL_SEQ_ENABLE ,UTMIPLL power sequencer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " UTMIPLL_IDDQ_PD_INCLUDE ,UTMIPLL_IDDQ_PD_INCLUDE" "0,1" bitfld.long 0x00 6. " UTMIPLL_USE_LOCKDET ,UTMIPLL_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" textline " " bitfld.long 0x00 5. " UTMIPLL_SEQ_RESET_INPUT_VALUE ,UTMIPLL_SEQ_RESET_INPUT_VALUE" "ON,OFF" bitfld.long 0x00 4. " UTMIPLL_SEQ_IN_SWCTL ,UTMIPLL_SEQ_IN_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 3. " UTMIPLL_CLK_ENABLE_OVERRIDE_VALUE ,UTMIPLL_CLK_ENABLE_OVERRIDE_VALUE" "Disabled,Enabled" bitfld.long 0x00 2. " UTMIPLL_CLK_ENABLE_SWCTL ,UTMIPLL_CLK_ENABLE_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 0. " UTMIPLL_IDDQ_SWCTL ,UTMIPLL_IDDQ_SWCTL" "Hardware,Software" elif (((per.l(ad:0x60006000+0x52C))&0x05)==0x01) group.long 0x52C++0x03 line.long 0x00 "UTMIPLL_HW_PWRDN_CFG0_0,UTMIPLL_HW_PWRDN_CFG0_0 configuration" rbitfld.long 0x00 31. " UTMIPLL_LOCK ,UTMIPLL_LOCK" "Not locked,Locked" rbitfld.long 0x00 26.--27. " UTMIPLL_SEQ_STATE ,UTMIPLL power sequencer state" "OFF,ON,Busy,?..." textline " " bitfld.long 0x00 25. " UTMIPLL_SEQ_START_STATE ,UTMIPLL power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " UTMIPLL_SEQ_ENABLE ,UTMIPLL power sequencer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " UTMIPLL_IDDQ_PD_INCLUDE ,UTMIPLL_IDDQ_PD_INCLUDE" "0,1" bitfld.long 0x00 6. " UTMIPLL_USE_LOCKDET ,UTMIPLL_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" textline " " bitfld.long 0x00 5. " UTMIPLL_SEQ_RESET_INPUT_VALUE ,UTMIPLL_SEQ_RESET_INPUT_VALUE" "ON,OFF" bitfld.long 0x00 4. " UTMIPLL_SEQ_IN_SWCTL ,UTMIPLL_SEQ_IN_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 2. " UTMIPLL_CLK_ENABLE_SWCTL ,UTMIPLL_CLK_ENABLE_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 1. " UTMIPLL_IDDQ_OVERRIDE_VALUE ,IDDQ override" "Not IDDQ mode,IDDQ mode" bitfld.long 0x00 0. " UTMIPLL_IDDQ_SWCTL ,UTMIPLL_IDDQ_SWCTL" "Hardware,Software" else group.long 0x52C++0x03 line.long 0x00 "UTMIPLL_HW_PWRDN_CFG0_0,UTMIPLL_HW_PWRDN_CFG0_0 configuration" rbitfld.long 0x00 31. " UTMIPLL_LOCK ,UTMIPLL_LOCK" "Not locked,Locked" rbitfld.long 0x00 26.--27. " UTMIPLL_SEQ_STATE ,UTMIPLL power sequencer state" "OFF,ON,Busy,?..." textline " " bitfld.long 0x00 25. " UTMIPLL_SEQ_START_STATE ,UTMIPLL power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " UTMIPLL_SEQ_ENABLE ,UTMIPLL power sequencer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " UTMIPLL_IDDQ_PD_INCLUDE ,UTMIPLL_IDDQ_PD_INCLUDE" "0,1" bitfld.long 0x00 6. " UTMIPLL_USE_LOCKDET ,UTMIPLL_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" textline " " bitfld.long 0x00 5. " UTMIPLL_SEQ_RESET_INPUT_VALUE ,UTMIPLL_SEQ_RESET_INPUT_VALUE" "ON,OFF" bitfld.long 0x00 4. " UTMIPLL_SEQ_IN_SWCTL ,UTMIPLL_SEQ_IN_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 2. " UTMIPLL_CLK_ENABLE_SWCTL ,UTMIPLL_CLK_ENABLE_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 0. " UTMIPLL_IDDQ_SWCTL ,UTMIPLL_IDDQ_SWCTL" "Hardware,Software" endif if (((per.l(ad:0x60006000+0x530))&0x04)==0x04) group.long 0x530++0x03 line.long 0x00 "PLLU_HW_PWRDN_CFG0_0,PLLU_HW_PWRDN_CFG0_0 configuration" bitfld.long 0x00 28. " PLLU_IDDQ_PD_INCLUDE ,PLLU_IDDQ_PD_INCLUDE" "0,1" rbitfld.long 0x00 26.--27. " PLLU_SEQ_STATE ,PLLU power sequencer state" "OFF,ON,Busy,?..." textline " " bitfld.long 0x00 25. " PLLU_SEQ_START_STATE ,PLLU power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " PLLU_SEQ_ENABLE ,PLLU power sequencer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLLU_USE_SWITCH_DETECT ,PLLU_USE_SWITCH_DETECT" "Programmable delay,Switch detect logic" bitfld.long 0x00 6. " PLLU_USE_LOCKDET ,PLLU_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" textline " " bitfld.long 0x00 5. " PLLU_SEQ_RESET_INPUT_VALUE ,PLLU_SEQ_RESET_INPUT_VALUE" "ON,OFF" bitfld.long 0x00 4. " PLLU_SEQ_IN_SWCTL ,PLLU_SEQ_IN_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 3. " PLLU_CLK_ENABLE_OVERRIDE_VALUE ,PLLU_CLK_ENABLE_OVERRIDE_VALUE" "Disabled,Enabled" bitfld.long 0x00 2. " PLLU_CLK_ENABLE_SWCTL ,PLLU_CLK_ENABLE_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 0. " PLLU_CLK_SWITCH_SWCTL ,Control SS/FS clock frequency" "Hardware,Software" else group.long 0x530++0x03 line.long 0x00 "PLLU_HW_PWRDN_CFG0_0,PLLU_HW_PWRDN_CFG0_0 configuration" bitfld.long 0x00 28. " PLLU_IDDQ_PD_INCLUDE ,PLLU_IDDQ_PD_INCLUDE" "0,1" rbitfld.long 0x00 26.--27. " PLLU_SEQ_STATE ,PLLU power sequencer state" "OFF,ON,Busy,?..." textline " " bitfld.long 0x00 25. " PLLU_SEQ_START_STATE ,PLLU power sequencer start state" "OFF,ON" bitfld.long 0x00 24. " PLLU_SEQ_ENABLE ,PLLU power sequencer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PLLU_USE_SWITCH_DETECT ,PLLU_USE_SWITCH_DETECT" "Programmable delay,Switch detect logic" bitfld.long 0x00 6. " PLLU_USE_LOCKDET ,PLLU_USE_LOCKDET" "Programmable delay,Lockdet signals from PLL" textline " " bitfld.long 0x00 5. " PLLU_SEQ_RESET_INPUT_VALUE ,PLLU_SEQ_RESET_INPUT_VALUE" "ON,OFF" bitfld.long 0x00 4. " PLLU_SEQ_IN_SWCTL ,PLLU_SEQ_IN_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 2. " PLLU_CLK_ENABLE_SWCTL ,PLLU_CLK_ENABLE_SWCTL" "Hardware,Software" textline " " bitfld.long 0x00 0. " PLLU_CLK_SWITCH_SWCTL ,Control SS/FS clock frequency" "Hardware,Software" endif group.long 0x534++0x03 line.long 0x00 "XUSB_PLL_CFG0_0,XUSB_PLL_CFG0_0 configuration" hexmask.long.byte 0x00 24.--31. 1. " PLLU_CLK_SWITCH_DLY ,Delay from SS Clock source" hexmask.long.word 0x00 14.--23. 1. " PLLU_LOCK_DLY ,Delay from PLLU ENABLE assertion" textline " " bitfld.long 0x00 10.--13. " UTMIPLL_IDDQ2_ENABLE_DLY ,Delay from UTMIPLL IDDQ de-assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--9. 1. " UTMIPLL_LOCK_DLY ,Delay from UTMIPLL ENABLE assertion" group.long 0x53C++0x07 line.long 0x00 "CLK_CPU_MISC_0,CLK_CPU_MISC_0 configuration" bitfld.long 0x00 0.--2. " CPU_ATCLK_RATIO ,Clock divider ratio for the ATB clocks in CCPLEX" "div-by-2,div-by-3,div-by-4,div-by-5,div-by-6,div-by-7,div-by-8,?..." line.long 0x04 "CLK_CPUG_MISC_0,CLK_CPUG_MISC_0 configuration" bitfld.long 0x04 0.--2. " CPU_ATCLK_RATIO ,Clock divider ratio for the ATB clocks in CCPLEX" "div-by-2,div-by-3,div-by-4,div-by-5,div-by-6,div-by-7,div-by-8,?..." group.long 0x548++0x0B line.long 0x00 "PLLX_HW_CTRL_CFG_0,PLLX_HW_CTRL_CFG_0 configuration" bitfld.long 0x00 6. " FORCE_FSM_CLEAR ,FORCE_FSM_CLEAR" "Disabled,Enabled" bitfld.long 0x00 4.--5. " SLOWDOWN_RESERVED ,SLOWDOWN_RESERVED" "REF_DIVM,REF_DIVM_DIV4,SCLK_DIV1,SCLK_DIV16" textline " " bitfld.long 0x00 3. " RAMP_MODE ,RAMP_MODE" "Slow,Fast" bitfld.long 0x00 2. " SEQ_TRIGGER ,SEQ_TRIGGER" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SW_OVERRIDE ,SW_OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 0. " SWCTL ,SWCTL" "Disabled,Enabled" line.long 0x04 "PLLX_SW_RAMP_CFG_0,PLLX_SW_CTRL_CFG_0 configuration" hexmask.long.byte 0x04 24.--31. 1. " DYNRAMP_STEPA ,PLL ramp rate" hexmask.long.byte 0x04 16.--23. 1. " DYNRAMP_STEPB ,PLL ramp rate" textline " " hexmask.long.byte 0x04 8.--15. 1. " NDIV_NEW ,PLL ramp rate" hexmask.long.byte 0x04 0.--7. 1. " NDIV ,PLL ramp rate" line.long 0x08 "PLLX_HW_CTRL_STATUS_0,PLLX_HW_CTRL_STATUS_0 configuration" bitfld.long 0x08 28.--31. " FSM_STATE ,FSM_STATE" "DISABLE,SEQ_AWAIT,SEQ_FAST_BEGIN,SEQ_FAST_BUSY0,SEQ_FAST_BUSY1,SEQ_FAST_BUSY2,SEQ_FAST_BUSY3,SEQ_SLOW_BEGIN,SEQ_SLOW_BUSY0,SEQ_SLOW_BUSY1,SEQ_SLOW_BUSY2,SEQ_SLOW_BUSY3,SEQ_DONE,?..." bitfld.long 0x08 26.--27. " CFG_REG_SELECT ,CFG_REG_SELECT" "NONE,Hardware,Software,?..." textline " " bitfld.long 0x08 10. " HW_RAMP_DONE ,HW_RAMP_DONE" "False,True" bitfld.long 0x08 9. " SW_RAMP_DONE ,SW_RAMP_DONE" "False,True" textline " " bitfld.long 0x08 8. " LONG_LATENCY_THROTTLE ,LONG_LATENCY_THROTTLE" "Disabled,Enabled" bitfld.long 0x08 7. " HW_RESTORE_EN ,HW_RESTORE_EN" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " HW_THROTTLE_EN ,HW_THROTTLE_EN" "Disabled,Enabled" bitfld.long 0x08 5. " SW_RAMP_STATUS ,SW_RAMP_STATUS" "Done,In progress" textline " " bitfld.long 0x08 4. " HW_RAMP_STATUS ,HW_RAMP_STATUS" "Done,In progress" bitfld.long 0x08 2.--3. " SEQ_STATUS ,SEQ_STATUS" "DISABLE,ENABLE,BUSY_FAST_MODE,BUSY_SLOW_MODE" textline " " bitfld.long 0x08 1. " SEQ_STATUS ,SEQ_STATUS" "Disabled,Enabled" bitfld.long 0x08 0. " SWCTL_STATUS ,SWCTL_STATUS" "Disabled,Enabled" group.long 0x55C++0x0B line.long 0x00 "SPARE_REG0_0,SPARE_REG0_0 configuration" hexmask.long 0x00 6.--31. 1. " VAL ,VAL" bitfld.long 0x00 5. " DIVIDER_FSM_RESERVED ,DIVIDER_FSM_RESERVED" "0,1" textline " " bitfld.long 0x00 4. " VAL1 ,VAL1" "0,1" bitfld.long 0x00 2.--3. " CLK_M_DIVISOR ,CLK_M_DIVISOR" "/1,/2,/3,/4" textline " " bitfld.long 0x00 1. " TMR_CLKEN_STICKY ,TMR_CLKEN_STICKY" "0,1" bitfld.long 0x00 0. " EMC_LATENCY_OVERRIDE ,EMC_LATENCY_OVERRIDE" "Not override,Override" line.long 0x04 "AUDIO_SYNC_CLK_DMIC1_0,AUDIO_SYNC_CLK_DMIC1_0 configuration" bitfld.long 0x04 4. " SYNC_CLK_DIS ,SYNC_CLK disable" "Enabled,Disabled" bitfld.long 0x04 0.--3. " SYNC_CLK_RATE ,SYNC_CLK_RATE" ",I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." line.long 0x08 "AUDIO_SYNC_CLK_DMIC2_0,AUDIO_SYNC_CLK_DMIC2_0 configuration" bitfld.long 0x08 4. " SYNC_CLK_DIS ,SYNC_CLK disable" "Enabled,Disabled" bitfld.long 0x08 0.--3. " SYNC_CLK_RATE ,SYNC_CLK_RATE" ",I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." tree "PLLD control" group.long 0x570++0x0B line.long 0x00 "PLLD2_SS_CFG_0,PLLD2_SS_CFG_0 configuration" bitfld.long 0x00 31. " PLLD2_EN_SDM ,Fractional N divider enable" "Disabled,Enabled" bitfld.long 0x00 30. " PLLD2_EN_SSC ,Spread spectrum enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLD2_EN_DITHER2 ,DITHER2 enable" "Disabled,Enabled" bitfld.long 0x00 28. " PLLD2_EN_DITHER ,DITHER enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " PLLD2_SDM_RESET ,PLLD2_SDM reset" "Not reset,Reset" rbitfld.long 0x00 23.--25. " PLLD2_SDM_TEST_OUT ,PLLD2_SDM_TEST_OUT" "0,1,2,3,4,5,6,7" line.long 0x04 "PLLD2_SS_CTRL1_0,PLLD2_SS_CTRL1_0 configuration" hexmask.long.word 0x04 16.--31. 1. " PLLD2_SDM_SSC_MAX ,PLLD2_SDM_SSC_MAX" hexmask.long.word 0x04 0.--15. 1. " PLLD2_SDM_SSC_MIN ,PLLD2_SDM_SSC_MIN" line.long 0x08 "PLLD2_SS_CTRL2_0,PLLD2_SS_CTRL2_0 configuration" hexmask.long.word 0x08 16.--31. 1. " PLLD2_SDM_SSC_STEP ,PLLD2_SDM_SSC_STEP" hexmask.long.word 0x08 0.--15. 1. " PLLD2_SDM_DIN ,PLLD2_SDM_DIN" group.long 0x590++0x13 line.long 0x00 "PLLDP_BASE_0,PLLDP_BASE_0 configuration" bitfld.long 0x00 31. " PLLDP_BYPASS ,PLLDP bypass" "Disabled,Enabled" bitfld.long 0x00 30. " PLLDP_ENABLE ,PLLDP enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLDP_REF_DIS ,PLLDP reference clk disable" "No,Yes" rbitfld.long 0x00 28. " PLLDP_FREQLOCK ,PLLDP frequency lock" "Not locked,Locked" textline " " rbitfld.long 0x00 27. " PLLDP_LOCK ,PLLDP lock" "Not locked,Locked" bitfld.long 0x00 25.--26. " PLLDP_REF_SRC_SEL ,Reference source select" "osc_div_clk,PLLREFE_CLKOUT,pllP_out0,PLLREFE_CLKOUT" textline " " bitfld.long 0x00 24. " PLLDP_LOCK_OVERRIDE ,Forces PLL_LOCK to 1" "Not override,Override" bitfld.long 0x00 19.--23. " PLLDP_PDIV ,PL divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 18. " PLLDP_IDDQ ,PLLDP_IDDQ" "OFF,ON" bitfld.long 0x00 16. " PLLDP_PTS ,Base PLLDP test output select" "0,FO" textline " " hexmask.long.byte 0x00 8.--15. 1. " PLLDP_NDIV ,N divider" hexmask.long.byte 0x00 0.--7. 1. " PLLDP_MDIV ,M divider" line.long 0x04 "PLLDP_MISC_0,PLLDP_MISC_0 configuration" bitfld.long 0x04 30. " PLLDP_EN_LCKDET ,PLLDP LCKDET enable" "Disabled,Enabled" bitfld.long 0x04 25.--26. " PLLDP_KCP ,Charge pump gain control" "0,1,2,3" textline " " bitfld.long 0x04 24. " PLLDP_KVCO ,VCO gain" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. " PLLDP_SETUP ,setup[23:0]" line.long 0x08 "PLLDP_SS_CFG_0,PLLDP_SS_CFG_0 configuration" bitfld.long 0x08 31. " PLLDP_EN_SDM ,Fractional N divider enable" "Disabled,Enabled" bitfld.long 0x08 30. " PLLDP_EN_SSC ,Spread spectrum enable" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " PLLDP_EN_DITHER2 ,DITHER2 enable" "Disabled,Enabled" bitfld.long 0x08 28. " PLLDP_EN_DITHER ,DITHER enable" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " PLLDP_SDM_RESET ,SDM reset" "Not reset,Reset" rbitfld.long 0x08 23.--25. " PLLDP_SDM_TEST_OUT ,PLLDP_SDM_TEST_OUT" "0,1,2,3,4,5,6,7" line.long 0x0C "PLLDP_SS_CTRL1_0,PLLDP_SS_CTRL1_0 configuration" hexmask.long.word 0x0C 16.--31. 1. " PLLDP_SDM_SSC_MAX ,PLLDP_SDM_SSC_MAX" hexmask.long.word 0x0C 0.--15. 1. " PLLDP_SDM_SSC_MIN ,PLLDP_SDM_SSC_MIN" line.long 0x10 "PLLDP_SS_CTRL2_0,PLLDP_SS_CTRL2_0 configuration" hexmask.long.word 0x10 16.--31. 1. " PLLDP_SDM_SSC_STEP ,PLLDP_SDM_SSC_STEP" hexmask.long.word 0x10 0.--15. 1. " PLLDP_SDM_DIN ,PLLDP_SDM_DIN" tree.end textline " " group.long 0x5A4++0x07 line.long 0x00 "PLLC4_BASE_0,PLLC4_BASE_0 configuration" bitfld.long 0x00 31. " PLLC4_BYPASS ,PLLC4 bypass" "Disabled,Enabled" bitfld.long 0x00 30. " PLLC4_ENABLE ,PLLC4 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLC4_REF_DIS ,PLLC4 reference clk disable" "No,Yes" rbitfld.long 0x00 28. " PLLC4_FREQLOCK ,PLLC4 frequency lock" "Not locked,Locked" textline " " rbitfld.long 0x00 27. " PLLC4_LOCK ,PLLC4 lock" "Not locked,Locked" bitfld.long 0x00 25.--26. " PLLC4_REF_SRC_SEL ,Reference source select" "osc_div_clk,PLLREFE_CLKOUT,pllP_out0,PLLREFE_CLKOUT" textline " " bitfld.long 0x00 24. " PLLC4_LOCK_OVERRIDE ,Forces PLL_LOCK to 1" "Not override,Override" bitfld.long 0x00 19.--23. " PLLC4_PDIV ,PL divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 18. " PLLC4_IDDQ ,PLLC4_IDDQ" "OFF,ON" bitfld.long 0x00 16.--17. " PLLC4_PTS ,Base PLLC4 test output select" "Disabled,FO,FO_DIV3,FO_DIV5" textline " " hexmask.long.byte 0x00 8.--15. 1. " PLLC4_NDIV ,N divider" hexmask.long.byte 0x00 0.--7. 1. " PLLC4_MDIV ,M divider" line.long 0x04 "PLLC4_MISC_0,PLLC4_MISC_0 configuration" bitfld.long 0x04 30. " PLLC4_EN_LCKDET ,PLLC4 LCKDET enable" "Disabled,Enabled" bitfld.long 0x04 25.--26. " PLLC4_KCP ,Charge pump gain control" "0,1,2,3" textline " " bitfld.long 0x04 24. " PLLC4_KVCO ,VCO gain" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. " PLLC4_SETUP ,setup[23:0]" group.long 0x5CC++0x0F line.long 0x00 "GPU_ISOB_CTRL_0,GPU_ISOB_CTRL_0 configuration" bitfld.long 0x00 0. " CAR_ISOB_EN ,Enable/Disable the idle slowdown on boot (ISoB) to the GPU" "Disabled,Enabled" line.long 0x04 "PLLC_MISC_2_0,PLLC_MISC_2_0 configuration" hexmask.long.byte 0x04 24.--31. 1. " PLLC_PLL_LD_MEM ,PLLC_PLL_LD_MEM" bitfld.long 0x04 20.--23. " PLLC_PLL_FRUG_HIGH ,PLLC_PLL_FRUG_HIGH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 16.--19. " PLLC_PLL_FRUG_LOW ,PLLC_PLL_FRUG_LOW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. " PLLC_FLL_LD_MEM ,PLLC_FLL_LD_MEM" textline " " bitfld.long 0x04 4. " PLLC_FLL_DIV ,PLLC_FLL_DIV" "0,1" bitfld.long 0x04 0.--2. " PLLC_FLL_FRUG ,PLLC_FLL_FRUG" "0,1,2,3,4,5,6,7" line.long 0x08 "PLLC_MISC_3_0,PLLC_MISC_3_0 configuration" hexmask.long.word 0x08 8.--23. 1. " PLLC_SETUP ,PLLC_SETUP" bitfld.long 0x08 6.--7. " PLLC_KP ,PLLC_KP" "0,1,2,3" textline " " bitfld.long 0x08 4.--5. " PLLC_LDIV ,PLLC_LDIV" "0,1,2,3" bitfld.long 0x08 0.--3. " PLLC_PLL_LD_TOL ,PLLC_PLL_LD_TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PLLA_MISC2_0,PLLA_MISC2_0 configuration" bitfld.long 0x0C 26. " PLLA_EN_SDM ,SDM enable" "Disabled,Enabled" bitfld.long 0x0C 25. " PLLA_EN_DYNRAMP ,DYNRAMP enable" "Disabled,Enabled" textline " " rbitfld.long 0x0C 24. " PLLA_DYNRAMP_DONE ,PLLA_DYNRAMP_DONE" "0,1" hexmask.long.byte 0x0C 16.--23. 1. " PLLA_DYNRAMP_STEPB ,PLLA_DYNRAMP_STEPB" textline " " hexmask.long.byte 0x0C 8.--15. 1. " PLLA_DYNRAMP_STEPA ,PLLA_DYNRAMP_STEPA" hexmask.long.byte 0x0C 0.--7. 1. " PLLA_NDIV_NEW ,PLLA_NDIV_NEW" group.long 0x5E4++0x13 line.long 0x00 "PLLC4_OUT_0,PLLC4_OUT_0 configuration" bitfld.long 0x00 16. " PLLC4_OUT3_DIV_BYP ,PLLC4_OUT3 divider bypass" "Glitchless,Not glitchless" hexmask.long.byte 0x00 8.--15. 1. " PLLC4_OUT3_RATIO ,PLLC4_OUT3 divider from base" textline " " bitfld.long 0x00 1. " PLLC4_OUT3_CLKEN ,PLLC4_OUT3 divider clk enable" "Disabled,Enabled" bitfld.long 0x00 0. " PLLC4_OUT3_RSTN ,PLLC4_OUT3 divider reset" "Reset,Not reset" line.long 0x04 "PLLMB_BASE_0,PLLMB_BASE_0 configuration" bitfld.long 0x04 30. " PLLMB_ENABLE ,PLLMB enable" "Disabled,Enabled" bitfld.long 0x04 27. " PLLMB_LOCK ,PLLMB lock" "Not locked,Locked" textline " " bitfld.long 0x04 26. " PLLMB_FREQ_LOCK ,PLLMB frequency lock" "Not locked,Locked" bitfld.long 0x04 20.--24. " PLLMB_DIVP ,post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " hexmask.long.byte 0x04 8.--15. 1. " PLLMB_DIVN ,PLL feedback divider" hexmask.long.byte 0x04 0.--7. 1. " PLLMB_DIVM ,PLL input divider" line.long 0x08 "PLLMB_MISC1_0,PLLMB_MISC1_0 configuration" bitfld.long 0x08 18. " PLLMB_LOCK_OVERRIDE ,forces lock to 1" "Not override,Override" bitfld.long 0x08 17. " PLLMB_IDDQ ,PLLMB_IDDQ" "OFF,ON" textline " " bitfld.long 0x08 16. " PLLMB_EN_LCKDET ,LCKDET enable" "Disabled,Enabled" hexmask.long.word 0x08 0.--15. 1. " PLLMB_SETUP ,SETUP fields" line.long 0x0C "PLLX_MISC_4_0,PLLX_MISC_4_0 configuration" bitfld.long 0x0C 31. " PLLX_EN_SDM ,Enable Sigma Delta Modulator feature" "Disabled,Enabled" hexmask.long.word 0x0C 0.--15. 1. " PLLX_SDM_DIN ,Fractional input to Sigma Delta Modulator" line.long 0x10 "PLLX_MISC_5_0,PLLX_MISC_5_0 configuration" hexmask.long.word 0x10 0.--15. 1. " PLLX_SDM_DIN_NEW ,Fractional input new to Sigma Delta Modulator" tree "CLK_SOURCE control" group.long 0x600++0x33 line.long 0x00 "CLK_SOURCE_XUSB_CORE_HOST_0,XUSB_CORE_HOST_0 configuration" bitfld.long 0x00 29.--31. " XUSB_CORE_HOST_CLK_SRC ,XUSB_CORE_HOST_CLK_SRC" "CLK_M,PLLP_OUT0,,,,PLLREFE_CLKOUT,?..." hexmask.long.byte 0x00 0.--7. 1. " XUSB_CORE_HOST_CLK_DIVISOR ,XUSB_CORE_HOST_CLK_DIVISOR" line.long 0x04 "CLK_SOURCE_XUSB_FALCON_0,XUSB_FALCON_0 configuration" bitfld.long 0x04 29.--31. " XUSB_FALCON_CLK_SRC ,XUSB_FALCON_CLK_SRC" "CLK_M,PLLP_OUT0,,,,PLLREFE_CLKOUT,?..." hexmask.long.byte 0x04 0.--7. 1. " XUSB_FALCON_CLK_DIVISOR ,XUSB_FALCON_CLK_DIVISOR" line.long 0x08 "CLK_SOURCE_XUSB_FS_0,XUSB_FS_0 configuration" bitfld.long 0x08 29.--31. " XUSB_FS_CLK_SRC ,XUSB_FS_CLK_SRC" "CLK_M,,FO_48M,,PLLP_OUT0,,HSIC_480,?..." hexmask.long.byte 0x08 0.--7. 1. " XUSB_FS_CLK_DIVISOR ,XUSB_FS_CLK_DIVISOR" line.long 0x0C "CLK_SOURCE_XUSB_CORE_DEV_0,XUSB_CORE_DEV_0 configuration" bitfld.long 0x0C 29.--31. " XUSB_CORE_DEV_CLK_SRC ,XUSB_CORE_DEV_CLK_SRC" "CLK_M,PLLP_OUT0,,,,PLLREFE_CLKOUT,?..." hexmask.long.byte 0x0C 0.--7. 1. " XUSB_CORE_DEV_CLK_DIVISOR ,XUSB_CORE_DEV_CLK_DIVISOR" line.long 0x10 "CLK_SOURCE_XUSB_SS_0,XUSB_SS_0 configuration" bitfld.long 0x10 29.--31. " XUSB_SS_CLK_SRC ,XUSB_SS_CLK_SRC" "CLK_M,PLLREFE_CLKOUT,CLK_S,HSIC_480,?..." bitfld.long 0x10 26. " XUSB_HS_HSICP_CLK_SEL ,XUSB_HS_HSICP clk select" "60MHz,120MHz" textline " " bitfld.long 0x10 25. " XUSB_HS_CLK_BYPASS_SWITCH ,XUSB_HS clk bypass switch" "switch/dividers output,PLLU 60M output" bitfld.long 0x10 24. " XUSB_SS_CLK_BYPASS_SWITCH ,XUSB_SS clk bypass switch" "switch/dividers output,osc_div clock" textline " " hexmask.long.byte 0x10 0.--7. 1. " XUSB_SS_CLK_DIVISOR ,XUSB_SS_CLK_DIVISOR" line.long 0x14 "CLK_SOURCE_CLK_SOURCE_CILAB_0,CILAB_0 configuration" bitfld.long 0x14 29.--31. " CILAB_CLK_SRC ,CILAB_CLK_SRC" "PLLP_OUT0,,PLLC_OUT0,PLLC4_OUT0,PLLC4_OUT1,PLLC4_OUT2,CLK_M,?..." hexmask.long.byte 0x14 0.--7. 1. " CILAB_CLK_DIVISOR ,CILAB_CLK_DIVISOR" line.long 0x18 "CLK_SOURCE_CILCD_0,CILCD_0 configuration" bitfld.long 0x18 29.--31. " CILCD_CLK_SRC ,CILCD_CLK_SRC" "PLLP_OUT0,,PLLC_OUT0,PLLC4_OUT0,PLLC4_OUT1,PLLC4_OUT2,CLK_M,?..." hexmask.long.byte 0x18 0.--7. 1. " CILCD_CLK_DIVISOR ,CILCD_CLK_DIVISOR" line.long 0x1C "CLK_SOURCE_CILEF_0,CILEF_0 configuration" bitfld.long 0x1C 29.--31. " CILEF_CLK_SRC ,CILEF_CLK_SRC" "PLLP_OUT0,,PLLC_OUT0,PLLC4_OUT0,PLLC4_OUT1,PLLC4_OUT2,CLK_M,?..." hexmask.long.byte 0x1C 0.--7. 1. " CILEF_CLK_DIVISOR ,CILEF_CLK_DIVISOR" line.long 0x20 "CLK_SOURCE_DSIA_LP_0,DSIA_LP_0 configuration" bitfld.long 0x20 29.--31. " DSIA_LP_CLK_SRC ,DSIA_LP_CLK_SRC" "PLLP_OUT0,,PLLC_OUT0,PLLC4_OUT0,PLLC4_OUT1,PLLC4_OUT2,CLK_M,?..." hexmask.long.byte 0x20 0.--7. 1. " DSIA_LP_CLK_DIVISOR ,DSIA_LP_CLK_DIVISOR" line.long 0x24 "CLK_SOURCE_DSIB_LP_0,DSIB_LP_0 configuration" bitfld.long 0x24 29.--31. " DSIB_LP_CLK_SRC ,DSIB_LP_CLK_SRC" "PLLP_OUT0,,PLLC_OUT0,PLLC4_OUT0,PLLC4_OUT1,PLLC4_OUT2,CLK_M,?..." hexmask.long.byte 0x24 0.--7. 1. " DSIB_LP_CLK_DIVISOR ,DSIB_LP_CLK_DIVISOR" line.long 0x28 "CLK_SOURCE_ENTROPY_0,ENTROPY_0 configuration" bitfld.long 0x28 29.--31. " ENTROPY_CLK_SRC ,ENTROPY_CLK_SRC" "PLLP_OUT0,,CLK_M,,CLK_S,,PLLE_OUT0,?..." bitfld.long 0x28 8. " ENTROPY_CLK_LOCK ,Lock entire CLK_SOURCE_ENTROPY register" "Not locked,Locked" textline " " hexmask.long.byte 0x28 0.--7. 1. " ENTROPY_CLK_DIVISOR ,ENTROPY_CLK_DIVISOR" line.long 0x2C "CLK_SOURCE_DVFS_REF_0,DVFS_REF_0 configuration" bitfld.long 0x2C 29.--31. " DVFS_REF_CLK_SRC ,DVFS_REF_CLK_SRC" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x2C 0.--7. 1. " DVFS_REF_CLK_DIVISOR ,DVFS_REF_CLK_DIVISOR" line.long 0x30 "CLK_SOURCE_DVFS_SOC_0,DVFS_SOC_0 configuration" bitfld.long 0x30 29.--31. " DVFS_SOC_CLK_SRC ,DVFS_SOC_CLK_SRC" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x30 0.--7. 1. " DVFS_SOC_CLK_DIVISOR ,DVFS_SOC_CLK_DIVISOR" group.long 0x640++0x07 line.long 0x00 "CLK_SOURCE_EMC_LATENCY_0,EMC_LATENCY_0 configuration" bitfld.long 0x00 29.--31. " EMC_LATENCY_CLK_SRC ,EMC_LATENCY_CLK_SRC" ",PLLC_OUT0,PLLP_OUT0,CLK_M,,PLLC4_OUT0,PLLC4_OUT1,PLLC4_OUT2" hexmask.long.byte 0x00 0.--7. 1. " EMC_LATENCY_CLK_DIVISOR ,EMC_LATENCY_CLK_DIVISOR" line.long 0x04 "CLK_SOURCE_SOC_THERM_0,SOC_THERM_0 configuration" bitfld.long 0x04 29.--31. " SOC_THERM_CLK_SRC ,SOC_THERM_CLK_SRC" "CLK_M,PLLC_OUT0,PLLP_OUT0,PLLA_OUT0,PLLC2_OUT0,PLLC4_OUT0,PLLC4_OUT1,PLLC4_OUT2" hexmask.long.byte 0x04 0.--7. 1. " SOC_THERM_CLK_DIVISOR ,SOC_THERM_CLK_DIVISOR" group.long 0x64C++0x07 line.long 0x00 "CLK_SOURCE_DMIC1_0,DMIC1_0 configuration" bitfld.long 0x00 29.--31. " DMIC1_CLK_SRC ,DMIC1_CLK_SRC" "PLLA_OUT0,SYNC_CLK,PLLP_OUT0,CLK_M,?..." hexmask.long.byte 0x00 0.--7. 1. " DMIC1_CLK_DIVISOR ,DMIC1_CLK_DIVISOR" line.long 0x04 "CLK_SOURCE_DMIC2_0,DMIC2_0 configuration" bitfld.long 0x04 29.--31. " DMIC2_CLK_SRC ,DMIC2_CLK_SRC" "PLLA_OUT0,SYNC_CLK,PLLP_OUT0,CLK_M,?..." hexmask.long.byte 0x04 0.--7. 1. " DMIC2_CLK_DIVISOR ,DMIC2_CLK_DIVISOR" group.long 0x658++0x07 line.long 0x00 "CLK_SOURCE_VI_SENSOR2_0,VI_SENSOR2_0 configuration" bitfld.long 0x00 29.--31. " VI_SENSOR2_CLK_SRC ,VI_SENSOR2_CLK_SRC" ",PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,PLLP_OUT0,,PLLA_OUT0,?..." hexmask.long.byte 0x00 0.--7. 1. " VI_SENSOR2_CLK_DIVISOR ,VI_SENSOR2_CLK_DIVISOR" line.long 0x04 "CLK_SOURCE_I2C6_0,I2C6_0 configuration" bitfld.long 0x04 29.--31. " I2C6_CLK_SRC ,I2C6_CLK_SRC" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC4_OUT0,,PLLC4_OUT1,CLK_M,PLLC4_OUT2" hexmask.long.byte 0x04 0.--7. 1. " I2C6_CLK_DIVISOR ,I2C6_CLK_DIVISOR" group.long 0x664++0x03 line.long 0x00 "CLK_SOURCE_EMC_DLL_0,EMC_DLL_0 configuration" bitfld.long 0x00 29.--31. " EMC_DLL_CLK_SRC ,EMC_DLL_CLK_SRC" "PLLM_OUT0,PLLC_OUT0,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD" bitfld.long 0x00 10.--11. " DDLL_CLK_SEL ,DLL Selects one of the 4 inputs listed in ENUM" "PLLM_VCOA,PLLM_VCOB,EMC_DLL_SWITCH_OUT,?..." textline " " hexmask.long.byte 0x00 0.--7. 1. " EMC_DLL_CLK_DIVISOR ,EMC_DLL_CLK_DIVISOR" group.long 0x66C++0x03 line.long 0x00 "CLK_SOURCE_UART_FST_MIPI_CAL_0,ART_FST_MIPI_CAL_0 configuration" bitfld.long 0x00 29.--31. " CLK72MHZ_CLK_SRC ,CLK72MHZ_CLK_SRC" "PLLP_OUT3,PLLC_OUT0,PLLC2_OUT0,,PLLC2_OUT0,,CLK_M,?..." hexmask.long.byte 0x00 0.--7. 1. " UART_FST_MIPI_CAL_CLK_DIVISOR ,UART_FST_MIPI_CAL_CLK_DIVISOR" group.long 0x678++0x0B line.long 0x00 "CLK_SOURCE_VIC_0,VIC_0 configuration" bitfld.long 0x00 29.--31. " VIC_CLK_SRC ,VIC_CLK_SRC" ",PLLC_OUT0,PLLP_OUT0,PLLA1_OUT0,PLLC2_OUT0,PLLC3_OUT0,CLK_M,?..." hexmask.long.byte 0x00 8.--15. 1. " VIC_IDLE_DIVISOR ,VIC_IDLE_DIVISOR" textline " " hexmask.long.byte 0x00 0.--7. 1. " VIC_CLK_DIVISOR ,VIC_CLK_DIVISOR" line.long 0x04 "PLLP_OUTC_0,PLLP_OUTC_0 configuration" hexmask.long.byte 0x04 24.--31. 1. " PLLP_OUT5_RATIO ,PLLP_OUT5 divider from base PLLP" bitfld.long 0x04 18. " PLLP_OUT5_OVRRIDE ,PLLP_OUT5 override enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " PLLP_OUT5_CLKEN ,PLLP_OUT5 divider clk enable" "Disabled,Enabled" bitfld.long 0x04 16. " PLLP_OUT5_RSTN ,PLLP_OUT5 divider reset enable" "Reset,Not reset" line.long 0x08 "PLLP_MISC1_0,PLLP_MISC1_0 configuration" bitfld.long 0x08 30. " PLLP_OUT5_DIV_BYP ,PLLP_OUT5 divider bypass" "Not glitchless,Glitchless" bitfld.long 0x08 29. " PLLP_HSIO_CLK_EN ,Clock gate control for PLLP clock branch to HSIO" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " PLLP_XUSB_CLK_EN ,Clock gate control for PLLP clock branch to XUSB" "Disabled,Enabled" hexmask.long.tbyte 0x08 0.--23. 1. " PLLP_SETUP ,PLLP base setup bits" group.long 0x68C++0x17 line.long 0x00 "EMC_DIV_CLK_SHAPER_CTRL_0,EMC_DIV_CLK_SHAPER_CTRL_0 configuration" bitfld.long 0x00 31. " ENABLE_EMC_DIV_SHAPER ,ENABLE_EMC_DIV_SHAPER" "Disabled,Enabled" bitfld.long 0x00 11. " EMC_DIV_CLK_SHAPER_N0 ,EMC_DIV_CLK_SHAPER_N0" "0,1" textline " " bitfld.long 0x00 10. " EMC_DIV_CLK_SHAPER_N1 ,EMC_DIV_CLK_SHAPER_N1" "0,1" bitfld.long 0x00 9. " EMC_DIV_CLK_SHAPER_P0 ,EMC_DIV_CLK_SHAPER_P0" "0,1" textline " " bitfld.long 0x00 8. " EMC_DIV_CLK_SHAPER_P1 ,EMC_DIV_CLK_SHAPER_P1" "0,1" bitfld.long 0x00 7. " EMC_DIV_CLK_SHAPER_CTRL_TRIM_SELECT ,EMC_DIV_CLK_SHAPER_CTRL_TRIM_SELECT" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x00 6. " EMC_DIV_CLK_SHAPER_CTRL_SW_BYPASS ,EMC_DIV_CLK_SHAPER_CTRL_SW_BYPASS" "ACTIVE,BYPASS" bitfld.long 0x00 5. " EMC_DIV_CLK_SHAPER_CTRL_DF ,EMC_DIV_CLK_SHAPER_CTRL_DF" "Disabled,Enabled" textline " " bitfld.long 0x00 3.--4. " EMC_DIV_CLK_SHAPER_CTRL_FALL_DELAY ,EMC_DIV_CLK_SHAPER_CTRL_FALL_DELAY" "0,1,2,3" bitfld.long 0x00 2. " EMC_DIV_CLK_SHAPER_CTRL_DR ,EMC_DIV_CLK_SHAPER_CTRL_DR" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " EMC_DIV_CLK_SHAPER_CTRL_RISE_DELAY ,EMC_DIV_CLK_SHAPER_CTRL_RISE_DELAY" "0,1,2,3" line.long 0x04 "EMC_PLLC_SHAPER_CTRL_0,EMC_PLLC_SHAPER_CTRL_0 configuration" bitfld.long 0x04 31. " ENABLE_EMC_PLLC_SHAPER ,ENABLE_EMC_PLLC_SHAPER" "Disabled,Enabled" bitfld.long 0x04 11. " EMC_PLLC_SHAPER_N0 ,EMC_PLLC_SHAPER_N0" "0,1" textline " " bitfld.long 0x04 10. " EMC_PLLC_SHAPER_N1 ,EMC_PLLC_SHAPER_N1" "0,1" bitfld.long 0x04 9. " EMC_PLLC_SHAPER_P0 ,EMC_PLLC_SHAPER_P0" "0,1" textline " " bitfld.long 0x04 8. " EMC_PLLC_SHAPER_P1 ,EMC_PLLC_SHAPER_P1" "0,1" bitfld.long 0x04 7. " EMC_PLLC_SHAPER_CTRL_TRIM_SELECT ,EMC_PLLC_SHAPER_CTRL_TRIM_SELECT" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x04 6. " EMC_PLLC_SHAPER_CTRL_SW_BYPASS ,EMC_PLLC_SHAPER_CTRL_SW_BYPASS" "ACTIVE,BYPASS" bitfld.long 0x04 5. " EMC_PLLC_SHAPER_CTRL_DF ,EMC_PLLC_SHAPER_CTRL_DF" "Disabled,Enabled" textline " " bitfld.long 0x04 3.--4. " EMC_PLLC_SHAPER_CTRL_FALL_DELAY ,EMC_PLLC_SHAPER_CTRL_FALL_DELAY" "0,1,2,3" bitfld.long 0x04 2. " EMC_PLLC_SHAPER_CTRL_DR ,EMC_PLLC_SHAPER_CTRL_DR" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " EMC_PLLC_SHAPER_CTRL_RISE_DELAY ,EMC_PLLC_SHAPER_CTRL_RISE_DELAY" "0,1,2,3" line.long 0x08 "CLK_SOURCE_SDMMC_LEGACY_TM_0,SDMMC_LEGACY_TM_0 configuration" bitfld.long 0x08 29.--31. " SDMMC_LEGACY_TM_CLK_SRC ,SDMMC_LEGACY_TM_CLK_SRC" "PLLP_OUT3,PLLC_OUT0,PLLC2_OUT0,CLK_M,PLLP_OUT0,PLLC4_OUT0,PLLC4_OUT1,PLLC4_OUT2" hexmask.long.byte 0x08 0.--7. 1. " SDMMC_LEGACY_TM_CLK_DIVISOR ,SDMMC_LEGACY_TM_CLK_DIVISOR" line.long 0x0C "CLK_SOURCE_NVDEC_0,NVDEC_0 configuration" bitfld.long 0x0C 29.--31. " NVDEC_CLK_SRC ,NVDEC_CLK_SRC" ",PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,PLLP_OUT0,,PLLA1_OUT0,CLK_M" hexmask.long.byte 0x0C 0.--7. 1. " NVDEC_CLK_DIVISOR ,NVDEC_CLK_DIVISOR" line.long 0x10 "CLK_SOURCE_NVJPG_0,NVJPG_0 configuration" bitfld.long 0x10 29.--31. " NVJPG_CLK_SRC ,NVJPG_CLK_SRC" ",PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,PLLP_OUT0,,PLLA1_OUT0,CLK_M" hexmask.long.byte 0x10 0.--7. 1. " NVJPG_CLK_DIVISOR ,NVJPG_CLK_DIVISOR" line.long 0x14 "CLK_SOURCE_NVENC_0,NVDEC_0 configuration" bitfld.long 0x14 29.--31. " NVENC_CLK_SRC ,NVENC_CLK_SRC" ",PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,PLLP_OUT0,,PLLA1_OUT0,CLK_M" hexmask.long.byte 0x14 0.--7. 1. " NVENC_CLK_DIVISOR ,NVENC_CLK_DIVISOR" tree.end tree "PLLA control" group.long 0x6A4++0x13 line.long 0x00 "PLLA1_BASE_0,BASE_0 configuration" bitfld.long 0x00 31. " PLLA1_BYPASS ,PLLA1 bypass" "Disabled,Enabled" bitfld.long 0x00 30. " PLLA1_ENABLE ,PLLA1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PLLA1_REF_DIS ,PLLA1 reference disable" "No,Yes" rbitfld.long 0x00 27. " PLLA1_FREQ_LOCK ,PLLA1 frequency lock" "Not locked,Locked" textline " " rbitfld.long 0x00 26. " PLLA1_LOCK ,PLLA1 lock" "Not locked,Locked" bitfld.long 0x00 20.--24. " PLLA1_DIVP ,PLLA1_DIVP" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " hexmask.long.byte 0x00 10.--17. 1. " PLLA1_DIVN ,PLL feedback divider" hexmask.long.byte 0x00 0.--7. 1. " PLLA1_DIVM ,PLL input divider" line.long 0x04 "PLLA1_MISC_0_0,MISC_0_0 configuration" bitfld.long 0x04 30. " PLLA1_RESET ,Reset for digital logic of the PLL" "Disabled,Enabled" hexmask.long.word 0x04 4.--19. 1. " PLLA1_EXT_FRU ,PLLA1_EXT_FRU" textline " " bitfld.long 0x04 3. " PLLA1_PTS ,Base PLLA1 test output select" "0,FO" bitfld.long 0x04 0.--1. " PLLA1_LOOP_CTRL ,PLLA1_LOOP_CTRL" "0,1,2,3" line.long 0x08 "PLLA1_MISC_1_0,MISC_1_0 configuration" bitfld.long 0x08 27. " PLLA1_IDDQ ,PLLA1_IDDQ" "OFF,ON" bitfld.long 0x08 10.--13. " PLLA1_EXT_SUBINT ,PLLA1_EXT_SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x08 0.--7. 1. " PLLA1_DIVN_FRAC ,PLLA1_DIVN_FRAC" line.long 0x0C "PLLA1_MISC_2_0,MISC_2_0 configuration" hexmask.long.byte 0x0C 24.--31. 1. " PLLA1_PLL_LD_MEM ,PLLA1_PLL_LD_MEM" bitfld.long 0x0C 20.--23. " PLLA1_PLL_FRUG_HIGH ,PLLA1_PLL_FRUG_HIGH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 16.--19. " PLLA1_PLL_FRUG_LOW ,PLLA1_PLL_FRUG_LOW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x0C 8.--15. 1. " PLLA1_FLL_LD_MEM ,PLLA1_FLL_LD_MEM" textline " " bitfld.long 0x0C 4. " PLLA1_FLL_DIV ,PLLA1_FLL_DIV" "0,1" bitfld.long 0x0C 0.--2. " PLLA1_FLL_FRUG ,PLLA1_FLL_FRUG" "0,1,2,3,4,5,6,7" line.long 0x10 "PLLA1_MISC_3_0,MISC_3_0 configuration" hexmask.long.word 0x10 8.--23. 1. " PLLA1_SETUP ,PLLA1_SETUP" bitfld.long 0x10 6.--7. " PLLA1_KP ,PLLA1_KP" "0,1,2,3" textline " " bitfld.long 0x10 4.--5. " PLLA1_LDIV ,PLLA1_LDIV" "0,1,2,3" bitfld.long 0x10 0.--3. " PLLA1_PLL_LD_TOL ,PLLA1_PLL_LD_TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "SOURCE control" group.long 0x6B8++0x23 line.long 0x00 "AUDIO_SYNC_CLK_DMIC3_0,Audio sync clock source select" bitfld.long 0x00 4. " SYNC_CLK_DIS ,SYNC clk disable" "Enabled,Disabled" bitfld.long 0x00 0.--3. " SYNC_CLK_RATE ,SYNC_CLK_RATE" ",I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..." line.long 0x04 "CLK_SOURCE_DMIC3_0,DMIC3_0 configuration" bitfld.long 0x04 29.--31. " DMIC3_CLK_SRC ,DMIC3_CLK_SRC" "PLLA_OUT0,SYNC_CLK,PLLP_OUT0,CLK_M,?..." hexmask.long.byte 0x04 0.--7. 1. " DMIC3_CLK_DIVISOR ,DMIC3_CLK_DIVISOR" line.long 0x08 "CLK_SOURCE_APE_0,APE_0 configuration" bitfld.long 0x08 29.--31. " APE_CLK_SRC ,APE_CLK_SRC" "PLLA_OUT0,PLLC4_OUT0,PLLC_OUT0,PLLC4_OUT1,PLLP_OUT0,PLLC4_OUT2,CLK_M,?..." hexmask.long.byte 0x08 0.--7. 1. " APE_CLK_DIVISOR ,APE_CLK_DIVISOR" line.long 0x0C "CLK_SOURCE_QSPI_0,QSPI_0 configuration" bitfld.long 0x0C 29.--31. " QSPI_CLK_SRC ,QSPI_CLK_SRC" "PLLP_OUT0,PLLC_OUT1,PLLC_OUT0,,PLLC4_OUT2,PLLC4_OUT1,CLK_M,PLLC4_OUT0" bitfld.long 0x0C 8. " QSPI_CLK_DIV2_SEL ,QSPI clk DIV2 select" "DIV1 SDR,DIV2 DDR interface" textline " " hexmask.long.byte 0x0C 0.--7. 1. " QSPI_CLK_DIVISOR ,QSPI_CLK_DIVISOR" line.long 0x10 "CLK_SOURCE_VI_I2C_0,VI_I2C_0 configuration" bitfld.long 0x10 29.--31. " VI_I2C_CLK_SRC ,VI_I2C_CLK_SRC" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,,CLK_M,?..." hexmask.long.word 0x10 0.--15. 1. " VI_I2C_CLK_DIVISOR ,VI_I2C_CLK_DIVISOR" line.long 0x14 "CLK_SOURCE_USB2_HSIC_TRK_0,USB2_HSIC_TRK_0 configuration" hexmask.long.byte 0x14 0.--7. 1. " USB2_HSIC_TRK_CLK_DIVISOR ,USB2_HSIC_TRK_CLK_DIVISOR" line.long 0x18 "CLK_SOURCE_PEX_SATA_USB_RX_BYP_0,VI_I2C_0 configuration" bitfld.long 0x18 24. " SATA_USB_PAD_RX_BYP_REFCLK_CE ,CLOCK Enable" "Disabled,Enabled" hexmask.long.byte 0x18 16.--23. 1. " SATA_USB_PAD_RX_BYP_REFCLK_DIVISOR ,SATA_USB_PAD_RX_BYP_REFCLK_DIVISOR" textline " " bitfld.long 0x18 8. " PEX_USB_PAD_RX_BYP_REFCLK_CE ,CLOCK Enable" "Disabled,Enabled" hexmask.long.byte 0x18 0.--7. 1. " PEX_USB_PAD_RX_BYP_REFCLK_DIVISOR ,PEX_USB_PAD_RX_BYP_REFCLK_DIVISOR" line.long 0x1C "CLK_SOURCE_MAUD_0,MAUD_0 configuration" bitfld.long 0x1C 29.--31. " MAUD_CLK_SRC ,MAUD_CLK_SRC" "PLLP_OUT0,PLLP_OUT3,CLK_M,CLK_S,PLLA_OUT0,?..." hexmask.long.byte 0x1C 0.--7. 1. " MAUD_CLK_DIVISOR ,MAUD_CLK_DIVISOR" line.long 0x20 "CLK_SOURCE_TSECB_0,TSECB_0 configuration" bitfld.long 0x20 29.--31. " TSECB_CLK_SRC ,TSECB_CLK_SRC" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,PLLA1_OUT0,CLK_M,PLLC4_OUT0" hexmask.long.byte 0x20 0.--7. 1. " TSECB_CLK_DIVISOR ,TSECB_CLK_DIVISOR" tree.end tree "SUPER_CLK control" group.long 0x6DC++0x33 line.long 0x00 "CLK_CPUG_MISC1_0,CLK_CPUG_MISC1_0 configuration" bitfld.long 0x00 0.--2. " CPUG_CNTCLK_RATIO ,Clock divider ratio for the CNTCLK clocks in CCPLEX" "/1,/2,/3,/4,/5,/6,?..." line.long 0x04 "ACLK_BURST_POLICY_0,ACLK_BURST_POLICY_0 configuration" bitfld.long 0x04 28.--31. " ADSP_STATE ,ADSP_STATE" "STDBY,IDLE,RUN,RUN,IRQ,IRQ,IRQ,IRQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ,FIQ" bitfld.long 0x04 27. " COP_AUTO_AWAKEUP_FROM_FIQ ,COP_AUTO_AWAKEUP_FROM_FIQ" "NOP,Burst on COP FIQ" textline " " bitfld.long 0x04 26. " CPU_AUTO_AWAKEUP_FROM_FIQ ,CPU_AUTO_AWAKEUP_FROM_FIQ" "NOP,Burst on COP FIQ" bitfld.long 0x04 25. " COP_AUTO_AWAKEUP_FROM_IRQ ,COP_AUTO_AWAKEUP_FROM_IRQ" "NOP,Burst on COP FIQ" textline " " bitfld.long 0x04 24. " CPU_AUTO_AWAKEUP_FROM_IRQ ,CPU_AUTO_AWAKEUP_FROM_IRQ" "NOP,Burst on COP FIQ" bitfld.long 0x04 12.--15. " AWAKEUP_FIQ_SOURCE ,AWAKEUP_FIQ_SOURCE" "PLLA1_OUT0,PLLC_OUT0,PLLP_OUT0,PLLA_OUT0,PLLC2_OUT0,PLLC3_OUT0,CLK_M,PLLA_OUT,PLLA1_OUT_LJ,,,,,,,PLLA_OUT_LJ" textline " " bitfld.long 0x04 8.--11. " AWAKEUP_IRQ_SOURCE ,AWAKEUP_IRQ_SOURCE" "PLLA1_OUT0,PLLC_OUT0,PLLP_OUT0,PLLA_OUT0,PLLC2_OUT0,PLLC3_OUT0,CLK_M,PLLA_OUT,PLLA1_OUT_LJ,,,,,,,PLLA_OUT_LJ" bitfld.long 0x04 4.--7. " AWAKEUP_RUN_SOURCE ,AWAKEUP_RUN_SOURCE" "PLLA1_OUT0,PLLC_OUT0,PLLP_OUT0,PLLA_OUT0,PLLC2_OUT0,PLLC3_OUT0,CLK_M,PLLA_OUT,PLLA1_OUT_LJ,,,,,,,PLLA_OUT_LJ" textline " " bitfld.long 0x04 0.--3. " AWAKEUP_IDLE_SOURCE ,AWAKEUP_IDLE_SOURCE" "PLLA1_OUT0,PLLC_OUT0,PLLP_OUT0,PLLA_OUT0,PLLC2_OUT0,PLLC3_OUT0,CLK_M,PLLA_OUT,PLLA1_OUT_LJ,,,,,,,PLLA_OUT_LJ" line.long 0x08 "SUPER_ACLK_DIVIDER_0,SUPER_ACLK_DIVIDER_0 configuration" bitfld.long 0x08 31. " SUPER_ADIV_ENB ,SUPER_ADIV enable" "Disabled,Enabled" bitfld.long 0x08 28. " ACLK_INVERT_DCD ,ACLK inversion of DCD " "Disabled,Enabled" textline " " bitfld.long 0x08 27. " SUPER_ADIV_DIS_FROM_COP_FIQ ,SUPER_ADIV_DIS_FROM_COP_FIQ" "Not changed,Disabled" bitfld.long 0x08 26. " SUPER_ADIV_DIS_FROM_CPU_FIQ ,SUPER_ADIV_DIS_FROM_CPU_FIQ" "Not changed,Disabled" textline " " bitfld.long 0x08 25. " SUPER_ADIV_DIS_FROM_COP_IRQ ,SUPER_ADIV_DIS_FROM_COP_IRQ" "Not changed,Disabled" bitfld.long 0x08 24. " SUPER_ADIV_DIS_FROM_CPU_IRQ ,SUPER_ADIV_DIS_FROM_CPU_IRQ" "Not changed,Disabled" textline " " hexmask.long.byte 0x08 16.--23. 1. " ACLK_CLK_DIVISOR ,ACLK_CLK_DIVISOR" hexmask.long.byte 0x08 8.--15. 1. " SUPER_ADIV_DIVIDEND ,SUPER_ADIV_DIVIDEND" textline " " hexmask.long.byte 0x08 0.--7. 1. " SUPER_ADIV_DIVISOR ,SUPER_ADIV_DIVISOR" line.long 0x0C "NVENC_SUPER_CLK_DIVIDER_0,NVENC_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x0C 31. " SUPER_NVENC_DIV_ENB ,SUPER_NVENC_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x0C 8.--15. 1. " SUPER_NVENC_DIV_DIVIDEND ,SUPER_NVENC_DIV_DIVIDEND" textline " " hexmask.long.byte 0x0C 0.--7. 1. " SUPER_NVENC_DIV_DIVISOR ,SUPER_NVENC_DIV_DIVISOR" line.long 0x10 "VI_SUPER_CLK_DIVIDER_0,VI_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x10 31. " SUPER_VI_DIV_ENB ,SUPER_VI_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x10 8.--15. 1. " SUPER_VI_DIV_DIVIDEND ,SUPER_VI_DIV_DIVIDEND" textline " " hexmask.long.byte 0x10 0.--7. 1. " SUPER_VI_DIV_DIVISOR ,SUPER_VI_DIV_DIVISOR" line.long 0x14 "VIC_SUPER_CLK_DIVIDER_0,VIC_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x14 31. " SUPER_VIC_DIV_ENB ,SUPER_VIC_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x14 8.--15. 1. " SUPER_VIC_DIV_DIVIDEND ,SUPER_VIC_DIV_DIVIDEND" textline " " hexmask.long.byte 0x14 0.--7. 1. " SUPER_VIC_DIV_DIVISOR ,SUPER_VIC_DIV_DIVISOR" line.long 0x18 "NVDEC_SUPER_CLK_DIVIDER_0,NVDEC_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x18 31. " SUPER_NVDEC_DIV_ENB ,SUPER_NVDEC_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x18 8.--15. 1. " SUPER_NVDEC_DIV_DIVIDEND ,SUPER_NVDEC_DIV_DIVIDEND" textline " " hexmask.long.byte 0x18 0.--7. 1. " SUPER_NVDEC_DIV_DIVISOR ,SUPER_NVDEC_DIV_DIVISOR" line.long 0x1C "ISP_SUPER_CLK_DIVIDER_0,ISP_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x1C 31. " SUPER_ISP_DIV_ENB ,SUPER_ISP_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x1C 8.--15. 1. " SUPER_ISP_DIV_DIVIDEND ,SUPER_ISP_DIV_DIVIDEND" textline " " hexmask.long.byte 0x1C 0.--7. 1. " SUPER_ISP_DIV_DIVISOR ,SUPER_ISP_DIV_DIVISOR" line.long 0x20 "ISPB_SUPER_CLK_DIVIDER_0,ISPB_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x20 31. " SUPER_ISPB_DIV_ENB ,SUPER_ISPB_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x20 8.--15. 1. " SUPER_ISPB_DIV_DIVIDEND ,SUPER_ISPB_DIV_DIVIDEND" textline " " hexmask.long.byte 0x20 0.--7. 1. " SUPER_ISPB_DIV_DIVISOR ,SUPER_ISPB_DIV_DIVISOR" line.long 0x24 "NVJPG_SUPER_CLK_DIVIDER_0,NVJPG_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x24 31. " SUPER_NVJPG_DIV_ENB ,SUPER_NVJPG_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x24 8.--15. 1. " SUPER_NVJPG_DIV_DIVIDEND ,SUPER_NVJPG_DIV_DIVIDEND" textline " " hexmask.long.byte 0x24 0.--7. 1. " SUPER_NVJPG_DIV_DIVISOR ,SUPER_NVJPG_DIV_DIVISOR" line.long 0x28 "SE_SUPER_CLK_DIVIDER_0,SE_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x28 31. " SUPER_SE_DIV_ENB ,SUPER_SE_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x28 8.--15. 1. " SUPER_SE_DIV_DIVIDEND ,SUPER_SE_DIV_DIVIDEND" textline " " hexmask.long.byte 0x28 0.--7. 1. " SUPER_SE_DIV_DIVISOR ,SUPER_SE_DIV_DIVISOR" line.long 0x2C "TSEC_SUPER_CLK_DIVIDER_0,TSEC_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x2C 31. " SUPER_TSEC_DIV_ENB ,SUPER_TSEC_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x2C 8.--15. 1. " SUPER_TSEC_DIV_DIVIDEND ,SUPER_TSEC_DIV_DIVIDEND" textline " " hexmask.long.byte 0x2C 0.--7. 1. " SUPER_TSEC_DIV_DIVISOR ,SUPER_TSEC_DIV_DIVISOR" line.long 0x30 "TSECB_SUPER_CLK_DIVIDER_0,TSECB_SUPER_CLK_DIVIDER_0 configuration" bitfld.long 0x30 31. " SUPER_TSECB_DIV_ENB ,SUPER_TSECB_DIV enable" "Disabled,Enabled" hexmask.long.byte 0x30 8.--15. 1. " SUPER_TSECB_DIV_DIVIDEND ,SUPER_TSECB_DIV_DIVIDEND" textline " " hexmask.long.byte 0x30 0.--7. 1. " SUPER_TSECB_DIV_DIVISOR ,SUPER_TSECB_DIV_DIVISOR" tree.end textline " " group.long 0x710++0x17 line.long 0x00 "CLK_SOURCE_UARTAPE_0,CLK_SOURCE_UARTAPE_0 configuration" bitfld.long 0x00 29.--31. " UARTAPE_CLK_SRC ,UARTAPE clk source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,,CLK_M,?..." bitfld.long 0x00 24. " UARTAPE_DIV_ENB ,UARTAPE divider enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " UARTAPE_CLK_DIVISOR ,UARTAPE_CLK_DIVISOR" line.long 0x04 "CLK_CPUG_MISC2_0,CLK_CPUG_MISC2_0 configuration" bitfld.long 0x04 0.--2. " CPUG_ATCLKPTM_RATIO ,Clock divider ratio for the ATCLK_UPSIZER clocks in CCPLEX" "/2,/3,/4,/5,/6,?..." line.long 0x08 "CLK_SOURCE_DBGAPB_0,CLK_SOURCE_DBGAPB_0 configuration" bitfld.long 0x08 29.--31. " DBGAPB_CLK_SRC ,DBGAPB clk source" ",,PLLP_OUT0,,,,CLK_M,?..." hexmask.long.byte 0x08 0.--7. 1. " DBGAPB_CLK_DIVISOR ,DBGAPB_CLK_DIVISOR" line.long 0x0C "CLK_CCPLEX_CC4_RET_CLK_ENB_0,CLK_CCPLEX_CC4_RET_CLK_ENB_0 configuration" bitfld.long 0x0C 20. " JTAG_REG_CLK_CPU_CC4_RET_CE ,JTAG_REG_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 19. " SERDES4F_CLK_CPU_CC4_RET_CE ,SERDES4F_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 18. " SOC_THERM_CLK_CPU_CC4_RET_CE ,SOC_THERM_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 17. " CLK_M_SYS_CLK_CPU_CC4_RET_CE ,CLK_M_SYS_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " DBGAPB_CLK_CPU_CC4_RET_CE ,DBGAPB_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 15. " CSITE_CLK_CPU_CC4_RET_CE ,CSITE_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 14. " MC_CLK_CPU_CC4_RET_CE ,MC_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 13. " MSELECT_CLK_CPU_CC4_RET_CE ,MSELECT_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " LA_CLK_CPU_CC4_RET_CE ,LA_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 11. " SCLK_SYS_CLK_CPU_CC4_RET_CE ,SCLK_SYS_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " DVFS_REF_CLK_CPU_CC4_RET_CE ,DVFS_REF_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 9. " DVFS_SOC_CLK_CPU_CC4_RET_CE ,DVFS_SOC_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " DBG_OSCOUT_CPU_CC4_RET_CE ,DBG_OSCOUT_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 7. " CK32KHZ_IB_CPU_CC4_RET_CE ,CK32KHZ_IB_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " PLLP_OUT_CPU_CC4_RET_CE ,PLLP_OUT_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 5. " PLLP_OUT4_CPU_CC4_RET_CE ,PLLP_OUT4_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " CAR_T1CLK_CPU_CC4_RET_CE ,CAR_T1CLK_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 3. " CAR_T4CLK_CPU_CC4_RET_CE ,CAR_T4CLK_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " CAR_T18CLK_CPU_CC4_RET_CE ,CAR_T18CLK_CPU_CC4_RET_CE" "Disabled,Enabled" bitfld.long 0x0C 1. " SPARE0_CLK_CPU_CC4_RET_CE ,SPARE0_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " SPARE1_CLK_CPU_CC4_RET_CE ,SPARE1_CLK_CPU_CC4_RET_CE" "Disabled,Enabled" line.long 0x10 "ACTMON_CPU_CLK_0,ACTMON_CPU_CLK_0 configuration" bitfld.long 0x10 31. " ACTMON_CPU_CLK_ENB ,ACTMON_CPU clk enable" "Disabled,Enabled" hexmask.long.word 0x10 0.--10. 1. " ACTMON_CPU_CLK_RATIO ,ACTMON_CPU_CLK_RATIO" line.long 0x14 "CLK_SOURCE_EMC_SAFE_0,CLK_SOURCE_EMC_SAFE_0 configuration" bitfld.long 0x14 29.--31. " EMC_2X_SAFE_CLK_SRC ,EMC_2X_SAFE clk source" "PLLM_OUT0,PLLC_OUT0,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD" hexmask.long.byte 0x14 0.--7. 1. " EMC_2X_SAFE_CLK_DIVISOR ,EMC_2X_SAFE_CLK_DIVISOR" tree "SDMMC control" group.long 0x728++0x1F line.long 0x00 "SDMMC2_PLLC4_OUT0_SHAPER_CTRL_0,SDMMC2_PLLC4_OUT0_SHAPER_CTRL_0 configuration" bitfld.long 0x00 31. " ENABLE_SDMMC2_PLLC4_OUT0_SHAPER ,SDMMC2_PLLC4_OUT0_SHAPER enable" "Disabled,Enabled" bitfld.long 0x00 11. " SDMMC2_PLLC4_OUT0_SHAPER_N0 ,SDMMC2_PLLC4_OUT0_SHAPER_N0" "0,1" textline " " bitfld.long 0x00 10. " SDMMC2_PLLC4_OUT0_SHAPER_N1 ,SDMMC2_PLLC4_OUT0_SHAPER_N1" "0,1" bitfld.long 0x00 9. " SDMMC2_PLLC4_OUT0_SHAPER_P0 ,SDMMC2_PLLC4_OUT0_SHAPER_P0" "0,1" textline " " bitfld.long 0x00 8. " SDMMC2_PLLC4_OUT0_SHAPER_P1 ,SDMMC2_PLLC4_OUT0_SHAPER_P1" "0,1" bitfld.long 0x00 7. " SDMMC2_PLLC4_OUT0_SHAPER_CTRL_TRIM_SELECT ,SDMMC2_PLLC4_OUT0_SHAPER control trim select" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x00 6. " SDMMC2_PLLC4_OUT0_SHAPER_CTRL_SW_BYPASS ,SDMMC2_PLLC4_OUT0_SHAPER control software bypass" "ACTIVE,BYPASS" bitfld.long 0x00 5. " SDMMC2_PLLC4_OUT0_SHAPER_CTRL_DF ,SDMMC2_PLLC4_OUT0_SHAPER control DF" "Disabled,Enabled" textline " " bitfld.long 0x00 3.--4. " SDMMC2_PLLC4_OUT0_SHAPER_CTRL_FALL_DELAY ,SDMMC2_PLLC4_OUT0_SHAPER control fall delay" "0,1,2,3" bitfld.long 0x00 2. " SDMMC2_PLLC4_OUT0_SHAPER_CTRL_DR ,SDMMC2_PLLC4_OUT0_SHAPER control DR" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " SDMMC2_PLLC4_OUT0_SHAPER_CTRL_RISE_DELAY ,SDMMC2_PLLC4_OUT0_SHAPER control rise delay" "0,1,2,3" line.long 0x04 "SDMMC2_PLLC4_OUT1_SHAPER_CTRL_0,SDMMC2_PLLC4_OUT1_SHAPER_CTRL_0 configuration" bitfld.long 0x04 31. " ENABLE_SDMMC2_PLLC4_OUT1_SHAPER ,SDMMC2_PLLC4_OUT1_SHAPER enable" "Disabled,Enabled" bitfld.long 0x04 11. " SDMMC2_PLLC4_OUT1_SHAPER_N0 ,SDMMC2_PLLC4_OUT1_SHAPER_N0" "0,1" textline " " bitfld.long 0x04 10. " SDMMC2_PLLC4_OUT1_SHAPER_N1 ,SDMMC2_PLLC4_OUT1_SHAPER_N1" "0,1" bitfld.long 0x04 9. " SDMMC2_PLLC4_OUT1_SHAPER_P0 ,SDMMC2_PLLC4_OUT1_SHAPER_P0" "0,1" textline " " bitfld.long 0x04 8. " SDMMC2_PLLC4_OUT1_SHAPER_P1 ,SDMMC2_PLLC4_OUT1_SHAPER_P1" "0,1" bitfld.long 0x04 7. " SDMMC2_PLLC4_OUT1_SHAPER_CTRL_TRIM_SELECT ,SDMMC2_PLLC4_OUT1_SHAPER control trim select" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x04 6. " SDMMC2_PLLC4_OUT1_SHAPER_CTRL_SW_BYPASS ,SDMMC2_PLLC4_OUT1_SHAPER control software bypass" "ACTIVE,BYPASS" bitfld.long 0x04 5. " SDMMC2_PLLC4_OUT1_SHAPER_CTRL_DF ,SDMMC2_PLLC4_OUT1_SHAPER control DF" "Disabled,Enabled" textline " " bitfld.long 0x04 3.--4. " SDMMC2_PLLC4_OUT1_SHAPER_CTRL_FALL_DELAY ,SDMMC2_PLLC4_OUT1_SHAPER control fall delay" "0,1,2,3" bitfld.long 0x04 2. " SDMMC2_PLLC4_OUT1_SHAPER_CTRL_DR ,SDMMC2_PLLC4_OUT1_SHAPER control DR" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " SDMMC2_PLLC4_OUT1_SHAPER_CTRL_RISE_DELAY ,SDMMC2_PLLC4_OUT1_SHAPER control rise delay" "0,1,2,3" line.long 0x08 "SDMMC2_PLLC4_OUT2_SHAPER_CTRL_0,SDMMC2_PLLC4_OUT2_SHAPER_CTRL_0 configuration" bitfld.long 0x08 31. " ENABLE_SDMMC2_PLLC4_OUT2_SHAPER ,SDMMC2_PLLC4_OUT2_SHAPER enable" "Disabled,Enabled" bitfld.long 0x08 11. " SDMMC2_PLLC4_OUT2_SHAPER_N0 ,SDMMC2_PLLC4_OUT2_SHAPER_N0" "0,1" textline " " bitfld.long 0x08 10. " SDMMC2_PLLC4_OUT2_SHAPER_N1 ,SDMMC2_PLLC4_OUT2_SHAPER_N1" "0,1" bitfld.long 0x08 9. " SDMMC2_PLLC4_OUT2_SHAPER_P0 ,SDMMC2_PLLC4_OUT2_SHAPER_P0" "0,1" textline " " bitfld.long 0x08 8. " SDMMC2_PLLC4_OUT2_SHAPER_P1 ,SDMMC2_PLLC4_OUT2_SHAPER_P1" "0,1" bitfld.long 0x08 7. " SDMMC2_PLLC4_OUT2_SHAPER_CTRL_TRIM_SELECT ,SDMMC2_PLLC4_OUT2_SHAPER control trim select" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x08 6. " SDMMC2_PLLC4_OUT2_SHAPER_CTRL_SW_BYPASS ,SDMMC2_PLLC4_OUT2_SHAPER control software bypass" "ACTIVE,BYPASS" bitfld.long 0x08 5. " SDMMC2_PLLC4_OUT2_SHAPER_CTRL_DF ,SDMMC2_PLLC4_OUT2_SHAPER control DF" "Disabled,Enabled" textline " " bitfld.long 0x08 3.--4. " SDMMC2_PLLC4_OUT2_SHAPER_CTRL_FALL_DELAY ,SDMMC2_PLLC4_OUT2_SHAPER control fall delay" "0,1,2,3" bitfld.long 0x08 2. " SDMMC2_PLLC4_OUT2_SHAPER_CTRL_DR ,SDMMC2_PLLC4_OUT2_SHAPER control DR" "Disabled,Enabled" textline " " bitfld.long 0x08 0.--1. " SDMMC2_PLLC4_OUT2_SHAPER_CTRL_RISE_DELAY ,SDMMC2_PLLC4_OUT2_SHAPER control rise delay" "0,1,2,3" line.long 0x0C "SDMMC2_DIV_CLK_SHAPER_CTRL_0,SDMMC2_DIV_CLK_SHAPER_CTRL_0 configuration" bitfld.long 0x0C 31. " ENABLE_SDMMC2_DIV_CLK_SHAPER ,SDMMC2_DIV_CLK_SHAPER enable" "Disabled,Enabled" bitfld.long 0x0C 11. " SDMMC2_DIV_CLK_SHAPER_N0 ,SDMMC2_DIV_CLK_SHAPER_N0" "0,1" textline " " bitfld.long 0x0C 10. " SDMMC2_DIV_CLK_SHAPER_N1 ,SDMMC2_DIV_CLK_SHAPER_N1" "0,1" bitfld.long 0x0C 9. " SDMMC2_DIV_CLK_SHAPER_P0 ,SDMMC2_DIV_CLK_SHAPER_P0" "0,1" textline " " bitfld.long 0x0C 8. " SDMMC2_DIV_CLK_SHAPER_P1 ,SDMMC2_DIV_CLK_SHAPER_P1" "0,1" bitfld.long 0x0C 7. " SDMMC2_DIV_CLK_SHAPER_CTRL_TRIM_SELECT ,SDMMC2_DIV_CLK_SHAPER control trim select" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x0C 6. " SDMMC2_DIV_CLK_SHAPER_CTRL_SW_BYPASS ,SDMMC2_DIV_CLK_SHAPER control software bypass" "ACTIVE,BYPASS" bitfld.long 0x0C 5. " SDMMC2_DIV_CLK_SHAPER_CTRL_DF ,SDMMC2_DIV_CLK_SHAPER control DF" "Disabled,Enabled" textline " " bitfld.long 0x0C 3.--4. " SDMMC2_DIV_CLK_SHAPER_CTRL_FALL_DELAY ,SDMMC2_DIV_CLK_SHAPER control fall delay" "0,1,2,3" bitfld.long 0x0C 2. " SDMMC2_DIV_CLK_SHAPER_CTRL_DR ,SDMMC2_DIV_CLK_SHAPER control DR" "Disabled,Enabled" textline " " bitfld.long 0x0C 0.--1. " SDMMC2_DIV_CLK_SHAPER_CTRL_RISE_DELAY ,SDMMC2_DIV_CLK_SHAPER control rise delay" "0,1,2,3" line.long 0x10 "SDMMC4_PLLC4_OUT0_SHAPER_CTRL_0,SDMMC4_PLLC4_OUT0_SHAPER_CTRL_0 configuration" bitfld.long 0x10 31. " ENABLE_SDMMC4_PLLC4_OUT0_SHAPER ,SDMMC4_PLLC4_OUT0_SHAPER enable" "Disabled,Enabled" bitfld.long 0x10 11. " SDMMC4_PLLC4_OUT0_SHAPER_N0 ,SDMMC4_PLLC4_OUT0_SHAPER_N0" "0,1" textline " " bitfld.long 0x10 10. " SDMMC4_PLLC4_OUT0_SHAPER_N1 ,SDMMC4_PLLC4_OUT0_SHAPER_N1" "0,1" bitfld.long 0x10 9. " SDMMC4_PLLC4_OUT0_SHAPER_P0 ,SDMMC4_PLLC4_OUT0_SHAPER_P0" "0,1" textline " " bitfld.long 0x10 8. " SDMMC4_PLLC4_OUT0_SHAPER_P1 ,SDMMC4_PLLC4_OUT0_SHAPER_P1" "0,1" bitfld.long 0x10 7. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_TRIM_SELECT ,SDMMC4_PLLC4_OUT0_SHAPER control trim select" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x10 6. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_SW_BYPASS ,SDMMC4_PLLC4_OUT0_SHAPER control software bypass" "ACTIVE,BYPASS" bitfld.long 0x10 5. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_DF ,SDMMC4_PLLC4_OUT0_SHAPER control DF" "Disabled,Enabled" textline " " bitfld.long 0x10 3.--4. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_FALL_DELAY ,SDMMC4_PLLC4_OUT0_SHAPER control fall delay" "0,1,2,3" bitfld.long 0x10 2. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_DR ,SDMMC4_PLLC4_OUT0_SHAPER control DR" "Disabled,Enabled" textline " " bitfld.long 0x10 0.--1. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_RISE_DELAY ,SDMMC4_PLLC4_OUT0_SHAPER control rise delay" "0,1,2,3" line.long 0x14 "SDMMC4_PLLC4_OUT1_SHAPER_CTRL_0,SDMMC4_PLLC4_OUT1_SHAPER_CTRL_0 configuration" bitfld.long 0x14 31. " ENABLE_SDMMC4_PLLC4_OUT1_SHAPER ,SDMMC4_PLLC4_OUT1_SHAPER enable" "Disabled,Enabled" bitfld.long 0x14 11. " SDMMC4_PLLC4_OUT1_SHAPER_N0 ,SDMMC4_PLLC4_OUT1_SHAPER_N0" "0,1" textline " " bitfld.long 0x14 10. " SDMMC4_PLLC4_OUT1_SHAPER_N1 ,SDMMC4_PLLC4_OUT1_SHAPER_N1" "0,1" bitfld.long 0x14 9. " SDMMC4_PLLC4_OUT1_SHAPER_P0 ,SDMMC4_PLLC4_OUT1_SHAPER_P0" "0,1" textline " " bitfld.long 0x14 8. " SDMMC4_PLLC4_OUT1_SHAPER_P1 ,SDMMC4_PLLC4_OUT1_SHAPER_P1" "0,1" bitfld.long 0x14 7. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_TRIM_SELECT ,SDMMC4_PLLC4_OUT1_SHAPER control trim select" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x14 6. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_SW_BYPASS ,SDMMC4_PLLC4_OUT1_SHAPER control software bypass" "ACTIVE,BYPASS" bitfld.long 0x14 5. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_DF ,SDMMC4_PLLC4_OUT1_SHAPER control DF" "Disabled,Enabled" textline " " bitfld.long 0x14 3.--4. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_FALL_DELAY ,SDMMC4_PLLC4_OUT1_SHAPER control fall delay" "0,1,2,3" bitfld.long 0x14 2. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_DR ,SDMMC4_PLLC4_OUT1_SHAPER control DR" "Disabled,Enabled" textline " " bitfld.long 0x14 0.--1. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_RISE_DELAY ,SDMMC4_PLLC4_OUT1_SHAPER control rise delay" "0,1,2,3" line.long 0x18 "SDMMC2_PLLC4_OUT2_SHAPER_CTRL_0,SDMMC2_PLLC4_OUT2_SHAPER_CTRL_0 configuration" bitfld.long 0x18 31. " ENABLE_SDMMC4_PLLC4_OUT2_SHAPER ,SDMMC4_PLLC4_OUT2_SHAPER enable" "Disabled,Enabled" bitfld.long 0x18 11. " SDMMC4_PLLC4_OUT2_SHAPER_N0 ,SDMMC4_PLLC4_OUT2_SHAPER_N0" "0,1" textline " " bitfld.long 0x18 10. " SDMMC4_PLLC4_OUT2_SHAPER_N1 ,SDMMC4_PLLC4_OUT2_SHAPER_N1" "0,1" bitfld.long 0x18 9. " SDMMC4_PLLC4_OUT2_SHAPER_P0 ,SDMMC4_PLLC4_OUT2_SHAPER_P0" "0,1" textline " " bitfld.long 0x18 8. " SDMMC4_PLLC4_OUT2_SHAPER_P1 ,SDMMC4_PLLC4_OUT2_SHAPER_P1" "0,1" bitfld.long 0x18 7. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_TRIM_SELECT ,SDMMC4_PLLC4_OUT2_SHAPER control trim select" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x18 6. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_SW_BYPASS ,SDMMC4_PLLC4_OUT2_SHAPER control software bypass" "ACTIVE,BYPASS" bitfld.long 0x18 5. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_DF ,SDMMC4_PLLC4_OUT2_SHAPER control DF" "Disabled,Enabled" textline " " bitfld.long 0x18 3.--4. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_FALL_DELAY ,SDMMC4_PLLC4_OUT2_SHAPER control fall delay" "0,1,2,3" bitfld.long 0x18 2. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_DR ,SDMMC4_PLLC4_OUT2_SHAPER control DR" "Disabled,Enabled" textline " " bitfld.long 0x18 0.--1. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_RISE_DELAY ,SDMMC4_PLLC4_OUT2_SHAPER control rise delay" "0,1,2,3" line.long 0x1C "SDMMC4_DIV_CLK_SHAPER_CTRL_0,SDMMC4_DIV_CLK_SHAPER_CTRL_0 configuration" bitfld.long 0x1C 31. " ENABLE_SDMMC4_DIV_CLK_SHAPER ,SDMMC4_DIV_CLK_SHAPER enable" "Disabled,Enabled" bitfld.long 0x1C 11. " SDMMC4_DIV_CLK_SHAPER_N0 ,SDMMC4_DIV_CLK_SHAPER_N0" "0,1" textline " " bitfld.long 0x1C 10. " SDMMC4_DIV_CLK_SHAPER_N1 ,SDMMC4_DIV_CLK_SHAPER_N1" "0,1" bitfld.long 0x1C 9. " SDMMC4_DIV_CLK_SHAPER_P0 ,SDMMC4_DIV_CLK_SHAPER_P0" "0,1" textline " " bitfld.long 0x1C 8. " SDMMC4_DIV_CLK_SHAPER_P1 ,SDMMC4_DIV_CLK_SHAPER_P1" "0,1" bitfld.long 0x1C 7. " SDMMC4_DIV_CLK_SHAPER_CTRL_TRIM_SELECT ,SDMMC4_DIV_CLK_SHAPER control trim select" "DEFAULT_SETTING,SW_PROG" textline " " bitfld.long 0x1C 6. " SDMMC4_DIV_CLK_SHAPER_CTRL_SW_BYPASS ,SDMMC4_DIV_CLK_SHAPER control software bypass" "ACTIVE,BYPASS" bitfld.long 0x1C 5. " SDMMC4_DIV_CLK_SHAPER_CTRL_DF ,SDMMC4_DIV_CLK_SHAPER control DF" "Disabled,Enabled" textline " " bitfld.long 0x1C 3.--4. " SDMMC4_DIV_CLK_SHAPER_CTRL_FALL_DELAY ,SDMMC4_DIV_CLK_SHAPER control fall delay" "0,1,2,3" bitfld.long 0x1C 2. " SDMMC4_DIV_CLK_SHAPER_CTRL_DR ,SDMMC4_DIV_CLK_SHAPER control DR" "Disabled,Enabled" textline " " bitfld.long 0x1C 0.--1. " SDMMC4_DIV_CLK_SHAPER_CTRL_RISE_DELAY ,SDMMC4_DIV_CLK_SHAPER control rise delay" "0,1,2,3" tree.end width 0xb tree.end tree "Closed-Loop Dynamic Voltage and Frequency Scaling" base ad:0x70110000 width 29. group.long 0x00++0x2B line.long 0x00 "CTRL_0,CL_DVFS Control 0 Register" bitfld.long 0x00 0.--1. " DFLL_CTRL_MODE ,DFLL control mode" "DISABLE,ENABLE_OPEN_LOOP,ENABLE_CLOSED_LOOP,?..." line.long 0x04 "CONFIG_0,CL_DVFS Configuration 0 Register" hexmask.long.byte 0x04 0.--7. 1. " DFLL_CONFIG_DIV_S ,Refclk divider for setting DFLL control loop sample rate. Refclk is divided by 32x the value in this field" line.long 0x08 "PARAMS_0,CL_DVFS Params 0 Register" bitfld.long 0x08 24. " CG_SCALE ,Reduce the overall loop gain by a factor of 8" "No effect,Reduced" bitfld.long 0x08 22.--23. " FORCE_MODE ,Force mode" "DISABLE,FIXED,AUTO,?..." textline " " bitfld.long 0x08 16.--21. " CF_PARAM ,Length of time that a forced I2C control value will be applied after a frequency change if forcing was requested for that change" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--10. " CI_PARAM ,Integral term gain in the control loop controls how a cycle deficit/surfeit after a frequency change is cleared" "DISABLE,DIV2,DIV4,DIV8,DIV16,DIV32,DIV64,DIV128" textline " " hexmask.long.byte 0x08 0.--7. 1. " CG_PARAM ,Overall loop gain control (SIGNED value) controls the overall response time of the control loop" line.long 0x0C "TUNE0_0,CL_DVFS Tune 0_0 Register" hexmask.long.word 0x0C 16.--31. 1. " DFLL_TUNE0_DLY_STK ,Drives I_DLY_SPARE<15:0>" hexmask.long.byte 0x0C 8.--15. 1. " DFLL_TUNE0_DLY_SRAM ,Delay of the SRAM path" textline " " hexmask.long.byte 0x0C 0.--7. 1. " DFLL_TUNE0_DLY_INV ,Delay of the inverter path" line.long 0x10 "TUNE1_0,CL_DVFS Tune 1_0 Register" hexmask.long.word 0x10 23.--31. 1. " DFLL_TUNE1_DLY_FINE ,Input bits to tune the two phases of the clock" hexmask.long.word 0x10 12.--22. 1. " DFLL_TUNE1_DLY_SRAM ,Delay of SRAM path" textline " " bitfld.long 0x10 11. " DFLL_TUNE1_DLY_SPARE1 ,Drives I_DLY_SPARE<16> of DVCO macro" "Disabled,Enabled" hexmask.long.word 0x10 0.--10. 1. " DFLL_TUNE1_DLY_WIRE ,Delay of wire dominated path" line.long 0x14 "FREQ_REQ_0,CL_DVFS Frequency Req Register" bitfld.long 0x14 28. " DFLL_FREQ_REQ_FORCE_EN ,Force I2C control output" "Disabled,Enabled" hexmask.long.word 0x14 16.--27. 1. " DFLL_FREQ_REQ_FORCE_VAL ,Value forced onto the integrator during a frequency transition" textline " " hexmask.long.byte 0x14 8.--15. 1. " DFLL_FREQ_REQ_SCALE ,Proportion of output clock cycles (+1) to *not* skip over a period of 256 cycles" bitfld.long 0x14 7. " DFLL_FREQ_REQ_VALID ,Frequency configuration" "Invalid,Valid" textline " " hexmask.long.byte 0x14 0.--6. 1. " DFLL_FREQ_REQ_MULT ,Primary frequency multiplication factor 'F'" line.long 0x18 "SCALE_RAMP_0,CL_DVFS Scale Ramp_0 Register" bitfld.long 0x18 0.--3. " DFLL_OUTPUT_RAMP_RATE ,The ramp up/ramp down rate of the control signal to the output scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "DROOP_CTRL_0,CL_DVFS Droop Control_0 Register" hexmask.long.byte 0x1C 16.--23. 1. " DFLL_DROOP_CTRL_MIN_FREQ ,The minimum allowed ring oscillator frequency before the 'droop' clock skipper is enabled" bitfld.long 0x1C 8.--11. " DFLL_DROOP_CTRL_CUT ,CPU clock is scaled by (cut+1)/16 immediately after reaching the minimum ring oscillator frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x1C 0.--7. 1. " DFLL_DROOP_CTRL_RATE ,Controls the rate at which clock cycles are re-introduced to the droop skipper after it has been ramped down to compensate for a frequency droop" line.long 0x20 "OUTPUT_CFG_0,CL_DVFS Output CFG_0 Register" bitfld.long 0x20 30. " DFLL_OUTPUT_CONFIG_I2C_ENABLE ,Master enable control for I2C control value updates" "Disabled,Enabled" bitfld.long 0x20 24.--29. " DFLL_OUTPUT_CONFIG_SAFE ,'Safe' value for the OUTPUT control interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x20 16.--21. " DFLL_OUTPUT_CONFIG_MAX ,Maximum allowed value on the OUTPUT control interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x20 8.--13. " DFLL_OUTPUT_CONFIG_MIN ,Minimum allowed value on the OUTPUT control interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x20 7. " DFLL_OUTPUT_CONFIG_DELTA_EN ,Enable Delta modulation" "Continuously,32 cycles" bitfld.long 0x20 6. " DFLL_OUTPUT_CONFIG_CLK_EN ,Enables the PMIC control clock output for digitally controlled PMICs" "Disabled,Enabled" textline " " bitfld.long 0x20 0.--5. " DFLL_OUTPUT_CONFIG_DIV_D ,Divider setting for PWM PMIC control output (divides the SOC clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x24 "OUTPUT_FORCE_0,CL_DVFS Output Force 0 Register" bitfld.long 0x24 6. " DFLL_OUTPUT_FORCE_ENABLE ,Enable the force value onto the OUTPUT control output" "Disabled,Enabled" bitfld.long 0x24 0.--5. " DFLL_OUTPUT_FORCE_VALUE ,Value to force OUTPUT control output whenever the i2c_ctrl_force_enable field is set to 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x28 "MONITOR_CTRL_0,CL_DVFS Monitor Control 0 Register" bitfld.long 0x28 0.--2. " DFLL_MONITOR_CTRL_SELECT ,Selects a control loop data source for monitoring" "DISABLE,CYCLE_INT,PRO_TERM,INT_TERM,OUTPUT_INT,OUTPUT_VALUE,FREQ,?..." hgroup.long 0x2C++0x03 hide.long 0x00 "MONITOR_DATA_0,CL_DVFS Monitor Data 0 Register" in group.long 0x40++0x07 line.long 0x00 "I2C_CFG_0,CL_DVFS_I2C Cfg_0 Register" bitfld.long 0x00 20. " I2C_BUS_ARB ,Enables arbitration for bus" "Disabled,Enabled" bitfld.long 0x00 16.--18. " I2C_MASTER_CODE ,Master code for high-speed transfers" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 15. " I2C_PACKET_MODE ,Enables packet mode for high-speed transfers" "Disabled,Enabled" bitfld.long 0x00 12.--14. " I2C_SIZE ,Size of voltage values" ",1,2,3,4,5,6,7" textline " " bitfld.long 0x00 10. " I2C_ADDR_7BIT_10BIT ,Select addressing type" "7-bit,10-bit" hexmask.long.word 0x00 0.--9. 1. " I2C_SLAVE_ID ,External slave ID address" line.long 0x04 "I2C_VDD_REG_ADDR_0,CL_DVFS_I2C_VDD_REG_ADDR_0 Register" hexmask.long.byte 0x04 8.--15. 1. " I2C_DEFAULT_DATA ,Default data" hexmask.long.byte 0x04 0.--7. 1. " I2C_ADDR_DATA ,Address for voltage sel" rgroup.long 0x48++0x03 line.long 0x00 "I2C_STS_0,CL_DVFS_I2C STS_0 Register" bitfld.long 0x00 1.--6. " I2C_LAST_VALUE ,Output value from the DFLL of last I2C request that was completed successfully" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0. " I2C_REQ_PENDING ,Indicates there is an outstanding I2C request" "Not requested,Requested" rgroup.long 0x5C++0x03 line.long 0x00 "INTR_STS_0,CL_DVFS_INTR STS_0 Register" bitfld.long 0x00 1. " MAX_VDD_LIMIT_INTR ,Interrupt to indicate the DFLL has hit the VDD ceiling" "No interrupt,Interrupt" bitfld.long 0x00 0. " MIN_VDD_LIMIT_INTR ,Interrupt to indicate the DFLL has hit the VDD floor" "No interrupt,Interrupt" group.long 0x60++0x03 line.long 0x00 "INTR_EN_0,CL_DVFS_INTR EN_0 Register" bitfld.long 0x00 1. " MAX_VDD_LIMIT_INTR_EN ,Enable for interrupt to indicate the DFLL has hit the VDD ceiling" "Disabled,Enabled" bitfld.long 0x00 0. " MIN_VDD_LIMIT_INTR_EN ,Enable for interrupt to indicate the DFLL has hit the VDD floor" "Disabled,Enabled" group.long 0x16C++0x03 line.long 0x00 "I2C_CLK_DIVISOR_REGISTER_0,CL_DVFS_I2C_CLK_DIVISOR_REGISTER_0 Register" hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE ,Std/Fast/Fm+ modes" hexmask.long.word 0x00 0.--15. 1. " I2C_CLK_DIVISOR_HSMODE ,HS mode" group.long 0x64++0x13 line.long 0x00 "DVFS_DFLL_THROTTLE_CTRL_0,DVFS_DFLL_THROTTLE_CTRL_0 Register" bitfld.long 0x00 9.--11. " DFLL_THROTTLE_OVERRIDE_INDEX ,Index value for override" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. " DFLL_THROTTLE_OVERRIDE_EN ,Override soc2cldvfs throttling of CLDVFS" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DFLL_THROTTLE_CONSTRAIN_MIN ,Throttle constrains OUTPUT_CONFIG_MIN" "Disabled,Enabled" bitfld.long 0x00 2. " DFLL_FAVOR_HW_ARB ,Prioritize hardware I2C requests when throttling enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DFLL_THROTTLE_DISABLE_OUTPUT_FORCE ,Disable software-controlled OUTPUT_FORCE during hardware-controlled voltage throttling" "No,Yes" bitfld.long 0x00 0. " DFLL_THROTTLE_EN ,Enable hardware-controlled voltage throttling" "Disabled,Enabled" line.long 0x04 "DVFS_DFLL_THROTTLE_LIGHT_0,DVFS_DFLL_THROTTLE_LIGHT_0 Register" hexmask.long.byte 0x04 24.--31. 1. " LIGHT_SCALE ,Skipper-2 control during light throttling" hexmask.long.byte 0x04 16.--22. 1. " LIGHT_MULT ,Frequency multiplier during light throttling" textline " " hexmask.long.byte 0x04 8.--14. 1. " LIGHT_VSEL_MAX ,Maximum voltage limit during light throttling" bitfld.long 0x04 0. " LIGHT_OVERRIDE ,Override DFLL_THROTTLE_LIGHT frequency multiplier and frequency scale and maximum voltage limit with software-requested values" "No override,Override" line.long 0x08 "DVFS_DFLL_THROTTLE_MEDIUM_0,DVFS_DFLL_THROTTLE_MEDIUM_0 Register" hexmask.long.byte 0x08 24.--31. 1. " MEDIUM_SCALE ,Skipper-2 control during medium throttling" hexmask.long.byte 0x08 16.--22. 1. " MEDIUM_MULT ,Frequency multiplier during medium throttling" textline " " hexmask.long.byte 0x08 8.--14. 1. " MEDIUM_VSEL_MAX ,Maximum voltage limit during medium throttling" bitfld.long 0x08 0. " MEDIUM_OVERRIDE ,Override DFLL_THROTTLE_MEDIUM frequency multiplier and frequency scale and maximum voltage limit with software-requested values" "No override,Override" line.long 0x0C "DVFS_DFLL_THROTTLE_HEAVY_0,DVFS_DFLL_THROTTLE_HEAVY_0 Register" hexmask.long.byte 0x0C 24.--31. 1. " HEAVY_SCALE ,Skipper-2 control during heavy throttling" hexmask.long.byte 0x0C 16.--22. 1. " HEAVY_MULT ,Frequency multiplier during heavy throttling" textline " " hexmask.long.byte 0x0C 8.--14. 1. " HEAVY_VSEL_MAX ,Maximum voltage limit during heavy throttling" bitfld.long 0x0C 0. " HEAVY_OVERRIDE ,Override DFLL_THROTTLE_HEAVY frequency multiplier and frequency scale and maximum voltage limit with software-requested values" "No override,Override" line.long 0x10 "DVFS_CC4_HVC_0,DVFS_CC4_HVC_0 Register" bitfld.long 0x10 8. " CC4_HVC_FORCE_ENABLE ,Enable force value onto OUTPUT control output" "Disabled,Enabled" bitfld.long 0x10 2.--7. " CC4_HVC_FORCE_VALUE ,Value to force OUTPUT control output whenever the i2c_ctrl_force_enable field is set to 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 0.--1. " CC4_HVC_DFLL_CTRL_MODE ,DFLL control mode" "DISABLE,ENABLE_OPEN_LOOP,ENABLE_CLOSED_LOOP,?..." width 0xb tree.end tree "Atomics" base ad:0x70016000 width 26. group.long 0x00++0x07 line.long 0x00 "ATOMICS_AP0_TRIGGER_0,Trigger Register - Aperture 0" hexmask.long.byte 0x00 16.--22. 1. " ID ,Index identification for given target register" bitfld.long 0x00 4. " WIDTH64 ,Width of operations" "32 bits,64 bits" bitfld.long 0x00 0.--3. " CMD , Trigger command" "EXCHANGE,COMPARE_AND_EXCHANGE,INCREMENT,DECREMENT_W_ZERO_SATURATE,GET,PUT,TEST_AND_SET,TEST_AND_CLEAR,TEST_AND_INVERT,?..." line.long 0x04 "ATOMICS_AP1_TRIGGER_0,Trigger Register - Aperture 1" hexmask.long.byte 0x04 16.--22. 1. " ID ,Index identification for given target register" bitfld.long 0x04 4. " WIDTH64 ,Width of operations" "32 bits,64 bits" bitfld.long 0x04 0.--3. " CMD , Trigger command" "EXCHANGE,COMPARE_AND_EXCHANGE,INCREMENT,DECREMENT_W_ZERO_SATURATE,GET,PUT,TEST_AND_SET,TEST_AND_CLEAR,TEST_AND_INVERT,?..." tree "Aperture 0" group.long 0x400++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_0,Aperture 0 V Setup Register" group.long 0x404++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_1,Aperture 0 V Setup Register" group.long 0x408++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_2,Aperture 0 V Setup Register" group.long 0x40C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_3,Aperture 0 V Setup Register" group.long 0x410++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_4,Aperture 0 V Setup Register" group.long 0x414++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_5,Aperture 0 V Setup Register" group.long 0x418++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_6,Aperture 0 V Setup Register" group.long 0x41C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_7,Aperture 0 V Setup Register" group.long 0x420++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_8,Aperture 0 V Setup Register" group.long 0x424++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_9,Aperture 0 V Setup Register" group.long 0x428++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_10,Aperture 0 V Setup Register" group.long 0x42C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_11,Aperture 0 V Setup Register" group.long 0x430++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_12,Aperture 0 V Setup Register" group.long 0x434++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_13,Aperture 0 V Setup Register" group.long 0x438++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_14,Aperture 0 V Setup Register" group.long 0x43C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_15,Aperture 0 V Setup Register" group.long 0x440++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_16,Aperture 0 V Setup Register" group.long 0x444++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_17,Aperture 0 V Setup Register" group.long 0x448++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_18,Aperture 0 V Setup Register" group.long 0x44C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_19,Aperture 0 V Setup Register" group.long 0x450++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_20,Aperture 0 V Setup Register" group.long 0x454++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_21,Aperture 0 V Setup Register" group.long 0x458++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_22,Aperture 0 V Setup Register" group.long 0x45C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_23,Aperture 0 V Setup Register" group.long 0x460++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_24,Aperture 0 V Setup Register" group.long 0x464++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_25,Aperture 0 V Setup Register" group.long 0x468++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_26,Aperture 0 V Setup Register" group.long 0x46C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_27,Aperture 0 V Setup Register" group.long 0x470++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_28,Aperture 0 V Setup Register" group.long 0x474++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_29,Aperture 0 V Setup Register" group.long 0x478++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_30,Aperture 0 V Setup Register" group.long 0x47C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_31,Aperture 0 V Setup Register" group.long 0x480++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_32,Aperture 0 V Setup Register" group.long 0x484++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_33,Aperture 0 V Setup Register" group.long 0x488++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_34,Aperture 0 V Setup Register" group.long 0x48C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_35,Aperture 0 V Setup Register" group.long 0x490++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_36,Aperture 0 V Setup Register" group.long 0x494++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_37,Aperture 0 V Setup Register" group.long 0x498++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_38,Aperture 0 V Setup Register" group.long 0x49C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_39,Aperture 0 V Setup Register" group.long 0x4A0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_40,Aperture 0 V Setup Register" group.long 0x4A4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_41,Aperture 0 V Setup Register" group.long 0x4A8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_42,Aperture 0 V Setup Register" group.long 0x4AC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_43,Aperture 0 V Setup Register" group.long 0x4B0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_44,Aperture 0 V Setup Register" group.long 0x4B4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_45,Aperture 0 V Setup Register" group.long 0x4B8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_46,Aperture 0 V Setup Register" group.long 0x4BC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_47,Aperture 0 V Setup Register" group.long 0x4C0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_48,Aperture 0 V Setup Register" group.long 0x4C4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_49,Aperture 0 V Setup Register" group.long 0x4C8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_50,Aperture 0 V Setup Register" group.long 0x4CC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_51,Aperture 0 V Setup Register" group.long 0x4D0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_52,Aperture 0 V Setup Register" group.long 0x4D4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_53,Aperture 0 V Setup Register" group.long 0x4D8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_54,Aperture 0 V Setup Register" group.long 0x4DC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_55,Aperture 0 V Setup Register" group.long 0x4E0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_56,Aperture 0 V Setup Register" group.long 0x4E4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_57,Aperture 0 V Setup Register" group.long 0x4E8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_58,Aperture 0 V Setup Register" group.long 0x4EC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_59,Aperture 0 V Setup Register" group.long 0x4F0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_60,Aperture 0 V Setup Register" group.long 0x4F4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_61,Aperture 0 V Setup Register" group.long 0x4F8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_62,Aperture 0 V Setup Register" group.long 0x4FC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_63,Aperture 0 V Setup Register" group.long 0x500++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_64,Aperture 0 V Setup Register" group.long 0x504++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_65,Aperture 0 V Setup Register" group.long 0x508++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_66,Aperture 0 V Setup Register" group.long 0x50C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_67,Aperture 0 V Setup Register" group.long 0x510++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_68,Aperture 0 V Setup Register" group.long 0x514++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_69,Aperture 0 V Setup Register" group.long 0x518++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_70,Aperture 0 V Setup Register" group.long 0x51C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_71,Aperture 0 V Setup Register" group.long 0x520++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_72,Aperture 0 V Setup Register" group.long 0x524++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_73,Aperture 0 V Setup Register" group.long 0x528++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_74,Aperture 0 V Setup Register" group.long 0x52C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_75,Aperture 0 V Setup Register" group.long 0x530++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_76,Aperture 0 V Setup Register" group.long 0x534++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_77,Aperture 0 V Setup Register" group.long 0x538++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_78,Aperture 0 V Setup Register" group.long 0x53C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_79,Aperture 0 V Setup Register" group.long 0x540++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_80,Aperture 0 V Setup Register" group.long 0x544++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_81,Aperture 0 V Setup Register" group.long 0x548++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_82,Aperture 0 V Setup Register" group.long 0x54C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_83,Aperture 0 V Setup Register" group.long 0x550++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_84,Aperture 0 V Setup Register" group.long 0x554++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_85,Aperture 0 V Setup Register" group.long 0x558++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_86,Aperture 0 V Setup Register" group.long 0x55C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_87,Aperture 0 V Setup Register" group.long 0x560++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_88,Aperture 0 V Setup Register" group.long 0x564++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_89,Aperture 0 V Setup Register" group.long 0x568++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_90,Aperture 0 V Setup Register" group.long 0x56C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_91,Aperture 0 V Setup Register" group.long 0x570++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_92,Aperture 0 V Setup Register" group.long 0x574++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_93,Aperture 0 V Setup Register" group.long 0x578++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_94,Aperture 0 V Setup Register" group.long 0x57C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_95,Aperture 0 V Setup Register" group.long 0x580++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_96,Aperture 0 V Setup Register" group.long 0x584++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_97,Aperture 0 V Setup Register" group.long 0x588++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_98,Aperture 0 V Setup Register" group.long 0x58C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_99,Aperture 0 V Setup Register" group.long 0x590++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_100,Aperture 0 V Setup Register" group.long 0x594++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_101,Aperture 0 V Setup Register" group.long 0x598++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_102,Aperture 0 V Setup Register" group.long 0x59C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_103,Aperture 0 V Setup Register" group.long 0x5A0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_104,Aperture 0 V Setup Register" group.long 0x5A4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_105,Aperture 0 V Setup Register" group.long 0x5A8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_106,Aperture 0 V Setup Register" group.long 0x5AC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_107,Aperture 0 V Setup Register" group.long 0x5B0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_108,Aperture 0 V Setup Register" group.long 0x5B4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_109,Aperture 0 V Setup Register" group.long 0x5B8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_110,Aperture 0 V Setup Register" group.long 0x5BC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_111,Aperture 0 V Setup Register" group.long 0x5C0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_112,Aperture 0 V Setup Register" group.long 0x5C4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_113,Aperture 0 V Setup Register" group.long 0x5C8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_114,Aperture 0 V Setup Register" group.long 0x5CC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_115,Aperture 0 V Setup Register" group.long 0x5D0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_116,Aperture 0 V Setup Register" group.long 0x5D4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_117,Aperture 0 V Setup Register" group.long 0x5D8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_118,Aperture 0 V Setup Register" group.long 0x5DC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_119,Aperture 0 V Setup Register" group.long 0x5E0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_120,Aperture 0 V Setup Register" group.long 0x5E4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_121,Aperture 0 V Setup Register" group.long 0x5E8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_122,Aperture 0 V Setup Register" group.long 0x5EC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_123,Aperture 0 V Setup Register" group.long 0x5F0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_124,Aperture 0 V Setup Register" group.long 0x5F4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_125,Aperture 0 V Setup Register" group.long 0x5F8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_126,Aperture 0 V Setup Register" group.long 0x5FC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_V_0_127,Aperture 0 V Setup Register" textline " " group.long 0x800++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_0,Aperture 0 C Setup Register" group.long 0x804++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_1,Aperture 0 C Setup Register" group.long 0x808++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_2,Aperture 0 C Setup Register" group.long 0x80C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_3,Aperture 0 C Setup Register" group.long 0x810++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_4,Aperture 0 C Setup Register" group.long 0x814++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_5,Aperture 0 C Setup Register" group.long 0x818++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_6,Aperture 0 C Setup Register" group.long 0x81C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_7,Aperture 0 C Setup Register" group.long 0x820++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_8,Aperture 0 C Setup Register" group.long 0x824++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_9,Aperture 0 C Setup Register" group.long 0x828++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_10,Aperture 0 C Setup Register" group.long 0x82C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_11,Aperture 0 C Setup Register" group.long 0x830++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_12,Aperture 0 C Setup Register" group.long 0x834++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_13,Aperture 0 C Setup Register" group.long 0x838++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_14,Aperture 0 C Setup Register" group.long 0x83C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_15,Aperture 0 C Setup Register" group.long 0x840++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_16,Aperture 0 C Setup Register" group.long 0x844++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_17,Aperture 0 C Setup Register" group.long 0x848++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_18,Aperture 0 C Setup Register" group.long 0x84C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_19,Aperture 0 C Setup Register" group.long 0x850++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_20,Aperture 0 C Setup Register" group.long 0x854++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_21,Aperture 0 C Setup Register" group.long 0x858++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_22,Aperture 0 C Setup Register" group.long 0x85C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_23,Aperture 0 C Setup Register" group.long 0x860++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_24,Aperture 0 C Setup Register" group.long 0x864++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_25,Aperture 0 C Setup Register" group.long 0x868++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_26,Aperture 0 C Setup Register" group.long 0x86C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_27,Aperture 0 C Setup Register" group.long 0x870++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_28,Aperture 0 C Setup Register" group.long 0x874++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_29,Aperture 0 C Setup Register" group.long 0x878++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_30,Aperture 0 C Setup Register" group.long 0x87C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_31,Aperture 0 C Setup Register" group.long 0x880++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_32,Aperture 0 C Setup Register" group.long 0x884++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_33,Aperture 0 C Setup Register" group.long 0x888++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_34,Aperture 0 C Setup Register" group.long 0x88C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_35,Aperture 0 C Setup Register" group.long 0x890++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_36,Aperture 0 C Setup Register" group.long 0x894++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_37,Aperture 0 C Setup Register" group.long 0x898++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_38,Aperture 0 C Setup Register" group.long 0x89C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_39,Aperture 0 C Setup Register" group.long 0x8A0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_40,Aperture 0 C Setup Register" group.long 0x8A4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_41,Aperture 0 C Setup Register" group.long 0x8A8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_42,Aperture 0 C Setup Register" group.long 0x8AC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_43,Aperture 0 C Setup Register" group.long 0x8B0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_44,Aperture 0 C Setup Register" group.long 0x8B4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_45,Aperture 0 C Setup Register" group.long 0x8B8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_46,Aperture 0 C Setup Register" group.long 0x8BC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_47,Aperture 0 C Setup Register" group.long 0x8C0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_48,Aperture 0 C Setup Register" group.long 0x8C4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_49,Aperture 0 C Setup Register" group.long 0x8C8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_50,Aperture 0 C Setup Register" group.long 0x8CC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_51,Aperture 0 C Setup Register" group.long 0x8D0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_52,Aperture 0 C Setup Register" group.long 0x8D4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_53,Aperture 0 C Setup Register" group.long 0x8D8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_54,Aperture 0 C Setup Register" group.long 0x8DC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_55,Aperture 0 C Setup Register" group.long 0x8E0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_56,Aperture 0 C Setup Register" group.long 0x8E4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_57,Aperture 0 C Setup Register" group.long 0x8E8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_58,Aperture 0 C Setup Register" group.long 0x8EC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_59,Aperture 0 C Setup Register" group.long 0x8F0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_60,Aperture 0 C Setup Register" group.long 0x8F4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_61,Aperture 0 C Setup Register" group.long 0x8F8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_62,Aperture 0 C Setup Register" group.long 0x8FC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_63,Aperture 0 C Setup Register" group.long 0x900++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_64,Aperture 0 C Setup Register" group.long 0x904++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_65,Aperture 0 C Setup Register" group.long 0x908++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_66,Aperture 0 C Setup Register" group.long 0x90C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_67,Aperture 0 C Setup Register" group.long 0x910++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_68,Aperture 0 C Setup Register" group.long 0x914++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_69,Aperture 0 C Setup Register" group.long 0x918++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_70,Aperture 0 C Setup Register" group.long 0x91C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_71,Aperture 0 C Setup Register" group.long 0x920++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_72,Aperture 0 C Setup Register" group.long 0x924++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_73,Aperture 0 C Setup Register" group.long 0x928++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_74,Aperture 0 C Setup Register" group.long 0x92C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_75,Aperture 0 C Setup Register" group.long 0x930++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_76,Aperture 0 C Setup Register" group.long 0x934++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_77,Aperture 0 C Setup Register" group.long 0x938++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_78,Aperture 0 C Setup Register" group.long 0x93C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_79,Aperture 0 C Setup Register" group.long 0x940++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_80,Aperture 0 C Setup Register" group.long 0x944++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_81,Aperture 0 C Setup Register" group.long 0x948++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_82,Aperture 0 C Setup Register" group.long 0x94C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_83,Aperture 0 C Setup Register" group.long 0x950++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_84,Aperture 0 C Setup Register" group.long 0x954++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_85,Aperture 0 C Setup Register" group.long 0x958++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_86,Aperture 0 C Setup Register" group.long 0x95C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_87,Aperture 0 C Setup Register" group.long 0x960++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_88,Aperture 0 C Setup Register" group.long 0x964++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_89,Aperture 0 C Setup Register" group.long 0x968++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_90,Aperture 0 C Setup Register" group.long 0x96C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_91,Aperture 0 C Setup Register" group.long 0x970++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_92,Aperture 0 C Setup Register" group.long 0x974++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_93,Aperture 0 C Setup Register" group.long 0x978++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_94,Aperture 0 C Setup Register" group.long 0x97C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_95,Aperture 0 C Setup Register" group.long 0x980++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_96,Aperture 0 C Setup Register" group.long 0x984++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_97,Aperture 0 C Setup Register" group.long 0x988++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_98,Aperture 0 C Setup Register" group.long 0x98C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_99,Aperture 0 C Setup Register" group.long 0x990++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_100,Aperture 0 C Setup Register" group.long 0x994++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_101,Aperture 0 C Setup Register" group.long 0x998++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_102,Aperture 0 C Setup Register" group.long 0x99C++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_103,Aperture 0 C Setup Register" group.long 0x9A0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_104,Aperture 0 C Setup Register" group.long 0x9A4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_105,Aperture 0 C Setup Register" group.long 0x9A8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_106,Aperture 0 C Setup Register" group.long 0x9AC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_107,Aperture 0 C Setup Register" group.long 0x9B0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_108,Aperture 0 C Setup Register" group.long 0x9B4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_109,Aperture 0 C Setup Register" group.long 0x9B8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_110,Aperture 0 C Setup Register" group.long 0x9BC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_111,Aperture 0 C Setup Register" group.long 0x9C0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_112,Aperture 0 C Setup Register" group.long 0x9C4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_113,Aperture 0 C Setup Register" group.long 0x9C8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_114,Aperture 0 C Setup Register" group.long 0x9CC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_115,Aperture 0 C Setup Register" group.long 0x9D0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_116,Aperture 0 C Setup Register" group.long 0x9D4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_117,Aperture 0 C Setup Register" group.long 0x9D8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_118,Aperture 0 C Setup Register" group.long 0x9DC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_119,Aperture 0 C Setup Register" group.long 0x9E0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_120,Aperture 0 C Setup Register" group.long 0x9E4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_121,Aperture 0 C Setup Register" group.long 0x9E8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_122,Aperture 0 C Setup Register" group.long 0x9EC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_123,Aperture 0 C Setup Register" group.long 0x9F0++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_124,Aperture 0 C Setup Register" group.long 0x9F4++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_125,Aperture 0 C Setup Register" group.long 0x9F8++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_126,Aperture 0 C Setup Register" group.long 0x9FC++0x03 line.long 0x00 "ATOMICS_AP0_SETUP_C_0_127,Aperture 0 C Setup Register" textline " " rgroup.long 0xC00++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_0,Aperture 0 Result Register" rgroup.long 0xC04++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_1,Aperture 0 Result Register" rgroup.long 0xC08++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_2,Aperture 0 Result Register" rgroup.long 0xC0C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_3,Aperture 0 Result Register" rgroup.long 0xC10++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_4,Aperture 0 Result Register" rgroup.long 0xC14++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_5,Aperture 0 Result Register" rgroup.long 0xC18++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_6,Aperture 0 Result Register" rgroup.long 0xC1C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_7,Aperture 0 Result Register" rgroup.long 0xC20++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_8,Aperture 0 Result Register" rgroup.long 0xC24++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_9,Aperture 0 Result Register" rgroup.long 0xC28++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_10,Aperture 0 Result Register" rgroup.long 0xC2C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_11,Aperture 0 Result Register" rgroup.long 0xC30++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_12,Aperture 0 Result Register" rgroup.long 0xC34++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_13,Aperture 0 Result Register" rgroup.long 0xC38++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_14,Aperture 0 Result Register" rgroup.long 0xC3C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_15,Aperture 0 Result Register" rgroup.long 0xC40++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_16,Aperture 0 Result Register" rgroup.long 0xC44++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_17,Aperture 0 Result Register" rgroup.long 0xC48++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_18,Aperture 0 Result Register" rgroup.long 0xC4C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_19,Aperture 0 Result Register" rgroup.long 0xC50++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_20,Aperture 0 Result Register" rgroup.long 0xC54++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_21,Aperture 0 Result Register" rgroup.long 0xC58++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_22,Aperture 0 Result Register" rgroup.long 0xC5C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_23,Aperture 0 Result Register" rgroup.long 0xC60++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_24,Aperture 0 Result Register" rgroup.long 0xC64++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_25,Aperture 0 Result Register" rgroup.long 0xC68++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_26,Aperture 0 Result Register" rgroup.long 0xC6C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_27,Aperture 0 Result Register" rgroup.long 0xC70++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_28,Aperture 0 Result Register" rgroup.long 0xC74++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_29,Aperture 0 Result Register" rgroup.long 0xC78++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_30,Aperture 0 Result Register" rgroup.long 0xC7C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_31,Aperture 0 Result Register" rgroup.long 0xC80++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_32,Aperture 0 Result Register" rgroup.long 0xC84++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_33,Aperture 0 Result Register" rgroup.long 0xC88++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_34,Aperture 0 Result Register" rgroup.long 0xC8C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_35,Aperture 0 Result Register" rgroup.long 0xC90++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_36,Aperture 0 Result Register" rgroup.long 0xC94++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_37,Aperture 0 Result Register" rgroup.long 0xC98++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_38,Aperture 0 Result Register" rgroup.long 0xC9C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_39,Aperture 0 Result Register" rgroup.long 0xCA0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_40,Aperture 0 Result Register" rgroup.long 0xCA4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_41,Aperture 0 Result Register" rgroup.long 0xCA8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_42,Aperture 0 Result Register" rgroup.long 0xCAC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_43,Aperture 0 Result Register" rgroup.long 0xCB0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_44,Aperture 0 Result Register" rgroup.long 0xCB4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_45,Aperture 0 Result Register" rgroup.long 0xCB8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_46,Aperture 0 Result Register" rgroup.long 0xCBC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_47,Aperture 0 Result Register" rgroup.long 0xCC0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_48,Aperture 0 Result Register" rgroup.long 0xCC4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_49,Aperture 0 Result Register" rgroup.long 0xCC8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_50,Aperture 0 Result Register" rgroup.long 0xCCC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_51,Aperture 0 Result Register" rgroup.long 0xCD0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_52,Aperture 0 Result Register" rgroup.long 0xCD4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_53,Aperture 0 Result Register" rgroup.long 0xCD8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_54,Aperture 0 Result Register" rgroup.long 0xCDC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_55,Aperture 0 Result Register" rgroup.long 0xCE0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_56,Aperture 0 Result Register" rgroup.long 0xCE4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_57,Aperture 0 Result Register" rgroup.long 0xCE8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_58,Aperture 0 Result Register" rgroup.long 0xCEC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_59,Aperture 0 Result Register" rgroup.long 0xCF0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_60,Aperture 0 Result Register" rgroup.long 0xCF4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_61,Aperture 0 Result Register" rgroup.long 0xCF8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_62,Aperture 0 Result Register" rgroup.long 0xCFC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_63,Aperture 0 Result Register" rgroup.long 0xD00++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_64,Aperture 0 Result Register" rgroup.long 0xD04++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_65,Aperture 0 Result Register" rgroup.long 0xD08++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_66,Aperture 0 Result Register" rgroup.long 0xD0C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_67,Aperture 0 Result Register" rgroup.long 0xD10++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_68,Aperture 0 Result Register" rgroup.long 0xD14++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_69,Aperture 0 Result Register" rgroup.long 0xD18++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_70,Aperture 0 Result Register" rgroup.long 0xD1C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_71,Aperture 0 Result Register" rgroup.long 0xD20++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_72,Aperture 0 Result Register" rgroup.long 0xD24++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_73,Aperture 0 Result Register" rgroup.long 0xD28++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_74,Aperture 0 Result Register" rgroup.long 0xD2C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_75,Aperture 0 Result Register" rgroup.long 0xD30++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_76,Aperture 0 Result Register" rgroup.long 0xD34++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_77,Aperture 0 Result Register" rgroup.long 0xD38++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_78,Aperture 0 Result Register" rgroup.long 0xD3C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_79,Aperture 0 Result Register" rgroup.long 0xD40++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_80,Aperture 0 Result Register" rgroup.long 0xD44++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_81,Aperture 0 Result Register" rgroup.long 0xD48++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_82,Aperture 0 Result Register" rgroup.long 0xD4C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_83,Aperture 0 Result Register" rgroup.long 0xD50++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_84,Aperture 0 Result Register" rgroup.long 0xD54++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_85,Aperture 0 Result Register" rgroup.long 0xD58++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_86,Aperture 0 Result Register" rgroup.long 0xD5C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_87,Aperture 0 Result Register" rgroup.long 0xD60++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_88,Aperture 0 Result Register" rgroup.long 0xD64++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_89,Aperture 0 Result Register" rgroup.long 0xD68++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_90,Aperture 0 Result Register" rgroup.long 0xD6C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_91,Aperture 0 Result Register" rgroup.long 0xD70++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_92,Aperture 0 Result Register" rgroup.long 0xD74++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_93,Aperture 0 Result Register" rgroup.long 0xD78++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_94,Aperture 0 Result Register" rgroup.long 0xD7C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_95,Aperture 0 Result Register" rgroup.long 0xD80++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_96,Aperture 0 Result Register" rgroup.long 0xD84++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_97,Aperture 0 Result Register" rgroup.long 0xD88++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_98,Aperture 0 Result Register" rgroup.long 0xD8C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_99,Aperture 0 Result Register" rgroup.long 0xD90++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_100,Aperture 0 Result Register" rgroup.long 0xD94++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_101,Aperture 0 Result Register" rgroup.long 0xD98++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_102,Aperture 0 Result Register" rgroup.long 0xD9C++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_103,Aperture 0 Result Register" rgroup.long 0xDA0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_104,Aperture 0 Result Register" rgroup.long 0xDA4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_105,Aperture 0 Result Register" rgroup.long 0xDA8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_106,Aperture 0 Result Register" rgroup.long 0xDAC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_107,Aperture 0 Result Register" rgroup.long 0xDB0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_108,Aperture 0 Result Register" rgroup.long 0xDB4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_109,Aperture 0 Result Register" rgroup.long 0xDB8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_110,Aperture 0 Result Register" rgroup.long 0xDBC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_111,Aperture 0 Result Register" rgroup.long 0xDC0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_112,Aperture 0 Result Register" rgroup.long 0xDC4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_113,Aperture 0 Result Register" rgroup.long 0xDC8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_114,Aperture 0 Result Register" rgroup.long 0xDCC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_115,Aperture 0 Result Register" rgroup.long 0xDD0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_116,Aperture 0 Result Register" rgroup.long 0xDD4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_117,Aperture 0 Result Register" rgroup.long 0xDD8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_118,Aperture 0 Result Register" rgroup.long 0xDDC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_119,Aperture 0 Result Register" rgroup.long 0xDE0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_120,Aperture 0 Result Register" rgroup.long 0xDE4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_121,Aperture 0 Result Register" rgroup.long 0xDE8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_122,Aperture 0 Result Register" rgroup.long 0xDEC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_123,Aperture 0 Result Register" rgroup.long 0xDF0++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_124,Aperture 0 Result Register" rgroup.long 0xDF4++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_125,Aperture 0 Result Register" rgroup.long 0xDF8++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_126,Aperture 0 Result Register" rgroup.long 0xDFC++0x03 line.long 0x00 "ATOMICS_AP0_RESULT_0_127,Aperture 0 Result Register" tree.end tree "Aperture 1" group.long 0x1000++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_0,Aperture 1 V Setup Register" group.long 0x1004++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_1,Aperture 1 V Setup Register" group.long 0x1008++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_2,Aperture 1 V Setup Register" group.long 0x100C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_3,Aperture 1 V Setup Register" group.long 0x1010++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_4,Aperture 1 V Setup Register" group.long 0x1014++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_5,Aperture 1 V Setup Register" group.long 0x1018++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_6,Aperture 1 V Setup Register" group.long 0x101C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_7,Aperture 1 V Setup Register" group.long 0x1020++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_8,Aperture 1 V Setup Register" group.long 0x1024++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_9,Aperture 1 V Setup Register" group.long 0x1028++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_10,Aperture 1 V Setup Register" group.long 0x102C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_11,Aperture 1 V Setup Register" group.long 0x1030++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_12,Aperture 1 V Setup Register" group.long 0x1034++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_13,Aperture 1 V Setup Register" group.long 0x1038++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_14,Aperture 1 V Setup Register" group.long 0x103C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_15,Aperture 1 V Setup Register" group.long 0x1040++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_16,Aperture 1 V Setup Register" group.long 0x1044++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_17,Aperture 1 V Setup Register" group.long 0x1048++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_18,Aperture 1 V Setup Register" group.long 0x104C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_19,Aperture 1 V Setup Register" group.long 0x1050++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_20,Aperture 1 V Setup Register" group.long 0x1054++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_21,Aperture 1 V Setup Register" group.long 0x1058++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_22,Aperture 1 V Setup Register" group.long 0x105C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_23,Aperture 1 V Setup Register" group.long 0x1060++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_24,Aperture 1 V Setup Register" group.long 0x1064++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_25,Aperture 1 V Setup Register" group.long 0x1068++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_26,Aperture 1 V Setup Register" group.long 0x106C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_27,Aperture 1 V Setup Register" group.long 0x1070++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_28,Aperture 1 V Setup Register" group.long 0x1074++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_29,Aperture 1 V Setup Register" group.long 0x1078++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_30,Aperture 1 V Setup Register" group.long 0x107C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_31,Aperture 1 V Setup Register" group.long 0x1080++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_32,Aperture 1 V Setup Register" group.long 0x1084++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_33,Aperture 1 V Setup Register" group.long 0x1088++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_34,Aperture 1 V Setup Register" group.long 0x108C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_35,Aperture 1 V Setup Register" group.long 0x1090++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_36,Aperture 1 V Setup Register" group.long 0x1094++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_37,Aperture 1 V Setup Register" group.long 0x1098++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_38,Aperture 1 V Setup Register" group.long 0x109C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_39,Aperture 1 V Setup Register" group.long 0x10A0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_40,Aperture 1 V Setup Register" group.long 0x10A4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_41,Aperture 1 V Setup Register" group.long 0x10A8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_42,Aperture 1 V Setup Register" group.long 0x10AC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_43,Aperture 1 V Setup Register" group.long 0x10B0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_44,Aperture 1 V Setup Register" group.long 0x10B4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_45,Aperture 1 V Setup Register" group.long 0x10B8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_46,Aperture 1 V Setup Register" group.long 0x10BC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_47,Aperture 1 V Setup Register" group.long 0x10C0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_48,Aperture 1 V Setup Register" group.long 0x10C4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_49,Aperture 1 V Setup Register" group.long 0x10C8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_50,Aperture 1 V Setup Register" group.long 0x10CC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_51,Aperture 1 V Setup Register" group.long 0x10D0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_52,Aperture 1 V Setup Register" group.long 0x10D4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_53,Aperture 1 V Setup Register" group.long 0x10D8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_54,Aperture 1 V Setup Register" group.long 0x10DC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_55,Aperture 1 V Setup Register" group.long 0x10E0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_56,Aperture 1 V Setup Register" group.long 0x10E4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_57,Aperture 1 V Setup Register" group.long 0x10E8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_58,Aperture 1 V Setup Register" group.long 0x10EC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_59,Aperture 1 V Setup Register" group.long 0x10F0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_60,Aperture 1 V Setup Register" group.long 0x10F4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_61,Aperture 1 V Setup Register" group.long 0x10F8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_62,Aperture 1 V Setup Register" group.long 0x10FC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_63,Aperture 1 V Setup Register" group.long 0x1100++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_64,Aperture 1 V Setup Register" group.long 0x1104++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_65,Aperture 1 V Setup Register" group.long 0x1108++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_66,Aperture 1 V Setup Register" group.long 0x110C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_67,Aperture 1 V Setup Register" group.long 0x1110++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_68,Aperture 1 V Setup Register" group.long 0x1114++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_69,Aperture 1 V Setup Register" group.long 0x1118++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_70,Aperture 1 V Setup Register" group.long 0x111C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_71,Aperture 1 V Setup Register" group.long 0x1120++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_72,Aperture 1 V Setup Register" group.long 0x1124++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_73,Aperture 1 V Setup Register" group.long 0x1128++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_74,Aperture 1 V Setup Register" group.long 0x112C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_75,Aperture 1 V Setup Register" group.long 0x1130++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_76,Aperture 1 V Setup Register" group.long 0x1134++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_77,Aperture 1 V Setup Register" group.long 0x1138++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_78,Aperture 1 V Setup Register" group.long 0x113C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_79,Aperture 1 V Setup Register" group.long 0x1140++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_80,Aperture 1 V Setup Register" group.long 0x1144++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_81,Aperture 1 V Setup Register" group.long 0x1148++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_82,Aperture 1 V Setup Register" group.long 0x114C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_83,Aperture 1 V Setup Register" group.long 0x1150++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_84,Aperture 1 V Setup Register" group.long 0x1154++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_85,Aperture 1 V Setup Register" group.long 0x1158++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_86,Aperture 1 V Setup Register" group.long 0x115C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_87,Aperture 1 V Setup Register" group.long 0x1160++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_88,Aperture 1 V Setup Register" group.long 0x1164++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_89,Aperture 1 V Setup Register" group.long 0x1168++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_90,Aperture 1 V Setup Register" group.long 0x116C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_91,Aperture 1 V Setup Register" group.long 0x1170++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_92,Aperture 1 V Setup Register" group.long 0x1174++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_93,Aperture 1 V Setup Register" group.long 0x1178++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_94,Aperture 1 V Setup Register" group.long 0x117C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_95,Aperture 1 V Setup Register" group.long 0x1180++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_96,Aperture 1 V Setup Register" group.long 0x1184++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_97,Aperture 1 V Setup Register" group.long 0x1188++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_98,Aperture 1 V Setup Register" group.long 0x118C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_99,Aperture 1 V Setup Register" group.long 0x1190++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_100,Aperture 1 V Setup Register" group.long 0x1194++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_101,Aperture 1 V Setup Register" group.long 0x1198++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_102,Aperture 1 V Setup Register" group.long 0x119C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_103,Aperture 1 V Setup Register" group.long 0x11A0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_104,Aperture 1 V Setup Register" group.long 0x11A4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_105,Aperture 1 V Setup Register" group.long 0x11A8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_106,Aperture 1 V Setup Register" group.long 0x11AC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_107,Aperture 1 V Setup Register" group.long 0x11B0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_108,Aperture 1 V Setup Register" group.long 0x11B4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_109,Aperture 1 V Setup Register" group.long 0x11B8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_110,Aperture 1 V Setup Register" group.long 0x11BC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_111,Aperture 1 V Setup Register" group.long 0x11C0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_112,Aperture 1 V Setup Register" group.long 0x11C4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_113,Aperture 1 V Setup Register" group.long 0x11C8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_114,Aperture 1 V Setup Register" group.long 0x11CC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_115,Aperture 1 V Setup Register" group.long 0x11D0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_116,Aperture 1 V Setup Register" group.long 0x11D4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_117,Aperture 1 V Setup Register" group.long 0x11D8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_118,Aperture 1 V Setup Register" group.long 0x11DC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_119,Aperture 1 V Setup Register" group.long 0x11E0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_120,Aperture 1 V Setup Register" group.long 0x11E4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_121,Aperture 1 V Setup Register" group.long 0x11E8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_122,Aperture 1 V Setup Register" group.long 0x11EC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_123,Aperture 1 V Setup Register" group.long 0x11F0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_124,Aperture 1 V Setup Register" group.long 0x11F4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_125,Aperture 1 V Setup Register" group.long 0x11F8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_126,Aperture 1 V Setup Register" group.long 0x11FC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_V_0_127,Aperture 1 V Setup Register" textline " " group.long 0x1400++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_0,Aperture 1 C Setup Register" group.long 0x1404++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_1,Aperture 1 C Setup Register" group.long 0x1408++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_2,Aperture 1 C Setup Register" group.long 0x140C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_3,Aperture 1 C Setup Register" group.long 0x1410++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_4,Aperture 1 C Setup Register" group.long 0x1414++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_5,Aperture 1 C Setup Register" group.long 0x1418++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_6,Aperture 1 C Setup Register" group.long 0x141C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_7,Aperture 1 C Setup Register" group.long 0x1420++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_8,Aperture 1 C Setup Register" group.long 0x1424++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_9,Aperture 1 C Setup Register" group.long 0x1428++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_10,Aperture 1 C Setup Register" group.long 0x142C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_11,Aperture 1 C Setup Register" group.long 0x1430++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_12,Aperture 1 C Setup Register" group.long 0x1434++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_13,Aperture 1 C Setup Register" group.long 0x1438++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_14,Aperture 1 C Setup Register" group.long 0x143C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_15,Aperture 1 C Setup Register" group.long 0x1440++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_16,Aperture 1 C Setup Register" group.long 0x1444++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_17,Aperture 1 C Setup Register" group.long 0x1448++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_18,Aperture 1 C Setup Register" group.long 0x144C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_19,Aperture 1 C Setup Register" group.long 0x1450++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_20,Aperture 1 C Setup Register" group.long 0x1454++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_21,Aperture 1 C Setup Register" group.long 0x1458++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_22,Aperture 1 C Setup Register" group.long 0x145C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_23,Aperture 1 C Setup Register" group.long 0x1460++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_24,Aperture 1 C Setup Register" group.long 0x1464++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_25,Aperture 1 C Setup Register" group.long 0x1468++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_26,Aperture 1 C Setup Register" group.long 0x146C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_27,Aperture 1 C Setup Register" group.long 0x1470++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_28,Aperture 1 C Setup Register" group.long 0x1474++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_29,Aperture 1 C Setup Register" group.long 0x1478++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_30,Aperture 1 C Setup Register" group.long 0x147C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_31,Aperture 1 C Setup Register" group.long 0x1480++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_32,Aperture 1 C Setup Register" group.long 0x1484++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_33,Aperture 1 C Setup Register" group.long 0x1488++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_34,Aperture 1 C Setup Register" group.long 0x148C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_35,Aperture 1 C Setup Register" group.long 0x1490++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_36,Aperture 1 C Setup Register" group.long 0x1494++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_37,Aperture 1 C Setup Register" group.long 0x1498++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_38,Aperture 1 C Setup Register" group.long 0x149C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_39,Aperture 1 C Setup Register" group.long 0x14A0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_40,Aperture 1 C Setup Register" group.long 0x14A4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_41,Aperture 1 C Setup Register" group.long 0x14A8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_42,Aperture 1 C Setup Register" group.long 0x14AC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_43,Aperture 1 C Setup Register" group.long 0x14B0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_44,Aperture 1 C Setup Register" group.long 0x14B4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_45,Aperture 1 C Setup Register" group.long 0x14B8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_46,Aperture 1 C Setup Register" group.long 0x14BC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_47,Aperture 1 C Setup Register" group.long 0x14C0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_48,Aperture 1 C Setup Register" group.long 0x14C4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_49,Aperture 1 C Setup Register" group.long 0x14C8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_50,Aperture 1 C Setup Register" group.long 0x14CC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_51,Aperture 1 C Setup Register" group.long 0x14D0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_52,Aperture 1 C Setup Register" group.long 0x14D4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_53,Aperture 1 C Setup Register" group.long 0x14D8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_54,Aperture 1 C Setup Register" group.long 0x14DC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_55,Aperture 1 C Setup Register" group.long 0x14E0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_56,Aperture 1 C Setup Register" group.long 0x14E4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_57,Aperture 1 C Setup Register" group.long 0x14E8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_58,Aperture 1 C Setup Register" group.long 0x14EC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_59,Aperture 1 C Setup Register" group.long 0x14F0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_60,Aperture 1 C Setup Register" group.long 0x14F4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_61,Aperture 1 C Setup Register" group.long 0x14F8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_62,Aperture 1 C Setup Register" group.long 0x14FC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_63,Aperture 1 C Setup Register" group.long 0x1500++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_64,Aperture 1 C Setup Register" group.long 0x1504++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_65,Aperture 1 C Setup Register" group.long 0x1508++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_66,Aperture 1 C Setup Register" group.long 0x150C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_67,Aperture 1 C Setup Register" group.long 0x1510++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_68,Aperture 1 C Setup Register" group.long 0x1514++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_69,Aperture 1 C Setup Register" group.long 0x1518++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_70,Aperture 1 C Setup Register" group.long 0x151C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_71,Aperture 1 C Setup Register" group.long 0x1520++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_72,Aperture 1 C Setup Register" group.long 0x1524++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_73,Aperture 1 C Setup Register" group.long 0x1528++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_74,Aperture 1 C Setup Register" group.long 0x152C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_75,Aperture 1 C Setup Register" group.long 0x1530++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_76,Aperture 1 C Setup Register" group.long 0x1534++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_77,Aperture 1 C Setup Register" group.long 0x1538++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_78,Aperture 1 C Setup Register" group.long 0x153C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_79,Aperture 1 C Setup Register" group.long 0x1540++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_80,Aperture 1 C Setup Register" group.long 0x1544++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_81,Aperture 1 C Setup Register" group.long 0x1548++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_82,Aperture 1 C Setup Register" group.long 0x154C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_83,Aperture 1 C Setup Register" group.long 0x1550++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_84,Aperture 1 C Setup Register" group.long 0x1554++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_85,Aperture 1 C Setup Register" group.long 0x1558++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_86,Aperture 1 C Setup Register" group.long 0x155C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_87,Aperture 1 C Setup Register" group.long 0x1560++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_88,Aperture 1 C Setup Register" group.long 0x1564++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_89,Aperture 1 C Setup Register" group.long 0x1568++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_90,Aperture 1 C Setup Register" group.long 0x156C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_91,Aperture 1 C Setup Register" group.long 0x1570++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_92,Aperture 1 C Setup Register" group.long 0x1574++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_93,Aperture 1 C Setup Register" group.long 0x1578++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_94,Aperture 1 C Setup Register" group.long 0x157C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_95,Aperture 1 C Setup Register" group.long 0x1580++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_96,Aperture 1 C Setup Register" group.long 0x1584++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_97,Aperture 1 C Setup Register" group.long 0x1588++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_98,Aperture 1 C Setup Register" group.long 0x158C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_99,Aperture 1 C Setup Register" group.long 0x1590++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_100,Aperture 1 C Setup Register" group.long 0x1594++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_101,Aperture 1 C Setup Register" group.long 0x1598++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_102,Aperture 1 C Setup Register" group.long 0x159C++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_103,Aperture 1 C Setup Register" group.long 0x15A0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_104,Aperture 1 C Setup Register" group.long 0x15A4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_105,Aperture 1 C Setup Register" group.long 0x15A8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_106,Aperture 1 C Setup Register" group.long 0x15AC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_107,Aperture 1 C Setup Register" group.long 0x15B0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_108,Aperture 1 C Setup Register" group.long 0x15B4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_109,Aperture 1 C Setup Register" group.long 0x15B8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_110,Aperture 1 C Setup Register" group.long 0x15BC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_111,Aperture 1 C Setup Register" group.long 0x15C0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_112,Aperture 1 C Setup Register" group.long 0x15C4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_113,Aperture 1 C Setup Register" group.long 0x15C8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_114,Aperture 1 C Setup Register" group.long 0x15CC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_115,Aperture 1 C Setup Register" group.long 0x15D0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_116,Aperture 1 C Setup Register" group.long 0x15D4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_117,Aperture 1 C Setup Register" group.long 0x15D8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_118,Aperture 1 C Setup Register" group.long 0x15DC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_119,Aperture 1 C Setup Register" group.long 0x15E0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_120,Aperture 1 C Setup Register" group.long 0x15E4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_121,Aperture 1 C Setup Register" group.long 0x15E8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_122,Aperture 1 C Setup Register" group.long 0x15EC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_123,Aperture 1 C Setup Register" group.long 0x15F0++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_124,Aperture 1 C Setup Register" group.long 0x15F4++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_125,Aperture 1 C Setup Register" group.long 0x15F8++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_126,Aperture 1 C Setup Register" group.long 0x15FC++0x03 line.long 0x00 "ATOMICS_AP1_SETUP_C_0_127,Aperture 1 C Setup Register" textline " " rgroup.long 0x1800++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_0,Aperture 1 R Result Register" rgroup.long 0x1804++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_1,Aperture 1 R Result Register" rgroup.long 0x1808++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_2,Aperture 1 R Result Register" rgroup.long 0x180C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_3,Aperture 1 R Result Register" rgroup.long 0x1810++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_4,Aperture 1 R Result Register" rgroup.long 0x1814++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_5,Aperture 1 R Result Register" rgroup.long 0x1818++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_6,Aperture 1 R Result Register" rgroup.long 0x181C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_7,Aperture 1 R Result Register" rgroup.long 0x1820++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_8,Aperture 1 R Result Register" rgroup.long 0x1824++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_9,Aperture 1 R Result Register" rgroup.long 0x1828++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_10,Aperture 1 R Result Register" rgroup.long 0x182C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_11,Aperture 1 R Result Register" rgroup.long 0x1830++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_12,Aperture 1 R Result Register" rgroup.long 0x1834++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_13,Aperture 1 R Result Register" rgroup.long 0x1838++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_14,Aperture 1 R Result Register" rgroup.long 0x183C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_15,Aperture 1 R Result Register" rgroup.long 0x1840++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_16,Aperture 1 R Result Register" rgroup.long 0x1844++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_17,Aperture 1 R Result Register" rgroup.long 0x1848++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_18,Aperture 1 R Result Register" rgroup.long 0x184C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_19,Aperture 1 R Result Register" rgroup.long 0x1850++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_20,Aperture 1 R Result Register" rgroup.long 0x1854++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_21,Aperture 1 R Result Register" rgroup.long 0x1858++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_22,Aperture 1 R Result Register" rgroup.long 0x185C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_23,Aperture 1 R Result Register" rgroup.long 0x1860++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_24,Aperture 1 R Result Register" rgroup.long 0x1864++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_25,Aperture 1 R Result Register" rgroup.long 0x1868++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_26,Aperture 1 R Result Register" rgroup.long 0x186C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_27,Aperture 1 R Result Register" rgroup.long 0x1870++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_28,Aperture 1 R Result Register" rgroup.long 0x1874++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_29,Aperture 1 R Result Register" rgroup.long 0x1878++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_30,Aperture 1 R Result Register" rgroup.long 0x187C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_31,Aperture 1 R Result Register" rgroup.long 0x1880++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_32,Aperture 1 R Result Register" rgroup.long 0x1884++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_33,Aperture 1 R Result Register" rgroup.long 0x1888++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_34,Aperture 1 R Result Register" rgroup.long 0x188C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_35,Aperture 1 R Result Register" rgroup.long 0x1890++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_36,Aperture 1 R Result Register" rgroup.long 0x1894++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_37,Aperture 1 R Result Register" rgroup.long 0x1898++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_38,Aperture 1 R Result Register" rgroup.long 0x189C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_39,Aperture 1 R Result Register" rgroup.long 0x18A0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_40,Aperture 1 R Result Register" rgroup.long 0x18A4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_41,Aperture 1 R Result Register" rgroup.long 0x18A8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_42,Aperture 1 R Result Register" rgroup.long 0x18AC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_43,Aperture 1 R Result Register" rgroup.long 0x18B0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_44,Aperture 1 R Result Register" rgroup.long 0x18B4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_45,Aperture 1 R Result Register" rgroup.long 0x18B8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_46,Aperture 1 R Result Register" rgroup.long 0x18BC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_47,Aperture 1 R Result Register" rgroup.long 0x18C0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_48,Aperture 1 R Result Register" rgroup.long 0x18C4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_49,Aperture 1 R Result Register" rgroup.long 0x18C8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_50,Aperture 1 R Result Register" rgroup.long 0x18CC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_51,Aperture 1 R Result Register" rgroup.long 0x18D0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_52,Aperture 1 R Result Register" rgroup.long 0x18D4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_53,Aperture 1 R Result Register" rgroup.long 0x18D8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_54,Aperture 1 R Result Register" rgroup.long 0x18DC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_55,Aperture 1 R Result Register" rgroup.long 0x18E0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_56,Aperture 1 R Result Register" rgroup.long 0x18E4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_57,Aperture 1 R Result Register" rgroup.long 0x18E8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_58,Aperture 1 R Result Register" rgroup.long 0x18EC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_59,Aperture 1 R Result Register" rgroup.long 0x18F0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_60,Aperture 1 R Result Register" rgroup.long 0x18F4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_61,Aperture 1 R Result Register" rgroup.long 0x18F8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_62,Aperture 1 R Result Register" rgroup.long 0x18FC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_63,Aperture 1 R Result Register" rgroup.long 0x1900++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_64,Aperture 1 R Result Register" rgroup.long 0x1904++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_65,Aperture 1 R Result Register" rgroup.long 0x1908++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_66,Aperture 1 R Result Register" rgroup.long 0x190C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_67,Aperture 1 R Result Register" rgroup.long 0x1910++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_68,Aperture 1 R Result Register" rgroup.long 0x1914++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_69,Aperture 1 R Result Register" rgroup.long 0x1918++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_70,Aperture 1 R Result Register" rgroup.long 0x191C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_71,Aperture 1 R Result Register" rgroup.long 0x1920++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_72,Aperture 1 R Result Register" rgroup.long 0x1924++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_73,Aperture 1 R Result Register" rgroup.long 0x1928++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_74,Aperture 1 R Result Register" rgroup.long 0x192C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_75,Aperture 1 R Result Register" rgroup.long 0x1930++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_76,Aperture 1 R Result Register" rgroup.long 0x1934++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_77,Aperture 1 R Result Register" rgroup.long 0x1938++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_78,Aperture 1 R Result Register" rgroup.long 0x193C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_79,Aperture 1 R Result Register" rgroup.long 0x1940++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_80,Aperture 1 R Result Register" rgroup.long 0x1944++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_81,Aperture 1 R Result Register" rgroup.long 0x1948++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_82,Aperture 1 R Result Register" rgroup.long 0x194C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_83,Aperture 1 R Result Register" rgroup.long 0x1950++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_84,Aperture 1 R Result Register" rgroup.long 0x1954++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_85,Aperture 1 R Result Register" rgroup.long 0x1958++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_86,Aperture 1 R Result Register" rgroup.long 0x195C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_87,Aperture 1 R Result Register" rgroup.long 0x1960++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_88,Aperture 1 R Result Register" rgroup.long 0x1964++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_89,Aperture 1 R Result Register" rgroup.long 0x1968++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_90,Aperture 1 R Result Register" rgroup.long 0x196C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_91,Aperture 1 R Result Register" rgroup.long 0x1970++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_92,Aperture 1 R Result Register" rgroup.long 0x1974++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_93,Aperture 1 R Result Register" rgroup.long 0x1978++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_94,Aperture 1 R Result Register" rgroup.long 0x197C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_95,Aperture 1 R Result Register" rgroup.long 0x1980++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_96,Aperture 1 R Result Register" rgroup.long 0x1984++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_97,Aperture 1 R Result Register" rgroup.long 0x1988++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_98,Aperture 1 R Result Register" rgroup.long 0x198C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_99,Aperture 1 R Result Register" rgroup.long 0x1990++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_100,Aperture 1 R Result Register" rgroup.long 0x1994++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_101,Aperture 1 R Result Register" rgroup.long 0x1998++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_102,Aperture 1 R Result Register" rgroup.long 0x199C++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_103,Aperture 1 R Result Register" rgroup.long 0x19A0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_104,Aperture 1 R Result Register" rgroup.long 0x19A4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_105,Aperture 1 R Result Register" rgroup.long 0x19A8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_106,Aperture 1 R Result Register" rgroup.long 0x19AC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_107,Aperture 1 R Result Register" rgroup.long 0x19B0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_108,Aperture 1 R Result Register" rgroup.long 0x19B4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_109,Aperture 1 R Result Register" rgroup.long 0x19B8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_110,Aperture 1 R Result Register" rgroup.long 0x19BC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_111,Aperture 1 R Result Register" rgroup.long 0x19C0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_112,Aperture 1 R Result Register" rgroup.long 0x19C4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_113,Aperture 1 R Result Register" rgroup.long 0x19C8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_114,Aperture 1 R Result Register" rgroup.long 0x19CC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_115,Aperture 1 R Result Register" rgroup.long 0x19D0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_116,Aperture 1 R Result Register" rgroup.long 0x19D4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_117,Aperture 1 R Result Register" rgroup.long 0x19D8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_118,Aperture 1 R Result Register" rgroup.long 0x19DC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_119,Aperture 1 R Result Register" rgroup.long 0x19E0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_120,Aperture 1 R Result Register" rgroup.long 0x19E4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_121,Aperture 1 R Result Register" rgroup.long 0x19E8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_122,Aperture 1 R Result Register" rgroup.long 0x19EC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_123,Aperture 1 R Result Register" rgroup.long 0x19F0++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_124,Aperture 1 R Result Register" rgroup.long 0x19F4++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_125,Aperture 1 R Result Register" rgroup.long 0x19F8++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_126,Aperture 1 R Result Register" rgroup.long 0x19FC++0x03 line.long 0x00 "ATOMICS_AP1_RESULT_0_127,Aperture 1 R Result Register" tree.end width 0x0B tree.end tree "Timers" tree "NVIDIA Timers" base ad:0x60005000 width 17. group.long 0x00++0x07 line.long 0x00 "TMR1_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR1_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x08++0x07 line.long 0x00 "TMR2_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR2_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x50++0x07 line.long 0x00 "TMR3_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR3_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x58++0x07 line.long 0x00 "TMR4_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR4_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x60++0x07 line.long 0x00 "TMR5_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR5_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x68++0x07 line.long 0x00 "TMR6_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR6_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x70++0x07 line.long 0x00 "TMR7_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR7_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x78++0x07 line.long 0x00 "TMR8_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR8_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x80++0x07 line.long 0x00 "TMR9_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR9_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x88++0x07 line.long 0x00 "TMR0_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR0_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x90++0x07 line.long 0x00 "TMR10_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR10_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0x98++0x07 line.long 0x00 "TMR11_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR11_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0xA0++0x07 line.long 0x00 "TMR12_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR12_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" group.long 0xA8++0x07 line.long 0x00 "TMR13_TMR_PTV_0,Timer Present Trigger Value Set Register" bitfld.long 0x00 31. " EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x00 30. " PER ,Periodic interrupt enable" "Disabled,Enabled" hexmask.long 0x00 0.--28. 1. " TMR_PTV ,Trigger value + 1" line.long 0x04 "TMR13_TMR_PCR_0,Timer Present Count Value Status Register" eventfld.long 0x04 30. " INTR_CLR ,Interrupt clear" "No clear,Clear" hexmask.long 0x04 0.--28. 1. " TMR_PCV ,Counter value" textline "" width 0x0B tree.end tree "Fixed Time Base Registers" base ad:0x60005010 width 27. rgroup.long 0x00++0x03 line.long 0x00 "TIMERUS_CNTR_1US_0,Counter Register" hexmask.long.word 0x00 16.--31. 1. " HIGH_VALUE ,Elapsed time in microseconds" hexmask.long.word 0x00 0.--15. 1. " LOW_VALUE ,Elapsed time in microseconds" group.long 0x04++0x03 line.long 0x00 "TIMERUS_USEC_CFG_0,Config Register" hexmask.long.byte 0x00 8.--15. 1. " USEC_DIVIDEND ,Microsecond dividend n+1" hexmask.long.byte 0x00 0.--7. 1. " USEC_DIVISOR ,Microsecond divisor n+1" group.long 0x3C++0x03 line.long 0x00 "TIMERUS_CNTR_FREEZE_0,Counter Freeze Register" bitfld.long 0x00 4. " DBG_FREEZE_COP ,COP debug state timers freeze control" "No freeze,Freeze" bitfld.long 0x00 3. " DBG_FREEZE_CPU3 ,CPU3 debug state timers freeze control" "No freeze,Freeze" bitfld.long 0x00 2. " DBG_FREEZE_CPU2 ,CPU2 debug state timers freeze control" "No freeze,Freeze" bitfld.long 0x00 1. " DBG_FREEZE_CPU1 ,CPU1 debug state timers freeze control" "No freeze,Freeze" bitfld.long 0x00 0. " DBG_FREEZE_CPU0 ,CPU0 debug state timers freeze control" "No freeze,Freeze" width 0x0B tree.end tree "Watchdog Timers" base ad:0x60005100 width 23. if ((per.w(ad:0x60005104+0x0)&0x01)==0x00) group.long 0x0++0x03 line.long 0x00 "WDT0_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." else rgroup.long 0x0++0x03 line.long 0x00 "WDT0_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." endif rgroup.long (0x0+0x04)++0x03 line.long 0x00 "WDT0_STATUS_0,Core Watchdog Status Register" bitfld.long 0x00 12.--13. " CURRENTEXPIRATIONCOUNT ,Current count of expiration since the last start of expiration" "0,1,2,3" hexmask.long.byte 0x00 4.--11. 1. " CURRENTCOUNT ,Counter current value" bitfld.long 0x00 2. " FIQSTATUS ,FIQ current status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INTERRUPTSTATUS ,Interrupt current status" "No interrupt,Interrupt" bitfld.long 0x00 0. " ENABLED ,Watchdog 0 enable status" "Disabled,Enabled" group.long (0x0+0x08)++0x03 line.long 0x00 "WDT0_COMMAND_0,Core Watchdog Command Register" bitfld.long 0x00 1. " DISABLECOUNTER ,WDT0 counter disable" "No,Yes" bitfld.long 0x00 0. " STARTCOUNTER ,WDT0 counter start" "Not started,Started" group.long (0x0+0x0C)++0x03 line.long 0x00 "WDT0_UNLOCK_PATTERN_0,Core Watchdog Unlock Register" textline "" if ((per.w(ad:0x60005104+0x20)&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "WDT1_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." else rgroup.long 0x20++0x03 line.long 0x00 "WDT1_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." endif rgroup.long (0x20+0x04)++0x03 line.long 0x00 "WDT1_STATUS_0,Core Watchdog Status Register" bitfld.long 0x00 12.--13. " CURRENTEXPIRATIONCOUNT ,Current count of expiration since the last start of expiration" "0,1,2,3" hexmask.long.byte 0x00 4.--11. 1. " CURRENTCOUNT ,Counter current value" bitfld.long 0x00 2. " FIQSTATUS ,FIQ current status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INTERRUPTSTATUS ,Interrupt current status" "No interrupt,Interrupt" bitfld.long 0x00 0. " ENABLED ,Watchdog 1 enable status" "Disabled,Enabled" group.long (0x20+0x08)++0x03 line.long 0x00 "WDT1_COMMAND_0,Core Watchdog Command Register" bitfld.long 0x00 1. " DISABLECOUNTER ,WDT1 counter disable" "No,Yes" bitfld.long 0x00 0. " STARTCOUNTER ,WDT1 counter start" "Not started,Started" group.long (0x20+0x0C)++0x03 line.long 0x00 "WDT1_UNLOCK_PATTERN_0,Core Watchdog Unlock Register" textline "" if ((per.w(ad:0x60005104+0x40)&0x01)==0x00) group.long 0x40++0x03 line.long 0x00 "WDT2_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." else rgroup.long 0x40++0x03 line.long 0x00 "WDT2_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." endif rgroup.long (0x40+0x04)++0x03 line.long 0x00 "WDT2_STATUS_0,Core Watchdog Status Register" bitfld.long 0x00 12.--13. " CURRENTEXPIRATIONCOUNT ,Current count of expiration since the last start of expiration" "0,1,2,3" hexmask.long.byte 0x00 4.--11. 1. " CURRENTCOUNT ,Counter current value" bitfld.long 0x00 2. " FIQSTATUS ,FIQ current status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INTERRUPTSTATUS ,Interrupt current status" "No interrupt,Interrupt" bitfld.long 0x00 0. " ENABLED ,Watchdog 2 enable status" "Disabled,Enabled" group.long (0x40+0x08)++0x03 line.long 0x00 "WDT2_COMMAND_0,Core Watchdog Command Register" bitfld.long 0x00 1. " DISABLECOUNTER ,WDT2 counter disable" "No,Yes" bitfld.long 0x00 0. " STARTCOUNTER ,WDT2 counter start" "Not started,Started" group.long (0x40+0x0C)++0x03 line.long 0x00 "WDT2_UNLOCK_PATTERN_0,Core Watchdog Unlock Register" textline "" if ((per.w(ad:0x60005104+0x60)&0x01)==0x00) group.long 0x60++0x03 line.long 0x00 "WDT3_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." else rgroup.long 0x60++0x03 line.long 0x00 "WDT3_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." endif rgroup.long (0x60+0x04)++0x03 line.long 0x00 "WDT3_STATUS_0,Core Watchdog Status Register" bitfld.long 0x00 12.--13. " CURRENTEXPIRATIONCOUNT ,Current count of expiration since the last start of expiration" "0,1,2,3" hexmask.long.byte 0x00 4.--11. 1. " CURRENTCOUNT ,Counter current value" bitfld.long 0x00 2. " FIQSTATUS ,FIQ current status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INTERRUPTSTATUS ,Interrupt current status" "No interrupt,Interrupt" bitfld.long 0x00 0. " ENABLED ,Watchdog 3 enable status" "Disabled,Enabled" group.long (0x60+0x08)++0x03 line.long 0x00 "WDT3_COMMAND_0,Core Watchdog Command Register" bitfld.long 0x00 1. " DISABLECOUNTER ,WDT3 counter disable" "No,Yes" bitfld.long 0x00 0. " STARTCOUNTER ,WDT3 counter start" "Not started,Started" group.long (0x60+0x0C)++0x03 line.long 0x00 "WDT3_UNLOCK_PATTERN_0,Core Watchdog Unlock Register" textline "" if ((per.w(ad:0x60005104+0x80)&0x01)==0x00) group.long 0x80++0x03 line.long 0x00 "WDT4_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." else rgroup.long 0x80++0x03 line.long 0x00 "WDT4_CONFIG_0,Core Watchdog Configuration Register" bitfld.long 0x00 20. " CORERESETBITMAPEN[4] ,Third counter expiration COP reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " CORERESETBITMAPEN[3] ,Third counter expiration CPU3 reset enable" "Disabled,Enabled" bitfld.long 0x00 18. " CORERESETBITMAPEN[2] ,Third counter expiration CPU2 reset enable" "Disabled,Enabled" bitfld.long 0x00 17. " CORERESETBITMAPEN[1] ,Third counter expiration CPU1 reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CORERESETBITMAPEN[0] ,Third counter expiration CPU0 reset enable" "Disabled,Enabled" bitfld.long 0x00 15. " PMC2CARRESETEN ,Fourth counter expiration full system reset enable" "Disabled,Enabled" bitfld.long 0x00 14. " SYSTEMRESETENABLE ,Fourth counter expiration system reset enable" "Disabled,Enabled" bitfld.long 0x00 13. " FIQENABLE ,FIQ assertion at second counter expiration enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " INTERRUPTENABLE ,First counter expiration interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " PERIOD ,Selected timer measured period" bitfld.long 0x00 0.--3. " TIMERSOURCE ,Reference timer select" "TMR0,TMR1,TMR2,TMR3,TMR4,TMR5,TMR6,TMR7,TMR8,TMR9,?..." endif rgroup.long (0x80+0x04)++0x03 line.long 0x00 "WDT4_STATUS_0,Core Watchdog Status Register" bitfld.long 0x00 12.--13. " CURRENTEXPIRATIONCOUNT ,Current count of expiration since the last start of expiration" "0,1,2,3" hexmask.long.byte 0x00 4.--11. 1. " CURRENTCOUNT ,Counter current value" bitfld.long 0x00 2. " FIQSTATUS ,FIQ current status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INTERRUPTSTATUS ,Interrupt current status" "No interrupt,Interrupt" bitfld.long 0x00 0. " ENABLED ,Watchdog 4 enable status" "Disabled,Enabled" group.long (0x80+0x08)++0x03 line.long 0x00 "WDT4_COMMAND_0,Core Watchdog Command Register" bitfld.long 0x00 1. " DISABLECOUNTER ,WDT4 counter disable" "No,Yes" bitfld.long 0x00 0. " STARTCOUNTER ,WDT4 counter start" "Not started,Started" group.long (0x80+0x0C)++0x03 line.long 0x00 "WDT4_UNLOCK_PATTERN_0,Core Watchdog Unlock Register" textline "" width 0x0B tree.end tree "Timer Shared Interrupt Status" base ad:0x600051A0 width 27. rgroup.long 0x00++0x03 line.long 0x00 "SHARED_INTR_STATUS_0,Timer Shared Interrupt Status Register" bitfld.long 0x00 10. " TIMERSRCBITMAP[4] ,Timer 0 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " [3] ,Timer 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " [2] ,Timer 8 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " [1] ,Timer 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " [0] ,Timer 6 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " WATCHDOGSRCBITMAP[4] ,WDT 4 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " [3] ,WDT 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,WDT 2 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " [1] ,WDT 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,WDT 0 interrupt status" "No interrupt,Interrupt" textline "" group.long 0x04++0x03 line.long 0x00 "SHARED_TIMER_SECURE_CFG_0,Timer Shared Secure Configuration Register" bitfld.long 0x00 27. " TMR13 ,Timer 13 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 26. " TMR12 ,Timer 12 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 25. " TMR11 ,Timer 11 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 24. " TMR10 ,Timer 10 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 20. " USEC ,TIMERUS_USEC_CFG secure|non-secure write config" "Both,Secure only" textline " " bitfld.long 0x00 15. " WDT3 ,WDT3 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 14. " WDT2 ,WDT2 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 13. " WDT1 ,WDT1 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 12. " WDT0 ,WDT0 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 9. " TMR9 ,Timer 9 secure|non-secure write config" "Both,Secure only" textline " " bitfld.long 0x00 8. " TMR8 ,Timer 8 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 7. " TMR7 ,Timer 7 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 6. " TMR6 ,Timer 6 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 5. " TMR5 ,Timer 5 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 4. " TMR4 ,Timer 4 secure|non-secure write config" "Both,Secure only" textline " " bitfld.long 0x00 3. " TMR3 ,Timer 3 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 2. " TMR2 ,Timer 2 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 1. " TMR1 ,Timer 1 secure|non-secure write config" "Both,Secure only" bitfld.long 0x00 0. " TMR0 ,Timer 0 secure|non-secure write config" "Both,Secure only" width 0x0B tree.end tree.end tree "GPIO Controller/Pin MUX" tree "GPIO 1" tree "Port A" base ad:0x6000D000 ; 0 - GPIO controller number ; 0x0 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x0)++0x03 line.long 0x00 "GPIO_CNF_0,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x0)++0x03 line.long 0x00 "GPIO_OE_0,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x0)++0x03 line.long 0x00 "GPIO_OUT_0,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x0)++0x03 line.long 0x00 "GPIO_IN_0,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "GPIO_INT_STA_0,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x0)++0x03 line.long 0x00 "GPIO_INT_ENB_0,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "GPIO_INT_LVL_0,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "GPIO_INT_CLR_0,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x0)++0x03 line.long 0x00 "GPIO_MSK_CNF_0,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x0)++0x03 line.long 0x00 "GPIO_MSK_OE_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x0)++0x03 line.long 0x00 "GPIO_MSK_OUT_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_0,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_0,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_0,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port B" base ad:0x6000D000 ; 1 - GPIO controller number ; 0x4 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x4)++0x03 line.long 0x00 "GPIO_CNF_1,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x4)++0x03 line.long 0x00 "GPIO_OE_1,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x4)++0x03 line.long 0x00 "GPIO_OUT_1,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x4)++0x03 line.long 0x00 "GPIO_IN_1,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "GPIO_INT_STA_1,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x4)++0x03 line.long 0x00 "GPIO_INT_ENB_1,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "GPIO_INT_LVL_1,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "GPIO_INT_CLR_1,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x4)++0x03 line.long 0x00 "GPIO_MSK_CNF_1,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x4)++0x03 line.long 0x00 "GPIO_MSK_OE_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x4)++0x03 line.long 0x00 "GPIO_MSK_OUT_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_1,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_1,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_1,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port C" base ad:0x6000D000 ; 2 - GPIO controller number ; 0x8 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x8)++0x03 line.long 0x00 "GPIO_CNF_2,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x8)++0x03 line.long 0x00 "GPIO_OE_2,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x8)++0x03 line.long 0x00 "GPIO_OUT_2,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x8)++0x03 line.long 0x00 "GPIO_IN_2,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "GPIO_INT_STA_2,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x8)++0x03 line.long 0x00 "GPIO_INT_ENB_2,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "GPIO_INT_LVL_2,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "GPIO_INT_CLR_2,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x8)++0x03 line.long 0x00 "GPIO_MSK_CNF_2,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x8)++0x03 line.long 0x00 "GPIO_MSK_OE_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x8)++0x03 line.long 0x00 "GPIO_MSK_OUT_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_2,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_2,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_2,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port D" base ad:0x6000D000 ; 3 - GPIO controller number ; 0xC - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0xC)++0x03 line.long 0x00 "GPIO_CNF_3,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0xC)++0x03 line.long 0x00 "GPIO_OE_3,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0xC)++0x03 line.long 0x00 "GPIO_OUT_3,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0xC)++0x03 line.long 0x00 "GPIO_IN_3,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0xC)++0x03 line.long 0x00 "GPIO_INT_STA_3,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0xC)++0x03 line.long 0x00 "GPIO_INT_ENB_3,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0xC)++0x03 line.long 0x00 "GPIO_INT_LVL_3,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0xC)++0x03 line.long 0x00 "GPIO_INT_CLR_3,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0xC)++0x03 line.long 0x00 "GPIO_MSK_CNF_3,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0xC)++0x03 line.long 0x00 "GPIO_MSK_OE_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0xC)++0x03 line.long 0x00 "GPIO_MSK_OUT_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_3,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_3,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_3,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree.end tree "GPIO 2" tree "Port E" base ad:0x6000D100 ; 0 - GPIO controller number ; 0x0 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x0)++0x03 line.long 0x00 "GPIO_CNF_0,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x0)++0x03 line.long 0x00 "GPIO_OE_0,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x0)++0x03 line.long 0x00 "GPIO_OUT_0,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x0)++0x03 line.long 0x00 "GPIO_IN_0,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "GPIO_INT_STA_0,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x0)++0x03 line.long 0x00 "GPIO_INT_ENB_0,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "GPIO_INT_LVL_0,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "GPIO_INT_CLR_0,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x0)++0x03 line.long 0x00 "GPIO_MSK_CNF_0,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x0)++0x03 line.long 0x00 "GPIO_MSK_OE_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x0)++0x03 line.long 0x00 "GPIO_MSK_OUT_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_0,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_0,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_0,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port F" base ad:0x6000D100 ; 1 - GPIO controller number ; 0x4 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x4)++0x03 line.long 0x00 "GPIO_CNF_1,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x4)++0x03 line.long 0x00 "GPIO_OE_1,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x4)++0x03 line.long 0x00 "GPIO_OUT_1,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x4)++0x03 line.long 0x00 "GPIO_IN_1,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "GPIO_INT_STA_1,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x4)++0x03 line.long 0x00 "GPIO_INT_ENB_1,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "GPIO_INT_LVL_1,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "GPIO_INT_CLR_1,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x4)++0x03 line.long 0x00 "GPIO_MSK_CNF_1,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x4)++0x03 line.long 0x00 "GPIO_MSK_OE_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x4)++0x03 line.long 0x00 "GPIO_MSK_OUT_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_1,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_1,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_1,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port G" base ad:0x6000D100 ; 2 - GPIO controller number ; 0x8 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x8)++0x03 line.long 0x00 "GPIO_CNF_2,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x8)++0x03 line.long 0x00 "GPIO_OE_2,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x8)++0x03 line.long 0x00 "GPIO_OUT_2,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x8)++0x03 line.long 0x00 "GPIO_IN_2,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "GPIO_INT_STA_2,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x8)++0x03 line.long 0x00 "GPIO_INT_ENB_2,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "GPIO_INT_LVL_2,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "GPIO_INT_CLR_2,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x8)++0x03 line.long 0x00 "GPIO_MSK_CNF_2,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x8)++0x03 line.long 0x00 "GPIO_MSK_OE_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x8)++0x03 line.long 0x00 "GPIO_MSK_OUT_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_2,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_2,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_2,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port H" base ad:0x6000D100 ; 3 - GPIO controller number ; 0xC - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0xC)++0x03 line.long 0x00 "GPIO_CNF_3,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0xC)++0x03 line.long 0x00 "GPIO_OE_3,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0xC)++0x03 line.long 0x00 "GPIO_OUT_3,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0xC)++0x03 line.long 0x00 "GPIO_IN_3,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0xC)++0x03 line.long 0x00 "GPIO_INT_STA_3,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0xC)++0x03 line.long 0x00 "GPIO_INT_ENB_3,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0xC)++0x03 line.long 0x00 "GPIO_INT_LVL_3,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0xC)++0x03 line.long 0x00 "GPIO_INT_CLR_3,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0xC)++0x03 line.long 0x00 "GPIO_MSK_CNF_3,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0xC)++0x03 line.long 0x00 "GPIO_MSK_OE_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0xC)++0x03 line.long 0x00 "GPIO_MSK_OUT_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_3,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_3,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_3,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree.end tree "GPIO 3" tree "Port I" base ad:0x6000D200 ; 0 - GPIO controller number ; 0x0 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x0)++0x03 line.long 0x00 "GPIO_CNF_0,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x0)++0x03 line.long 0x00 "GPIO_OE_0,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x0)++0x03 line.long 0x00 "GPIO_OUT_0,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x0)++0x03 line.long 0x00 "GPIO_IN_0,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "GPIO_INT_STA_0,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x0)++0x03 line.long 0x00 "GPIO_INT_ENB_0,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "GPIO_INT_LVL_0,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "GPIO_INT_CLR_0,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x0)++0x03 line.long 0x00 "GPIO_MSK_CNF_0,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x0)++0x03 line.long 0x00 "GPIO_MSK_OE_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x0)++0x03 line.long 0x00 "GPIO_MSK_OUT_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_0,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_0,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_0,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port J" base ad:0x6000D200 ; 1 - GPIO controller number ; 0x4 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x4)++0x03 line.long 0x00 "GPIO_CNF_1,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x4)++0x03 line.long 0x00 "GPIO_OE_1,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x4)++0x03 line.long 0x00 "GPIO_OUT_1,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x4)++0x03 line.long 0x00 "GPIO_IN_1,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "GPIO_INT_STA_1,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x4)++0x03 line.long 0x00 "GPIO_INT_ENB_1,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "GPIO_INT_LVL_1,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "GPIO_INT_CLR_1,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x4)++0x03 line.long 0x00 "GPIO_MSK_CNF_1,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x4)++0x03 line.long 0x00 "GPIO_MSK_OE_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x4)++0x03 line.long 0x00 "GPIO_MSK_OUT_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_1,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_1,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_1,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port K" base ad:0x6000D200 ; 2 - GPIO controller number ; 0x8 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x8)++0x03 line.long 0x00 "GPIO_CNF_2,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x8)++0x03 line.long 0x00 "GPIO_OE_2,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x8)++0x03 line.long 0x00 "GPIO_OUT_2,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x8)++0x03 line.long 0x00 "GPIO_IN_2,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "GPIO_INT_STA_2,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x8)++0x03 line.long 0x00 "GPIO_INT_ENB_2,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "GPIO_INT_LVL_2,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "GPIO_INT_CLR_2,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x8)++0x03 line.long 0x00 "GPIO_MSK_CNF_2,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x8)++0x03 line.long 0x00 "GPIO_MSK_OE_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x8)++0x03 line.long 0x00 "GPIO_MSK_OUT_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_2,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_2,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_2,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port L" base ad:0x6000D200 ; 3 - GPIO controller number ; 0xC - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0xC)++0x03 line.long 0x00 "GPIO_CNF_3,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0xC)++0x03 line.long 0x00 "GPIO_OE_3,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0xC)++0x03 line.long 0x00 "GPIO_OUT_3,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0xC)++0x03 line.long 0x00 "GPIO_IN_3,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0xC)++0x03 line.long 0x00 "GPIO_INT_STA_3,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0xC)++0x03 line.long 0x00 "GPIO_INT_ENB_3,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0xC)++0x03 line.long 0x00 "GPIO_INT_LVL_3,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0xC)++0x03 line.long 0x00 "GPIO_INT_CLR_3,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0xC)++0x03 line.long 0x00 "GPIO_MSK_CNF_3,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0xC)++0x03 line.long 0x00 "GPIO_MSK_OE_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0xC)++0x03 line.long 0x00 "GPIO_MSK_OUT_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_3,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_3,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_3,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree.end tree "GPIO 4" tree "Port M" base ad:0x6000D300 ; 0 - GPIO controller number ; 0x0 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x0)++0x03 line.long 0x00 "GPIO_CNF_0,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x0)++0x03 line.long 0x00 "GPIO_OE_0,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x0)++0x03 line.long 0x00 "GPIO_OUT_0,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x0)++0x03 line.long 0x00 "GPIO_IN_0,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "GPIO_INT_STA_0,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x0)++0x03 line.long 0x00 "GPIO_INT_ENB_0,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "GPIO_INT_LVL_0,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "GPIO_INT_CLR_0,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x0)++0x03 line.long 0x00 "GPIO_MSK_CNF_0,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x0)++0x03 line.long 0x00 "GPIO_MSK_OE_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x0)++0x03 line.long 0x00 "GPIO_MSK_OUT_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_0,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_0,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_0,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port N" base ad:0x6000D300 ; 1 - GPIO controller number ; 0x4 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x4)++0x03 line.long 0x00 "GPIO_CNF_1,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x4)++0x03 line.long 0x00 "GPIO_OE_1,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x4)++0x03 line.long 0x00 "GPIO_OUT_1,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x4)++0x03 line.long 0x00 "GPIO_IN_1,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "GPIO_INT_STA_1,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x4)++0x03 line.long 0x00 "GPIO_INT_ENB_1,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "GPIO_INT_LVL_1,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "GPIO_INT_CLR_1,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x4)++0x03 line.long 0x00 "GPIO_MSK_CNF_1,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x4)++0x03 line.long 0x00 "GPIO_MSK_OE_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x4)++0x03 line.long 0x00 "GPIO_MSK_OUT_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_1,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_1,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_1,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port O" base ad:0x6000D300 ; 2 - GPIO controller number ; 0x8 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x8)++0x03 line.long 0x00 "GPIO_CNF_2,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x8)++0x03 line.long 0x00 "GPIO_OE_2,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x8)++0x03 line.long 0x00 "GPIO_OUT_2,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x8)++0x03 line.long 0x00 "GPIO_IN_2,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "GPIO_INT_STA_2,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x8)++0x03 line.long 0x00 "GPIO_INT_ENB_2,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "GPIO_INT_LVL_2,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "GPIO_INT_CLR_2,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x8)++0x03 line.long 0x00 "GPIO_MSK_CNF_2,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x8)++0x03 line.long 0x00 "GPIO_MSK_OE_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x8)++0x03 line.long 0x00 "GPIO_MSK_OUT_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_2,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_2,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_2,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port P" base ad:0x6000D300 ; 3 - GPIO controller number ; 0xC - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0xC)++0x03 line.long 0x00 "GPIO_CNF_3,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0xC)++0x03 line.long 0x00 "GPIO_OE_3,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0xC)++0x03 line.long 0x00 "GPIO_OUT_3,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0xC)++0x03 line.long 0x00 "GPIO_IN_3,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0xC)++0x03 line.long 0x00 "GPIO_INT_STA_3,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0xC)++0x03 line.long 0x00 "GPIO_INT_ENB_3,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0xC)++0x03 line.long 0x00 "GPIO_INT_LVL_3,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0xC)++0x03 line.long 0x00 "GPIO_INT_CLR_3,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0xC)++0x03 line.long 0x00 "GPIO_MSK_CNF_3,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0xC)++0x03 line.long 0x00 "GPIO_MSK_OE_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0xC)++0x03 line.long 0x00 "GPIO_MSK_OUT_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_3,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_3,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_3,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree.end tree "GPIO 5" tree "Port Q" base ad:0x6000D400 ; 0 - GPIO controller number ; 0x0 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x0)++0x03 line.long 0x00 "GPIO_CNF_0,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x0)++0x03 line.long 0x00 "GPIO_OE_0,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x0)++0x03 line.long 0x00 "GPIO_OUT_0,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x0)++0x03 line.long 0x00 "GPIO_IN_0,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "GPIO_INT_STA_0,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x0)++0x03 line.long 0x00 "GPIO_INT_ENB_0,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "GPIO_INT_LVL_0,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "GPIO_INT_CLR_0,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x0)++0x03 line.long 0x00 "GPIO_MSK_CNF_0,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x0)++0x03 line.long 0x00 "GPIO_MSK_OE_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x0)++0x03 line.long 0x00 "GPIO_MSK_OUT_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_0,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_0,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_0,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port R" base ad:0x6000D400 ; 1 - GPIO controller number ; 0x4 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x4)++0x03 line.long 0x00 "GPIO_CNF_1,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x4)++0x03 line.long 0x00 "GPIO_OE_1,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x4)++0x03 line.long 0x00 "GPIO_OUT_1,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x4)++0x03 line.long 0x00 "GPIO_IN_1,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "GPIO_INT_STA_1,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x4)++0x03 line.long 0x00 "GPIO_INT_ENB_1,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "GPIO_INT_LVL_1,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "GPIO_INT_CLR_1,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x4)++0x03 line.long 0x00 "GPIO_MSK_CNF_1,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x4)++0x03 line.long 0x00 "GPIO_MSK_OE_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x4)++0x03 line.long 0x00 "GPIO_MSK_OUT_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_1,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_1,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_1,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port S" base ad:0x6000D400 ; 2 - GPIO controller number ; 0x8 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x8)++0x03 line.long 0x00 "GPIO_CNF_2,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x8)++0x03 line.long 0x00 "GPIO_OE_2,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x8)++0x03 line.long 0x00 "GPIO_OUT_2,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x8)++0x03 line.long 0x00 "GPIO_IN_2,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "GPIO_INT_STA_2,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x8)++0x03 line.long 0x00 "GPIO_INT_ENB_2,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "GPIO_INT_LVL_2,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "GPIO_INT_CLR_2,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x8)++0x03 line.long 0x00 "GPIO_MSK_CNF_2,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x8)++0x03 line.long 0x00 "GPIO_MSK_OE_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x8)++0x03 line.long 0x00 "GPIO_MSK_OUT_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_2,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_2,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_2,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port T" base ad:0x6000D400 ; 3 - GPIO controller number ; 0xC - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0xC)++0x03 line.long 0x00 "GPIO_CNF_3,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0xC)++0x03 line.long 0x00 "GPIO_OE_3,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0xC)++0x03 line.long 0x00 "GPIO_OUT_3,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0xC)++0x03 line.long 0x00 "GPIO_IN_3,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0xC)++0x03 line.long 0x00 "GPIO_INT_STA_3,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0xC)++0x03 line.long 0x00 "GPIO_INT_ENB_3,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0xC)++0x03 line.long 0x00 "GPIO_INT_LVL_3,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0xC)++0x03 line.long 0x00 "GPIO_INT_CLR_3,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0xC)++0x03 line.long 0x00 "GPIO_MSK_CNF_3,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0xC)++0x03 line.long 0x00 "GPIO_MSK_OE_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0xC)++0x03 line.long 0x00 "GPIO_MSK_OUT_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_3,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_3,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_3,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree.end tree "GPIO 6" tree "Port U" base ad:0x6000D500 ; 0 - GPIO controller number ; 0x0 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x0)++0x03 line.long 0x00 "GPIO_CNF_0,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x0)++0x03 line.long 0x00 "GPIO_OE_0,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x0)++0x03 line.long 0x00 "GPIO_OUT_0,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x0)++0x03 line.long 0x00 "GPIO_IN_0,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "GPIO_INT_STA_0,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x0)++0x03 line.long 0x00 "GPIO_INT_ENB_0,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "GPIO_INT_LVL_0,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "GPIO_INT_CLR_0,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x0)++0x03 line.long 0x00 "GPIO_MSK_CNF_0,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x0)++0x03 line.long 0x00 "GPIO_MSK_OE_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x0)++0x03 line.long 0x00 "GPIO_MSK_OUT_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_0,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_0,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_0,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port V" base ad:0x6000D500 ; 1 - GPIO controller number ; 0x4 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x4)++0x03 line.long 0x00 "GPIO_CNF_1,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x4)++0x03 line.long 0x00 "GPIO_OE_1,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x4)++0x03 line.long 0x00 "GPIO_OUT_1,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x4)++0x03 line.long 0x00 "GPIO_IN_1,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "GPIO_INT_STA_1,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x4)++0x03 line.long 0x00 "GPIO_INT_ENB_1,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "GPIO_INT_LVL_1,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "GPIO_INT_CLR_1,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x4)++0x03 line.long 0x00 "GPIO_MSK_CNF_1,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x4)++0x03 line.long 0x00 "GPIO_MSK_OE_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x4)++0x03 line.long 0x00 "GPIO_MSK_OUT_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_1,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_1,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_1,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port W" base ad:0x6000D500 ; 2 - GPIO controller number ; 0x8 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x8)++0x03 line.long 0x00 "GPIO_CNF_2,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x8)++0x03 line.long 0x00 "GPIO_OE_2,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x8)++0x03 line.long 0x00 "GPIO_OUT_2,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x8)++0x03 line.long 0x00 "GPIO_IN_2,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "GPIO_INT_STA_2,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x8)++0x03 line.long 0x00 "GPIO_INT_ENB_2,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "GPIO_INT_LVL_2,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "GPIO_INT_CLR_2,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x8)++0x03 line.long 0x00 "GPIO_MSK_CNF_2,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x8)++0x03 line.long 0x00 "GPIO_MSK_OE_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x8)++0x03 line.long 0x00 "GPIO_MSK_OUT_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_2,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_2,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_2,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port X" base ad:0x6000D500 ; 3 - GPIO controller number ; 0xC - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0xC)++0x03 line.long 0x00 "GPIO_CNF_3,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0xC)++0x03 line.long 0x00 "GPIO_OE_3,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0xC)++0x03 line.long 0x00 "GPIO_OUT_3,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0xC)++0x03 line.long 0x00 "GPIO_IN_3,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0xC)++0x03 line.long 0x00 "GPIO_INT_STA_3,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0xC)++0x03 line.long 0x00 "GPIO_INT_ENB_3,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0xC)++0x03 line.long 0x00 "GPIO_INT_LVL_3,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0xC)++0x03 line.long 0x00 "GPIO_INT_CLR_3,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0xC)++0x03 line.long 0x00 "GPIO_MSK_CNF_3,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0xC)++0x03 line.long 0x00 "GPIO_MSK_OE_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0xC)++0x03 line.long 0x00 "GPIO_MSK_OUT_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_3,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_3,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_3,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree.end tree "GPIO 7" tree "Port Y" base ad:0x6000D600 ; 0 - GPIO controller number ; 0x0 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x0)++0x03 line.long 0x00 "GPIO_CNF_0,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x0)++0x03 line.long 0x00 "GPIO_OE_0,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x0)++0x03 line.long 0x00 "GPIO_OUT_0,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x0)++0x03 line.long 0x00 "GPIO_IN_0,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "GPIO_INT_STA_0,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x0)++0x03 line.long 0x00 "GPIO_INT_ENB_0,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "GPIO_INT_LVL_0,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "GPIO_INT_CLR_0,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x0)++0x03 line.long 0x00 "GPIO_MSK_CNF_0,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x0)++0x03 line.long 0x00 "GPIO_MSK_OE_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x0)++0x03 line.long 0x00 "GPIO_MSK_OUT_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_0,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_0,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_0,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port Z" base ad:0x6000D600 ; 1 - GPIO controller number ; 0x4 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x4)++0x03 line.long 0x00 "GPIO_CNF_1,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x4)++0x03 line.long 0x00 "GPIO_OE_1,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x4)++0x03 line.long 0x00 "GPIO_OUT_1,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x4)++0x03 line.long 0x00 "GPIO_IN_1,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "GPIO_INT_STA_1,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x4)++0x03 line.long 0x00 "GPIO_INT_ENB_1,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "GPIO_INT_LVL_1,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "GPIO_INT_CLR_1,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x4)++0x03 line.long 0x00 "GPIO_MSK_CNF_1,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x4)++0x03 line.long 0x00 "GPIO_MSK_OE_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x4)++0x03 line.long 0x00 "GPIO_MSK_OUT_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_1,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_1,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_1,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port AA" base ad:0x6000D600 ; 2 - GPIO controller number ; 0x8 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x8)++0x03 line.long 0x00 "GPIO_CNF_2,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x8)++0x03 line.long 0x00 "GPIO_OE_2,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x8)++0x03 line.long 0x00 "GPIO_OUT_2,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x8)++0x03 line.long 0x00 "GPIO_IN_2,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "GPIO_INT_STA_2,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x8)++0x03 line.long 0x00 "GPIO_INT_ENB_2,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "GPIO_INT_LVL_2,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "GPIO_INT_CLR_2,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x8)++0x03 line.long 0x00 "GPIO_MSK_CNF_2,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x8)++0x03 line.long 0x00 "GPIO_MSK_OE_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x8)++0x03 line.long 0x00 "GPIO_MSK_OUT_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_2,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_2,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_2,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port BB" base ad:0x6000D600 ; 3 - GPIO controller number ; 0xC - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0xC)++0x03 line.long 0x00 "GPIO_CNF_3,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0xC)++0x03 line.long 0x00 "GPIO_OE_3,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0xC)++0x03 line.long 0x00 "GPIO_OUT_3,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0xC)++0x03 line.long 0x00 "GPIO_IN_3,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0xC)++0x03 line.long 0x00 "GPIO_INT_STA_3,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0xC)++0x03 line.long 0x00 "GPIO_INT_ENB_3,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0xC)++0x03 line.long 0x00 "GPIO_INT_LVL_3,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0xC)++0x03 line.long 0x00 "GPIO_INT_CLR_3,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0xC)++0x03 line.long 0x00 "GPIO_MSK_CNF_3,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0xC)++0x03 line.long 0x00 "GPIO_MSK_OE_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0xC)++0x03 line.long 0x00 "GPIO_MSK_OUT_3,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_3,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_3,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0xC)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_3,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0xC)++0x03 line.long 0x00 "GPIO_DB_CTRL_P3_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree.end tree "GPIO 8" tree "Port CC" base ad:0x6000D700 ; 0 - GPIO controller number ; 0x0 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x0)++0x03 line.long 0x00 "GPIO_CNF_0,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x0)++0x03 line.long 0x00 "GPIO_OE_0,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x0)++0x03 line.long 0x00 "GPIO_OUT_0,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x0)++0x03 line.long 0x00 "GPIO_IN_0,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "GPIO_INT_STA_0,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x0)++0x03 line.long 0x00 "GPIO_INT_ENB_0,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "GPIO_INT_LVL_0,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "GPIO_INT_CLR_0,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x0)++0x03 line.long 0x00 "GPIO_MSK_CNF_0,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x0)++0x03 line.long 0x00 "GPIO_MSK_OE_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x0)++0x03 line.long 0x00 "GPIO_MSK_OUT_0,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_0,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_0,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x0)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_0,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x0)++0x03 line.long 0x00 "GPIO_DB_CTRL_P0_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port DD" base ad:0x6000D700 ; 1 - GPIO controller number ; 0x4 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x4)++0x03 line.long 0x00 "GPIO_CNF_1,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x4)++0x03 line.long 0x00 "GPIO_OE_1,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x4)++0x03 line.long 0x00 "GPIO_OUT_1,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x4)++0x03 line.long 0x00 "GPIO_IN_1,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "GPIO_INT_STA_1,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x4)++0x03 line.long 0x00 "GPIO_INT_ENB_1,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "GPIO_INT_LVL_1,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "GPIO_INT_CLR_1,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x4)++0x03 line.long 0x00 "GPIO_MSK_CNF_1,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x4)++0x03 line.long 0x00 "GPIO_MSK_OE_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x4)++0x03 line.long 0x00 "GPIO_MSK_OUT_1,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_1,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_1,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x4)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_1,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x4)++0x03 line.long 0x00 "GPIO_DB_CTRL_P1_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree "Port EE" base ad:0x6000D700 ; 2 - GPIO controller number ; 0x8 - Address offset width 16. tree.open "Lower offset access (Read-Modify-Write)" group.long (0x00+0x8)++0x03 line.long 0x00 "GPIO_CNF_2,GPIO port configuration register" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 CNF,OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 CNF,OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Pin 7 GPIO or SFIO type" "SFIO,GPIO" bitfld.long 0x00 6. " BIT_6 ,Pin 6 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 5. " BIT_5 ,Pin 5 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 4. " BIT_4 ,Pin 4 GPIO or SFIO mode" "SPIO,GPIO" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO" bitfld.long 0x00 2. " BIT_2 ,Pin 2 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 1. " BIT_1 ,Pin 1 GPIO or SFIO mode" "SPIO,GPIO" bitfld.long 0x00 0. " BIT_0 ,Pin 0 GPIO or SFIO mode" "SPIO,GPIO" group.long (0x10+0x8)++0x03 line.long 0x00 "GPIO_OE_2,GPIO port enable register" bitfld.long 0x00 7. " BIT_7 ,Signal state 7 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 6. " BIT_6 ,Signal state 6 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 5. " BIT_5 ,Signal state 5 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 4. " BIT_4 ,Signal state 4 (GPIO mode only)" "Tri state,Driven" textline " " bitfld.long 0x00 3. " BIT_3 ,Signal state 3 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 2. " BIT_2 ,Signal state 2 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 1. " BIT_1 ,Signal state 1 (GPIO mode only)" "Tri state,Driven" bitfld.long 0x00 0. " BIT_0 ,Signal state 0 (GPIO mode only)" "Tri state,Driven" textline " " group.long (0x20+0x8)++0x03 line.long 0x00 "GPIO_OUT_2,GPIO port output value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 output value 7 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 output value 6 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 4 output value 5 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 output value 4 (GPIO mode and output enabled)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 output value 3 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 output value 2 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 output value 1 (GPIO mode and output enabled)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 output value 0 (GPIO mode and output enabled)" "Low,High" rgroup.long (0x30+0x8)++0x03 line.long 0x00 "GPIO_IN_2,GPIO port input value register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 input value 7 (GPIO mode only)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Pin 6 input value 6 (GPIO mode only)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Pin 5 input value 5 (GPIO mode only)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Pin 4 input value 4 (GPIO mode only)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 input value 3 (GPIO mode only)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Pin 2 input value 2 (GPIO mode only)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Pin 1 input value 1 (GPIO mode only)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Pin 0 input value 0 (GPIO mode only)" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "GPIO_INT_STA_2,GPIO port interrupt status register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt status 7 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt status 6 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt status 5 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt status 4 (GPIO mode and interrupt enabled)" "Not active,Active" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt status 3 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt status 2 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt status 1 (GPIO mode and interrupt enabled)" "Not active,Active" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt status 0 (GPIO mode and interrupt enabled)" "Not active,Active" group.long (0x50+0x8)++0x03 line.long 0x00 "GPIO_INT_ENB_2,GPIO port interrupt enabled register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt enable 7 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt enable 6 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt enable 5 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt enable 4 (GPIO mode only)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt enable 3 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt enable 2 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt enable 1 (GPIO mode only)" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt enable 0 (GPIO mode only)" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "GPIO_INT_LVL_2,GPIO port interrupt activation level register" bitfld.long 0x00 23. " DELTA_7 ,Pin 7 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 22. " DELTA_6 ,Pin 6 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 21. " DELTA_5 ,Pin 5 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 20. " DELTA_4 ,Pin 4 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 19. " DELTA_3 ,Pin 3 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 18. " DELTA_2 ,Pin 2 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 17. " DELTA_1 ,Pin 1 any edge interrupt trigger" "No,Yes" bitfld.long 0x00 16. " DELTA_0 ,Pin 0 any edge interrupt trigger" "No,Yes" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 14. " EDGE_6 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 13. " EDGE_5 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 12. " EDGE_4 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 10. " EDGE_2 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 9. " EDGE_1 ,Configure as edge-triggered interrupt" "Level,Edge" bitfld.long 0x00 8. " EDGE_0 ,Configure as edge-triggered interrupt" "Level,Edge" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt activation level or edge" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt activation level or edge" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt activation level or edge" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "GPIO_INT_CLR_2,GPIO port interrupt flag set-to-clear register" bitfld.long 0x00 7. " BIT_7 ,Pin 7 interrupt clear" "Set,Clear" bitfld.long 0x00 6. " BIT_6 ,Pin 6 interrupt clear" "Set,Clear" bitfld.long 0x00 5. " BIT_5 ,Pin 5 interrupt clear" "Set,Clear" bitfld.long 0x00 4. " BIT_4 ,Pin 4 interrupt clear" "Set,Clear" textline " " bitfld.long 0x00 3. " BIT_3 ,Pin 3 interrupt clear" "Set,Clear" bitfld.long 0x00 2. " BIT_2 ,Pin 2 interrupt clear" "Set,Clear" bitfld.long 0x00 1. " BIT_1 ,Pin 1 interrupt clear" "Set,Clear" bitfld.long 0x00 0. " BIT_0 ,Pin 0 interrupt clear" "Set,Clear" tree.end width 20. tree.open "Upper offset access (Per-Pin Mask Write)" group.long (0x80+0x8)++0x03 line.long 0x00 "GPIO_MSK_CNF_2,Masked primary GPIO/SFIO config register" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 GPIO or SFIO type" "SPIO,GPIO,Set SPIO,Set GPIO" group.long (0x90+0x8)++0x03 line.long 0x00 "GPIO_MSK_OE_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 Signal state" "Tri state,Driven,Set Tri state,Set Driven" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 Signal state" "Tri state,Driven,Set Tri state,Set Driven" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 Signal state" "Tri state,Driven,Set Tri state,Set Driven" group.long (0xA0+0x8)++0x03 line.long 0x00 "GPIO_MSK_OUT_2,GPIO masked output enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 output value" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 output value" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 output value" "Low,High,Set Low,Set High" sif CPUIS("TEGRAX1") group.long (0xB0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 3 Debounce Control Register" bitfld.long 0x00 7. 15. " BIT_7 ,Enable debounce logic for Port 3 pin 7" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,Enable debounce logic for Port 3 pin 6" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,Enable debounce logic for Port 3 pin 5" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,Enable debounce logic for Port 3 pin 4" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable debounce logic for Port 3 pin 3" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,Enable debounce logic for Port 3 pin 2" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,Enable debounce logic for Port 3 pin 1" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,Enable debounce logic for Port 3 pin 0" "Disabled,Enabled,Set Disabled,Set Enabled" endif group.long (0xC0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_STA_2,GPIO masked interrupt status" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt status" "Not active,Active,Disable interrupt,Set interrupt" group.long (0xD0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_ENB_2,GPIO masked interrupt enable" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt enable" "Disabled,Enabled,Disable,Enable" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt enable" "Disabled,Enabled,Disable,Enable" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt enable" "Disabled,Enabled,Disable,Enable" group.long (0xE0+0x8)++0x03 line.long 0x00 "GPIO_MSK_INT_LVL_2,GPIO masked interrupt activation levels" bitfld.long 0x00 7. 15. " BIT_7 ,Pin 7 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 6. 14. " BIT_6 ,Pin 6 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 5. 13. " BIT_5 ,Pin 5 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 4. 12. " BIT_4 ,Pin 4 interrupt activation level" "Low,High,Set low,Set high" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Pin 3 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 2. 10. " BIT_2 ,Pin 2 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 1. 9. " BIT_1 ,Pin 1 interrupt activation level" "Low,High,Set low,Set high" bitfld.long 0x00 0. 8. " BIT_0 ,Pin 0 interrupt activation level" "Low,High,Set low,Set high" sif CPUIS("TEGRAX1") group.long (0xF0+0x8)++0x03 line.long 0x00 "GPIO_DB_CTRL_P2_0,GPIO PORT 0 Debounce Control Register" hexmask.long.byte 0x00 0.--7. 1. " P0_DBC_CNT ,Debounce count in miliseconds" endif tree.end width 0xB tree.end tree.end tree "VGPIO Registers" base ad:0x60024000 width 21. group.long (0x00+0x0)++0x03 "PORT A" line.long 0x00 "LOCK_0,VGPIO Port A Lock Bits" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 OE and OUT" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " RES_7 ,Lock access to pin 7 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 6. " RES_6 ,Lock access to pin 6 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 5. " RES_5 ,Lock access to pin 5 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 4. " RES_4 ,Lock access to pin 4 OE and OUT" "Disabled,Enabled" textline " " rbitfld.long 0x00 3. " RES_3 ,Lock access to pin 3 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 2. " RES_2 ,Lock access to pin 2 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 1. " RES_1 ,Lock access to pin 1 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 0. " RES_0 ,Lock access to pin 0 OE and OUT" "Disabled,Enabled" group.long (0x10+0x0)++0x03 line.long 0x00 "OE_0,VGPIO Port A Output Enable Registers" bitfld.long 0x00 7. " BIT_7 ,ACPI interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,ACPI interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,ACPI interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,ACPI interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,ACPI interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,ACPI interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,ACPI interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,ACPI interrupt for pin 0" "Disabled,Enabled" group.long (0x20+0x0)++0x03 line.long 0x00 "OUT_0,VGPIO Port A Output Value Registers" bitfld.long 0x00 7. " BIT_7 ,Value of pin 7 when it is set to output" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Value of pin 6 when it is set to output" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Value of pin 5 when it is set to output" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Value of pin 4 when it is set to output" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Value of pin 3 when it is set to output" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Value of pin 2 when it is set to output" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Value of pin 1 when it is set to output" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Value of pin 0 when it is set to output" "Low,High" group.long (0x30+0x0)++0x03 line.long 0x00 "IN_0,VGPIO Port A Input Value Registers" bitfld.long 0x00 7. " BIT_7 ,Input value of pin 7" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Input value of pin 6" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Input value of pin 5" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Input value of pin 4" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Input value of pin 3" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Input value of pin 2" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Input value of pin 1" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Input value of pin 0" "Low,High" group.long (0x40+0x0)++0x03 line.long 0x00 "INT_STA_0,VGPIO Port A Interrupt Status Registers" bitfld.long 0x00 7. " BIT_7 ,Interrupt Status of pin 7" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Interrupt Status of pin 6" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Interrupt Status of pin 5" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Interrupt Status of pin 4" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Status of pin 3" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Interrupt Status of pin 2" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Interrupt Status of pin 1" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Interrupt Status of pin 0" "IN_ACTIVE,ACTIVE" group.long (0x50+0x0)++0x03 line.long 0x00 "INT_ENB_0,VGPIO Port A Interrupt Enable Registers" bitfld.long 0x00 7. " BIT_7 ,Enable interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Enable interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Enable interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Enable interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Enable interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Enable interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Enable interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Enable interrupt for pin 0" "Disabled,Enabled" group.long (0x60+0x0)++0x03 line.long 0x00 "INT_LVL_0,VGPIO Port A Interrupt Activation Level Registers" bitfld.long 0x00 23. " DELTA_7 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 22. " DELTA_6 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 21. " DELTA_5 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 20. " DELTA_4 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" textline " " bitfld.long 0x00 19. " DELTA_3 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 18. " DELTA_2 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 17. " DELTA_1 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 16. " DELTA_0 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 14. " EDGE_6 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 13. " EDGE_5 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " EDGE_4 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " EDGE_2 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 9. " EDGE_1 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 8. " EDGE_0 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" wgroup.long (0x70+0x0)++0x03 line.long 0x00 "INT_CLR_0,VGPIO Port A Interrupt (CPU) Flag Set-to-Clear Registers" bitfld.long 0x00 7. " BIT_7 ,Enable interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Enable interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Enable interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Enable interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Enable interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Enable interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Enable interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Enable interrupt for pin 0" "Disabled,Enabled" group.long (0x90+0x0)++0x03 line.long 0x00 "MSK_INT_CLR_0,VGPIO Port A Masked Output Enable" bitfld.long 0x00 7. 15. " BIT_7 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" group.long (0xA0+0x0)++0x03 line.long 0x00 "MSK_OUT_0,VGPIO Port A Masked Output Enable (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Output value mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Output value mask" "Low,High,Set Low,Set High" group.long (0xB0+0x0)++0x03 line.long 0x00 "MSK_IN_0,VGPIO Port A Masked Input Value Register (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Input value mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Input value mask" "Low,High,Set Low,Set High" group.long (0xC0+0x0)++0x03 line.long 0x00 "MSK_INT_STA_0,VGPIO Port A Masked Interrupt Status (Masked Clears)" bitfld.long 0x00 7. 15. " BIT_7 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Interrupt status mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Interrupt status mask" "Low,High,Set Low,Set High" group.long (0xD0+0x0)++0x03 line.long 0x00 "MSK_INT_ENB_0,VGPIO Port A Masked Interrupt Enable (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Enable interrupt mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Enable interrupt mask" "Low,High,Set Low,Set High" rgroup.long (0x100+0x0)++0x03 line.long 0x00 "INT_STA_ACPI_0,VGPIO Port A Interrupt Status Registers" bitfld.long 0x00 7. " BIT_7 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Interrupt Status" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Interrupt Status" "IN_ACTIVE,ACTIVE" wgroup.long (0x110+0x0)++0x03 line.long 0x00 "INT_CLR_ACPI_0,VGPIO Port A Interrupt (ACPI) Flag Set-to-Clear Registers" bitfld.long 0x00 7. " BIT_7 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" group.long (0x180+0x0)++0x03 line.long 0x00 "MSK_INT_STA_ACPI_0,VGPIO Port A Masked Interrupt Status (Masked Clears)" bitfld.long 0x00 7. 15. " BIT_7 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Interrupt Status mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Interrupt Status mask" "Low,High,Set Low,Set High" group.long (0x00+0x4)++0x03 "PORT B" line.long 0x00 "LOCK_1,VGPIO Port B Lock Bits" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 OE and OUT" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " RES_7 ,Lock access to pin 7 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 6. " RES_6 ,Lock access to pin 6 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 5. " RES_5 ,Lock access to pin 5 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 4. " RES_4 ,Lock access to pin 4 OE and OUT" "Disabled,Enabled" textline " " rbitfld.long 0x00 3. " RES_3 ,Lock access to pin 3 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 2. " RES_2 ,Lock access to pin 2 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 1. " RES_1 ,Lock access to pin 1 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 0. " RES_0 ,Lock access to pin 0 OE and OUT" "Disabled,Enabled" group.long (0x10+0x4)++0x03 line.long 0x00 "OE_1,VGPIO Port B Output Enable Registers" bitfld.long 0x00 7. " BIT_7 ,ACPI interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,ACPI interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,ACPI interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,ACPI interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,ACPI interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,ACPI interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,ACPI interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,ACPI interrupt for pin 0" "Disabled,Enabled" group.long (0x20+0x4)++0x03 line.long 0x00 "OUT_1,VGPIO Port B Output Value Registers" bitfld.long 0x00 7. " BIT_7 ,Value of pin 7 when it is set to output" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Value of pin 6 when it is set to output" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Value of pin 5 when it is set to output" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Value of pin 4 when it is set to output" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Value of pin 3 when it is set to output" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Value of pin 2 when it is set to output" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Value of pin 1 when it is set to output" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Value of pin 0 when it is set to output" "Low,High" group.long (0x30+0x4)++0x03 line.long 0x00 "IN_1,VGPIO Port B Input Value Registers" bitfld.long 0x00 7. " BIT_7 ,Input value of pin 7" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Input value of pin 6" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Input value of pin 5" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Input value of pin 4" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Input value of pin 3" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Input value of pin 2" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Input value of pin 1" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Input value of pin 0" "Low,High" group.long (0x40+0x4)++0x03 line.long 0x00 "INT_STA_1,VGPIO Port B Interrupt Status Registers" bitfld.long 0x00 7. " BIT_7 ,Interrupt Status of pin 7" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Interrupt Status of pin 6" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Interrupt Status of pin 5" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Interrupt Status of pin 4" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Status of pin 3" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Interrupt Status of pin 2" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Interrupt Status of pin 1" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Interrupt Status of pin 0" "IN_ACTIVE,ACTIVE" group.long (0x50+0x4)++0x03 line.long 0x00 "INT_ENB_1,VGPIO Port B Interrupt Enable Registers" bitfld.long 0x00 7. " BIT_7 ,Enable interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Enable interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Enable interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Enable interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Enable interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Enable interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Enable interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Enable interrupt for pin 0" "Disabled,Enabled" group.long (0x60+0x4)++0x03 line.long 0x00 "INT_LVL_1,VGPIO Port B Interrupt Activation Level Registers" bitfld.long 0x00 23. " DELTA_7 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 22. " DELTA_6 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 21. " DELTA_5 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 20. " DELTA_4 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" textline " " bitfld.long 0x00 19. " DELTA_3 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 18. " DELTA_2 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 17. " DELTA_1 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 16. " DELTA_0 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 14. " EDGE_6 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 13. " EDGE_5 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " EDGE_4 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " EDGE_2 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 9. " EDGE_1 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 8. " EDGE_0 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" wgroup.long (0x70+0x4)++0x03 line.long 0x00 "INT_CLR_1,VGPIO Port B Interrupt (CPU) Flag Set-to-Clear Registers" bitfld.long 0x00 7. " BIT_7 ,Enable interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Enable interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Enable interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Enable interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Enable interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Enable interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Enable interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Enable interrupt for pin 0" "Disabled,Enabled" group.long (0x90+0x4)++0x03 line.long 0x00 "MSK_INT_CLR_1,VGPIO Port B Masked Output Enable" bitfld.long 0x00 7. 15. " BIT_7 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" group.long (0xA0+0x4)++0x03 line.long 0x00 "MSK_OUT_1,VGPIO Port B Masked Output Enable (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Output value mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Output value mask" "Low,High,Set Low,Set High" group.long (0xB0+0x4)++0x03 line.long 0x00 "MSK_IN_1,VGPIO Port B Masked Input Value Register (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Input value mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Input value mask" "Low,High,Set Low,Set High" group.long (0xC0+0x4)++0x03 line.long 0x00 "MSK_INT_STA_1,VGPIO Port B Masked Interrupt Status (Masked Clears)" bitfld.long 0x00 7. 15. " BIT_7 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Interrupt status mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Interrupt status mask" "Low,High,Set Low,Set High" group.long (0xD0+0x4)++0x03 line.long 0x00 "MSK_INT_ENB_1,VGPIO Port B Masked Interrupt Enable (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Enable interrupt mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Enable interrupt mask" "Low,High,Set Low,Set High" rgroup.long (0x100+0x4)++0x03 line.long 0x00 "INT_STA_ACPI_1,VGPIO Port B Interrupt Status Registers" bitfld.long 0x00 7. " BIT_7 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Interrupt Status" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Interrupt Status" "IN_ACTIVE,ACTIVE" wgroup.long (0x110+0x4)++0x03 line.long 0x00 "INT_CLR_ACPI_1,VGPIO Port B Interrupt (ACPI) Flag Set-to-Clear Registers" bitfld.long 0x00 7. " BIT_7 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" group.long (0x180+0x4)++0x03 line.long 0x00 "MSK_INT_STA_ACPI_1,VGPIO Port B Masked Interrupt Status (Masked Clears)" bitfld.long 0x00 7. 15. " BIT_7 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Interrupt Status mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Interrupt Status mask" "Low,High,Set Low,Set High" group.long (0x00+0x8)++0x03 "PORT C" line.long 0x00 "LOCK_2,VGPIO Port C Lock Bits" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 OE and OUT" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " RES_7 ,Lock access to pin 7 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 6. " RES_6 ,Lock access to pin 6 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 5. " RES_5 ,Lock access to pin 5 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 4. " RES_4 ,Lock access to pin 4 OE and OUT" "Disabled,Enabled" textline " " rbitfld.long 0x00 3. " RES_3 ,Lock access to pin 3 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 2. " RES_2 ,Lock access to pin 2 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 1. " RES_1 ,Lock access to pin 1 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 0. " RES_0 ,Lock access to pin 0 OE and OUT" "Disabled,Enabled" group.long (0x10+0x8)++0x03 line.long 0x00 "OE_2,VGPIO Port C Output Enable Registers" bitfld.long 0x00 7. " BIT_7 ,ACPI interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,ACPI interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,ACPI interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,ACPI interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,ACPI interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,ACPI interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,ACPI interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,ACPI interrupt for pin 0" "Disabled,Enabled" group.long (0x20+0x8)++0x03 line.long 0x00 "OUT_2,VGPIO Port C Output Value Registers" bitfld.long 0x00 7. " BIT_7 ,Value of pin 7 when it is set to output" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Value of pin 6 when it is set to output" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Value of pin 5 when it is set to output" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Value of pin 4 when it is set to output" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Value of pin 3 when it is set to output" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Value of pin 2 when it is set to output" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Value of pin 1 when it is set to output" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Value of pin 0 when it is set to output" "Low,High" group.long (0x30+0x8)++0x03 line.long 0x00 "IN_2,VGPIO Port C Input Value Registers" bitfld.long 0x00 7. " BIT_7 ,Input value of pin 7" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Input value of pin 6" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Input value of pin 5" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Input value of pin 4" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Input value of pin 3" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Input value of pin 2" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Input value of pin 1" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Input value of pin 0" "Low,High" group.long (0x40+0x8)++0x03 line.long 0x00 "INT_STA_2,VGPIO Port C Interrupt Status Registers" bitfld.long 0x00 7. " BIT_7 ,Interrupt Status of pin 7" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Interrupt Status of pin 6" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Interrupt Status of pin 5" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Interrupt Status of pin 4" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Status of pin 3" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Interrupt Status of pin 2" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Interrupt Status of pin 1" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Interrupt Status of pin 0" "IN_ACTIVE,ACTIVE" group.long (0x50+0x8)++0x03 line.long 0x00 "INT_ENB_2,VGPIO Port C Interrupt Enable Registers" bitfld.long 0x00 7. " BIT_7 ,Enable interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Enable interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Enable interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Enable interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Enable interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Enable interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Enable interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Enable interrupt for pin 0" "Disabled,Enabled" group.long (0x60+0x8)++0x03 line.long 0x00 "INT_LVL_2,VGPIO Port C Interrupt Activation Level Registers" bitfld.long 0x00 23. " DELTA_7 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 22. " DELTA_6 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 21. " DELTA_5 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 20. " DELTA_4 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" textline " " bitfld.long 0x00 19. " DELTA_3 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 18. " DELTA_2 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 17. " DELTA_1 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 16. " DELTA_0 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 14. " EDGE_6 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 13. " EDGE_5 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " EDGE_4 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " EDGE_2 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 9. " EDGE_1 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 8. " EDGE_0 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" wgroup.long (0x70+0x8)++0x03 line.long 0x00 "INT_CLR_2,VGPIO Port C Interrupt (CPU) Flag Set-to-Clear Registers" bitfld.long 0x00 7. " BIT_7 ,Enable interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Enable interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Enable interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Enable interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Enable interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Enable interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Enable interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Enable interrupt for pin 0" "Disabled,Enabled" group.long (0x90+0x8)++0x03 line.long 0x00 "MSK_INT_CLR_2,VGPIO Port C Masked Output Enable" bitfld.long 0x00 7. 15. " BIT_7 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" group.long (0xA0+0x8)++0x03 line.long 0x00 "MSK_OUT_2,VGPIO Port C Masked Output Enable (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Output value mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Output value mask" "Low,High,Set Low,Set High" group.long (0xB0+0x8)++0x03 line.long 0x00 "MSK_IN_2,VGPIO Port C Masked Input Value Register (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Input value mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Input value mask" "Low,High,Set Low,Set High" group.long (0xC0+0x8)++0x03 line.long 0x00 "MSK_INT_STA_2,VGPIO Port C Masked Interrupt Status (Masked Clears)" bitfld.long 0x00 7. 15. " BIT_7 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Interrupt status mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Interrupt status mask" "Low,High,Set Low,Set High" group.long (0xD0+0x8)++0x03 line.long 0x00 "MSK_INT_ENB_2,VGPIO Port C Masked Interrupt Enable (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Enable interrupt mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Enable interrupt mask" "Low,High,Set Low,Set High" rgroup.long (0x100+0x8)++0x03 line.long 0x00 "INT_STA_ACPI_2,VGPIO Port C Interrupt Status Registers" bitfld.long 0x00 7. " BIT_7 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Interrupt Status" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Interrupt Status" "IN_ACTIVE,ACTIVE" wgroup.long (0x110+0x8)++0x03 line.long 0x00 "INT_CLR_ACPI_2,VGPIO Port C Interrupt (ACPI) Flag Set-to-Clear Registers" bitfld.long 0x00 7. " BIT_7 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" group.long (0x180+0x8)++0x03 line.long 0x00 "MSK_INT_STA_ACPI_2,VGPIO Port C Masked Interrupt Status (Masked Clears)" bitfld.long 0x00 7. 15. " BIT_7 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Interrupt Status mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Interrupt Status mask" "Low,High,Set Low,Set High" group.long (0x00+0xC)++0x03 "PORT D" line.long 0x00 "LOCK_3,VGPIO Port D Lock Bits" bitfld.long 0x00 15. " LOCK_7 ,Lock access to pin 7 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 14. " LOCK_6 ,Lock access to pin 6 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 13. " LOCK_5 ,Lock access to pin 5 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 12. " LOCK_4 ,Lock access to pin 4 OE and OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LOCK_3 ,Lock access to pin 3 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 10. " LOCK_2 ,Lock access to pin 2 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 9. " LOCK_1 ,Lock access to pin 1 OE and OUT" "Disabled,Enabled" bitfld.long 0x00 8. " LOCK_0 ,Lock access to pin 0 OE and OUT" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " RES_7 ,Lock access to pin 7 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 6. " RES_6 ,Lock access to pin 6 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 5. " RES_5 ,Lock access to pin 5 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 4. " RES_4 ,Lock access to pin 4 OE and OUT" "Disabled,Enabled" textline " " rbitfld.long 0x00 3. " RES_3 ,Lock access to pin 3 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 2. " RES_2 ,Lock access to pin 2 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 1. " RES_1 ,Lock access to pin 1 OE and OUT" "Disabled,Enabled" rbitfld.long 0x00 0. " RES_0 ,Lock access to pin 0 OE and OUT" "Disabled,Enabled" group.long (0x10+0xC)++0x03 line.long 0x00 "OE_3,VGPIO Port D Output Enable Registers" bitfld.long 0x00 7. " BIT_7 ,ACPI interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,ACPI interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,ACPI interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,ACPI interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,ACPI interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,ACPI interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,ACPI interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,ACPI interrupt for pin 0" "Disabled,Enabled" group.long (0x20+0xC)++0x03 line.long 0x00 "OUT_3,VGPIO Port D Output Value Registers" bitfld.long 0x00 7. " BIT_7 ,Value of pin 7 when it is set to output" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Value of pin 6 when it is set to output" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Value of pin 5 when it is set to output" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Value of pin 4 when it is set to output" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Value of pin 3 when it is set to output" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Value of pin 2 when it is set to output" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Value of pin 1 when it is set to output" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Value of pin 0 when it is set to output" "Low,High" group.long (0x30+0xC)++0x03 line.long 0x00 "IN_3,VGPIO Port D Input Value Registers" bitfld.long 0x00 7. " BIT_7 ,Input value of pin 7" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Input value of pin 6" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Input value of pin 5" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Input value of pin 4" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Input value of pin 3" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Input value of pin 2" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Input value of pin 1" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Input value of pin 0" "Low,High" group.long (0x40+0xC)++0x03 line.long 0x00 "INT_STA_3,VGPIO Port D Interrupt Status Registers" bitfld.long 0x00 7. " BIT_7 ,Interrupt Status of pin 7" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Interrupt Status of pin 6" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Interrupt Status of pin 5" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Interrupt Status of pin 4" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Status of pin 3" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Interrupt Status of pin 2" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Interrupt Status of pin 1" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Interrupt Status of pin 0" "IN_ACTIVE,ACTIVE" group.long (0x50+0xC)++0x03 line.long 0x00 "INT_ENB_3,VGPIO Port D Interrupt Enable Registers" bitfld.long 0x00 7. " BIT_7 ,Enable interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Enable interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Enable interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Enable interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Enable interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Enable interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Enable interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Enable interrupt for pin 0" "Disabled,Enabled" group.long (0x60+0xC)++0x03 line.long 0x00 "INT_LVL_3,VGPIO Port D Interrupt Activation Level Registers" bitfld.long 0x00 23. " DELTA_7 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 22. " DELTA_6 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 21. " DELTA_5 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 20. " DELTA_4 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" textline " " bitfld.long 0x00 19. " DELTA_3 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 18. " DELTA_2 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 17. " DELTA_1 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" bitfld.long 0x00 16. " DELTA_0 ,Trigger Interrupt on ANY change of input if EDGE is TRUE or FALSE" "FALSE,TRUE" textline " " bitfld.long 0x00 15. " EDGE_7 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 14. " EDGE_6 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 13. " EDGE_5 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " EDGE_4 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EDGE_3 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " EDGE_2 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 9. " EDGE_1 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" bitfld.long 0x00 8. " EDGE_0 ,Configure as Edge-Triggered Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BIT_7 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 6. " BIT_6 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 5. " BIT_5 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 4. " BIT_4 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 2. " BIT_2 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 1. " BIT_1 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" bitfld.long 0x00 0. " BIT_0 ,Interrupt Activation Level or Edge (HIGH for High level or Rising Edge)" "Low,High" wgroup.long (0x70+0xC)++0x03 line.long 0x00 "INT_CLR_3,VGPIO Port D Interrupt (CPU) Flag Set-to-Clear Registers" bitfld.long 0x00 7. " BIT_7 ,Enable interrupt for pin 7" "Disabled,Enabled" bitfld.long 0x00 6. " BIT_6 ,Enable interrupt for pin 6" "Disabled,Enabled" bitfld.long 0x00 5. " BIT_5 ,Enable interrupt for pin 5" "Disabled,Enabled" bitfld.long 0x00 4. " BIT_4 ,Enable interrupt for pin 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BIT_3 ,Enable interrupt for pin 3" "Disabled,Enabled" bitfld.long 0x00 2. " BIT_2 ,Enable interrupt for pin 2" "Disabled,Enabled" bitfld.long 0x00 1. " BIT_1 ,Enable interrupt for pin 1" "Disabled,Enabled" bitfld.long 0x00 0. " BIT_0 ,Enable interrupt for pin 0" "Disabled,Enabled" group.long (0x90+0xC)++0x03 line.long 0x00 "MSK_INT_CLR_3,VGPIO Port D Masked Output Enable" bitfld.long 0x00 7. 15. " BIT_7 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 6. 14. " BIT_6 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 5. 13. " BIT_5 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 4. 12. " BIT_4 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 2. 10. " BIT_2 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 1. 9. " BIT_1 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" bitfld.long 0x00 0. 8. " BIT_0 ,ACPI interrupt" "Disabled,Enabled,Set Disabled,Set Enabled" group.long (0xA0+0xC)++0x03 line.long 0x00 "MSK_OUT_3,VGPIO Port D Masked Output Enable (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Output value mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Output value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Output value mask" "Low,High,Set Low,Set High" group.long (0xB0+0xC)++0x03 line.long 0x00 "MSK_IN_3,VGPIO Port D Masked Input Value Register (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Input value mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Input value mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Input value mask" "Low,High,Set Low,Set High" group.long (0xC0+0xC)++0x03 line.long 0x00 "MSK_INT_STA_3,VGPIO Port D Masked Interrupt Status (Masked Clears)" bitfld.long 0x00 7. 15. " BIT_7 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Interrupt status mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Interrupt status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Interrupt status mask" "Low,High,Set Low,Set High" group.long (0xD0+0xC)++0x03 line.long 0x00 "MSK_INT_ENB_3,VGPIO Port D Masked Interrupt Enable (Masked Writes)" bitfld.long 0x00 7. 15. " BIT_7 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Enable interrupt mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Enable interrupt mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Enable interrupt mask" "Low,High,Set Low,Set High" rgroup.long (0x100+0xC)++0x03 line.long 0x00 "INT_STA_ACPI_3,VGPIO Port D Interrupt Status Registers" bitfld.long 0x00 7. " BIT_7 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Interrupt Status" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Interrupt Status" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Interrupt Status" "IN_ACTIVE,ACTIVE" wgroup.long (0x110+0xC)++0x03 line.long 0x00 "INT_CLR_ACPI_3,VGPIO Port D Interrupt (ACPI) Flag Set-to-Clear Registers" bitfld.long 0x00 7. " BIT_7 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 6. " BIT_6 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 5. " BIT_5 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 4. " BIT_4 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" textline " " bitfld.long 0x00 3. " BIT_3 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 2. " BIT_2 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 1. " BIT_1 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" bitfld.long 0x00 0. " BIT_0 ,Clear Interrupt" "IN_ACTIVE,ACTIVE" group.long (0x180+0xC)++0x03 line.long 0x00 "MSK_INT_STA_ACPI_3,VGPIO Port D Masked Interrupt Status (Masked Clears)" bitfld.long 0x00 7. 15. " BIT_7 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 6. 14. " BIT_6 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 5. 13. " BIT_5 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 4. 12. " BIT_4 ,Interrupt Status mask" "Low,High,Set Low,Set High" textline " " bitfld.long 0x00 3. 11. " BIT_3 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 2. 10. " BIT_2 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 1. 9. " BIT_1 ,Interrupt Status mask" "Low,High,Set Low,Set High" bitfld.long 0x00 0. 8. " BIT_0 ,Interrupt Status mask" "Low,High,Set Low,Set High" width 0x0B tree.end tree "Pinmux Registers" base ad:0x70003000 width 19. group.long (0x3000+0x0)++0x33 line.long 0x00 "SDMMC1_CLK_0,SDMMC1_CLK_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "SDMMC1,?..." group.long (0x3000+0x4)++0x33 line.long 0x00 "SDMMC1_CMD_0,SDMMC1_CMD_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "SDMMC1,?..." group.long (0x3000+0x8)++0x33 line.long 0x00 "SDMMC1_DAT3_0,SDMMC1_DAT3_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "SDMMC1,?..." group.long (0x3000+0xC)++0x33 line.long 0x00 "SDMMC1_DAT2_0,SDMMC1_DAT2_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "SDMMC1,?..." group.long (0x3000+0x10)++0x33 line.long 0x00 "SDMMC1_DAT1_0,SDMMC1_DAT1_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "SDMMC1,?..." group.long (0x3000+0x14)++0x33 line.long 0x00 "SDMMC1_DAT0_0,SDMMC1_DAT0_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "SDMMC1,?..." group.long (0x3000+0x1C)++0x33 line.long 0x1C "SDMMC3_CLK_0,SDMMC3_CLK_0 Controller" bitfld.long 0x1C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "SDMMC3,?..." group.long (0x3000+0x20)++0x33 line.long 0x1C "SDMMC3_CMD_0,SDMMC3_CLK_0 Controller" bitfld.long 0x1C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "SDMMC3,?..." group.long (0x3000+0x24)++0x33 line.long 0x1C "SDMMC3_DAT0_0,SDMMC3_CLK_0 Controller" bitfld.long 0x1C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "SDMMC3,?..." group.long (0x3000+0x28)++0x33 line.long 0x1C "SDMMC3_DAT1_0,SDMMC3_CLK_0 Controller" bitfld.long 0x1C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "SDMMC3,?..." group.long (0x3000+0x2C)++0x33 line.long 0x1C "SDMMC3_DAT2_0,SDMMC3_CLK_0 Controller" bitfld.long 0x1C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "SDMMC3,?..." group.long (0x3000+0x30)++0x33 line.long 0x1C "SDMMC3_DAT3_0,SDMMC3_CLK_0 Controller" bitfld.long 0x1C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "SDMMC3,?..." group.long 0x3038++0x67 line.long 0x00 "PEX_L0_RST_N_0,PEX_L0_RST_N_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "PE0,?..." line.long 0x04 "PEX_L0_CLKREQ_N_0,PEX_L0_CLKREQ_N_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "PE0,?..." line.long 0x08 "PEX_WAKE_N_0,PEX_WAKE_N_0 Controller" bitfld.long 0x08 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x08 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x08 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x08 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x08 0.--1. " PM ,PM control" "PE,?..." line.long 0x0C "PEX_L1_RST_N_0,PEX_L1_RST_N_0 Controller" bitfld.long 0x0C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x0C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x0C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x0C 0.--1. " PM ,PM control" "PE1,?..." line.long 0x10 "PEX_L1_CLKREQ_N_0,PEX_L1_CLKREQ_N_0 Controller" bitfld.long 0x10 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x10 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x10 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x10 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x10 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x10 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x10 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x10 0.--1. " PM ,PM control" "PE1,?..." line.long 0x14 "SATA_LED_ACTIVE_0,SATA_LED_ACTIVE_0 Controller" bitfld.long 0x14 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x14 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x14 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x14 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x14 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x14 0.--1. " PM ,PM control" "SATA,?..." line.long 0x18 "SPI1_MOSI_0,SPI1_MOSI_0 Controller" bitfld.long 0x18 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x18 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x18 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x18 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x18 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x18 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x18 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x18 0.--1. " PM ,PM control" "SPI1,?..." line.long 0x1C "SPI1_MISO_0,SPI1_MISO_0 Controller" bitfld.long 0x1C 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x1C 0.--1. " PM ,PM control" "SPI1,?..." line.long 0x20 "SPI1_SCK_0,SPI1_SCK_0 Controller" bitfld.long 0x20 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x20 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x20 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x20 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x20 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x20 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x20 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x20 0.--1. " PM ,PM control" "SPI1,?..." line.long 0x24 "SPI1_CS0_0,SPI1_CS0_0 Controller" bitfld.long 0x24 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x24 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x24 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x24 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x24 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x24 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x24 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x24 0.--1. " PM ,PM control" "SPI1,?..." line.long 0x28 "SPI1_CS1_0,SPI1_CS1_0 Controller" bitfld.long 0x28 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x28 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x28 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x28 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x28 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x28 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x28 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x28 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x28 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x28 0.--1. " PM ,PM control" "SPI1,?..." line.long 0x2C "SPI2_MOSI_0,SPI2_MOSI_0 Controller" bitfld.long 0x2C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x2C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x2C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x2C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x2C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x2C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x2C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x2C 0.--1. " PM ,PM control" "SPI2,DTV,?..." line.long 0x30 "SPI2_MISO_0,SPI2_MISO_0 Controller" bitfld.long 0x30 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x30 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x30 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x30 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x30 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x30 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x30 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x30 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x30 0.--1. " PM ,PM control" "SPI2,DTV,?..." line.long 0x34 "SPI2_SCK_0,SPI2_SCK_0 Controller" bitfld.long 0x34 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x34 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x34 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x34 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x34 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x34 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x34 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x34 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x34 0.--1. " PM ,PM control" "SPI2,DTV,?..." line.long 0x38 "SPI2_CS0_0,SPI2_CS0_0 Controller" bitfld.long 0x38 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x38 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x38 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x38 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x38 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x38 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x38 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x38 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x38 0.--1. " PM ,PM control" "SPI2,DTV,?..." line.long 0x3C "SPI2_CS1_0,SPI2_CS1_0 Controller" bitfld.long 0x3C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x3C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x3C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x3C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x3C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x3C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x3C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x3C 0.--1. " PM ,PM control" "SPI2,?..." line.long 0x40 "SPI4_MOSI_0,SPI4_MOSI_0 Controller" bitfld.long 0x40 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x40 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x40 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x40 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x40 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x40 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x40 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x40 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x40 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x40 0.--1. " PM ,PM control" "SPI4,?..." line.long 0x44 "SPI4_MISO_0,SPI4_MISO_0 Controller" bitfld.long 0x44 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x44 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x44 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x44 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x44 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x44 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x44 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x44 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x44 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x44 0.--1. " PM ,PM control" "SPI4,?..." line.long 0x48 "SPI4_SCK_0,SPI4_SCK_0 Controller" bitfld.long 0x48 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x48 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x48 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x48 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x48 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x48 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x48 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x48 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x48 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x48 0.--1. " PM ,PM control" "SPI4,?..." line.long 0x4C "SPI4_CS0_0,SPI4_CS0_0 Controller" bitfld.long 0x4C 15. " E_PREEMP ,E_PREEMP interrupt enable" "Disabled,Enabled" bitfld.long 0x4C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x4C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" bitfld.long 0x4C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x4C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x4C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x4C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." textline " " bitfld.long 0x4C 0.--1. " PM ,PM control" "SPI4,?..." line.long 0x50 "QSPI_SCK_0,QSPI_SCK_0 Controller" bitfld.long 0x50 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x50 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x50 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x50 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x50 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x50 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x50 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x50 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x50 0.--1. " PM ,PM control" "QSPI,?..." line.long 0x54 "QSPI_CS_N_0,QSPI_CS_N_0 Controller" bitfld.long 0x54 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x54 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x54 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x54 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x54 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x54 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x54 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x54 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x54 0.--1. " PM ,PM control" "QSPI,?..." line.long 0x58 "QSPI_IO0_0,QSPI_IO0_0 Controller" bitfld.long 0x58 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x58 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x58 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x58 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x58 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x58 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x58 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x58 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x58 0.--1. " PM ,PM control" "QSPI,?..." line.long 0x5C "QSPI_IO1_0,QSPI_IO1_0 Controller" bitfld.long 0x5C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x5C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x5C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x5C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x5C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x5C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x5C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x5C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x5C 0.--1. " PM ,PM control" "QSPI,?..." line.long 0x60 "QSPI_IO2_0,QSPI_IO2_0 Controller" bitfld.long 0x60 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x60 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x60 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x60 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x60 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x60 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x60 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x60 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x60 0.--1. " PM ,PM control" "QSPI,?..." line.long 0x64 "QSPI_IO3_0,QSPI_IO3_0 Controller" bitfld.long 0x64 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x64 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x64 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x64 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x64 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x64 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x64 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x64 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x64 0.--1. " PM ,PM control" "QSPI,?..." group.long 0x30A4++0x07 line.long 0x00 "DMIC1_CLK_0,DMIC1_CLK_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "DMIC1,I2S3,?..." line.long 0x04 "DMIC1_DAT_0,DMIC1_DAT_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "DMIC1,I2S3,?..." group.long 0x30AC++0x07 line.long 0x00 "DMIC2_CLK_0,DMIC2_CLK_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "DMIC2,I2S3,?..." line.long 0x04 "DMIC2_DAT_0,DMIC2_DAT_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "DMIC2,I2S3,?..." group.long 0x30B4++0x07 line.long 0x00 "DMIC3_CLK_0,DMIC3_CLK_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "DMIC3,I2S5A,?..." line.long 0x04 "DMIC3_DAT_0,DMIC3_DAT_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "DMIC3,I2S5A,?..." group.long 0x30BC++0x27 line.long 0x00 "GEN1_I2C_SCL_0,GEN1_I2C_SCL_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "I2C1,?..." line.long 0x04 "GEN1_I2C_SDA_0,GEN1_I2C_SDA_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "I2C1,?..." textline " " line.long 0x08 "GEN2_I2C_SCL_0,GEN2_I2C_SCL_0 Controller" bitfld.long 0x08 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x08 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x08 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x08 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x08 0.--1. " PM ,PM control" "I2C2,?..." line.long 0x0C "GEN2_I2C_SDA_0,GEN2_I2C_SDA_0 Controller" bitfld.long 0x0C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x0C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x0C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x0C 0.--1. " PM ,PM control" "I2C2,?..." textline " " line.long 0x10 "GEN3_I2C_SCL_0,GEN3_I2C_SCL_0 Controller" bitfld.long 0x10 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x10 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x10 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x10 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x10 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x10 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x10 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x10 0.--1. " PM ,PM control" "I2C3,?..." line.long 0x14 "GEN3_I2C_SDA_0,GEN3_I2C_SDA_0 Controller" bitfld.long 0x14 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x14 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x14 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x14 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x14 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x14 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x14 0.--1. " PM ,PM control" "I2C3,?..." line.long 0x18 "CAM_I2C_SCL_0,CAM_I2C_SCL_0 Controller" bitfld.long 0x18 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x18 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x18 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x18 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x18 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x18 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x18 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x18 0.--1. " PM ,PM control" "I2C3,I2CVI,?..." line.long 0x1C "CAM_I2C_SDA_0,CAM_I2C_SDA_0 Controller" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "I2C3,I2CVI,?..." line.long 0x20 "PWR_I2C_SCL_0,PWR_I2C_SCL_0 Controller" bitfld.long 0x20 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x20 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x20 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x20 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x20 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x20 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x20 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x20 0.--1. " PM ,PM control" "I2CPMU,?..." line.long 0x24 "PWR_I2C_SDA_0,PWR_I2C_SDA_0 Controller" bitfld.long 0x24 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x24 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x24 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x24 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x24 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x24 0.--1. " PM ,PM control" "I2CPMU,?..." group.long 0x30E4++0x0F line.long 0x00 "UART1_TX_0,UART1_TX_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "UARTA,?..." line.long 0x04 "UART1_RX_0,UART1_RX_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "UARTA,?..." line.long 0x08 "UART1_RTS_0,UART1_RTS_0 Controller" bitfld.long 0x08 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x08 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x08 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x08 0.--1. " PM ,PM control" "UARTA,?..." line.long 0x0C "UART1_CTS_0,UART1_CTS_0 Controller" bitfld.long 0x0C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x0C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x0C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x0C 0.--1. " PM ,PM control" "UARTA,?..." group.long 0x30F4++0x0F line.long 0x00 "UART2_TX_0,UART2_TX_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "UARTB,I2S4A,SPDIF,UART" line.long 0x04 "UART2_RX_0,UART2_RX_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "UARTB,I2S4A,SPDIF,UART" line.long 0x08 "UART2_RTS_0,UART2_RTS_0 Controller" bitfld.long 0x08 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x08 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x08 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x08 0.--1. " PM ,PM control" "UARTB,I2S4A,,UART" line.long 0x0C "UART2_CTS_0,UART2_CTS_0 Controller" bitfld.long 0x0C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x0C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x0C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x0C 0.--1. " PM ,PM control" "UARTB,I2S4A,,UART" group.long 0x3104++0x0F line.long 0x00 "UART3_TX_0,UART3_TX_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "UARTC,SPI4,?..." line.long 0x04 "UART3_RX_0,UART3_RX_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "UARTC,SPI4,?..." line.long 0x08 "UART3_RTS_0,UART3_RTS_0 Controller" bitfld.long 0x08 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x08 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x08 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x08 0.--1. " PM ,PM control" "UARTC,SPI4,?..." line.long 0x0C "UART3_CTS_0,UART3_CTS_0 Controller" bitfld.long 0x0C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x0C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x0C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x0C 0.--1. " PM ,PM control" "UARTC,SPI4,?..." group.long 0x3114++0x0F line.long 0x00 "UART4_TX_0,UART4_TX_0 Controller" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "UARTD,UART,?..." line.long 0x04 "UART4_RX_0,UART4_RX_0 Controller" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "UARTD,UART,?..." line.long 0x08 "UART4_RTS_0,UART4_RTS_0 Controller" bitfld.long 0x08 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x08 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x08 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x08 0.--1. " PM ,PM control" "UARTD,UART,?..." line.long 0x0C "UART4_CTS_0,UART4_CTS_0 Controller" bitfld.long 0x0C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x0C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x0C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x0C 0.--1. " PM ,PM control" "UARTD,UART,?..." group.long 0x3124++0x12F line.long 0x00 "DAP1_FS_0,DAP1_FS_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "I2S1,?..." line.long 0x04 "DAP1_DIN_0,DAP1_DIN_0 Controller" bitfld.long 0x04 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "I2S1,?..." line.long 0x08 "DAP1_DOUT_0,DAP1_DOUT_0 Controller" bitfld.long 0x08 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x08 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x08 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x08 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x08 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x08 0.--1. " PM ,PM control" "I2S1,?..." line.long 0x0C "DAP1_SCLK_0,DAP1_SCLK_0 Controller" bitfld.long 0x0C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x0C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x0C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x0C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x0C 0.--1. " PM ,PM control" "I2S1,?..." line.long 0x10 "DAP2_FS_0,DAP2_FS_0 Controller" bitfld.long 0x10 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x10 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x10 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x10 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x10 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x10 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x10 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x10 0.--1. " PM ,PM control" "I2S2,?..." line.long 0x14 "DAP2_DIN_0,DAP2_DIN_0 Controller" bitfld.long 0x14 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x14 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x14 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x14 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x14 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x14 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x14 0.--1. " PM ,PM control" "I2S2,?..." line.long 0x18 "DAP2_DOUT_0,DAP2_DOUT_0 Controller" bitfld.long 0x18 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x18 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x18 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x18 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x18 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x18 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x18 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x18 0.--1. " PM ,PM control" "I2S2,?..." line.long 0x1C "DAP2_SCLK_0,DAP2_SCLK_0 Controller" bitfld.long 0x1C 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "I2S2,?..." line.long 0x20 "DAP4_FS_0,DAP4_FS_0 Controller" bitfld.long 0x20 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x20 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x20 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x20 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x20 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x20 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x20 0.--1. " PM ,PM control" "I2S4B,?..." line.long 0x24 "DAP4_DIN_0,DAP4_DIN_0 Controller" bitfld.long 0x24 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x24 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x24 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x24 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x24 0.--1. " PM ,PM control" "I2S4B,?..." line.long 0x28 "DAP4_DOUT_0,DAP4_DOUT_0 Controller" bitfld.long 0x28 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x28 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x28 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x28 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x28 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x28 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x28 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x28 0.--1. " PM ,PM control" "I2S4B,?..." line.long 0x2C "DAP4_SCLK_0,DAP4_SCLK_0 Controller" bitfld.long 0x2C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x2C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x2C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x2C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x2C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x2C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x2C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x2C 0.--1. " PM ,PM control" "I2S4B,?..." line.long 0x30 "CAM1_MCLK_0,CAM1_MCLK_0 Controller" bitfld.long 0x30 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x30 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x30 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x30 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x30 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x30 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x30 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x30 0.--1. " PM ,PM control" "EXTPERIPH3,?..." line.long 0x34 "CAM2_MCLK_0,CAM2_MCLK_0 Controller" bitfld.long 0x34 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x34 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x34 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x34 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x34 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x34 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x34 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x34 0.--1. " PM ,PM control" "EXTPERIPH3,?..." line.long 0x38 "JTAG_RTCK_0,JTAG_RTCK_0 Controller" bitfld.long 0x38 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x38 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x38 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x38 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x38 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x38 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x38 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x38 0.--1. " PM ,PM control" "JTAG,?..." line.long 0x3C "CLK_32K_IN_0,CLK_32K_IN_0 Controller" bitfld.long 0x3C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x3C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x3C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x3C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PUPD,?..." line.long 0x40 "CLK_32K_OUT_0,CLK_32K_OUT_0 Controller" bitfld.long 0x40 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x40 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x40 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x40 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x40 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x40 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x40 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x40 0.--1. " PM ,PM control" "SOC,BLINK,?..." line.long 0x44 "BATT_BCL_0,BATT_BCL_0 Controller" bitfld.long 0x44 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x44 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x44 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x44 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x44 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x44 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x44 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x44 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x44 0.--1. " PM ,PM control" "BCL,?..." line.long 0x48 "CLK_REQ_0,CLK_REQ_0 Controller" bitfld.long 0x48 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x48 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x48 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x48 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x48 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." line.long 0x4C "CPU_PWR_REQ_0,CPU_PWR_REQ_0 Controller" bitfld.long 0x4C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x4C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x4C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x4C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x4C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." line.long 0x50 "PWR_INT_N_0,PWR_INT_N_0 Controller" bitfld.long 0x50 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x50 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x50 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x50 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x50 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." line.long 0x54 "SHUTDOWN_0,SHUTDOWN_0 Controller" bitfld.long 0x54 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x54 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x54 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x54 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x54 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." line.long 0x58 "CORE_PWR_REQ_0,CORE_PWR_REQ_0 Controller" bitfld.long 0x58 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x58 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x58 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x58 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x58 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." line.long 0x5C "AUD_MCLK_0,AUD_MCLK_0 Controller" bitfld.long 0x5C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x5C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x5C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x5C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x5C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x5C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x5C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x5C 0.--1. " PM ,PM control" "AUD,?..." line.long 0x60 "DVFS_PWM_0,DVFS_PWM_0 Controller" bitfld.long 0x60 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x60 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x60 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x60 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x60 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x60 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x60 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x60 0.--1. " PM ,PM control" ",CLDVFS,SPI3,?..." line.long 0x64 "DVFS_CLK_0,DVFS_CLK_0 Controller" bitfld.long 0x64 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x64 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x64 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x64 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x64 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x64 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x64 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x64 0.--1. " PM ,PM control" ",CLDVFS,SPI3,?..." line.long 0x68 "GPIO_X1_AUD_0,GPIO_X1_AUD_0 Controller" bitfld.long 0x68 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x68 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x68 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x68 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x68 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x68 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x68 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x68 0.--1. " PM ,PM control" ",,SPI3,?..." line.long 0x6C "GPIO_X3_AUD_0,GPIO_X3_AUD_0 Controller" bitfld.long 0x6C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x6C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x6C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x6C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x6C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x6C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x6C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x6C 0.--1. " PM ,PM control" ",,SPI3,?..." line.long 0x70 "GPIO_PCC7_0,GPIO_PCC7_0 Controller" bitfld.long 0x70 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x70 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x70 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x70 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x70 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x70 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x70 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x70 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x70 0.--1. " PM ,PM control" "?..." line.long 0x74 "HDMI_CEC_0,HDMI_CEC_0 Controller" bitfld.long 0x74 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x74 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x74 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x74 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x74 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x74 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x74 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x74 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x74 0.--1. " PM ,PM control" "CEC,?..." line.long 0x78 "HDMI_INT_DP_HPD_0,HDMI_INT_DP_HPD_0 Controller" bitfld.long 0x78 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x78 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x78 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x78 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x78 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x78 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x78 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x78 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x78 0.--1. " PM ,PM control" "DP,?..." line.long 0x7C "SPDIF_OUT_0,SPDIF_OUT_0 Controller" bitfld.long 0x7C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x7C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x7C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x7C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x7C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x7C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x7C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x7C 0.--1. " PM ,PM control" "SPDIF,?..." line.long 0x80 "SPDIF_IN_0,SPDIF_IN_0 Controller" bitfld.long 0x80 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x80 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x80 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x80 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x80 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x80 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x80 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x80 0.--1. " PM ,PM control" "SPDIF,?..." line.long 0x84 "USB_VBUS_EN0_0,USB_VBUS_EN0_0 Controller" bitfld.long 0x84 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x84 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x84 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x84 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x84 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x84 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x84 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x84 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x84 0.--1. " PM ,PM control" "USB,?..." line.long 0x88 "USB_VBUS_EN1_0,USB_VBUS_EN1_0 Controller" bitfld.long 0x88 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x88 10. " E_IO_HV ,E_IO_HV interrupt enable" "Disabled,Enabled" bitfld.long 0x88 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x88 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x88 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x88 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x88 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x88 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x88 0.--1. " PM ,PM control" "USB,?..." line.long 0x8C "DP_HPD0_0,DP_HPD0_0 Controller" bitfld.long 0x8C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x8C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x8C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x8C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x8C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x8C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x8C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x8C 0.--1. " PM ,PM control" "DP,?..." line.long 0x90 "WIFI_EN_0,WIFI_EN_0 Controller" bitfld.long 0x90 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x90 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x90 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x90 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x90 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x90 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x90 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x90 0.--1. " PM ,PM control" "?..." line.long 0x94 "WIFI_RST_0,WIFI_RST_0 Controller" bitfld.long 0x94 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x94 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x94 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x94 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x94 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x94 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x94 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x94 0.--1. " PM ,PM control" "?..." line.long 0x98 "WIFI_WAKE_AP_0,WIFI_WAKE_AP_0 Controller" bitfld.long 0x98 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x98 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x98 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x98 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x98 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x98 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x98 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x98 0.--1. " PM ,PM control" "?..." line.long 0x9C "AP_WAKE_BT_0,AP_WAKE_BT_0 Controller" bitfld.long 0x9C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x9C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x9C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x9C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x9C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x9C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x9C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x9C 0.--1. " PM ,PM control" ",UARTB,SPDIF,?..." line.long 0xA0 "BT_RST_0,BT_RST_0 Controller" bitfld.long 0xA0 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xA0 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xA0 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xA0 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xA0 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xA0 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xA0 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xA0 0.--1. " PM ,PM control" ",UARTB,SPDIF,?..." line.long 0xA4 "BT_WAKE_AP_0,BT_WAKE_AP_0 Controller" bitfld.long 0xA4 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xA4 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xA4 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xA4 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xA4 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xA4 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xA4 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xA4 0.--1. " PM ,PM control" "?..." line.long 0xA8 "AP_WAKE_NFC_0,AP_WAKE_NFC_0 Controller" bitfld.long 0xA8 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xA8 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xA8 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xA8 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xA8 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xA8 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xA8 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xA8 0.--1. " PM ,PM control" "?..." line.long 0xAC "NFC_EN_0,NFC_EN_0 Controller" bitfld.long 0xAC 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xAC 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xAC 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xAC 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xAC 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xAC 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xAC 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xAC 0.--1. " PM ,PM control" "?..." line.long 0xB0 "NFC_INT_0,NFC_INT_0 Controller" bitfld.long 0xB0 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xB0 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xB0 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xB0 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xB0 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xB0 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xB0 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xB0 0.--1. " PM ,PM control" "?..." line.long 0xB4 "GPS_EN_0,GPS_EN_0 Controller" bitfld.long 0xB4 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xB4 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xB4 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xB4 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xB4 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xB4 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xB4 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xB4 0.--1. " PM ,PM control" "?..." line.long 0xB8 "GPS_RST_0,GPS_RST_0 Controller" bitfld.long 0xB8 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xB8 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xB8 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xB8 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xB8 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xB8 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xB8 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xB8 0.--1. " PM ,PM control" "?..." line.long 0xBC "CAM_RST_0,CAM_RST_0 Controller" bitfld.long 0xBC 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xBC 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xBC 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xBC 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xBC 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xBC 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xBC 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xBC 0.--1. " PM ,PM control" "VGP1,?..." line.long 0xC0 "CAM_AF_EN_0,CAM_AF_EN_0 Controller" bitfld.long 0xC0 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xC0 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xC0 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC0 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xC0 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xC0 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xC0 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xC0 0.--1. " PM ,PM control" "VIMCLK,VGP2,?..." line.long 0xC4 "CAM_FLASH_EN_0,CAM_FLASH_EN_0 Controller" bitfld.long 0xC4 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xC4 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xC4 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC4 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xC4 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xC4 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xC4 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xC4 0.--1. " PM ,PM control" "VIMCLK,VGP3,?..." line.long 0xC8 "CAM1_PWDN_0,CAM1_PWDN_0 Controller" bitfld.long 0xC8 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xC8 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xC8 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC8 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xC8 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xC8 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xC8 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xC8 0.--1. " PM ,PM control" "VGP4,?..." line.long 0xCC "CAM2_PWDN_0,CAM2_PWDN_0 Controller" bitfld.long 0xCC 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xCC 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xCC 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xCC 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xCC 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xCC 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xCC 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xCC 0.--1. " PM ,PM control" "VGP5,?..." line.long 0xD0 "CAM1_STROBE_0,CAM1_STROBE_0 Controller" bitfld.long 0xD0 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xD0 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xD0 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xD0 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xD0 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xD0 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xD0 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xD0 0.--1. " PM ,PM control" "VGP6,?..." line.long 0xD4 "LCD_TE_0,LCD_TE_0 Controller" bitfld.long 0xD4 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xD4 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xD4 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xD4 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xD4 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xD4 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xD4 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xD4 0.--1. " PM ,PM control" "DISPLAYA,?..." line.long 0xD8 "LCD_BL_PWM_0,LCD_BL_PWM_0 Controller" bitfld.long 0xD8 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xD8 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xD8 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xD8 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xD8 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xD8 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xD8 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xD8 0.--1. " PM ,PM control" "DISPLAYA,PWM0,SOR0,?..." line.long 0xDC "LCD_BL_EN_0,LCD_BL_EN_0 Controller" bitfld.long 0xDC 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xDC 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xDC 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xDC 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xDC 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xDC 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xDC 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xDC 0.--1. " PM ,PM control" "?..." line.long 0xE0 "LCD_RST_0,LCD_RST_0 Controller" bitfld.long 0xE0 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xE0 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xE0 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xE0 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xE0 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xE0 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xE0 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xE0 0.--1. " PM ,PM control" "?..." line.long 0xE4 "LCD_GPIO1_0,LCD_GPIO1_0 Controller" bitfld.long 0xE4 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xE4 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xE4 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xE4 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xE4 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xE4 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xE4 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xE4 0.--1. " PM ,PM control" "DISPLAYB,?..." line.long 0xE8 "LCD_GPIO2_0,LCD_GPIO2_0 Controller" bitfld.long 0xE8 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xE8 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xE8 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xE8 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xE8 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xE8 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xE8 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xE8 0.--1. " PM ,PM control" "DISPLAYB,PWM1,,SOR1" line.long 0xEC "AP_READY_0,AP_READY_0 Controller" bitfld.long 0xEC 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xEC 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xEC 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xEC 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xEC 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xEC 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xEC 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xEC 0.--1. " PM ,PM control" "?..." line.long 0xF0 "TOUCH_RST_0,TOUCH_RST_0 Controller" bitfld.long 0xF0 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xF0 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xF0 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xF0 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xF0 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xF0 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xF0 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xF0 0.--1. " PM ,PM control" "?..." line.long 0xF4 "TOUCH_CLK_0,TOUCH_CLK_0 Controller" bitfld.long 0xF4 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xF4 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xF4 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xF4 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xF4 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xF4 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xF4 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xF4 0.--1. " PM ,PM control" "TOUCH,?..." line.long 0xF8 "MODEM_WAKE_AP_0,MODEM_WAKE_AP_0 Controller" bitfld.long 0xF8 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xF8 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xF8 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xF8 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xF8 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xF8 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xF8 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xF8 0.--1. " PM ,PM control" "?..." line.long 0xFC "TOUCH_INT_0,TOUCH_INT_0 Controller" bitfld.long 0xFC 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0xFC 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0xFC 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xFC 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0xFC 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0xFC 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0xFC 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0xFC 0.--1. " PM ,PM control" "?..." line.long 0x100 "MOTION_INT_0,MOTION_INT_0 Controller" bitfld.long 0x100 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x100 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x100 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x100 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x100 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x100 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x100 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x100 0.--1. " PM ,PM control" "?..." line.long 0x104 "ALS_PROX_INT_0,ALS_PROX_INT_0 Controller" bitfld.long 0x104 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x104 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x104 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x104 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x104 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x104 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x104 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x104 0.--1. " PM ,PM control" "?..." line.long 0x108 "TEMP_ALERT_0,TEMP_ALERT_0 Controller" bitfld.long 0x108 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x108 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x108 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x108 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x108 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x108 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x108 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x108 0.--1. " PM ,PM control" "?..." line.long 0x10C "BUTTON_POWER_ON_0,BUTTON_POWER_ON_0 Controller" bitfld.long 0x10C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x10C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x10C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x10C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x10C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x10C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x10C 0.--1. " PM ,PM control" "?..." line.long 0x110 "BUTTON_VOL_UP_0,BUTTON_VOL_UP_0 Controller" bitfld.long 0x110 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x110 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x110 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x110 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x110 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x110 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x110 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x110 0.--1. " PM ,PM control" "?..." line.long 0x114 "BUTTON_VOL_DOWN_0,BUTTON_VOL_DOWN_0 Controller" bitfld.long 0x114 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x114 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x114 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x114 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x114 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x114 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x114 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x114 0.--1. " PM ,PM control" "?..." line.long 0x118 "BUTTON_SLIDE_SW_0,BUTTON_SLIDE_SW_0 Controller" bitfld.long 0x118 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x118 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x118 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x118 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x118 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x118 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x118 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x118 0.--1. " PM ,PM control" "?..." line.long 0x11C "BUTTON_HOME_0,BUTTON_HOME_0 Controller" bitfld.long 0x11C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x11C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x11C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x11C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x11C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x11C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x11C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x11C 0.--1. " PM ,PM control" "?..." line.long 0x120 "GPIO_PA6_0,GPIO_PA6_0 Controller" bitfld.long 0x120 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x120 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x120 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x120 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x120 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x120 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x120 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x120 0.--1. " PM ,PM control" "SATA,?..." line.long 0x124 "GPIO_PE6_0,GPIO_PE6_0 Controller" bitfld.long 0x124 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x124 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x124 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x124 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x124 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x124 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x124 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x124 0.--1. " PM ,PM control" ",I2S5A,PWM2,?..." line.long 0x128 "GPIO_PE7_0,GPIO_PE7_0 Controller" bitfld.long 0x128 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x128 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x128 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x128 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x128 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x128 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x128 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x128 0.--1. " PM ,PM control" ",I2S5A,PWM3,?..." line.long 0x12C "GPIO_PH6_0,GPIO_PH6_0 Controller" bitfld.long 0x12C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x12C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x12C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x12C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x12C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x12C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x12C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x12C 0.--1. " PM ,PM control" "?..." group.long 0x3254++0x03 line.long 0x00 "GPIO_PK0_0,GPIO_PK0_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "IQC0,I2S5B,?..." group.long 0x3258++0x03 line.long 0x00 "GPIO_PK1_0,GPIO_PK1_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "IQC0,I2S5B,?..." group.long 0x325C++0x03 line.long 0x00 "GPIO_PK2_0,GPIO_PK2_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "IQC0,I2S5B,?..." group.long 0x3260++0x03 line.long 0x00 "GPIO_PK3_0,GPIO_PK3_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "IQC0,I2S5B,?..." group.long 0x3264++0x03 line.long 0x00 "GPIO_PK4_0,GPIO_PK4_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "IQC1,?..." group.long 0x3268++0x03 line.long 0x00 "GPIO_PK5_0,GPIO_PK5_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "IQC1,?..." group.long 0x326C++0x03 line.long 0x00 "GPIO_PK6_0,GPIO_PK6_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "IQC1,?..." group.long 0x3270++0x03 line.long 0x00 "GPIO_PK7_0,GPIO_PK7_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "IQC1,?..." group.long 0x3274++0x1F line.long 0x00 "GPIO_PL0_0,GPIO_PL0_0 Controller" bitfld.long 0x00 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x00 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x00 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x00 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x00 0.--1. " PM ,PM control" "?..." line.long 0x04 "GPIO_PL1_0,GPIO_PL1_0 Controller" bitfld.long 0x04 13.--14. " DRV_TYPE ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X" bitfld.long 0x04 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 9. " E_HSM ,E_HSM interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" bitfld.long 0x04 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x04 5. " PARK ,PARK select" "Normal,Parked" textline " " bitfld.long 0x04 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" bitfld.long 0x04 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x04 0.--1. " PM ,PM control" "SOC,?..." line.long 0x08 "GPIO_PZ0_0,GPIO_PZ0_0 Controller" bitfld.long 0x08 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x08 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x08 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x08 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x08 0.--1. " PM ,PM control" "VIMCLK2,?..." line.long 0x0C "GPIO_PZ1_0,GPIO_PZ1_0 Controller" bitfld.long 0x0C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x0C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x0C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x0C 0.--1. " PM ,PM control" "VIMCLK2,SDMMC1,?..." line.long 0x10 "GPIO_PZ2_0,GPIO_PZ2_0 Controller" bitfld.long 0x10 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x10 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x10 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x10 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x10 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x10 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x10 0.--1. " PM ,PM control" "SDMMC3,CCLA,?..." line.long 0x14 "GPIO_PZ3_0,GPIO_PZ3_0 Controller" bitfld.long 0x14 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x14 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x14 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x14 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x14 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x14 0.--1. " PM ,PM control" "SDMMC3,?..." line.long 0x18 "GPIO_PZ4_0,GPIO_PZ4_0 Controller" bitfld.long 0x18 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x18 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x18 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x18 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x18 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x18 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x18 0.--1. " PM ,PM control" "SDMMC1,?..." line.long 0x1C "GPIO_PZ5_0,GPIO_PZ5_0 Controller" bitfld.long 0x1C 12. " E_SCHMT ,E_SCHMT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 8. " E_LPDR ,E_LPDR interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 7. " LOCK ,LOCK interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 6. " E_INPUT ,E_INPUT interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " PARK ,PARK select" "Normal,Parked" bitfld.long 0x1C 4. " TRISTATE ,TRISTATE select" "Passthrough,Tristate" textline " " bitfld.long 0x1C 2.--3. " PUPD ,PUPD control" "None,PULL_DOWN,PULL_UP,?..." bitfld.long 0x1C 0.--1. " PM ,PM control" "SOC,?..." width 0x0B tree.end tree.end tree "Activity Monitor" base ad:0x6000C800 width 30. rgroup.long 0x00++0x03 line.long 0x00 "ACTMON_GLB_STATUS_0,ACTMON GLB Status Register" bitfld.long 0x00 31. " CPU_INTR ,CPU monitor interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 30. " COP_INTR ,COP monitor interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " AHB_INTR ,AHB monitor interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 28. " APB_INTR ,APB monitor interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " CPU_FREQ_INTR ,CPU frequency interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " MCALL_INTR ,MC_ALL interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " MCCPU_INTR ,MC_CPU interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 15. " CPU_MON_ACT ,CPU monitor active status" "Inactive,Active" textline " " bitfld.long 0x00 14. " COP_MON_ACT ,COP monitor active status" "Inactive,Active" bitfld.long 0x00 13. " AHB_MON_ACT ,AHB monitor active status" "Inactive,Active" textline " " bitfld.long 0x00 12. " APB_MON_ACT ,APB monitor active status" "Inactive,Active" bitfld.long 0x00 10. " CPU_FREQ_MON_ACT ,CPU frequency monitor active status" "Inactive,Active" textline " " bitfld.long 0x00 9. " MCALL_MON_ACT ,MC_ALL monitor active status" "Inactive,Active" bitfld.long 0x00 8. " MCCPU_MON_ACT ,MC_CPU monitor active status" "Inactive,Active" group.long 0x04++0x03 line.long 0x00 "ACTMON_GLB_PERIOD_CTRL_0,ACTMON Global Period Control Register" bitfld.long 0x00 8. " SOURCE ,Sampling period time base" "MSEC (milliseconds),USEC (microseconds)" hexmask.long.byte 0x00 0.--7. 1. " SAMPLE_PERIOD ,Sampling period in milliseconds/microseconds" tree "ACTMON_CPU" group.long 0x80++0x1B line.long 0x00 "CPU_CTRL_0,CPU Monitor Control Register" bitfld.long 0x00 31. " ENB ,Enable Monitor" "Disabled,Enabled" bitfld.long 0x00 30. " CONSECUTIVE_ABOVE_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_UPPER_NUM' upper watermark breaches are detected" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CONSECUTIVE_BELOW_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_LOWER_NUM' lower watermark breaches are detected" "Disabled,Enabled" bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM , Number (N+1) of consecutive upper watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 23.--25. " CONSECUTIVE_BELOW_WMARK_NUM , Number (N+1) of consecutive lower watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" bitfld.long 0x00 22. " WHEN_OVERFLOW_EN ,Enable interrupt for number of consecutive lower watermark breaches that need to occur to raise an interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " AVG_ABOVE_WMARK_EN ,Enable interrupt when AVG value is above its upper watermark value" "Disabled,Enabled" bitfld.long 0x00 20. " AVG_BELOW_WMARK_EN ,Enable interrupt when AVG value is below its lower watermark value" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " AT_END_EN ,Enable interrupt at the end of sample period" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_PERIODIC ,Enable periodic mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--12. " K_VAL ,Variable for IIR filter (2^(K+1))" "0,1,2,3,4,5,6,7" line.long 0x04 "CPU_UPPER_WMARK_0,CPU Upper Watermark Register" line.long 0x08 "CPU_LOWER_WMARK_0,CPU Lower Watermark Register" line.long 0x0C "CPU_INIT_AVG_0,CPU Initial AVG Register" line.long 0x10 "CPU_AVG_UPPER_WMARK_0,CPU AVG Upper Watermark Register" line.long 0x14 "CPU_AVG_LOWER_WMARK_0,CPU AVG Lower Watermark Register" line.long 0x18 "CPU_COUNT_WEIGHT_0,CPU Count Weight Register" rgroup.long (0x80+0x1C)++0x07 line.long 0x00 "CPU_COUNT_0,CPU Monitor Status0 Register" line.long 0x04 "CPU_AVG_COUNT_0,CPU Monitor Status1 Register" group.long (0x80+0x24)++0x03 line.long 0x00 "CPU_INTR_STATUS_0,CPU Monitor Interrupt Register" eventfld.long 0x00 31. " CONSECUTIVE_UPPER ,Assert at the end of sampling period, if count value crosses upper watermark value consecutively for the number of times specified in CONSECUTIVE_UPPER_NUM field" "No interrupt,Interrupt" eventfld.long 0x00 30. " CONSECUTIVE_LOWER , Assert at the end of sampling period, if count value crosses lower watermark value consecutively for the number of times specified in CONSECUTIVE_LOWER_NUM field" "No interrupt,Interrupt" textline " " eventfld.long 0x00 29. " AT_END ,Assert at the end of sampling period, if interrupt at end of sample period is enabled" "No interrupt,Interrupt" eventfld.long 0x00 26. " WHEN_OVERFLOW ,Assert at the end of sampling period, if there is an overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " AVG_BELOW_WMARK ,Assert at the end of sampling period, if AVG count value crosses lower AVG watermark value" "No interrupt,Interrupt" eventfld.long 0x00 24. " AVG_ABOVE_WMARK ,Assert at the end of sampling period, if AVG count value crosses upper AVG watermark value" "No interrupt,Interrupt" tree.end tree "ACTMON_COP" group.long 0xC0++0x1B line.long 0x00 "COP_CTRL_0,COP Monitor Control Register" bitfld.long 0x00 31. " ENB ,Enable Monitor" "Disabled,Enabled" bitfld.long 0x00 30. " CONSECUTIVE_ABOVE_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_UPPER_NUM' upper watermark breaches are detected" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CONSECUTIVE_BELOW_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_LOWER_NUM' lower watermark breaches are detected" "Disabled,Enabled" bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM , Number (N+1) of consecutive upper watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 23.--25. " CONSECUTIVE_BELOW_WMARK_NUM , Number (N+1) of consecutive lower watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" bitfld.long 0x00 22. " WHEN_OVERFLOW_EN ,Enable interrupt for number of consecutive lower watermark breaches that need to occur to raise an interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " AVG_ABOVE_WMARK_EN ,Enable interrupt when AVG value is above its upper watermark value" "Disabled,Enabled" bitfld.long 0x00 20. " AVG_BELOW_WMARK_EN ,Enable interrupt when AVG value is below its lower watermark value" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " AT_END_EN ,Enable interrupt at the end of sample period" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_PERIODIC ,Enable periodic mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--12. " K_VAL ,Variable for IIR filter (2^(K+1))" "0,1,2,3,4,5,6,7" line.long 0x04 "COP_UPPER_WMARK_0,COP Upper Watermark Register" line.long 0x08 "COP_LOWER_WMARK_0,COP Lower Watermark Register" line.long 0x0C "COP_INIT_AVG_0,COP Initial AVG Register" line.long 0x10 "COP_AVG_UPPER_WMARK_0,COP AVG Upper Watermark Register" line.long 0x14 "COP_AVG_LOWER_WMARK_0,COP AVG Lower Watermark Register" line.long 0x18 "COP_COUNT_WEIGHT_0,COP Count Weight Register" rgroup.long (0xC0+0x1C)++0x07 line.long 0x00 "COP_COUNT_0,COP Monitor Status0 Register" line.long 0x04 "COP_AVG_COUNT_0,COP Monitor Status1 Register" group.long (0xC0+0x24)++0x03 line.long 0x00 "COP_INTR_STATUS_0,COP Monitor Interrupt Register" eventfld.long 0x00 31. " CONSECUTIVE_UPPER ,Assert at the end of sampling period, if count value crosses upper watermark value consecutively for the number of times specified in CONSECUTIVE_UPPER_NUM field" "No interrupt,Interrupt" eventfld.long 0x00 30. " CONSECUTIVE_LOWER , Assert at the end of sampling period, if count value crosses lower watermark value consecutively for the number of times specified in CONSECUTIVE_LOWER_NUM field" "No interrupt,Interrupt" textline " " eventfld.long 0x00 29. " AT_END ,Assert at the end of sampling period, if interrupt at end of sample period is enabled" "No interrupt,Interrupt" eventfld.long 0x00 26. " WHEN_OVERFLOW ,Assert at the end of sampling period, if there is an overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " AVG_BELOW_WMARK ,Assert at the end of sampling period, if AVG count value crosses lower AVG watermark value" "No interrupt,Interrupt" eventfld.long 0x00 24. " AVG_ABOVE_WMARK ,Assert at the end of sampling period, if AVG count value crosses upper AVG watermark value" "No interrupt,Interrupt" tree.end tree "ACTMON_AHB" group.long 0x100++0x1B line.long 0x00 "AHB_CTRL_0,AHB Monitor Control Register" bitfld.long 0x00 31. " ENB ,Enable Monitor" "Disabled,Enabled" bitfld.long 0x00 30. " CONSECUTIVE_ABOVE_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_UPPER_NUM' upper watermark breaches are detected" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CONSECUTIVE_BELOW_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_LOWER_NUM' lower watermark breaches are detected" "Disabled,Enabled" bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM , Number (N+1) of consecutive upper watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 23.--25. " CONSECUTIVE_BELOW_WMARK_NUM , Number (N+1) of consecutive lower watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" bitfld.long 0x00 22. " WHEN_OVERFLOW_EN ,Enable interrupt for number of consecutive lower watermark breaches that need to occur to raise an interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " AVG_ABOVE_WMARK_EN ,Enable interrupt when AVG value is above its upper watermark value" "Disabled,Enabled" bitfld.long 0x00 20. " AVG_BELOW_WMARK_EN ,Enable interrupt when AVG value is below its lower watermark value" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " AT_END_EN ,Enable interrupt at the end of sample period" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_PERIODIC ,Enable periodic mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--12. " K_VAL ,Variable for IIR filter (2^(K+1))" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--9. " MONITOR_COND ,Selection criteria on parent module for the activity signal" "CPU,COP,NA1,CSITE,ARC,AHBDMA,USB,APBDMA,USB,APBDMA,NA2,NA3,NA4,NA5,NA6,NA7,SE,DDS,BSEA,NA8,USB2,NA9,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,ALL" textline " " bitfld.long 0x00 0.--3. " SAMPLE_COND ,Selection criteria on parent module for type of pulse signal" "AHB_MASTER_ACTIVE,AHB_MASTER_SLAVE_ACTIVE,AHB_DATA_XFER,AHB_IDLE,MASTER_IDLE,AHB_BUSY,DISABLE,?..." line.long 0x04 "AHB_UPPER_WMARK_0,AHB Upper Watermark Register" line.long 0x08 "AHB_LOWER_WMARK_0,AHB Lower Watermark Register" line.long 0x0C "AHB_INIT_AVG_0,AHB Initial AVG Register" line.long 0x10 "AHB_AVG_UPPER_WMARK_0,AHB AVG Upper Watermark Register" line.long 0x14 "AHB_AVG_LOWER_WMARK_0,AHB AVG Lower Watermark Register" line.long 0x18 "AHB_COUNT_WEIGHT_0,AHB Count Weight Register" rgroup.long (0x100+0x1C)++0x07 line.long 0x00 "AHB_COUNT_0,AHB Monitor Status0 Register" line.long 0x04 "AHB_AVG_COUNT_0,AHB Monitor Status1 Register" group.long (0x100+0x24)++0x03 line.long 0x00 "AHB_INTR_STATUS_0,AHB Monitor Interrupt Register" eventfld.long 0x00 31. " CONSECUTIVE_UPPER ,Assert at the end of sampling period, if count value crosses upper watermark value consecutively for the number of times specified in CONSECUTIVE_UPPER_NUM field" "No interrupt,Interrupt" eventfld.long 0x00 30. " CONSECUTIVE_LOWER , Assert at the end of sampling period, if count value crosses lower watermark value consecutively for the number of times specified in CONSECUTIVE_LOWER_NUM field" "No interrupt,Interrupt" textline " " eventfld.long 0x00 29. " AT_END ,Assert at the end of sampling period, if interrupt at end of sample period is enabled" "No interrupt,Interrupt" eventfld.long 0x00 26. " WHEN_OVERFLOW ,Assert at the end of sampling period, if there is an overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " AVG_BELOW_WMARK ,Assert at the end of sampling period, if AVG count value crosses lower AVG watermark value" "No interrupt,Interrupt" eventfld.long 0x00 24. " AVG_ABOVE_WMARK ,Assert at the end of sampling period, if AVG count value crosses upper AVG watermark value" "No interrupt,Interrupt" tree.end tree "ACTMON_APB" group.long 0x140++0x1B line.long 0x00 "APB_CTRL_0,APB Monitor Control Register" bitfld.long 0x00 31. " ENB ,Enable Monitor" "Disabled,Enabled" bitfld.long 0x00 30. " CONSECUTIVE_ABOVE_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_UPPER_NUM' upper watermark breaches are detected" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CONSECUTIVE_BELOW_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_LOWER_NUM' lower watermark breaches are detected" "Disabled,Enabled" bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM , Number (N+1) of consecutive upper watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 23.--25. " CONSECUTIVE_BELOW_WMARK_NUM , Number (N+1) of consecutive lower watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" bitfld.long 0x00 22. " WHEN_OVERFLOW_EN ,Enable interrupt for number of consecutive lower watermark breaches that need to occur to raise an interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " AVG_ABOVE_WMARK_EN ,Enable interrupt when AVG value is above its upper watermark value" "Disabled,Enabled" bitfld.long 0x00 20. " AVG_BELOW_WMARK_EN ,Enable interrupt when AVG value is below its lower watermark value" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " AT_END_EN ,Enable interrupt at the end of sample period" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_PERIODIC ,Enable periodic mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--12. " K_VAL ,Variable for IIR filter (2^(K+1))" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--9. " MONITOR_COND ,Selection criteria on parent module for the activity signal" "DTV,I2C1,I2C2,I2C3,I2C4,DVC,I2C6,,,SPI1,SPI2,SPI3,SPI4,SPI5,SPI6,QSPI,UARTA,UARTB,UARTC,UARTD,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,ALL" textline " " bitfld.long 0x00 0.--3. " SAMPLE_COND ,Selection criteria on parent module for type of pulse signal" "PSEL_ACTIVE,PREADY_ACTIVE,PENABLE_PSEL_ACTIVE,APB_IDLE,DISABLE,?..." line.long 0x04 "APB_UPPER_WMARK_0,APB Upper Watermark Register" line.long 0x08 "APB_LOWER_WMARK_0,APB Lower Watermark Register" line.long 0x0C "APB_INIT_AVG_0,APB Initial AVG Register" line.long 0x10 "APB_AVG_UPPER_WMARK_0,APB AVG Upper Watermark Register" line.long 0x14 "APB_AVG_LOWER_WMARK_0,APB AVG Lower Watermark Register" line.long 0x18 "APB_COUNT_WEIGHT_0,APB Count Weight Register" rgroup.long (0x140+0x1C)++0x07 line.long 0x00 "APB_COUNT_0,APB Monitor Status0 Register" line.long 0x04 "APB_AVG_COUNT_0,APB Monitor Status1 Register" group.long (0x140+0x24)++0x03 line.long 0x00 "APB_INTR_STATUS_0,APB Monitor Interrupt Register" eventfld.long 0x00 31. " CONSECUTIVE_UPPER ,Assert at the end of sampling period, if count value crosses upper watermark value consecutively for the number of times specified in CONSECUTIVE_UPPER_NUM field" "No interrupt,Interrupt" eventfld.long 0x00 30. " CONSECUTIVE_LOWER , Assert at the end of sampling period, if count value crosses lower watermark value consecutively for the number of times specified in CONSECUTIVE_LOWER_NUM field" "No interrupt,Interrupt" textline " " eventfld.long 0x00 29. " AT_END ,Assert at the end of sampling period, if interrupt at end of sample period is enabled" "No interrupt,Interrupt" eventfld.long 0x00 26. " WHEN_OVERFLOW ,Assert at the end of sampling period, if there is an overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " AVG_BELOW_WMARK ,Assert at the end of sampling period, if AVG count value crosses lower AVG watermark value" "No interrupt,Interrupt" eventfld.long 0x00 24. " AVG_ABOVE_WMARK ,Assert at the end of sampling period, if AVG count value crosses upper AVG watermark value" "No interrupt,Interrupt" group.long 0x168++0x03 line.long 0x00 "APB_CTRL_SAPB_0,APB Monitor Interrupt Register" bitfld.long 0x00 4.--9. " MONITOR_COND_SAPB ,Selection criteria on parent module for the activity signal" "APB2JTAG,APE,ATOMICS,CEC,CSITE,DDS,DP2,DVFS,EMC0,EMC1,EMCB,FUSE,HDA,KFUSE,LA,MC0,MC1,MCB,MIPICAL,MISC,PINMUX_AUX,PMC,PWM,RTC,SATA,SATA_AUX,SDMMC1,SDMMC2,SDMMC3,SDMMC4,SE,SOC_THERM,SECURE_REGS,STM,SYSCTR0,SYSCTR1,XUSB_DEV,XUSB_HOST,SUXB_PADCTL,,,,,,,,,,,,,,,,,,,,,,,,,ALL" bitfld.long 0x00 0.--3. " SAMPLE_COND_SAPB ,Selection criteria on parent module for type of pulse signal" "PSEL_ACTIVE,PREADY_ACTIVE,PENABLE_PSEL_ACTIVE,APB_IDLE,DISABLE,?..." tree.end tree "ACTMON_CPU_FREQ" group.long 0x180++0x1B line.long 0x00 "CPU_FREQ_CTRL_0,CPU_FREQ Monitor Control Register" bitfld.long 0x00 31. " ENB ,Enable Monitor" "Disabled,Enabled" bitfld.long 0x00 30. " CONSECUTIVE_ABOVE_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_UPPER_NUM' upper watermark breaches are detected" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CONSECUTIVE_BELOW_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_LOWER_NUM' lower watermark breaches are detected" "Disabled,Enabled" bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM , Number (N+1) of consecutive upper watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 23.--25. " CONSECUTIVE_BELOW_WMARK_NUM , Number (N+1) of consecutive lower watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" bitfld.long 0x00 22. " WHEN_OVERFLOW_EN ,Enable interrupt for number of consecutive lower watermark breaches that need to occur to raise an interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " AVG_ABOVE_WMARK_EN ,Enable interrupt when AVG value is above its upper watermark value" "Disabled,Enabled" bitfld.long 0x00 20. " AVG_BELOW_WMARK_EN ,Enable interrupt when AVG value is below its lower watermark value" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " AT_END_EN ,Enable interrupt at the end of sample period" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_PERIODIC ,Enable periodic mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--12. " K_VAL ,Variable for IIR filter (2^(K+1))" "0,1,2,3,4,5,6,7" line.long 0x04 "CPU_FREQ_UPPER_WMARK_0,CPU_FREQ Upper Watermark Register" line.long 0x08 "CPU_FREQ_LOWER_WMARK_0,CPU_FREQ Lower Watermark Register" line.long 0x0C "CPU_FREQ_INIT_AVG_0,CPU_FREQ Initial AVG Register" line.long 0x10 "CPU_FREQ_AVG_UPPER_WMARK_0,CPU_FREQ AVG Upper Watermark Register" line.long 0x14 "CPU_FREQ_AVG_LOWER_WMARK_0,CPU_FREQ AVG Lower Watermark Register" line.long 0x18 "CPU_FREQ_COUNT_WEIGHT_0,CPU_FREQ Count Weight Register" rgroup.long (0x180+0x1C)++0x07 line.long 0x00 "CPU_FREQ_COUNT_0,CPU_FREQ Monitor Status0 Register" line.long 0x04 "CPU_FREQ_AVG_COUNT_0,CPU_FREQ Monitor Status1 Register" group.long (0x180+0x24)++0x03 line.long 0x00 "CPU_FREQ_INTR_STATUS_0,CPU_FREQ Monitor Interrupt Register" eventfld.long 0x00 31. " CONSECUTIVE_UPPER ,Assert at the end of sampling period, if count value crosses upper watermark value consecutively for the number of times specified in CONSECUTIVE_UPPER_NUM field" "No interrupt,Interrupt" eventfld.long 0x00 30. " CONSECUTIVE_LOWER , Assert at the end of sampling period, if count value crosses lower watermark value consecutively for the number of times specified in CONSECUTIVE_LOWER_NUM field" "No interrupt,Interrupt" textline " " eventfld.long 0x00 29. " AT_END ,Assert at the end of sampling period, if interrupt at end of sample period is enabled" "No interrupt,Interrupt" eventfld.long 0x00 26. " WHEN_OVERFLOW ,Assert at the end of sampling period, if there is an overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " AVG_BELOW_WMARK ,Assert at the end of sampling period, if AVG count value crosses lower AVG watermark value" "No interrupt,Interrupt" eventfld.long 0x00 24. " AVG_ABOVE_WMARK ,Assert at the end of sampling period, if AVG count value crosses upper AVG watermark value" "No interrupt,Interrupt" tree.end tree "ACTMON_MCALL" group.long 0x1C0++0x1B line.long 0x00 "MCALL_CTRL_0,MCALL Monitor Control Register" bitfld.long 0x00 31. " ENB ,Enable Monitor" "Disabled,Enabled" bitfld.long 0x00 30. " CONSECUTIVE_ABOVE_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_UPPER_NUM' upper watermark breaches are detected" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CONSECUTIVE_BELOW_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_LOWER_NUM' lower watermark breaches are detected" "Disabled,Enabled" bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM , Number (N+1) of consecutive upper watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 23.--25. " CONSECUTIVE_BELOW_WMARK_NUM , Number (N+1) of consecutive lower watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" bitfld.long 0x00 22. " WHEN_OVERFLOW_EN ,Enable interrupt for number of consecutive lower watermark breaches that need to occur to raise an interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " AVG_ABOVE_WMARK_EN ,Enable interrupt when AVG value is above its upper watermark value" "Disabled,Enabled" bitfld.long 0x00 20. " AVG_BELOW_WMARK_EN ,Enable interrupt when AVG value is below its lower watermark value" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " AT_END_EN ,Enable interrupt at the end of sample period" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_PERIODIC ,Enable periodic mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--12. " K_VAL ,Variable for IIR filter (2^(K+1))" "0,1,2,3,4,5,6,7" line.long 0x04 "MCALL_UPPER_WMARK_0,MCALL Upper Watermark Register" line.long 0x08 "MCALL_LOWER_WMARK_0,MCALL Lower Watermark Register" line.long 0x0C "MCALL_INIT_AVG_0,MCALL Initial AVG Register" line.long 0x10 "MCALL_AVG_UPPER_WMARK_0,MCALL AVG Upper Watermark Register" line.long 0x14 "MCALL_AVG_LOWER_WMARK_0,MCALL AVG Lower Watermark Register" line.long 0x18 "MCALL_COUNT_WEIGHT_0,MCALL Count Weight Register" rgroup.long (0x1C0+0x1C)++0x07 line.long 0x00 "MCALL_COUNT_0,MCALL Monitor Status0 Register" line.long 0x04 "MCALL_AVG_COUNT_0,MCALL Monitor Status1 Register" group.long (0x1C0+0x24)++0x03 line.long 0x00 "MCALL_INTR_STATUS_0,MCALL Monitor Interrupt Register" eventfld.long 0x00 31. " CONSECUTIVE_UPPER ,Assert at the end of sampling period, if count value crosses upper watermark value consecutively for the number of times specified in CONSECUTIVE_UPPER_NUM field" "No interrupt,Interrupt" eventfld.long 0x00 30. " CONSECUTIVE_LOWER , Assert at the end of sampling period, if count value crosses lower watermark value consecutively for the number of times specified in CONSECUTIVE_LOWER_NUM field" "No interrupt,Interrupt" textline " " eventfld.long 0x00 29. " AT_END ,Assert at the end of sampling period, if interrupt at end of sample period is enabled" "No interrupt,Interrupt" eventfld.long 0x00 26. " WHEN_OVERFLOW ,Assert at the end of sampling period, if there is an overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " AVG_BELOW_WMARK ,Assert at the end of sampling period, if AVG count value crosses lower AVG watermark value" "No interrupt,Interrupt" eventfld.long 0x00 24. " AVG_ABOVE_WMARK ,Assert at the end of sampling period, if AVG count value crosses upper AVG watermark value" "No interrupt,Interrupt" tree.end tree "ACTMON_MCCPU" group.long 0x200++0x1B line.long 0x00 "MCCPU_CTRL_0,MCCPU Monitor Control Register" bitfld.long 0x00 31. " ENB ,Enable Monitor" "Disabled,Enabled" bitfld.long 0x00 30. " CONSECUTIVE_ABOVE_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_UPPER_NUM' upper watermark breaches are detected" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CONSECUTIVE_BELOW_WMARK_EN ,Enable interrupt when consecutive 'CONSECUTIVE_LOWER_NUM' lower watermark breaches are detected" "Disabled,Enabled" bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM , Number (N+1) of consecutive upper watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 23.--25. " CONSECUTIVE_BELOW_WMARK_NUM , Number (N+1) of consecutive lower watermark breaches that need to occur to raise an interrupt" "0,1,2,3,4,5,6,7" bitfld.long 0x00 22. " WHEN_OVERFLOW_EN ,Enable interrupt for number of consecutive lower watermark breaches that need to occur to raise an interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " AVG_ABOVE_WMARK_EN ,Enable interrupt when AVG value is above its upper watermark value" "Disabled,Enabled" bitfld.long 0x00 20. " AVG_BELOW_WMARK_EN ,Enable interrupt when AVG value is below its lower watermark value" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " AT_END_EN ,Enable interrupt at the end of sample period" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_PERIODIC ,Enable periodic mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--12. " K_VAL ,Variable for IIR filter (2^(K+1))" "0,1,2,3,4,5,6,7" line.long 0x04 "MCCPU_UPPER_WMARK_0,MCCPU Upper Watermark Register" line.long 0x08 "MCCPU_LOWER_WMARK_0,MCCPU Lower Watermark Register" line.long 0x0C "MCCPU_INIT_AVG_0,MCCPU Initial AVG Register" line.long 0x10 "MCCPU_AVG_UPPER_WMARK_0,MCCPU AVG Upper Watermark Register" line.long 0x14 "MCCPU_AVG_LOWER_WMARK_0,MCCPU AVG Lower Watermark Register" line.long 0x18 "MCCPU_COUNT_WEIGHT_0,MCCPU Count Weight Register" rgroup.long (0x200+0x1C)++0x07 line.long 0x00 "MCCPU_COUNT_0,MCCPU Monitor Status0 Register" line.long 0x04 "MCCPU_AVG_COUNT_0,MCCPU Monitor Status1 Register" group.long (0x200+0x24)++0x03 line.long 0x00 "MCCPU_INTR_STATUS_0,MCCPU Monitor Interrupt Register" eventfld.long 0x00 31. " CONSECUTIVE_UPPER ,Assert at the end of sampling period, if count value crosses upper watermark value consecutively for the number of times specified in CONSECUTIVE_UPPER_NUM field" "No interrupt,Interrupt" eventfld.long 0x00 30. " CONSECUTIVE_LOWER , Assert at the end of sampling period, if count value crosses lower watermark value consecutively for the number of times specified in CONSECUTIVE_LOWER_NUM field" "No interrupt,Interrupt" textline " " eventfld.long 0x00 29. " AT_END ,Assert at the end of sampling period, if interrupt at end of sample period is enabled" "No interrupt,Interrupt" eventfld.long 0x00 26. " WHEN_OVERFLOW ,Assert at the end of sampling period, if there is an overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 25. " AVG_BELOW_WMARK ,Assert at the end of sampling period, if AVG count value crosses lower AVG watermark value" "No interrupt,Interrupt" eventfld.long 0x00 24. " AVG_ABOVE_WMARK ,Assert at the end of sampling period, if AVG count value crosses upper AVG watermark value" "No interrupt,Interrupt" tree.end textline " " group.long 0x300++0x07 line.long 0x00 "ACTMON_HISTOGRAM_CONFIG_0,Histogram Configuration Register" bitfld.long 0x00 12.--15. " SOURCE ,Histogram source" "NONE,AHB,APB,COP,CPU,MC_ALL,MC_CPU,CPU_FREQ,,APB_MMIO,?..." bitfld.long 0x00 4.--8. " SHIFT ,Scaling factor for the idle counter before the value is used to update histogram bucket" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 3. " STALL_ON_SINGLE_SATURATE ,Stop incrementing bucket when at least one other bucket has saturated" "False,True" bitfld.long 0x00 2. " NO_UNDERFLOW_BUCKET ,Ignore idle times that are less than the minimum value" "False,True" textline " " bitfld.long 0x00 1. " LINEAR_MODE ,Bucket width is the same for all buckets" "False,True" bitfld.long 0x00 0. " ACTIVE ,Enable histogram recording" "Disabled,Enabled" line.long 0x04 "ACTMON_HISTOGRAM_CTRL_0,Histogram Control Register" bitfld.long 0x04 0. " CLEAR , Clear all" "False,True" textline " " rgroup.long 0x380++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_0,Histogram Data Register 0" rgroup.long 0x384++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_1,Histogram Data Register 1" rgroup.long 0x388++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_2,Histogram Data Register 2" rgroup.long 0x38C++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_3,Histogram Data Register 3" rgroup.long 0x390++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_4,Histogram Data Register 4" rgroup.long 0x394++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_5,Histogram Data Register 5" rgroup.long 0x398++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_6,Histogram Data Register 6" rgroup.long 0x39C++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_7,Histogram Data Register 7" rgroup.long 0x3A0++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_8,Histogram Data Register 8" rgroup.long 0x3A4++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_9,Histogram Data Register 9" rgroup.long 0x3A8++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_10,Histogram Data Register 10" rgroup.long 0x3AC++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_11,Histogram Data Register 11" rgroup.long 0x3B0++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_12,Histogram Data Register 12" rgroup.long 0x3B4++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_13,Histogram Data Register 13" rgroup.long 0x3B8++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_14,Histogram Data Register 14" rgroup.long 0x3BC++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_15,Histogram Data Register 15" rgroup.long 0x3C0++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_16,Histogram Data Register 16" rgroup.long 0x3C4++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_17,Histogram Data Register 17" rgroup.long 0x3C8++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_18,Histogram Data Register 18" rgroup.long 0x3CC++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_19,Histogram Data Register 19" rgroup.long 0x3D0++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_20,Histogram Data Register 20" rgroup.long 0x3D4++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_21,Histogram Data Register 21" rgroup.long 0x3D8++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_22,Histogram Data Register 22" rgroup.long 0x3DC++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_23,Histogram Data Register 23" rgroup.long 0x3E0++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_24,Histogram Data Register 24" rgroup.long 0x3E4++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_25,Histogram Data Register 25" rgroup.long 0x3E8++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_26,Histogram Data Register 26" rgroup.long 0x3EC++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_27,Histogram Data Register 27" rgroup.long 0x3F0++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_28,Histogram Data Register 28" rgroup.long 0x3F4++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_29,Histogram Data Register 29" rgroup.long 0x3F8++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_30,Histogram Data Register 30" rgroup.long 0x3FC++0x03 line.long 0x00 "ACTMON_HISTOGRAM_DATA_0_31,Histogram Data Register 31" width 0x0B tree.end tree "Real-Time Clock" base ad:0x7000E000 width 33. group.long 0x00++0x03 line.long 0x00 "CONTROL_0,Control Register" bitfld.long 0x00 0. " WR_SEC_CNT ,Disable writes to SECONDS counter" "No,Yes" rgroup.long 0x04++0x03 line.long 0x00 "BUSY_0,Busy Register" bitfld.long 0x00 0. " STATUS ,Idle and busy status" "Idle,Busy" group.long 0x08++0x03 line.long 0x00 "SECONDS_0,Seconds Counter Register" rgroup.long 0x0C++0x07 line.long 0x00 "SHADOW_SECONDS_0,Shadowed Seconds Counter Register" line.long 0x04 "MILLI_SECONDS_0,Milliseconds Counter Register" hexmask.long.word 0x04 0.--9. 1. " MILLI_SECONDS ,Milliseconds counter increments using Bresenham algorithm" group.long 0x14++0x1B line.long 0x00 "SECONDS_ALARM0_0,Seconds Alarm0 Register" line.long 0x04 "SECONDS_ALARM1_0,Seconds Alarm1 Register" line.long 0x08 "MILLI_SECONDS_ALARM_0,Milliseconds Alarm Register" hexmask.long.word 0x08 0.--9. 1. " MSEC_MATCH_VALUE ,Milliseconds match value" line.long 0x0C "SECONDS_COUNTDOWN_ALARM_0,Countdown Alarm Register" bitfld.long 0x0C 31. " ENABLE ,Enable bit for the countdown operation" "Disabled,Enabled" bitfld.long 0x0C 30. " REPEAT ,Repeat bit for the countdown operation" "Disabled,Enabled" hexmask.long 0x0C 0.--29. 1. " VALUE ,Number of milliseconds to countdown" line.long 0x10 "MILLI_SECONDS_COUNTDOWN_ALARM_0,Countdown Milliseconds Alarm Register" bitfld.long 0x10 31. " ENABLE ,Enable bit for the countdown operation" "Disabled,Enabled" bitfld.long 0x10 30. " REPEAT ,Repeat bit for the countdown operation" "Disabled,Enabled" hexmask.long 0x10 0.--29. 1. " VALUE ,Number of milliseconds to countdown" line.long 0x14 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x14 4. " MSEC_CDN_ALARM ,MSEC_CDN_ALARM interrupt" "Not masked,Masked" bitfld.long 0x14 3. " SEC_CDN_ALARM ,SEC_CDN_ALARM interrupt" "Not masked,Masked" bitfld.long 0x14 2. " MSEC_ALARM ,MSEC_ALARM interrupt" "Not masked,Masked" textline " " bitfld.long 0x14 1. " SEC_ALARM1 ,SEC_ALARM1 interrupt" "Not masked,Masked" bitfld.long 0x14 0. " SEC_ALARM0 ,SEC_ALARM0 interrupt" "Not masked,Masked" line.long 0x18 "INTR_STATUS_0,Interrupt Status Register" eventfld.long 0x18 4. " MSEC_CDN_ALARM ,MSEC_CDN_ALARM interrupt condition condition" "No interrupt,Interrupt" eventfld.long 0x18 3. " SEC_CDN_ALARM ,SEC_CDN_ALARM interrupt condition" "No interrupt,Interrupt" eventfld.long 0x18 2. " MSEC_ALARM ,MSEC_ALARM interrupt condition" "No interrupt,Interrupt" textline " " eventfld.long 0x18 1. " SEC_ALARM1 ,SEC_ALARM1 interrupt condition" "No interrupt,Interrupt" eventfld.long 0x18 0. " SEC_ALARM0 ,SEC_ALARM0 interrupt condition" "No interrupt,Interrupt" rgroup.long 0x30++0x03 line.long 0x00 "INTR_SOURCE_0,Interrupt Source Register" bitfld.long 0x00 4. " MSEC_CDN_ALARM ,MSEC_CDN_ALARM interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " SEC_CDN_ALARM ,SEC_CDN_ALARM interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " MSEC_ALARM ,MSEC_ALARM interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " SEC_ALARM1 ,SEC_ALARM1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " SEC_ALARM0 ,SEC_ALARM0 interrupt" "No interrupt,Interrupt" wgroup.long 0x34++0x03 line.long 0x00 "INTR_SET_0,Interrupt Set Register" bitfld.long 0x00 4. " MSEC_CDN_ALARM ,MSEC_CDN_ALARM interrupt status bit" "Not set,Set" bitfld.long 0x00 3. " SEC_CDN_ALARM ,SEC_CDN_ALARM interrupt status bit" "Not set,Set" bitfld.long 0x00 2. " MSEC_ALARM ,MSEC_ALARM interrupt status bit" "Not set,Set" textline " " bitfld.long 0x00 1. " SEC_ALARM1 ,SEC_ALARM1 interrupt status bit" "Not set,Set" bitfld.long 0x00 0. " SEC_ALARM0 ,SEC_ALARM0 interrupt status bit" "Not set,Set" group.long 0x38++0x03 line.long 0x00 "CORRECTION_FACTOR_0,Correction Factor Register" bitfld.long 0x00 9. " DIRECTION ,Direction status" "Decrement,Increment" hexmask.long.word 0x00 0.--8. 1. " PPM ,PPM value" width 0xb tree.end tree "Power Management Controller" tree "PMC Registers" base ad:0x7000E400 tree "PMC Control" width 15. group.long 0x00++0x0B line.long 0x00 "CNTRL_0,PMC control register" bitfld.long 0x00 22. " SHUTDOWN_OE ,Enable shutdown pad" "Disabled,Enabled" bitfld.long 0x00 20.--21. " CPUPWRGOOD_SEL ,CPUPWRGOOD pin select" "SOC_THERM_OC1,SOC_THERM_OC2,SOC_THERM_OC3,SOC_THERM_OC4" bitfld.long 0x00 19. " CPUPWRGOOD_EN ,CPU_PWR_GOOD (From PMIC to PMC) signal is enabled" "Disabled,Enabled" bitfld.long 0x00 18. " FUSE_OVERRIDE ,Fuse override" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " INTR_POLARITY ,INTR polarity inversion" "Disabled,Enabled" bitfld.long 0x00 16. " CPUPWRREQ_OE ,Power request output enable" "Disabled,Enabled" bitfld.long 0x00 15. " CPUPWRREQ_POLARITY ,Power request polarity inversion" "Disabled,Enabled" bitfld.long 0x00 14. " SIDE_EFFECT_LP0 ,Entering LP0 after powering down CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " AOINIT ,AO initialize purely SW diagnostic and interpretation" "Not done,Done" bitfld.long 0x00 12. " PWRGATE_DIS ,Power gating disable/global override" "Disabled,Enabled" bitfld.long 0x00 11. " SYSCLK_OE ,Enable output of system enable clock" "Disabled,Enabled" bitfld.long 0x00 10. " SYSCLK_POLARITY ,SYS_CLK_REQ enable polarity inversion" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PWRREQ_OE ,CORE_PWR_REQ output enable" "Disabled,Enabled" bitfld.long 0x00 8. " PWRREQ_POLARITY ,CORE_PWR_REQ polarity inversion" "Disabled,Enabled" bitfld.long 0x00 7. " BLINK_EN ,Blinking counter and blink output enable" "Disabled,Enabled" bitfld.long 0x00 5. " LATCHWAKE_EN ,Enable latching wakeup events" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MAIN_RST ,Reset everything but scratch 0 and reset status" "Disabled,Enabled" bitfld.long 0x00 2. " RTC_RST ,Software reset to RTC" "No reset,Reset" bitfld.long 0x00 1. " RTC_CLK_DIS ,Disable 32kHz clock to RTC" "Disabled,Enabled" line.long 0x04 "SEC_DISABLE_0,Secure register disable" bitfld.long 0x04 22. " PS18_NS_WRITE ,Non-secure write-disable for PS18_SET/CLEAR for Fuse/Kfuse" "OFF,ON" bitfld.long 0x04 21. " TSC_NS_WRITE ,Non-secure write-disable for the PMC_TSC_MULT register and the PMC_DPD_ENABLE[TSC_MULT_EN] register bit" "OFF,ON" bitfld.long 0x04 20. " AMAP_WRITE ,Disable writes to the PMC_GLB_AMAP_CFG register" "OFF,ON" bitfld.long 0x04 19. " READ7 ,Disable read from secure register 7" "No,Yes" textline " " bitfld.long 0x04 18. " WRITE7 ,Disable read from secure register 7" "No,Yes" bitfld.long 0x04 17. " READ6 ,Disable read from secure register 6" "No,Yes" bitfld.long 0x04 16. " WRITE6 ,Disable read from secure register 6" "No,Yes" bitfld.long 0x04 15. " READ5 ,Disable read from secure register 5" "No,Yes" textline " " bitfld.long 0x04 14. " WRITE5 ,Disable read from secure register 5" "No,Yes" bitfld.long 0x04 13. " READ4 ,Disable read from secure register 4" "No,Yes" bitfld.long 0x04 12. " WRITE4 ,Disable read from secure register 4" "No,Yes" bitfld.long 0x04 11. " READ3 ,Disable read from secure register 3" "No,Yes" textline " " bitfld.long 0x04 10. " WRITE3 ,Disable read from secure register 3" "No,Yes" bitfld.long 0x04 9. " READ2 ,Disable read from secure register 2" "No,Yes" bitfld.long 0x04 8. " WRITE2 ,Disable read from secure register 2" "No,Yes" bitfld.long 0x04 7. " READ1 ,Disable read from secure register 1" "No,Yes" textline " " bitfld.long 0x04 6. " WRITE1 ,Disable read from secure register 1" "No,Yes" bitfld.long 0x04 5. " READ0 ,Disable read from secure register 0" "No,Yes" bitfld.long 0x04 4. " WRITE0 ,Disable read from secure register 0" "No,Yes" bitfld.long 0x04 1. " READ ,Disable read from secure registers - all" "No,Yes" textline " " bitfld.long 0x04 0. " WRITE ,Disable read from secure registers - all" "No,Yes" line.long 0x08 "PMC_SWRST_0,Register write which resets PMC only" bitfld.long 0x08 0. " RST ,Software reset to PMC only" "No reset,Reset" tree.end tree "Wake Control" width 18. group.long 0x0C++0x0F line.long 0x00 "WAKE_MASK_0,PMC Wake-up Event Mask" bitfld.long 0x00 22. " CLK32K_OUT_IB ,Pin CLK32K_OUT_IB wake enable" "Active Low,Active High" bitfld.long 0x00 21. " GPIO_PL1_IB ,Pin GPIO_PL1_IB wake enable" "Active Low,Active High" bitfld.long 0x00 20. " GEN3_I2C_SDA ,Pin GEN3_I2C_SDA wake level" "Active Low,Active High" bitfld.long 0x00 19. " HDMI_CEC ,Pin HDMI_CEC wake level" "Active Low,Active High" textline " " bitfld.long 0x00 16. " RTC_IRQ ,RTC wake enable" "Disabled,Enabled" bitfld.long 0x00 15. " GPIO_PK6_IB ,Pin GPIO_PK6_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 14. " GPIO_PK4_IB ,Pin GPIO_PK4_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 13. " GEN2_I2C_SDA_IB ,Pin GEN2_I2C_SDA_IB wake enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " GEN1_I2C_SDA_IB ,Pin GEN1_I2C_SDA_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 11. " NFC_INT_IB ,Pin NFC_INT_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 10. " GPIO_PH6_IB ,Pin GPIO_PH6_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 9. " AOTAG2PMC_WAKE_EVENT ,Pin AOTAG2PMC_WAKE_EVENT wake enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " WIFI_WAKE_AP_IB ,Pin WIFI_WAKE_AP_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 7. " UART3_CTS_IB ,Pin UART3_CTS_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 6. " UART2_CTS_IB ,Pin UART2_CTS_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 5. " GPIO_PE7_IB ,Pin GPIO_PE7_IB wake enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " GPIO_PE6_IB ,Pin GPIO_PE6_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 3. " SPI2_MOSI_IB ,Pin SPI2_MOSI_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 2. " QSPI_CS_N_IB ,Pin QSPI_CS_N_IB wake enable" "Disabled,Enabled" bitfld.long 0x00 1. " GPIO_PA6_IB ,Pin GPIO_PA6_IB wake enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PEX_WAKE_N_IB ,Pin PEX_WAKE_N_IB wake enable" "Disabled,Enabled" line.long 0x04 "WAKE_LVL_0,PMC Wake Level" bitfld.long 0x04 22. " CLK32K_OUT_IB ,Pin CLK32K_OUT_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 21. " GPIO_PL1_IB ,Pin GPIO_PL1_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 20. " GEN3_I2C_SDA ,Pin GEN3_I2C_SDA wake level" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 19. " HDMI_CEC ,Pin HDMI_CEC wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 16. " RTC_IRQ ,RTC wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 15. " GPIO_PK6_IB ,Pin GPIO_PK6_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 14. " GPIO_PK4_IB ,Pin GPIO_PK4_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 13. " GEN2_I2C_SDA_IB ,Pin GEN2_I2C_SDA_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 12. " GEN1_I2C_SDA_IB ,Pin GEN1_I2C_SDA_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 11. " NFC_INT_IB ,Pin NFC_INT_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 10. " GPIO_PH6_IB ,Pin GPIO_PH6_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 9. " AOTAG2PMC_WAKE_EVENT ,Pin AOTAG2PMC_WAKE_EVENT wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 8. " WIFI_WAKE_AP_IB ,Pin WIFI_WAKE_AP_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 7. " UART3_CTS_IB ,Pin UART3_CTS_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 6. " UART2_CTS_IB ,Pin UART2_CTS_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 5. " GPIO_PE7_IB ,Pin GPIO_PE7_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 4. " GPIO_PE6_IB ,Pin GPIO_PE6_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 3. " SPI2_MOSI_IB ,Pin SPI2_MOSI_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 2. " QSPI_CS_N_IB ,Pin QSPI_CS_N_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 1. " GPIO_PA6_IB ,Pin GPIO_PA6_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 0. " PEX_WAKE_N_IB ,Pin PEX_WAKE_N_IB wake level" "ACTIVE_LOW,ACTIVE_HIGH" line.long 0x08 "APBDEV_PM,PMC Wake Status" eventfld.long 0x08 22. " CLK32K_OUT_IB ,Pin CLK32K_OUT_IB wake event" "Not set,Set" eventfld.long 0x08 21. " GPIO_PL1_IB ,Pin GPIO_PL1_IB wake event" "Not set,Set" eventfld.long 0x08 20. " GEN3_I2C_SDA ,Pin GEN3_I2C_SDA wake event" "Not set,Set" textline " " eventfld.long 0x08 19. " HDMI_CEC ,Pin HDMI_CEC wake event" "Not set,Set" eventfld.long 0x08 16. " RTC_IRQ ,RTC wake event" "Not set,Set" eventfld.long 0x08 15. " GPIO_PK6_IB ,Pin GPIO_PK6_IB wake event" "Not set,Set" textline " " eventfld.long 0x08 14. " GPIO_PK4_IB ,Pin GPIO_PK4_IB wake event" "Not set,Set" eventfld.long 0x08 13. " GEN2_I2C_SDA_IB ,Pin GEN2_I2C_SDA_IB wake event" "Not set,Set" eventfld.long 0x08 12. " GEN1_I2C_SDA_IB ,Pin GEN1_I2C_SDA_IB wake event" "Not set,Set" eventfld.long 0x08 11. " NFC_INT_IB ,Pin NFC_INT_IB wake event" "Not set,Set" textline " " eventfld.long 0x08 10. " GPIO_PH6_IB ,Pin GPIO_PH6_IB wake event" "Not set,Set" eventfld.long 0x08 9. " AOTAG2PMC_WAKE_EVENT ,Pin AOTAG2PMC_WAKE_EVENT wake event" "Not set,Set" eventfld.long 0x08 8. " WIFI_WAKE_AP_IB ,Pin WIFI_WAKE_AP_IB wake event" "Not set,Set" eventfld.long 0x08 7. " UART3_CTS_IB ,Pin UART3_CTS_IB wake event" "Not set,Set" textline " " eventfld.long 0x08 6. " UART2_CTS_IB ,Pin UART2_CTS_IB wake event" "Not set,Set" eventfld.long 0x08 5. " GPIO_PE7_IB ,Pin GPIO_PE7_IB wake event" "Not set,Set" eventfld.long 0x08 4. " GPIO_PE6_IB ,Pin GPIO_PE6_IB wake event" "Not set,Set" eventfld.long 0x08 3. " SPI2_MOSI_IB ,Pin SPI2_MOSI_IB wake event" "Not set,Set" textline " " eventfld.long 0x08 2. " QSPI_CS_N_IB ,Pin QSPI_CS_N_IB wake event" "Not set,Set" eventfld.long 0x08 1. " GPIO_PA6_IB ,Pin GPIO_PA6_IB wake event" "Not set,Set" eventfld.long 0x08 0. " PEX_WAKE_N_IB ,Pin PEX_WAKE_N_IB wake event" "Not set,Set" line.long 0x0C "SW_WAKE_STATUS_0,PMC Software Wake Status" eventfld.long 0x0C 22. " CLK32K_OUT_IB ,Pin CLK32K_OUT_IB wake reset" "Not set,Set" eventfld.long 0x0C 21. " GPIO_PL1_IB ,Pin GPIO_PL1_IB wake reset" "Not set,Set" eventfld.long 0x0C 20. " GEN3_I2C_SDA ,Pin GEN3_I2C_SDA wake reset" "Not set,Set" textline " " eventfld.long 0x0C 19. " HDMI_CEC ,Pin HDMI_CEC wake reset" "Not set,Set" eventfld.long 0x0C 16. " RTC_IRQ ,RTC wake reset" "Not set,Set" eventfld.long 0x0C 15. " GPIO_PK6_IB ,Pin GPIO_PK6_IB wake reset" "Not set,Set" textline " " eventfld.long 0x0C 14. " GPIO_PK4_IB ,Pin GPIO_PK4_IB wake reset" "Not set,Set" eventfld.long 0x0C 13. " GEN2_I2C_SDA_IB ,Pin GEN2_I2C_SDA_IB wake reset" "Not set,Set" eventfld.long 0x0C 12. " GEN1_I2C_SDA_IB ,Pin GEN1_I2C_SDA_IB wake reset" "Not set,Set" eventfld.long 0x0C 11. " NFC_INT_IB ,Pin NFC_INT_IB wake reset" "Not set,Set" textline " " eventfld.long 0x0C 10. " GPIO_PH6_IB ,Pin GPIO_PH6_IB wake reset" "Not set,Set" eventfld.long 0x0C 9. " AOTAG2PMC_WAKE_EVENT ,Pin AOTAG2PMC_WAKE_EVENT wake reset" "Not set,Set" eventfld.long 0x0C 8. " WIFI_WAKE_AP_IB ,Pin WIFI_WAKE_AP_IB wake reset" "Not set,Set" eventfld.long 0x0C 7. " UART3_CTS_IB ,Pin UART3_CTS_IB wake reset" "Not set,Set" textline " " eventfld.long 0x0C 6. " UART2_CTS_IB ,Pin UART2_CTS_IB wake reset" "Not set,Set" eventfld.long 0x0C 5. " GPIO_PE7_IB ,Pin GPIO_PE7_IB wake reset" "Not set,Set" eventfld.long 0x0C 4. " GPIO_PE6_IB ,Pin GPIO_PE6_IB wake reset" "Not set,Set" eventfld.long 0x0C 3. " SPI2_MOSI_IB ,Pin SPI2_MOSI_IB wake reset" "Not set,Set" textline " " eventfld.long 0x0C 2. " QSPI_CS_N_IB ,Pin QSPI_CS_N_IB wake reset" "Not set,Set" eventfld.long 0x0C 1. " GPIO_PA6_IB ,Pin GPIO_PA6_IB wake reset" "Not set,Set" eventfld.long 0x0C 0. " PEX_WAKE_N_IB ,Pin PEX_WAKE_N_IB wake reset" "Not set,Set" tree.end tree "DPD Control" width 18. group.long 0x1C++0x0B line.long 0x00 "DPD_PADS_ORIDE_0,DPD Pads Override" bitfld.long 0x00 20. " BLINK ,Override dpd idle state with blink output" "Disabled,Enabled" line.long 0x04 "DPD_SAMPLE_0,Deep Power Down Sample" bitfld.long 0x04 0. " ON ,Sampling of pads data trigger" "Disabled,Enabled" line.long 0x08 "DPD_ENABLE_0,Deep Power Down Enable" bitfld.long 0x08 1. " TSC_MULT_EN ,TSC multiplier enable" "Disabled,Enabled" bitfld.long 0x08 0. " ON ,Sampling of pads data trigger" "Disabled,Enabled" tree.end tree "Power Control 1" width 23. group.long 0x28++0x03 line.long 0x00 "PWRGATE_TIMER_OFF_0,Power Gate Timer Off Register" bitfld.long 0x00 28.--31. " RAIL7 ,Timer value for rail 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " RAIL6 ,Timer value for rail 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " RAIL5 ,Timer value for rail 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " RAIL4 ,Timer value for rail 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " RAIL3 ,Timer value for rail 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " RAIL2 ,Timer value for rail 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " RAIL1 ,Timer value for rail 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " RAIL0 ,Timer value for rail 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x2C++0x03 line.long 0x00 "CLAMP_STATUS_0,Clamp Status 0 Register" bitfld.long 0x00 29. " VE2 ,Clamp status of VE2 partition" "Disabled,Enabled" bitfld.long 0x00 28. " DFD ,Clamp status of DFD partition" "Disabled,Enabled" bitfld.long 0x00 27. " AUD ,Clamp status of AUD partition" "Disabled,Enabled" bitfld.long 0x00 26. " NVJPG ,Clamp status of NVJPG partition" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " NVDEC ,Clamp status of NVDEC partition" "Disabled,Enabled" bitfld.long 0x00 24. " IRAM ,Clamp status of IRAM partition" "Disabled,Enabled" bitfld.long 0x00 23. " VIC ,Clamp status of VIC partition" "Disabled,Enabled" bitfld.long 0x00 22. " XUSBC ,Clamp status of XUSBC partition" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " XUSBB ,Clamp status of XUSBB partition" "Disabled,Enabled" bitfld.long 0x00 20. " XUSBA ,Clamp status of XUSBA partition" "Disabled,Enabled" bitfld.long 0x00 19. " DISB ,Clamp status of DISB partition" "Disabled,Enabled" bitfld.long 0x00 18. " DIS ,Clamp status of DIS partition" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " SOR ,Clamp status of SOR partition" "Disabled,Enabled" bitfld.long 0x00 15. " C0NC ,Clamp status of C0NC partition" "Disabled,Enabled" bitfld.long 0x00 14. " CE0 ,Clamp status of CE0 partition" "Disabled,Enabled" bitfld.long 0x00 11. " CE3 ,Clamp status of CE3 partition" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " CE2 ,Clamp status of CE2 partition" "Disabled,Enabled" bitfld.long 0x00 9. " CE1 ,Clamp status of CE1 partition" "Disabled,Enabled" bitfld.long 0x00 8. " SAX ,Clamp status of SAX partition" "Disabled,Enabled" bitfld.long 0x00 6. " MPE ,Clamp status of MPE partition" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PCX ,Clamp status of PCX partition" "Disabled,Enabled" bitfld.long 0x00 2. " VE ,Clamp status of VE partition" "Disabled,Enabled" bitfld.long 0x00 0. " CRAIL ,Clamp status of CPU Rail" "Disabled,Enabled" group.long 0x30++0x07 line.long 0x00 "PWRGATE_TOGGLE_0,Power Gate Toggle" bitfld.long 0x00 8. " START ,Start power down/up" "Disabled,Enabled" bitfld.long 0x00 0.--4. " PARTID ,ID of partition to be toggled" "CRAIL,,Video Encode,PCX,,,MPEG Encode,,SAX,CE1,CE2,CE3,,,CE0,C0NC,,SOR,DIS,DISB,XUSBA,XUSBB,XUSBC,VIC,IRAM,NVDEC,NVJPG,AUD,DFD,VE2,," line.long 0x04 "REMOVE_CLAMPING_CMD_0,Remove Clamping" bitfld.long 0x04 29. " VE2 ,Remove clamping to VE2 partition" "No,Yes" bitfld.long 0x04 28. " DFD ,Remove clamping to DFD partition" "No,Yes" bitfld.long 0x04 27. " AUD ,Remove clamping to AUD partition" "No,Yes" bitfld.long 0x04 26. " NVJPG ,Remove clamping to NVJPG partition" "No,Yes" textline " " bitfld.long 0x04 25. " NVDEC ,Remove clamping to NVDEC partition" "No,Yes" bitfld.long 0x04 24. " IRAM ,Remove clamping to IRAM partition" "No,Yes" bitfld.long 0x04 23. " VIC ,Remove clamping to VIC partition" "No,Yes" bitfld.long 0x04 22. " XUSBC ,Remove clamping to XUSBC partition" "No,Yes" textline " " bitfld.long 0x04 21. " XUSBB ,Remove clamping to XUSBB partition" "No,Yes" bitfld.long 0x04 20. " XUSBA ,Remove clamping to XUSBA partition" "No,Yes" bitfld.long 0x04 19. " DISB ,Remove clamping to DISB partition" "No,Yes" bitfld.long 0x04 18. " DIS ,Remove clamping to DIS partition" "No,Yes" textline " " bitfld.long 0x04 17. " SOR ,Remove clamping to SOR partition" "No,Yes" bitfld.long 0x04 15. " C0NC ,Remove clamping to C0NC partition" "No,Yes" bitfld.long 0x04 14. " CE0 ,Remove clamping to CE0 partition" "No,Yes" bitfld.long 0x04 11. " CE3 ,Remove clamping to CE3 partition" "No,Yes" textline " " bitfld.long 0x04 10. " CE2 ,Remove clamping to CE2 partition" "No,Yes" bitfld.long 0x04 9. " CE1 ,Remove clamping to CE1 partition" "No,Yes" bitfld.long 0x04 8. " SAX ,Remove clamping to SAX partition" "No,Yes" bitfld.long 0x04 6. " MPE ,Remove clamping to MPE partition" "No,Yes" textline " " bitfld.long 0x04 3. " PCX ,Remove clamping to PCX partition" "No,Yes" bitfld.long 0x04 2. " VE ,Remove clamping to VE partition" "No,Yes" bitfld.long 0x04 0. " CRAIL ,Remove clamping to CPU Rail" "No,Yes" rgroup.long 0x38++0x03 line.long 0x00 "PWRGATE_STATUS_0,Power Gate Status" bitfld.long 0x00 29. " VE2 ,Status of VE2 partition" "OFF,ON" bitfld.long 0x00 28. " DFD ,Status of DFD partition" "OFF,ON" bitfld.long 0x00 27. " AUD ,Status of AUD partition" "OFF,ON" bitfld.long 0x00 26. " NVJPG ,Status of NVJPG partition" "OFF,ON" textline " " bitfld.long 0x00 25. " NVDEC ,Status of NVDEC partition" "OFF,ON" bitfld.long 0x00 24. " IRAM ,Status of IRAM partition" "OFF,ON" bitfld.long 0x00 23. " VIC ,Status of VIC partition" "OFF,ON" bitfld.long 0x00 22. " XUSBC ,Status of XUSBC partition" "OFF,ON" textline " " bitfld.long 0x00 21. " XUSBB ,Status of XUSBB partition" "OFF,ON" bitfld.long 0x00 20. " XUSBA ,Status of XUSBA partition" "OFF,ON" bitfld.long 0x00 19. " DISB ,Status of DISB partition" "OFF,ON" bitfld.long 0x00 18. " DIS ,Status of DIS partition" "OFF,ON" textline " " bitfld.long 0x00 17. " SOR ,Status of SOR partition" "OFF,ON" bitfld.long 0x00 15. " C0NC ,Status of C0NC partition" "OFF,ON" bitfld.long 0x00 14. " CE0 ,Status of CE0 partition" "OFF,ON" bitfld.long 0x00 11. " CE3 ,Status of CE3 partition" "OFF,ON" textline " " bitfld.long 0x00 10. " CE2 ,Status of CE2 partition" "OFF,ON" bitfld.long 0x00 9. " CE1 ,Status of CE1 partition" "OFF,ON" bitfld.long 0x00 8. " SAX ,Status of SAX partition" "OFF,ON" bitfld.long 0x00 6. " MPE ,Status of MPE partition" "OFF,ON" textline " " bitfld.long 0x00 3. " PCX ,Status of PCX partition" "OFF,ON" bitfld.long 0x00 2. " VE ,Status of VE partition" "OFF,ON" bitfld.long 0x00 0. " CRAIL ,Status of CPU Rail" "OFF,ON" group.long 0x3C++0x13 line.long 0x00 "PWRGOOD_TIMER_0,Power Good Timer" hexmask.long.byte 0x00 16.--23. 1. " OSC_PREPWR ,OSC clock stabilization timer prior to SoC rail pwr-req assertion" hexmask.long.byte 0x00 8.--15. 1. " OSC_POSTPWR ,OSC clock stabilization timer after SoC rail power is stabilized" hexmask.long.byte 0x00 0.--7. 1. " PWRGOOD ,SoC rail power-on stabilization timer" line.long 0x04 "BLINK_TIMER_0,Blinker Timer for External Blinker" hexmask.long.word 0x04 16.--31. 1. " DATA_OFF ,Time off" bitfld.long 0x04 15. " FORCE_BLINK ,32 kHz clock select for output" "Disabled,Enabled" hexmask.long.word 0x04 0.--14. 1. " DATA_ON ,Time on" line.long 0x08 "NO_IOPOWER_0,No I/O Power Register" bitfld.long 0x08 25. " DP ,Rail DP IOs - Boot ROM will clear this before using eMMC" "Disabled,Enabled" bitfld.long 0x08 24. " SDMMC2 ,Rail SDMMC2 I/Os" "Disabled,Enabled" bitfld.long 0x08 23. " SPI_HV ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x08 22. " SPI ,Rail AO I/Os" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " GPIO ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x08 20. " DMIC ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x08 19. " DBG ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x08 18. " AUDIO_HV ,Rail AO I/Os" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " MEM_COMP ,MEM0 ADDR1 (comp cell I/Os)" "Disabled,Enabled" bitfld.long 0x08 14. " SDMMC4 ,Rail sdmmc4 I/Os" "Disabled,Enabled" bitfld.long 0x08 13. " SDMMC3 ,Rail sdmmc3 I/Os" "Disabled,Enabled" bitfld.long 0x08 12. " SDMMC1 ,Rail sdmmc1 I/Os" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " PEX_CNTRL ,Rail pex_cntrl I/Os" "Disabled,Enabled" bitfld.long 0x08 10. " CAM ,Rail cam I/Os" "Disabled,Enabled" bitfld.long 0x08 9. " MIPI ,Rail mipi I/Os" "Disabled,Enabled" bitfld.long 0x08 7. " MEM ,Rail mem I/Os" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " AUDIO ,Rail i2s I/Os" "Disabled,Enabled" bitfld.long 0x08 2. " UART ,Rail dbg I/Os" "Disabled,Enabled" bitfld.long 0x08 0. " SYS ,Rail ao I/Os" "Disabled,Enabled" line.long 0x0C "PWR_DET_0,Power Detect" bitfld.long 0x0C 23. " SPI_HV ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x0C 22. " SPI ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x0C 21. " GPIO ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x0C 20. " DMIC ,Rail AO I/Os" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " DBG ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x0C 18. " AUDIO_HV ,Rail AO I/Os" "Disabled,Enabled" bitfld.long 0x0C 13. " SDMMC3 ,Rail sdmmc3 I/Os" "Disabled,Enabled" bitfld.long 0x0C 12. " SDMMC1 ,Rail sdmmc1 I/Os" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " PEX_CNTRL ,Rail pex_cntrl I/Os" "Disabled,Enabled" bitfld.long 0x0C 10. " CAM ,Rail cam I/Os" "Disabled,Enabled" bitfld.long 0x0C 5. " AUDIO ,Rail i2s I/Os" "Disabled,Enabled" bitfld.long 0x0C 2. " UART ,Rail dbg I/Os" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " SYS ,Rail ao I/Os" "Disabled,Enabled" line.long 0x10 "PWR_DET_LATCH_0,Power Detect Latch" bitfld.long 0x10 0. " LATCH ,Power detect latch" "Disabled,Enabled" tree.end tree "Scratch Registers 1" width 19. group.long 0x50++0x03 line.long 0x00 "SCRATCH0_0,Scratch register 0" group.long 0x54++0x03 line.long 0x00 "SCRATCH1_0,Scratch register 1" group.long 0x58++0x03 line.long 0x00 "SCRATCH2_0,Scratch register 2" group.long 0x5C++0x03 line.long 0x00 "SCRATCH3_0,Scratch register 3" group.long 0x60++0x03 line.long 0x00 "SCRATCH4_0,Scratch register 4" group.long 0x64++0x03 line.long 0x00 "SCRATCH5_0,Scratch register 5" group.long 0x68++0x03 line.long 0x00 "SCRATCH6_0,Scratch register 6" group.long 0x6C++0x03 line.long 0x00 "SCRATCH7_0,Scratch register 7" group.long 0x70++0x03 line.long 0x00 "SCRATCH8_0,Scratch register 8" group.long 0x74++0x03 line.long 0x00 "SCRATCH9_0,Scratch register 9" group.long 0x78++0x03 line.long 0x00 "SCRATCH10_0,Scratch register 10" group.long 0x7C++0x03 line.long 0x00 "SCRATCH11_0,Scratch register 11" group.long 0x80++0x03 line.long 0x00 "SCRATCH12_0,Scratch register 12" group.long 0x84++0x03 line.long 0x00 "SCRATCH13_0,Scratch register 13" group.long 0x88++0x03 line.long 0x00 "SCRATCH14_0,Scratch register 14" group.long 0x8C++0x03 line.long 0x00 "SCRATCH15_0,Scratch register 15" group.long 0x90++0x03 line.long 0x00 "SCRATCH16_0,Scratch register 16" group.long 0x94++0x03 line.long 0x00 "SCRATCH17_0,Scratch register 17" group.long 0x98++0x03 line.long 0x00 "SCRATCH18_0,Scratch register 18" group.long 0x9C++0x03 line.long 0x00 "SCRATCH19_0,Scratch register 19" group.long 0xA0++0x03 line.long 0x00 "SCRATCH20_0,Scratch register 20" group.long 0xA4++0x03 line.long 0x00 "SCRATCH21_0,Scratch register 21" group.long 0xA8++0x03 line.long 0x00 "SCRATCH22_0,Scratch register 22" group.long 0xAC++0x03 line.long 0x00 "SCRATCH23_0,Scratch register 23" group.long 0xB0++0x03 line.long 0x00 "SECURE_SCRATCH0_0,Secure scratch register 0" group.long 0xB4++0x03 line.long 0x00 "SECURE_SCRATCH1_0,Secure scratch register 1" group.long 0xB8++0x03 line.long 0x00 "SECURE_SCRATCH2_0,Secure scratch register 2" group.long 0xBC++0x03 line.long 0x00 "SECURE_SCRATCH3_0,Secure scratch register 3" group.long 0xC0++0x03 line.long 0x00 "SECURE_SCRATCH4_0,Secure scratch register 4" group.long 0xC4++0x03 line.long 0x00 "SECURE_SCRATCH5_0,Secure scratch register 5" tree.end tree "Power Control 2" width 22. group.long 0xD0++0x1B line.long 0x00 "PG_MASK_0,PG mask register" hexmask.long.byte 0x00 24.--31. 1. " PCX ,Mask PCX rail" hexmask.long.byte 0x00 8.--15. 1. " VE ,Mask VE rail" line.long 0x04 "PG_MASK_1_0,PG Mask 1 Register" hexmask.long.byte 0x04 24.--31. 1. " SAX ,Mask SAX rail" hexmask.long.byte 0x04 8.--15. 1. " MPE ,Mask MPE rail" line.long 0x08 "AUTO_WAKE_LVL_0,Wake pads sampling control register" bitfld.long 0x08 0. " SMPL ,Causes PMC to sample the wake pads" "Disabled,Enabled" line.long 0x0C "AUTO_WAKE_LVL_MASK_0,Wake pads sampling enable register" line.long 0x10 "WAKE_DELAY_0,Wake delay control register" hexmask.long.word 0x10 0.--15. 1. " VALUE ,Delay value" line.long 0x14 "PWR_DET_VAL_0,Power detect cells control register" bitfld.long 0x14 23. " SPI_HV ,rail AO I/Os" "Disabled,Enabled" bitfld.long 0x14 21. " GPIO ,rail AO I/Os" "Disabled,Enabled" bitfld.long 0x14 18. " AUDIO_HV ,rail AO I/Os" "Disabled,Enabled" bitfld.long 0x14 13. " SDMMC3 ,Rail sdmmc3 I/Os" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " SDMMC1 ,Rail sdmmc1 I/Os" "Disabled,Enabled" line.long 0x18 "DDR_PWR_0,E_18V pin from DDR pads control register" bitfld.long 0x18 3. " SPI ,SPI pins set" "E_12V,E_18V" bitfld.long 0x18 2. " EMMC2 ,SDMMC2 pins set" "E_12V,E_18V" bitfld.long 0x18 1. " EMMC ,GMI pins set" "E_12V,E_18V" bitfld.long 0x18 0. " VAL ,DVI pins set" "E_12V,E_18V" group.long 0xEC++0x0F line.long 0x00 "USB_DEBOUNCE_DEL_0,Clock cycles for USB signal events debouncing" bitfld.long 0x00 20.--23. " UHSIC_LINE_DEB_CNT ,Number of 32kHz debounce cycles for UHSIC port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " UTMIP_LINE_DEB_CNT ,Number of 32kHz debounce cycles for UTMIP port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. " VAL ,Debounce period for ID and VBUS events" line.long 0x04 "USB_AO_0,Power down for various USB features" bitfld.long 0x04 24. " DATA1_VAL_PD_P0 ,Power Down D- DATA1_VAL receiver for UHSIC P0" "Disabled,Enabled" bitfld.long 0x04 23. " ID_PD_P3 ,Power Down ID Wake up for UTMIP P3" "Disabled,Enabled" bitfld.long 0x04 22. " VBUS_WAKEUP_PD_P3 ,Power Down Vbus Wake Up for UTMIP P3" "Disabled,Enabled" bitfld.long 0x04 21. " USBON_VAL_PD_P3 ,Power Down D- USBOP_VAL receiver for UTMIP P3" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " USBOP_VAL_PD_P3 ,Power Down D+ USBOP_VAL receiver for UTMIP P3" "Disabled,Enabled" bitfld.long 0x04 17. " DATA_VAL_PD_P1 ,Power Down D- DATA0_VAL receiver for UHSIC P1" "Disabled,Enabled" bitfld.long 0x04 16. " STROBE_VAL_PD_P1 ,Power Down D+ STROBE_VAL receiver for UHSIC P1" "Disabled,Enabled" bitfld.long 0x04 13. " DATA_VAL_PD_P0 ,Power down D- DATA_VAL receiver for UHSIC P0" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " STROBE_VAL_PD_P0 ,Power down Power down D+ STROBE_VAL receiver for UHSIC P0" "Disabled,Enabled" bitfld.long 0x04 11. " ID_PD_P2 ,Power down D Wake up for UTMIP" "Disabled,Enabled" bitfld.long 0x04 10. " VBUS_WAKEUP_PD_P2 ,Power down Vbus Wake Up for UTMIP P2" "Disabled,Enabled" bitfld.long 0x04 9. " USBON_VAL_PD_P2 ,Power down D- USBOP_VAL receiver for UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " USBOP_VAL_PD_P2 ,D+ USBOP_VAL receiver for UTMIP P0" "Disabled,Enabled" bitfld.long 0x04 7. " ID_PD_P1 ,Power down ID Wake up for UTMIP P1" "Disabled,Enabled" bitfld.long 0x04 6. " VBUS_WAKEUP_PD_P1 ,Power Down Vbus Wake Up for UTMIP P1" "Disabled,Enabled" bitfld.long 0x04 5. " USBON_VAL_PD_P1 ,Power down D- USBOP_VAL receiver for UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " USBOP_VAL_PD_P1 ,Power down D+ USBOP_VAL receiver for UTMIP P0" "Disabled,Enabled" bitfld.long 0x04 3. " ID_PD_P0 ,Power down ID Wake up for UTMIP" "Disabled,Enabled" bitfld.long 0x04 2. " VBUS_WAKEUP_PD_P0 ,Power down Vbus Wake Up for UTMIP P0" "Disabled,Enabled" bitfld.long 0x04 1. " USBON_VAL_PD_P0 ,Power down D- USBOP_VAL receiver for UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " USBOP_VAL_PD_P0 ,Power down D+ USBOP_VAL receiver for UTMIP P0" "Disabled,Enabled" line.long 0x08 "CRYPTO_OP_0,Crypto engine disable sticky register" bitfld.long 0x08 0. " VAL ,Crypto engine disable" "Enabled,Disabled" line.long 0x0C "PLLP_WB0_OVERRIDE_0,Master control for all wb0 pll override" bitfld.long 0x0C 16. " PLLP_IDDQ ,Enabling during LP0 exit" "Disabled,Enabled" bitfld.long 0x0C 15. " PLLU_IDDQ ,Enabling during LP0 exit" "Disabled,Enabled" bitfld.long 0x0C 14. " DUAL_PLLM_IDDQ ,Drives IDDQ input to dual PLLM macro" "Disabled,Enabled" bitfld.long 0x0C 13. " DUAL_PLLM_SELVCO ,Drives SELVCO input to dual PLLM macro" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " PLLM_ENABLE ,PLLM enable" "Disabled,Enabled" bitfld.long 0x0C 11. " PLLM_OVERRIDE_ENABLE ,PLLM override enable" "Disabled,Enabled" bitfld.long 0x0C 10. " PLLU_ENABLE ,PLLU enable" "Disabled,Enabled" bitfld.long 0x0C 9. " PLLU_OVERRIDE_ENABLE ,PLLU override enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " OSC_OVERRIDE_ENABLE ,OSC override enable" "Disabled,Enabled" bitfld.long 0x0C 6.--7. " PLL_REF_DIV ,PLL reference clock divide for all pll's" "/1,/2,/4," bitfld.long 0x0C 2.--5. " OSC_FREQ ,Oscillator frequency for shared pll reference" "13 MHz,16.8 MHz,,,19.2 MHz,38.4 MHz,,,12 MHz,48 MHz,,,26 Mhz,,," bitfld.long 0x0C 1. " PLLP_ENABLE ,PLLE enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " PLLP_OVERRIDE_ENABLE ,PLLP override enable" "Disabled,Enabled" tree.end tree "Scratch Registers 2" width 26. group.long 0xFC++0x03 line.long 0x00 "SCRATCH24_0,Scratch register 24" group.long 0x100++0x03 line.long 0x00 "SCRATCH25_0,Scratch register 25" group.long 0x104++0x03 line.long 0x00 "SCRATCH26_0,Scratch register 26" group.long 0x108++0x03 line.long 0x00 "SCRATCH27_0,Scratch register 27" group.long 0x10C++0x03 line.long 0x00 "SCRATCH28_0,Scratch register 28" group.long 0x110++0x03 line.long 0x00 "SCRATCH29_0,Scratch register 29" group.long 0x114++0x03 line.long 0x00 "SCRATCH30_0,Scratch register 30" group.long 0x118++0x03 line.long 0x00 "SCRATCH31_0,Scratch register 31" group.long 0x11C++0x03 line.long 0x00 "SCRATCH32_0,Scratch register 32" group.long 0x120++0x03 line.long 0x00 "SCRATCH33_0,Scratch register 33" group.long 0x124++0x03 line.long 0x00 "SCRATCH34_0,Scratch register 34" group.long 0x128++0x03 line.long 0x00 "SCRATCH35_0,Scratch register 35" group.long 0x12C++0x03 line.long 0x00 "SCRATCH36_0,Scratch register 36" group.long 0x130++0x03 line.long 0x00 "SCRATCH37_0,Scratch register 37" group.long 0x134++0x03 line.long 0x00 "SCRATCH38_0,Scratch register 38" group.long 0x138++0x03 line.long 0x00 "SCRATCH39_0,Scratch register 39" group.long 0x13C++0x03 line.long 0x00 "SCRATCH40_0,Scratch register 40" group.long 0x140++0x03 line.long 0x00 "SCRATCH41_0,Scratch register 41" group.long 0x144++0x03 line.long 0x00 "SCRATCH42_0,Scratch register 42" group.long 0x148++0x03 line.long 0x00 "BONDOUT_MIRROR0_0,Secure scratch register 0" group.long 0x14C++0x03 line.long 0x00 "BONDOUT_MIRROR1_0,Secure scratch register 1" group.long 0x150++0x03 line.long 0x00 "BONDOUT_MIRROR2_0,Secure scratch register 2" group.long 0x154++0x0B line.long 0x00 "SYS_33V_EN_0,Voltage select" bitfld.long 0x00 0. " VAL ,Voltage value select" "1.8 V,3.3 V" line.long 0x04 "BONDOUT_MIRROR_ACCESS_0,Write and read control for bondout secure registers" bitfld.long 0x04 1. " BREAD ,Disable read from bondout secure registers" "OFF,ON" bitfld.long 0x04 0. " BWRITE ,Disable write to bondout secure registers" "OFF,ON" line.long 0x08 "PMC_GATE_0,Software controlled synchronization between APB domain and the 32 kHz domain" bitfld.long 0x08 1. " GATE_DBNS ,GATE_DBNS" "OFF,ON" bitfld.long 0x08 0. " GATE_WAKE ,GATE_WAKE" "OFF,ON" tree.end tree "Wake Control 2" width 23. group.long 0x160++0x13 line.long 0x00 "WAKE2_MASK_0,Wake-up event mask" bitfld.long 0x00 31. " MOTION_INT_IB ,MOTION_INT_IB" "Disabled,Enabled" bitfld.long 0x00 30. " TOUCH_INT_IB ,TOUCH_INT_IB" "Disabled,Enabled" bitfld.long 0x00 29. " MODEM_WAKE_AP_IB ,MODEM_WAKE_AP_IB" "Disabled,Enabled" bitfld.long 0x00 27. " UART4_CTS_IB ,UART4_CTS_IB" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " LCD_GPIO2_IB ,LCD_GPIO2_IB" "Disabled,Enabled" bitfld.long 0x00 25. " LCD_GPIO1_IB ,LCD_GPIO1_IB" "Disabled,Enabled" bitfld.long 0x00 24. " LCD_RST_IB ,LCD_RST_IB" "Disabled,Enabled" bitfld.long 0x00 23. " USB_VBUS_EN_1 ,USB_VBUS_EN_1" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " USB_VBUS_EN_0 ,USB_VBUS_EN_0" "Disabled,Enabled" bitfld.long 0x00 21. " HDMI_INT_DP_HPD ,HDMI_INT_DP_HPD" "Disabled,Enabled" bitfld.long 0x00 20. " BT_WAKE_AP_IB ,BT_WAKE_AP_IB" "Disabled,Enabled" bitfld.long 0x00 19. " PWR_INT_N_IB ,PWR_INT_N_IB" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " DP_HPD_0_IB ,DP_HPD_0_IB" "Disabled,Enabled" bitfld.long 0x00 17. " GPIO_PZ5_IB ,GPIO_PZ5_IB" "Disabled,Enabled" bitfld.long 0x00 16. " CAM_I2C_SDA_IB ,CAM_I2C_SDA_IB" "Disabled,Enabled" bitfld.long 0x00 15. " CAM_I2C_SCL_IB ,CAM_I2C_SCL_IB" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SDMMC4_DAT1_IB ,SDMMC4_DAT1_IB" "Disabled,Enabled" bitfld.long 0x00 13. " SDMMC3_DAT1_IB ,SDMMC3_DAT1_IB" "Disabled,Enabled" bitfld.long 0x00 12. " WAKE2PMC_XUSB_SYSTEM_WAKEUP ,WAKE2PMC_XUSB_SYSTEM_WAKEUP" "Disabled,Enabled" bitfld.long 0x00 11. " UHSIC_WAKE ,UHSIC_WAKE" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " UTMIP_3_WAKE ,UTMIP_3_WAKE" "Disabled,Enabled" bitfld.long 0x00 9. " UTMIP_2_WAKE ,UTMIP_2_WAKE" "Disabled,Enabled" bitfld.long 0x00 8. " UTMIP_1_WAKE ,UTMIP_1_WAKE" "Disabled,Enabled" bitfld.long 0x00 7. " UTMIP_0_WAKE ,UTMIP_0_WAKE" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " GPIO_PZ2_IB ,GPIO_PZ2_IB" "Disabled,Enabled" bitfld.long 0x00 3. " GPIO_PZ1_IB ,GPIO_PZ1_IB" "Disabled,Enabled" bitfld.long 0x00 2. " GPIO_PZ0_IB ,GPIO_PZ0_IB" "Disabled,Enabled" bitfld.long 0x00 1. " TEMP_ALERT_IB ,TEMP_ALERT_IB" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ALS_PROX_INT_IB ,ALS_PROX_INT_IB" "Disabled,Enabled" line.long 0x04 "WAKE2_LVL_0,PMC Wake Level" bitfld.long 0x04 31. " MOTION_INT_IB ,MOTION_INT_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 30. " TOUCH_INT_IB ,TOUCH_INT_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 29. " MODEM_WAKE_AP_IB ,MODEM_WAKE_AP_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 27. " UART4_CTS_IB ,UART4_CTS_IB" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 26. " LCD_GPIO2_IB ,LCD_GPIO2_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 25. " LCD_GPIO1_IB ,LCD_GPIO1_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 24. " LCD_RST_IB ,LCD_RST_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 23. " USB_VBUS_EN_1 ,USB_VBUS_EN_1" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 22. " USB_VBUS_EN_0 ,USB_VBUS_EN_0" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 21. " HDMI_INT_DP_HPD ,HDMI_INT_DP_HPD" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 20. " BT_WAKE_AP_IB ,BT_WAKE_AP_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 19. " PWR_INT_N_IB ,PWR_INT_N_IB" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 18. " DP_HPD_0_IB ,DP_HPD_0_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 17. " GPIO_PZ5_IB ,GPIO_PZ5_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 16. " CAM_I2C_SDA_IB ,CAM_I2C_SDA_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 15. " CAM_I2C_SCL_IB ,CAM_I2C_SCL_IB" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 14. " SDMMC4_DAT1_IB ,SDMMC4_DAT1_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 13. " SDMMC3_DAT1_IB ,SDMMC3_DAT1_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 12. " WAKE2PMC_XUSB_SYSTEM_WAKEUP ,WAKE2PMC_XUSB_SYSTEM_WAKEUP" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 11. " UHSIC_WAKE ,UHSIC_WAKE" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 10. " UTMIP_3_WAKE ,UTMIP_3_WAKE" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 9. " UTMIP_2_WAKE ,UTMIP_2_WAKE" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 8. " UTMIP_1_WAKE ,UTMIP_1_WAKE" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 7. " UTMIP_0_WAKE ,UTMIP_0_WAKE" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 4. " GPIO_PZ2_IB ,GPIO_PZ2_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 3. " GPIO_PZ1_IB ,GPIO_PZ1_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 2. " GPIO_PZ0_IB ,GPIO_PZ0_IB" "ACTIVE_LOW,ACTIVE_HIGH" bitfld.long 0x04 1. " TEMP_ALERT_IB ,TEMP_ALERT_IB" "ACTIVE_LOW,ACTIVE_HIGH" textline " " bitfld.long 0x04 0. " ALS_PROX_INT_IB ,ALS_PROX_INT_IB" "ACTIVE_LOW,ACTIVE_HIGH" line.long 0x08 "WAKE2_STATUS_0,PMC wake status" eventfld.long 0x08 31. " MOTION_INT_IB ,MOTION_INT_IB" "Not set,Set" eventfld.long 0x08 30. " TOUCH_INT_IB ,TOUCH_Int_IB" "Not set,Set" eventfld.long 0x08 29. " MODEM_WAKE_AP_IB ,MODEM_WAKE_AP_IB" "Not set,Set" eventfld.long 0x08 27. " UART4_CTS_IB ,UART4_CTS_IB" "Not set,Set" textline " " eventfld.long 0x08 26. " LCD_GPIO2_IB ,LCD_GPIO2_IB" "Not set,Set" eventfld.long 0x08 25. " LCD_GPIO1_IB ,LCD_GPIO1_IB" "Not set,Set" eventfld.long 0x08 24. " LCD_RST_IB ,LCD_RST_IB" "Not set,Set" eventfld.long 0x08 23. " USB_VBUS_EN_1 ,USB_VBUS_EN_1" "Not set,Set" textline " " eventfld.long 0x08 22. " USB_VBUS_EN_0 ,USB_VBUS_EN_0" "Not set,Set" eventfld.long 0x08 21. " HDMI_INT_DP_HPD ,HDMI_INT_DP_HPD" "Not set,Set" eventfld.long 0x08 20. " BT_WAKE_AP_IB ,BT_WAKE_AP_IB" "Not set,Set" eventfld.long 0x08 19. " PWR_INT_N_IB ,PWR_INT_N_IB" "Not set,Set" textline " " eventfld.long 0x08 18. " DP_HPD_0_IB ,DP_HPD_0_IB" "Not set,Set" eventfld.long 0x08 17. " GPIO_PZ5_IB ,GPIO_PZ5_IB" "Not set,Set" eventfld.long 0x08 16. " CAM_I2C_SDA_IB ,CAM_I2c_sda_IB" "Not set,Set" eventfld.long 0x08 15. " CAM_I2C_SCL_IB ,CAM_I2C_Scl_IB" "Not set,Set" textline " " eventfld.long 0x08 14. " SDMMC4_DAT1_IB ,SDMMC4_DAT1_IB" "Not set,Set" eventfld.long 0x08 13. " SDMMC3_DAT1_IB ,SDMMC3_DAT1_IB" "Not set,Set" eventfld.long 0x08 12. " WAKE2PMC_XUSB_SYSTEM_WAKEUP ,WAKE2PMC_XUSB_SYSTEM_WAKEUP" "Not set,Set" eventfld.long 0x08 11. " UHSIC_WAKE ,UHSIC_WAKE" "Not set,Set" textline " " eventfld.long 0x08 10. " UTMIP_3_WAKE ,UTMIP_3_WAKE" "Not set,Set" eventfld.long 0x08 9. " UTMIP_2_WAKE ,UTMIP_2_WAKE" "Not set,Set" eventfld.long 0x08 8. " UTMIP_1_WAKE ,UTMIP_1_WAKE" "Not set,Set" eventfld.long 0x08 7. " UTMIP_0_WAKE ,UTMIP_0_WAKE" "Not set,Set" textline " " eventfld.long 0x08 4. " GPIO_PZ2_IB ,GPIO_PZ2_IB" "Not set,Set" eventfld.long 0x08 3. " GPIO_PZ1_IB ,GPIO_PZ1_IB" "Not set,Set" eventfld.long 0x08 2. " GPIO_PZ0_IB ,GPIO_PZ0_IB" "Not set,Set" eventfld.long 0x08 1. " TEMP_ALERT_IB ,TEMP_ALERT_IB" "Not set,Set" textline " " eventfld.long 0x08 0. " ALS_PROX_INT_IB ,ALS_PROX_INT_IB" "Not set,Set" line.long 0x0C "SW_WAKE2_STATUS_0,PMC Software Wake Status" eventfld.long 0x0C 31. " MOTION_INT_IB ,MOTION_INT_IB" "Not set,Set" eventfld.long 0x0C 30. " TOUCH_INT_IB ,TOUCH_INT_IB" "Not set,Set" eventfld.long 0x0C 29. " MODEM_WAKE_AP_IB ,MODEM_WAKE_AP_IB" "Not set,Set" eventfld.long 0x0C 27. " UART4_CTS_IB ,UART4_CTS_IB" "Not set,Set" textline " " eventfld.long 0x0C 26. " LCD_GPIO2_IB ,LCD_GPIO2_IB" "Not set,Set" eventfld.long 0x0C 25. " LCD_GPIO1_IB ,LCD_GPIO1_IB" "Not set,Set" eventfld.long 0x0C 24. " LCD_RST_IB ,LCD_RST_IB" "Not set,Set" eventfld.long 0x0C 23. " USB_VBUS_EN_1 ,USB_VBUS_EN_1" "Not set,Set" textline " " eventfld.long 0x0C 22. " USB_VBUS_EN_0 ,USB_VBUS_EN_0" "Not set,Set" eventfld.long 0x0C 21. " HDMI_INT_DP_HPD ,HDMI_INT_DP_HPD" "Not set,Set" eventfld.long 0x0C 20. " BT_WAKE_AP_IB ,BT_WAKE_AP_IB" "Not set,Set" eventfld.long 0x0C 19. " PWR_INT_N_IB ,PWR_INT_N_IB" "Not set,Set" textline " " eventfld.long 0x0C 18. " DP_HPD_0_IB ,DP_HPD_0_IB" "Not set,Set" eventfld.long 0x0C 17. " GPIO_PZ5_IB ,GPIO_PZ5_IB" "Not set,Set" eventfld.long 0x0C 16. " CAM_I2C_SDA_IB ,CAM_I2C_SDA_IB" "Not set,Set" eventfld.long 0x0C 15. " CAM_I2C_SCL_IB ,CAM_I2C_SCL_IB" "Not set,Set" textline " " eventfld.long 0x0C 14. " SDMMC4_DAT1_IB ,SDMMC4_DAT1_IB" "Not set,Set" eventfld.long 0x0C 13. " SDMMC3_DAT1_IB ,SDMMC3_DAT1_IB" "Not set,Set" eventfld.long 0x0C 12. " WAKE2PMC_XUSB_SYSTEM_WAKEUP ,WAKE2PMC_XUSB_SYSTEM_WAKEUP" "Not set,Set" eventfld.long 0x0C 11. " UHSIC_WAKE ,UHSIC_WAKE" "NOT set,Set" textline " " eventfld.long 0x0C 10. " UTMIP_3_WAKE ,UTMIP_3_WAKE" "Not set,Set" eventfld.long 0x0C 9. " UTMIP_2_WAKE ,UTMIP_2_WAKE" "Not set,Set" eventfld.long 0x0C 8. " UTMIP_1_WAKE ,UTMIP_1_WAKE" "Not set,Set" eventfld.long 0x0C 7. " UTMIP_0_WAKE ,UTMIP_0_WAKE" "Not set,Set" textline " " eventfld.long 0x0C 4. " GPIO_PZ2_IB ,GPIO_PZ2_IB" "Not set,Set" eventfld.long 0x0C 3. " GPIO_PZ1_IB ,GPIO_PZ1_IB" "Not set,Set" eventfld.long 0x0C 2. " GPIO_PZ0_IB ,GPIO_PZ0_IB" "Not set,Set" eventfld.long 0x0C 1. " TEMP_ALERT_IB ,TEMP_ALERT_IB" "Not set,Set" textline " " eventfld.long 0x0C 0. " ALS_PROX_INT_IB ,ALS_PROX_INT_IB" "Not set,Set" line.long 0x10 "AUTO_WAKE2_LVL_MASK_0,Auto wake-up level mask" bitfld.long 0x10 31. " MOTION_INT_IB ,MOTION_INT_IB" "No effect,Wake-up" bitfld.long 0x10 30. " TOUCH_INT_IB ,TOUCH_INT_IB" "No effect,Wake-up" bitfld.long 0x10 29. " MODEM_WAKE_AP_IB ,MODEM_WAKE_AP_IB" "No effect,Wake-up" bitfld.long 0x10 27. " UART4_CTS_IB ,UART4_CTS_IB" "No effect,Wake-up" textline " " bitfld.long 0x10 26. " LCD_GPIO2_IB ,LCD_GPIO2_IB" "No effect,Wake-up" bitfld.long 0x10 25. " LCD_GPIO1_IB ,LCD_GPIO1_IB" "No effect,Wake-up" bitfld.long 0x10 24. " LCD_RST_IB ,LCD_RST_IB" "No effect,Wake-up" bitfld.long 0x10 23. " USB_VBUS_EN_1 ,USB_VBUS_EN_1" "No effect,Wake-up" textline " " bitfld.long 0x10 22. " USB_VBUS_EN_0 ,USB_VBUS_EN_0" "No effect,Wake-up" bitfld.long 0x10 21. " HDMI_INT_DP_HPD ,HDMI_INT_DP_HPD" "No effect,Wake-up" bitfld.long 0x10 20. " BT_WAKE_AP_IB ,BT_WAKE_AP_IB" "No effect,Wake-up" bitfld.long 0x10 19. " PWR_INT_N_IB ,PWR_INT_N_IB" "No effect,Wake-up" textline " " bitfld.long 0x10 18. " DP_HPD_0_IB ,DP_HPD_0_IB" "No effect,Wake-up" bitfld.long 0x10 17. " GPIO_PZ5_IB ,GPIO_PZ5_IB" "No effect,Wake-up" bitfld.long 0x10 16. " CAM_I2C_SDA_IB ,CAM_I2C_SDA_IB" "No effect,Wake-up" bitfld.long 0x10 15. " CAM_I2C_SCL_IB ,CAM_I2C_SCL_IB" "No effect,Wake-up" textline " " bitfld.long 0x10 14. " SDMMC4_DAT1_IB ,SDMMC4_DAT1_IB" "No effect,Wake-up" bitfld.long 0x10 13. " SDMMC3_DAT1_IB ,SDMMC3_DAT1_IB" "No effect,Wake-up" bitfld.long 0x10 12. " WAKE2PMC_XUSB_SYSTEM_WAKEUP ,WAKE2PMC_XUSB_SYSTEM_WAKEUP" "No effect,Wake-up" bitfld.long 0x10 11. " UHSIC_WAKE ,UHSIC_WAKE" "NO effect,Wake-up" textline " " bitfld.long 0x10 10. " UTMIP_3_WAKE ,UTMIP_3_WAKE" "No effect,Wake-up" bitfld.long 0x10 9. " UTMIP_2_WAKE ,UTMIP_2_WAKE" "No effect,Wake-up" bitfld.long 0x10 8. " UTMIP_1_WAKE ,UTMIP_1_WAKE" "No effect,Wake-up" bitfld.long 0x10 7. " UTMIP_0_WAKE ,UTMIP_0_WAKE" "No effect,Wake-up" textline " " bitfld.long 0x10 4. " GPIO_PZ2_IB ,GPIO_PZ2_IB" "No effect,Wake-up" bitfld.long 0x10 3. " GPIO_PZ1_IB ,GPIO_PZ1_IB" "No effect,Wake-up" bitfld.long 0x10 2. " GPIO_PZ0_IB ,GPIO_PZ0_IB" "No effect,Wake-up" bitfld.long 0x10 1. " TEMP_ALERT_IB ,TEMP_ALERT_IB" "No effect,Wake-up" textline " " bitfld.long 0x10 0. " ALS_PROX_INT_IB ,ALS_PROX_INT_IB" "No effect,Wake-up" tree.end tree "Power gate" width 22. group.long 0x174++0x03 line.long 0x00 "PG_MASK_2_0,PG mask register" hexmask.long.byte 0x00 24.--31. 1. " IRAM ,Mask IRAM rail" hexmask.long.byte 0x00 16.--23. 1. " VIC ,Mask VIC rail" group.long 0x178++0x03 line.long 0x00 "PG_MASK_CE1_0,CE1 rail mask" hexmask.long.byte 0x00 0.--7. 1. " MASK ,Mask CE1 rail" group.long 0x17C++0x03 line.long 0x00 "PG_MASK_CE2_0,CE2 rail mask" hexmask.long.byte 0x00 0.--7. 1. " MASK ,Mask CE1 rail" group.long 0x180++0x03 line.long 0x00 "PG_MASK_CE3_0,CE3 rail mask" hexmask.long.byte 0x00 0.--7. 1. " MASK ,Mask CE1 rail" group.long 0x184++0x03 line.long 0x00 "PWRGATE_TIMER_CE_0_0,Power gate timer value for CE 0 counter" bitfld.long 0x00 28.--31. " RAIL7 ,Timer Value for rail 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " RAIL6 ,Timer Value for rail 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " RAIL5 ,Timer Value for rail 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " RAIL4 ,Timer Value for rail 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " RAIL3 ,Timer Value for rail 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " RAIL2 ,Timer Value for rail 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " RAIL1 ,Timer Value for rail 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " RAIL0 ,Timer Value for rail 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hgroup.long 0x188++0x1B hide.long 0x00 "PWRGATE_TIMER_CE_1_0,Power gate timer value for CE 1 counter" hide.long 0x04 "PWRGATE_TIMER_CE_2_0,Power gate timer value for CE 2 counter" hide.long 0x08 "PWRGATE_TIMER_CE_3_0,Power gate timer value for CE 3 counter" hide.long 0x0C "PWRGATE_TIMER_CE_4_0,Power gate timer value for CE 4 counter" hide.long 0x10 "PWRGATE_TIMER_CE_5_0,Power gate timer value for CE 5 counter" hide.long 0x14 "PWRGATE_TIMER_CE_6_0,Power gate timer value for CE 6 counter" tree.end tree "Power Control 3" width 17. group.long 0x1A4++0x0B line.long 0x00 "OSC_EDPD_OVER_0,Oscillator control in LP0 mode" bitfld.long 0x00 23. " CLK_OK ,Crystal oscillator clk_ok signal" "Disabled,Enabled" bitfld.long 0x00 22. " OSC_CTRL_SELECT ,Oscillator cell control" "CAR,PMC" bitfld.long 0x00 20.--21. " XO_LP0_MODE ,Controls oscillator during LP0" "DPD,Off,On,EXT_REQ" hexmask.long.byte 0x00 12.--19. 1. " OSCFI_SPARE ,Crystal oscillator spare register control" textline " " bitfld.long 0x00 7.--11. " XODS ,Crystal oscillator duty cycle control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--6. " XOFS ,Crystal oscillator drive strength control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "CLK_OUT_CNTRL_0,Clock outputs control register" bitfld.long 0x04 22.--23. " CLK3_SRC_SEL ,Clock 3 source select" "OSC_DIV1,OSC_DIV2,OSC_DIV3,CAR" bitfld.long 0x04 20.--21. " CLK3_IDLE_STATE ,Clock 3 idle state" "Low,High,Tris," bitfld.long 0x04 18. " CLK3_FORCE_EN ,Force clock running regardless of ACCEPT_REQ or INVERT_REQ" "Not forced,Forced" bitfld.long 0x04 17. " CLK3_INVERT_REQ ,Clock 3 invert" "Not inverted,Inverted" textline " " bitfld.long 0x04 16. " CLK3_ACCEPT_REQ ,Clock 3 accept" "No accepted,Accepted" bitfld.long 0x04 14.--15. " CLK2_SRC_SEL ,Clock 2 source select" "OSC_DIV1,OSC_DIV2,OSC_DIV4,CAR" bitfld.long 0x04 12.--13. " CLK2_IDLE_STATE ,Clock 2 idle state" "Low,High,Tris,?..." bitfld.long 0x04 10. " CLK2_FORCE_EN ,Force clock running regardless of ACCEPT_REQ or INVERT_REQ" "Not forced,Forced" textline " " bitfld.long 0x04 9. " CLK2_INVERT_REQ ,Clock 2 invert" "Not inverted,Inverted" bitfld.long 0x04 8. " CLK2_ACCEPT_REQ ,Clock 2 accept" "No accepted,Accepted" bitfld.long 0x04 6.--7. " CLK1_SRC_SEL ,Clock 1 source select" "OSC_DIV1,OSC_DIV2,OSC_DIV4,CAR" bitfld.long 0x04 4.--5. " CLK1_IDLE_STATE ,Clock 1 idle state" "Low,High,Tris,?..." textline " " bitfld.long 0x04 2. " CLK1_FORCE_EN ,Force clock running regardless of ACCEPT_REQ or INVERT_REQ" "Not forced,Forced" bitfld.long 0x04 1. " CLK1_INVERT_REQ ,Clock 1 invert" "Not inverted,Inverted" bitfld.long 0x04 0. " CLK1_ACCEPT_REQ ,Clock 1 accept" "No accepted,Accepted" group.long 0x1B0++0x07 line.long 0x00 "SENSOR_CTRL_0,Sensor shutdown and control" bitfld.long 0x00 2. " BLOCK_SCRATCH_WRITE ,Block writes to scratch registers" "OFF,ON" bitfld.long 0x00 1. " ENABLE_RST ,Enables reset on sensor going up" "OFF,ON" bitfld.long 0x00 0. " ENABLE_PG ,Power gate cpus on temp sensor going up" "OFF,ON" line.long 0x04 "RST_STATUS_0,Simplified reset and reset source" bitfld.long 0x04 0.--2. " RST_SOURCE ,Source of reset" "POR,WATCHDOG,SENSOR,SW_MAIN,LP0,AOTAG,?..." tree.end tree "IO DPD Control" width 17. group.long 0x1B8++0x13 line.long 0x00 "IO_DPD_REQ_0,DPD request" bitfld.long 0x00 30.--31. " CODE ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON," bitfld.long 0x00 28. " HDMI ,Puts HDMI in/out of deep power down mode" "Off,On" bitfld.long 0x00 27. " GPIO ,Puts GPIO in/out of deep power down mode" "Off,On" bitfld.long 0x00 26. " DEBUG_NONAO ,Puts DEBUG_NONAO in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x00 25. " DBG ,Puts DBG in/out of deep power down mode" "Off,On" bitfld.long 0x00 19. " HSIC ,Puts HSIC in/out of deep power down mode" "Off,On" bitfld.long 0x00 18. " USB3 ,Puts USB3 in/out of deep power down mode" "Off,On" bitfld.long 0x00 17. " AUDIO ,Puts AUDIO in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x00 14. " UART ,Puts UART in/out of deep power down mode" "Off,On" bitfld.long 0x00 12. " USB_BIAS ,Puts USB_BIAS in/out of deep power down mode" "Off,On" bitfld.long 0x00 11. " USB2 ,Puts USB2 in/out of deep power down mode" "Off,On" bitfld.long 0x00 10. " USB1 ,Puts USB1 in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x00 9. " USB0 ,Puts USB0 in/out of deep power down mode" "Off,On" bitfld.long 0x00 6. " PEX_CLK2 ,PEX clk2 pad-DPD control" "Off,On" bitfld.long 0x00 5. " PEX_CLK1 ,PEX clk1 pad- DPD control" "Off,On" bitfld.long 0x00 4. " PEX_BIAS ,PEX bias pad- DPD control" "Off,On" textline " " bitfld.long 0x00 3. " MIPI_BIAS ,Puts mipi_bias in/out of Deep Power Down mode" "Off,On" bitfld.long 0x00 2. " DSI ,Puts DSI in/out of Deep Power Down mode" "Off,On" bitfld.long 0x00 1. " CSIB ,Puts CSIB in/out of Deep Power Down mode" "Off,On" bitfld.long 0x00 0. " CSIA ,Puts CSIA in/out of Deep Power Down mode" "Off,On" line.long 0x04 "IO_DPD_STATUS_0,DPD status" bitfld.long 0x04 28. " HDMI ,hdmi_pad in Deep Power Down mode" "Off,On" bitfld.long 0x04 27. " GPIO ,GPIO in Deep Power Down mode" "Off,On" bitfld.long 0x04 26. " DEBUG_NONAO ,DEBUG_NONAO in Deep Power Down mode" "Off,On" bitfld.long 0x04 25. " DBG ,DBG in Deep Power Down mode" "Off,On" textline " " bitfld.long 0x04 19. " HSIC ,HSIC in deep power down mode" "Off,On" bitfld.long 0x04 18. " USB3 ,Puts USB3 pads in/out of deep power down mode" "Off,On" bitfld.long 0x04 17. " AUDIO ,AUDIO in deep power down mode" "Off,On" bitfld.long 0x04 14. " UART ,UART rail in Deep Power Down mode" "Off,On" textline " " bitfld.long 0x04 12. " USB_BIAS ,USB_BIAS in deep power down mode" "Off,On" bitfld.long 0x04 11. " USB2 ,USB2 in deep power down mode" "Off,On" bitfld.long 0x04 10. " USB1 ,USB1 in deep power down mode" "Off,On" bitfld.long 0x04 9. " USB0 ,USB0 in deep power down mode" "Off,On" textline " " bitfld.long 0x04 6. " PEX_CLK2 ,PEX_CLK2 in deep power down mode" "Off,On" bitfld.long 0x04 5. " PEX_CLK1 ,PEX_CLK1 in deep power down mode" "Off,On" bitfld.long 0x04 4. " PEX_BIAS ,PEX_BIAS in deep power down mode" "Off,On" bitfld.long 0x04 3. " MIPI_BIAS ,MIPI_BIAS in deep power down mode" "Off,On" textline " " bitfld.long 0x04 2. " DSI ,DSI in deep power down mode" "Off,On" bitfld.long 0x04 1. " CSIB ,CSIB in deep power down mode" "Off,On" bitfld.long 0x04 0. " CSIA ,CSIA in deep power down mode" "Off,On" line.long 0x08 "IO_DPD2_REQ_0,DPD request 2" bitfld.long 0x08 30.--31. " CODE ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..." bitfld.long 0x08 29. " AUDIO_HV ,Puts AUDIO_HV in/out of deep power down mode" "Off,On" bitfld.long 0x08 25. " LVDS ,Puts LVDS in/out of deep power down mode" "Off,On" bitfld.long 0x08 19. " DP ,Puts DP in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x08 18. " DMIC ,Puts DMIC in/out of deep power down mode" "Off,On" bitfld.long 0x08 15. " SPI_HV ,Puts SPI_HV in/out of deep power down mode" "Off,On" bitfld.long 0x08 14. " SPI ,Puts SPI in/out of deep power down mode" "Off,On" bitfld.long 0x08 13. " CSIF ,Puts CSIF in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x08 12. " CSIE ,Puts CSIE in/out of deep power down mode" "Off,On" bitfld.long 0x08 11. " CSID ,Puts CSID in/out of deep power down mode" "Off,On" bitfld.long 0x08 10. " CSIC ,Puts CSIC in/out of deep power down mode" "Off,On" bitfld.long 0x08 9. " DSID ,Puts DSID in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x08 8. " DSIC ,Puts DSIC in/out of deep power down mode" "Off,On" bitfld.long 0x08 7. " DSIB ,Puts DSIB in/out of deep power down mode" "Off,On" bitfld.long 0x08 5. " EMMC2 ,Puts EMMC2 in/out of deep power down mode" "Off,On" bitfld.long 0x08 4. " CAM ,Puts CAM in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x08 3. " EMMC ,Puts EMMC in/out of deep power down mode" "Off,On" bitfld.long 0x08 2. " SDMMC3 ,Puts SDMMC3 in/out of deep power down mode" "Off,On" bitfld.long 0x08 1. " SDMMC1 ,Puts SDMMC1 in/out of deep power down mode" "Off,On" line.long 0x0C "IO_DPD2_STATUS_0,DPD status 2" bitfld.long 0x0C 29. " AUDIO_HV ,Puts AUDIO_HV in/out of deep power down mode" "Off,On" bitfld.long 0x0C 25. " EDP ,Puts eDP in/out of deep power down mode" "Off,On" bitfld.long 0x0C 19. " DP ,Puts DP in/out of deep power down mode" "Off,On" bitfld.long 0x0C 18. " DMIC ,Puts DMIC in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x0C 15. " SPI_HV ,Puts SPI_HV in/out of deep power down mode" "Off,On" bitfld.long 0x0C 14. " SPI ,Puts SPI in/out of deep power down mode" "Off,On" bitfld.long 0x0C 13. " CSIF ,Puts CSIF in/out of deep power down mode" "Off,On" bitfld.long 0x0C 12. " CSIE ,Puts CSIE in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x0C 11. " CSID ,Puts CSID in/out of deep power down mode" "Off,On" bitfld.long 0x0C 10. " CSIC ,Puts CSIC in/out of deep power down mode" "Off,On" bitfld.long 0x0C 9. " DSID ,Puts DSID in/out of deep power down mode" "Off,On" bitfld.long 0x0C 8. " DSIC ,Puts DSIC in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x0C 7. " DSIB ,Puts DSIB in/out of deep power down mode" "Off,On" bitfld.long 0x0C 5. " EMMC2 ,Puts EMMC2 in/out of deep power down mode" "Off,On" bitfld.long 0x0C 4. " CAM ,Puts CAM in/out of deep power down mode" "Off,On" bitfld.long 0x0C 3. " EMMC ,Puts EMMC in/out of deep power down mode" "Off,On" textline " " bitfld.long 0x0C 2. " SDMMC3 ,Puts SDMMC3 in/out of deep power down mode" "Off,On" bitfld.long 0x0C 1. " SDMMC1 ,Puts SDMMC1 in/out of deep power down mode" "Off,On" bitfld.long 0x0C 0. " PEX_CNTRL ,Puts PEX_CNTRL in/out of deep power down mode" "Off,On" line.long 0x10 "SEL_DPD_TIM_0,Timer for e_dpd and sel_dpd deassertion times separation" hexmask.long.byte 0x10 0.--6. 1. " SEL_DPD_TIM ,Timer which separates e_dpd deassertion time from sel_dpd deassertion time" tree.end tree "Power Control 4" width 26. group.long 0x1CC++0x0B line.long 0x00 "VDDP_SEL_0,Power set for new DDR pads" bitfld.long 0x00 0.--1. " DATA ,VDDP sel bits to ddr pads" "0,1,2,3" line.long 0x04 "DDR_CFG_0,Package type for CAR/PMC control" bitfld.long 0x04 30.--31. " BR11_DPD_IO_CMD ,DPD_IO_CMD for brick-11" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 28.--29. " BR10_DPD_IO_CMD ,DPD_IO_CMD for brick-10" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 26.--27. " BR9_DPD_IO_CMD ,DPD_IO_CMD for brick-9" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 24.--25. " BR8_DPD_IO_CMD ,DPD_IO_CMD for brick-8" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." textline " " bitfld.long 0x04 22.--23. " BR7_DPD_IO_CMD ,DPD_IO_CMD for brick-7" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 20.--21. " BR6_DPD_IO_CMD ,DPD_IO_CMD for brick-6" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 18.--19. " BR5_DPD_IO_CMD ,DPD_IO_CMD for brick-5" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 16.--17. " BR4_DPD_IO_CMD ,DPD_IO_CMD for brick-4" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." textline " " bitfld.long 0x04 14.--15. " BR3_DPD_IO_CMD ,DPD_IO_CMD for brick-3" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 12.--13. " BR2_DPD_IO_CMD ,DPD_IO_CMD for brick-2" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 10.--11. " BR1_DPD_IO_CMD ,DPD_IO_CMD for brick-1" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." bitfld.long 0x04 8.--9. " BR0_DPD_IO_CMD ,DPD_IO_CMD for brick-0" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..." group.long 0x1DC++0x03 line.long 0x00 "PLLM_WB0_OVERRIDE_FREQ_0,PLL WB override register" hexmask.long.byte 0x00 8.--15. 1. " PLLM_DIVN ,PLL feedback divider" hexmask.long.byte 0x00 0.--7. 1. " PLLM_DIVM ,PLL input divider" group.long 0x1E4++0x07 line.long 0x00 "PWRGATE_TIMER_MULT_0,Multiple power gating control" bitfld.long 0x00 3.--5. " MULT_CPU ,Multiplier for CPU" "ONE,TWO,FOUR,EIGHT,SIXTEEN,?..." bitfld.long 0x00 0.--2. " MULT ,Time multiplier for each rail" "ONE,TWO,FOUR,EIGHT,SIXTEEN,?..." line.long 0x04 "DSI_SEL_DPD_0,SEL_DPD for DSI pad control" bitfld.long 0x04 3. " SET_DSID ,DSID set" "Off,On" bitfld.long 0x04 2. " SET_DSIC ,DSIC set" "Off,On" bitfld.long 0x04 1. " SET_DSIB ,DSIB set" "Off,On" bitfld.long 0x04 0. " SET_DSIA ,DSIA set" "Off,On" tree.end tree "UTMIP & UHSIC Control" width 29. group.long 0x1EC++0x07 line.long 0x00 "UTMIP_UHSIC_TRIGGERS_0,Triggers for USB ports" bitfld.long 0x00 19. " UTMIP_CLR_WAKE_ALARM_P3 ,Clear wake event for UTMIP port 0" "Null,Trig" bitfld.long 0x00 18. " UTMIP_FORCE_WALK_P3 ,Force pointer walk for UTMIP port 0" "Null,Trig" bitfld.long 0x00 17. " UTMIP_CAP_CFG_P3 ,Capture pad configuration for UTMIP port 0" "Null,Trig" textline " " bitfld.long 0x00 16. " UTMIP_CLR_WALK_PTR_P3 ,Clear sleep walk pointer for UTMIP port 0" "Null,Trig" bitfld.long 0x00 15. " UHSIC_CLR_WAKE_ALARM_P0 ,Clear wake event for UHSIC port 0" "Null,Trig" bitfld.long 0x00 14. " UTMIP_CLR_WAKE_ALARM_P2 ,Clear wake event for UTMIP port 2" "Null,Trig" textline " " bitfld.long 0x00 13. " UTMIP_CLR_WAKE_ALARM_P1 ,Clear wake event for UTMIP port 1" "Null,Trig" bitfld.long 0x00 12. " UTMIP_CLR_WAKE_ALARM_P0 ,Clear wake event for UTMIP port 0" "Null,Trig" bitfld.long 0x00 11. " UHSIC_FORCE_WALK_P0 ,Force pointer walk for UHSIC port 0" "Null,Trig" textline " " bitfld.long 0x00 10. " UTMIP_FORCE_WALK_P2 ,Force pointer walk for UTMIP port 2" "Null,Trig" bitfld.long 0x00 9. " UTMIP_FORCE_WALK_P1 ,Force pointer walk for UTMIP port 1" "Null,Trig" bitfld.long 0x00 8. " UTMIP_FORCE_WALK_P0 ,Force pointer walk for UTMIP port 0" "Null,Trig" textline " " bitfld.long 0x00 6. " UTMIP_CAP_CFG_P2 ,Capture pad configuration for UTMIP port 2" "Null,Trig" bitfld.long 0x00 5. " UTMIP_CAP_CFG_P1 ,Capture pad configuration for UTMIP port 1" "Null,Trig" bitfld.long 0x00 4. " UTMIP_CAP_CFG_P0 ,Capture pad configuration for UTMIP port 0" "Null,Trig" textline " " bitfld.long 0x00 3. " UHSIC_CLR_WALK_PTR_P0 ,Clear sleep walk pointer for UHSIC port 0" "Null,Trig" bitfld.long 0x00 2. " UTMIP_CLR_WALK_PTR_P2 ,Clear sleep walk pointer for UTMIP port 2" "Null,Trig" bitfld.long 0x00 1. " UTMIP_CLR_WALK_PTR_P1 ,Clear sleep walk pointer for UTMIP port 1" "Null,Trig" textline " " bitfld.long 0x00 0. " UTMIP_CLR_WALK_PTR_P0 ,Clear sleep walk pointer for UTMIP port 0" "Null,Trig" line.long 0x04 "UTMIP_UHSIC_SAVED_STATE_0,Saved DPD state for all UTMIP and UHSIC ports" bitfld.long 0x04 31. " UHSIC_WAKE_EX_P0 ,Wake up on anything except a Particular Line Value (P0)" "Off,On" bitfld.long 0x04 30. " UHSIC_IGNORE_MASTER_CFG_P0 ,UHSIC ignore master config (P0)" "0,1" hexmask.long.byte 0x04 25.--29. 1. " UHSIC_SCRATCH_P0 ,Scratch information about P0" textline " " bitfld.long 0x04 24. " UHSIC_MODE_P0 ,UHSIC speed prior to DPD" "HS,RST" bitfld.long 0x04 23. " UTMIP_WAKE_EX_P2 ,Wake up on anything except a Particular Line Value (P2)" "Off,On" bitfld.long 0x04 22. " UTMIP_IGNORE_MASTER_CFG_P2 ,UTMIP ignore master config (P2)" "0,1" textline " " bitfld.long 0x04 18.--21. " UTMIP_SCRATCH_P2 ,Scratch information about P2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--17. " UTMIP_SPEED_P2 ,UTMIP speed prior to DPD (P2)" "HS,FS,LS,RST" bitfld.long 0x04 15. " UTMIP_WAKE_EX_P1 ,Wake up on anything except a Particular Line Value (P1)" "Off,On" textline " " bitfld.long 0x04 14. " UTMIP_IGNORE_MASTER_CFG_P1 ,UTMIP ignore master config (P1)" "0,1" bitfld.long 0x04 10.--13. " UTMIP_SCRATCH_P1 ,Scratch information about the P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--9. " UTMIP_SPEED_P1 ,UTMIP speed prior to DPD" "HS,FS,LS,RST" textline " " bitfld.long 0x04 7. " UTMIP_WAKE_EX_P0 ,Wake up on anything except a Particular Line Value (P0)" "Off,On" bitfld.long 0x04 6. " UTMIP_IGNORE_MASTER_CFG_P0 ,UTMIP ignore master config (P0)" "0,1" bitfld.long 0x04 2.--5. " UTMIP_SCRATCH_P0 ,Scratch information about the port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--1. " UTMIP_SPEED_P0 ,UTMIP speed prior to DPD" "HS,FS,LS,RST" group.long 0x1F8++0x1B line.long 0x00 "UTMIP_TERM_PAD_CFG_0,I/O termination config for all UTMIP ports" bitfld.long 0x00 13.--18. " TCTRL_SW_VAL ,Software override for tctrl" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 7.--12. " TCTRL_VAL ,HS termination calibration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 1.--6. " PCTRL_VAL ,1.5kOhm pull up calibration value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0. " TERM_SEL ,Auto termination enable" "Disabled,Enabled" line.long 0x04 "UTMIP_UHSIC_SLEEP_CFG_0,Sleep walk sequence enables" bitfld.long 0x04 28.--31. " UHSIC_WAKE_VAL_P0 ,Line value wake up condition on UHSIC P0" "SD00,SD01,SD10,SD11,S0,S1,,,D0,,D1,,None,SEDGE,DEDGE,Any" bitfld.long 0x04 24. " UHSIC_MASTER_ENABLE_P0 ,Enable use of master pins on UHSIC P0" "Disabled,Enabled" bitfld.long 0x04 20.--23. " UTMIP_WAKE_VAL_P2 ,Line value wake up condition on UTMIP P2" "SE0,FSK,FSJ,SE1,DM0,DM1,,,DP0,,DP1,,None,DMEDGE,DPEDGE,Any" textline " " bitfld.long 0x04 19. " UTMIP_TCTRL_USE_PMC_P2 ,Use PMC saved TCTRL on UTMIP P2" "No,Yes" bitfld.long 0x04 18. " UTMIP_PCTRL_USE_PMC_P2 ,Use PMC saved PCTRL on UTMIP P2" "No,Yes" bitfld.long 0x04 17. " UTMIP_FSLS_USE_PMC_P2 ,Use PMC Saved Pad config on UTMIP P2" "No,Yes" textline " " bitfld.long 0x04 16. " UTMIP_MASTER_ENABLE_P2 ,Enable use of master pins on UTMIP P2" "Disabled,Enabled" bitfld.long 0x04 12.--15. " UTMIP_WAKE_VAL_P1 ,Line Value Wake Up Condition on UTMIP P1" "SE0,FSK,FSJ,SE1,DM0,DM1,,,DP0,,DP1,,None,DMEDGE,DPEDGE,Any" bitfld.long 0x04 11. " UTMIP_TCTRL_USE_PMC_P1 ,Use PMC Saved TCTRL on UTMIP P1" "No,Yes" textline " " bitfld.long 0x04 10. " UTMIP_PCTRL_USE_PMC_P1 ,Use PMC Saved PCTRL on UTMIP P1" "No,Yes" bitfld.long 0x04 9. " UTMIP_FSLS_USE_PMC_P1 ,Use PMC Saved Pad config on UTMIP P1" "No,Yes" bitfld.long 0x04 8. " UTMIP_MASTER_ENABLE_P1 ,Enable use of master pins on UTMIP P1" "Disabled,Enabled" textline " " bitfld.long 0x04 4.--7. " UTMIP_WAKE_VAL_P0 ,Line Value Wake Up Condition on UTMIP P0" "SE0,FSK,FSJ,SE1,DM0,DM1,,,DP0,,DP1,,None,DMEDGE,DPEDGE,Any" bitfld.long 0x04 3. " UTMIP_TCTRL_USE_PMC_P0 ,Use PMC Saved TCTRL on UTMIP P0" "No,Yes" bitfld.long 0x04 2. " UTMIP_PCTRL_USE_PMC_P0 ,Use PMC Saved PCTRL on UTMIP P0" "No,Yes" textline " " bitfld.long 0x04 1. " UTMIP_FSLS_USE_PMC_P0 ,Use PMC Saved Pad config on UTMIP P0" "No,Yes" bitfld.long 0x04 0. " UTMIP_MASTER_ENABLE_P0 ,Enable use of master pins on UTMIP P0" "Disabled,Enabled" line.long 0x08 "UTMIP_UHSIC_SLEEPWALK_CFG_0,Sleep walk sequence enables" bitfld.long 0x08 31. " UHSIC_LINEVAL_WALK_EN_P0 ,Perform Walk on USB line value wake up for UHSIC P0" "No,Yes" bitfld.long 0x08 30. " UHSIC_WAKE_WALK_EN_P0 ,Perform Walk on any chip wake up event for UHSIC P0" "No,Yes" bitfld.long 0x08 29. " UHSIC_GPIO_WALK_EN_P0 ,Perform Walk on associated GPIO event for UHSIC P0" "No,Yes" textline " " bitfld.long 0x08 24.--28. " UHSIC_DESIGNATED_GPIO_P0 ,GPIO Number associated with UHSIC P0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 23. " UTMIP_LINEVAL_WALK_EN_P2 ,Perform Walk on USB line value wake up for UTMIP P2" "No,Yes" bitfld.long 0x08 22. " UTMIP_WAKE_WALK_EN_P2 ,Perform Walk on any chip wake up event for UTMIP P2" "No,Yes" textline " " bitfld.long 0x08 21. " UTMIP_GPIO_WALK_EN_P2 ,Perform Walk on associated GPIO event for UTMIP P2" "No,Yes" bitfld.long 0x08 16.--20. " UTMIP_DESIGNATED_GPIO_P2 ,GPIO Number associated with UTMIP P2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 15. " UTMIP_LINEVAL_WALK_EN_P1 ,Perform Walk on USB line value wake up for UTMIP P1" "No,Yes" textline " " bitfld.long 0x08 14. " UTMIP_WAKE_WALK_EN_P1 ,Perform Walk on any chip wake up event for UTMIP P1" "No,Yes" bitfld.long 0x08 13. " UTMIP_GPIO_WALK_EN_P1 ,Perform Walk on associated GPIO event for UTMIP P1" "No,Yes" bitfld.long 0x08 8.--12. " UTMIP_DESIGNATED_GPIO_P1 ,GPIO Number associated with UTMIP P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 7. " UTMIP_LINEVAL_WALK_EN_P0 ,Perform Walk on USB line value wake up for UTMIP P0" "No,Yes" bitfld.long 0x08 6. " UTMIP_WAKE_WALK_EN_P0 ,Perform Walk on any chip wake up event for UTMIP P0" "No,Yes" bitfld.long 0x08 5. " UTMIP_GPIO_WALK_EN_P0 ,Perform Walk on associated GPIO event for UTMIP P0" "No,Yes" textline " " bitfld.long 0x08 0.--4. " UTMIP_DESIGNATED_GPIO_P0 ,GPIO Number associated with UTMIP P0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "UTMIP_SLEEPWALK_P0_0,Signalling sequence for UTMIP port 0 wakeup" bitfld.long 0x0C 30. " HIGHZ_D ,Phase D Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x0C 29. " AN_D ,Phase D Drive Single Ended Value on D- line" "0,1" bitfld.long 0x0C 28. " AP_D ,Phase D Drive Single Ended Value on D+ line" "0,1" textline " " bitfld.long 0x0C 27. " USBON_RPU_D ,Phase D 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x0C 26. " USBOP_RPU_D ,Phase D 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x0C 25. " USBON_RPD_D ,Phase D 15kOhm Pull Down on D- Line" "No,Yes" textline " " bitfld.long 0x0C 24. " USBOP_RPD_D ,Phase D 15kOhm Pull Down on D+ Line" "No,Yes" bitfld.long 0x0C 22. " HIGHZ_C ,Phase C Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x0C 21. " AN_C ,Phase C Drive Single Ended Value on D- line" "0,1" textline " " bitfld.long 0x0C 20. " AP_C ,Phase C Drive Single Ended Value on D+ line" "0,1" bitfld.long 0x0C 19. " USBON_RPU_C ,Phase C 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x0C 18. " USBOP_RPU_C ,Phase C 1.5kOhm Pull Up on D+ Line" "No,Yes" textline " " bitfld.long 0x0C 17. " USBON_RPD_C ,Phase C 15kOhm Pull Down on D- Line" "No,Yes" bitfld.long 0x0C 16. " USBOP_RPD_C ,Phase C 15kOhm Pull Down on D+ Line" "No,Yes" bitfld.long 0x0C 14. " HIGHZ_B ,Phase B Enable Single Ended Drivers" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " AN_B ,Phase B Drive Single Ended Value on D- line" "0,1" bitfld.long 0x0C 12. " AP_B ,Phase B Drive Single Ended Value on D+ line" "0,1" bitfld.long 0x0C 11. " USBON_RPU_B ,Phase B 1.5kOhm Pull up on D- Line" "No,Yes" textline " " bitfld.long 0x0C 10. " USBOP_RPU_B ,Phase B 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x0C 9. " USBON_RPD_B ,Phase B 15kOhm Pull Down on D- Line" "No,Yes" bitfld.long 0x0C 8. " USBOP_RPD_B ,Phase B 15kOhm Pull Down on D+ Line" "No,Yes" textline " " bitfld.long 0x0C 6. " HIGHZ_A ,Phase A Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x0C 5. " AN_A ,Phase A Drive Single Ended Value on D- line" "0,1" bitfld.long 0x0C 4. " AP_A ,Phase A Drive Single Ended Value on D+ line" "0,1" textline " " bitfld.long 0x0C 3. " USBON_RPU_A ,Phase A 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x0C 2. " USBOP_RPU_A ,Phase A 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x0C 1. " USBON_RPD_A ,Phase A 15kOhm Pull Down on D- Line" "No,Yes" textline " " bitfld.long 0x0C 0. " USBOP_RPD_A ,Phase A 15kOhm Pull Down on D+ Line" "No,Yes" line.long 0x10 "UTMIP_SLEEPWALK_P1_0,Signalling sequence for UTMIP port 1 wakeup" bitfld.long 0x10 30. " HIGHZ_D ,Phase D Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x10 29. " AN_D ,Phase D Drive Single Ended Value on D- line" "0,1" bitfld.long 0x10 28. " AP_D ,Phase D Drive Single Ended Value on D+ line" "0,1" textline " " bitfld.long 0x10 27. " USBON_RPU_D ,Phase D 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x10 26. " USBOP_RPU_D ,Phase D 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x10 25. " USBON_RPD_D ,Phase D 15kOhm Pull Down on D- Line" "No,Yes" textline " " bitfld.long 0x10 24. " USBOP_RPD_D ,Phase D 15kOhm Pull Down on D+ Line" "No,Yes" bitfld.long 0x10 22. " HIGHZ_C ,Phase C Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x10 21. " AN_C ,Phase C Drive Single Ended Value on D- line" "0,1" textline " " bitfld.long 0x10 20. " AP_C ,Phase C Drive Single Ended Value on D+ line" "0,1" bitfld.long 0x10 19. " USBON_RPU_C ,Phase C 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x10 18. " USBOP_RPU_C ,Phase C 1.5kOhm Pull Up on D+ Line" "No,Yes" textline " " bitfld.long 0x10 17. " USBON_RPD_C ,Phase C 15kOhm Pull Down on D- Line" "No,Yes" bitfld.long 0x10 16. " USBOP_RPD_C ,Phase C 15kOhm Pull Down on D+ Line" "No,Yes" bitfld.long 0x10 14. " HIGHZ_B ,Phase B Enable Single Ended Drivers" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " AN_B ,Phase B Drive Single Ended Value on D- line" "0,1" bitfld.long 0x10 12. " AP_B ,Phase B Drive Single Ended Value on D+ line" "0,1" bitfld.long 0x10 11. " USBON_RPU_B ,Phase B 1.5kOhm Pull up on D- Line" "No,Yes" textline " " bitfld.long 0x10 10. " USBOP_RPU_B ,Phase B 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x10 9. " USBON_RPD_B ,Phase B 15kOhm Pull Down on D- Line" "No,Yes" bitfld.long 0x10 8. " USBOP_RPD_B ,Phase B 15kOhm Pull Down on D+ Line" "No,Yes" textline " " bitfld.long 0x10 6. " HIGHZ_A ,Phase A Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x10 5. " AN_A ,Phase A Drive Single Ended Value on D- line" "0,1" bitfld.long 0x10 4. " AP_A ,Phase A Drive Single Ended Value on D+ line" "0,1" textline " " bitfld.long 0x10 3. " USBON_RPU_A ,Phase A 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x10 2. " USBOP_RPU_A ,Phase A 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x10 1. " USBON_RPD_A ,Phase A 15kOhm Pull Down on D- Line" "No,Yes" textline " " bitfld.long 0x10 0. " USBOP_RPD_A ,Phase A 15kOhm Pull Down on D+ Line" "No,Yes" line.long 0x14 "UTMIP_SLEEPWALK_P2_0,Signalling sequence for UTMIP port 2 wakeup" bitfld.long 0x14 30. " HIGHZ_D ,Phase D Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x14 29. " AN_D ,Phase D Drive Single Ended Value on D- line" "0,1" bitfld.long 0x14 28. " AP_D ,Phase D Drive Single Ended Value on D+ line" "0,1" textline " " bitfld.long 0x14 27. " USBON_RPU_D ,Phase D 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x14 26. " USBOP_RPU_D ,Phase D 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x14 25. " USBON_RPD_D ,Phase D 15kOhm Pull Down on D- Line" "No,Yes" textline " " bitfld.long 0x14 24. " USBOP_RPD_D ,Phase D 15kOhm Pull Down on D+ Line" "No,Yes" bitfld.long 0x14 22. " HIGHZ_C ,Phase C Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x14 21. " AN_C ,Phase C Drive Single Ended Value on D- line" "0,1" textline " " bitfld.long 0x14 20. " AP_C ,Phase C Drive Single Ended Value on D+ line" "0,1" bitfld.long 0x14 19. " USBON_RPU_C ,Phase C 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x14 18. " USBOP_RPU_C ,Phase C 1.5kOhm Pull Up on D+ Line" "No,Yes" textline " " bitfld.long 0x14 17. " USBON_RPD_C ,Phase C 15kOhm Pull Down on D- Line" "No,Yes" bitfld.long 0x14 16. " USBOP_RPD_C ,Phase C 15kOhm Pull Down on D+ Line" "No,Yes" bitfld.long 0x14 14. " HIGHZ_B ,Phase B Enable Single Ended Drivers" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " AN_B ,Phase B Drive Single Ended Value on D- line" "0,1" bitfld.long 0x14 12. " AP_B ,Phase B Drive Single Ended Value on D+ line" "0,1" bitfld.long 0x14 11. " USBON_RPU_B ,Phase B 1.5kOhm Pull up on D- Line" "No,Yes" textline " " bitfld.long 0x14 10. " USBOP_RPU_B ,Phase B 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x14 9. " USBON_RPD_B ,Phase B 15kOhm Pull Down on D- Line" "No,Yes" bitfld.long 0x14 8. " USBOP_RPD_B ,Phase B 15kOhm Pull Down on D+ Line" "No,Yes" textline " " bitfld.long 0x14 6. " HIGHZ_A ,Phase A Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x14 5. " AN_A ,Phase A Drive Single Ended Value on D- line" "0,1" bitfld.long 0x14 4. " AP_A ,Phase A Drive Single Ended Value on D+ line" "0,1" textline " " bitfld.long 0x14 3. " USBON_RPU_A ,Phase A 1.5kOhm Pull up on D- Line" "No,Yes" bitfld.long 0x14 2. " USBOP_RPU_A ,Phase A 1.5kOhm Pull Up on D+ Line" "No,Yes" bitfld.long 0x14 1. " USBON_RPD_A ,Phase A 15kOhm Pull Down on D- Line" "No,Yes" textline " " bitfld.long 0x14 0. " USBOP_RPD_A ,Phase A 15kOhm Pull Down on D+ Line" "No,Yes" line.long 0x18 "UHSIC_SLEEPWALK_P0_0,Signalling sequence for UHSIC port 0 wakeup" bitfld.long 0x18 29. " UHSIC_DATA1_RPU_D ,Phase D Pull up on DATA1 Line" "No,Yes" bitfld.long 0x18 28. " UHSIC_DATA1_RPD_D ,Phase D Pull down on DATA1 Line" "No,Yes" bitfld.long 0x18 27. " UHSIC_DATA0_RPU_D ,Phase D Pull up on DATA0 Line" "No,Yes" textline " " bitfld.long 0x18 26. " UHSIC_STROBE_RPU_D ,Phase D Pull Up on STROBE Line" "No,Yes" bitfld.long 0x18 25. " UHSIC_DATA0_RPD_D ,Phase D Pull Down on DATA0 Line" "No,Yes" bitfld.long 0x18 24. " UHSIC_STROBE_RPD_D ,Phase D Pull Down on STROBE Line" "No,Yes" textline " " bitfld.long 0x18 21. " UHSIC_DATA1_RPU_C ,Phase C Pull up on DATA1 Line" "No,Yes" bitfld.long 0x18 20. " UHSIC_DATA1_RPD_C ,Phase C Pull down on DATA1 Line" "No,Yes" bitfld.long 0x18 19. " UHSIC_DATA0_RPU_C ,Phase C Pull up on DATA0 Line" "No,Yes" textline " " bitfld.long 0x18 18. " UHSIC_STROBE_RPU_C ,Phase C Pull Up on STROBE Line" "No,Yes" bitfld.long 0x18 17. " UHSIC_DATA0_RPD_C ,Phase C Pull Down on DATA0 Line" "No,Yes" bitfld.long 0x18 16. " UHSIC_STROBE_RPD_C ,Phase C Pull Down on STROBE Line" "No,Yes" textline " " bitfld.long 0x18 13. " UHSIC_DATA1_RPU_B ,Phase B Pull up on DATA1 Line" "No,Yes" bitfld.long 0x18 12. " UHSIC_DATA1_RPD_B ,Phase B Pull down on DATA1 Line" "No,Yes" bitfld.long 0x18 11. " UHSIC_DATA0_RPU_B ,Phase B Pull up on DATA0 Line" "No,Yes" textline " " bitfld.long 0x18 10. " UHSIC_STROBE_RPU_B ,Phase B Pull Up on STROBE Line" "No,Yes" bitfld.long 0x18 9. " UHSIC_DATA0_RPD_B ,Phase B Pull Down on DATA0 Line" "No,Yes" bitfld.long 0x18 8. " UHSIC_STROBE_RPD_B ,Phase B Pull Down on STROBE Line" "No,Yes" textline " " bitfld.long 0x18 5. " UHSIC_DATA1_RPU_A ,Phase A Pull up on DATA1 Line" "No,Yes" bitfld.long 0x18 4. " UHSIC_DATA1_RPD_A ,Phase A Pull down on DATA1 Line" "No,Yes" bitfld.long 0x18 3. " UHSIC_DATA0_RPU_A ,Phase A Pull up on DATA0 Line" "No,Yes" textline " " bitfld.long 0x18 2. " UHSIC_STROBE_RPU_A ,Phase A Pull Up on STROBE Line" "No,Yes" bitfld.long 0x18 1. " UHSIC_DATA0_RPD_A ,Phase A Pull Down on DATA0 Line" "No,Yes" bitfld.long 0x18 0. " UHSIC_STROBE_RPD_A ,Phase A Pull Down on STROBE Line" "No,Yes" rgroup.long 0x214++0x03 line.long 0x00 "UTMIP_UHSIC_STATUS_0,Status of UTMIP UHSIC wakeup circuitry" bitfld.long 0x00 25. " DATA1_VAL_P0 ,Value of DATA1 line detector for UHSIC port 0" "0,1" bitfld.long 0x00 24. " UTMIP_WAKE_ALARM_P3 ,A wake event occurred on UTMIP port 0" "0,1" bitfld.long 0x00 23. " USBON_VAL_P3 ,Value of D- line detector for UTMIP port 0" "0,1" textline " " bitfld.long 0x00 22. " USBOP_VAL_P3 ,Value of D+ line detector for UTMIP port 0" "0,1" bitfld.long 0x00 20.--21. " UTMIP_WALK_PTR_P3 ,Walk pointer for UMTIP port 0" "0,1,2,3" bitfld.long 0x00 19. " UHSIC_WAKE_ALARM_P0 ,A wake event occurred on UHSIC port 0" "No,Yes" textline " " bitfld.long 0x00 18. " UTMIP_WAKE_ALARM_P2 ,A wake event occurred on UTMIP port 2" "No,Yes" bitfld.long 0x00 17. " UTMIP_WAKE_ALARM_P1 ,A wake event occurred on UTMIP port 1" "No,Yes" bitfld.long 0x00 16. " UTMIP_WAKE_ALARM_P0 ,A wake event occurred on UTMIP port 0" "No,Yes" textline " " bitfld.long 0x00 15. " DATA_VAL_P0 ,Value of DATA line detector for UHSIC port 0" "0,1" bitfld.long 0x00 14. " STROBE_VAL_P0 ,Value of STROBE line detector for UHSIC port 0" "0,1" bitfld.long 0x00 13. " USBON_VAL_P2 ,Value of D- line detector for UTMIP port 2" "0,1" textline " " bitfld.long 0x00 12. " USBOP_VAL_P2 ,Value of D+ line detector for UTMIP port 2" "0,1" bitfld.long 0x00 11. " USBON_VAL_P1 ,Value of D- line detector for UTMIP port 1" "0,1" bitfld.long 0x00 10. " USBOP_VAL_P1 ,Value of D+ line detector for UTMIP port 1" "0,1" textline " " bitfld.long 0x00 9. " USBON_VAL_P0 ,Value of D- line detector for UTMIP port 0" "0,1" bitfld.long 0x00 8. " USBOP_VAL_P0 ,Value of D+ line detector for UTMIP port 0" "0,1" bitfld.long 0x00 6.--7. " UHSIC_WALK_PTR_P0 ,Walk pointer for UHSIC port 0" "0,1,2,3" textline " " bitfld.long 0x00 4.--5. " UTMIP_WALK_PTR_P2 ,Walk pointer for UTMIP port 2" "0,1,2,3" bitfld.long 0x00 2.--3. " UTMIP_WALK_PTR_P1 ,Walk pointer for UTMIP port 1" "0,1,2,3" bitfld.long 0x00 0.--1. " UTMIP_WALK_PTR_P0 ,Walk pointer for UMTIP port 0" "0,1,2,3" group.long 0x218++0x03 line.long 0x00 "UTMIP_UHSIC_FAKE_0,Fake the line value for the PM pad macro" bitfld.long 0x00 27. " UTMIP_ID_FAKE_EN_P2 ,Enable the fake ID value for UTMIP P2" "Disabled,Enabled" bitfld.long 0x00 26. " UTMIP_ID_FAKE_VAL_P2 ,Fake ID value for UTMIP P2" "0,1" bitfld.long 0x00 25. " UTMIP_VBUS_FAKE_EN_P2 ,Enable the fake VBUS WAKEUP value for UTMIP P2" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " UTMIP_VBUS_FAKE_VAL_P2 ,Fake VBUS WAKEUP value for UTMIP P2" "0,1" bitfld.long 0x00 23. " UTMIP_ID_FAKE_EN_P1 ,Enable the fake ID value for UTMIP P1" "Disabled,Enabled" bitfld.long 0x00 22. " UTMIP_ID_FAKE_VAL_P1 ,Fake ID value for UTMIP P1" "0,1" textline " " bitfld.long 0x00 21. " UTMIP_VBUS_FAKE_EN_P1 ,Enable the fake VBUS WAKEUP value for UTMIP P1" "Disabled,Enabled" bitfld.long 0x00 20. " UTMIP_VBUS_FAKE_VAL_P1 ,Fake VBUS WAKEUP value for UTMIP P1" "0,1" bitfld.long 0x00 19. " UTMIP_ID_FAKE_EN_P0 ,Enable the fake ID value for UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " UTMIP_ID_FAKE_VAL_P0 ,Fake ID value for UTMIP P0" "0,1" bitfld.long 0x00 17. " UTMIP_VBUS_FAKE_EN_P0 ,Enable the fake VBUS WAKEUP value for UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 16. " UTMIP_VBUS_FAKE_VAL_P0 ,Fake VBUS WAKEUP value for UTMIP P0" "0,1" textline " " bitfld.long 0x00 15. " UHSIC_FAKE_DATA_EN_P0 ,Enable the fake line value for DATA for the PMC pad macro for UHSIC P0" "Disabled,Enabled" bitfld.long 0x00 14. " UHSIC_FAKE_STROBE_EN_P0 ,Enable the fake line value for STROBE for the PMC pad macro for UHSIC P0" "Disabled,Enabled" bitfld.long 0x00 13. " UHSIC_FAKE_DATA_VAL_P0 ,Fake line value for DATA for the PMC pad macro for UHSIC P0" "0,1" textline " " bitfld.long 0x00 12. " UHSIC_FAKE_STROBE_VAL_P0 ,Fake line value for STROBE for the PMC pad macro for UHSIC P0" "0,1" bitfld.long 0x00 11. " UTMIP_FAKE_USBON_EN_P2 ,Enable the fake line value for D- for the PMC pad macro for UTMIP P2" "Disabled,Enabled" bitfld.long 0x00 10. " UTMIP_FAKE_USBOP_EN_P2 ,Enable the fake line value for D+ for the PMC pad macro for UTMIP P2" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " UTMIP_FAKE_USBON_VAL_P2 ,Fake line value for D- for the PMC pad macro for UTMIP P2" "0,1" bitfld.long 0x00 8. " UTMIP_FAKE_USBOP_VAL_P2 ,Fake line value for D+ for the PMC pad macro for UTMIP P2" "0,1" bitfld.long 0x00 7. " UTMIP_FAKE_USBON_EN_P1 ,Enable the fake line value for D- for the PMC pad macro for UTMIP P1" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " UTMIP_FAKE_USBOP_EN_P1 ,Enable the fake line value for D+ for the PMC pad macro for UTMIP P1" "Disabled,Enabled" bitfld.long 0x00 5. " UTMIP_FAKE_USBON_VAL_P1 ,Fake line value for D- for the PMC pad macro for UTMIP P1" "0,1" bitfld.long 0x00 4. " UTMIP_FAKE_USBOP_VAL_P1 ,Fake line value for D+ for the PMC pad macro for UTMIP P1" "0,1" textline " " bitfld.long 0x00 3. " UTMIP_FAKE_USBON_EN_P0 ,Enable the fake line value for D- for the PMC pad macro for UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 2. " UTMIP_FAKE_USBOP_EN_P0 ,Enable the fake line value for D+ for the PMC pad macro for UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 1. " UTMIP_FAKE_USBON_VAL_P0 ,Fake line value for D- for the PMC pad macro for UTMIP P0" "0,1" textline " " bitfld.long 0x00 0. " UTMIP_FAKE_USBOP_VAL_P0 ,Fake line value for D+ for the PMC pad macro for UTMIP P0" "0,1" tree.end tree "Scratch Registers 3" width 31. group.long 0x21C++0x03 line.long 0x00 "BONDOUT_MIRROR3_0,Secure scratch register 3" group.long 0x220++0x03 line.long 0x00 "BONDOUT_MIRROR4_0,Secure scratch register 4" group.long 0x224++0x03 line.long 0x00 "SECURE_SCRATCH6_0,Secure scratch register 6" group.long 0x228++0x03 line.long 0x00 "SECURE_SCRATCH7_0,Secure scratch register 7" group.long 0x22C++0x03 line.long 0x00 "SCRATCH43_0,Scratch register 43" group.long 0x230++0x03 line.long 0x00 "SCRATCH44_0,Scratch register 44" group.long 0x234++0x03 line.long 0x00 "SCRATCH45_0,Scratch register 45" group.long 0x238++0x03 line.long 0x00 "SCRATCH46_0,Scratch register 46" group.long 0x23C++0x03 line.long 0x00 "SCRATCH47_0,Scratch register 47" group.long 0x240++0x03 line.long 0x00 "SCRATCH48_0,Scratch register 48" group.long 0x244++0x03 line.long 0x00 "SCRATCH49_0,Scratch register 49" group.long 0x248++0x03 line.long 0x00 "SCRATCH50_0,Scratch register 50" group.long 0x24C++0x03 line.long 0x00 "SCRATCH51_0,Scratch register 51" group.long 0x250++0x0F line.long 0x00 "SCRATCH52_0,Scratch register 52" hexmask.long.word 0x00 16.--31. 1. " SCRATCH_PMU_A_0_HIWORD_RANGE ,SCRATCH_PMU_A_0_HIWORD_RANGE" hexmask.long.word 0x00 0.--15. 1. " SCRATCH_PMU_A_0_LOWORD_RANGE ,SCRATCH_PMU_A_0_LOWORD_RANGE" line.long 0x04 "SCRATCH53_0,Scratch register 53" bitfld.long 0x04 31. " SCRATCH_PMU_B_0_RST_ENABLE_RANGE ,Reset enable" "Disabled,Enabled" bitfld.long 0x04 27.--29. " SCRATCH_PMU_B_0_CNTLR_ID_RANGE ,Controller ID" "I2C1,I2C2,I2C3,I2C4,I2C PMU,?..." textline " " bitfld.long 0x04 24.--26. " SCRATCH_PMU_B_0_PINMUX_RANGE ,Pinmux Range" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 16.--23. 1. " SCRATCH_PMU_B_0_CHKSUM_RANGE ,Checksum Range" textline " " bitfld.long 0x04 15. " SCRATCH_PMU_B_0_16BITOP_RANGE ,16-Bit Op" "0,1" bitfld.long 0x04 14. " SCRATCH_PMU_B_0_USE_GPIO_RANGE ,SCRATCH_PMU_B_0_USE_GPIO_RANGE" "0,1" textline " " hexmask.long.byte 0x04 0.--6. 1. " SCRATCH_PMU_B_0_I2CSLV1_RANGE ,I2C Slave Address" line.long 0x08 "SCRATCH54_0,Scratch register 54" hexmask.long.word 0x08 16.--31. 1. " SCRATCH_PMU_A_0_HIWORD_RANGE ,SCRATCH_PMU_A_0_HIWORD_RANGE" hexmask.long.word 0x08 0.--15. 1. " SCRATCH_PMU_A_0_LOWORD_RANGE ,SCRATCH_PMU_A_0_LOWORD_RANGE" line.long 0x0C "SCRATCH55_0,Scratch register 55" bitfld.long 0x0C 31. " SCRATCH_PMU_B_0_RST_ENABLE_RANGE ,Reset enable" "Disabled,Enabled" bitfld.long 0x0C 27.--29. " SCRATCH_PMU_B_0_CNTLR_ID_RANGE ,Controller ID" "I2C1,I2C2,I2C3,I2C4,I2C PMU,?..." textline " " bitfld.long 0x0C 24.--26. " SCRATCH_PMU_B_0_PINMUX_RANGE ,Pinmux Range" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0C 16.--23. 1. " SCRATCH_PMU_B_0_CHKSUM_RANGE ,Checksum Range" textline " " bitfld.long 0x0C 15. " SCRATCH_PMU_B_0_16BITOP_RANGE ,16-Bit Op" "0,1" bitfld.long 0x0C 14. " SCRATCH_PMU_B_0_USE_GPIO_RANGE ,SCRATCH_PMU_B_0_USE_GPIO_RANGE" "0,1" textline " " hexmask.long.byte 0x0C 0.--6. 1. " SCRATCH_PMU_B_0_I2CSLV1_RANGE ,I2C Slave Address" tree.end tree "UTMIP & UHSIC Config" width 42. group.long 0x26C++0x23 line.long 0x00 "UTMIP_UHSIC_LINE_WAKEUP_0,UHSIC and UTMIP latching line wake-up event control" bitfld.long 0x00 4. " UTMIP_LINE_WAKEUP_EN_P3 ,Enables latching line wake-up event on UTMIP p3" "Disabled,Enabled" bitfld.long 0x00 3. " UHSIC_LINE_WAKEUP_EN_P0 ,Enables latching line wake-up event on UHSIC p0" "Disabled,Enabled" bitfld.long 0x00 2. " UTMIP_LINE_WAKEUP_EN_P2 ,Enables latching line wake-up event on UTMIP p2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UTMIP_LINE_WAKEUP_EN_P1 ,Enables latching line wake-up event on UTMIP p1" "Disabled,Enabled" bitfld.long 0x00 0. " UTMIP_LINE_WAKEUP_EN_P0 ,Enables latching line wake-up event on UTMIP p0" "Disabled,Enabled" line.long 0x04 "UTMIP_BIAS_MASTER_CNTRL_0,UTMIP master bias control" bitfld.long 0x04 3. " UTMIP_BIAS_MASTER_AWAKE_AND ,Master awake AND setup" "0,1" bitfld.long 0x04 2. " UTMIP_BIAS_MASTER_AWAKE_OR ,Master awake OR setup" "0,1" bitfld.long 0x04 1. " UTMIP_BIAS_MASTER_PROG_VAL ,Master programmable value" "0,1" textline " " bitfld.long 0x04 0. " UTMIP_BIAS_MASTER_PROG_CTRL ,Use programmable value on BIAS" "No,Yes" line.long 0x08 "UTMIP_MASTER_CONFIG_0,UHSIC and UTMIP master configuration" bitfld.long 0x08 4. " UTMIP_PWR_P3 ,Enables UTMIP p3 low power mode" "Disabled,Enabled" bitfld.long 0x08 3. " UHSIC_PWR_P0 ,Enables UHSIC p0 low power mode" "Disabled,Enabled" bitfld.long 0x08 2. " UTMIP_PWR_P2 ,Enables UTMIP p2 low power mode" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " UTMIP_PWR_P1 ,Enables UTMIP p1 low power mode" "Disabled,Enabled" bitfld.long 0x08 0. " UTMIP_PWR_P0 ,Enables UTMIP p0 low power mode" "Disabled,Enabled" line.long 0x0C "TD_PWRGATE_INTER_PART_TIMER_0,TD Power-Gating Timing Between Partition Power-Gating" bitfld.long 0x0C 0.--3. " DATA ,Timing between consecutive partitions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "UTMIP_UHSIC2_TRIGGERS_0,Triggers for USB Ports" bitfld.long 0x10 3. " UHSIC_CLR_WAKE_ALARM_P1 ,Clear wake event for UHSIC port 0" "NULL,TRIG" bitfld.long 0x10 2. " UHSIC_FORCE_WALK_P1 ,Force pointer walk for UHSIC port 0" "NULL,TRIG" bitfld.long 0x10 0. " UHSIC_CLR_WALK_PTR_P1 ,Clear sleep walk pointer for UHSIC port 1" "NULL,TRIG" line.long 0x14 "UTMIP_UHSIC2_SAVED_STATE_0,Saved DPD State for all UTMIP and UHSIC Ports" bitfld.long 0x14 15. " UTMIP_WAKE_EX_P3 ,Wakeup on anything except a Particular Line Value" "OFF,ON" bitfld.long 0x14 14. " UTMIP_IGNORE_MASTER_CFG_P3 ,UTMIP ignore master config (P3)" "Disabled,Enabled" bitfld.long 0x14 10.--13. " UTMIP_SCRATCH_P3 ,Scratch information about P3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 8.--9. " UTMIP_SPEED_P3 ,UTMIP Speed prior to DPD" "HS,FS,LS,RST" bitfld.long 0x14 7. " UHSIC_WAKE_EX_P1 ,Wake up on anything except a particular line value" "OFF,ON" bitfld.long 0x14 6. " UHSIC_IGNORE_MASTER_CFG_P1 ,UHSIC ignore master config (P1)" "Disabled,Enabled" textline " " bitfld.long 0x14 1.--5. " UHSIC_SCRATCH_P1 ,Scratch information about P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 0. " UHSIC_MODE_P1 ,UHSIC Speed prior to DPD" "HS,RST" line.long 0x18 "UTMIP_UHSIC2_SLEEP_CFG_0,Sleep Walk Sequence Enables" bitfld.long 0x18 4.--7. " UHSIC_WAKE_VAL_P1 ,Line Value Wake Up Condition on UHSIC P1" "SD00,SD01,SD10,SD11,S0,S1,,,D0,,D1,,NONE,SEDGE,DEDGE,ANY" bitfld.long 0x18 0. " UHSIC_MASTER_ENABLE_P1 ,Enable use of master pins on UHSIC P1" "Disabled,Enabled" line.long 0x1C "UTMIP_UHSIC2_SLEEPWALK_CFG_0,Sleep Walk Sequence Enables" bitfld.long 0x1C 15. " UTMIP_LINEVAL_WALK_EN_P3 ,Perform Walk on USB line value wake up for UTMIP P3" "Disabled,Enabled" bitfld.long 0x1C 14. " UTMIP_WAKE_WALK_EN_P3 ,Perform Walk on any chip wake up event for UTMIP P3" "Disabled,Enabled" bitfld.long 0x1C 13. " UTMIP_GPIO_WALK_EN_P3 ,Perform Walk on associated GPIO event for UTMIP P3" "Disabled,Enabled" textline " " bitfld.long 0x1C 8.--12. " UTMIP_DESIGNATED_GPIO_P3 ,GPIO Number associated with UTMIP P3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 7. " UHSIC_LINEVAL_WALK_EN_P1 ,Perform walk on USB line value wake up for UHSIC P1" "Disabled,Enabled" bitfld.long 0x1C 6. " UHSIC_WAKE_WALK_EN_P1 ,Perform walk on any chip wake up event for UHSIC P1" "Disabled,Enabled" textline " " bitfld.long 0x1C 5. " UHSIC_GPIO_WALK_EN_P1 ,Perform walk on associated GPIO event for UHSIC P1" "Disabled,Enabled" bitfld.long 0x1C 0.--4. " UHSIC_DESIGNATED_GPIO_P1 ,GPIO Number associated with UHSIC P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "UHSIC2_SLEEPWALK_P1_0,Signaling Sequence for UHSIC Port 0 Wakeup" bitfld.long 0x20 27. " UHSIC_DATA_RPU_D ,Phase D Pull up on DATA Line" "Disabled,Enabled" bitfld.long 0x20 26. " UHSIC_STROBE_RPU_D ,Phase D Pull Up on STROBE Line" "Disabled,Enabled" bitfld.long 0x20 25. " UHSIC_DATA_RPD_D ,Phase D Pull Down on DATA Line" "Disabled,Enabled" textline " " bitfld.long 0x20 24. " UHSIC_STROBE_RPD_D ,Phase D Pull Down on STROBE Line" "Disabled,Enabled" bitfld.long 0x20 19. " UHSIC_DATA_RPU_C ,Phase C Pull up on DATA Line" "Disabled,Enabled" bitfld.long 0x20 18. " UHSIC_STROBE_RPU_C ,Phase C Pull Up on STROBE Line" "Disabled,Enabled" textline " " bitfld.long 0x20 17. " UHSIC_DATA_RPD_C ,Phase C Pull Down on DATA Line" "Disabled,Enabled" bitfld.long 0x20 16. " UHSIC_STROBE_RPD_C ,Phase C Pull Down on STROBE Line" "Disabled,Enabled" bitfld.long 0x20 11. " UHSIC_DATA_RPU_B ,Phase B Pull up on DATA Line" "Disabled,Enabled" textline " " bitfld.long 0x20 10. " UHSIC_STROBE_RPU_B ,Phase B Pull Up on STROBE Line" "Disabled,Enabled" bitfld.long 0x20 9. " UHSIC_DATA_RPD_B ,Phase B Pull Down on DATA Line" "Disabled,Enabled" bitfld.long 0x20 8. " UHSIC_STROBE_RPD_B ,Phase B Pull Down on STROBE Line" "Disabled,Enabled" textline " " bitfld.long 0x20 3. " UHSIC_DATA_RPU_A ,Phase A Pull up on DATA Line" "Disabled,Enabled" bitfld.long 0x20 2. " UHSIC_STROBE_RPU_A ,Phase A Pull Up on STROBE Line" "Disabled,Enabled" bitfld.long 0x20 1. " UHSIC_DATA_RPD_A ,Phase A Pull Down on DATA Line" "Disabled,Enabled" textline " " bitfld.long 0x20 0. " UHSIC_STROBE_RPD_A ,Phase A Pull Down on STROBE Line" "Disabled,Enabled" rgroup.long 0x290++0x03 line.long 0x00 "UTMIP_UHSIC2_STATUS_0,Status of UTMIP UHSIC Wakeup Circuitry" bitfld.long 0x00 4. " UHSIC_WAKE_ALARM_P1 ,A wake event occurred on UHSIC port 1" "Not occurred,Occurred" bitfld.long 0x00 3. " DATA_VAL_P1 ,Value of DATA line detector for UHSIC port 1" "0,1" bitfld.long 0x00 2. " STROBE_VAL_P1 ,Value of STROBE line detector for UHSIC port 1" "0,1" textline " " bitfld.long 0x00 0.--1. " UHSIC_WALK_PTR_P1 ,Walk pointer for UHSIC port 0" "0,1,2,3" group.long 0x294++0x0F line.long 0x00 "UTMIP_UHSIC2_FAKE_0,Fake the Line Value for the PMC Pad Macro" bitfld.long 0x00 15. " UTMIP_ID_FAKE_EN_P3 ,Enable the fake ID value for UTMIP P2" "Disabled,Enabled" bitfld.long 0x00 14. " UTMIP_ID_FAKE_VAL_P3 ,Fake ID value for UTMIP P2" "Disabled,Enabled" bitfld.long 0x00 13. " UTMIP_VBUS_FAKE_EN_P3 ,Enable the fake VBUS WAKEUP value for UTMIP P2" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " UTMIP_VBUS_FAKE_VAL_P3 ,Fake VBUS WAKEUP value for UTMIP P2" "Disabled,Enabled" bitfld.long 0x00 11. " UTMIP_FAKE_USBON_EN_P3 ,Enable the fake line value for D- for the PMC pad macro for UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 10. " UTMIP_FAKE_USBOP_EN_P3 ,Enable the fake line value for D+ for the PMC pad macro for UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " UTMIP_FAKE_USBON_VAL_P3 ,Fake line value for D- for the PMC pad macro for UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 8. " UTMIP_FAKE_USBOP_VAL_P3 ,Fake line value for D+ for the PMC pad macro for UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 3. " UHSIC_FAKE_DATA_EN_P1 ,Enable the fake line value for DATA for the PMC pad macro for UHSIC P0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " UHSIC_FAKE_STROBE_EN_P1 ,Enable the fake line value for STROBE for the PMC pad macro for UHSIC P0" "Disabled,Enabled" bitfld.long 0x00 1. " UHSIC_FAKE_DATA_VAL_P1 ,Fake line value for DATA for the PMC pad macro for UHSIC P0" "Disabled,Enabled" bitfld.long 0x00 0. " UHSIC_FAKE_STROBE_VAL_P1 ,Fake line value for STROBE for the PMC pad macro for UHSIC P0" "Disabled,Enabled" line.long 0x04 "UTMIP_UHSIC2_LINE_WAKEUP_0,UHSIC latching line wake-up event control" bitfld.long 0x04 0. " UHSIC_LINE_WAKEUP_EN_P1 ,Enable latching line wake-up event on UHSIC P1" "Disabled,Enabled" line.long 0x08 "UTMIP_MASTER2_CONFIG_0,Select the MASTER functions mode of operation" bitfld.long 0x08 0. " UHSIC_PWR_P1 ,Enable UHSIC P1 low power mode" "Disabled,Enabled" line.long 0x0C "UTMIP_UHSIC_RPD_CFG_0,Pull down configuration" bitfld.long 0x0C 11. " WEAKPD_ANYTIME_P3 ,Enable weak pulldown for UTMIP P3 anytime" "Disabled,Enabled" bitfld.long 0x0C 10. " DP_WEAKPD_CFG_P3 ,Enable weak pulldown for UTMIP P3 on D+" "Disabled,Enabled" bitfld.long 0x0C 9. " DM_WEAKPD_CFG_P3 ,Enable weak pulldown for UTMIP P3 on D-" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " WEAKPD_ANYTIME_P2 ,Enable weak pulldown for UTMIP P2 anytime" "Disabled,Enabled" bitfld.long 0x0C 7. " DP_WEAKPD_CFG_P2 ,Enable weak pulldown for UTMIP P2 on D+" "Disabled,Enabled" bitfld.long 0x0C 6. " DM_WEAKPD_CFG_P2 ,Enable weak pulldown for UTMIP P2 on D-" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " WEAKPD_ANYTIME_P1 ,Enable weak pulldown for UTMIP P1 anytime" "Disabled,Enabled" bitfld.long 0x0C 4. " DP_WEAKPD_CFG_P1 ,Enable weak pulldown for UTMIP P1 on D+" "Disabled,Enabled" bitfld.long 0x0C 3. " DM_WEAKPD_CFG_P1 ,Enable weak pulldown for UTMIP P1 on D-" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " WEAKPD_ANYTIME_P0 ,Enable weak pulldown for UTMIP P0 anytime" "Disabled,Enabled" bitfld.long 0x0C 1. " DP_WEAKPD_CFG_P0 ,Enable weak pulldown for UTMIP P0 on D+" "Disabled,Enabled" bitfld.long 0x0C 0. " DM_WEAKPD_CFG_P0 ,Enable weak pulldown for UTMIP P0 on D-" "Disabled,Enabled" tree.end tree "Power Control 5" width 23. group.long 0x2A4++0x27 line.long 0x00 "PG_MASK_CE0_0,PMC PG mask CE0_0" hexmask.long.byte 0x00 0.--7. 1. " MASK ,Mask CE1 rail" line.long 0x04 "PG_MASK_3_0,PMC PG mask 3_0 register" hexmask.long.byte 0x04 24.--31. 1. " DISB ,Mask DISB rail" hexmask.long.byte 0x04 16.--23. 1. " DIS ,Mask DIS rail" hexmask.long.byte 0x04 0.--7. 1. " C0NC ,Mask C0NC rail" line.long 0x08 "PG_MASK_4_0,PMC PG mask 4_0 register" hexmask.long.byte 0x08 24.--31. 1. " SOR ,Mask SOR rail" hexmask.long.byte 0x08 16.--23. 1. " XUSBC ,Mask XUSBC rail" hexmask.long.byte 0x08 8.--15. 1. " XUSBB ,Mask XUSBB rail" hexmask.long.byte 0x08 0.--7. 1. " XUSBA ,Mask XUSBA rail" line.long 0x0C "PLLM_WB0_OVERRIDE2_0,PMC PLLM WB0 override2_0" bitfld.long 0x0C 27.--31. " DIVP ,4 bit DIVP for PLLM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 26. " KVCO ,KVCO/VCO gain" "Disabled,Enabled" bitfld.long 0x0C 24.--25. " KCP ,Charge pump control" "0,1,2,3" hexmask.long.word 0x0C 0.--15. 1. " SETUP ,Setup" line.long 0x10 "TSC_MULT_0,PMC_TSC_MULT 0 register" bitfld.long 0x10 17.--19. " TICK_SEL ,Select one of the six binary time stamp counter bits" "BIT0,BIT1,BIT2,BIT3,BIT4,BIT5,?..." rbitfld.long 0x10 16. " FREQ_STS ,Clock frequency being used for counter" "Fast,Slow" hexmask.long.word 0x10 0.--15. 1. " MULT_VAL ,TSC multiply value" line.long 0x14 "CPU_VSENSE_OVERRIDE_0,PMC CPU VSENSE override_0" bitfld.long 0x14 5. " VDD ,VDD sensing override" "No override,Override" bitfld.long 0x14 4. " C0NC ,C0NC VVDD partition sensing override" "No override,Override" bitfld.long 0x14 3. " CE3 ,CE3 VVDD partition sensing override" "No override,Override" bitfld.long 0x14 2. " CE2 ,CE2 VVDD partition sensing override " "No override,Override" textline " " bitfld.long 0x14 1. " CE1 ,CE1 VVDD partition sensing override " "No override,Override" bitfld.long 0x14 0. " CE0 ,CE0 VVDD partition sensing override" "No override,Override" line.long 0x18 "GLB_AMAP_CFG_0,GLB_AMAP_CFG" bitfld.long 0x18 14. " AHB_A1 ,AHB A1 aperture" "MMIO,DRAM" bitfld.long 0x18 10. " GART_GPU ,GART GPU aperture" "MMIO,DRAM" bitfld.long 0x18 7. " NOR_A3 ,NOR A3 aperture" "MMIO,DRAM" bitfld.long 0x18 6. " NOR_A2 ,NOR A2 aperture" "MMIO,DRAM" textline " " bitfld.long 0x18 5. " NOR_A1 ,NOR A1 aperture" "MMIO,DRAM" bitfld.long 0x18 3. " PCIE_A3 ,PCIE A3 aperture" "MMIO,DRAM" bitfld.long 0x18 2. " PCIE_A2 , PCIE A2 aperture" "MMIO,DRAM" bitfld.long 0x18 1. " PCIE_A1 , PCIE A1 aperture" "MMIO,DRAM" textline " " bitfld.long 0x18 0. " IROM_LOVEC ,IROM Lovec aperture" "MMIO,DRAM" line.long 0x1C "STICKY_BITS_0,PMC Sticky Bits 0 Controller" bitfld.long 0x1C 8. " VI ,VI" "Disabled,Enabled" bitfld.long 0x1C 0. " HDA_LPBK_DIS ,Sticky one bt to disable the loopback in HDA codec" "Disabled,Enabled" line.long 0x20 "SEC_DISABLE2_0,PMC SEC DISABLE2 Controller" bitfld.long 0x20 31. " READ23 ,Disable reads from secure register 23" "Off,On" bitfld.long 0x20 30. " WRITE23 ,Disable writes from secure register 23" "Off,On" bitfld.long 0x20 29. " READ22 ,Disable reads from secure register 22" "Off,On" bitfld.long 0x20 28. " WRITE22 ,Disable writes from secure register 22" "Off,On" textline " " bitfld.long 0x20 27. " READ21 ,Disable reads from secure register 21" "Off,On" bitfld.long 0x20 26. " WRITE21 ,Disable writes from secure register 21" "Off,On" bitfld.long 0x20 25. " READ20 ,Disable reads from secure register 20" "Off,On" bitfld.long 0x20 24. " WRITE20 ,Disable writes from secure register 20" "Off,On" textline " " bitfld.long 0x20 23. " READ19 ,Disable reads from secure register 19" "Off,On" bitfld.long 0x20 22. " WRITE19 ,Disable writes from secure register 19" "Off,On" bitfld.long 0x20 21. " READ18 ,Disable reads from secure register 18" "Off,On" bitfld.long 0x20 20. " WRITE18 ,Disable writes from secure register 18" "Off,On" textline " " bitfld.long 0x20 19. " READ17 ,Disable reads from secure register 17" "Off,On" bitfld.long 0x20 18. " WRITE17 ,Disable writes from secure register 17" "Off,On" bitfld.long 0x20 17. " READ16 ,Disable reads from secure register 16" "Off,On" bitfld.long 0x20 16. " WRITE16 ,Disable writes from secure register 16" "Off,On" textline " " bitfld.long 0x20 15. " READ15 ,Disable reads from secure register 15" "Off,On" bitfld.long 0x20 14. " WRITE15 ,Disable writes from secure register 15" "Off,On" bitfld.long 0x20 13. " READ14 ,Disable reads from secure register 14" "Off,On" bitfld.long 0x20 12. " WRITE14 ,Disable writes from secure register 14" "Off,On" textline " " bitfld.long 0x20 11. " READ13 ,Disable reads from secure register 13" "Off,On" bitfld.long 0x20 10. " WRITE13 ,Disable writes from secure register 13" "Off,On" bitfld.long 0x20 9. " READ12 ,Disable reads from secure register 12" "Off,On" bitfld.long 0x20 8. " WRITE12 ,Disable writes from secure register 12" "Off,On" textline " " bitfld.long 0x20 7. " READ11 ,Disable reads from secure register 11" "Off,On" bitfld.long 0x20 6. " WRITE11 ,Disable writes from secure register 11" "Off,On" bitfld.long 0x20 5. " READ10 ,Disable reads from secure register 10" "Off,On" bitfld.long 0x20 4. " WRITE10 ,Disable writes from secure register 10" "Off,On" textline " " bitfld.long 0x20 3. " READ9 ,Disable reads from secure register 9" "Off,On" bitfld.long 0x20 2. " WRITE9 ,Disable writes from secure register 9" "Off,On" bitfld.long 0x20 1. " READ8 ,Disable reads from secure register 8" "Off,On" bitfld.long 0x20 0. " WRITE8 ,Disable writes from secure register 8" "Off,On" line.long 0x24 "WEAK_BIAS_0,PMC WEAK BIAS_0 Controller" bitfld.long 0x24 30. " VTT_E_WB_DDLL ,weak bias enable for ddll pad" "Disabled,Enabled" bitfld.long 0x24 29. " VTT_E_WB_BR11 ,weak bias enable for brick11" "Disabled,Enabled" bitfld.long 0x24 28. " VTT_E_WB_BR10 ,weak bias enable for brick10" "Disabled,Enabled" bitfld.long 0x24 27. " VTT_E_WB_BR9 ,weak bias enable for brick9" "Disabled,Enabled" textline " " bitfld.long 0x24 26. " VTT_E_WB_BR8 ,weak bias enable for brick8" "Disabled,Enabled" bitfld.long 0x24 25. " VTT_E_WB_BR7 ,weak bias enable for brick7" "Disabled,Enabled" bitfld.long 0x24 24. " VTT_E_WB_BR6 ,weak bias enable for brick6" "Disabled,Enabled" bitfld.long 0x24 23. " VTT_E_WB_BR5 ,weak bias enable for brick5" "Disabled,Enabled" textline " " bitfld.long 0x24 22. " VTT_E_WB_BR4 ,weak bias enable for brick4" "Disabled,Enabled" bitfld.long 0x24 21. " VTT_E_WB_BR3 ,weak bias enable for brick3" "Disabled,Enabled" bitfld.long 0x24 20. " VTT_E_WB_BR2 ,weak bias enable for brick2" "Disabled,Enabled" bitfld.long 0x24 19. " VTT_E_WB_BR1 ,weak bias enable for brick1" "Disabled,Enabled" textline " " bitfld.long 0x24 18. " VTT_E_WB_BR0 ,weak bias enable for brick0" "Disabled,Enabled" bitfld.long 0x24 17. " VTT_E_WB_CDBBUF_1 ,weak bias enable for cdbbuf_1 pad" "Disabled,Enabled" bitfld.long 0x24 16. " VTT_E_WB_CDBBUF_0 ,weak bias enable for cdbbuf_0 pad" "Disabled,Enabled" group.long 0x2D0++0x13 line.long 0x00 "PG_MASK_ANDOR_0,PMC PG MASK ANDOR_0 Controller" bitfld.long 0x00 29. " VE2 ,VE2" "AND,OR" bitfld.long 0x00 28. " DFD ,DFD" "AND,OR" bitfld.long 0x00 27. " AUD ,AUD" "AND,OR" bitfld.long 0x00 26. " NVJPG ,NVJPG" "AND,OR" textline " " bitfld.long 0x00 25. " NVDEC ,NVDEC" "AND,OR" bitfld.long 0x00 24. " IRAM ,IRAM" "AND,OR" bitfld.long 0x00 23. " VIC ,VIC" "AND,OR" bitfld.long 0x00 22. " XUSBC ,Override for XUSBC" "AND,OR" textline " " bitfld.long 0x00 21. " XUSBB ,Override for XUSBB" "AND,OR" bitfld.long 0x00 20. " XUSBA ,Override for XUSBA" "AND,OR" bitfld.long 0x00 19. " DISB ,Override for DISB partition" "AND,OR" bitfld.long 0x00 18. " DIS ,Override for DIS partition" "AND,OR" textline " " bitfld.long 0x00 17. " SOR ,SOR" "AND,OR" bitfld.long 0x00 16. " C1NC ,AND or OR override for Cluster 1 Non-CPU partition" "AND,OR" bitfld.long 0x00 15. " C0NC ,AND or OR override for Cluster 0 Non-CPU partition" "AND,OR" bitfld.long 0x00 14. " CE0 ,Used as AND or OR override for CPU0 partition" "AND,OR" textline " " bitfld.long 0x00 11. " CE3 ,Used as AND or OR override for CE3 partition" "AND,OR" bitfld.long 0x00 10. " CE2 ,Used as AND or OR override for CE2 partition" "AND,OR" bitfld.long 0x00 9. " CE1 ,Used as AND or OR override for CE1 partition" "AND,OR" bitfld.long 0x00 8. " SAX ,SAX" "AND,OR" textline " " bitfld.long 0x00 6. " MPE ,NV_ADDRESS_MAP_PWRGATE_HEG" "AND,OR" bitfld.long 0x00 3. " PCX ,PCX" "AND,OR" bitfld.long 0x00 2. " VE ,AND or OR override for VE partition" "AND,OR" line.long 0x04 "GPU_RG_CNTRL_0,GPU Rail Gating Register" bitfld.long 0x04 0. " RAIL_CLAMP ,Enabling and removing GPU-SOC clamps" "Disabled,Enabled" line.long 0x08 "SEC_DISABLE3_0,PMC SEC DISABLE 3_0 Controller" bitfld.long 0x08 31. " READ39 ,Disable reads from secure register 35" "Off,On" bitfld.long 0x08 30. " WRITE39 ,Disable writes to secure register 35" "Off,On" bitfld.long 0x08 29. " READ38 ,Disable reads from secure register 35" "Off,On" bitfld.long 0x08 28. " WRITE38 ,Disable writes to secure register 35" "Off,On" textline " " bitfld.long 0x08 27. " READ37 ,Disable reads from secure register 35" "Off,On" bitfld.long 0x08 26. " WRITE37 ,Disable writes to secure register 35" "Off,On" bitfld.long 0x08 25. " READ36 ,Disable reads from secure register 35" "Off,On" bitfld.long 0x08 24. " WRITE36 ,Disable writes to secure register 35" "Off,On" textline " " bitfld.long 0x08 23. " READ35 ,Disable reads from secure register 35" "Off,On" bitfld.long 0x08 22. " WRITE35 ,Disable writes to secure register 35" "Off,On" bitfld.long 0x08 21. " READ34 ,Disable reads from secure register 34" "Off,On" bitfld.long 0x08 20. " WRITE34 ,Disable writes to secure register 34" "Off,On" textline " " bitfld.long 0x08 19. " READ33 ,Disable reads from secure register 33" "Off,On" bitfld.long 0x08 18. " WRITE33 ,Disable writes from secure register 33" "Off,On" bitfld.long 0x08 17. " READ32 ,Disable reads from secure register 32" "Off,On" bitfld.long 0x08 16. " WRITE32 ,Disable writes to secure register 32" "Off,On" textline " " bitfld.long 0x08 15. " READ31 ,Disable reads from secure register 31" "Off,On" bitfld.long 0x08 14. " WRITE31 ,Disable writes to secure register 31" "Off,On" bitfld.long 0x08 13. " READ30 ,Disable reads from secure register 30" "Off,On" bitfld.long 0x08 12. " WRITE30 ,Disable writes to secure register 30" "Off,On" textline " " bitfld.long 0x08 11. " READ29 ,Disable reads from secure register 29" "Off,On" bitfld.long 0x08 10. " WRITE29 ,Disable writes from secure register 29" "Off,On" bitfld.long 0x08 9. " READ28 ,Disable reads from secure register 28" "Off,On" bitfld.long 0x08 8. " WRITE28 ,Disable writes to secure register 28" "Off,On" textline " " bitfld.long 0x08 7. " READ27 ,Disable reads from secure register 27" "Off,On" bitfld.long 0x08 6. " WRITE27 ,Disable writes from secure register 27" "Off,On" bitfld.long 0x08 5. " READ26 ,Disable reads to secure register 26" "Off,On" bitfld.long 0x08 4. " WRITE26 ,Disable writes from secure register 26" "Off,On" textline " " bitfld.long 0x08 3. " READ25 ,Disable reads to secure register 25" "Off,On" bitfld.long 0x08 2. " WRITE25 ,Disable writes from secure register 25" "Off,On" bitfld.long 0x08 1. " READ24 ,Disable reads from secure register 24" "Off,On" bitfld.long 0x08 0. " WRITE24 ,Disable writes from secure register 24" "Off,On" line.long 0x0C "PG_MASK_5_0,PMC_PG_MASK_5_0 Register" hexmask.long.byte 0x0C 24.--31. 1. " DFD ,Mask DFD rail" hexmask.long.byte 0x0C 16.--23. 1. " AUD ,Mask AUD rail" hexmask.long.byte 0x0C 8.--15. 1. " NVJPG ,Mask NVJPG rail" hexmask.long.byte 0x0C 0.--7. 1. " NVDEC ,Mask NVDEC rail" line.long 0x10 "PG_MASK_6_0,PMC_PG_MASK_6_0 Register" hexmask.long.byte 0x10 0.--7. 1. " VE2 ,Mask VE2 rail" tree.end tree "Scratch Registers 4" width 20. group.long 0x300++0x03 line.long 0x00 "SECURE_SCRATCH8_0,Secure scratch register 8" group.long 0x304++0x03 line.long 0x00 "SECURE_SCRATCH9_0,Secure scratch register 9" group.long 0x308++0x03 line.long 0x00 "SECURE_SCRATCH10_0,Secure scratch register 10" group.long 0x30C++0x03 line.long 0x00 "SECURE_SCRATCH11_0,Secure scratch register 11" group.long 0x310++0x03 line.long 0x00 "SECURE_SCRATCH12_0,Secure scratch register 12" group.long 0x314++0x03 line.long 0x00 "SECURE_SCRATCH13_0,Secure scratch register 13" group.long 0x318++0x03 line.long 0x00 "SECURE_SCRATCH14_0,Secure scratch register 14" group.long 0x31C++0x03 line.long 0x00 "SECURE_SCRATCH15_0,Secure scratch register 15" group.long 0x320++0x03 line.long 0x00 "SECURE_SCRATCH16_0,Secure scratch register 16" group.long 0x324++0x03 line.long 0x00 "SECURE_SCRATCH17_0,Secure scratch register 17" group.long 0x328++0x03 line.long 0x00 "SECURE_SCRATCH18_0,Secure scratch register 18" group.long 0x32C++0x03 line.long 0x00 "SECURE_SCRATCH19_0,Secure scratch register 19" group.long 0x330++0x03 line.long 0x00 "SECURE_SCRATCH20_0,Secure scratch register 20" group.long 0x334++0x03 line.long 0x00 "SECURE_SCRATCH21_0,Secure scratch register 21" group.long 0x338++0x03 line.long 0x00 "SECURE_SCRATCH22_0,Secure scratch register 22" group.long 0x33C++0x03 line.long 0x00 "SECURE_SCRATCH23_0,Secure scratch register 23" group.long 0x340++0x03 line.long 0x00 "SECURE_SCRATCH24_0,Secure scratch register 24" group.long 0x344++0x03 line.long 0x00 "SECURE_SCRATCH25_0,Secure scratch register 25" group.long 0x348++0x03 line.long 0x00 "SECURE_SCRATCH26_0,Secure scratch register 26" group.long 0x34C++0x03 line.long 0x00 "SECURE_SCRATCH27_0,Secure scratch register 27" group.long 0x350++0x03 line.long 0x00 "SECURE_SCRATCH28_0,Secure scratch register 28" group.long 0x354++0x03 line.long 0x00 "SECURE_SCRATCH29_0,Secure scratch register 29" group.long 0x358++0x03 line.long 0x00 "SECURE_SCRATCH30_0,Secure scratch register 30" group.long 0x35C++0x03 line.long 0x00 "SECURE_SCRATCH31_0,Secure scratch register 31" group.long 0x360++0x03 line.long 0x00 "SECURE_SCRATCH32_0,Secure scratch register 32" group.long 0x364++0x03 line.long 0x00 "SECURE_SCRATCH33_0,Secure scratch register 33" group.long 0x368++0x03 line.long 0x00 "SECURE_SCRATCH34_0,Secure scratch register 34" group.long 0x36C++0x03 line.long 0x00 "SECURE_SCRATCH35_0,Secure scratch register 35" group.long 0x370++0x03 line.long 0x00 "SECURE_SCRATCH36_0,Secure scratch register 36" group.long 0x374++0x03 line.long 0x00 "SECURE_SCRATCH37_0,Secure scratch register 37" group.long 0x378++0x03 line.long 0x00 "SECURE_SCRATCH38_0,Secure scratch register 38" group.long 0x37C++0x03 line.long 0x00 "SECURE_SCRATCH39_0,Secure scratch register 39" group.long 0x380++0x03 line.long 0x00 "SECURE_SCRATCH40_0,Secure scratch register 40" group.long 0x384++0x03 line.long 0x00 "SECURE_SCRATCH41_0,Secure scratch register 41" group.long 0x388++0x03 line.long 0x00 "SECURE_SCRATCH42_0,Secure scratch register 42" group.long 0x38C++0x03 line.long 0x00 "SECURE_SCRATCH43_0,Secure scratch register 43" group.long 0x390++0x03 line.long 0x00 "SECURE_SCRATCH44_0,Secure scratch register 44" group.long 0x394++0x03 line.long 0x00 "SECURE_SCRATCH45_0,Secure scratch register 45" group.long 0x398++0x03 line.long 0x00 "SECURE_SCRATCH46_0,Secure scratch register 46" group.long 0x39C++0x03 line.long 0x00 "SECURE_SCRATCH47_0,Secure scratch register 47" group.long 0x3A0++0x03 line.long 0x00 "SECURE_SCRATCH48_0,Secure scratch register 48" group.long 0x3A4++0x03 line.long 0x00 "SECURE_SCRATCH49_0,Secure scratch register 49" group.long 0x3A8++0x03 line.long 0x00 "SECURE_SCRATCH50_0,Secure scratch register 50" group.long 0x3AC++0x03 line.long 0x00 "SECURE_SCRATCH51_0,Secure scratch register 51" group.long 0x3B0++0x03 line.long 0x00 "SECURE_SCRATCH52_0,Secure scratch register 52" group.long 0x3B4++0x03 line.long 0x00 "SECURE_SCRATCH53_0,Secure scratch register 53" group.long 0x3B8++0x03 line.long 0x00 "SECURE_SCRATCH54_0,Secure scratch register 54" group.long 0x3BC++0x03 line.long 0x00 "SECURE_SCRATCH55_0,Secure scratch register 55" group.long 0x3C0++0x03 line.long 0x00 "SECURE_SCRATCH56_0,Secure scratch register 56" group.long 0x3C4++0x03 line.long 0x00 "SECURE_SCRATCH57_0,Secure scratch register 57" group.long 0x3C8++0x03 line.long 0x00 "SECURE_SCRATCH58_0,Secure scratch register 58" group.long 0x3CC++0x03 line.long 0x00 "SECURE_SCRATCH59_0,Secure scratch register 59" group.long 0x3D0++0x03 line.long 0x00 "SECURE_SCRATCH60_0,Secure scratch register 60" group.long 0x3D4++0x03 line.long 0x00 "SECURE_SCRATCH61_0,Secure scratch register 61" group.long 0x3D8++0x03 line.long 0x00 "SECURE_SCRATCH62_0,Secure scratch register 62" group.long 0x3DC++0x03 line.long 0x00 "SECURE_SCRATCH63_0,Secure scratch register 63" group.long 0x3E0++0x03 line.long 0x00 "SECURE_SCRATCH64_0,Secure scratch register 64" group.long 0x3E4++0x03 line.long 0x00 "SECURE_SCRATCH65_0,Secure scratch register 65" group.long 0x3E8++0x03 line.long 0x00 "SECURE_SCRATCH66_0,Secure scratch register 66" group.long 0x3EC++0x03 line.long 0x00 "SECURE_SCRATCH67_0,Secure scratch register 67" group.long 0x3F0++0x03 line.long 0x00 "SECURE_SCRATCH68_0,Secure scratch register 68" group.long 0x3F4++0x03 line.long 0x00 "SECURE_SCRATCH69_0,Secure scratch register 69" group.long 0x3F8++0x03 line.long 0x00 "SECURE_SCRATCH70_0,Secure scratch register 70" group.long 0x3FC++0x03 line.long 0x00 "SECURE_SCRATCH71_0,Secure scratch register 71" group.long 0x400++0x03 line.long 0x00 "SECURE_SCRATCH72_0,Secure scratch register 72" group.long 0x404++0x03 line.long 0x00 "SECURE_SCRATCH73_0,Secure scratch register 73" group.long 0x408++0x03 line.long 0x00 "SECURE_SCRATCH74_0,Secure scratch register 74" group.long 0x40C++0x03 line.long 0x00 "SECURE_SCRATCH75_0,Secure scratch register 75" group.long 0x410++0x03 line.long 0x00 "SECURE_SCRATCH76_0,Secure scratch register 76" group.long 0x414++0x03 line.long 0x00 "SECURE_SCRATCH77_0,Secure scratch register 77" group.long 0x418++0x03 line.long 0x00 "SECURE_SCRATCH78_0,Secure scratch register 78" group.long 0x41C++0x03 line.long 0x00 "SECURE_SCRATCH79_0,Secure scratch register 79" tree.end tree "PMC Control 2" width 26. group.long 0x440++0x13 line.long 0x00 "CNTRL2_0,Wake interrupt,LP0BB,and Some Miscellaneous Controls" bitfld.long 0x00 14. " ALLOW_PULSE_WAKE ,Allows pulse wakes in case of debounce events and/or USB events" "Disabled,Enabled" bitfld.long 0x00 12. " HOLD_CKE_LOW_EN ,Enable for the PMC to assert CKE low" "Disabled,Enabled" bitfld.long 0x00 11. " SYSCLK_DATA ,SYS_CLK_REQ data value" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SYSCLK_ORRIDE ,SYS_CLK_REQ data override mux control" "HW,SYSCLK_DATA" bitfld.long 0x00 9. " WAKE_DET_EN ,Enable LP0 wake events mechanism to detect wake-events" "Disabled,Enabled" bitfld.long 0x00 0. " WAKE_INT_EN ,Use LP0 wake events to generate a WakeInterrupt interrupt" "Disabled,Enabled" line.long 0x04 "IO_DPD_OFF_MASK_0,DPD mask" bitfld.long 0x04 28. " HDMI ,Mask HDMI" "OFF,ON" bitfld.long 0x04 27. " GPIO ,Mask GPIO" "OFF,ON" bitfld.long 0x04 26. " DEBUG_NONAO ,Mask DEBUG_NONAO" "OFF,ON" textline " " bitfld.long 0x04 25. " DBG ,Mask DBG" "OFF,ON" bitfld.long 0x04 24. " POP_ADDR_CMD ,Mask POP_ADDR_CMD" "OFF,ON" bitfld.long 0x04 23. " POP_CLK ,Mask POP_CLK" "OFF,ON" textline " " bitfld.long 0x04 22. " COMP ,Mask COMP" "OFF,ON" bitfld.long 0x04 21. " DISC_VTTGEN ,Mask DISC_VTTGEN" "OFF,ON" bitfld.long 0x04 20. " POP_VTTGEN ,Mask POP_VTTGEN" "OFF,ON" textline " " bitfld.long 0x04 19. " HSIC ,Mask HSIC" "OFF,ON" bitfld.long 0x04 18. " USB3 ,USB3 pads" "OFF,ON" bitfld.long 0x04 17. " AUDIO ,Mask AUDIO" "OFF,ON" textline " " bitfld.long 0x04 14. " UART ,Mask UART" "OFF,ON" bitfld.long 0x04 12. " USB_BIAS ,Mask USB_BIAS" "OFF,ON" bitfld.long 0x04 10. " USB1 ,Mask USB1" "OFF,ON" textline " " bitfld.long 0x04 9. " USB0 ,Mask USB0" "OFF,ON" bitfld.long 0x04 8. " DDR0_CS1_CKE1 ,DSC CS1 and CKE1" "OFF,ON" bitfld.long 0x04 6. " PEX_CLK2 ,pex clk2 pad-DPD control" "OFF,ON" textline " " bitfld.long 0x04 5. " PEX_CLK1 ,pex clk1 pad-DPD control" "OFF,ON" bitfld.long 0x04 4. " PEX_BIAS ,pex bias pad-DPD control" "OFF,ON" bitfld.long 0x04 3. " MIPI_BIAS ,Mask MIPI_BIAS" "OFF,ON" textline " " bitfld.long 0x04 2. " DSI ,This is named as DSIA in pinout specification" "OFF,ON" bitfld.long 0x04 1. " CSIB ,Mask CSIB" "OFF,ON" bitfld.long 0x04 0. " CSIA ,Mask CSIA" "OFF,ON" line.long 0x08 "IO_DPD2_OFF_MASK_0,DPD off mask need second set due to additional rails" bitfld.long 0x08 29. " AUDIO_HV ,Mask AUDIO_HV" "OFF,ON" bitfld.long 0x08 28. " POP_BIAS ,DPD_OFF_MASK for BG BIAS cells of POP pads" "OFF,ON" bitfld.long 0x08 27. " DISC_BIAS ,DPD_OFF_MASK for BG BIAS cells of DISC pads" "OFF,ON" textline " " bitfld.long 0x08 26. " SYS_DDC ,If DDR_DISC_HAS_BG_BIAS and DDR_DISC_HAS_BG_BIAS == 1" "OFF,ON" bitfld.long 0x08 19. " DP ,Mask DP" "OFF,ON" bitfld.long 0x08 18. " DMIC ,Mask DMIC" "OFF,ON" textline " " bitfld.long 0x08 17. " DDR0_ADDR1_CMD ,Mask DDR0_ADDR1_CMD" "OFF,ON" bitfld.long 0x08 16. " DDR0_ADDR0_CMD ,Mask DDR0_ADDR0_CMD" "OFF,ON" bitfld.long 0x08 15. " SPI_HV ,Mask SPI_HV" "OFF,ON" textline " " bitfld.long 0x08 14. " SPI ,Mask SPI" "OFF,ON" bitfld.long 0x08 13. " CSIF ,Mask CSIF" "OFF,ON" bitfld.long 0x08 12. " CSIE ,Mask CSIE" "OFF,ON" textline " " bitfld.long 0x08 7. " DSIB ,Mask DSIB" "OFF,ON" bitfld.long 0x08 5. " EMMC2 ,Mask EMMC2" "OFF,ON" bitfld.long 0x08 4. " CAM ,Mask CAM" "OFF,ON" textline " " bitfld.long 0x08 3. " EMMC ,Mask EMMC" "OFF,ON" bitfld.long 0x08 2. " SDMMC3 ,Mask SDMMC3" "OFF,ON" bitfld.long 0x08 1. " SDMMC1 ,Mask SDMMC1" "OFF,ON" line.long 0x0C "EVENT_COUNTER_0,Event counter 0" bitfld.long 0x0C 20. " EN ,COUNT enable/disable" "OFF,ON" bitfld.long 0x0C 16.--19. " SEL ,Event Selections" "LP0 to LP0BB,LP0 to ACTIVE,LP0BB to ACTIVE,LP0BB to LP0,?..." hexmask.long.word 0x0C 0.--15. 1. " COUNT ,Event counter" line.long 0x10 "FUSE_CONTROL_0,Fuse Control 0 Register" setclrfld.long 0x10 18. 0x08 16. 0x08 17. " KPS18 ,KPS18" "LOW,HIGH" setclrfld.long 0x10 10. 0x08 8. 0x08 9. " PS18 ,PS18" "LOW,HIGH" bitfld.long 0x10 1. " DISABLE_REDIRECTION ,Sticky disable redirection bit, reset at cold and warm reset" "OFF,ON" textline " " bitfld.long 0x10 0. " ENABLE_REDIRECTION ,Enable redirection bit - only reset at cold reset" "OFF,ON" group.long 0x45C++0x0F line.long 0x00 "IO_DPD3_REQ_0,DPD Request 3 Register" bitfld.long 0x00 30.--31. " CODE ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..." bitfld.long 0x00 27. " DDR_BR11_CMD ,DDR_BR11_CMD Request" "OFF,ON" bitfld.long 0x00 26. " DDR_BR10_CMD ,DDR_BR10_CMD Request" "OFF,ON" textline " " bitfld.long 0x00 25. " DDR_BR9_CMD ,DDR_BR9_CMD Request" "OFF,ON" bitfld.long 0x00 24. " DDR_BR8_CMD ,DDR_BR8_CMD Request" "OFF,ON" bitfld.long 0x00 23. " DDR_BR7_CMD ,DDR_BR7_CMD Request" "OFF,ON" textline " " bitfld.long 0x00 22. " DDR_BR6_CMD ,DDR_BR6_CMD Request" "OFF,ON" bitfld.long 0x00 21. " DDR_BR5_CMD ,DDR_BR5_CMD Request" "OFF,ON" bitfld.long 0x00 20. " DDR_BR4_CMD ,DDR_BR4_CMD Request" "OFF,ON" textline " " bitfld.long 0x00 19. " DDR_BR3_CMD ,DDR_BR3_CMD Request" "OFF,ON" bitfld.long 0x00 18. " DDR_BR2_CMD ,DDR_BR2_CMD Request" "OFF,ON" bitfld.long 0x00 17. " DDR_BR1_CMD ,DDR_BR1_CMD Request" "OFF,ON" textline " " bitfld.long 0x00 16. " DDR_BR0_CMD ,DDR_BR0_CMD Request" "OFF,ON" bitfld.long 0x00 15. " DDR_DDLL ,DDR_DDLL Request" "OFF,ON" bitfld.long 0x00 14. " DDR_CDBBUF1 ,DDR_CDBBUF1 Request" "OFF,ON" textline " " bitfld.long 0x00 13. " DDR_CDBBUF0 ,DDR_CDBBUF0 Request" "OFF,ON" bitfld.long 0x00 12. " DDR_COMP ,DDR_COMP Request" "OFF,ON" bitfld.long 0x00 11. " DDR_BR11 ,DDR_BR11 Request" "OFF,ON" textline " " bitfld.long 0x00 10. " DDR_BR10 ,DDR_BR10 Request" "OFF,ON" bitfld.long 0x00 9. " DDR_BR9 ,DDR_BR9 Request" "OFF,ON" bitfld.long 0x00 8. " DDR_BR8 ,DDR_BR8 Request" "OFF,ON" textline " " bitfld.long 0x00 7. " DDR_BR7 ,DDR_BR7 Request" "OFF,ON" bitfld.long 0x00 6. " DDR_BR6 ,DDR_BR6 Request" "OFF,ON" bitfld.long 0x00 5. " DDR_BR5 ,DDR_BR5 Request" "OFF,ON" textline " " bitfld.long 0x00 4. " DDR_BR4 ,DDR_BR4 Request" "OFF,ON" bitfld.long 0x00 3. " DDR_BR3 ,DDR_BR3 Request" "OFF,ON" bitfld.long 0x00 2. " DDR_BR2 ,DDR_BR2 Request" "OFF,ON" textline " " bitfld.long 0x00 1. " DDR_BR1 ,DDR_BR1 Request" "OFF,ON" bitfld.long 0x00 0. " DDR_BR0 ,DDR_BR0 Request" "OFF,ON" line.long 0x04 "IO_DPD3_STATUS_0,DPD Status 3 Register" bitfld.long 0x04 27. " DDR_BR11_CMD ,DDR_BR11_CMD Status" "OFF,ON" bitfld.long 0x04 26. " DDR_BR10_CMD ,DDR_BR10_CMD Status" "OFF,ON" bitfld.long 0x04 25. " DDR_BR9_CMD ,DDR_BR9_CMD Status" "OFF,ON" textline " " bitfld.long 0x04 24. " DDR_BR8_CMD ,DDR_BR8_CMD Status" "OFF,ON" bitfld.long 0x04 23. " DDR_BR7_CMD ,DDR_BR7_CMD Status" "OFF,ON" bitfld.long 0x04 22. " DDR_BR6_CMD ,DDR_BR6_CMD Status" "OFF,ON" textline " " bitfld.long 0x04 21. " DDR_BR5_CMD ,DDR_BR5_CMD Status" "OFF,ON" bitfld.long 0x04 20. " DDR_BR4_CMD ,DDR_BR4_CMD Status" "OFF,ON" bitfld.long 0x04 19. " DDR_BR3_CMD ,DDR_BR3_CMD Status" "OFF,ON" textline " " bitfld.long 0x04 18. " DDR_BR2_CMD ,DDR_BR2_CMD Status" "OFF,ON" bitfld.long 0x04 17. " DDR_BR1_CMD ,DDR_BR1_CMD Status" "OFF,ON" bitfld.long 0x04 16. " DDR_BR0_CMD ,DDR_BR0_CMD Status" "OFF,ON" textline " " bitfld.long 0x04 15. " DDR_DDLL ,DDR_DDLL Status" "OFF,ON" bitfld.long 0x04 14. " DDR_CDBBUF1 ,DDR_CDBBUF1 Status" "OFF,ON" bitfld.long 0x04 13. " DDR_CDBBUF0 ,DDR_CDBBUF0 Status" "OFF,ON" textline " " bitfld.long 0x04 12. " DDR_COMP ,DDR_COMP Status" "OFF,ON" bitfld.long 0x04 11. " DDR_BR11 ,DDR_BR11 Status" "OFF,ON" bitfld.long 0x04 10. " DDR_BR10 ,DDR_BR10 Status" "OFF,ON" textline " " bitfld.long 0x04 9. " DDR_BR9 ,DDR_BR9 Status" "OFF,ON" bitfld.long 0x04 8. " DDR_BR8 ,DDR_BR8 Status" "OFF,ON" bitfld.long 0x04 7. " DDR_BR7 ,DDR_BR7 Status" "OFF,ON" textline " " bitfld.long 0x04 6. " DDR_BR6 ,DDR_BR6 Status" "OFF,ON" bitfld.long 0x04 5. " DDR_BR5 ,DDR_BR5 Status" "OFF,ON" bitfld.long 0x04 4. " DDR_BR4 ,DDR_BR4 Status" "OFF,ON" textline " " bitfld.long 0x04 3. " DDR_BR3 ,DDR_BR3 Status" "OFF,ON" bitfld.long 0x04 2. " DDR_BR2 ,DDR_BR2 Status" "OFF,ON" bitfld.long 0x04 1. " DDR_BR1 ,DDR_BR1 Status" "OFF,ON" textline " " bitfld.long 0x04 0. " DDR_BR0 ,DDR_BR0 Status" "OFF,ON" line.long 0x08 "IO_DPD4_REQ_0,DPD Request 4 Register" bitfld.long 0x08 30.--31. " CODE ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..." bitfld.long 0x08 27. " DDR_BR11_VTTGEN ,DDR_BR11_VTTGEN Request" "OFF,ON" bitfld.long 0x08 26. " DDR_BR10_VTTGEN ,DDR_BR10_VTTGEN Request" "OFF,ON" textline " " bitfld.long 0x08 25. " DDR_BR9_VTTGEN ,DDR_BR9_VTTGEN Request" "OFF,ON" bitfld.long 0x08 24. " DDR_BR8_VTTGEN ,DDR_BR8_VTTGEN Request" "OFF,ON" bitfld.long 0x08 23. " DDR_BR7_VTTGEN ,DDR_BR7_VTTGEN Request" "OFF,ON" textline " " bitfld.long 0x08 22. " DDR_BR6_VTTGEN ,DDR_BR6_VTTGEN Request" "OFF,ON" bitfld.long 0x08 21. " DDR_BR5_VTTGEN ,DDR_BR5_VTTGEN Request" "OFF,ON" bitfld.long 0x08 20. " DDR_BR4_VTTGEN ,DDR_BR4_VTTGEN Request" "OFF,ON" textline " " bitfld.long 0x08 19. " DDR_BR3_VTTGEN ,DDR_BR3_VTTGEN Request" "OFF,ON" bitfld.long 0x08 18. " DDR_BR2_VTTGEN ,DDR_BR2_VTTGEN Request" "OFF,ON" bitfld.long 0x08 17. " DDR_BR1_VTTGEN ,DDR_BR1_VTTGEN Request" "OFF,ON" textline " " bitfld.long 0x08 16. " DDR_BR0_VTTGENBG ,DDR_BR0_VTTGEN Request" "OFF,ON" bitfld.long 0x08 12. " DDR_COMP_BG ,DDR_COMP Request" "OFF,ON" bitfld.long 0x08 11. " DDR_BR11_BG ,DDR_BR11 Request" "OFF,ON" textline " " bitfld.long 0x08 10. " DDR_BR10_BG ,DDR_BR10 Request" "OFF,ON" bitfld.long 0x08 9. " DDR_BR9_BG ,DDR_BR9 Request" "OFF,ON" bitfld.long 0x08 8. " DDR_BR8_BG ,DDR_BR8 Request" "OFF,ON" textline " " bitfld.long 0x08 7. " DDR_BR7_BG ,DDR_BR7 Request" "OFF,ON" bitfld.long 0x08 6. " DDR_BR6_BG ,DDR_BR6 Request" "OFF,ON" bitfld.long 0x08 5. " DDR_BR5_BG ,DDR_BR5 Request" "OFF,ON" textline " " bitfld.long 0x08 4. " DDR_BR4_BG ,DDR_BR4 Request" "OFF,ON" bitfld.long 0x08 3. " DDR_BR3_BG ,DDR_BR3 Request" "OFF,ON" bitfld.long 0x08 2. " DDR_BR2_BG ,DDR_BR2 Request" "OFF,ON" textline " " bitfld.long 0x08 1. " DDR_BR1_BG ,DDR_BR1 Request" "OFF,ON" bitfld.long 0x08 0. " DDR_BR0_BG ,DDR_BR0 Request" "OFF,ON" line.long 0x0C "IO_DPD4_STATUS_0,DPD Status 4 Register" bitfld.long 0x0C 27. " DDR_BR11_VTTGEN ,DDR_BR11 Status" "OFF,ON" bitfld.long 0x0C 26. " DDR_BR10_VTTGEN ,DDR_BR10 Status" "OFF,ON" bitfld.long 0x0C 25. " DDR_BR9_VTTGEN ,DDR_BR9 Status" "OFF,ON" textline " " bitfld.long 0x0C 24. " DDR_BR8_VTTGEN ,DDR_BR8 Status" "OFF,ON" bitfld.long 0x0C 23. " DDR_BR7_VTTGEN ,DDR_BR7 Status" "OFF,ON" bitfld.long 0x0C 22. " DDR_BR6_VTTGEN ,DDR_BR6 Status" "OFF,ON" textline " " bitfld.long 0x0C 21. " DDR_BR5_VTTGEN ,DDR_BR5 Status" "OFF,ON" bitfld.long 0x0C 20. " DDR_BR4_VTTGEN ,DDR_BR4 Status" "OFF,ON" bitfld.long 0x0C 19. " DDR_BR3_VTTGEN ,DDR_BR3 Status" "OFF,ON" textline " " bitfld.long 0x0C 18. " DDR_BR2_VTTGEN ,DDR_BR2 Status" "OFF,ON" bitfld.long 0x0C 17. " DDR_BR1_VTTGEN ,DDR_BR1 Status" "OFF,ON" bitfld.long 0x0C 16. " DDR_BR0_VTTGEN ,DDR_BR0 Status" "OFF,ON" textline " " bitfld.long 0x0C 12. " DDR_COMP_BG ,DDR_COMP Status" "OFF,ON" bitfld.long 0x0C 11. " DDR_BR11_BG ,DDR_BR11 Status" "OFF,ON" bitfld.long 0x0C 10. " DDR_BR10_BG ,DDR_BR10 Status" "OFF,ON" textline " " bitfld.long 0x0C 9. " DDR_BR9_BG ,DDR_BR9 Status" "OFF,ON" bitfld.long 0x0C 8. " DDR_BR8_BG ,DDR_BR8 Status" "OFF,ON" bitfld.long 0x0C 7. " DDR_BR7_BG ,DDR_BR7 Status" "OFF,ON" textline " " bitfld.long 0x0C 6. " DDR_BR6_BG ,DDR_BR6 Status" "OFF,ON" bitfld.long 0x0C 5. " DDR_BR5_BG ,DDR_BR5 Status" "OFF,ON" bitfld.long 0x0C 4. " DDR_BR4_BG ,DDR_BR4 Status" "OFF,ON" textline " " bitfld.long 0x0C 3. " DDR_BR3_BG ,DDR_BR3 Status" "OFF,ON" bitfld.long 0x0C 2. " DDR_BR2_BG ,DDR_BR2 Status" "OFF,ON" bitfld.long 0x0C 1. " DDR_BR1_BG ,DDR_BR1 Status" "OFF,ON" textline " " bitfld.long 0x0C 0. " DDR_BR0_BG ,DDR_BR0 Status" "OFF,ON" group.long 0x474++0x1F line.long 0x00 "DIRECT_THERMTRIP_CFG_0,THERMTRIP Configuration Register" bitfld.long 0x00 5. " THERMTRIP_LOCK ,Lock THERMTRIP_EN and AOTAG THERMTRIP threshold" "Disabled,Enabled" bitfld.long 0x00 4. " THERMTRIP_EN ,Assert PMC to SHUTDOWN sideband to PMIC on a thermal sensor reset event" "Disabled,Enabled" bitfld.long 0x00 0.--3. " SHDN_ASSERT_PULSE_WIDTH ,Asserted SHUTDOWN pin remains for the programmed number of 32K clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TSOSC_DELAY_0,TSOSC Delay Register" hexmask.long.word 0x04 0.--11. 1. " TSOSC_PWRGOOD_DLY ,Delay in osc clock cycles before re-enabling CCPLEX TSOSCs while exiting from CC4" line.long 0x08 "SET_SW_CLAMP_0,Set CLAMP_0 Register" bitfld.long 0x08 0. " CRAIL ,Set CRAIL clamp" "Not set,Set" line.long 0x0C "DEBUG_AUTHENTICATION_0,Debug Authentication Register" bitfld.long 0x0C 5. " DBGEN ,DBGEN" "Disabled,Enabled" bitfld.long 0x0C 4. " NIDEN ,NIDEN" "Disabled,Enabled" bitfld.long 0x0C 3. " SPIDEN ,SPIDEN" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " SPNIDEN ,SPNIDEN" "Disabled,Enabled" bitfld.long 0x0C 1. " DEVICEEN ,DEVICEEN" "Disabled,Enabled" bitfld.long 0x0C 0. " JTAG_ENABLE ,JTAG_ENABLE" "Disabled,Enabled" line.long 0x10 "AOTAG_CFG_0,AOTAG Configuration Register" bitfld.long 0x10 6. " AOTAG_THERMTRIP_EN ,Enable thermtrip from AOTAG" "Disabled,Enabled" bitfld.long 0x10 5. " TAG_EN ,Enable function" "Disabled,Enabled" bitfld.long 0x10 4. " ENABLE_SW_DEBUG_MODE ,Enable software debug mode" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " USE_EXT_TRIGGER ,Internal timer vs OR of other system events like paging" "Disabled,Enabled" bitfld.long 0x10 2. " SW_TRIGGER ,Internal timer vs software trigger for debug" "Disabled,Enabled" bitfld.long 0x10 0. " DISABLE_CLK_GATING ,Force enable all clock gating" "Disabled,Enabled" line.long 0x14 "AOTAG_THRESH1_CFG_0,AOTAG Threshold 1 Configuration Register" hexmask.long.word 0x14 15.--29. 1. " HOT_SET ,Hot indicator set threshold" hexmask.long.word 0x14 0.--14. 1. " HOT_RESET ,Hot indicator reset threshold" line.long 0x18 "AOTAG_THRESH2_CFG_0,AOTAG Threshold 2 Configuration Register" hexmask.long.word 0x18 15.--29. 1. " COLD_SET ,Cold indicator set threshold" hexmask.long.word 0x18 0.--14. 1. " COLD_RESET ,Cold indicator reset threshold" line.long 0x1C "AOTAG_THRESH3_CFG_0,AOTAG Threshold 3 Configuration Register" hexmask.long.word 0x1C 0.--14. 1. " THERMTRIP_SET ,Thermtrip indicator set threshold" rgroup.long 0x494++0x03 line.long 0x00 "AOTAG_STATUS_0,AOTAG Status Register" bitfld.long 0x00 2. " THERMTRIP ,Write to PMC_TAG_STATUS resets this field to 0" "NOTSET,SET" bitfld.long 0x00 1. " TEMP_LOW ,Write to PMC_TAG_STATUS resets this field to 0" "NOTSET,SET" bitfld.long 0x00 0. " TEMP_HIGH ,Write to PMC_TAG_STATUS resets this field to 0" "NOTSET,SET" group.long 0x498++0x0F line.long 0x00 "AOTAG_SECURITY_0,AOTAG Security Register" bitfld.long 0x00 3. " WR_LOCK_ALL ,Write lock all PMC_AOTAG registers" "Disabled,Enabled" bitfld.long 0x00 2. " WR_LOCK_HOT_THRESHOLD ,Write lock PMC_AOTAG_THRESH1_CFG" "Disabled,Enabled" bitfld.long 0x00 1. " WR_LOCK_COLD_THRESHOLD ,Write lock PMC_AOTAG_THRESH2_CFG" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " WR_LOCK_THERMTRIP ,Write lock PMC_AOTAG_THRESH3_CFG" "Disabled,Enabled" line.long 0x04 "TSENSOR_CONFIG0_0,TSENSOR Configuration Register" hexmask.long.tbyte 0x04 8.--27. 1. " TALL ,Time in tsensor_clk for full capture cycle" bitfld.long 0x04 5. " STATUS_CLR ,Clears MIN/MAX statistics" "Not cleared,Cleared" bitfld.long 0x04 4. " TCALC_OVERFLOW ,Overflow happened during temperature conversion" "No overflow,Overflow" textline " " bitfld.long 0x04 3. " OVERFLOW ,Capture counter overflows 14 bits used for temperature translation" "No overflow,Overflow" bitfld.long 0x04 2. " CPTR_OVERFLOW ,Capture counter overflows during the capture" "No overflow,Overflow" bitfld.long 0x04 1. " RO_SEL ,Ring oscillator select" "TS_OSC_OUT,VS_OSC_OUT" textline " " bitfld.long 0x04 0. " STOP ,Sensor stop" "Not stopped,Stopped" line.long 0x08 "TSENSOR_CONFIG1_0,TSENSOR Configuarion 1 Register" bitfld.long 0x08 31. " TEMP_ENABLE ,Enable temperature translation" "Disabled,Enabled" bitfld.long 0x08 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 15.--20. " TIDDQ_EN ,Time between iddq and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.word 0x08 0.--9. 1. " TSAMPLE ,N count" line.long 0x0C "TSENSOR_CONFIG2_0,TSENSOR Configuarion 2 Register" hexmask.long.word 0x0C 16.--31. 1. " THERM_A ,Thermal A Value" hexmask.long.word 0x0C 0.--15. 1. " THERM_B ,Thermal B Value" rgroup.long 0x4A8++0x0B line.long 0x00 "TSENSOR_STATUS0_0,TSENSOR Status 0 Register" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not available,Available" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_STATUS1_0,TSENSOR Status 0 Register" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not available,Available" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temp" line.long 0x08 "TSENSOR_STATUS2_0,TSENSOR Status 0 Register" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Max temp registered since last clear, reset to lowest possible temp" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Min temp registered since last clear, reset to highest possible temp" group.long 0x4B4++0x07 line.long 0x00 "TSENSOR_PDIV_0,TSENSOR PDIV Register" bitfld.long 0x00 12.--15. " PDIV ,TSOSC post divider setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AOTAG_INTR_EN_0,AOTAG Interrupt Register" setclrfld.long 0x04 1. 0x04 1. 0x08 1. " HOT ,Enable hot interrupt" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x08 0. " COLD ,Enable cold interrupt" "Disabled,Enabled" group.long 0x4C0++0x03 line.long 0x00 "UTMIP_PAD_CFG0_0,IO Pad config for port 0" bitfld.long 0x00 29. " RPU_SWITCH_LOW_P0 ,IO pad RPU_SWITCH_LOW for UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 28. " RPU_HIGH_FIXED_P0 ,IO pad RPU_HIGH_FIXED for UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " RPU_AUTO_SWITCH_EN_P0 ,IO pad RPU_AUTO_SWITCH_EN for UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 22.--26. " RPD_CTRL_P0 ,IO pad RPD_CTRL for UTMIP P0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rbitfld.long 0x00 21. " RPU_STATUS_HIGH_P0 ,IO pad RPU_STATUS_HIGH for UTMIP P0" "Disabled,Enabled" rbitfld.long 0x00 20. " LO_SPD_P0 ,IO pad LO_SPD for UTMIP P0" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--19. " SPARE_P0 ,IO pad SPARE1.0 for UTMIP P0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 12.--15. " FS_FSLEW_P0 ,IO pad FS_SLEW1 for UTMIP P0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 8.--11. " FS_RSLEW_P0 ,IO pad FS_SLEW0..1 for UTMIP P0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 4.--7. " LS_FSLEW_P0 ,IO pad LS_FSLEW1..0 for UTMIP P0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 0.--3. " LS_RSLEW_P0 ,IO pad LS_RSLEW0..0 for UTMIP P0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4C4++0x03 line.long 0x00 "UTMIP_PAD_CFG1_0,IO Pad config for port 1" bitfld.long 0x00 29. " RPU_SWITCH_LOW_P1 ,IO pad RPU_SWITCH_LOW for UTMIP P1" "Disabled,Enabled" bitfld.long 0x00 28. " RPU_HIGH_FIXED_P1 ,IO pad RPU_HIGH_FIXED for UTMIP P1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " RPU_AUTO_SWITCH_EN_P1 ,IO pad RPU_AUTO_SWITCH_EN for UTMIP P1" "Disabled,Enabled" bitfld.long 0x00 22.--26. " RPD_CTRL_P1 ,IO pad RPD_CTRL for UTMIP P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rbitfld.long 0x00 21. " RPU_STATUS_HIGH_P1 ,IO pad RPU_STATUS_HIGH for UTMIP P1" "Disabled,Enabled" rbitfld.long 0x00 20. " LO_SPD_P1 ,IO pad LO_SPD for UTMIP P1" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--19. " SPARE_P1 ,IO pad SPARE1.0 for UTMIP P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 12.--15. " FS_FSLEW_P1 ,IO pad FS_SLEW1 for UTMIP P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 8.--11. " FS_RSLEW_P1 ,IO pad FS_SLEW0..1 for UTMIP P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 4.--7. " LS_FSLEW_P1 ,IO pad LS_FSLEW1..0 for UTMIP P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 0.--3. " LS_RSLEW_P1 ,IO pad LS_RSLEW0..0 for UTMIP P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4C8++0x03 line.long 0x00 "UTMIP_PAD_CFG2_0,IO Pad config for port 2" bitfld.long 0x00 29. " RPU_SWITCH_LOW_P2 ,IO pad RPU_SWITCH_LOW for UTMIP P2" "Disabled,Enabled" bitfld.long 0x00 28. " RPU_HIGH_FIXED_P2 ,IO pad RPU_HIGH_FIXED for UTMIP P2" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " RPU_AUTO_SWITCH_EN_P2 ,IO pad RPU_AUTO_SWITCH_EN for UTMIP P2" "Disabled,Enabled" bitfld.long 0x00 22.--26. " RPD_CTRL_P2 ,IO pad RPD_CTRL for UTMIP P2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rbitfld.long 0x00 21. " RPU_STATUS_HIGH_P2 ,IO pad RPU_STATUS_HIGH for UTMIP P2" "Disabled,Enabled" rbitfld.long 0x00 20. " LO_SPD_P2 ,IO pad LO_SPD for UTMIP P2" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--19. " SPARE_P2 ,IO pad SPARE1.0 for UTMIP P2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 12.--15. " FS_FSLEW_P2 ,IO pad FS_SLEW1 for UTMIP P2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 8.--11. " FS_RSLEW_P2 ,IO pad FS_SLEW0..1 for UTMIP P2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 4.--7. " LS_FSLEW_P2 ,IO pad LS_FSLEW1..0 for UTMIP P2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 0.--3. " LS_RSLEW_P2 ,IO pad LS_RSLEW0..0 for UTMIP P2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4CC++0x03 line.long 0x00 "UTMIP_PAD_CFG3_0,IO Pad config for port 3" bitfld.long 0x00 29. " RPU_SWITCH_LOW_P3 ,IO pad RPU_SWITCH_LOW for UTMIP P3" "Disabled,Enabled" bitfld.long 0x00 28. " RPU_HIGH_FIXED_P3 ,IO pad RPU_HIGH_FIXED for UTMIP P3" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " RPU_AUTO_SWITCH_EN_P3 ,IO pad RPU_AUTO_SWITCH_EN for UTMIP P3" "Disabled,Enabled" bitfld.long 0x00 22.--26. " RPD_CTRL_P3 ,IO pad RPD_CTRL for UTMIP P3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rbitfld.long 0x00 21. " RPU_STATUS_HIGH_P3 ,IO pad RPU_STATUS_HIGH for UTMIP P3" "Disabled,Enabled" rbitfld.long 0x00 20. " LO_SPD_P3 ,IO pad LO_SPD for UTMIP P3" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--19. " SPARE_P3 ,IO pad SPARE1.0 for UTMIP P3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 12.--15. " FS_FSLEW_P3 ,IO pad FS_SLEW1 for UTMIP P3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 8.--11. " FS_RSLEW_P3 ,IO pad FS_SLEW0..1 for UTMIP P3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 4.--7. " LS_FSLEW_P3 ,IO pad LS_FSLEW1..0 for UTMIP P3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 0.--3. " LS_RSLEW_P3 ,IO pad LS_RSLEW0..0 for UTMIP P3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4D0++0x17 line.long 0x00 "UTMIP_UHSIC_SLEEP_CFG1_0,Sleep walk sequence enables" bitfld.long 0x00 19. " UTMIP_RPD_CTRL_USE_PMC_P3 ,Use PMC Saved Pad config on UTMIP P3" "Disabled,Enabled" bitfld.long 0x00 18. " UTMIP_RPD_CTRL_USE_PMC_P2 ,Use PMC Saved Pad config on UTMIP P2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " UTMIP_RPD_CTRL_USE_PMC_P1 ,Use PMC Saved Pad config on UTMIP P1" "Disabled,Enabled" bitfld.long 0x00 16. " UTMIP_RPD_CTRL_USE_PMC_P0 ,Use PMC Saved Pad config on UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RPU_SWITC_LOW_USE_PMC_P3 ,Use PMC Saved RPU_SWITC_LOW on UTMIP P3" "Disabled,Enabled" bitfld.long 0x00 10. " UTMIP_RPU_SWITC_LOW_USE_PMC_P2 ,Use PMC Saved RPU_SWITC_LOW on UTMIP P2" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " UTMIP_RPU_SWITC_LOW_USE_PMC_P1 ,Use PMC Saved RPU_SWITC_LOW on UTMIP P1" "Disabled,Enabled" bitfld.long 0x00 8. " UTMIP_RPU_SWITC_LOW_USE_PMC_P0 ,Use PMC Saved RPU_SWITC_LOW on UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--7. " UTMIP_WAKE_VAL_P3 ,Line Value Wake Up Condition on UTMIP P0" "SE0,FSK,FSJ,SE1,DM0,DM1,,,DP0,,DP1,,NONE,DMEDGE,DPEDGE,ANY" bitfld.long 0x00 3. " UTMIP_TCTRL_USE_PMC_P3 ,Use PMC Saved TCTRL on UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " UTMIP_PCTRL_USE_PMC_P3 ,Use PMC Saved PCTRL on UTMIP P0" "Disabled,Enabled" bitfld.long 0x00 1. " UTMIP_FSLS_USE_PMC_P3 ,Use PMC Saved Pad config on UTMIP P0" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " UTMIP_MASTER_ENABLE_P3 ,Enable use of master pins on UTMIP P0" "Disabled,Enabled" line.long 0x04 "CC4_HVC_CONTROL_0,CC4 HVC Control Register" bitfld.long 0x04 0. " MASK_CPUPWRREQ ,cpu pwr req will be not asserted in CC3" "Disabled,Enabled" line.long 0x08 "WAKE_DEBOUNCE_EN_0,Wake Debounce Register" hexmask.long.byte 0x08 16.--23. 1. " DEBOUNCE_DELAY ,Specifies the common de-bounce delay for wake events" hexmask.long.byte 0x08 0.--7. 1. " WAKE_DEBOUNCE_EN ,Enable bits for debounce function for 8 GPIOs" line.long 0x0C "RAMDUMP_CTL_STATUS_0,RAM-dump feature" bitfld.long 0x0C 10. " RAMDUMP_STATUS_6 ,RAM-dump 6 Status" "Not set,Set" bitfld.long 0x0C 9. " RAMDUMP_STATUS_5 ,RAM-dump 5 Status" "Not set,Set" textline " " bitfld.long 0x0C 8. " RAMDUMP_STATUS_4 ,RAM-dump 4 Status" "Not set,Set" bitfld.long 0x0C 7. " RAMDUMP_STATUS_3 ,RAM-dump 3 Status" "Not set,Set" textline " " bitfld.long 0x0C 6. " RAMDUMP_STATUS_2 ,RAM-dump 2 Status" "Not set,Set" bitfld.long 0x0C 5. " RAMDUMP_STATUS_1 ,RAM-dump 1 Status" "Not set,Set" textline " " bitfld.long 0x0C 4. " MC_HOTRESET_COMPLETE ,Hot reset complete" "In progress,Completed" bitfld.long 0x0C 3. " WCAM_FLUSHED ,WCAM Flushed" "Not flushed,Flushed" textline " " bitfld.long 0x0C 2. " EMC_FLUSHED ,EMC Flushed" "Not flushed,Flushed" bitfld.long 0x0C 1. " L2RSTDISABLE ,L2RST Disable" "Enabled,Disabled" textline " " bitfld.long 0x0C 0. " RAMDUMP_EN ,RAM-dump enable" "Disabled,Enabled" line.long 0x10 "UTMIP_SLEEPWALK_P3_0,Signaling Sequence for UTMIP Port 1 Wakeup" bitfld.long 0x10 30. " HIGHZ_D ,Phase D Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x10 29. " AN_D ,Phase D Drive Single Ended Value on D- line" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " AP_D ,Phase D Drive Single Ended Value on D+ line" "Disabled,Enabled" bitfld.long 0x10 27. " USBON_RPU_D ,Phase D 1.5kOhm Pull up on D- Line" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " USBOP_RPU_D ,Phase D 1.5kOhm Pull Up on D+ Line" "Disabled,Enabled" bitfld.long 0x10 25. " USBON_RPD_D ,Phase D 15kOhm Pull Down on D- Line" "Disabled,Enabled" textline " " bitfld.long 0x10 24. " USBOP_RPD_D ,Phase D 15kOhm Pull Down on D+ Line" "Disabled,Enabled" bitfld.long 0x10 22. " HIGHZ_C ,Phase C Enable Single Ended Drivers" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " AN_C ,Phase C Drive Single Ended Value on D- line" "Disabled,Enabled" bitfld.long 0x10 20. " AP_C ,Phase C Drive Single Ended Value on D+ line" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " USBON_RPU_C ,Phase C 1.5kOhm Pull up on D- Line" "Disabled,Enabled" bitfld.long 0x10 18. " USBOP_RPU_C ,Phase C 1.5kOhm Pull Up on D+ Line" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " USBON_RPD_C ,Phase C 15kOhm Pull Down on D- Line" "Disabled,Enabled" bitfld.long 0x10 16. " USBOP_RPD_C ,Phase C 15kOhm Pull Down on D+ Line" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " HIGHZ_B ,Phase B Enable Single Ended Drivers" "Disabled,Enabled" bitfld.long 0x10 13. " AN_B ,Phase B Drive Single Ended Value on D- line" "Disabled,Enabled" textline " " bitfld.long 0x10 12. " AP_B ,Phase B Drive Single Ended Value on D+ line" "Disabled,Enabled" bitfld.long 0x10 11. " USBON_RPU_B ,Phase B 1.5kOhm Pull up on D- Line" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " USBOP_RPU_B ,Phase B 1.5kOhm Pull Up on D+ Line" "Disabled,Enabled" bitfld.long 0x10 9. " USBON_RPD_B ,Phase B 15kOhm Pull Down on D- Line" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " USBOP_RPD_B ,Phase B 15kOhm Pull Down on D+ Line" "Disabled,Enabled" bitfld.long 0x10 6. " HIGHZ_A ,Phase A Enable Single Ended Drivers" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " AN_A ,Phase A Drive Single Ended Value on D- line" "Disabled,Enabled" bitfld.long 0x10 4. " AP_A ,Phase A Drive Single Ended Value on D+ line" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " USBON_RPU_A ,Phase A 1.5kOhm Pull up on D- Line" "Disabled,Enabled" bitfld.long 0x10 2. " USBOP_RPU_A ,Phase A 1.5kOhm Pull Up on D+ Line" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " USBON_RPD_A ,Phase A 15kOhm Pull Down on D- Line" "Disabled,Enabled" bitfld.long 0x10 0. " USBOP_RPD_A ,Phase A 15kOhm Pull Down on D+ Line" "Disabled,Enabled" line.long 0x14 "DDR_CNTRL_0,DDR Control Register" bitfld.long 0x14 18. " CMD_HOLD_LOW_BR11 ,cmd_hold_low for DDR brick11" "Disabled,Enabled" bitfld.long 0x14 17. " CMD_HOLD_LOW_BR10 ,cmd_hold_low for DDR brick10" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " CMD_HOLD_LOW_BR9 ,cmd_hold_low for DDR brick9" "Disabled,Enabled" bitfld.long 0x14 15. " CMD_HOLD_LOW_BR8 ,cmd_hold_low for DDR brick8" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " CMD_HOLD_LOW_BR7 ,cmd_hold_low for DDR brick7" "Disabled,Enabled" bitfld.long 0x14 13. " CMD_HOLD_LOW_BR6 ,cmd_hold_low for DDR brick6" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " CMD_HOLD_LOW_BR5 ,cmd_hold_low for DDR brick5" "Disabled,Enabled" bitfld.long 0x14 11. " CMD_HOLD_LOW_BR4 ,cmd_hold_low for DDR brick4" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " CMD_HOLD_LOW_BR3 ,cmd_hold_low for DDR brick3" "Disabled,Enabled" bitfld.long 0x14 9. " CMD_HOLD_LOW_BR2 ,cmd_hold_low for DDR brick2" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " CMD_HOLD_LOW_BR1 ,cmd_hold_low for DDR brick1" "Disabled,Enabled" bitfld.long 0x14 7. " CMD_HOLD_LOW_BR0 ,cmd_hold_low for DDR brick0" "Disabled,Enabled" textline " " bitfld.long 0x14 5.--6. " CMD_SEL_MODE ,Select Mode" "0,1,2,3" bitfld.long 0x14 4. " VTT_VCLAMP_E_REG ,VTT Clamp" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " VTT_VDA_E_REG ,VTT VDA" "Disabled,Enabled" bitfld.long 0x14 2. " VTT_VAUXP_E_REG ,VTT VAUXP" "Disabled,Enabled" textline " " bitfld.long 0x14 0.--1. " DDR_DPD_IO ,common DPD I/O for DDR pads, not needed, potential can tristate" "0,1,2,3" group.long 0x5B0++0x13 line.long 0x00 "SEC_DISABLE4_0,PMC SEC DISABLE 4_0 Controller" bitfld.long 0x00 31. " READ55 ,Disable reads from secure register 55" "Off,On" bitfld.long 0x00 30. " WRITE55 ,Disable writes from secure register 55" "Off,On" textline " " bitfld.long 0x00 29. " READ54 ,Disable reads from secure register 54" "Off,On" bitfld.long 0x00 28. " WRITE54 ,Disable writes from secure register 54" "Off,On" textline " " bitfld.long 0x00 27. " READ53 ,Disable reads from secure register 53" "Off,On" bitfld.long 0x00 26. " WRITE53 ,Disable writes from secure register 53" "Off,On" textline " " bitfld.long 0x00 25. " READ52 ,Disable reads from secure register 52" "Off,On" bitfld.long 0x00 24. " WRITE52 ,Disable writes from secure register 52" "Off,On" textline " " bitfld.long 0x00 23. " READ51 ,Disable reads from secure register 51" "Off,On" bitfld.long 0x00 22. " WRITE51 ,Disable writes from secure register 51" "Off,On" textline " " bitfld.long 0x00 21. " READ50 ,Disable reads from secure register 50" "Off,On" bitfld.long 0x00 20. " WRITE50 ,Disable writes from secure register 50" "Off,On" textline " " bitfld.long 0x00 19. " READ49 ,Disable reads from secure register 49" "Off,On" bitfld.long 0x00 18. " WRITE49 ,Disable writes from secure register 49" "Off,On" textline " " bitfld.long 0x00 17. " READ48 ,Disable reads from secure register 48" "Off,On" bitfld.long 0x00 16. " WRITE48 ,Disable writes from secure register 48" "Off,On" textline " " bitfld.long 0x00 15. " READ47 ,Disable reads from secure register 47" "Off,On" bitfld.long 0x00 14. " WRITE47 ,Disable writes from secure register 47" "Off,On" textline " " bitfld.long 0x00 13. " READ46 ,Disable reads from secure register 46" "Off,On" bitfld.long 0x00 12. " WRITE46 ,Disable writes from secure register 46" "Off,On" textline " " bitfld.long 0x00 11. " READ45 ,Disable reads from secure register 45" "Off,On" bitfld.long 0x00 10. " WRITE45 ,Disable writes from secure register 45" "Off,On" textline " " bitfld.long 0x00 9. " READ44 ,Disable reads from secure register 44" "Off,On" bitfld.long 0x00 8. " WRITE44 ,Disable writes from secure register 44" "Off,On" textline " " bitfld.long 0x00 7. " READ43 ,Disable reads from secure register 43" "Off,On" bitfld.long 0x00 6. " WRITE43 ,Disable writes from secure register 43" "Off,On" textline " " bitfld.long 0x00 5. " READ42 ,Disable reads from secure register 42" "Off,On" bitfld.long 0x00 4. " WRITE42 ,Disable writes from secure register 42" "Off,On" textline " " bitfld.long 0x00 3. " READ41 ,Disable reads from secure register 41" "Off,On" bitfld.long 0x00 2. " WRITE41 ,Disable writes from secure register 41" "Off,On" textline " " bitfld.long 0x00 1. " READ40 ,Disable reads from secure register 40" "Off,On" bitfld.long 0x00 0. " WRITE40 ,Disable writes from secure register 40" "Off,On" line.long 0x04 "SEC_DISABLE5_0,PMC SEC DISABLE 5_0 Controller" bitfld.long 0x04 31. " READ71 ,Disable reads from secure register 71" "Off,On" bitfld.long 0x04 30. " WRITE71 ,Disable writes from secure register 71" "Off,On" textline " " bitfld.long 0x04 29. " READ70 ,Disable reads from secure register 70" "Off,On" bitfld.long 0x04 28. " WRITE70 ,Disable writes from secure register 70" "Off,On" textline " " bitfld.long 0x04 27. " READ69 ,Disable reads from secure register 69" "Off,On" bitfld.long 0x04 26. " WRITE69 ,Disable writes from secure register 69" "Off,On" textline " " bitfld.long 0x04 25. " READ68 ,Disable reads from secure register 68" "Off,On" bitfld.long 0x04 24. " WRITE68 ,Disable writes from secure register 68" "Off,On" textline " " bitfld.long 0x04 23. " READ67 ,Disable reads from secure register 67" "Off,On" bitfld.long 0x04 22. " WRITE67 ,Disable writes from secure register 67" "Off,On" textline " " bitfld.long 0x04 21. " READ66 ,Disable reads from secure register 66" "Off,On" bitfld.long 0x04 20. " WRITE66 ,Disable writes from secure register 66" "Off,On" textline " " bitfld.long 0x04 19. " READ65 ,Disable reads from secure register 65" "Off,On" bitfld.long 0x04 18. " WRITE65 ,Disable writes from secure register 65" "Off,On" textline " " bitfld.long 0x04 17. " READ64 ,Disable reads from secure register 64" "Off,On" bitfld.long 0x04 16. " WRITE64 ,Disable writes from secure register 64" "Off,On" textline " " bitfld.long 0x04 15. " READ63 ,Disable reads from secure register 63" "Off,On" bitfld.long 0x04 14. " WRITE63 ,Disable writes from secure register 63" "Off,On" textline " " bitfld.long 0x04 13. " READ62 ,Disable reads from secure register 62" "Off,On" bitfld.long 0x04 12. " WRITE62 ,Disable writes from secure register 62" "Off,On" textline " " bitfld.long 0x04 11. " READ61 ,Disable reads from secure register 61" "Off,On" bitfld.long 0x04 10. " WRITE61 ,Disable writes from secure register 61" "Off,On" textline " " bitfld.long 0x04 9. " READ60 ,Disable reads from secure register 60" "Off,On" bitfld.long 0x04 8. " WRITE60 ,Disable writes from secure register 60" "Off,On" textline " " bitfld.long 0x04 7. " READ59 ,Disable reads from secure register 59" "Off,On" bitfld.long 0x04 6. " WRITE59 ,Disable writes from secure register 59" "Off,On" textline " " bitfld.long 0x04 5. " READ58 ,Disable reads from secure register 58" "Off,On" bitfld.long 0x04 4. " WRITE58 ,Disable writes from secure register 58" "Off,On" textline " " bitfld.long 0x04 3. " READ57 ,Disable reads from secure register 57" "Off,On" bitfld.long 0x04 2. " WRITE57 ,Disable writes from secure register 57" "Off,On" textline " " bitfld.long 0x04 1. " READ56 ,Disable reads from secure register 56" "Off,On" bitfld.long 0x04 0. " WRITE56 ,Disable writes from secure register 56" "Off,On" line.long 0x08 "SEC_DISABLE6_0,PMC SEC DISABLE 6_0 Controller" bitfld.long 0x08 31. " READ87 ,Disable reads from secure register 87" "Off,On" bitfld.long 0x08 30. " WRITE87 ,Disable writes from secure register 87" "Off,On" textline " " bitfld.long 0x08 29. " READ86 ,Disable reads from secure register 86" "Off,On" bitfld.long 0x08 28. " WRITE86 ,Disable writes from secure register 86" "Off,On" textline " " bitfld.long 0x08 27. " READ85 ,Disable reads from secure register 85" "Off,On" bitfld.long 0x08 26. " WRITE85 ,Disable writes from secure register 85" "Off,On" textline " " bitfld.long 0x08 25. " READ84 ,Disable reads from secure register 84" "Off,On" bitfld.long 0x08 24. " WRITE84 ,Disable writes from secure register 84" "Off,On" textline " " bitfld.long 0x08 23. " READ83 ,Disable reads from secure register 83" "Off,On" bitfld.long 0x08 22. " WRITE83 ,Disable writes from secure register 83" "Off,On" textline " " bitfld.long 0x08 21. " READ82 ,Disable reads from secure register 82" "Off,On" bitfld.long 0x08 20. " WRITE82 ,Disable writes from secure register 82" "Off,On" textline " " bitfld.long 0x08 19. " READ81 ,Disable reads from secure register 81" "Off,On" bitfld.long 0x08 18. " WRITE81 ,Disable writes from secure register 81" "Off,On" textline " " bitfld.long 0x08 17. " READ80 ,Disable reads from secure register 80" "Off,On" bitfld.long 0x08 16. " WRITE80 ,Disable writes from secure register 80" "Off,On" textline " " bitfld.long 0x08 15. " READ79 ,Disable reads from secure register 79" "Off,On" bitfld.long 0x08 14. " WRITE79 ,Disable writes from secure register 79" "Off,On" textline " " bitfld.long 0x08 13. " READ78 ,Disable reads from secure register 78" "Off,On" bitfld.long 0x08 12. " WRITE78 ,Disable writes from secure register 78" "Off,On" textline " " bitfld.long 0x08 11. " READ77 ,Disable reads from secure register 77" "Off,On" bitfld.long 0x08 10. " WRITE77 ,Disable writes from secure register 77" "Off,On" textline " " bitfld.long 0x08 9. " READ76 ,Disable reads from secure register 76" "Off,On" bitfld.long 0x08 8. " WRITE76 ,Disable writes from secure register 76" "Off,On" textline " " bitfld.long 0x08 7. " READ75 ,Disable reads from secure register 75" "Off,On" bitfld.long 0x08 6. " WRITE75 ,Disable writes from secure register 75" "Off,On" textline " " bitfld.long 0x08 5. " READ74 ,Disable reads from secure register 74" "Off,On" bitfld.long 0x08 4. " WRITE74 ,Disable writes from secure register 74" "Off,On" textline " " bitfld.long 0x08 3. " READ73 ,Disable reads from secure register 73" "Off,On" bitfld.long 0x08 2. " WRITE73 ,Disable writes from secure register 73" "Off,On" textline " " bitfld.long 0x08 1. " READ72 ,Disable reads from secure register 72" "Off,On" bitfld.long 0x08 0. " WRITE72 ,Disable writes from secure register 72" "Off,On" line.long 0x0C "SEC_DISABLE7_0,PMC SEC DISABLE 7_0 Controller" bitfld.long 0x0C 31. " READ103 ,Disable reads from secure register 103" "Off,On" bitfld.long 0x0C 30. " WRITE103 ,Disable writes from secure register 103" "Off,On" textline " " bitfld.long 0x0C 29. " READ102 ,Disable reads from secure register 102" "Off,On" bitfld.long 0x0C 28. " WRITE102 ,Disable writes from secure register 102" "Off,On" textline " " bitfld.long 0x0C 27. " READ101 ,Disable reads from secure register 101" "Off,On" bitfld.long 0x0C 26. " WRITE101 ,Disable writes from secure register 101" "Off,On" textline " " bitfld.long 0x0C 25. " READ100 ,Disable reads from secure register 100" "Off,On" bitfld.long 0x0C 24. " WRITE100 ,Disable writes from secure register 100" "Off,On" textline " " bitfld.long 0x0C 23. " READ99 ,Disable reads from secure register 99" "Off,On" bitfld.long 0x0C 22. " WRITE99 ,Disable writes from secure register 99" "Off,On" textline " " bitfld.long 0x0C 21. " READ98 ,Disable reads from secure register 98" "Off,On" bitfld.long 0x0C 20. " WRITE98 ,Disable writes from secure register 98" "Off,On" textline " " bitfld.long 0x0C 19. " READ97 ,Disable reads from secure register 97" "Off,On" bitfld.long 0x0C 18. " WRITE97 ,Disable writes from secure register 97" "Off,On" textline " " bitfld.long 0x0C 17. " READ96 ,Disable reads from secure register 96" "Off,On" bitfld.long 0x0C 16. " WRITE96 ,Disable writes from secure register 96" "Off,On" textline " " bitfld.long 0x0C 15. " READ95 ,Disable reads from secure register 95" "Off,On" bitfld.long 0x0C 14. " WRITE95 ,Disable writes from secure register 95" "Off,On" textline " " bitfld.long 0x0C 13. " READ94 ,Disable reads from secure register 94" "Off,On" bitfld.long 0x0C 12. " WRITE94 ,Disable writes from secure register 94" "Off,On" textline " " bitfld.long 0x0C 11. " READ93 ,Disable reads from secure register 93" "Off,On" bitfld.long 0x0C 10. " WRITE93 ,Disable writes from secure register 93" "Off,On" textline " " bitfld.long 0x0C 9. " READ92 ,Disable reads from secure register 92" "Off,On" bitfld.long 0x0C 8. " WRITE92 ,Disable writes from secure register 92" "Off,On" textline " " bitfld.long 0x0C 7. " READ91 ,Disable reads from secure register 91" "Off,On" bitfld.long 0x0C 6. " WRITE91 ,Disable writes from secure register 91" "Off,On" textline " " bitfld.long 0x0C 5. " READ90 ,Disable reads from secure register 90" "Off,On" bitfld.long 0x0C 4. " WRITE90 ,Disable writes from secure register 90" "Off,On" textline " " bitfld.long 0x0C 3. " READ89 ,Disable reads from secure register 89" "Off,On" bitfld.long 0x0C 2. " WRITE89 ,Disable writes from secure register 89" "Off,On" textline " " bitfld.long 0x0C 1. " READ88 ,Disable reads from secure register 88" "Off,On" bitfld.long 0x0C 0. " WRITE88 ,Disable writes from secure register 88" "Off,On" line.long 0x10 "SEC_DISABLE8_0,PMC SEC DISABLE 8_0 Controller" bitfld.long 0x10 31. " READ119 ,Disable reads from secure register 119" "Off,On" bitfld.long 0x10 30. " WRITE119 ,Disable writes from secure register 119" "Off,On" textline " " bitfld.long 0x10 29. " READ118 ,Disable reads from secure register 118" "Off,On" bitfld.long 0x10 28. " WRITE118 ,Disable writes from secure register 118" "Off,On" textline " " bitfld.long 0x10 27. " READ117 ,Disable reads from secure register 117" "Off,On" bitfld.long 0x10 26. " WRITE117 ,Disable writes from secure register 117" "Off,On" textline " " bitfld.long 0x10 25. " READ116 ,Disable reads from secure register 116" "Off,On" bitfld.long 0x10 24. " WRITE116 ,Disable writes from secure register 116" "Off,On" textline " " bitfld.long 0x10 23. " READ115 ,Disable reads from secure register 115" "Off,On" bitfld.long 0x10 22. " WRITE115 ,Disable writes from secure register 115" "Off,On" textline " " bitfld.long 0x10 21. " READ114 ,Disable reads from secure register 114" "Off,On" bitfld.long 0x10 20. " WRITE114 ,Disable writes from secure register 114" "Off,On" textline " " bitfld.long 0x10 19. " READ113 ,Disable reads from secure register 113" "Off,On" bitfld.long 0x10 18. " WRITE113 ,Disable writes from secure register 113" "Off,On" textline " " bitfld.long 0x10 17. " READ112 ,Disable reads from secure register 112" "Off,On" bitfld.long 0x10 16. " WRITE112 ,Disable writes from secure register 112" "Off,On" textline " " bitfld.long 0x10 15. " READ111 ,Disable reads from secure register 111" "Off,On" bitfld.long 0x10 14. " WRITE111 ,Disable writes from secure register 111" "Off,On" textline " " bitfld.long 0x10 13. " READ110 ,Disable reads from secure register 110" "Off,On" bitfld.long 0x10 12. " WRITE110 ,Disable writes from secure register 110" "Off,On" textline " " bitfld.long 0x10 11. " READ109 ,Disable reads from secure register 109" "Off,On" bitfld.long 0x10 10. " WRITE109 ,Disable writes from secure register 109" "Off,On" textline " " bitfld.long 0x10 9. " READ108 ,Disable reads from secure register 108" "Off,On" bitfld.long 0x10 8. " WRITE108 ,Disable writes from secure register 108" "Off,On" textline " " bitfld.long 0x10 7. " READ107 ,Disable reads from secure register 107" "Off,On" bitfld.long 0x10 6. " WRITE107 ,Disable writes from secure register 107" "Off,On" textline " " bitfld.long 0x10 5. " READ106 ,Disable reads from secure register 106" "Off,On" bitfld.long 0x10 4. " WRITE106 ,Disable writes from secure register 106" "Off,On" textline " " bitfld.long 0x10 3. " READ105 ,Disable reads from secure register 105" "Off,On" bitfld.long 0x10 2. " WRITE105 ,Disable writes from secure register 105" "Off,On" textline " " bitfld.long 0x10 1. " READ104 ,Disable reads from secure register 104" "Off,On" bitfld.long 0x10 0. " WRITE104 ,Disable writes from secure register 104" "Off,On" tree.end tree "Scratch Registers 5" width 20. group.long 0x600++0x03 line.long 0x00 "SCRATCH56_0,Scratch Register" group.long 0x604++0x03 line.long 0x00 "SCRATCH57_0,Scratch Register" group.long 0x608++0x03 line.long 0x00 "SCRATCH58_0,Scratch Register" group.long 0x60C++0x03 line.long 0x00 "SCRATCH59_0,Scratch Register" group.long 0x610++0x03 line.long 0x00 "SCRATCH60_0,Scratch Register" group.long 0x614++0x03 line.long 0x00 "SCRATCH61_0,Scratch Register" group.long 0x618++0x03 line.long 0x00 "SCRATCH62_0,Scratch Register" group.long 0x61C++0x03 line.long 0x00 "SCRATCH63_0,Scratch Register" group.long 0x620++0x03 line.long 0x00 "SCRATCH64_0,Scratch Register" group.long 0x624++0x03 line.long 0x00 "SCRATCH65_0,Scratch Register" group.long 0x628++0x03 line.long 0x00 "SCRATCH66_0,Scratch Register" group.long 0x62C++0x03 line.long 0x00 "SCRATCH67_0,Scratch Register" group.long 0x630++0x03 line.long 0x00 "SCRATCH68_0,Scratch Register" group.long 0x634++0x03 line.long 0x00 "SCRATCH69_0,Scratch Register" group.long 0x638++0x03 line.long 0x00 "SCRATCH70_0,Scratch Register" group.long 0x63C++0x03 line.long 0x00 "SCRATCH71_0,Scratch Register" group.long 0x640++0x03 line.long 0x00 "SCRATCH72_0,Scratch Register" group.long 0x644++0x03 line.long 0x00 "SCRATCH73_0,Scratch Register" group.long 0x648++0x03 line.long 0x00 "SCRATCH74_0,Scratch Register" group.long 0x64C++0x03 line.long 0x00 "SCRATCH75_0,Scratch Register" group.long 0x650++0x03 line.long 0x00 "SCRATCH76_0,Scratch Register" group.long 0x654++0x03 line.long 0x00 "SCRATCH77_0,Scratch Register" group.long 0x658++0x03 line.long 0x00 "SCRATCH78_0,Scratch Register" group.long 0x65C++0x03 line.long 0x00 "SCRATCH79_0,Scratch Register" group.long 0x660++0x03 line.long 0x00 "SCRATCH80_0,Scratch Register" group.long 0x664++0x03 line.long 0x00 "SCRATCH81_0,Scratch Register" group.long 0x668++0x03 line.long 0x00 "SCRATCH82_0,Scratch Register" group.long 0x66C++0x03 line.long 0x00 "SCRATCH83_0,Scratch Register" group.long 0x670++0x03 line.long 0x00 "SCRATCH84_0,Scratch Register" group.long 0x674++0x03 line.long 0x00 "SCRATCH85_0,Scratch Register" group.long 0x678++0x03 line.long 0x00 "SCRATCH86_0,Scratch Register" group.long 0x67C++0x03 line.long 0x00 "SCRATCH87_0,Scratch Register" group.long 0x680++0x03 line.long 0x00 "SCRATCH88_0,Scratch Register" group.long 0x684++0x03 line.long 0x00 "SCRATCH89_0,Scratch Register" group.long 0x688++0x03 line.long 0x00 "SCRATCH90_0,Scratch Register" group.long 0x68C++0x03 line.long 0x00 "SCRATCH91_0,Scratch Register" group.long 0x690++0x03 line.long 0x00 "SCRATCH92_0,Scratch Register" group.long 0x694++0x03 line.long 0x00 "SCRATCH93_0,Scratch Register" group.long 0x698++0x03 line.long 0x00 "SCRATCH94_0,Scratch Register" group.long 0x69C++0x03 line.long 0x00 "SCRATCH95_0,Scratch Register" group.long 0x6A0++0x03 line.long 0x00 "SCRATCH96_0,Scratch Register" group.long 0x6A4++0x03 line.long 0x00 "SCRATCH97_0,Scratch Register" group.long 0x6A8++0x03 line.long 0x00 "SCRATCH98_0,Scratch Register" group.long 0x6AC++0x03 line.long 0x00 "SCRATCH99_0,Scratch Register" group.long 0x6B0++0x03 line.long 0x00 "SCRATCH100_0,Scratch Register" group.long 0x6B4++0x03 line.long 0x00 "SCRATCH101_0,Scratch Register" group.long 0x6B8++0x03 line.long 0x00 "SCRATCH102_0,Scratch Register" group.long 0x6BC++0x03 line.long 0x00 "SCRATCH103_0,Scratch Register" group.long 0x6C0++0x03 line.long 0x00 "SCRATCH104_0,Scratch Register" group.long 0x6C4++0x03 line.long 0x00 "SCRATCH105_0,Scratch Register" group.long 0x6C8++0x03 line.long 0x00 "SCRATCH106_0,Scratch Register" group.long 0x6CC++0x03 line.long 0x00 "SCRATCH107_0,Scratch Register" group.long 0x6D0++0x03 line.long 0x00 "SCRATCH108_0,Scratch Register" group.long 0x6D4++0x03 line.long 0x00 "SCRATCH109_0,Scratch Register" group.long 0x6D8++0x03 line.long 0x00 "SCRATCH110_0,Scratch Register" group.long 0x6DC++0x03 line.long 0x00 "SCRATCH111_0,Scratch Register" group.long 0x6E0++0x03 line.long 0x00 "SCRATCH112_0,Scratch Register" group.long 0x6E4++0x03 line.long 0x00 "SCRATCH113_0,Scratch Register" group.long 0x6E8++0x03 line.long 0x00 "SCRATCH114_0,Scratch Register" group.long 0x6EC++0x03 line.long 0x00 "SCRATCH115_0,Scratch Register" group.long 0x6F0++0x03 line.long 0x00 "SCRATCH116_0,Scratch Register" group.long 0x6F4++0x03 line.long 0x00 "SCRATCH117_0,Scratch Register" group.long 0x6F8++0x03 line.long 0x00 "SCRATCH118_0,Scratch Register" group.long 0x6FC++0x03 line.long 0x00 "SCRATCH119_0,Scratch Register" group.long 0x700++0x03 line.long 0x00 "SCRATCH120_0,Scratch Register" group.long 0x704++0x03 line.long 0x00 "SCRATCH121_0,Scratch Register" group.long 0x708++0x03 line.long 0x00 "SCRATCH122_0,Scratch Register" group.long 0x70C++0x03 line.long 0x00 "SCRATCH123_0,Scratch Register" group.long 0x710++0x03 line.long 0x00 "SCRATCH124_0,Scratch Register" group.long 0x714++0x03 line.long 0x00 "SCRATCH125_0,Scratch Register" group.long 0x718++0x03 line.long 0x00 "SCRATCH126_0,Scratch Register" group.long 0x71C++0x03 line.long 0x00 "SCRATCH127_0,Scratch Register" group.long 0x720++0x03 line.long 0x00 "SCRATCH128_0,Scratch Register" group.long 0x724++0x03 line.long 0x00 "SCRATCH129_0,Scratch Register" group.long 0x728++0x03 line.long 0x00 "SCRATCH130_0,Scratch Register" group.long 0x72C++0x03 line.long 0x00 "SCRATCH131_0,Scratch Register" group.long 0x730++0x03 line.long 0x00 "SCRATCH132_0,Scratch Register" group.long 0x734++0x03 line.long 0x00 "SCRATCH133_0,Scratch Register" group.long 0x738++0x03 line.long 0x00 "SCRATCH134_0,Scratch Register" group.long 0x73C++0x03 line.long 0x00 "SCRATCH135_0,Scratch Register" group.long 0x740++0x03 line.long 0x00 "SCRATCH136_0,Scratch Register" group.long 0x744++0x03 line.long 0x00 "SCRATCH137_0,Scratch Register" group.long 0x748++0x03 line.long 0x00 "SCRATCH138_0,Scratch Register" group.long 0x74C++0x03 line.long 0x00 "SCRATCH139_0,Scratch Register" group.long 0x750++0x03 line.long 0x00 "SCRATCH140_0,Scratch Register" group.long 0x754++0x03 line.long 0x00 "SCRATCH141_0,Scratch Register" group.long 0x758++0x03 line.long 0x00 "SCRATCH142_0,Scratch Register" group.long 0x75C++0x03 line.long 0x00 "SCRATCH143_0,Scratch Register" group.long 0x760++0x03 line.long 0x00 "SCRATCH144_0,Scratch Register" group.long 0x764++0x03 line.long 0x00 "SCRATCH145_0,Scratch Register" group.long 0x768++0x03 line.long 0x00 "SCRATCH146_0,Scratch Register" group.long 0x76C++0x03 line.long 0x00 "SCRATCH147_0,Scratch Register" group.long 0x770++0x03 line.long 0x00 "SCRATCH148_0,Scratch Register" group.long 0x774++0x03 line.long 0x00 "SCRATCH149_0,Scratch Register" group.long 0x778++0x03 line.long 0x00 "SCRATCH150_0,Scratch Register" group.long 0x77C++0x03 line.long 0x00 "SCRATCH151_0,Scratch Register" group.long 0x780++0x03 line.long 0x00 "SCRATCH152_0,Scratch Register" group.long 0x784++0x03 line.long 0x00 "SCRATCH153_0,Scratch Register" group.long 0x788++0x03 line.long 0x00 "SCRATCH154_0,Scratch Register" group.long 0x78C++0x03 line.long 0x00 "SCRATCH155_0,Scratch Register" group.long 0x790++0x03 line.long 0x00 "SCRATCH156_0,Scratch Register" group.long 0x794++0x03 line.long 0x00 "SCRATCH157_0,Scratch Register" group.long 0x798++0x03 line.long 0x00 "SCRATCH158_0,Scratch Register" group.long 0x79C++0x03 line.long 0x00 "SCRATCH159_0,Scratch Register" group.long 0x7A0++0x03 line.long 0x00 "SCRATCH160_0,Scratch Register" group.long 0x7A4++0x03 line.long 0x00 "SCRATCH161_0,Scratch Register" group.long 0x7A8++0x03 line.long 0x00 "SCRATCH162_0,Scratch Register" group.long 0x7AC++0x03 line.long 0x00 "SCRATCH163_0,Scratch Register" group.long 0x7B0++0x03 line.long 0x00 "SCRATCH164_0,Scratch Register" group.long 0x7B4++0x03 line.long 0x00 "SCRATCH165_0,Scratch Register" group.long 0x7B8++0x03 line.long 0x00 "SCRATCH166_0,Scratch Register" group.long 0x7BC++0x03 line.long 0x00 "SCRATCH167_0,Scratch Register" group.long 0x7C0++0x03 line.long 0x00 "SCRATCH168_0,Scratch Register" group.long 0x7C4++0x03 line.long 0x00 "SCRATCH169_0,Scratch Register" group.long 0x7C8++0x03 line.long 0x00 "SCRATCH170_0,Scratch Register" group.long 0x7CC++0x03 line.long 0x00 "SCRATCH171_0,Scratch Register" group.long 0x7D0++0x03 line.long 0x00 "SCRATCH172_0,Scratch Register" group.long 0x7D4++0x03 line.long 0x00 "SCRATCH173_0,Scratch Register" group.long 0x7D8++0x03 line.long 0x00 "SCRATCH174_0,Scratch Register" group.long 0x7DC++0x03 line.long 0x00 "SCRATCH175_0,Scratch Register" group.long 0x7E0++0x03 line.long 0x00 "SCRATCH176_0,Scratch Register" group.long 0x7E4++0x03 line.long 0x00 "SCRATCH177_0,Scratch Register" group.long 0x7E8++0x03 line.long 0x00 "SCRATCH178_0,Scratch Register" group.long 0x7EC++0x03 line.long 0x00 "SCRATCH179_0,Scratch Register" group.long 0x7F0++0x03 line.long 0x00 "SCRATCH180_0,Scratch Register" group.long 0x7F4++0x03 line.long 0x00 "SCRATCH181_0,Scratch Register" group.long 0x7F8++0x03 line.long 0x00 "SCRATCH182_0,Scratch Register" group.long 0x7FC++0x03 line.long 0x00 "SCRATCH183_0,Scratch Register" group.long 0x800++0x03 line.long 0x00 "SCRATCH184_0,Scratch Register" group.long 0x804++0x03 line.long 0x00 "SCRATCH185_0,Scratch Register" group.long 0x808++0x03 line.long 0x00 "SCRATCH186_0,Scratch Register" group.long 0x80C++0x03 line.long 0x00 "SCRATCH187_0,Scratch Register" group.long 0x810++0x03 line.long 0x00 "SCRATCH188_0,Scratch Register" group.long 0x814++0x03 line.long 0x00 "SCRATCH189_0,Scratch Register" group.long 0x818++0x03 line.long 0x00 "SCRATCH190_0,Scratch Register" group.long 0x81C++0x03 line.long 0x00 "SCRATCH191_0,Scratch Register" group.long 0x820++0x03 line.long 0x00 "SCRATCH192_0,Scratch Register" group.long 0x824++0x03 line.long 0x00 "SCRATCH193_0,Scratch Register" group.long 0x828++0x03 line.long 0x00 "SCRATCH194_0,Scratch Register" group.long 0x82C++0x03 line.long 0x00 "SCRATCH195_0,Scratch Register" group.long 0x830++0x03 line.long 0x00 "SCRATCH196_0,Scratch Register" group.long 0x834++0x03 line.long 0x00 "SCRATCH197_0,Scratch Register" group.long 0x838++0x03 line.long 0x00 "SCRATCH198_0,Scratch Register" group.long 0x83C++0x03 line.long 0x00 "SCRATCH199_0,Scratch Register" group.long 0x840++0x03 line.long 0x00 "SCRATCH200_0,Scratch Register" group.long 0x844++0x03 line.long 0x00 "SCRATCH201_0,Scratch Register" group.long 0x848++0x03 line.long 0x00 "SCRATCH202_0,Scratch Register" group.long 0x84C++0x03 line.long 0x00 "SCRATCH203_0,Scratch Register" group.long 0x850++0x03 line.long 0x00 "SCRATCH204_0,Scratch Register" group.long 0x854++0x03 line.long 0x00 "SCRATCH205_0,Scratch Register" group.long 0x858++0x03 line.long 0x00 "SCRATCH206_0,Scratch Register" group.long 0x85C++0x03 line.long 0x00 "SCRATCH207_0,Scratch Register" group.long 0x860++0x03 line.long 0x00 "SCRATCH208_0,Scratch Register" group.long 0x864++0x03 line.long 0x00 "SCRATCH209_0,Scratch Register" group.long 0x868++0x03 line.long 0x00 "SCRATCH210_0,Scratch Register" group.long 0x86C++0x03 line.long 0x00 "SCRATCH211_0,Scratch Register" group.long 0x870++0x03 line.long 0x00 "SCRATCH212_0,Scratch Register" group.long 0x874++0x03 line.long 0x00 "SCRATCH213_0,Scratch Register" group.long 0x878++0x03 line.long 0x00 "SCRATCH214_0,Scratch Register" group.long 0x87C++0x03 line.long 0x00 "SCRATCH215_0,Scratch Register" group.long 0x880++0x03 line.long 0x00 "SCRATCH216_0,Scratch Register" group.long 0x884++0x03 line.long 0x00 "SCRATCH217_0,Scratch Register" group.long 0x888++0x03 line.long 0x00 "SCRATCH218_0,Scratch Register" group.long 0x88C++0x03 line.long 0x00 "SCRATCH219_0,Scratch Register" group.long 0x890++0x03 line.long 0x00 "SCRATCH220_0,Scratch Register" group.long 0x894++0x03 line.long 0x00 "SCRATCH221_0,Scratch Register" group.long 0x898++0x03 line.long 0x00 "SCRATCH222_0,Scratch Register" group.long 0x89C++0x03 line.long 0x00 "SCRATCH223_0,Scratch Register" group.long 0x8A0++0x03 line.long 0x00 "SCRATCH224_0,Scratch Register" group.long 0x8A4++0x03 line.long 0x00 "SCRATCH225_0,Scratch Register" group.long 0x8A8++0x03 line.long 0x00 "SCRATCH226_0,Scratch Register" group.long 0x8AC++0x03 line.long 0x00 "SCRATCH227_0,Scratch Register" group.long 0x8B0++0x03 line.long 0x00 "SCRATCH228_0,Scratch Register" group.long 0x8B4++0x03 line.long 0x00 "SCRATCH229_0,Scratch Register" group.long 0x8B8++0x03 line.long 0x00 "SCRATCH230_0,Scratch Register" group.long 0x8BC++0x03 line.long 0x00 "SCRATCH231_0,Scratch Register" group.long 0x8C0++0x03 line.long 0x00 "SCRATCH232_0,Scratch Register" group.long 0x8C4++0x03 line.long 0x00 "SCRATCH233_0,Scratch Register" group.long 0x8C8++0x03 line.long 0x00 "SCRATCH234_0,Scratch Register" group.long 0x8CC++0x03 line.long 0x00 "SCRATCH235_0,Scratch Register" group.long 0x8D0++0x03 line.long 0x00 "SCRATCH236_0,Scratch Register" group.long 0x8D4++0x03 line.long 0x00 "SCRATCH237_0,Scratch Register" group.long 0x8D8++0x03 line.long 0x00 "SCRATCH238_0,Scratch Register" group.long 0x8DC++0x03 line.long 0x00 "SCRATCH239_0,Scratch Register" group.long 0x8E0++0x03 line.long 0x00 "SCRATCH240_0,Scratch Register" group.long 0x8E4++0x03 line.long 0x00 "SCRATCH241_0,Scratch Register" group.long 0x8E8++0x03 line.long 0x00 "SCRATCH242_0,Scratch Register" group.long 0x8EC++0x03 line.long 0x00 "SCRATCH243_0,Scratch Register" group.long 0x8F0++0x03 line.long 0x00 "SCRATCH244_0,Scratch Register" group.long 0x8F4++0x03 line.long 0x00 "SCRATCH245_0,Scratch Register" group.long 0x8F8++0x03 line.long 0x00 "SCRATCH246_0,Scratch Register" group.long 0x8FC++0x03 line.long 0x00 "SCRATCH247_0,Scratch Register" group.long 0x900++0x03 line.long 0x00 "SCRATCH248_0,Scratch Register" group.long 0x904++0x03 line.long 0x00 "SCRATCH249_0,Scratch Register" group.long 0x908++0x03 line.long 0x00 "SCRATCH250_0,Scratch Register" group.long 0x90C++0x03 line.long 0x00 "SCRATCH251_0,Scratch Register" group.long 0x910++0x03 line.long 0x00 "SCRATCH252_0,Scratch Register" group.long 0x914++0x03 line.long 0x00 "SCRATCH253_0,Scratch Register" group.long 0x918++0x03 line.long 0x00 "SCRATCH254_0,Scratch Register" group.long 0x91C++0x03 line.long 0x00 "SCRATCH255_0,Scratch Register" group.long 0x920++0x03 line.long 0x00 "SCRATCH256_0,Scratch Register" group.long 0x924++0x03 line.long 0x00 "SCRATCH257_0,Scratch Register" group.long 0x928++0x03 line.long 0x00 "SCRATCH258_0,Scratch Register" group.long 0x92C++0x03 line.long 0x00 "SCRATCH259_0,Scratch Register" group.long 0x930++0x03 line.long 0x00 "SCRATCH260_0,Scratch Register" group.long 0x934++0x03 line.long 0x00 "SCRATCH261_0,Scratch Register" group.long 0x938++0x03 line.long 0x00 "SCRATCH262_0,Scratch Register" group.long 0x93C++0x03 line.long 0x00 "SCRATCH263_0,Scratch Register" group.long 0x940++0x03 line.long 0x00 "SCRATCH264_0,Scratch Register" group.long 0x944++0x03 line.long 0x00 "SCRATCH265_0,Scratch Register" group.long 0x948++0x03 line.long 0x00 "SCRATCH266_0,Scratch Register" group.long 0x94C++0x03 line.long 0x00 "SCRATCH267_0,Scratch Register" group.long 0x950++0x03 line.long 0x00 "SCRATCH268_0,Scratch Register" group.long 0x954++0x03 line.long 0x00 "SCRATCH269_0,Scratch Register" group.long 0x958++0x03 line.long 0x00 "SCRATCH270_0,Scratch Register" group.long 0x95C++0x03 line.long 0x00 "SCRATCH271_0,Scratch Register" group.long 0x960++0x03 line.long 0x00 "SCRATCH272_0,Scratch Register" group.long 0x964++0x03 line.long 0x00 "SCRATCH273_0,Scratch Register" group.long 0x968++0x03 line.long 0x00 "SCRATCH274_0,Scratch Register" group.long 0x96C++0x03 line.long 0x00 "SCRATCH275_0,Scratch Register" group.long 0x970++0x03 line.long 0x00 "SCRATCH276_0,Scratch Register" group.long 0x974++0x03 line.long 0x00 "SCRATCH277_0,Scratch Register" group.long 0x978++0x03 line.long 0x00 "SCRATCH278_0,Scratch Register" group.long 0x97C++0x03 line.long 0x00 "SCRATCH279_0,Scratch Register" group.long 0x980++0x03 line.long 0x00 "SCRATCH280_0,Scratch Register" group.long 0x984++0x03 line.long 0x00 "SCRATCH281_0,Scratch Register" group.long 0x988++0x03 line.long 0x00 "SCRATCH282_0,Scratch Register" group.long 0x98C++0x03 line.long 0x00 "SCRATCH283_0,Scratch Register" group.long 0x990++0x03 line.long 0x00 "SCRATCH284_0,Scratch Register" group.long 0x994++0x03 line.long 0x00 "SCRATCH285_0,Scratch Register" group.long 0x998++0x03 line.long 0x00 "SCRATCH286_0,Scratch Register" group.long 0x99C++0x03 line.long 0x00 "SCRATCH287_0,Scratch Register" group.long 0x9A0++0x03 line.long 0x00 "SCRATCH288_0,Scratch Register" group.long 0x9A4++0x03 line.long 0x00 "SCRATCH289_0,Scratch Register" group.long 0x9A8++0x03 line.long 0x00 "SCRATCH290_0,Scratch Register" group.long 0x9AC++0x03 line.long 0x00 "SCRATCH291_0,Scratch Register" group.long 0x9B0++0x03 line.long 0x00 "SCRATCH292_0,Scratch Register" group.long 0x9B4++0x03 line.long 0x00 "SCRATCH293_0,Scratch Register" group.long 0x9B8++0x03 line.long 0x00 "SCRATCH294_0,Scratch Register" group.long 0x9BC++0x03 line.long 0x00 "SCRATCH295_0,Scratch Register" group.long 0x9C0++0x03 line.long 0x00 "SCRATCH296_0,Scratch Register" group.long 0x9C4++0x03 line.long 0x00 "SCRATCH297_0,Scratch Register" group.long 0x9C8++0x03 line.long 0x00 "SCRATCH298_0,Scratch Register" group.long 0x9CC++0x03 line.long 0x00 "SCRATCH299_0,Scratch Register" group.long 0xA9C++0x03 line.long 0x00 "SECURE_SCRATCH81_0,Secure scratch register" group.long 0xAA0++0x03 line.long 0x00 "SECURE_SCRATCH82_0,Secure scratch register" group.long 0xAA4++0x03 line.long 0x00 "SECURE_SCRATCH83_0,Secure scratch register" group.long 0xAA8++0x03 line.long 0x00 "SECURE_SCRATCH84_0,Secure scratch register" group.long 0xAAC++0x03 line.long 0x00 "SECURE_SCRATCH85_0,Secure scratch register" group.long 0xAB0++0x03 line.long 0x00 "SECURE_SCRATCH86_0,Secure scratch register" group.long 0xAB4++0x03 line.long 0x00 "SECURE_SCRATCH87_0,Secure scratch register" group.long 0xAB8++0x03 line.long 0x00 "SECURE_SCRATCH88_0,Secure scratch register" group.long 0xABC++0x03 line.long 0x00 "SECURE_SCRATCH89_0,Secure scratch register" group.long 0xAC0++0x03 line.long 0x00 "SECURE_SCRATCH90_0,Secure scratch register" group.long 0xAC4++0x03 line.long 0x00 "SECURE_SCRATCH91_0,Secure scratch register" group.long 0xAC8++0x03 line.long 0x00 "SECURE_SCRATCH92_0,Secure scratch register" group.long 0xACC++0x03 line.long 0x00 "SECURE_SCRATCH93_0,Secure scratch register" group.long 0xAD0++0x03 line.long 0x00 "SECURE_SCRATCH94_0,Secure scratch register" group.long 0xAD4++0x03 line.long 0x00 "SECURE_SCRATCH95_0,Secure scratch register" group.long 0xAD8++0x03 line.long 0x00 "SECURE_SCRATCH96_0,Secure scratch register" group.long 0xADC++0x03 line.long 0x00 "SECURE_SCRATCH97_0,Secure scratch register" group.long 0xAE0++0x03 line.long 0x00 "SECURE_SCRATCH98_0,Secure scratch register" group.long 0xAE4++0x03 line.long 0x00 "SECURE_SCRATCH99_0,Secure scratch register" group.long 0xAE8++0x03 line.long 0x00 "SECURE_SCRATCH100_0,Secure scratch register" group.long 0xAEC++0x03 line.long 0x00 "SECURE_SCRATCH101_0,Secure scratch register" group.long 0xAF0++0x03 line.long 0x00 "SECURE_SCRATCH102_0,Secure scratch register" group.long 0xAF4++0x03 line.long 0x00 "SECURE_SCRATCH103_0,Secure scratch register" group.long 0xAF8++0x03 line.long 0x00 "SECURE_SCRATCH104_0,Secure scratch register" group.long 0xAFC++0x03 line.long 0x00 "SECURE_SCRATCH105_0,Secure scratch register" group.long 0xB00++0x03 line.long 0x00 "SECURE_SCRATCH106_0,Secure scratch register" group.long 0xB04++0x03 line.long 0x00 "SECURE_SCRATCH107_0,Secure scratch register" group.long 0xB08++0x03 line.long 0x00 "SECURE_SCRATCH108_0,Secure scratch register" group.long 0xB0C++0x03 line.long 0x00 "SECURE_SCRATCH109_0,Secure scratch register" group.long 0xB10++0x03 line.long 0x00 "SECURE_SCRATCH110_0,Secure scratch register" group.long 0xB14++0x03 line.long 0x00 "SECURE_SCRATCH111_0,Secure scratch register" group.long 0xB18++0x03 line.long 0x00 "SECURE_SCRATCH112_0,Secure scratch register" group.long 0xB1C++0x03 line.long 0x00 "SECURE_SCRATCH113_0,Secure scratch register" group.long 0xB20++0x03 line.long 0x00 "SECURE_SCRATCH114_0,Secure scratch register" group.long 0xB24++0x03 line.long 0x00 "SECURE_SCRATCH115_0,Secure scratch register" group.long 0xB28++0x03 line.long 0x00 "SECURE_SCRATCH116_0,Secure scratch register" group.long 0xB2C++0x03 line.long 0x00 "SECURE_SCRATCH117_0,Secure scratch register" group.long 0xB30++0x03 line.long 0x00 "SECURE_SCRATCH118_0,Secure scratch register" group.long 0xB34++0x03 line.long 0x00 "SECURE_SCRATCH119_0,Secure scratch register" tree.end width 0xb tree.end tree "PMC Counter 0" base ad:0x700F0000 width 15. tree "Counter Count registers" group.long 0x00++0x03 line.long 0x00 "CNTCR_0,Counter Control Register" bitfld.long 0x00 1. " HDBG ,Halt-on-debugs" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enables the counter" "Disabled,Enabled" textline " " rgroup.long 0x04++0x03 line.long 0x00 "CNTSR_0,Counter Status Register" bitfld.long 0x00 8. " FCREQ ,Frequency change acknowledge" "0,1" bitfld.long 0x00 1. " HDBG ,Indicates whether or not the counter is halted because the Halt-on-Debug signal is asserted" "Disabled,Enabled" textline " " if (((d.l(ad:0x700F0000))&0x01)==0x01) rgroup.long 0x08++0x07 line.long 0x00 "CNTCV0_0,Counter Count Value" line.long 0x04 "CNTCV1_0,Counter Count Value Register" textline " " else group.long 0x08++0x07 line.long 0x00 "CNTCV0_0,Counter Count Value" line.long 0x04 "CNTCV1_0,Counter Count Value Register" textline " " endif tree.end tree "Counter Frequency Registers" group.long 0x20++0x03 line.long 0x00 "CNTFID0_0,Frequency Table Entry Register" rgroup.long 0x24++0x03 line.long 0x00 "CNTFID1_0,Frequency Table End Marker" rgroup.long 0xFD0++0x03 line.long 0x00 "COUNTERID4_0,COUNTERID4_0" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Peripheral ID value" group.long 0xFE0++0x0F line.long 0x00 "COUNTERID0_0,COUNTERID0_0" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Peripheral ID value" line.long 0x04 "COUNTERID1_0,COUNTERID1_0" hexmask.long.byte 0x04 0.--7. 1. " VALUE ,Peripheral ID value" line.long 0x08 "COUNTERID2_0,COUNTERID2_0" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Peripheral ID value" line.long 0x0C "COUNTERID3_0,COUNTERID3_0" hexmask.long.byte 0x0C 0.--7. 1. " VALUE ,Peripheral ID value" group.long 0xFF0++0x0F line.long 0x00 "COUNTERID8_0,COUNTERID8_0" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Component ID value" line.long 0x04 "COUNTERID9_0,COUNTERID9_0" hexmask.long.byte 0x04 0.--7. 1. " VALUE ,Component ID value" line.long 0x08 "COUNTERID10_0,COUNTERID10_0" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Component ID value" line.long 0x0C "COUNTERID11_0,COUNTERID11_0" hexmask.long.byte 0x0C 0.--7. 1. " VALUE ,Component ID value" tree.end width 0x0B tree.end tree "PMC Counter 1" base ad:0x70100000 width 17. rgroup.long 0x08++0x07 line.long 0x00 "CNTCV0_0,Counter Count Value Register" line.long 0x04 "CNTCV1_0,Counter Count Value Register" rgroup.long 0xFD0++0x03 line.long 0x00 "COUNTERID4_0,COUNTERID4_0" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Peripheral ID value" rgroup.long 0xFE0++0x0F line.long 0x00 "COUNTERID0_0,COUNTERID0_0" hexmask.long.byte 0x00 0.--7. 1. " VALUE , Peripheral ID value" line.long 0x04 "COUNTERID1_0,COUNTERID1_0" hexmask.long.byte 0x04 0.--7. 1. " VALUE ,Peripheral ID value" line.long 0x08 "COUNTERID2_0,COUNTERID2_0" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Peripheral ID value" line.long 0x0C "COUNTERID3_0,COUNTERID3_0" hexmask.long.byte 0x0C 0.--7. 1. " VALUE ,Peripheral ID value" rgroup.long 0xFF0++0x0F line.long 0x00 "COUNTERID8_0,COUNTERID8_0" hexmask.long.byte 0x00 0.--7. 1. " VALUE , Component ID value" line.long 0x04 "COUNTERID9_0,COUNTERID9_0" hexmask.long.byte 0x04 0.--7. 1. " VALUE ,Component ID value" line.long 0x08 "COUNTERID10_0,COUNTERID10_0" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Component ID value" line.long 0x0C "COUNTERID11_0,COUNTERID11_0" hexmask.long.byte 0x0C 0.--7. 1. " VALUE ,Component ID value" width 0x0B tree.end tree "Secure Boot Control" base ad:0x6000C000+0x200 width 18. group.long 0x00++0x0B line.long 0x00 "SB_CSR_0,Secure boot control status register" bitfld.long 0x00 12.--15. " COT_FAIL_COUNT ,Chain-of-Trust fail count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " SWDM_FAIL_COUNT ,Secure watchdog monitor fail count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " SWDM_ENABLE ,Secure watchdog monitor enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " HANG ,Secure boot hang" "Disabled,Enabled" bitfld.long 0x00 5. " JTAG_DISABLE ,Secure JTAG disable" "Enabled,Disabled" bitfld.long 0x00 4. " PIROM_DISABLE ,Protected iROM disable" "Enabled,Disabled" textline " " bitfld.long 0x00 1. " NS_RST_VEC_WR_DIS ,Non-secure reset vector write disable" "Enabled,Disabled" bitfld.long 0x00 0. " SECURE_BOOT_FLAG ,Booted into secure mode" "Disabled,Enabled" line.long 0x04 "SB_PIROM_START_0,Secure boot protected ROM start" line.long 0x08 "SB_PFCFG_0,Secure boot processor feature configuration register" bitfld.long 0x08 24. " CS_DEADSTATUS_EN ,Coresight Debug bit to enable return codes on bad accesses" "Disabled,Enabled" bitfld.long 0x08 23. " CS_ACCESS_CHECK_EN ,Debug bit to Enable Checking for bad Csite accesses such as when CPU not in active partition" "Disabled,Enabled" bitfld.long 0x08 22. " CS_CODES_EN ,Coresight Debug bit to Enable Status Codes" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " CS_TIMEOUT_TM ,Coresight Timeout Testmode" "Disabled,Enabled" rbitfld.long 0x08 20. " DBGACK_AVP ,DBGACKnowledge Status from AVP" "Disabled,Enabled" rbitfld.long 0x08 19. " DBGACK_CPU3 ,DBGACKnowledge Status from CPU3" "Disabled,Enabled" textline " " rbitfld.long 0x08 18. " DBGACK_CPU2 ,DBGACKnowledge Status from CPU2" "Disabled,Enabled" rbitfld.long 0x08 17. " DBGACK_CPU1 ,DBGACKnowledge Status from CPU1" "Disabled,Enabled" rbitfld.long 0x08 16. " DBGACK_CPU0 ,DBGACKnowledge Status from CPU0 " "Disabled,Enabled" textline " " bitfld.long 0x08 12. " EDBGRQ_AVP ,External Debug Request for AVP" "Disabled,Enabled" bitfld.long 0x08 11. " EDBGRQ_CPU3 ,External Debug Request for CPU3 via coresight" "Disabled,Enabled" bitfld.long 0x08 10. " EDBGRQ_CPU2 ,External Debug Request for CPU2 via coresight" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " EDBGRQ_CPU1 ,External Debug Request for CPU1 via coresight" "Disabled,Enabled" bitfld.long 0x08 8. " EDBGRQ_CPU0 ,External Debug Request for CPU0 via coresight" "Disabled,Enabled" bitfld.long 0x08 7. " CS_TIMEOUT_EN ,Coresight Timeout Enable RTCK delay control" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " CS_RTCK_SPEED ,RTCK delay (Synchronized or Direct)" "Slow,Fast" bitfld.long 0x08 5. " CP15SDISABLE ,Disable access to system control registers enum" "Enabled,Disabled" bitfld.long 0x08 4. " CFGSDISABLE ,Disable access to secure control registers" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " DBGEN ,Debug Enable (Not the same as JTAG enable)" "Disabled,Enabled" bitfld.long 0x08 2. " NIDEN ,Non-Invasive Debug Enable" "Disabled,Enabled" bitfld.long 0x08 1. " SPIDEN ,Secure Privileged Invasive Debug Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " SPNIDEN ,Secure Privileged Non-Invasive Debug Enable" "Disabled,Enabled" group.long 0x00++0x0B line.long 0x00 "SB_CSR_0,Secure boot control status register" bitfld.long 0x00 12.--15. " COT_FAIL_COUNT ,Chain-of-Trust fail count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " SWDM_FAIL_COUNT ,Secure watchdog monitor fail count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. " SWDM_ENABLE ,Secure watchdog monitor enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " HANG ,Secure boot hang" "Disabled,Enabled" bitfld.long 0x00 5. " JTAG_DISABLE ,Secure JTAG disable" "Enabled,Disabled" bitfld.long 0x00 4. " PIROM_DISABLE ,Protected iROM disable" "Enabled,Disabled" textline " " bitfld.long 0x00 1. " NS_RST_VEC_WR_DIS ,Non-secure reset vector write disable" "Enabled,Disabled" bitfld.long 0x00 0. " SECURE_BOOT_FLAG ,Booted into secure mode" "Disabled,Enabled" line.long 0x04 "SB_PIROM_START_0,Secure boot protected ROM start" line.long 0x08 "SB_PFCFG_0,Secure boot processor feature configuration register" bitfld.long 0x08 24. " CS_DEADSTATUS_EN ,Coresight Debug bit to enable return codes on bad accesses" "Disabled,Enabled" bitfld.long 0x08 23. " CS_ACCESS_CHECK_EN ,Debug bit to Enable Checking for bad Csite accesses such as when CPU not in active partition" "Disabled,Enabled" bitfld.long 0x08 22. " CS_CODES_EN ,Coresight Debug bit to Enable Status Codes" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " CS_TIMEOUT_TM ,Coresight Timeout Testmode" "Disabled,Enabled" rbitfld.long 0x08 20. " DBGACK_AVP ,DBGACKnowledge Status from AVP" "Disabled,Enabled" rbitfld.long 0x08 19. " DBGACK_CPU3 ,DBGACKnowledge Status from CPU3" "Disabled,Enabled" textline " " rbitfld.long 0x08 18. " DBGACK_CPU2 ,DBGACKnowledge Status from CPU2" "Disabled,Enabled" rbitfld.long 0x08 17. " DBGACK_CPU1 ,DBGACKnowledge Status from CPU1" "Disabled,Enabled" rbitfld.long 0x08 16. " DBGACK_CPU0 ,DBGACKnowledge Status from CPU0 " "Disabled,Enabled" textline " " bitfld.long 0x08 12. " EDBGRQ_AVP ,External Debug Request for AVP" "Disabled,Enabled" bitfld.long 0x08 11. " EDBGRQ_CPU3 ,External Debug Request for CPU3 via coresight" "Disabled,Enabled" bitfld.long 0x08 10. " EDBGRQ_CPU2 ,External Debug Request for CPU2 via coresight" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " EDBGRQ_CPU1 ,External Debug Request for CPU1 via coresight" "Disabled,Enabled" bitfld.long 0x08 8. " EDBGRQ_CPU0 ,External Debug Request for CPU0 via coresight" "Disabled,Enabled" bitfld.long 0x08 7. " CS_TIMEOUT_EN ,Coresight Timeout Enable RTCK delay control" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " CS_RTCK_SPEED ,RTCK delay (Synchronized or Direct)" "Slow,Fast" bitfld.long 0x08 5. " CP15SDISABLE ,Disable access to system control registers enum" "Enabled,Disabled" bitfld.long 0x08 4. " CFGSDISABLE ,Disable access to secure control registers" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " DBGEN ,Debug Enable (Not the same as JTAG enable)" "Disabled,Enabled" bitfld.long 0x08 2. " NIDEN ,Non-Invasive Debug Enable" "Disabled,Enabled" bitfld.long 0x08 1. " SPIDEN ,Secure Privileged Invasive Debug Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " SPNIDEN ,Secure Privileged Non-Invasive Debug Enable" "Disabled,Enabled" width 0xb tree.end tree "Exception Vector Pointers" base ad:0x6000F000 width 20. rgroup.long 0x00++0x03 line.long 0x00 "RESET_VECTOR_0,EVP_RESET_VECTOR_0" group.long 0x100++0x03 line.long 0x00 "CPU_RESET_VECTOR_0,EVP_CPU_RESET_VECTOR_0" width 0xb tree.end tree.end tree "Host Subsystem" tree "Channel 0" base ad:0x50000000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x50000000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x50000000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x50000000+0x2000) - ACTMON1(MSENC) ; base (ad:0x50000000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x50000000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 1" base ad:0x50004000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x50004000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x50004000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x50004000+0x2000) - ACTMON1(MSENC) ; base (ad:0x50004000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x50004000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 2" base ad:0x50008000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x50008000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x50008000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x50008000+0x2000) - ACTMON1(MSENC) ; base (ad:0x50008000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x50008000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 3" base ad:0x5000E000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x5000E000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x5000E000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x5000E000+0x2000) - ACTMON1(MSENC) ; base (ad:0x5000E000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x5000E000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 4" base ad:0x50013000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x50013000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x50013000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x50013000+0x2000) - ACTMON1(MSENC) ; base (ad:0x50013000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x50013000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 5" base ad:0x50017000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x50017000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x50017000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x50017000+0x2000) - ACTMON1(MSENC) ; base (ad:0x50017000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x50017000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 6" base ad:0x5001B000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x5001B000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x5001B000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x5001B000+0x2000) - ACTMON1(MSENC) ; base (ad:0x5001B000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x5001B000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 7" base ad:0x5001C0000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x5001C0000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x5001C0000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x5001C0000+0x2000) - ACTMON1(MSENC) ; base (ad:0x5001C0000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x5001C0000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 8" base ad:0x50020000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x50020000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x50020000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x50020000+0x2000) - ACTMON1(MSENC) ; base (ad:0x50020000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x50020000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 9" base ad:0x50024000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x50024000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x50024000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x50024000+0x2000) - ACTMON1(MSENC) ; base (ad:0x50024000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x50024000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 10" base ad:0x50028000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x50028000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x50028000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x50028000+0x2000) - ACTMON1(MSENC) ; base (ad:0x50028000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x50028000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree "Channel 11" base ad:0x5002C000 width 27. tree "Channel Registers" rgroup.long 0x00++0x03 line.long 0x00 "CHANNEL_FIFOSTAT_0,Host1X Channel FIFOSTAT_0" bitfld.long 0x00 31. " INDRDY ,Indicates that INDCOUNT == 0 so it should be OK to issue another read" "0,1" bitfld.long 0x00 24.--28. " OUTFENTRIES ,Number of entries available for reading in this channel's output FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " REGNUMEMPTY ,Register write/read FIFO free count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12. " CFGATHER ,Indicates whether GATHER is active" "Idle,Busy" bitfld.long 0x00 11. " CFEMPTY ,Indicates whether the command FIFO is empty" "Not empty,Empty" hexmask.long.word 0x00 0.--10. 1. " CFNUMEMPTY ,Command FIFO free count" if (((per.l(ad:0x5002C000+0x04))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type: Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long 0x00 2.--25. 0x04 " INDOFFSET ,Frame buffer address" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" else group.long 0x04++0x03 line.long 0x00 "CHANNEL_INDOFF_0,Host1X Channel INDOFF_0" bitfld.long 0x00 31. " AUTOINC ,Auto increment of read/write address" "Disabled,Enabled" bitfld.long 0x00 30. " ACCTYPE ,Access type:Indirect register or Indirect frame buffer" "Reg,FB" bitfld.long 0x00 29. " BUF32B ,Buffer up 32 bits of register data before sending it" "NoBuf,Buf" bitfld.long 0x00 27.--28. " INDSWAP ,Indirect frame buffer access swap control" "None,Byte16,Byte32,Word32" textline " " hexmask.long.byte 0x00 18.--25. 1. " INDMODID ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET ,Register offset" bitfld.long 0x00 0. " INDOFFUPD ,Optionally disable update of INDOFFSET" "Updated,Not updated" endif group.long 0x08++0x13 line.long 0x00 "CHANNEL_INDICT_0,Indirect Register Access Count" hexmask.long.word 0x00 0.--15. 1. " INDCOUNT ,Indcount" line.long 0x04 "CHANNEL_IDDATA_0,Host1X Channel INDDATA_0" line.long 0x08 "CHANNEL_RAISE_0,DMA And RAISE/REFCOUNT Functionality" hexmask.long 0x08 2.--31. 1. " RAISE ,Channel's RAISE vector" line.long 0x0C "CHANNEL_DMASTART_0,Host1X Channel DMSTART_0" hexmask.long 0x0C 2.--31. 0x04 " DMASTART ,Cmdbuf frame buffer ofset" line.long 0x10 "CHANNEL_DMAPUT_0, Host1X Channel DMAPUT_0" hexmask.long 0x10 2.--31. 0x04 " DMAPUT ,Cmdbuf frame buffer offset" rgroup.long 0x1C++0x0B line.long 0x00 "CHANNEL_DMAGET_0,Host1X Channel DMAGET_0" hexmask.long 0x00 2.--31. 0x04 " DMAGET ,Cmdbuf frame buffer offset" line.long 0x04 "CHANNEL_DMAEND_0 ,Host1X Channel DMAEND_0" hexmask.long 0x04 2.--31. 0x04 " DMAEND ,Cmdbuf frame buffer offset" line.long 0x08 "CHANNEL_DMACTRL_0,DMA Control Register" bitfld.long 0x08 2. " DMAINITGET ,Reset GET pointer to the value of DMAPUT when DMAGETRST is asserted" "Disabled,Enabled" bitfld.long 0x08 1. " DMAGETRST ,Reset GET pointer to 0" "Disabled,Enabled" bitfld.long 0x08 0. " DMASTOP ,Stop DMA from fetching on this channel" "Run,Stop" if (((per.l(ad:0x5002C000+0x04))&0x40000000)==0x40000000) group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long 0x00 2.--31. 0x04 " INDOFFSET2 ,Frame buffer address" else group.long 0x8C++0x03 line.long 0x00 "CHANNEL_INDOFF2_0,Host1X Channel INDOFF2_0" hexmask.long.byte 0x00 18.--25. 1. " INDMODID2 ,Register module ID" hexmask.long.word 0x00 2.--17. 1. " INDROFFSET2 ,Register offset" endif group.long 0x90++0x2B line.long 0x00 "CHANNEL_TICKCOUNT_HI_0,Host1X Channel TICKCOUNT HI 0" line.long 0x04 "CHANNEL_TICKCOUNT_LO_0,Host1X Channel TICKCOUNT LO 0" line.long 0x08 "CHANNEL_CHANNELCTRL_0,Host1X Channel CHANNELCTRL_0" bitfld.long 0x08 2. " KERNEL_FILTER_GBUFFER ,Enable setclass command filter for gather buffers" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLETICKCNT ,Enable tick counter" "Disabled,Enabled" line.long 0x0C "CHANNEL_PAYLOAD_0,Host1X Channel PAYLOAD_0" line.long 0x10 "CHANNEL_STALLCTRL_0,Host1X Channel STALLCTRL_0" bitfld.long 0x10 0. " ENABLE_CHANNEL_STALL ,Enable channel STALL" "Disabled,Enabled" line.long 0x14 "CHANNEL_STALLCOUNT_HI_0,Host1X Channel STALLCOUNT Hi 0" line.long 0x18 "CHANNEL_STALLCOUNT_LO_0,Host1X Channel STALLCOUNT Lo 0" line.long 0x1C "CHANNEL_XFERCTRL_0,Host1X Channel XFERCTRL 0" bitfld.long 0x1C 0. " ENABLE_CHANNEL_XFER ,Enable channel XFER" "Disabled,Enabled" line.long 0x20 "CHANNEL_CHANNEL_XFER_HI_0,Host1X Channel XFER Hi 0" line.long 0x24 "CHANNEL_CHANNEL_XFER_LO_0,Host1X Channel XFER Lo 0" line.long 0x28 "CHANNEL_CHANNEL_SPARE_0,Host1x Channel SPARE 0" hexmask.long.word 0x28 16.--31. 1. " CHANNEL_SPARE_HI ,Channel SPARE Hi" hexmask.long.word 0x28 0.--15. 1. " CHANNEL_SPARE_LO ,CHannel SPARE Lo" tree.end ; base (ad:0x5002C000+0x2000) - ACTMON1(MSENC) ; base (ad:0x5002C000+0x2040) - ACTMON2(VIC) width 23. base (ad:0x5002C000+0x2100) tree "SYNC (Synchronous Registers)" sif CPUIS("TEGRAX1") rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 27. " VII2C_INT , VII2C interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 22. " SOR1_INT ,SOR1 interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " NVENC_INT ,NVENC interrupt status" "Not pending,Pending" bitfld.long 0x00 18. " NVDEC_INT ,NVDEC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 14. " NVJPG_INT ,NVJPG interrupt status" "Not pending,Pending" bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " TSECB_INT ,TSECB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" bitfld.long 0x00 1. " DPAUX1_INT ,DPAUX1 interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 4. " CPU_TZ_ILLEGAL_TZ_ACCESS_MASK ,Mask CPU_TZ_ILLEGAL_TZ_ACCESS" "Masked,Not masked" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 27. " VII2C_INT_C0MASK ,Interrupt mask for VII2C interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 22. " SOR1_INT_C0MASK ,Interrupt mask for SOR1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 19. " NVENC_INT_C0MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 18. " NVDEC_INT_C0MASK ,Interrupt mask for NVDEC_INT interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 14. " NVJPG_INT_C0MASK ,Interrupt mask for NVJPG interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 4. " TSECB_INT_C0MASK ,Interrupt mask for TSECB interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 1. " DPAUX1_INT_C0MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 27. " VII2C_INT_C1MASK ,Interrupt mask for VII2C interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 22. " SOR1_INT_C1MASK ,Interrupt mask for SOR1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 19. " NVENC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 18. " NVDEC_INT_C1MASK ,Interrupt mask for NVENC_INT interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 14. " NVJPG_INT_C1MASK ,Interrupt mask for NVJPG interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 4. " TSECB_INT_C1MASK ,Interrupt mask for TSECB interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 1. " DPAUX1_INT_C1MASK ,Interrupt mask for DPAUX1 interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 28. " XBAR_TSEC_TIMEOUT_ID ,Id of the CPU which timed out and updated" "TSEC,XBAR" eventfld.long 0x00 21. " WAIT_INT13 ,WAIT has completed on channel 13" "Not pending,Pending" eventfld.long 0x00 20. " WAIT_INT12 ,WAIT has completed on channel 12" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,Invalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" textline " " eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" textline " " eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" textline " " eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" textline " " eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 21. " WAIT_INT13 ,WAIT interrupt mask 13" "Masked,Not masked" bitfld.long 0x04 20. " WAIT_INT12 ,WAIT interrupt mask 12" "Masked,Not masked" bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " UNIT4_ACTMON_INTR ,Unit4 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " UNIT3_ACTMON_INTR ,Unit3 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 ACTMON interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 ACTMON interrupt mask" "Masked,Not masked" bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" textline " " bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" textline " " bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 13. " CMDPP_ILLEGAL_OPCODE_INT13 ,CMPP 13 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 12. " CMDPP_ILLEGAL_OPCODE_INT12 ,CMPP 12 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 13. " CMDPP_ILLEGAL_OPCODE_INTMASK13 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 12. " CMDPP_ILLEGAL_OPCODE_INTMASK12 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--13. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" wgroup.long 0xB0++0x0B line.long 0x00 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x00 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x00 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" bitfld.long 0x00 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" textline " " bitfld.long 0x00 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x00 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x00 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x00 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x00 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x00 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" textline " " bitfld.long 0x00 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" bitfld.long 0x00 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x00 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" textline " " bitfld.long 0x00 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x00 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x04 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x04 27. " VII2C_TEARDOWN ,VII2C teardown" "No action,Teardown" bitfld.long 0x04 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x04 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" textline " " bitfld.long 0x04 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x04 22. " SOR1_TEARDOWN ,SOR1 teardown" "No action,Teardown" bitfld.long 0x04 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x04 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x04 19. " NVENC_TEARDOWN ,NVENC teardown" "No action,Teardown" bitfld.long 0x04 18. " NVDEC_TEARDOWN ,NVEDC teardown" "No action,Teardown" textline " " bitfld.long 0x04 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x04 14. " NVJPG_TEARDOWN ,JVJPG teardown" "No action,Teardown" bitfld.long 0x04 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x04 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x04 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" textline " " bitfld.long 0x04 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" bitfld.long 0x04 4. " TSECB_TEARDOWN ,TSECB teardown" "No action,Teardown" bitfld.long 0x04 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " bitfld.long 0x04 1. " DPAUX1_TEARDOWN ,DPAUX1 teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x47 line.long 0x00 "SYNC_DISPLAY_STATUS_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_STATUS_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_STATUS_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_STATUS_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_SOR1_STATUS_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,SOR1 currcl" line.long 0x14 "SYNC_SOR_STATUS,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_STATUS_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_STATUS_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_STATUS_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_STATUS_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_NVENC_STATUS_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,NVENC currcl" line.long 0x2C "SYNC_TSEC_STATUS_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" line.long 0x34 "SYNC_NVDEC_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x34 16.--25. 1. " ISPB_CURRCL ,NVDEC currcl" line.long 0x38 "SYNC_NVJPG_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x38 16.--25. 1. " ISPB_CURRCL ,NVJPG currcl" line.long 0x3C "SYNC_VII2C_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x3C 16.--25. 1. " ISPB_CURRCL ,VII2C currcl" line.long 0x40 "SYNC_DPAUX1_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x40 16.--25. 1. " ISPB_CURRCL ,DPAUX1 currcl" line.long 0x44 "SYNC_TSECB_STATUS_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x44 16.--25. 1. " ISPB_CURRCL ,TSECB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 13. " HIPRI_CH13 ,HIPRI ch 13" "Disabled,Enabled" bitfld.long 0x00 12. " HIPRI_CH12 ,HIPRI ch 12" "Disabled,Enabled" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" else rgroup.long 0x00++0x03 line.long 0x00 "SYNC_INTSTATUS_0,Host1X Sync Intstatus 0" bitfld.long 0x00 31. " SYNCPT_CPU1_INT ,SYNCPT CPU1 interrupt status " "Not pending,Pending" bitfld.long 0x00 30. " SYNCPT_CPU0_INT ,SYNCPT CPU0 interrupt status" "Not pending,Pending" bitfld.long 0x00 26. " ISPB_INT ,ISPB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 24. " ISP_INT ,ISP interrupt status" "Not pending,Pending" bitfld.long 0x00 23. " DPAUX_INT , DPAUX interrupt status" "Not pending,Pending" bitfld.long 0x00 21. " SOR_INT ,SOR interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 20. " TSEC_INT ,TSEC interrupt status" "Not pending,Pending" bitfld.long 0x00 19. " MSENC_INT ,MSENC interrupt status" "Not pending,Pending" bitfld.long 0x00 16. " DSIB_INT ,DSIB interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " VIC_INT ,VIC interrupt status" "Not pending,Pending" bitfld.long 0x00 12. " DSI_INT ,DSI interrupt status" "Not pending,Pending" bitfld.long 0x00 10. " HDMI_INT ,HDMi int " "Not pending,Pending" textline " " bitfld.long 0x00 9. " DISPLAYB_INT ,DISPLAYB interrupt status" "Not pending,Pending" bitfld.long 0x00 8. " DISPLAY_INT ,DISPLAY interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " VI_INT ,VI interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 0. " HOST_INT ,HOST interrupt status" "Not pending,Pending" group.long 0x04++0x0B line.long 0x00 "SYNC_INTMASK_0,Master Interrupt Mask For All Interrupt Signals" bitfld.long 0x00 1. " CPU1_INT_MASK_ALL ,Mask all interrupts on CPU1" "Masked,Not masked" bitfld.long 0x00 0. " CPU0_INT_MASK_ALL ,Mask all interrupts on CPU0" "Masked,Not masked" line.long 0x04 "SYNC_INTC0MASK_0,Interrupt Mask For CPU0" bitfld.long 0x04 26. " ISPB_INT_C0MASK ,Interrupt mask for ISPB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 24. " ISP_INT_C0MASK ,Interrupt mask for ISP interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 23. " DPAUX_INT_C0MASK ,Interrupt mask for DPAUX interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 21. " SOR_INT_C0MASK ,Interrupt mask for SOR interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 20. " TSEC_INT_C0MASK ,Interrupt mask for TSEC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 19. " MSENC_INT_C0MASK ,Interrupt mask for MSENC interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " DSIB_INT_C0MASK ,Interrupt mask for DSIB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 13. " VIC_INT_C0MASK ,Interrupt mask for VIC interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 12. " DSI_INT_C0MASK ,Interrupt mask for DSI interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 10. " HDMI_INT_C0MASK ,Interrupt mask for HDMI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 9. " DISPLAYB_INT_C0MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 8. " DISPLAY_INT_C0MASK ,Interrupt mask for DISPLAY interrupt signal to CPU0" "Masked,Not masked" textline " " bitfld.long 0x04 2. " VI_INT_C0MASK ,Interrupt mask for VI interrupt signal to CPU0" "Masked,Not masked" bitfld.long 0x04 0. " HOST_INT_C0MASK ,Interrupt mask for HOST interrupt signal to CPU0" "Masked,Not masked" line.long 0x08 "SYNC_INTC1MASK_0,Interrupt Mask For CPU1" bitfld.long 0x08 26. " ISPB_INT_C1MASK ,Interrupt mask for ISPB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 24. " ISP_INT_C1MASK ,Interrupt mask for ISP interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 23. " DPAUX_INT_C1MASK ,Interrupt mask for DPAUX interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 21. " SOR_INT_C1MASK ,Interrupt mask for SOR interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 20. " TSEC_INT_C1MASK ,Interrupt mask for TSEC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 19. " MSENC_INT_C1MASK ,Interrupt mask for MSENC interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 16. " DSIB_INT_C1MASK ,Interrupt mask for DSIB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 13. " VIC_INT_C1MASK ,Interrupt mask for VIC interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 12. " DSI_INT_C1MASK ,Interrupt mask for DSI interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 10. " HDMI_INT_C1MASK ,Interrupt mask for HDMI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 9. " DISPLAYB_INT_C1MASK ,Interrupt mask for DISPLAYB interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 8. " DISPLAY_INT_C1MASK ,Interrupt mask for DISPLAY interrupt signal to CPU1" "Masked,Not masked" textline " " bitfld.long 0x08 2. " VI_INT_C1MASK ,Interrupt mask for VI interrupt signal to CPU1" "Masked,Not masked" bitfld.long 0x08 0. " HOST_INT_C1MASK ,Interrupt mask for HOST interrupt signal to CPU1" "Masked,Not masked" textline " " group.long 0x20++0x0F line.long 0x00 "SYNC_HINSTATUS_0,HOST Interrupt Status" rbitfld.long 0x00 31. " HINTSTATUS_EXT_INT ,Additional interrupts pending in the HINSTATUS_EXT register" "Not pending,Pending" eventfld.long 0x00 30. " TIMER_INTP ,Timer interrupt from the Protected Channel" "Not pending,Pending" eventfld.long 0x00 29. " CSW_HOST1XW2MC_INT ,Host write client FIFO has filled up" "Not pending,Pending" textline " " eventfld.long 0x00 19. " RDMA_DATABUF_THOLD_INT0 ,Read DMA data FIFO in port0" "Not pending,Pending" eventfld.long 0x00 18. " RDMA_BUF_THOLD_INT0 ,Buffer threshold reached in read DMA port0" "Not pending,Pending" eventfld.long 0x00 17. " RDMA_BUF_OFLOW_INT0 ,Buffer overflow in read DMA port0" "Not pending,Pending" textline " " eventfld.long 0x00 16. " RDMA_INVAL_CLREQ_INT ,INvalid client request to read DMA" "Not pending,Pending" eventfld.long 0x00 15. " XBAR_TSEC_TIMEOUT_ID ,ID of the CPU which timed out and updated the timeout address" "Tsec,Xbar" eventfld.long 0x00 13. " UNIT2_ACTMON_INTR ,Unit2 ACTMON generates interrupt" "Not pending,Pending" textline " " eventfld.long 0x00 12. " UNIT1_ACTMON_INTR ,Unit1 ACTMON generates interrupt" "Not pending,Pending" eventfld.long 0x00 11. " WAIT_INT11 ,WAIT has completed on channel 11" "Not pending,Pending" eventfld.long 0x00 10. " WAIT_INT10 ,WAIT has completed on channel 10" "Not pending,Pending" textline " " eventfld.long 0x00 9. " WAIT_INT9 ,WAIT has completed on channel 9" "Not pending,Pending" eventfld.long 0x00 8. " WAIT_INT8 ,WAIT has completed on channel 8" "Not pending,Pending" eventfld.long 0x00 7. " WAIT_INT7 ,WAIT has completed on channel 7" "Not pending,Pending" textline " " eventfld.long 0x00 6. " WAIT_INT6 ,WAIT has completed on channel 6" "Not pending,Pending" eventfld.long 0x00 5. " WAIT_INT5 ,WAIT has completed on channel 5" "Not pending,Pending" eventfld.long 0x00 4. " WAIT_INT4 ,WAIT has completed on channel 4" "Not pending,Pending" textline " " eventfld.long 0x00 3. " WAIT_INT3 ,WAIT has completed on channel 3" "Not pending,Pending" eventfld.long 0x00 2. " WAIT_INT2 ,WAIT has completed on channel 2" "Not pending,Pending" eventfld.long 0x00 1. " WAIT_INT1 ,WAIT has completed on channel 1" "Not pending,Pending" textline " " eventfld.long 0x00 0. " WAIT_INT0 ,WAIT has completed on channel 0" "Not pending,Pending" line.long 0x04 "SYNC_HINTMASK_0,Host Interrupt Mask" bitfld.long 0x04 31. " HINTSTATUS_EXT_INTMASK , Hintstatus ext interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TIMER_INTMASKP ,Timer Interrupt Mask for the Protected Channel" "Masked,Not masked" bitfld.long 0x04 29. " CSW_HOST1XW2MC_INTMASK ,Csw Host1xw2mc interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " RDMA_DATABUF_THOLD_INTMASK0 ,RDMA data buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 18. " RDMA_BUF_THOLD_INTMASK0 , RDMA buf thold intmask0" "Masked,Not masked" bitfld.long 0x04 17. " RDMA_BUF_OFLOW_INTMASK0 ,RDMA buf oflow intmask0" "Masked,Not masked" textline " " bitfld.long 0x04 16. " RDMA_INVAL_CLREQ_INTMASK ,RDMA inval clreq interrupt mask" "Masked,Not masked" bitfld.long 0x04 13. " UNIT2_ACTMON_INTRMASK ,UNIT2 actmon interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " UNIT1_ACTMON_INTRMASK ,UNIT1 actmon interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 11. " WAIT_INTMASK11 ,WAIT interrupt mask 11" "Masked,Not masked" bitfld.long 0x04 10. " WAIT_INTMASK10 ,WAIT interrupt mask 10" "Masked,Not masked" bitfld.long 0x04 9. " WAIT_INTMASK9 ,WAIT interrupt mask 9" "Masked,Not masked" textline " " bitfld.long 0x04 8. " WAIT_INTMASK8 ,WAIT interrupt mask 8" "Masked,Not masked" bitfld.long 0x04 7. " WAIT_INTMASK7 ,WAIT interrupt mask 7" "Masked,Not masked" bitfld.long 0x04 6. " WAIT_INTMASK6 ,WAIT interrupt mask 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " WAIT_INTMASK5 ,WAIT interrupt mask 5" "Masked,Not masked" bitfld.long 0x04 4. " WAIT_INTMASK4 ,WAIT interrupt mask 4" "Masked,Not masked" bitfld.long 0x04 3. " WAIT_INTMASK3 ,WAIT interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x04 2. " WAIT_INTMASK2 ,WAIT interrupt mask 2" "Masked,Not masked" bitfld.long 0x04 1. " WAIT_INTMASK1 ,WAIT interrupt mask 1" "Masked,Not masked" bitfld.long 0x04 0. " WAIT_INTMASK0 ,WAIT interrupt mask 0" "Masked,Not masked" textline " " line.long 0x08 "SYNC_HINTSTATUS_EXT_0,Extended Host Interrupt Status" eventfld.long 0x08 31. " IP_WRITE_INT ,Offending address in IP_WRITE_TIMEOUT_ADDR" "Not pending,Pending" eventfld.long 0x08 30. " IP_READ_INT ,OFFENDING address in IP_READ_TIMEOUT_ADDR" "Not pending,Pending" textline " " eventfld.long 0x08 11. " CMDPP_ILLEGAL_OPCODE_INT11 ,CMDPP 11 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 10. " CMDPP_ILLEGAL_OPCODE_INT10 ,CMDPP 10 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 9. " CMDPP_ILLEGAL_OPCODE_INT9 ,CMDPP 9 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 8. " CMDPP_ILLEGAL_OPCODE_INT8 ,CMDPP 8 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 7. " CMDPP_ILLEGAL_OPCODE_INT7 ,CMDPP 7 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 6. " CMDPP_ILLEGAL_OPCODE_INT6 ,CMDPP 6 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 5. " CMDPP_ILLEGAL_OPCODE_INT5 ,CMDPP 5 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 4. " CMDPP_ILLEGAL_OPCODE_INT4 ,CMDPP 4 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 3. " CMDPP_ILLEGAL_OPCODE_INT3 ,CMDPP 3 has seen an illegal opcode" "Not pending,Pending" textline " " eventfld.long 0x08 2. " CMDPP_ILLEGAL_OPCODE_INT2 ,CMDPP 2 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 1. " CMDPP_ILLEGAL_OPCODE_INT1 ,CMDPP 1 has seen an illegal opcode" "Not pending,Pending" eventfld.long 0x08 0. " CMDPP_ILLEGAL_OPCODE_INT0 ,CMDPP 0 has seen an illegal opcode" "Not pending,Pending" line.long 0x0C "SYNC_HINTMASK_EXT_0,Host1X Sync Hintmask Ext 0" bitfld.long 0x0C 31. " IP_WRITE_INTMASK ,Ip write interrupt mask" "Masked,Not masked" bitfld.long 0x0C 30. " IP_READ_INTMASK ,Ip read interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 11. " CMDPP_ILLEGAL_OPCODE_INTMASK11 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 10. " CMDPP_ILLEGAL_OPCODE_INTMASK10 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 9. " CMDPP_ILLEGAL_OPCODE_INTMASK9 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 8. " CMDPP_ILLEGAL_OPCODE_INTMASK8 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 7. " CMDPP_ILLEGAL_OPCODE_INTMASK7 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 6. " CMDPP_ILLEGAL_OPCODE_INTMASK6 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 5. " CMDPP_ILLEGAL_OPCODE_INTMASK5 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 4. " CMDPP_ILLEGAL_OPCODE_INTMASK4 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 3. " CMDPP_ILLEGAL_OPCODE_INTMASK3 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x0C 2. " CMDPP_ILLEGAL_OPCODE_INTMASK2 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 1. " CMDPP_ILLEGAL_OPCODE_INTMASK1 ,CMDPP_ILLEGAL_OPCODE interrupt mask" "Masked,Not masked" bitfld.long 0x0C 0. " CMDPP_ILLEGAL_OPCODE_INTMASK0 ,CMDPP_ILLEGAL_OPCODE_INT0 interrupt mask" "Masked,Not masked" textline " " group.long 0xA0++0x03 line.long 0x00 "SYNC_CF_SETUPDONE_0,Host1X Sync CF Setup Done 0" bitfld.long 0x00 0. " CF_SETUPDONE ,Dummy bit (Write to this register to trigger an update of the FIFO's pointers)" "No effect,Trigger" group.long 0xA4++0x03 line.long 0x00 "SYNC_CMDPROC_CTRL_0,Host1X Sync Cmdproc Ctrl 0" bitfld.long 0x00 5. " INTFC_CLKEN_OVR ,Intfc clken ovr" "No,Yes" bitfld.long 0x00 2. " GATHER_PARSE_DISABLED ,Gather parse disabled" "No,Yes" bitfld.long 0x00 1. " DROP_ILLEGAL_OPCODES ,Drop illegal opcodes" "No,Yes" rgroup.long 0xA8++0x03 line.long 0x00 "SYNC_CMDPROC_STAT_0,Host1X Sync Cmdproc Stat 0" hexmask.long.word 0x00 0.--11. 1. " ILLEGAL_OPCODE ,Illegal opcode" group.long 0xAC++0x0B line.long 0x00 "SYNC_CMDPROC_STOP_0,Stops Issuing Commands From The Command FIFO" bitfld.long 0x00 13. " CH13_CMDPROC_STOP ,CH13 cmdproc stop" "Run,Stop" bitfld.long 0x00 12. " CH12_CMDPROC_STOP ,CH12 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 11. " CH11_CMDPROC_STOP ,CH11 cmdproc stop" "Run,Stop" bitfld.long 0x00 10. " CH10_CMDPROC_STOP ,CH10 cmdproc stop" "Run,Stop" bitfld.long 0x00 9. " CH9_CMDPROC_STOP ,CH9 cmdproc stop" "Run,Stop" bitfld.long 0x00 8. " CH8_CMDPROC_STOP ,CH8 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 7. " CH7_CMDPROC_STOP ,CH7 cmdproc stop" "Run,Stop" bitfld.long 0x00 6. " CH6_CMDPROC_STOP ,CH6 cmdproc stop" "Run,Stop" bitfld.long 0x00 5. " CH5_CMDPROC_STOP ,CH5 cmdproc stop" "Run,Stop" bitfld.long 0x00 4. " CH4_CMDPROC_STOP ,CH4 cmdproc stop" "Run,Stop" textline " " bitfld.long 0x00 3. " CH3_CMDPROC_STOP ,CH3 cmdproc stop" "Run,Stop" bitfld.long 0x00 2. " CH2_CMDPROC_STOP ,CH2 cmdproc stop" "Run,Stop" bitfld.long 0x00 1. " CH1_CMDPROC_STOP ,CH1 cmdproc stop" "Run,Stop" bitfld.long 0x00 0. " CH0_CMDPROC_STOP ,CH0 cmdproc stop" "Run,Stop" line.long 0x04 "SYNC_CH_TEARDOWN_0,Channel Teardown Register" bitfld.long 0x04 13. " CH13_TEARDOWN ,CH13 teardown" "No action,Teardown" bitfld.long 0x04 12. " CH12_TEARDOWN ,CH12 teardown" "No action,Teardown" textline " " bitfld.long 0x04 11. " CH11_TEARDOWN ,CH11 teardown" "No action,Teardown" bitfld.long 0x04 10. " CH10_TEARDOWN ,CH10 teardown" "No action,Teardown" bitfld.long 0x04 9. " CH9_TEARDOWN ,CH9 teardown" "No action,Teardown" bitfld.long 0x04 8. " CH8_TEARDOWN ,CH8 teardown" "No action,Teardown" textline " " bitfld.long 0x04 7. " CH7_TEARDOWN ,CH7 teardown" "No action,Teardown" bitfld.long 0x04 6. " CH6_TEARDOWN ,CH6 teardown" "No action,Teardown" bitfld.long 0x04 5. " CH5_TEARDOWN ,CH5 teardown" "No action,Teardown" bitfld.long 0x04 4. " CH4_TEARDOWN ,CH4 teardown" "No action,Teardown" textline " " bitfld.long 0x04 3. " CH3_TEARDOWN ,CH3 teardown" "No action,Teardown" bitfld.long 0x04 2. " CH2_TEARDOWN ,CH2 teardown" "No action,Teardown" bitfld.long 0x04 1. " CH1_TEARDOWN ,CH1 teardown" "No action,Teardown" bitfld.long 0x04 0. " CH0_TEARDOWN ,CH0 teardown" "No action,Teardown" line.long 0x08 "SYNC_MOD_TEARDOWN_0,Module Teardown Register" bitfld.long 0x08 26. " ISPB_TEARDOWN ,ISPB teardown" "No action,Teardown" bitfld.long 0x08 24. " ISP_TEARDOWN ,ISP teardown" "No action,Teardown" bitfld.long 0x08 23. " DPAUX_TEARDOWN ,DPAUX teardown" "No action,Teardown" bitfld.long 0x08 21. " SOR_TEARDOWN ,SOR teardown" "No action,Teardown" textline " " bitfld.long 0x08 20. " TSEC_TEARDOWN ,TSEC teardown" "No action,teardown" bitfld.long 0x08 19. " MSENC_TEARDOWN ,MSENC teardown" "No action,Teardown" bitfld.long 0x08 16. " DSIB_TEARDOWN ,DSIB teardown" "No action,Teardown" bitfld.long 0x08 13. " VIC_TEARDOWN ,VIC teardown" "No action,Teardown" textline " " bitfld.long 0x08 12. " DSI_TEARDOWN ,DSI teardown" "No action,Teardown" bitfld.long 0x08 10. " HDMI_TEARDOWN ,HDMI teardown" "No action,Teardown" bitfld.long 0x08 9. " DISPLAYB_TEARDOWN ,DISPLAYB teardown" "No action,Teardown" bitfld.long 0x08 8. " DISPLAY_TEARDOWN ,DISPLAY teardown" "No action,Teardown" textline " " bitfld.long 0x08 2. " VI_TEARDOWN ,VI teardown" "No action,Teardown" textline " " width 29. rgroup.long 0xDC++0x33 line.long 0x00 "SYNC_DISPLAY_Status_0,Host1X Sync Display Status 0" hexmask.long.word 0x00 16.--25. 1. " DISPLAY_CURRCL ,Display currcl" line.long 0x04 "SYNC_DISPLAYB_Status_0,Host1X Sync DisplayB Status 0" hexmask.long.word 0x04 16.--25. 1. " DISPLAYB_CURRCL ,Display currcl" line.long 0x08 "SYNC_ISP_Status_0,Host1X Sync ISP Status 0" hexmask.long.word 0x08 16.--25. 1. " ISP_CURRCL ,ISP currcl" line.long 0x0C "SYNC_DSI_Status_0,Host1X Sync DSI Status 0" hexmask.long.word 0x0C 16.--25. 1. " DSI_CURRCL ,DSI currcl" line.long 0x10 "SYNC_HDMI_Status_0,Host1X Sync HDMI Status 0" hexmask.long.word 0x10 16.--25. 1. " HDMI_CURRCL ,HDMI currcl" line.long 0x14 "SYNC_SOR_Status,Hosta1X Sync SOR Status 0" hexmask.long.word 0x14 16.--25. 1. " SOR_CURRCL ,SOR currcl" line.long 0x18 "SYNC_DPAUX_Status_0,Host1X Sync DPAUX Status 0" hexmask.long.word 0x18 16.--25. 1. " DPAUX_CURRCL ,DPAUX currcl" line.long 0x1C "SYNC_VI_Status_0,Host1X Sync VI Status 0" hexmask.long.word 0x1C 16.--25. 1. " VI_CURRCL ,VI currcl" line.long 0x20 "SYNC_DSIB_Status_0,Host1X Sync DSIB Status 0" hexmask.long.word 0x20 16.--25. 1. " DSIB_CURRCL ,DSIB currcl" line.long 0x24 "SYNC_VIC_Status_0,Host1X Sync Vic Status 0" hexmask.long.word 0x24 16.--25. 1. " VIC_CURRCL ,VIC currcl" line.long 0x28 "SYNC_MSENC_Status_0,Host1X Sync Msenc Status 0" hexmask.long.word 0x28 16.--25. 1. " MSENC_CURRCL ,MSENC currcl" line.long 0x2C "SYNC_TSEC_Status_0,Host1X Sync TSEC Status 0" hexmask.long.word 0x2C 16.--25. 1. " TSEC_CURRCL ,TSEC currcl" line.long 0x30 "SYNC_ISPB_Status_0,Host1X Sync ISPB Status 0" hexmask.long.word 0x30 16.--25. 1. " ISPB_CURRCL ,ISPB currcl" group.long 0x1A0++0x0F line.long 0x00 "SYNC_DIRECT_MODULE_CONFIG_0,Host1X Sync Direct Module Config 0" hexmask.long 0x00 2.--31. 0x04 " BASE ,Base" line.long 0x04 "SYNC_USEC_CLK_0,Number Of Host Clocks Needed To Make A Microsecond" hexmask.long.word 0x04 0.--11. 1. " USEC_CLKS ,Number of host clocks needed to make a microsecond" line.long 0x08 "SYNC_CTXSW_TIMEOUT_CFG_0,Host1X Sync CTXSW Timeout CFG 0" hexmask.long.byte 0x08 0.--7. 1. " WAIT_CTXSW_CNT ,Number of cycles to wait" textline " " line.long 0x0C "SYNC_INDREG_DMA_CTRL_0,Host1X Sync INDREG DMA CTRL" bitfld.long 0x0C 7. " AHBDMA_ENABLE ,Enable generation of request to DMA engine" "Disabled,Enabled" bitfld.long 0x0C 5.--6. " AHBDMA_ATTN_LVL ,Number of entries to receive before sending DMA request " "1 slot,4 slots,8 slots,?..." bitfld.long 0x0C 0.--3. " AHBDMA_CHID ,Channel being used by indirect read for DMA" "0,1,2,3,4,5,6,7,8,9,10,11,?..." group.long 0x1B0++0x0F line.long 0x00 "SYNC_CHANNEL_PRIORITY_0,Host1X Sync Channel Priority For Dual Ring Arbitration" bitfld.long 0x00 11. " HIPRI_CH11 ,HIPRI ch 11" "Disabled,Enabled" bitfld.long 0x00 10. " HIPRI_CH10 ,HIPRI ch 10" "Disabled,Enabled" bitfld.long 0x00 9. " HIPRI_CH9 ,HIPRI ch 9" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HIPRI_CH8 ,HIPRI ch 8" "Disabled,Enabled" bitfld.long 0x00 7. " HIPRI_CH7 ,HIPRI ch 7" "Disabled,Enabled" bitfld.long 0x00 6. " HIPRI_CH6 ,HIPRI ch 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HIPRI_CH5 ,HIPRI ch 5" "Disabled,Enabled" bitfld.long 0x00 4. " HIPRI_CH4 ,HIPRI ch 4" "Disabled,Enabled" bitfld.long 0x00 3. " HIPRI_CH3 ,HIPRI ch 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HIPRI_CH2 ,HIPRI ch 2" "Disabled,Enabled" bitfld.long 0x00 1. " HIPRI_CH1 ,HIPRI ch 1" "Disabled,Enabled" bitfld.long 0x00 0. " HIPRI_CH0 ,HIPRI ch 0" "Disabled,Enabled" line.long 0x04 "SYNC_CDMA_ASM_TIMEOUT_0,Host1X Sync CDMA Asm Timeout Value " bitfld.long 0x04 8.--12. " CDMA_ASM_GFIFO_TIMEOUT ,CDMA ASM GFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CDMA_ASM_DFIFO_TIMEOUT ,CDMA ASM DFIFO timeout" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SYNC_CDMA_MISC_0,Host1X Sync Cdma Misc 0" bitfld.long 0x08 12. " CDMA_EN_STATS ,CDMA enable statistics counters" "Disabled,Enabled" bitfld.long 0x08 10. " CDMA_CLKEN_OVR ,CDMA clken ovr" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " CDMA_PUT_SYNC_DISABLE ,CDMA put sync disable" "Disabled,Enabled" bitfld.long 0x08 8. " CDMA_SIMPLE_PREFETCH ,CDMA simple prefetch" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 0.--5. 1. " CDMA_DELAY_PUT ,CDMA delay put" line.long 0x0C "SYNC_IP_BUSY_TIMEOUT_0,Host1X Sync IP Busy Timeout" rgroup.long 0x1C0++0x07 line.long 0x00 "SYNC_IP_READ_TIMEOUT_ADDR_0,Host1X Sync IP Read Timeout Addr 0" hexmask.long 0x00 2.--31. 0x04 " IP_READ_TIMEOUT_ADDR ,IP read timeout addr" line.long 0x04 "SYNC_IP_WRITE_TIMEOUT_ADDR_0,Host1X Sync IP Write Timeout Addr" hexmask.long 0x04 2.--31. 0x04 " IP_WRITE_TIMEOUT_ADDR ,Address of transaction that caused an AXI write timeout" group.long 0x1D8++0x0B line.long 0x00 "SYNC_MCCIF_THCTRL_0,Host1X Sync MCCIF Thctrl 0" bitfld.long 0x00 8.--13. " CSW_HOST1XW2MC_HPTH ,CSW host1xw2mc hpth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CSW_HOST1XW_FIFOSTAT ,CSW HOST1XW fifostat" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,333,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SYNC_HC_MCCIF_FIFOCTRL_O ,Memory Client Interface FIFO Control And Clock Gating Control" bitfld.long 0x04 20. " HC_RCLK_OVR_MODE ,HC rclk ovr mode" "Legacy,On" bitfld.long 0x04 19. " HC_WCLK_OVR_MODE ,HC wclk ovr mode" "Legacy,On" bitfld.long 0x04 18. " HC_CCLK_OVERRIDE ,HC cclk override" "0,1" textline " " bitfld.long 0x04 17. " HC_RCLK_OVERRIDE ,HC rclk override" "0,1" bitfld.long 0x04 16. " HC_WCLK_OVERRIDE ,HC wclk override" "0,1" bitfld.long 0x04 3. " HC_MCCIF_RDCL_RDFAST ,HC mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " HC_MCCIF_WRMC_CLLE2X ,HC mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x04 1. " HC_MCCIF_RDMC_RDFAST ,HC mccif rdmc rdfast" "Disabled,Enabled" bitfld.long 0x04 0. " HC_MCCIF_WRCL_MCLE2X ,HC mccif wrcl mcle2x" "Disabled,Enabled" line.long 0x08 "SSYNC_TIMEOUT_WCOAL_HC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x08 0.--7. 1. " HOST1XW_WCOAL_TMVAL ,HOST1XW_WCOAL_TMVAL" endif width 23. tree "MLOCK registers" group.long 0x2C0++0x03 line.long 0x00 "SYNC_MLOCK_0_0,Host1X Sync MLOCK_0_0" bitfld.long 0x00 0. " MLOCK_0 ,Mlock_0" "Released,Held" group.long 0x2C4++0x03 line.long 0x00 "SYNC_MLOCK_1_0,Host1X Sync MLOCK_1_0" bitfld.long 0x00 0. " MLOCK_1 ,Mlock_1" "Released,Held" group.long 0x2C8++0x03 line.long 0x00 "SYNC_MLOCK_2_0,Host1X Sync MLOCK_2_0" bitfld.long 0x00 0. " MLOCK_2 ,Mlock_2" "Released,Held" group.long 0x2CC++0x03 line.long 0x00 "SYNC_MLOCK_3_0,Host1X Sync MLOCK_3_0" bitfld.long 0x00 0. " MLOCK_3 ,Mlock_3" "Released,Held" group.long 0x2D0++0x03 line.long 0x00 "SYNC_MLOCK_4_0,Host1X Sync MLOCK_4_0" bitfld.long 0x00 0. " MLOCK_4 ,Mlock_4" "Released,Held" group.long 0x2D4++0x03 line.long 0x00 "SYNC_MLOCK_5_0,Host1X Sync MLOCK_5_0" bitfld.long 0x00 0. " MLOCK_5 ,Mlock_5" "Released,Held" group.long 0x2D8++0x03 line.long 0x00 "SYNC_MLOCK_6_0,Host1X Sync MLOCK_6_0" bitfld.long 0x00 0. " MLOCK_6 ,Mlock_6" "Released,Held" group.long 0x2DC++0x03 line.long 0x00 "SYNC_MLOCK_7_0,Host1X Sync MLOCK_7_0" bitfld.long 0x00 0. " MLOCK_7 ,Mlock_7" "Released,Held" group.long 0x2E0++0x03 line.long 0x00 "SYNC_MLOCK_8_0,Host1X Sync MLOCK_8_0" bitfld.long 0x00 0. " MLOCK_8 ,Mlock_8" "Released,Held" group.long 0x2E4++0x03 line.long 0x00 "SYNC_MLOCK_9_0,Host1X Sync MLOCK_9_0" bitfld.long 0x00 0. " MLOCK_9 ,Mlock_9" "Released,Held" group.long 0x2E8++0x03 line.long 0x00 "SYNC_MLOCK_10_0,Host1X Sync MLOCK_10_0" bitfld.long 0x00 0. " MLOCK_10 ,Mlock_10" "Released,Held" group.long 0x2EC++0x03 line.long 0x00 "SYNC_MLOCK_11_0,Host1X Sync MLOCK_11_0" bitfld.long 0x00 0. " MLOCK_11 ,Mlock_11" "Released,Held" group.long 0x2F0++0x03 line.long 0x00 "SYNC_MLOCK_12_0,Host1X Sync MLOCK_12_0" bitfld.long 0x00 0. " MLOCK_12 ,Mlock_12" "Released,Held" group.long 0x2F4++0x03 line.long 0x00 "SYNC_MLOCK_13_0,Host1X Sync MLOCK_13_0" bitfld.long 0x00 0. " MLOCK_13 ,Mlock_13" "Released,Held" group.long 0x2F8++0x03 line.long 0x00 "SYNC_MLOCK_14_0,Host1X Sync MLOCK_14_0" bitfld.long 0x00 0. " MLOCK_14 ,Mlock_14" "Released,Held" group.long 0x2FC++0x03 line.long 0x00 "SYNC_MLOCK_15_0,Host1X Sync MLOCK_15_0" bitfld.long 0x00 0. " MLOCK_15 ,Mlock_15" "Released,Held" textline " " rgroup.long 0x340++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_0_0,Host1X Sync MLOCK Owner 0_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_0 ,Mlock owner chid 0" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_0 ,MLOCK CPU owns 0" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_0 ,MLOCK CH owns 0" "Not owned,Owned" rgroup.long 0x344++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_1_0,Host1X Sync MLOCK Owner 1_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_1 ,Mlock owner chid 1" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_1 ,MLOCK CPU owns 1" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_1 ,MLOCK CH owns 1" "Not owned,Owned" rgroup.long 0x348++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_2_0,Host1X Sync MLOCK Owner 2_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_2 ,Mlock owner chid 2" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_2 ,MLOCK CPU owns 2" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_2 ,MLOCK CH owns 2" "Not owned,Owned" rgroup.long 0x34C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_3_0,Host1X Sync MLOCK Owner 3_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_3 ,Mlock owner chid 3" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_3 ,MLOCK CPU owns 3" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_3 ,MLOCK CH owns 3" "Not owned,Owned" rgroup.long 0x350++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_4_0,Host1X Sync MLOCK Owner 4_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_4 ,Mlock owner chid 4" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_4 ,MLOCK CPU owns 4" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_4 ,MLOCK CH owns 4" "Not owned,Owned" rgroup.long 0x354++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_5_0,Host1X Sync MLOCK Owner 5_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_5 ,Mlock owner chid 5" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_5 ,MLOCK CPU owns 5" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_5 ,MLOCK CH owns 5" "Not owned,Owned" rgroup.long 0x358++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_6_0,Host1X Sync MLOCK Owner 6_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_6 ,Mlock owner chid 6" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_6 ,MLOCK CPU owns 6" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_6 ,MLOCK CH owns 6" "Not owned,Owned" rgroup.long 0x35C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_7_0,Host1X Sync MLOCK Owner 7_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_7 ,Mlock owner chid 7" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_7 ,MLOCK CPU owns 7" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_7 ,MLOCK CH owns 7" "Not owned,Owned" rgroup.long 0x360++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_8_0,Host1X Sync MLOCK Owner 8_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_8 ,Mlock owner chid 8" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_8 ,MLOCK CPU owns 8" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_8 ,MLOCK CH owns 8" "Not owned,Owned" rgroup.long 0x364++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_9_0,Host1X Sync MLOCK Owner 9_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_9 ,Mlock owner chid 9" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_9 ,MLOCK CPU owns 9" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_9 ,MLOCK CH owns 9" "Not owned,Owned" rgroup.long 0x368++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_10_0,Host1X Sync MLOCK Owner 10_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_10 ,Mlock owner chid 10" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_10 ,MLOCK CPU owns 10" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_10 ,MLOCK CH owns 10" "Not owned,Owned" rgroup.long 0x36C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_11_0,Host1X Sync MLOCK Owner 11_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_11 ,Mlock owner chid 11" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_11 ,MLOCK CPU owns 11" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_11 ,MLOCK CH owns 11" "Not owned,Owned" rgroup.long 0x370++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_12_0,Host1X Sync MLOCK Owner 12_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_12 ,Mlock owner chid 12" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_12 ,MLOCK CPU owns 12" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_12 ,MLOCK CH owns 12" "Not owned,Owned" rgroup.long 0x374++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_13_0,Host1X Sync MLOCK Owner 13_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_13 ,Mlock owner chid 13" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_13 ,MLOCK CPU owns 13" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_13 ,MLOCK CH owns 13" "Not owned,Owned" rgroup.long 0x378++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_14_0,Host1X Sync MLOCK Owner 14_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_14 ,Mlock owner chid 14" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_14 ,MLOCK CPU owns 14" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_14 ,MLOCK CH owns 14" "Not owned,Owned" rgroup.long 0x37C++0x03 line.long 0x00 "SYNC_MLOCK_OWNER_15_0,Host1X Sync MLOCK Owner 15_0" bitfld.long 0x00 8.--11. " MLOCK_OWNER_CHID_15 ,Mlock owner chid 15" "0,1,2,3,4,5,6,7,8,9,10,11,?..." bitfld.long 0x00 1. " MLOCK_CPU_OWNS_15 ,MLOCK CPU owns 15" "Not owned,Owned" bitfld.long 0x00 0. " MLOCK_CH_OWNS_15 ,MLOCK CH owns 15" "Not owned,Owned" group.long 0x3C0++0x03 line.long 0x00 "SYNC_MLOCK_ERROR_0_0,Host1X Sync Mlock Error 0_0" bitfld.long 0x00 15. " MLOCK_ERROR_15 ,Mlock error 15" "No error,Error" bitfld.long 0x00 14. " MLOCK_ERROR_14 ,Mlock error 14" "No error,Error" bitfld.long 0x00 13. " MLOCK_ERROR_13 ,Mlock error 13" "No error,Error" bitfld.long 0x00 12. " MLOCK_ERROR_12 ,Mlock error 12" "No error,Error" textline " " bitfld.long 0x00 11. " MLOCK_ERROR_11 ,Mlock error 11" "No error,Error" bitfld.long 0x00 10. " MLOCK_ERROR_10 ,Mlock error 10" "No error,Error" bitfld.long 0x00 9. " MLOCK_ERROR_9 ,Mlock error 9" "No error,Error" bitfld.long 0x00 8. " MLOCK_ERROR_8 ,Mlock error 8" "No error,Error" textline " " bitfld.long 0x00 7. " MLOCK_ERROR_7 ,Mlock error 7" "No error,Error" bitfld.long 0x00 6. " MLOCK_ERROR_6 ,Mlock error 6" "No error,Error" bitfld.long 0x00 5. " MLOCK_ERROR_5 ,Mlock error 5" "No error,Error" bitfld.long 0x00 4. " MLOCK_ERROR_4 ,Mlock error 4" "No error,Error" textline " " bitfld.long 0x00 3. " MLOCK_ERROR_3 ,Mlock error 3" "No error,Error" bitfld.long 0x00 2. " MLOCK_ERROR_2 ,Mlock error 2" "No error,Error" bitfld.long 0x00 1. " MLOCK_ERROR_1 ,Mlock error 1" "No error,Error" bitfld.long 0x00 0. " MLOCK_ERROR_0 ,Mlock error 0" "No error,Error" group.long 0x600++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_0_0,Host1X Sync Syncpt Base 0_0" group.long 0x604++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_1_0,Host1X Sync Syncpt Base 1_0" group.long 0x608++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_2_0,Host1X Sync Syncpt Base 2_0" group.long 0x60C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_3_0,Host1X Sync Syncpt Base 3_0" group.long 0x610++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_4_0,Host1X Sync Syncpt Base 4_0" group.long 0x614++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_5_0,Host1X Sync Syncpt Base 5_0" group.long 0x618++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_6_0,Host1X Sync Syncpt Base 6_0" group.long 0x61C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_7_0,Host1X Sync Syncpt Base 7_0" group.long 0x620++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_8_0,Host1X Sync Syncpt Base 8_0" group.long 0x624++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_9_0,Host1X Sync Syncpt Base 9_0" group.long 0x628++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_10_0,Host1X Sync Syncpt Base 10_0" group.long 0x62C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_11_0,Host1X Sync Syncpt Base 11_0" group.long 0x630++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_12_0,Host1X Sync Syncpt Base 12_0" group.long 0x634++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_13_0,Host1X Sync Syncpt Base 13_0" group.long 0x638++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_14_0,Host1X Sync Syncpt Base 14_0" group.long 0x63C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_15_0,Host1X Sync Syncpt Base 15_0" group.long 0x640++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_16_0,Host1X Sync Syncpt Base 16_0" group.long 0x644++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_17_0,Host1X Sync Syncpt Base 17_0" group.long 0x648++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_18_0,Host1X Sync Syncpt Base 18_0" group.long 0x64C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_19_0,Host1X Sync Syncpt Base 19_0" group.long 0x650++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_20_0,Host1X Sync Syncpt Base 20_0" group.long 0x654++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_21_0,Host1X Sync Syncpt Base 21_0" group.long 0x658++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_22_0,Host1X Sync Syncpt Base 22_0" group.long 0x65C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_23_0,Host1X Sync Syncpt Base 23_0" group.long 0x660++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_24_0,Host1X Sync Syncpt Base 24_0" group.long 0x664++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_25_0,Host1X Sync Syncpt Base 25_0" group.long 0x668++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_26_0,Host1X Sync Syncpt Base 26_0" group.long 0x66C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_27_0,Host1X Sync Syncpt Base 27_0" group.long 0x670++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_28_0,Host1X Sync Syncpt Base 28_0" group.long 0x674++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_29_0,Host1X Sync Syncpt Base 29_0" group.long 0x678++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_30_0,Host1X Sync Syncpt Base 30_0" group.long 0x67C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_31_0,Host1X Sync Syncpt Base 31_0" group.long 0x680++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_32_0,Host1X Sync Syncpt Base 32_0" group.long 0x684++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_33_0,Host1X Sync Syncpt Base 33_0" group.long 0x688++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_34_0,Host1X Sync Syncpt Base 34_0" group.long 0x68C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_35_0,Host1X Sync Syncpt Base 35_0" group.long 0x690++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_36_0,Host1X Sync Syncpt Base 36_0" group.long 0x694++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_37_0,Host1X Sync Syncpt Base 37_0" group.long 0x698++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_38_0,Host1X Sync Syncpt Base 38_0" group.long 0x69C++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_39_0,Host1X Sync Syncpt Base 39_0" group.long 0x6A0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_40_0,Host1X Sync Syncpt Base 40_0" group.long 0x6A4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_41_0,Host1X Sync Syncpt Base 41_0" group.long 0x6A8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_42_0,Host1X Sync Syncpt Base 42_0" group.long 0x6AC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_43_0,Host1X Sync Syncpt Base 43_0" group.long 0x6B0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_44_0,Host1X Sync Syncpt Base 44_0" group.long 0x6B4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_45_0,Host1X Sync Syncpt Base 45_0" group.long 0x6B8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_46_0,Host1X Sync Syncpt Base 46_0" group.long 0x6BC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_47_0,Host1X Sync Syncpt Base 47_0" group.long 0x6C0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_48_0,Host1X Sync Syncpt Base 48_0" group.long 0x6C4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_49_0,Host1X Sync Syncpt Base 49_0" group.long 0x6C8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_50_0,Host1X Sync Syncpt Base 50_0" group.long 0x6CC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_51_0,Host1X Sync Syncpt Base 51_0" group.long 0x6D0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_52_0,Host1X Sync Syncpt Base 52_0" group.long 0x6D4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_53_0,Host1X Sync Syncpt Base 53_0" group.long 0x6D8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_54_0,Host1X Sync Syncpt Base 54_0" group.long 0x6DC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_55_0,Host1X Sync Syncpt Base 55_0" group.long 0x6E0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_56_0,Host1X Sync Syncpt Base 56_0" group.long 0x6E4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_57_0,Host1X Sync Syncpt Base 57_0" group.long 0x6E8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_58_0,Host1X Sync Syncpt Base 58_0" group.long 0x6EC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_59_0,Host1X Sync Syncpt Base 59_0" group.long 0x6F0++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_60_0,Host1X Sync Syncpt Base 60_0" group.long 0x6F4++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_61_0,Host1X Sync Syncpt Base 61_0" group.long 0x6F8++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_62_0,Host1X Sync Syncpt Base 62_0" group.long 0x6FC++0x03 line.long 0x00 "SYNC_SYNCPT_BASE_63_0,Host1X Sync Syncpt Base 63_0" tree.end tree.end width 0xB tree.end tree.end tree "Video Image Compositor" base ad:0x54340000 width 19. group.long 0x00++0x03 "THI (Tegra Host Interface) Registers" line.long 0x00 "INCR_SYNCPT,INCR_SYNCPT" hexmask.long.byte 0x00 8.--15. 1. " NV_PVIC_THI_INCR_SYNCPT_COND ,NV_PVIC_THI_INCR_SYNCPT_COND" hexmask.long.byte 0x00 0.--7. 1. " NV_PVIC_THI_INCR_SYNCPT_INDX ,NV_PVIC_THI_INCR_SYNCPT_INDX" group.long 0x08++0x07 line.long 0x00 "INCR_SYNCPT_ERR,INCR_SYNCPT_ERR" eventfld.long 0x00 1. " NV_PVIC_THI_INCR_SYNCPT_ERR_COND_STS_OPDONE ,NV_PVIC_THI_INCR_SYNCPT_ERR_COND_STS_OPDONE" "Init,Cleared" eventfld.long 0x00 0. " NV_PVIC_THI_INCR_SYNCPT_ERR_COND_STS_IMM ,NV_PVIC_THI_INCR_SYNCPT_ERR_COND_STS_IMM" "Init,Cleared" line.long 0x04 "CTXSW_INCR_SYNCPT,CTXSW_INCR_SYNCPT" hexmask.long.byte 0x04 0.--7. 1. " NV_PVIC_THI_CTXSW_INCR_SYNCPT_INDX ,NV_PVIC_THI_CTXSW_INCR_SYNCPT_INDX" group.long 0x20++0x03 line.long 0x00 "CTXSW,CTXSW" bitfld.long 0x00 28.--31. " NV_PVIC_THI_CTXSW_NEXT_CHANNEL ,NV_PVIC_THI_CTXSW_NEXT_CHANNEL" "Next channel init,..." hexmask.long.word 0x00 16.--25. 1. " NV_PVIC_THI_CTXSW_NEXT_CLASS ,NV_PVIC_THI_CTXSW_NEXT_CLASS" textline " " bitfld.long 0x00 12.--15. " NV_PVIC_THI_CTXSW_CURR_CHANNEL ,NV_PVIC_THI_CTXSW_CURR_CHANNEL " ",,,,,,,,,,,,,,,Current channel init" rbitfld.long 0x00 11. " NV_PVIC_THI_CTXSW_AUTO_ACK ,NV_PVIC_THI_CTXSW_AUTO_ACK" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--9. 1. " NV_PVIC_THI_CTXSW_CURR_CLASS ,NV_PVIC_THI_CTXSW_CURR_CLASS" group.long 0x28++0x03 line.long 0x00 "CONT_SYNCPT_EOF,CONT_SYNCPT_EOF" bitfld.long 0x00 8. " NV_PVIC_THI_CONT_SYNCPT_EOF_COND ,NV_PVIC_THI_CONT_SYNCPT_EOF_COND" "Enabled,Disabled" hexmask.long.byte 0x00 0.--7. 1. " NV_PVIC_THI_CONT_SYNCPT_EOF_INDEX ,NV_PVIC_THI_CONT_SYNCPT_EOF_INDEX" group.long 0x40++0x07 line.long 0x00 "METHOD0,METHOD0 - Offset" hexmask.long.word 0x00 0.--11. 1. " NV_PVIC_THI_METHOD0_OFFSET ,NV_PVIC_THI_METHOD0_OFFSET " line.long 0x04 "METHOD1,METHOD1 - Data" group.long 0x78++0x07 line.long 0x00 "INT_STATUS,INT_STATUS" eventfld.long 0x00 0. " NV_PVIC_THI_INT_STATUS_FALCON_INT ,NV_PVIC_THI_INT_STATUS_FALCON_INT" "Init,Cleared" line.long 0x04 "INT_MASK,INT_MASK" bitfld.long 0x04 0. " NV_PVIC_THI_INT_MASK_FALCON_INT ,NV_PVIC_THI_INT_MASK_FALCON_INT" "Cleared,Init" width 13. group.long 0x1048++0x03 "HOSTIF Miscellaneous Registers" line.long 0x00 "ITFEN,ITFEN" bitfld.long 0x00 2. " NV_PVIC_FALCON_ITFEN_PRIV_POSTWR ,Indicates whether to use a post write on the main priv interface" "No,Yes" bitfld.long 0x00 1. " NV_PVIC_FALCON_ITFEN_MTHDEN ,Method interface enable" "Disabled,Enabled" bitfld.long 0x00 0. " NV_PVIC_FALCON_ITFEN_CTXEN ,Context switch interface enable" "Disabled,Enabled" group.long 0x1100++0x07 "Falcon UCTL Registers" line.long 0x00 "CPUCTL,CPUCTL" rbitfld.long 0x00 5. " NV_PVIC_FALCON_CPUCTL_STOPPED ,CPU is currently in the stopped state" "Not stopped,Stopped" rbitfld.long 0x00 4. " NV_PVIC_FALCON_CPUCTL_HALTED ,CPU is currently in the halted state" "Not stopped,Stopped" textline " " eventfld.long 0x00 3. " NV_PVIC_FALCON_CPUCTL_HRESET ,Hard reset" "No reset,Reset" eventfld.long 0x00 2. " NV_PVIC_FALCON_CPUCTL_SRESET ,Soft reset" "No reset,Reset" textline " " eventfld.long 0x00 1. " NV_PVIC_FALCON_CPUCTL_STARTCPU ,Set STARTCPU to TRUE to start CPU execution while in a HALTED state" "False,True" eventfld.long 0x00 0. " NV_PVIC_FALCON_CPUCTL_IINVAL ,Set to TRUE to mark all blocks in IMEM except block 0 as INVALID" "False,True" line.long 0x04 "BOOTVEC,BOOTVEC" group.long 0x110C++0x13 "Falcon DMA Registers" line.long 0x00 "DMACTL,DMACTL" rbitfld.long 0x00 3.--6. " NV_PVIC_FALCON_DMACTL_DMAQ_NUM ,Valid request number at DMA request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " NV_PVIC_FALCON_DMACTL_REQUIRE_CTX ,Valid context loaded before any DMA request" "Not loaded,Loaded" line.long 0x04 "DMATRFBASE,DMATRFBASE" line.long 0x08 "DMATRFMOFFS,IMEM/DMEM Offset for the transfer" hexmask.long.word 0x08 0.--15. 1. " NV_PVIC_FALCON_DMATRFMOFFS_OFFS ,IMEM/DMEM Offset for the transfer" line.long 0x0C "DMATRFCMD,DMATRFCMD" bitfld.long 0x0C 12.--14. " NV_PVIC_FALCON_DMATRFCMD_CTXDMA ,NV_PVIC_FALCON_DMATRFCMD_CTXDMA" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 8.--10. " NV_PVIC_FALCON_DMATRFCMD_SIZE ,NV_PVIC_FALCON_DMATRFCMD_SIZE" "4B,8B,16B,32B,64B,128B,256B,?..." textline " " bitfld.long 0x0C 5. " NV_PVIC_FALCON_DMATRFCMD_WRITE , NV_PVIC_FALCON_DMATRFCMD_WRITE" "False,True" bitfld.long 0x0C 4. " NV_PVIC_FALCON_DMATRFCMD_IMEM , NV_PVIC_FALCON_DMATRFCMD_IMEM" "False,True" textline " " rbitfld.long 0x0C 1. " NV_PVIC_FALCON_DMATRFCMD_IDLE ,DMA engine is still busy with a transfer" "Idle,Busy" rbitfld.long 0x0C 0. " NV_PVIC_FALCON_DMATRFCMD_FULL ,DMA request queue is full" "Not full,Full" line.long 0x10 "DMATRFFBOFFS,Frame buffer offset for the transfer" width 0x0B tree.end tree "CPU Complex" base ad:0x50060000 width 18. group.long 0x00++0x03 line.long 0x00 "MSELECT_CONFIG_0,MSELECT_CONFIG Register" bitfld.long 0x00 30. " WRAP_TO_INCR_SLAVE3 ,Wrap to INCR Slave 3" "Disabled,Enabled" bitfld.long 0x00 29. " WRAP_TO_INCR_SLAVE2(GPU) ,Wrap to INCR Slave 2 (GPU)" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " WRAP_TO_INCR_SLAVE1(PCIe) ,Wrap to INCR Slave 1 (PCIe)" "Disabled,Enabled" bitfld.long 0x00 27. " WRAP_TO_INCR_SLAVE0(APC) ,Wrap to INCR Slave 0 (APC)" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " UNSUPP_SIZE_ERR_EN ,Unsupported size error enabled" "Disabled,Enabled" bitfld.long 0x00 25. " ERR_RESP_EN_SLAVE2(GPU) ,Error response enable Slave 2 (GPU)" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ERR_RESP_EN_SLAVE1(PCIe) ,Error response enable Slave 1 (PCIe)" "Disabled,Enabled" bitfld.long 0x00 23. " WRITE_TIMEOUT_EN_SLAVE3 ,Write timeout enable Slave 3" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " READ_TIMEOUT_EN_SLAVE3 ,Read timeout enable Slave 3" "Disabled,Enabled" bitfld.long 0x00 21. " WRITE_TIMEOUT_EN_SLAVE2(GPU) ,Write timeout enable Slave 2 (GPU)" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " READ_TIMEOUT_EN_SLAVE2(GPU) ,Read timeout enable Slave 2 (GPU)" "Disabled,Enabled" bitfld.long 0x00 19. " WRITE_TIMEOUT_EN_SLAVE1(PCIe) ,Write timeout enable Slave 1 (PCIe)" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " READ_TIMEOUT_EN_SLAVE1(PCIe) ,Read timeout enable Slave 1 (PCIe)" "Disabled,Enabled" bitfld.long 0x00 17. " WRITE_TIMEOUT_EN_SLAVE0(APC) ,Write timeout enable Slave 0 (APC)" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " READ_TIMEOUT_EN_SLAVE0(APC) ,Read timeout enable Slave 0 (APC)" "Disabled,Enabled" bitfld.long 0x00 15. " SAFE_MODE_MASTER1 ,Safe mode Master 1" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " ENABLE_GPU_APERTURE ,Enable GPU aperture" "Disabled,Enabled" bitfld.long 0x00 13. " ENABLE_APB_APERTURE ,Enable APB aperture" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ENABLE_PCIE_APERTURE ,Enable PCIE aperture" "Disabled,Enabled" bitfld.long 0x00 0. " SAFE_MODE_MASTER0 ,Safe mode Master 0" "Disabled,Enabled" width 0x0B tree.end tree "Flow Controller" base ad:0x60007000 width 25. group.long 0x00++0x03 line.long 0x00 "HALT_CPU0_EVENTS_0,Halt CPU0 Events Register" bitfld.long 0x00 29.--31. " MODE ,Flow Mode" "FLOW_MODE_NONE,FLOW_MODE_RUN_AND_INT,FLOW_MODE_WAITEVENT,FLOW_MODE_WAITEVENT_AND_INT,FLOW_MODE_STOP_UNTIL_IRQ,FLOW_MODE_STOP_UNTIL_IRQ_AND_INT,FLOW_MODE_STOP_UNTIL_EVENT_AND_IRQ,?..." bitfld.long 0x00 28. " JTAG ,Resume on JTAG activity" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " SCLK ,Resume on Nth SYSCLK cycle ticks" "Disabled,Enabled" bitfld.long 0x00 26. " X32K ,Resume on Nth X32K clock input ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " uSEC ,Resume on Nth uSEC clock ticks" "Disabled,Enabled" bitfld.long 0x00 24. " mSEC ,Resume on Nth mSEC clock ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SEC ,Resume on Nth second RTC clock ticks" "Disabled,Enabled" bitfld.long 0x00 22. " X_RDY ,Resume on Nth XIO.RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SMP31 ,Resume on Nth SMP.31 semaphore set events" "Disabled,Enabled" bitfld.long 0x00 20. " SMP30 ,Resume on Nth SMP.30 semaphore set events" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XRQ_D ,Resume on Nth XRQ.D external trigger events" "Disabled,Enabled" bitfld.long 0x00 18. " XRQ_C ,Resume on Nth XRQ.C external trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " XRQ_B ,Resume on Nth XRQ.B external trigger events" "Disabled,Enabled" bitfld.long 0x00 16. " XRQ_A ,Resume on Nth XRQ.A external trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " OBE ,Resume OBE" "Disabled,Enabled" bitfld.long 0x00 14. " OBF ,Resume OBF" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " IBE ,Resume IBE" "Disabled,Enabled" bitfld.long 0x00 12. " IBF ,Resume IBF" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LIC_IRQ ,Resume on LIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 10. " LIC_FIQ ,Resume on LIC_FIQ" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " GIC_IRQ ,Resume on GIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 8. " GIC_FIQ ,Resume on GIC_FIQ" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--7. 1. " ZERO ,Initialized then decremented" group.long 0x14++0x03 line.long 0x00 "HALT_CPU1_EVENTS_0,Halt CPU1 Events Register" bitfld.long 0x00 29.--31. " MODE ,Flow Mode" "FLOW_MODE_NONE,FLOW_MODE_RUN_AND_INT,FLOW_MODE_WAITEVENT,FLOW_MODE_WAITEVENT_AND_INT,FLOW_MODE_STOP_UNTIL_IRQ,FLOW_MODE_STOP_UNTIL_IRQ_AND_INT,FLOW_MODE_STOP_UNTIL_EVENT_AND_IRQ,?..." bitfld.long 0x00 28. " JTAG ,Resume on JTAG activity" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " SCLK ,Resume on Nth SYSCLK cycle ticks" "Disabled,Enabled" bitfld.long 0x00 26. " X32K ,Resume on Nth X32K clock input ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " uSEC ,Resume on Nth uSEC clock ticks" "Disabled,Enabled" bitfld.long 0x00 24. " mSEC ,Resume on Nth mSEC clock ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SEC ,Resume on Nth second RTC clock ticks" "Disabled,Enabled" bitfld.long 0x00 22. " X_RDY ,Resume on Nth XIO.RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SMP31 ,Resume on Nth SMP.31 semaphore set events" "Disabled,Enabled" bitfld.long 0x00 20. " SMP30 ,Resume on Nth SMP.30 semaphore set events" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XRQ_D ,Resume on Nth XRQ.D external trigger events" "Disabled,Enabled" bitfld.long 0x00 18. " XRQ_C ,Resume on Nth XRQ.C external trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " XRQ_B ,Resume on Nth XRQ.B external trigger events" "Disabled,Enabled" bitfld.long 0x00 16. " XRQ_A ,Resume on Nth XRQ.A external trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " OBE ,Resume OBE" "Disabled,Enabled" bitfld.long 0x00 14. " OBF ,Resume OBF" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " IBE ,Resume IBE" "Disabled,Enabled" bitfld.long 0x00 12. " IBF ,Resume IBF" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LIC_IRQ ,Resume on LIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 10. " LIC_FIQ ,Resume on LIC_FIQ" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " GIC_IRQ ,Resume on GIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 8. " GIC_FIQ ,Resume on GIC_FIQ" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--7. 1. " ZERO ,Initialized then decremented" group.long 0x1C++0x03 line.long 0x00 "HALT_CPU2_EVENTS_0,Halt CPU2 Events Register" bitfld.long 0x00 29.--31. " MODE ,Flow Mode" "FLOW_MODE_NONE,FLOW_MODE_RUN_AND_INT,FLOW_MODE_WAITEVENT,FLOW_MODE_WAITEVENT_AND_INT,FLOW_MODE_STOP_UNTIL_IRQ,FLOW_MODE_STOP_UNTIL_IRQ_AND_INT,FLOW_MODE_STOP_UNTIL_EVENT_AND_IRQ,?..." bitfld.long 0x00 28. " JTAG ,Resume on JTAG activity" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " SCLK ,Resume on Nth SYSCLK cycle ticks" "Disabled,Enabled" bitfld.long 0x00 26. " X32K ,Resume on Nth X32K clock input ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " uSEC ,Resume on Nth uSEC clock ticks" "Disabled,Enabled" bitfld.long 0x00 24. " mSEC ,Resume on Nth mSEC clock ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SEC ,Resume on Nth second RTC clock ticks" "Disabled,Enabled" bitfld.long 0x00 22. " X_RDY ,Resume on Nth XIO.RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SMP31 ,Resume on Nth SMP.31 semaphore set events" "Disabled,Enabled" bitfld.long 0x00 20. " SMP30 ,Resume on Nth SMP.30 semaphore set events" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XRQ_D ,Resume on Nth XRQ.D external trigger events" "Disabled,Enabled" bitfld.long 0x00 18. " XRQ_C ,Resume on Nth XRQ.C external trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " XRQ_B ,Resume on Nth XRQ.B external trigger events" "Disabled,Enabled" bitfld.long 0x00 16. " XRQ_A ,Resume on Nth XRQ.A external trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " OBE ,Resume OBE" "Disabled,Enabled" bitfld.long 0x00 14. " OBF ,Resume OBF" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " IBE ,Resume IBE" "Disabled,Enabled" bitfld.long 0x00 12. " IBF ,Resume IBF" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LIC_IRQ ,Resume on LIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 10. " LIC_FIQ ,Resume on LIC_FIQ" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " GIC_IRQ ,Resume on GIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 8. " GIC_FIQ ,Resume on GIC_FIQ" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--7. 1. " ZERO ,Initialized then decremented" group.long 0x24++0x03 line.long 0x00 "HALT_CPU3_EVENTS_0,Halt CPU3 Events Register" bitfld.long 0x00 29.--31. " MODE ,Flow Mode" "FLOW_MODE_NONE,FLOW_MODE_RUN_AND_INT,FLOW_MODE_WAITEVENT,FLOW_MODE_WAITEVENT_AND_INT,FLOW_MODE_STOP_UNTIL_IRQ,FLOW_MODE_STOP_UNTIL_IRQ_AND_INT,FLOW_MODE_STOP_UNTIL_EVENT_AND_IRQ,?..." bitfld.long 0x00 28. " JTAG ,Resume on JTAG activity" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " SCLK ,Resume on Nth SYSCLK cycle ticks" "Disabled,Enabled" bitfld.long 0x00 26. " X32K ,Resume on Nth X32K clock input ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " uSEC ,Resume on Nth uSEC clock ticks" "Disabled,Enabled" bitfld.long 0x00 24. " mSEC ,Resume on Nth mSEC clock ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SEC ,Resume on Nth second RTC clock ticks" "Disabled,Enabled" bitfld.long 0x00 22. " X_RDY ,Resume on Nth XIO.RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SMP31 ,Resume on Nth SMP.31 semaphore set events" "Disabled,Enabled" bitfld.long 0x00 20. " SMP30 ,Resume on Nth SMP.30 semaphore set events" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XRQ_D ,Resume on Nth XRQ.D external trigger events" "Disabled,Enabled" bitfld.long 0x00 18. " XRQ_C ,Resume on Nth XRQ.C external trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " XRQ_B ,Resume on Nth XRQ.B external trigger events" "Disabled,Enabled" bitfld.long 0x00 16. " XRQ_A ,Resume on Nth XRQ.A external trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " OBE ,Resume OBE" "Disabled,Enabled" bitfld.long 0x00 14. " OBF ,Resume OBF" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " IBE ,Resume IBE" "Disabled,Enabled" bitfld.long 0x00 12. " IBF ,Resume IBF" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LIC_IRQ ,Resume on LIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 10. " LIC_FIQ ,Resume on LIC_FIQ" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " GIC_IRQ ,Resume on GIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 8. " GIC_FIQ ,Resume on GIC_FIQ" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--7. 1. " ZERO ,Initialized then decremented" group.long 0x04++0x03 line.long 0x00 "HALT_COP_EVENTS_0,Halt COP Events Register" bitfld.long 0x00 29.--31. " MODE ,Flow Mode" "FLOW_MODE_NONE,FLOW_MODE_RUN_AND_INT,FLOW_MODE_WAITEVENT,FLOW_MODE_WAITEVENT_AND_INT,FLOW_MODE_STOP_UNTIL_IRQ,FLOW_MODE_STOP_UNTIL_IRQ_AND_INT,FLOW_MODE_STOP_UNTIL_EVENT_AND_IRQ,?..." bitfld.long 0x00 28. " JTAG ,Resume on JTAG activity" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " SCLK ,Resume on Nth SYSCLK cycle ticks" "Disabled,Enabled" bitfld.long 0x00 26. " X32K ,Resume on Nth X32K clock input ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " uSEC ,Resume on Nth uSEC clock ticks" "Disabled,Enabled" bitfld.long 0x00 24. " MSEC ,Resume on Nth mSEC clock ticks" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SEC ,Resume on Nth second RTC clock ticks" "Disabled,Enabled" bitfld.long 0x00 22. " X_RDY ,Resume on Nth XIO.RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SMP31 ,Semaphore set events" "Disabled,Enabled" bitfld.long 0x00 20. " SMP30 ,Semaphore set events" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XRQ_D ,External Trigger events" "Disabled,Enabled" bitfld.long 0x00 18. " XRQ_C ,External Trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " XRQ_B ,External Trigger events" "Disabled,Enabled" bitfld.long 0x00 16. " XRQ_A ,External Trigger events" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " OBE ,Resume OBE" "Disabled,Enabled" bitfld.long 0x00 14. " OBF ,Resume OBF" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " IBE ,Resume IBE" "Disabled,Enabled" bitfld.long 0x00 12. " IBF ,Resume IBF" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LIC_IRQ ,Resume on LIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 10. " LIC_FIQ ,Resume on LIC_FIQ" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " GIC_IRQ ,Resume on GIC_IRQ" "Disabled,Enabled" bitfld.long 0x00 8. " GIC_FIQ ,Resume on GIC_FIQ" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 0.--7. 1. " ZERO ,Initialized then decremented" group.long 0x08++0x03 line.long 0x00 "CPU0_CSR_0 ,CPU0 Control/Status Register" rbitfld.long 0x00 24.--27. " PWR_STATE ,Current state of the PowerGate State Machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 23. " WAIT_EVENT ,CPU is waiting" "Disabled,Enabled" textline " " rbitfld.long 0x00 22. " HALT ,CPU is halted" "Disabled,Enabled" rbitfld.long 0x00 21. " P2F_ACK ,Pmc2flow_ack signal" "Disabled,Enabled" textline " " rbitfld.long 0x00 20. " F2P_PWRUP ,Flow2pmc_pwrup" "Disabled,Enabled" rbitfld.long 0x00 19. " F2P_REQ ,Flow2pmc_req valid" "Disabled,Enabled" textline " " rbitfld.long 0x00 17. " F2C_MPCORE_RST ,Requesting reset of MPCore" "Disabled,Enabled" eventfld.long 0x00 15. " INTR_FLAG ,TRUE when Interrupt is Active" "Disabled,Enabled" textline " " eventfld.long 0x00 14. " EVENT_FLAG ,TRUE when Event is Active" "Disabled,Enabled" bitfld.long 0x00 12.--13. " ENABLE_EXT ,Specifies what to power off" "Power Gate CPU,Power Gate CPU/non-CPU,,PG Emulation" textline " " bitfld.long 0x00 8.--11. " WAIT_WFI_BITMAP ,All cores indicated in bitmap must be in STANDBY_WFI before switching Cluster" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " IMMEDIATE_WAKE ,CPU is powered up immediately" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SWITCH_CLUSTER ,The active cluster will be switched when all indicated CPU reach STANDBY_WFI" "0,1" bitfld.long 0x00 1. " EVENT_ENABLE ,Generates an event when the flow controller exits the halted state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE ,Halt or Event-wait causes CPU power-gating" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "CPU1_CSR_0 ,CPU1 Control/Status Register" rbitfld.long 0x00 24.--27. " PWR_STATE ,Current state of the PowerGate State Machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 23. " WAIT_EVENT ,CPU is waiting" "Disabled,Enabled" textline " " rbitfld.long 0x00 22. " HALT ,CPU is halted" "Disabled,Enabled" rbitfld.long 0x00 21. " P2F_ACK ,Pmc2flow_ack signal" "Disabled,Enabled" textline " " rbitfld.long 0x00 20. " F2P_PWRUP ,Flow2pmc_pwrup" "Disabled,Enabled" rbitfld.long 0x00 19. " F2P_REQ ,Flow2pmc_req valid" "Disabled,Enabled" textline " " rbitfld.long 0x00 17. " F2C_MPCORE_RST ,Requesting reset of MPCore" "Disabled,Enabled" eventfld.long 0x00 15. " INTR_FLAG ,TRUE when Interrupt is Active" "Disabled,Enabled" textline " " eventfld.long 0x00 14. " EVENT_FLAG ,TRUE when Event is Active" "Disabled,Enabled" bitfld.long 0x00 12.--13. " ENABLE_EXT ,Specifies what to power off" "Power Gate CPU,Power Gate CPU/non-CPU,,PG Emulation" textline " " bitfld.long 0x00 8.--11. " WAIT_WFI_BITMAP ,All cores indicated in bitmap must be in STANDBY_WFI before switching Cluster" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " IMMEDIATE_WAKE ,CPU is powered up immediately" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SWITCH_CLUSTER ,The active cluster will be switched when all indicated CPU reach STANDBY_WFI" "0,1" bitfld.long 0x00 1. " EVENT_ENABLE ,Generates an event when the flow controller exits the halted state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE ,Halt or Event-wait causes CPU power-gating" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "CPU2_CSR_0 ,CPU2 Control/Status Register" rbitfld.long 0x00 24.--27. " PWR_STATE ,Current state of the PowerGate State Machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 23. " WAIT_EVENT ,CPU is waiting" "Disabled,Enabled" textline " " rbitfld.long 0x00 22. " HALT ,CPU is halted" "Disabled,Enabled" rbitfld.long 0x00 21. " P2F_ACK ,Pmc2flow_ack signal" "Disabled,Enabled" textline " " rbitfld.long 0x00 20. " F2P_PWRUP ,Flow2pmc_pwrup" "Disabled,Enabled" rbitfld.long 0x00 19. " F2P_REQ ,Flow2pmc_req valid" "Disabled,Enabled" textline " " rbitfld.long 0x00 17. " F2C_MPCORE_RST ,Requesting reset of MPCore" "Disabled,Enabled" eventfld.long 0x00 15. " INTR_FLAG ,TRUE when Interrupt is Active" "Disabled,Enabled" textline " " eventfld.long 0x00 14. " EVENT_FLAG ,TRUE when Event is Active" "Disabled,Enabled" bitfld.long 0x00 12.--13. " ENABLE_EXT ,Specifies what to power off" "Power Gate CPU,Power Gate CPU/non-CPU,,PG Emulation" textline " " bitfld.long 0x00 8.--11. " WAIT_WFI_BITMAP ,All cores indicated in bitmap must be in STANDBY_WFI before switching Cluster" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " IMMEDIATE_WAKE ,CPU is powered up immediately" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SWITCH_CLUSTER ,The active cluster will be switched when all indicated CPU reach STANDBY_WFI" "0,1" bitfld.long 0x00 1. " EVENT_ENABLE ,Generates an event when the flow controller exits the halted state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE ,Halt or Event-wait causes CPU power-gating" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "CPU3_CSR_0 ,CPU3 Control/Status Register" rbitfld.long 0x00 24.--27. " PWR_STATE ,Current state of the PowerGate State Machine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 23. " WAIT_EVENT ,CPU is waiting" "Disabled,Enabled" textline " " rbitfld.long 0x00 22. " HALT ,CPU is halted" "Disabled,Enabled" rbitfld.long 0x00 21. " P2F_ACK ,Pmc2flow_ack signal" "Disabled,Enabled" textline " " rbitfld.long 0x00 20. " F2P_PWRUP ,Flow2pmc_pwrup" "Disabled,Enabled" rbitfld.long 0x00 19. " F2P_REQ ,Flow2pmc_req valid" "Disabled,Enabled" textline " " rbitfld.long 0x00 17. " F2C_MPCORE_RST ,Requesting reset of MPCore" "Disabled,Enabled" eventfld.long 0x00 15. " INTR_FLAG ,TRUE when Interrupt is Active" "Disabled,Enabled" textline " " eventfld.long 0x00 14. " EVENT_FLAG ,TRUE when Event is Active" "Disabled,Enabled" bitfld.long 0x00 12.--13. " ENABLE_EXT ,Specifies what to power off" "Power Gate CPU,Power Gate CPU/non-CPU,,PG Emulation" textline " " bitfld.long 0x00 8.--11. " WAIT_WFI_BITMAP ,All cores indicated in bitmap must be in STANDBY_WFI before switching Cluster" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " IMMEDIATE_WAKE ,CPU is powered up immediately" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SWITCH_CLUSTER ,The active cluster will be switched when all indicated CPU reach STANDBY_WFI" "0,1" bitfld.long 0x00 1. " EVENT_ENABLE ,Generates an event when the flow controller exits the halted state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE ,Halt or Event-wait causes CPU power-gating" "Disabled,Enabled" group.long 0x0C++0x03 line.long 0x00 "COP_CSR_0,COP Control/Status for Interrupts Register" eventfld.long 0x00 15. " INTR_FLAG ,Interrupt flag" "No interrupt,Interrupt" group.long 0x10++0x03 line.long 0x00 "XRQ_EVENTS_0,XRQ Event Detect Selector Register" bitfld.long 0x00 31. " XRQ_D7 ,XRQ_D7" "Disabled,Enabled" bitfld.long 0x00 30. " XRQ_D6 ,XRQ_D6" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " XRQ_D5 ,XRQ_D5" "Disabled,Enabled" bitfld.long 0x00 28. " XRQ_D4 ,XRQ_D4" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " XRQ_D3 ,XRQ_D3" "Disabled,Enabled" bitfld.long 0x00 26. " XRQ_D2 ,XRQ_D2" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " XRQ_D1 ,XRQ_D1" "Disabled,Enabled" bitfld.long 0x00 24. " XRQ_D0 ,XRQ_D0" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " XRQ_C7 ,XRQ_C7" "Disabled,Enabled" bitfld.long 0x00 22. " XRQ_C6 ,XRQ_C6" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " XRQ_C5 ,XRQ_C5" "Disabled,Enabled" bitfld.long 0x00 20. " XRQ_C4 ,XRQ_C4" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XRQ_C3 ,XRQ_C3" "Disabled,Enabled" bitfld.long 0x00 18. " XRQ_C2 ,XRQ_C2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " XRQ_C1 ,XRQ_C1" "Disabled,Enabled" bitfld.long 0x00 16. " XRQ_C0 ,XRQ_C0" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " XRQ_B7 ,XRQ_B7" "Disabled,Enabled" bitfld.long 0x00 14. " XRQ_B6 ,XRQ_B6" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " XRQ_B5 ,XRQ_B5" "Disabled,Enabled" bitfld.long 0x00 12. " XRQ_B4 ,XRQ_B4" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " XRQ_B3 ,XRQ_B3" "Disabled,Enabled" bitfld.long 0x00 10. " XRQ_B2 ,XRQ_B2" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " XRQ_B1 ,XRQ_B1" "Disabled,Enabled" bitfld.long 0x00 8. " XRQ_B0 ,XRQ_B0" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " XRQ_A7 ,XRQ_A7" "Disabled,Enabled" bitfld.long 0x00 6. " XRQ_A6 ,XRQ_A6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " XRQ_A5 ,XRQ_A5" "Disabled,Enabled" bitfld.long 0x00 4. " XRQ_A4 ,XRQ_A4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " XRQ_A3 ,XRQ_A3" "Disabled,Enabled" bitfld.long 0x00 2. " XRQ_A2 ,XRQ_A2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " XRQ_A1 ,XRQ_A1" "Disabled,Enabled" bitfld.long 0x00 0. " XRQ_A0 ,XRQ_A0" "Disabled,Enabled" hgroup.long 0x2C++0x03 hide.long 0x00 "CLUSTER_CONTROL_0,Cluster Control Register" group.long 0x38++0x0F line.long 0x00 "CPU_PWR_CSR_0,CPU PWR Control/Status Register" bitfld.long 0x00 15. " DBG_STS_EN ,DBG_STS_EN" "Disabled,Enabled" bitfld.long 0x00 13.--14. " DBG_C1NC_STS ,DBG_C1NC_STS" "0,1,2,3" textline " " bitfld.long 0x00 11.--12. " DBG_C0NC_STS ,DBG_C0NC_STS" "0,1,2,3" bitfld.long 0x00 9.--10. " DBG_RAIL_STS ,DBG_RAIL_STS" "0,1,2,3" textline " " bitfld.long 0x00 8. " CPU_RG_CFG ,Flow controller would initiate last CPU PG with CPU RG or non-CPU PG" "Disabled,Enabled" bitfld.long 0x00 6.--7. " C1NC_STS ,C1NC Status" "Partition_off,PG_in_progress,PU_in_progress,Partition_on" textline " " bitfld.long 0x00 4.--5. " C0NC_STS ,C0NC Status" "Partition_off,PG_in_progress,PU_in_progress,Partition_on" bitfld.long 0x00 3. " USE_FLOW_STS ,Use flow status" "0,1" textline " " bitfld.long 0x00 1.--2. " RAIL_STS ,Hardware updates this register based on the current status of the CPU-rail" "Rail_off,RG_in_progress,RU_in_progress,Rail_on" bitfld.long 0x00 0. " RAIL_ENABLE ,CPU rail power on request" "Disabled,Enabled" line.long 0x04 "MPID_0,MPID Register" bitfld.long 0x04 0.--1. " CPU_ID ,This ID is provided to MPCore_LP which is what is read when the OS reads MPIDR" "0,1,2,3" line.long 0x08 "RAM_REPAIR_0,RAM_REPAIR Register" hexmask.long.byte 0x08 16.--23. 1. " DBG_STS ,Repair done from repair logic" hexmask.long.byte 0x08 8.--15. 1. " DBG_REQ ,Repair request for individual segments" textline " " bitfld.long 0x08 3. " DBG_EN ,Debug enable to be able to repair of individual segments of the cluster0 repair chain" "Disabled,Enabled" bitfld.long 0x08 2. " BYPASS_EN ,RAM repair bypass enable" "Disabled,Enabled" textline " " rbitfld.long 0x08 1. " STS ,Indicates Cluster repair chain status" "0,1" bitfld.long 0x08 0. " REQ ,Cluster0 RAM repair request" "Disabled,Enabled" line.long 0x0C "FLOW_DBG_SEL_0 ,FLOW_DBG_SEL Register" rbitfld.long 0x0C 18.--19. " RG_PWR_STATE ,Current state of Rail Gate state machine" "0,1,2,3" rbitfld.long 0x0C 16.--17. " RU_PWR_STATE ,Current state of Rail Ungate state machine" "0,1,2,3" textline " " rbitfld.long 0x0C 14.--15. " NC_PG_PWR_STATE ,Current state of Non CPU Power Gate state machine" "0,1,2,3" rbitfld.long 0x0C 12.--13. " NC_PU_PWR_STATE ,Current state of Non CPU Power Ungate state machine" "0,1,2,3" textline " " bitfld.long 0x0C 8.--11. " CNT1_SEL ,Activity selection which would be counted by CNT1" "IDLE,CPU0_PG,CPU1_PG,CPU2_PG,CPU3_PG,CPU0123_PG,CPULP_PG,C0NC_PG,C1NC_PG,CRAIL_OFF,C0_TO_C1_SWITCH,C1_TO_C0_SWITCH,HVC_ENTRY,RETENTION_ENTRY,?..." bitfld.long 0x0C 0.--3. " CNT0_SEL ,Activity selection which would be counted by CNT0" "IDLE,CPU0_PG,CPU1_PG,CPU2_PG,CPU3_PG,CPU0123_PG,CPULP_PG,C0NC_PG,C1NC_PG,CRAIL_OFF,C0_TO_C1_SWITCH,C1_TO_C0_SWITCH,HVC_ENTRY,RETENTION_ENTRY,?..." group.long 0x48++0x0F line.long 0x00 "FLOW_DBG_CNT0_0,FLOW_DBG_CNT0 Register" line.long 0x04 "FLOW_DBG_CNT1_0,FLOW_DBG_CNT1 Register" line.long 0x08 "FLOW_DBG_QUAL_0,FLOW_DBG_QUAL Register" bitfld.long 0x08 29. " IRQ2CCPLEX_ENABLE ,Qualifier for legacy IRQ" "Disabled,Enabled" bitfld.long 0x08 28. " FIQ2CCPLEX_ENABLE ,Qualifier for legacy FIQ" "Disabled,Enabled" textline " " bitfld.long 0x08 24.--25. " AXICIF_CG_DIS ,CCPLEX AXICIF/MCCIF clock gating disable" "0,1,2,3" bitfld.long 0x08 16.--20. " PWRUPREQ_QUAL ,CPU DBGPWRUPREQ qualifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 8.--12. " NOPWRDWN_QUAL ,CPU DBGNOPPWRDN qualifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--4. " PWRDNREQ_QUAL ,CPU DBGPWRDNREQ qualifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "FLOW_CTLR_SPARE_0,FLOW_CTLR_SPARE FLOW_DBG_QUAL Register" hexmask.long.word 0x0C 16.--31. 1. " SPARE_HI ,Spare high" hexmask.long.word 0x0C 0.--15. 1. " SPARE_LO ,Spare low" group.long 0x5C++0x0F line.long 0x00 "FC_SEQUENCE_INTERCEPT_0,FC_SEQUENCE_INTERCEPT Register" bitfld.long 0x00 21. " INTERCEPT_HVC_ENABLE ,Generates an interrupt to LIC before starting the HVC sequence and after exiting the HVCsequence" "Disabled,Enabled" bitfld.long 0x00 20. " INTERCEPT_ENTRY_CC4_ENABLE ,Generates an interrupt to LIC after the HVC state has been entered" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " INTERCEPT_ENTRY_PG_NONCPU_ENABLE ,State machine halts at the start of the non-CPU power gating sequence" "Disabled,Enabled" bitfld.long 0x00 18. " INTERCEPT_EXIT_PG_NONCPU_ENABLE ,State machine halts at the start of the non-CPU power ungating sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " INTERCEPT_ENTRY_RG_CPU_ENABLE ,State machine halts at the start of the CPU rail gating sequence" "Disabled,Enabled" bitfld.long 0x00 16. " INTERCEPT_EXIT_RG_CPU_ENABLE ,State machine halts at the start of the CPU rail ungating sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " INTERCEPT_ENTRY_PG_CORE0_ENABLE ,State machine halts at the start of the core0 power state entry sequence" "Disabled,Enabled" bitfld.long 0x00 14. " INTERCEPT_EXIT_PG_CORE0_ENABLE ,State machine halts at the start of the core0 power state exit sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " INTERCEPT_ENTRY_PG_CORE1_ENABLE ,State machine halts at the start of the core1 power state entry sequence" "Disabled,Enabled" bitfld.long 0x00 12. " INTERCEPT_EXIT_PG_CORE1_ENABLE ,State machine halts at the start of the core1 power state exit sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " INTERCEPT_ENTRY_PG_CORE2_ENABLE ,State machine halts at the start of the core2 power state entry sequence" "Disabled,Enabled" bitfld.long 0x00 10. " INTERCEPT_EXIT_PG_CORE2_ENABLE ,State machine halts at the start of the core2 power state exit sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " INTERCEPT_ENTRY_PG_CORE3_ENABLE ,State machine halts at the start of the core3 power state entry sequence" "Disabled,Enabled" bitfld.long 0x00 8. " INTERCEPT_EXIT_PG_CORE3_ENABLE ,State machine halts at the start of the core3 power state exit sequence" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " INTERRUPT_PENDING_NONCPU ,Indication of an FC interrupt pending before starting non CPU power gating/power ungating" "Not pending,Pending" eventfld.long 0x00 6. " INTERRUPT_PENDING_CRAIL ,Indication of an FC interrupt pending before starting CPU rail gating/ungating" "Not pending,Pending" textline " " eventfld.long 0x00 5. " INTERRUPT_PENDING_CORE0 ,Indication of FC interrupt pending from core0" "Not pending,Pending" eventfld.long 0x00 4. " INTERRUPT_PENDING_CORE1 ,Indication of FC interrupt pending from core1" "Not pending,Pending" textline " " eventfld.long 0x00 3. " INTERRUPT_PENDING_CORE2 ,Indication of FC interrupt pending from core2" "Not pending,Pending" eventfld.long 0x00 2. " INTERRUPT_PENDING_CORE3 ,Indication of FC interrupt pending from core3" "Not pending,Pending" textline " " eventfld.long 0x00 1. " CC4_INTERRUPT_PENDING ,Indicates that an interrupt was issued by FC to LIC after HVC state has entered" "Not pending,Pending" eventfld.long 0x00 0. " HVC_INTERRUPT_PENDING ,Indicates that an interrupt was issued by FC to LIC before starting HVC sequence or after exiting HVC sequence" "Not pending,Pending" line.long 0x04 "CC4_HVC_CONTROL_0,CC4_HVC_CONTROL Register" hexmask.long 0x04 3.--31. 1. " HVC_RES_TIME_THRESHOLD ,Time threshold required to enter HVC" rbitfld.long 0x04 1.--2. " CC4_HVC_STS ,Indicates whether HVC entry/exit sequence has started/completed" "CC4_HVC_NOT_ENTERED,CC4_HVC_ENTRY_IN_PROGRESS,CC4_HVC_EXIT_IN_PROGRESS,CC4_HVC_ENTERED" textline " " bitfld.long 0x04 0. " CC4_HVC_ENABLE ,CC4_HVC_ENABLE" "Disabled,Enabled" line.long 0x08 "CC4_RETENTION_CONTROL_0,CC4_RETENTION_CONTROL Register" hexmask.long 0x08 3.--31. 1. " RET_RES_TIME_THRESHOLD ,Threshold required to enter Retention in units of microseconds" bitfld.long 0x08 0. " CC4_RET_ENTERED ,Indicates that CC4 Retention has been entered" "Clear,Set" line.long 0x0C "CC4_FC_STATUS_0,CC4_FC_STATUS Register" bitfld.long 0x0C 2. " CC4_LIC_INTR_EN ,Allows LIC interrupts to act as retention wake events" "Disabled,Enabled" bitfld.long 0x0C 1. " CC4_WAKE_MASK ,Prevents the FC from processing wake up events" "Disabled,Enabled" textline " " rbitfld.long 0x0C 0. " INT_STATUS ,Indicates that an interrupt to FC is pending in HVC" "Pending,Not pending" group.long 0x6C++0x03 line.long 0x00 "CC4_CORE0_CTRL_0 ,CC4_CORE0_CTRL Register" hexmask.long 0x00 3.--31. 1. " CORE_IDLE_TIMER ,Register initializes a countdown timer that is used to determine whether to enter HVC or Retention" bitfld.long 0x00 2. " TIMER_COUNTDOWN_VALID ,Core is allowed to participate in the decision to enter CC3 HVC4 or CC4 Retention" "True,False" textline " " bitfld.long 0x00 1. " CORE_RET_ENABLE ,Core cluster does enter Retention and the BPMP-Lite is interrupted" "False,True" bitfld.long 0x00 0. " CORE_HVC_ENABLE ,Core cluster does enter HVC" "False,True" group.long 0x70++0x03 line.long 0x00 "CC4_CORE1_CTRL_0 ,CC4_CORE1_CTRL Register" hexmask.long 0x00 3.--31. 1. " CORE_IDLE_TIMER ,Register initializes a countdown timer that is used to determine whether to enter HVC or Retention" bitfld.long 0x00 2. " TIMER_COUNTDOWN_VALID ,Core is allowed to participate in the decision to enter CC3 HVC4 or CC4 Retention" "True,False" textline " " bitfld.long 0x00 1. " CORE_RET_ENABLE ,Core cluster does enter Retention and the BPMP-Lite is interrupted" "False,True" bitfld.long 0x00 0. " CORE_HVC_ENABLE ,Core cluster does enter HVC" "False,True" group.long 0x74++0x03 line.long 0x00 "CC4_CORE2_CTRL_0 ,CC4_CORE2_CTRL Register" hexmask.long 0x00 3.--31. 1. " CORE_IDLE_TIMER ,Register initializes a countdown timer that is used to determine whether to enter HVC or Retention" bitfld.long 0x00 2. " TIMER_COUNTDOWN_VALID ,Core is allowed to participate in the decision to enter CC3 HVC4 or CC4 Retention" "True,False" textline " " bitfld.long 0x00 1. " CORE_RET_ENABLE ,Core cluster does enter Retention and the BPMP-Lite is interrupted" "False,True" bitfld.long 0x00 0. " CORE_HVC_ENABLE ,Core cluster does enter HVC" "False,True" group.long 0x78++0x03 line.long 0x00 "CC4_CORE3_CTRL_0 ,CC4_CORE3_CTRL Register" hexmask.long 0x00 3.--31. 1. " CORE_IDLE_TIMER ,Register initializes a countdown timer that is used to determine whether to enter HVC or Retention" bitfld.long 0x00 2. " TIMER_COUNTDOWN_VALID ,Core is allowed to participate in the decision to enter CC3 HVC4 or CC4 Retention" "True,False" textline " " bitfld.long 0x00 1. " CORE_RET_ENABLE ,Core cluster does enter Retention and the BPMP-Lite is interrupted" "False,True" bitfld.long 0x00 0. " CORE_HVC_ENABLE ,Core cluster does enter HVC" "False,True" rgroup.long 0x7C++0x03 line.long 0x00 "CORE0_IDLE_COUNTER_0,CORE0_IDLE_COUNTER Register" hexmask.long 0x00 3.--31. 1. " CORE_IDLE_COUNTER ,Captures the current value of the cores idle countdown counter which is initialized to CC4_CORE_CTRL.CORE_IDLE_TIMER at STANDBYWFI asserted by the specific core" rgroup.long 0x80++0x03 line.long 0x00 "CORE1_IDLE_COUNTER_0,CORE1_IDLE_COUNTER Register" hexmask.long 0x00 3.--31. 1. " CORE_IDLE_COUNTER ,Captures the current value of the cores idle countdown counter which is initialized to CC4_CORE_CTRL.CORE_IDLE_TIMER at STANDBYWFI asserted by the specific core" rgroup.long 0x84++0x03 line.long 0x00 "CORE2_IDLE_COUNTER_0,CORE2_IDLE_COUNTER Register" hexmask.long 0x00 3.--31. 1. " CORE_IDLE_COUNTER ,Captures the current value of the cores idle countdown counter which is initialized to CC4_CORE_CTRL.CORE_IDLE_TIMER at STANDBYWFI asserted by the specific core" rgroup.long 0x88++0x03 line.long 0x00 "CORE3_IDLE_COUNTER_0,CORE3_IDLE_COUNTER Register" hexmask.long 0x00 3.--31. 1. " CORE_IDLE_COUNTER ,Captures the current value of the cores idle countdown counter which is initialized to CC4_CORE_CTRL.CORE_IDLE_TIMER at STANDBYWFI asserted by the specific core" group.long 0x8C++0x0B line.long 0x00 "CC4_HVC_RETRY_0_CTRL_0,CC4_HVC_RETRY Register" hexmask.long.word 0x00 0.--15. 1. " THRESHOLD ,Threshold to retry HVC entry after QDENY signals are asserted" line.long 0x04 "L2FLUSH_TIMEOUT_CNTR_0,L2FLUSH_TIMEOUT_CNTR Register" eventfld.long 0x04 31. " STATUS ,Set by hardware in case of L2FLUSHREQUEST timeout" "Clear,Set" hexmask.long 0x04 1.--30. 1. " THRESHOLD ,L2FLUSH timeout counter starts incrementing after l2flushrequest is asserted" textline " " bitfld.long 0x04 0. " ENABLE ,Enables L2FLUSH TIMEOUT counter" "Disabled,Enabled" line.long 0x08 "L2FLUSH_CONTROL_0,L2FLUSH_CONTROL Register" bitfld.long 0x08 1. " REQ ,Issues software L2 FLUSH request" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLE ,Enables hardware L2FLUSH handshake" "Disabled,Enabled" if (((per.l(ad:0x60007000+0x98))&0x4)==0x4) group.long 0x98++0x03 line.long 0x00 "BPMP_CLUSTER_CONTROL_0,BPMP_CLUSTER_CONTROL Register" bitfld.long 0x00 2. " ACTIVE_CLUSTER_LOCK ,Active cluster lock bit" "Disabled,Enabled" bitfld.long 0x00 1. " CLUSTER_SWITCH_ENABLE ,Cluster switch enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " ACTIVE_CLUSTER ,Active cluster" "Fast,Slow" else group.long 0x98++0x03 line.long 0x00 "BPMP_CLUSTER_CONTROL_0,BPMP_CLUSTER_CONTROL Register" bitfld.long 0x00 2. " ACTIVE_CLUSTER_LOCK , Active cluster lock bit" "Disabled,Enabled" bitfld.long 0x00 1. " CLUSTER_SWITCH_ENABLE ,Cluster switch enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ACTIVE_CLUSTER ,Active cluster" "Fast,Slow" endif width 0x0B tree.end tree "Memory Controller" tree "MC0" base ad:0x7001C000 width 19. group.long 0x00++0x07 line.long 0x00 "INTSTATUS_0,Interrupt Status Register" bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INT ,Generalized carve out interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " DECERR_MTS_INT ,Access violation on MTS carve out region in the memory controller" "No interrupt,Interrupt" bitfld.long 0x00 13. " SECERR_SEC_INT ,The request violated the SEC carve out requirements" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " DECERR_VPR_INT ,The request violated the VPR requirements" "No interrupt,Interrupt" bitfld.long 0x00 11. " INVALID_APB_ASID_UPDATE_INT ,ASID update through APB interface resulted in an error" "No interrupt,Interrupt" bitfld.long 0x00 10. " INVALID_SMMU_PAGE_INT ,Address translation error" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " ARBITRATION_EMEM_INT ,Warning that a pending request has reached the deadlock-prevention slack threshold" "No interrupt,Interrupt" bitfld.long 0x00 8. " SECURITY_VIOLATION_INT ,Address translation error non secure access was attempted to a secured region" "No interrupt,Interrupt" bitfld.long 0x00 6. " DECERR_EMEM_INT ,Address translation error EMEM address decode error" "No interrupt,Interrupt" line.long 0x04 "INTMASK_0,Interrupt Mask Register" bitfld.long 0x04 17. " DECCER_GENERALIZED_CARVEOUT_INTMASK ,Generalized carve out interrupt interrupt mask" "Masked,Unmasked" bitfld.long 0x04 16. " DECERR_MTS_INTMASK ,Access violation on MTS carve out region in the memory controller interrupt mask" "Masked,Unmasked" bitfld.long 0x04 13. " SECERR_SEC_INTMASK ,The request violated the SEC carve out requirements interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x04 12. " DECERR_VPR_INTMASK ,The request violated the VPR requirements interrupt mask" "Masked,Unmasked" bitfld.long 0x04 11. " INVALID_APB_ASID_UPDATE_INTMASK ,ASID update through APB interface resulted in an error interrupt mask" "Masked,Unmasked" bitfld.long 0x04 10. " INVALID_SMMU_PAGE_INTMASK ,Address translation error interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x04 9. " ARBITRATION_EMEM_INTMASK ,Warning that a pending request has reached the deadlock-prevention slack threshold interrupt mask" "Masked,Unmasked" bitfld.long 0x04 8. " SECURITY_VIOLATION_INTMASK ,Non secure access was attempted to a secured region interrupt mask" "Masked,Unmasked" bitfld.long 0x04 6. " DECERR_EMEM_INTMASK ,EMEM address decode error interrupt mask" "Masked,Unmasked" textline " " sif (cpuis("TEGRAX2")) group.long 0xEC4++0x03 line.long 0x00 "INTPRIORITY_0,Interrupt Priority Register" bitfld.long 0x00 19. " WCAM_ERR_INTPRIORITY ,WCAM detects an error in use of ENCR enable ENKR REY SET or ECC enable interrupt mask" "Masked,Unmasked" bitfld.long 0x00 18. " SCRUB_ECC_WR_ACK_INTPRIORITY ,Prevents SCRUB ECC WR ACK interrupt from triggering a high-priority interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INTPRIORITY ,Generalized carve out interrupt priority interrupt mask" "Masked,Unmasked" bitfld.long 0x00 16. " DECERR_MTS_INTPRIORITY ,DECERR MTS Interrupt priority interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 13. " SECERR_SEC_INTPRIORITY ,Prevents SECERR secure interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" bitfld.long 0x00 12. " DECERR_VPR_INTPRIORITY ,Prevents DECERR VPR interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 11. " NVALID_APB_ASID_UPDATE_INTPRIORITY ,Prevents invalid APB ASID update interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" bitfld.long 0x00 10. " INVALID_SMMU_PAGE_INTPRIORITY ,Prevents INVALID SMMU PAGE interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 9. " ARBITRATION_EMEM_INTPRIORITY ,Prevents ARBITRATION EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" bitfld.long 0x00 8. " SECURITY_VIOLATION_INTPRIORITY ,Prevents security violation interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 6. " DECERR_EMEM_INTPRIORITY ,Prevents DECERR EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " endif if ((per.l(ad:0x7001C000+0x08)&0x70000000)==0x60000000) rgroup.long 0x08++0x03 line.long 0x00 "ERR_STATUS_0,Error Data Capture Status" bitfld.long 0x00 28.--30. " ERR_TYPE ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..." bitfld.long 0x00 27. " ERR_INVALID_SMMU_PAGE_READABLE ,Invalid SMMU page error page permission was readable" "Not readable,Readable" textline " " bitfld.long 0x00 26. " ERR_INVALID_SMMU_PAGE_WRITABLE ,Invalid SMMU page error page permission was writeable" "Not writeable,Writeable" bitfld.long 0x00 25. " ERR_INVALID_SMMU_PAGE_NONSECURE ,Invalid SMMU page error page permission was non-secure" "Secure,Non-secure" textline " " bitfld.long 0x00 20.--21. " ERR_ADR_HI ,Higher address bits of erring address whose lower bits are available in error ADR register" "b00,b01,b10,b11" bitfld.long 0x00 18. " ERR_SWAP ,Swap bit for transaction" "0,1" textline " " bitfld.long 0x00 17. " ERR_SECURITY ,Transaction security" "Non secure,Secure" bitfld.long 0x00 16. " ERR_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_ADR1 ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111" hexmask.long.byte 0x00 0.--7. 1. " ERR_ID ,Client identifier of the access that caused the error" else rgroup.long 0x08++0x03 line.long 0x00 "ERR_STATUS_0,Memory Controller Error Data Capture Status" bitfld.long 0x00 28.--30. " ERR_TYPE ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..." textline " " textline " " bitfld.long 0x00 20.--21. " ERR_ADR_HI ,Higher address bits of erring address whose lower bits are available in ERR_ADR register" "b00,b01,b10,b11" bitfld.long 0x00 18. " ERR_SWAP ,Swap bit for transaction" "0,1" textline " " bitfld.long 0x00 17. " ERR_SECURITY ,Transaction security" "Non secure,Secure" bitfld.long 0x00 16. " ERR_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_ADR1 ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111" hexmask.long.byte 0x00 0.--7. 1. " ERR_ID ,Client identifier of the access that caused the error" endif rgroup.long 0x0C++0x03 line.long 0x00 "ERR_ADR_0,Error Data Capture Address" textline " " sif (!cpuis("TEGRAX2")) group.long 0x10++0x13 line.long 0x00 "SMMU_CONFIG_0,SMMU Enable Register" bitfld.long 0x00 0. " SMMU_ENABLE ,SMMU enable" "Disabled,Enabled" line.long 0x04 "SMMU_TLB_CONFIG_0,Translation Lookaside Buffer Configuration Register" bitfld.long 0x04 31. " TLB_STATS_ENABLE ,Enable TLB hit and miss counters" "Disabled,Enabled" bitfld.long 0x04 30. " TLB_STATS_TEST ,Set stats registers to all 1s" "Disabled,Enabled" bitfld.long 0x04 29. " TLB_HIT_UNDER_MISS ,Allow hits to pass misses in the TLB" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " TLB_ROUND_ROBIN_ARBITRATION ,Forces round robin arbitration between TLB hit and miss FIFOs" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TLB_ACTIVE_LINES ,Set the number of active lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "SMMU_PTC_CONFIG_0,Page Table Cache Configuration Register" bitfld.long 0x08 31. " PTC_STATS_ENABLE ,Enable PTC hit and miss counters" "Disabled,Enabled" bitfld.long 0x08 30. " PTC_STATS_TEST ,Set stats registers to all 1s" "Disabled,Enabled" bitfld.long 0x08 29. " PTC_CACHE_ENABLE ,Enable the PTC cache" "Disabled,Enabled" textline " " bitfld.long 0x08 24.--27. " PTC_REQ_LIMIT ,Limit outstanding PTC fill requests to the DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 8.--11. 1. " PTC_LINE_MASK ,XOR pattern for line generation" hexmask.long.byte 0x08 0.--6. 1. " PTC_INDEX_MAP ,XOR pattern for tag generation" line.long 0x0C "SMMU_PTB_ASID_0,Page Table Base ASID Register" hexmask.long.byte 0x0C 0.--6. 1. " CURRENT_ASID ,ASID used to address SMMUT PTB register" line.long 0x10 "SMMU_PTB_DATA_0,Page Table Base Data Register" bitfld.long 0x10 31. " ASID_READABLE ,Allow reads for this ASID" "Not allowed,Allowed" bitfld.long 0x10 30. " ASID_WRITEABLE ,Allow writes for this ASID" "Not allowed,Allowed" textline " " bitfld.long 0x10 29. " ASID_NONSECURE ,Allow non-secure access for this ASID" "Not allowed,Allowed" hexmask.long.tbyte 0x10 0.--21. 1. " ASID_PDE_BASE ,Pointer to page of PDEs" group.long 0x30++0x07 line.long 0x00 "SMMU_TLB_FLUSH_0,Translation Lookaside Buffer Flush Register" bitfld.long 0x00 31. " TLB_FLUSH_ASID_MATCH ,Only entries matching TLB flush ASID are flushed" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TLB_FLUSH_ASID ,ASID to match" hexmask.long.tbyte 0x00 2.--19. 1. " TLB_FLUSH_VA_GROUP ,Virtual address to match for group flashes" textline " " bitfld.long 0x00 0.--1. " TLB_FLUSH_VA_MATCH ,Flushing control" "All,,Section,Group" line.long 0x04 "SMMU_PTC_FLUSH_0,Page Table Cache Flush Register" hexmask.long 0x04 4.--31. 0x10 " PTC_FLUSH_ADR ,Physical address of PTE group" bitfld.long 0x04 3. " PTC_NO_WAIT_IDLE_FLUSH ,Set bit to immediately flush without waiting for hit FIFO to go idle" "Disabled,Enabled" bitfld.long 0x04 0. " PTC_FLUSH_TYPE ,Flushing control (Flush entire PTC ADR,or only the one addressed by ADR)" "All,Adr" endif textline " " width 37. if (((per.l(ad:0x7001C000+0x664))&0x01)==0x00) group.long 0x50++0x0F line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration" bitfld.long 0x00 31. " EMEM_BOM ,Base of DRAM memory in GBs" "B2GB,B0GB" hexmask.long.word 0x00 0.--13. 1. " EMEM_SIZE_MB ,External memory aperture size in megabytes" line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System" bitfld.long 0x04 0. " EMEM_NUMDEV ,Number of populated DRAM devices" "N1,N2" line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0" bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..." bitfld.long 0x08 8.--9. " EMEM_DEV0_BANKWIDTH ,Width of bank address of the first attached DRAM device" ",,W2,W3" bitfld.long 0x08 0.--2. " EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..." line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1" bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..." bitfld.long 0x0C 8.--9. " EMEM_DEV1_BANKWIDTH ,Width of bank address of the first attached DRAM device" ",,W2,W3" bitfld.long 0x0C 0.--2. " EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..." sif (!cpuis("TEGRAX2")) group.long 0x60++0x03 line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask" hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK ,EMEM channel mask bits" else group.long 0xDF8++0x07 line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration" bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE ,Selects which memory controller channels are enabled for normal read/writes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register" hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1 ,Mask is ANDed with address and the resulting value is XORed to a single bit" endif group.long 0x64++0x0B line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0 ,EMEM bank mask bits 0" line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1 ,EMEM bank mask bits 1" line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2 ,EMEM bank mask bits 2" else rgroup.long 0x50++0x0F line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration" bitfld.long 0x00 31. " EMEM_DOM ,Base of DRAM memory in GBs" "B2GB,B0GB" hexmask.long.word 0x00 0.--13. 1. " EMEM_SIZE_MB ,External memory aperture size in megabytes" line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System" bitfld.long 0x04 0. " EMEM_NUMDEV ,Number of populated DRAM devices" "N1,N2" line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0" bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..." bitfld.long 0x08 8.--9. " EMEM_DEV0_BANKWIDTH ,Width of bank address of the first attached DRAM device" ",,W2,W3" bitfld.long 0x08 0.--2. " EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..." line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1" bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..." bitfld.long 0x0C 8.--9. " EMEM_DEV1_BANKWIDTH ,Width of bank address of the first attached DRAM device" ",,W2,W3" bitfld.long 0x0C 0.--2. " EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..." sif (!cpuis("TEGRAX2")) rgroup.long 0x60++0x03 line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask" hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK ,EMEM channel mask bits" else rgroup.long 0xDF8++0x07 line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration Channel Select Mask" bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE ,Selects memory controller channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register" hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1 ,EMEM channel mask bits" endif rgroup.long 0x64++0x0B line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0 ,EMEM bank mask bits 0" line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1 ,EMEM bank mask bits 1" line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2 ,EMEM bank mask bits 2" endif group.long 0x70++0x07 line.long 0x00 "SECURITY_CFG0_0,Secure Region Configuration For Base" hexmask.long.word 0x00 20.--31. 0x10 " SECURITY_BOM ,Base of the secured region" line.long 0x04 "SECURITY_CFG1_0,Secure Region Configuration For Bound" hexmask.long.word 0x04 0.--12. 1. " SECURITY_SIZE_MB ,Size in MB of the secured region" textline " " sif (cpuis("TEGRAX2")) group.long 0x9BC++0x07 line.long 0x00 "SECURITY_CFG3_0,Security Config3 0" bitfld.long 0x00 0.--1. " SECURITY_BOM_HI ,SECURITY BOM HI" "0,1,2,3" endif group.long 0x90++0x37 line.long 0x00 "EMEM_ARB_CFG_0,External Memory Arbitration Configuration" hexmask.long.byte 0x00 16.--20. 1. " EXTRA_TICKS_PER_UPDATE ,Number of extra ticks to add every deadline timer update" hexmask.long.word 0x00 0.--8. 1. " CYCLES_PER_UPDATE ,Number of MCCLK cycles per deadline timer update" line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_0,External Memory Arbitration Configuration For Outstanding Request Limiter" bitfld.long 0x04 31. " LIMIT_OUTSTANDING ,Total number of requests in the arbitration is limited to the value in ARB_MAX_OUTSTANDING" "Disabled,Enabled" bitfld.long 0x04 30. " LIMIT_DURING_HOLDOFF_OVERRIDE ,Override the limiting of transactions" "Disabled,Enabled" textline " " hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT ,Current number of outstanding requests" hexmask.long.word 0x04 0.--8. 1. " ARB_MAX_OUTSTANDING ,Maximum number of requests" textline " " line.long 0x08 "EMEM_ARB_TIMING_RCD_0,External Memory Arbitration Configuration For DRAM Timing TRCD" bitfld.long 0x08 0.--5. " RCD ,Minimum number of cycles between activate commands to the same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "EMEM_ARB_TIMING_RP_0,External Memory Arbitration Configuration For DRAM Timing TRP" hexmask.long.byte 0x0C 0.--6. 1. " RP ,Minimum number of cycles between an internal precharge and activate command to the same bank" line.long 0x10 "EMEM_ARB_TIMING_RC_0,External Memory Arbitration Configuration For DRAM Timing TRC" hexmask.long.byte 0x10 0.--7. 1. " RC ,Minimum number of cycles between activate commands to the same bank" line.long 0x14 "EMEM_ARB_TIMING_RAS_0,External Memory Arbitration Configuration For DRAM Timing TRAS" hexmask.long.byte 0x14 0.--6. 1. " RAS ,Minimum number of cycles between activate and precharge command to the same bank" line.long 0x18 "EMEM_ARB_TIMING_FAW_0,External Memory Arbitration Configuration For DRAM Timing TFAW" bitfld.long 0x18 0.--5. " FAW ,tFAW setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "EMEM_ARB_TIMING_RRD_0,External Memory Arbitration Configuration For DRAM Timing TRRD" bitfld.long 0x1C 0.--4. " RRD ,Minimum number of cycles between activate command and activate command to a different bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "EMEM_ARB_TIMING_RAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TRAP2PRE" hexmask.long.byte 0x20 0.--6. 1. " RAP2PRE ,Minimum number of cycles between read and internal precharge commands" line.long 0x24 "EMEM_ARB_TIMING_WAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TWAP2PRE" hexmask.long.byte 0x24 0.--6. 1. " WAP2PRE ,Minimum number of cycles between write and internal precharge commands" line.long 0x28 "EMEM_ARB_TIMING_R2R_0,External Memory Arbitration Configuration For DRAM Timing TR2R" bitfld.long 0x28 0.--4. " R2R ,Minimum number of cycles between consecutive read commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "EMEM_ARB_TIMING_W2W_0,External Memory Arbitration Configuration For DRAM Timing TW2W" bitfld.long 0x2C 0.--4. " W2W ,Minimum number of cycles between consecutive write commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "EMEM_ARB_TIMING_R2W_0,External Memory Arbitration Configuration For DRAM Timing TR2W" hexmask.long.byte 0x30 0.--6. 1. " R2W ,Number of cycles to turn the bus from reads to writes" line.long 0x34 "EMEM_ARB_TIMING_W2R_0,External Memory Arbitration Configuration For DRAM Timing TW2R" hexmask.long.byte 0x34 0.--6. 1. " W2R ,Number of cycles to turn the bus from reads to writes" group.long 0xD0++0x0F line.long 0x00 "EMEM_ARB_DA_TURNS_0,External Memory Arbitration Configuration For Direction Arbiter Turns 0" hexmask.long.byte 0x00 24.--31. 1. " W2R_TURN ,Bubbles produced by a write to read bus turn" hexmask.long.byte 0x00 16.--23. 1. " R2W_TURN ,Bubbles produced by a read to write bys turn" hexmask.long.byte 0x00 8.--15. 1. " W2W_TURN ,Bubbles produced by a write to write (other device) bus turn" textline " " hexmask.long.byte 0x00 0.--7. 1. " R2R_TURN ,Bubbles produced by a read to read (other device) bus turn" line.long 0x04 "EMEM_ARB_DA_COVERS_0,External Memory Arbitration Configuration For Direction Arbiter Covers" hexmask.long.byte 0x04 16.--23. 1. " RCD_W_COVER ,Cost to cover the activate-to-write delay" hexmask.long.byte 0x04 8.--15. 1. " RCD_R_COVER ,Cost to cover the activate-to-read delay" hexmask.long.byte 0x04 0.--7. 1. " RC_COVER ,Cost to cover the activate-to-activate delay" textline " " line.long 0x08 "EMEM_ARB_MISC0_0,External Memory Arbitration Configuration For Miscellaneous Thresholds" bitfld.long 0x08 28.--30. " ATOMS_PER_DVFS_PULSE ,Atoms per DVFS pulse setting" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. " MC_EMC_SAME_FREQ ,Memory controller data request frequency is the half/same as EMC" "EMC/2,Same as EMC" textline " " bitfld.long 0x08 21.--26. " EXPIRING_SOON_SLACK_THRESHOLD ,Slack threshold below which an isochronous request is considered to be expiring soon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--20. " PRIORITY_INVERSION_ISO_THRESHOLD ,Maximum number of unexpired or expired and not synchronous requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 15. " EMC_REQ_B2B_XFER ,Allow EMC transactions on back to back clocks regardless of EMC consumption bandwidth" "Disabled,Enabled" hexmask.long.byte 0x08 8.--14. 1. " PRIORITY_INVERSION_THRESHOLD ,Maximum number of unexpired requests" textline " " hexmask.long.byte 0x08 0.--7. 1. " B2AA_HOLDOFF_THRESHOLD ,Activation hold off threshold" line.long 0x0C "EMEM_ARB_MISC1_0,External Memory Arbitration Configuration For Miscellaneous Threshold 1" bitfld.long 0x0C 28.--31. " DEADLOCK_PREVENTATION_SLACK_THRESHOLD ,Deadlock prevention slack threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--25. " REFRESH_ACK_THRESHOLD_USAGE ,Threshold's select for refresh-acknowledge signal" "Normal,ISO,None,?..." textline " " bitfld.long 0x0C 21.--23. " EXPIRING_SOON_SLACK_THRESHOLD_PD ,Slack threshold below which an isochronous request is considered to be expiring soon" "ZERO_TICKS,ONE_TICK,TWO_TICKS,FOUR_TICKS,EIGHT_TICKS,Use SLACK_THRESHOLD,?..." hexmask.long.word 0x0C 4.--12. 1. " ALT_DEADLOCK_PREVENTION_SLACK_THRESHOLD ,Use the absolute value of deadlock prevention slack threshold instead of 2^n format" textline " " bitfld.long 0x0C 3. " COMBINED_INTERRUPT_MODE ,Combined interrupt mode" "Independent,Shadowed" bitfld.long 0x0C 2. " BLOCK_LP_CPU_WR_IF_SMMU_INP_HP ,Low priority CPU writes blocked while SMMU output is high priority" "Not blocked,Blocked" textline " " bitfld.long 0x0C 1. " ALLOW_BCA_HOLDOFF_WHN_EXP ,Allows BCA hold off to occur even when expired requests are present" "Disabled,Enabled" bitfld.long 0x0C 0. " BLOCK_LP_CPU_RD_IF_SMMU_INP_HP ,Low priority CPU reads get blocked" "Disabled,Enabled" group.long 0xC8++0x03 line.long 0x00 "EMEM_ARB_MISC2_0,External Memory Arbitration Configuration For Miscellaneous Threshold 2" bitfld.long 0x00 0. " ALLOW_B2B_TA_REQS ,Transaction arbiter grant requests on back-to-back cycles enable" "Disabled,Enabled" group.long 0xE0++0x07 line.long 0x00 "EMEM_ARB_RING1_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle" bitfld.long 0x00 16.--20. " RING1_THROTTLE_CYCLES_HIGH ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RING1-THROTTLE_CYCLES_LOW ,Cycles of throttle when transaction count is below threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EMEM_ARB_RING3_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle" bitfld.long 0x04 0.--4. " RING3_THROTTLE_CYCLES ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " sif (cpuis("TEGRAX2")) group.long 0x6B0++0x03 line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,External Memory Arbitration Configuration Snap Arbiter Throttle " bitfld.long 0x00 31. " NISO_THROTTLE_DISABLE_CNT_EVENT ,NISO throttle disable count event" "Disabled,Enabled" bitfld.long 0x00 16.--21. " RING1_THROTTLE_CYCLES_HIGH ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--5. " NISO_THROTTLE_CYCLES ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x664++0x0B line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0,Access Control Bit For EMEM Configuration Registers" bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS ,EMEM configuration write access" "Disabled,Enabled" line.long 0x04 "TZ_SECURITY_CTRL_0,TrustZone Security Control Register" bitfld.long 0x04 0. " CPU_STRICT_TZ_APERTURE_CHECK ,CPU STRICT TZ aperture check" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Highest Ring Outstanding Request Limiter" bitfld.long 0x08 31. " LIMIT_OUTSTANDING_RING3 ,Limit outstanding ring3" "Disabled,Enabled" bitfld.long 0x08 30. " LIMIT_DURING_HOLDOFF_OVERRIDE_RING3 ,Limit during hold off override ring3" "Disabled,Enabled" textline " " hexmask.long.word 0x08 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3 ,Current number of outstanding requests" hexmask.long.word 0x08 0.--8. 1. " ARB_MAX_OUTSTANDING_RING3 ,ARB maximum outstanding ring3" group.long 0x6B4++0x0B line.long 0x00 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,External Memory Arbitration Configuration:Outstanding Request Limiter" bitfld.long 0x00 31. " LIMIT_OUTSTANDING_NISO ,Limit outstanding NISO" "Disabled,Enabled" bitfld.long 0x00 30. " LIMIT_DURING_HOLDOFF_OVERRIDE_NISO ,Limit during hold off override NISO" "Disabled,Enabled" textline " " hexmask.long.word 0x00 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO ,Current number of outstanding requests" hexmask.long.word 0x00 0.--8. 1. " ARB_MAX_OUTSTANDING_NISO ,The maximum number of requests allowed in the arbiter" line.long 0x04 "EMEM_ARB_NISO_THROTTLE_MASK_0,External Memory Arbitration Configuration:Throttle Mask" bitfld.long 0x04 29. " NISO_THROTTLE_MASK_VICPC ,NISO throttle mask VICPC" "Disabled,Enabled" bitfld.long 0x04 28. " NISO_THROTTLE_MASK_USBD ,NISO throttle mask USBD" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " NISO_THROTTLE_MASK_HOST ,NISO throttle mask HOST" "Disabled,Enabled" bitfld.long 0x04 23. " NISO_THROTTLE_MASK_SD ,NISO throttle mask SD" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " NISO_THROTTLE_MASK_GK ,NISO throttle mask GK" "Disabled,Enabled" bitfld.long 0x04 19. " NISO_THROTTLE_MASK_MSE ,NISO throttle mask MSE" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " NISO_THROTTLE_MASK_USBX ,NISO throttle mask USBX" "Disabled,Enabled" bitfld.long 0x04 9. " NISO_THROTTLE_MASK_SAX ,NISO throttle mask SAX" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " NISO_THROTTLE_MASK_PCX ,NISO throttle mask PCX" "Disabled,Enabled" bitfld.long 0x04 3. " NISO_THROTTLE_MASK_AVP ,NISO throttle mask AVP" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " NISO_THROTTLE_MASK_APB ,NISO throttle mask APB" "Disabled,Enabled" bitfld.long 0x04 1. " NISO_THROTTLE_MASK_AHB ,NISO throttle mask AHB" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_RING0_THROTTLE_MASK_0,External Memory Arbitration Configuration:Ring0 Input Throttle Mask" bitfld.long 0x08 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,ARB outstanding count above SMMU" "Disabled,Enabled" bitfld.long 0x08 15. " RING0_THROTTLE_MASK_RING1_OUTPUT ,Ring0 throttle mask ring1 output" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " RING0_THROTTLE_MASK_RING1 ,Ring0 throttle mask ring1" "Disabled,Enabled" bitfld.long 0x08 6. " RING0_THROTTLE_MASK_FTOP ,Ring0 throttle mask FTOP" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " RING0_THROTTLE_MASK_PTC ,Ring0 throttle mask PTC" "Disabled,Enabled" bitfld.long 0x08 0. " RING0_THROTTLE_MASK_MPCORER ,Ring0 throttle mask MPCORER" "Disabled,Enabled" group.long 0xB80++0x03 line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,External Memory Arbitration Configuration:Input NISO Throttle Mask" bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,NISO throttle mask DFD" "Disabled,Enabled" bitfld.long 0x00 4. " NISO_THROTTLE_MASK_HDAPC ,NISO throttle mask HDAPC" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM ,NISO throttle mask SDM" "Disabled,Enabled" bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,NISO throttle mask GK2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG ,NISO throttle mask JPG" "Disabled,Enabled" group.long 0x670++0x07 line.long 0x00 "SEC_CARVEOUT_BOM_0,Security Carve Out BOM 0" hexmask.long.word 0x00 20.--31. 1. " SEC_CARVEOUT_BOM ,Base address for the SEC carve out address space" line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,SEC Carve Out Size MB 0" hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB ,SEC carve out size MB" group.long 0x9D4++0x03 line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0" bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Security carve out BOM HI" "0,1,2,3" group.long 0x678++0x03 line.long 0x00 "SEC_CARVEOUT_REG_CTRL_0,Security Carve Out Register Control 0" bitfld.long 0x00 0. " SEC_CARVEOUT_WRITE_ACCESS ,Sticky bit to control the writes to the other security carve out aperture registers" "Enabled,Disabled" rgroup.long 0x67C++0x07 line.long 0x00 "ERR_SEC_STATUS_0,Error Security Status 0" bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI ,Higher address bits of erring address whose lower bits are available in the error ADR register" "0,1,2,3" bitfld.long 0x00 18. " ERR_SEC_SWAP ,Error security swap" "No error,Error" textline " " bitfld.long 0x00 17. " ERR_SEC_SECURITY ,Error secure security" "Non secure,Secure" bitfld.long 0x00 16. " ERR_SEC_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_SEC_ADR1 ,Second sub partition unique address bits" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--6. 1. " ERR_SEC_ID ,Client identifier of the access that caused the error" line.long 0x04 "ERR_SEC_ADR_0,Error Security ADR 0" group.long 0x684++0x07 line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Configuration" bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS ,Number of idle before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "STUTTER_CONTROL_0,Stutter Control 0" bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR ,Slow EMCCLK during DSR" "Disabled,Enabled" group.long 0x9D4++0x03 line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0" bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Security carve out BOM HI" "0,1,2,3" group.long 0x6C0++0x07 line.long 0x00 "EMEM_ARB_TIMING_RFCPB_0,External Memory Arbitration Configuration" hexmask.long.word 0x00 0.--8. 1. " RFCPB ,PMC specifies the per-bank auto refresh cycle time" line.long 0x04 "EMEM_ARB_TIMING_CCDMW_0,External Memory Arbitration Configuration:DRAM Timing:tCCDMW" bitfld.long 0x04 0.--5. " CCDMW ,PMC This field supports LPDDR4 DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x6F0++0x07 line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,External Memory Arbitration Configuration Per Bank Refresh High Priority Control" hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH ,Open work control threshold" hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP ,Low priority control threshold" textline " " hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP ,High priority control threshold" line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,External Memory Arbitration Configuration:REFPB-Bank control" bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE ,Explicit bank mode" "0,1" hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,Force bank closure,low threshold" textline " " hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE ,Force bank closure,high threshold" group.long 0x970++0x07 line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register" bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE ,TSECB flush enable" "Disabled,Enabled" bitfld.long 0x00 12. " ETR_FLUSH_ENABLE ,ETR flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE ,AXIAP flush enable" "Disabled,Enabled" bitfld.long 0x00 8. " NVJPG_FLUSH_ENABLE ,NVJPG flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SE_FLUSH_ENABLE ,SE flush enable" "Disabled,Enabled" bitfld.long 0x00 6. " APE_FLUSH_ENABLE ,APE flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE ,NVDEC flush enable" "Disabled,Enabled" bitfld.long 0x00 2. " GPU_FLUSH_ENABLE ,GPU flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE ,ISP2B flush enable" "Disabled,Enabled" bitfld.long 0x00 0. " SDMMC4A_FLUSH_ENABLE ,SDMMC4A flush enable" "Disabled,Enabled" line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Control Register" bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS ,TSECB hot reset status" "In progress,Done" bitfld.long 0x04 12. " ETR_HOTRESET_STATUS ,ETR hot reset status" "In progress,Done" textline " " bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS ,AXIAP hot reset status" "In progress,Done" bitfld.long 0x04 8. " NVJPG_HOTRESET_STATUS ,NVJPG hot reset status" "In progress,Done" textline " " bitfld.long 0x04 7. " SE_HOTRESET_STATUS ,SE hot reset status" "In progress,Done" bitfld.long 0x04 6. " APE_HOTRESET_STATUS ,APE hot reset status" "In progress,Done" textline " " bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS ,NVDEC hot reset status" "In progress,Done" bitfld.long 0x04 2. " GPU_HOTRESET_STATUS ,GPU hot reset status" "In progress,Done" textline " " bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS ,ISP2B hot reset status" "In progress,Done" bitfld.long 0x04 0. " SDMMC4A_HOTRESET_STATUS ,SDMMC4A hot reset status" "In progress,Done" textline " " endif sif (!cpuis("TEGRAX2")) group.long 0xE8++0x07 line.long 0x00 "EMEM_ARB_OVERRIDE_0,External Memory Arbitration Configuration For Feature Overrides" bitfld.long 0x00 31. " ARB_HUM_FIFO_DEADLOCK_CHECK_OVERRIDE ,FIFO deadlock check override" "Disabled,Enabled" bitfld.long 0x00 28. " ARB_EMEM_SPO_OVERRIDE ,EMEM SPO override" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ARB_EMEM_AP_OVERRIDE ,EMEM AP override" "Disabled,Enabled" bitfld.long 0x00 26. " ARB_HUM_FIFO_OVERRIDE ,Hum FIFO override" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " ISO_TA_OVERRIDE ,ISO TA override" "Disabled,Enabled" bitfld.long 0x00 22. " ISO_DA_OVERRIDE ,ISO DA override" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ISO_BC_INHERIT_ON_PRIINV_OVERRIDE ,ISO BC inherit on PRINV override" "Disabled,Enabled" bitfld.long 0x00 20. " ISO_BC_CAUSE_PRIINV_OVERRIDE ,ISO BC cause PRINV override" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ISO_BA_OVERRIDE ,ISO_BA override" "Disabled,Enabled" bitfld.long 0x00 18. " ISO_AA_OVERRIDE ,ISO AA override" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " ARB_EMEM_BUBBLECALC_OVERRIDE ,EMEM bubble CALC override" "Disabled,Enabled" bitfld.long 0x00 16. " ALLOC_ONE_BQ_PER_CLIENT ,Allocate one BQ per client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " PRIORITY_INVERSION_ISO_THRESHOLD_BUS_OVERRIDE ,Priority inversion is threshold BUS override" "Disabled,Enabled" bitfld.long 0x00 14. " PRIORITY_INVERSION_ISO_THRESHOLD_BANK_OVERRIDE ,Priority inversion threshold bank override" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PRIORITY_INVERSION_THRESHOLD_BUS_OVERRIDE ,Priority inversion threshold BUS override" "Disabled,Enabled" bitfld.long 0x00 12. " PRIORITY_INVERSION_THRESHOLD_BANK_OVERRIDE ,Priority inversion bank override" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " PRIORITY_INVERSION_EQ_PRI_LEN_LIMIT_OVERRIDE ,Priority inversion EQ PRI LEN limit override" "Disabled,Enabled" bitfld.long 0x00 10. " OBSERVED_DIRECTION_OVERRIDE ,Observed direction override" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " BC2AA_HOLDHOFF_OVERRIDE ,BC2AA hold off override" "Disabled,Enabled" bitfld.long 0x00 8. " TS2AA_HOLDHOFF_OVERRIDE ,TS2AA hold off override" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPIRE_UPDATE_OVERRIDE ,Expire update override" "Disabled,Enabled" bitfld.long 0x00 3. " GPU_SLICE_MERGE_OVERRIDE ,Combine GPU traffic override" "Disabled,Enabled" textline " " line.long 0x04 "EMEM_ARB_RSV_0,EMEM Arbiter Reserved" hexmask.long.byte 0x04 24.--31. 1. " EMEM_ARB_RESERVED_BYTE3 ,EMEM ARB reserved byte 3" hexmask.long.byte 0x04 16.--23. 1. " EMEM_ARB_RESERVED_BYTE2 ,EMEM ARB reserved byte2" textline " " hexmask.long.byte 0x04 8.--15. 1. " EMEM_ARB_RESERVED_BYTE1 ,EMEM ARB reserved byte1 " hexmask.long.byte 0x04 0.--7. 1. " EMEM_ARB_RESERVED_BYTE0 ,EMEM ARB reserved byte0" group.long 0x0F4++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,Second-Level Clock Enable Overrides" bitfld.long 0x00 15. " EMC_RESP_CLKEN_OVR ,EMC response clock override" "Gated,Override" bitfld.long 0x00 14. " TSR_CLKEN_OVR ,EARB TSR clock override" "Gated,Override" textline " " bitfld.long 0x00 13. " RING2_CLKEN_OVR ,Ring2 clock override" "Gated,Always on" bitfld.long 0x00 12. " RING1_CLKEN_OVR ,Ring1 clock override" "Gated,Always on" textline " " bitfld.long 0x00 11. " CH_DDA_CLKEN_OVR ,CH_DDA_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 10. " HUB_DDA_CLKEN_OVR ,HUB_DDA_CLKEN_OVR" "Gated,Always on" textline " " bitfld.long 0x00 9. " WCAM_CLKEN_OVR ,WCAM_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 8. " PTC_CACHE_CLKEN_OVR ,PTC_CACHE_CLKEN_OVR" "Gated,Always on" textline " " bitfld.long 0x00 7. " PTC_CLKEN_OVR ,PTC_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 6. " TLB_CLKEN_OVR ,TLB_CLKEN_OVR" "Gated,Always on" textline " " bitfld.long 0x00 5. " WB_CLKEN_OVR ,WB_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 3. " REGS_CLKEN_OVR ,REGS_CLKEN_OVR" "Gated,Always on" textline " " bitfld.long 0x00 2. " EARB_CLKEN_OVR ,EARB_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 0. " CIF_CLKEN_OVR ,CIF_CLKEN_OVR" "Gated,Always on" group.long 0x0FC++0x07 line.long 0x00 "TIMING_CONTROL_0 ,Shadowed Registers Update Trigger" bitfld.long 0x00 0. " TIMING_UPDATE ,Trigger a timing update event" "No trigger,Trigger" textline " " line.long 0x04 "STAT_CONTROL_0,Statistic Control" bitfld.long 0x04 3. " EMC_PM_STOP_TRIGGER ,EMC PM stop trigger" "No trigger,Trigger" bitfld.long 0x04 2. " EMC_PM_START_TRIGGER ,EEMC PM start trigger" "No trigger,Trigger" textline " " bitfld.long 0x04 0.--1. " EMC_GATHER ,EMC gather" "RST,,Disabled,Enabled" textline " " endif group.long 0x200++0x03 line.long 0x00 "CLIENT_HOTRESET_CTRL_0,Memory Client Hot Reset Control Register" bitfld.long 0x00 31. " SDMMC3A_FLUSH_ENABLE ,SDMMC3A flush enable" "Disabled,Enabled" bitfld.long 0x00 30. " SDMMC2A_FLUSH_ENABLE ,SDMMC2A flush enable" "Disabled,Enabled" bitfld.long 0x00 29. " SDMMC1A_FLUSH_ENABLE ,SDMMC1A flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " TSEC_FLUSH_ENABLE ,TSEC flush enable" "Disabled,Enabled" bitfld.long 0x00 20. " XUSB_DEV_FLUSH_ENABLE ,XUSB DEV flush enable" "Disabled,Enabled" bitfld.long 0x00 19. " XUSB_HOST_FLUSH_ENABLE ,XUSB host flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " VIC_FLUSH_ENABLE ,VIC flush enable" "Disabled,Enabled" bitfld.long 0x00 17. " VI_FLUSH_ENABLE ,VI flush enable" "Disabled,Enabled" bitfld.long 0x00 15. " SATA_FLUSH_ENABLE ,SATA flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " PPCS_FLUSH_ENABLE ,PPCS flush enable" "Disabled,Enabled" bitfld.long 0x00 11. " NVENC_FLUSH_ENABLE ,NVENC flush enable" "Disabled,Enabled" bitfld.long 0x00 9. " MPCORE_FLUSH_ENABLE ,MPCORE flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " ISP2_FLUSH_ENABLE ,ISP2 flush enable" "Disabled,Enabled" bitfld.long 0x00 7. " HDA_FLUSH_ENABLE ,HDA flush enable" "Disabled,Enabled" bitfld.long 0x00 6. " HC_FLUSH_ENABLE ,HC flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DCB_FLUSH_ENABLE ,DCB flush enable" "Disabled,Enabled" bitfld.long 0x00 2. " DC_FLUSH_ENABLE ,DC flush enable" "Disabled,Enabled" bitfld.long 0x00 1. " AVPC_FLUSH_ENABLE ,AVPC flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AFI_FLUSH_ENABLE ,AFI flush enable" "Disabled,Enabled" rgroup.long 0x204++0x03 line.long 0x00 "CLIENT_HOTRESET_STATUS_0,Memory Client Hot Reset Status Register" bitfld.long 0x00 31. " SDMMC3A_HOTRESET_STATUS ,SDMMC3A flush status" "In progress,Done" bitfld.long 0x00 30. " SDMMC2A_HOTRESET_STATUS ,SDMMC2A flush status" "In progress,Done" bitfld.long 0x00 29. " SDMMC1A_HOTRESET_STATUS ,SDMMC1A flush status" "In progress,Done" textline " " bitfld.long 0x00 22. " TSEC_HOTRESET_STATUS ,TSEC flush status" "In progress,Done" bitfld.long 0x00 20. " XUSB_DEV_HOTRESET_STATUS ,XUSB DEV flush status" "In progress,Done" bitfld.long 0x00 19. " XUSB_HOST_HOTRESET_STATUS ,XUSB Host flush status" "In progress,Done" textline " " bitfld.long 0x00 18. " VIC_HOTRESET_STATUS ,VIC flush status" "In progress,Done" bitfld.long 0x00 17. " VI_HOTRESET_STATUS ,VI flush status" "In progress,Done" bitfld.long 0x00 15. " SATA_HOTRESET_STATUS ,SATA flush status" "In progress,Done" textline " " bitfld.long 0x00 14. " PPCS_HOTRESET_STATUS ,PPCS flush status" "In progress,Done" bitfld.long 0x00 11. " NVENC_HOTRESET_STATUS ,NVENC flush status" "In progress,Done" bitfld.long 0x00 9. " MPCORE_HOTRESET_STATUS ,MPCORE flush status" "In progress,Done" textline " " bitfld.long 0x00 8. " ISP2_HOTRESET_STATUS ,ISP flush status" "In progress,Done" bitfld.long 0x00 7. " HDA_HOTRESET_STATUS ,HDA flush status" "In progress,Done" bitfld.long 0x00 6. " HC_HOTRESET_STATUS ,HC flush status" "In progress,Done" textline " " bitfld.long 0x00 3. " DCB_HOTRESET_STATUS ,DCB flush status" "In progress,Done" bitfld.long 0x00 2. " DC_HOTRESET_STATUS ,DC flush status" "In progress,Done" bitfld.long 0x00 1. " AVPC_HOTRESET_STATUS ,AVPC flush status" "In progress,Done" textline " " bitfld.long 0x00 0. " AFI_HOTRESET_STATUS ,AFI flush status" "In progress,Done" group.long 0x208++0x0F line.long 0x00 "EMEM_ARB_ISOCHRONOUS_0_0,Per-Client Isochronous Settings" bitfld.long 0x00 31. " ISO_SATAR ,Client SATAR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 30. " ISO_PPCSAHBSLVR ,Client PPCSAHBSLVR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 29. " ISO_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ISO_NVENCCSRD ,Client NVENCSRD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 23. " ISO_HOST1XR ,Client HOST1XR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 22. " ISO_HOST1XDMAR ,Client HOST1XDMAR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ISO_HDAR ,Client HDAR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 17. " ISO_DISPLAYHCB ,Client DISPLAYHCB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 16. " ISO_DISPLAYHC ,Client DISPLAYHC is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ISO_AVPCARM7R ,Client AVPCARM7R is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 14. " ISO_AFIR ,Client AFIR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 6. " ISO_DISPLAY0CB ,Client DISPLAY0CB is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ISO_DISPLAY0C ,Client DISPLAY0C is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 4. " ISO_DISPLAY0BB ,Client DISPLAY0BB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 3. " ISO_DISPLAY0B ,Client DISPLAY0B is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ISO_DISPLAY0AB ,Client DISPLAY0AB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 1. " ISO_DISPLAY0A ,Client DISPLAY0A is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 0. " ISO_PTCR ,Client PTCR is treated as an isochronous client" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_ISOCHRONOUS_1_0,Per-Client Isochronous Settings" bitfld.long 0x04 29. " ISO_SATAW ,Client SATAW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 28. " ISO_PPCSAHBSLVW ,Client PPCSAHBSLVW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 27. " ISO_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " ISO_MPCOREW ,Client MPCOREW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 22. " ISO_HOST1XW ,Client HOST1XW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 21. " ISO_HDAW ,Client HDAW is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " ISO_AVPCARM7W ,Client AVPCARM7W is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 17. " ISO_AFIW ,Client AFIW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 11. " ISO_NVENCSWR ,Client NVENCSWR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " ISO_MPCORER ,Client MPCORER is treated as an isochronous client" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_ISOCHRONOUS_2_0,Per-Client Isochronous Settings" bitfld.long 0x08 26. " ISO_DISPLAYT ,Client DISPLAYT is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 25. " ISO_GPUSWR ,Client GPUSWR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 24. " ISO_GPUSRD ,Client GPUSRD is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " ISO_TSECSWR ,Client TSECSWR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 20. " ISO_TSECSRD ,Client TSECSRD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 17. " ISO_ISPWBB ,Client ISPWBB is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " ISO_ISPWAB ,Client ISPWAB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 14. " ISO_ISPRAB ,Client ISPRAB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 13. " ISO_XUSB_DEVW ,Client XUSB DEVQ is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " ISO_XUSB_DEVR ,Client XUSB DEVR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 11. " ISO_XUSB_HOSTW ,Client XUSB HOSTW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 10. " ISO_XUSB_HOSTR ,Client XUSB HOSTR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " ISO_ISPWB ,Client ISPWB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 6. " ISO_ISPWA ,Client ISPWA is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 4. " ISO_ISPRA ,Client ISPRA is treated as an isochronous client" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_ISOCHRONOUS_3_0,Per-Client Isochronous Settings" bitfld.long 0x0C 31. " ISO_NVJPGSWR ,Client NVJPGSWR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 30. " ISO_NVJPGSRD ,Client NVJPGSRD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 27. " ISO_APEW ,Client APEW is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " ISO_APER ,Client APER is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 25. " ISO_NVDECSWR ,Client NVDECSWR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 24. " ISO_NVDECSRD ,Client NVDECSRD is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " ISO_DISPLAYD ,Client DISPLAYD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 18. " ISO_VIW ,Client VIW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 13. " ISO_VICSWR ,Client VICSWR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " ISO_VICSRD ,Client VICSRD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 7. " ISO_SDMMCWAB ,Client SDMMCWAB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 6. " ISO_SDMMCW ,Client SDMMCW is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " ISO_SDMMCWAA ,Client SDMMCWAA is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 4. " ISO_SDMMCWA ,Client SDMMCWA is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 3. " ISO_SDMMCRAB ,Client SDMMCRAB is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " ISO_SDMMCR ,Client SDMMCR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 1. " ISO_SDMMCRAA ,Client SDMMCRAA is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 0. " ISO_SDMMCCRA ,Client SDMMCRA is treated as an isochronous client" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0xB94++0x03 line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings" bitfld.long 0x00 9. " SO_GPUSWR2 ,Client gpuswr2 is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 8. " ISO_GPUSRD2 ,Client gpusrd2 is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 7. " ISO_TSECSWRB ,Client TSECSWRB is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ISO_TSECSRDB ,Client TSECSRDB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 5. " ISO_ETRW ,Client ETRW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 4. " ISO_ETRR ,Client ETRR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ISO_AXIAPW ,Client AXIAPW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 2. " ISO_AXIAPR ,Client AXIAPR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 1. " ISO_SESWR ,Client SESWR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ISO_SESRD ,Client SESRD is treated as an isochronous client" "Disabled,Enabled" group.long 0xBA8++0x0F line.long 0x00 "EMEM_ARB_ISOCHRONOUS_5_0,EMEM_ARB_ISOCHRONOUS_5_0" bitfld.long 0x00 3. " ISO_NVDECSRD1 ,Client nvdecsrd1 is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 2. " ISO_VICSRD1 ,Client vicsrd1 is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 1. " ISO_NVDISPLAYR1 ,Client nvdisplayr1 is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ISO_APEDMAW ,Client APEDMAW is treated as an isochronous client" "Disabled,Enabled" endif group.long 0x218++0x0F line.long 0x00 "EMEM_ARB_HYSTERESIS_0_0,Per-Client Hysteresis Settings" bitfld.long 0x00 31. " HYST_SATAR ,Client SATAR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 30. " HYST_PPCSAHBSLVR ,Client PPCSAHBSLVR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 29. " HYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " HYST_NVENCSRD ,Client NVENCSRD is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 23. " HYST_HOST1XR ,Client HOST1XR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 22. " HYST_HOST1XDMAR ,Client HOST1XDMAR is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " HYST_HDAR ,Client HDAR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 17. " HYST_DISPLAYHCB ,Client DISPLAYHCB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 16. " HYST_DISPLAYHC ,Client DISPLAYHC is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " HYST_AVPCARM7R ,Client AVPCARM7R is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 14. " HYST_AFIR ,Client AFIR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 6. " HYST_DISPLAY0CB ,Client DISPLAY0CB is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HYST_DISPLAY0C ,Client DISPLAY0C is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " HYST_DISPLAY0BB ,Client DISPLAY0BB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 3. " HYST_DISPLAY0B ,Client DISPLAY0B is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HYST_DISPLAY0AB ,Client DISPLAY0AB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " HYST_DISPLAY0A ,Client DISPLAY0A is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 0. " HYST_PTCR ,Client PTCR is treated as an hysteresis client" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_HYSTERESIS_1_0,Per-Client Hysteresis Settings" bitfld.long 0x04 29. " HYST_SATAW ,Client SATAW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 28. " HYST_PPCSAHBSLVW ,Client PPCSAHBSLVW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 27. " HYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " HYST_MPCOREW ,Client MPCOREW is treated as an hysteresis client" "Disabled,Enabled" sif (!cpuis("TEGRAX2")&&!cpuis("TEGRAX1")) bitfld.long 0x04 24. " HYST_MPCORELPW ,Client MPCORELPW is treated as an hysteresis client" "Disabled,Enabled" endif bitfld.long 0x04 22. " HYST_HOST1XW ,Client HOST1XW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " HYST_HDAW ,Client HDAW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 18. " HYST_AVPCARM7W ,Client AVPCARM7W is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 17. " HYST_AFIW ,Client AFIW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " HYST_NVENCSWR ,Client NVENCSWR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 7. " HYST_MPCORER ,Client MPCORER is treated as an hysteresis client" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_HYSTERESIS_2_0,Per-Client Hysteresis Settings" bitfld.long 0x08 26. " HYST_DISPLAYT ,Client DISPLAYT is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 25. " HYST_GPUSWR ,Client GPUSWR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 24. " HYST_GPUSRD ,Client GPSURD is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " HYST_TSECSWR ,Client TSECSWR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 20. " HYST_TSECSRD ,Client TSECSRD is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 17. " HYST_ISPWBB ,Client ISPWBB is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " HYST_ISPWAB ,Client ISPWAB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 14. " HYST_ISPRAB ,Client ISPRAB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 13. " HYST_XUSB_DEVW ,Client XUSB DEVW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " HYST_XUSB_DEVR ,Client XUSB DEVR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 11. " HYST_XUSB_HOSTW ,Client XUSB HOSTW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 10. " HYST_XUSB_HOSTR ,Client XUSB HOSTR is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " HYST_ISPWB ,Client ISPWB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 6. " HYST_ISPWA ,Client ISPWA is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 4. " HYST_ISPRA ,Client ISPRA is treated as an hysteresis client" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_HYSTERESIS_3_0,Per-Client Hysteresis Settings" bitfld.long 0x0C 31. " HYST_NVJPGSWR ,Client NVJPGSWR is treated as hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 30. " HYST_NVJPGSRD ,Client NVJPGSRD is treated as hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 27. " HYST_APEW ,Client APEW is treated as hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " HYST_APER ,Client APER is treated as hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 25. " HYST_NVDECSWR ,Client NVDECSWR is treated as hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 24. " HYST_NVDECSRD ,Client NVDECSRD is treated as hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " HYST_DISPLAYD ,Client DISPLAYD is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 18. " HYST_VIW ,Client VIW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 13. " HYST_VICSWR ,Client VICSWR is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " HYST_VICSRD ,Client VICSRD is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 7. " HYST_SDMMCWAB ,Client SDMMCWAB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 6. " HYST_SDMMCW ,Client SDMMCW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " HYST_SDMMCWAA ,Client SDMMCWAA is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 4. " HYST_SDMMCWA ,Client SDMMCWA is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 3. " HYST_SDMMCRAB ,Client SDMMCRAB is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " HYST_SDMMCR ,Client SDMMCR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 1. " HYST_SDMMCRAA ,Client SDMMCRAA is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 0. " HYST_SDMCRA ,Client SDMCRA is treated as an hysteresis client" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) group.long 0xB84++0x03 line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,EMEM ARB Hysteresis4 0" bitfld.long 0x00 31. " HYST_APEDMAR ,Client APEDMAR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 30. " HYST_SCEDMAW ,Client SCEDMAW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 29. " HYST_SCEDMAR ,Client SCEDMAR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " HYST_SCEW ,Client SCEW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 27. " HYST_SCER ,Client SCER is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 26. " HYST_AONDMAW ,Client AONDMAW is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " HYST_AONDMAR ,Client AONDMAR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 24. " HYST_AONW ,Client AONW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 23. " HYST_AONR ,Client AONR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " HYST_BPMPDMAW ,Client BPMPDMAW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 21. " HYST_BPMPDMAR ,Client BPMPDMAR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 20. " HYST_BPMPW ,Client BPMPW is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " HYST_BPMPR ,Client BPMPR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 18. " HYST_NVDISPLAYR ,Client NVDISPLAYR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 17. " HYST_UFSHCW ,Client UFSHCW is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " HYST_UFSHCR ,Client UFSHCR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 15. " HYST_EQOSW ,Client EQOSW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 14. " HYST_EQOSR ,Client EQOSR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " HYST_AXISW ,Client AXISW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 12. " HYST_AXISR ,Client AXISR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 9. " HYST_GPUSWR2 ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HYST_GPUSRD2 ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 7. " HYST_TSECSWRB ,Client TSECSWRB is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 6. " HYST_TSECSRDB ,Client TSECSRDB is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HYST_ETRW ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " HYST_ETRR ,Client ETRR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " HYST_SESWR ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HYST_SESRD ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled" group.long 0xBA4++0x03 line.long 0x00 "EMEM_ARB_HYSTERESIS_5_0,EMEM ARB Hysteresis5_0" bitfld.long 0x00 3. " HYST_NVDECSRD1 ,Client NVDECSRD1 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 2. " HYST_VICSRD1 ,Client VICSRD1 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " HYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HYST_APEDMAW ,Client APEDMAW is treated as a hysteresis client" "Disabled,Enabled" group.long 0xBB0++0x13 line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x00 31. " DHYST_SATAR ,Client SATAR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 30. " DHYST_PPCSAHBSLVR ,Client PPCSAHBSLVR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 29. " DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " DHYST_NVENCSRD ,Client NVENCSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 23. " DHYST_HOST1XR ,Client HOST1XR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 22. " DHYST_HOST1XDMAR ,Client HOST1XDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DHYST_HDAR ,Client HDAR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 17. " DHYST_DISPLAYHCB ,Client DISPLAYHCB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 16. " DHYST_DISPLAYHC ,Client DISPLAYHC is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " DHYST_AVPCARM7R ,Client AVPCARM7R is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 14. " DHYST_AFIR ,Client AFIR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 6. " DHYST_DISPLAY0CB ,Client DISPLAY0CB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DHYST_DISPLAY0C ,Client DISPLAY0C is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " DHYST_DISPLAY0BB ,Client DISPLAY0BB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 3. " DHYST_DISPLAY0B ,Client DISPLAY0B is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DHYST_DISPLAY0AB ,Client DISPLAY0AB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " DHYST_DISPLAY0A ,Client DISPLAY0A is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 0. " DHYST_PTCR ,Client PTCR is treated as a dynamic hysteresis client" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x04 29. " DHYST_SATAW ,Client SATAW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 28. " DHYST_PPCSAHBSLVW ,Client PPCSAHBSLVW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 27. " DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " DHYST_MPCOREW ,Client MPCOREW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 22. " DHYST_HOST1XW ,Client HOST1XW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 21. " DHYST_HDAW ,Client HDAW is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " DHYST_AVPCARM7W ,Client AVPCARM7W is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 17. " DHYST_AFIW ,Client AFIW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 11. " DHYST_NVENCSWR ,Client NVENCSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " DHYST_MPCORER ,Client MPCORER is treated as a dynamic hysteresis client" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x08 26. " DHYST_DISPLAYT ,Client DISPLAYT is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 25. " DHYST_GPUSWR ,Client GPUSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 24. " DHYST_GPUSRD ,Client GPUSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " DHYST_A9AVPSCW ,Client A9AVPSCW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 22. " DHYST_A9AVPSCR ,Client A9AVPSCR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 21. " DHYST_TSECSWR ,Client TSECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " DHYST_TSECSRD ,Client TSECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 17. " DHYST_ISPWBB ,Client ISPWBB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 16. " DHYST_ISPWAB ,Client ISPWAB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " DHYST_ISPRAB ,Client ISPRAB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 13. " DHYST_XUSB_DEVW ,Client XUSB DEVW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 12. " DHYST_XUSB_DEVR ,Client XUSB DEVR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " DHYST_XUSB_HOSTW ,Client XUSB HOSTW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 10. " DHYST_XUSB_HOSTR ,Client XUSB HOSTR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 7. " DHYST_ISPWB ,Client ISPWB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " DHYST_ISPWA ,Client ISPWA is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 4. " DHYST_ISPRA ,Client ISPRA is treated as a dynamic hysteresis client" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x0C 31. " DHYST_NVJPGSWR ,Client NVJPGSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 30. " DHYST_NVJPGSRD ,Client NVJPGSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 27. " DHYST_APEW ,Client APEW is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " DHYST_APER ,Client APER is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 25. " DHYST_NVDECSWR ,Client NVDECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 24. " DHYST_NVDECSRD ,Client NVDECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " DHYST_DISPLAYD ,Client DISPLAYD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 18. " DHYST_VIW ,Client VIW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 13. " DHYST_VICSWR ,Client VICSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " DHYST_VICSRD ,Client VICSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 7. " DHYST_SDMMCWAB ,Client SDMMCWAB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 6. " DHYST_SDMMCW ,Client SDMMCW is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " DHYST_SDMMCWAA ,Client SDMMCWAA is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 4. " DHYST_SDMMCWA ,Client SDMMCWA is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 3. " DHYST_SDMMCRAB ,Client SDMMCRAB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " DHYST_SDMMCR ,Client SDMMCR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 1. " DHYST_SDMMCRAA ,Client SDMMCRAA is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 0. " DHYST_SDMMCRA ,Client SDMMCRA is treated as a dynamic hysteresis client" "Disabled,Enabled" line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x10 9. " DHYST_GPUSWR2 ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 8. " DHYST_GPUSRD2 ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 7. " DHYST_TSECSWRB ,Client TSECSWRB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 6. " DHYST_TSECSRDB ,Client TSECSRDB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 5. " DHYST_ETRW ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 4. " DHYST_ETRR ,Client ETRR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " DHYST_AXIAPW ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 2. " DHYST_AXIAPR ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 1. " DHYST_SESWR ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " DHYST_SESRD ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled" group.long 0xBF0++0x03 line.long 0x00 "EMEM_ARB_DHYSTERESIS_5_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x00 3. " DHYST_NVDECSRD1 ,Client NVDECSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 2. " DHYST_VICSRD1 ,Client VICSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " DHYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DHYST_APEDMAW ,Client APEDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled" group.long 0xBCC++0x03 line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Control Register For Dynamic Hysteresis Logic" bitfld.long 0x00 31. " DHYST_ENABLE ,Dynamic hysteresis logic enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " DHYST_BW_MON_INTERVAL ,Bandwidth monitor interval for dynamic hysteresis" "8 MCLK,16 MCLK,32 MCLK,64 MCLK" group.long 0xBD0++0x1F line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 0" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0 ,DHYST delay bin 0" line.long 0x04 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 1" hexmask.long.word 0x04 0.--11. 1. " DHYST_DELAY_BIN_1 ,DHYST delay bin 1" line.long 0x08 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 2" hexmask.long.word 0x08 0.--11. 1. " DHYST_DELAY_BIN_2 ,DHYST delay bin 2" line.long 0x0C "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 3" hexmask.long.word 0x0C 0.--11. 1. " DHYST_DELAY_BIN_3 ,DHYST delay bin 3" line.long 0x10 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 4" hexmask.long.word 0x10 0.--11. 1. " DHYST_DELAY_BIN_4 ,DHYST delay bin 4" line.long 0x14 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 5" hexmask.long.word 0x14 0.--11. 1. " DHYST_DELAY_BIN_5 ,DHYST delay bin 5" line.long 0x18 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 6" hexmask.long.word 0x18 0.--11. 1. " DHYST_DELAY_BIN_6 ,DHYST delay bin 6" line.long 0x1C "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 7" hexmask.long.word 0x1C 0.--11. 1. " DHYST_DELAY_BIN_7 ,DHYST delay bin 7" group.long 0xA60++0x03 line.long 0x00 "BPMPPC_EXTRA_SNAP_LEVELS_0,BPMPPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPPC ,Response clock-enable override for partition client BPMPPC" "Disabled,Enabled" group.long 0xA70++0x07 line.long 0x00 "SCEPC_EXTRA_SNAP_LEVELS_0,SCEPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SCEPC ,Response clock-enable override for partition client SCEPC" "Disabled,Enabled" line.long 0x04 "SCEDMAPC_EXTRA_SNAP_LEVELS_0,SCEDMAPC Extra Snap Levels 0" bitfld.long 0x04 3. " RCLKEN_OVERRIDE_SCEDMAPC ,Response clock-enable override for partition client SCEDMAPC" "Disabled,Enabled" group.long 0x2BC++0x03 line.long 0x00 "FTOP_EXTRA_SNAP_LEVELS_0,FTOP Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_FTOP ,Response clock-enable override for partition client FTOP" "Disabled,Enabled" group.long 0xA80++0x03 line.long 0x00 "VICPC3_EXTRA_SNAP_LEVELS_0,VICPC3 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC3 ,Response clock-enable override for partition client VICPC3" "Disabled,Enabled" group.long 0xA3C++0x03 line.long 0x00 "JPG_EXTRA_SNAP_LEVELS_0,JPG Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_JPG ,Response clock-enable override for partition client JPG" "Disabled,Enabled" group.long 0xA14++0x03 line.long 0x00 "HOST_EXTRA_SNAP_LEVELS_0,HOST Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HOST ,Response clock-enable override for partition client HOST" "Disabled,Enabled" group.long 0x2AC++0x03 line.long 0x00 "DIS_EXTRA_SNAP_LEVELS_0,DIS Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS ,Response clock-enable override for partition client DIS" "Disabled,Enabled" group.long 0xA78++0x03 line.long 0x00 "APEDMAPC_EXTRA_SNAP_LEVELS_0,APEDMAPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APEDMAPC ,Response clock-enable override for partition client APEDMAPC" "Disabled,Enabled" group.long 0xA1C++0x03 line.long 0x00 "VICPC_EXTRA_SNAP_LEVELS_0,VICPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC ,Response clock-enable override for partition client VICPC" "Disabled,Enabled" group.long 0xA58++0x03 line.long 0x00 "UFSHCPC_EXTRA_SNAP_LEVELS_0,UFSHCPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_UFSHCPC ,RCLKEN override UFSHCPC" "Disabled,Enabled" group.long 0xA6C++0x03 line.long 0x00 "AONDMAPC_EXTRA_SNAP_LEVELS_0,AONDMAPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONDMAPC ,Response clock-enable override for partition client AONDMAPC" "Disabled,Enabled" endif sif (!cpuis("TEGRAX2")) group.long 0x228++0x0F line.long 0x00 "SMMU_TRANSLATION_ENABLE_0_0,Per-Client SMMU Translation Enables" bitfld.long 0x00 31. " SMMU_SATAR_ENABLE ,Enable client SATAR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 30. " SMMU_PPCSAHBSLVR_ENABLE ,Enable client PPCSAHBSLVR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 29. " SMMU_PPCSAHBDMAR_ENABLE ,Enable client PPCSAHBDMAR to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SMMU_NVENCSRD_ENABLE ,Enable client NVENCSRD to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 23. " SMMU_HOST1XR_ENABLE ,Enable client HOST1XR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 22. " SMMU_HOST1XDMAR_ENABLE ,Enable client HOST1XDMAR to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SMMU_HDAR_ENABLE ,Enable client HDAR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 17. " SMMU_DISPLAYHCB_ENABLE ,Enable client DISPLAYHCB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 16. " SMMU_DISPLAYHC_ENABLE ,Enable client DISPLAYHC to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SMMU_AVPCARM7R_ENABLE ,Enable client AVPCARM7R to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 14. " SMMU_AFIR_ENABLE ,Enable client AFIR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 6. " SMMU_DISPLAY0CB_ENABLE ,Enable client DISPLAY0CB to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SMMU_DISPLAY0C_ENABLE ,Enable client DISPLAY0C to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 4. " SMMU_DISPLAY0BB_ENABLE ,Enable client DISPLAY0BB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 3. " SMMU_DISPLAY0B_ENABLE ,Enable client DISPLAY0B to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SMMU_DISPLAY0AB_ENABLE ,Enable client DISPLAY0AB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 1. " SMMU_DISPLAY0A_ENABLE ,Enable client DISPLAY0A to be translated by SMMU" "Disabled,Enabled" line.long 0x04 "SMMU_TRANSLATION_ENABLE_1_0,Per-Client SMMU Translation Enables" bitfld.long 0x04 29. " SMMU_SATAW_ENABLE ,Enable client SATAW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 28. " SMMU_PPCSAHBSLVW_ENABLE ,Enable client PPCSAHBSLVW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 27. " SMMU_PPCSAHBDMAW_ENABLE ,Enable client PPCSAHBDMAW to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " SMMU_HOST1XW_ENABLE ,Enable client HOST1XW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 21. " SMMU_HDAW_ENABLE ,Enable client HDAW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 18. " SMMU_AVPCARM7W_ENABLE ,Enable client AVPCARM7W to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " SMMU_AFIW_ENABLE ,Enable client AFIW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 11. " SMMU_NVENCSWR_ENABLE ,Enable client NVENCSWR to be translated by SMMU" "Disabled,Enabled" line.long 0x08 "SMMU_TRANSLATION_ENABLE_2_0,Per-Client SMMU Translation Enables" bitfld.long 0x08 26. " SMMU_DISPLAYT_ENABLE ,Enable client DISPLAYT to be translated by SMMU" "Disabled,Enabled" rbitfld.long 0x08 25. " SMMU_GPUSWR_ENABLE ,GPU translation is handled by SWID" "Disabled,Enabled" rbitfld.long 0x08 24. " SMMU_GPUSRD_ENABLE ,GPU translation is handled by SWID" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " SMMU_TSECSWR_ENABLE ,Enable client TSECSWR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 20. " MMU_TSECSRD_ENABLE ,Enable client TSECSRD to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 17. " SMMU_ISPWBB_ENABLE ,Enable client ISPWBB to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " SMMU_ISPWAB_ENABLE ,Enable client ISPWAB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 14. " SMMU_ISPRAB_ENABLE ,Enable client ISPRAB to be translated by SMMU" "DIsabled,Enabled" bitfld.long 0x08 13. " SMMU_XUSB_DEVW_ENABLE ,Enable client XUSB DEVW to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " SMMU_XUSB_DEVR_ENABLE ,Enable client XUSB DEVR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 11. " SMMU_XUSB_HOSTW_ENABLE ,Enable client XUSB HOSTW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 10. " SMMU_XUSB_HOSTR_ENABLE ,Enable client XUSB HOSTR to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " SMMU_ISPWB_ENABLE ,Enable client ISPWB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 6. " SMMU_ISPWA_ENABLE ,Enable client ISPWA to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 4. " SMMU_ISPRA_ENABLE ,Enable client ISPRA to be translated by SMMU" "Disabled,Enabled" line.long 0x0C "SMMU_TRANSLATION_ENABLE_3_0,Per-Client SMMU Translation Enables" bitfld.long 0x0C 31. " SMMU_NVJPGSWR_ENABLE ,Enable client NVJPGSWR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 30. " SMMU_NVJPGSRD_ENABLE ,Enable client NVJPGSRD to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 27. " SMMU_APEW_ENABLE ,Enable client APEW to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " SMMU_APER_ENABLE ,Enable client APER to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 25. " SMMU_NVDECSWR_ENABLE ,Enable client NVDECSWR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 24. " SMMU_NVDECSRD_ENABLE ,Enable client NVDECSRD to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " SMMU_DISPLAYD_ENABLE ,Enable client DISPLAYD to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 18. " SMMU_VIW_ENABLE ,Client VIW translation to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 13. " SMMU_VICSWR_ENABLE ,Enable client VICSWR to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " SMMU_VICSRD_ENABLE ,Enable client VICSRD to be translated by SMMU" "DIsabled,Enabled" bitfld.long 0x0C 7. " SMMU_SDMMCWAB_ENABLE ,Enable client SDMMCWAB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 6. " SMMU_SDMMCW_ENABLE ,Enable client SDMMCW to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " SMMU_SDMMWAA_ENABLE ,Enable client SDMMCWAA to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 4. " SMMU_SDMMCWA_ENABLE ,Enable client SDMMCWA to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 3. " SMMU_SDMMCRAB_ENABLE ,Enable client SDMMCRAB to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " SMMU_SDMMCR_ENABLE ,Enable client SDMMCR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 1. " SMMU_SDMMCRAA_ENABLE ,Enable client SDMMCRAA to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 0. " SMMU_SDMMCRA_ENABLE ,Enable client SDMMCRA to be translated by SMMU" "Disabled,Enabled" textline " " width 23. if (((per.l(ad:0x7001C000+0x238))&0x80000000)==0x80000000) group.long 0x238++0x03 line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register" bitfld.long 0x00 31. " AFI_SMMU_ENABLE ,AFI translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " AFI_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " AFI_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " AFI_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " AFI_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x238++0x03 line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register" bitfld.long 0x00 31. " AFI_SMMU_ENABLE ,AFI translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x23C))&0x80000000)==0x80000000) group.long 0x23C++0x03 line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register" bitfld.long 0x00 31. " AVPC_SMMU_ENABLE ,AVPC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " AVPC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x23C++0x03 line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register" bitfld.long 0x00 31. " AVPC_SMMU_ENABLE ,AVPC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x240))&0x80000000)==0x80000000) group.long 0x240++0x03 line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register" bitfld.long 0x00 31. " DC_SMMU_ENABLE ,DC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " DC_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " DC_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " DC_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " DC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x240++0x03 line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register" bitfld.long 0x00 31. " DC_SMMU_ENABLE ,DC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x244))&0x80000000)==0x80000000) group.long 0x244++0x03 line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register" bitfld.long 0x00 31. " DCB_SMMU_ENABLE ,DCB translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " DCB_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " DCB_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " DCB_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " DCB_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x244++0x03 line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register" bitfld.long 0x00 31. " DCB_SMMU_ENABLE ,DCB translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x250))&0x80000000)==0x80000000) group.long 0x250++0x03 line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register" bitfld.long 0x00 31. " HC_SMMU_ENABLE ,HC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " HC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x250++0x03 line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register" bitfld.long 0x00 31. " HC_SMMU_ENABLE ,HC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x254))&0x80000000)==0x80000000) group.long 0x254++0x03 line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register" bitfld.long 0x00 31. " HDA_SMMU_ENABLE ,HDA translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " HDA_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " HDA_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " HDA_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " HDA_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x254++0x03 line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register" bitfld.long 0x00 31. " HDA_SMMU_ENABLE ,HDA translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x258))&0x80000000)==0x80000000) group.long 0x258++0x03 line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register" bitfld.long 0x00 31. " ISP2_SMMU_ENABLE ,ISP2 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " ISP2_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " ISP2_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " ISP2_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " ISP2_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x258++0x03 line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register" bitfld.long 0x00 31. " ISP2_SMMU_ENABLE ,ISP2 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x264))&0x80000000)==0x80000000) group.long 0x264++0x03 line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register" bitfld.long 0x00 31. " NVENC_SMMU_ENABLE ,NVENC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " NVENC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x264++0x03 line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register" bitfld.long 0x00 31. " MSENC_SMMU_ENABLE ,NVENC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x268))&0x80000000)==0x80000000) group.long 0x268++0x03 line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register" bitfld.long 0x00 31. " NV_SMMU_ENABLE ,NV translation enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " NV_ASID ,ASID to use for NV translation" "0,1,2,3" else group.long 0x268++0x03 line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register" bitfld.long 0x00 31. " NV_SMMU_ENABLE ,NV translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x26C))&0x80000000)==0x80000000) group.long 0x26C++0x03 line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register" bitfld.long 0x00 31. " NV2_SMMU_ENABLE ,NV2 translation enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " NV2_ASID ,ASID to use for NV2 translation" "0,1,2,3" else group.long 0x26C++0x03 line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register" bitfld.long 0x00 31. " NV2_SMMU_ENABLE ,NV2 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x270))&0x80000000)==0x80000000) group.long 0x270++0x03 line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register" bitfld.long 0x00 31. " PPCS_SMMU_ENABLE ,PPCS translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PPCS_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x270++0x03 line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register" bitfld.long 0x00 31. " PPCS_SMMU_ENABLE ,PPCS translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x274))&0x80000000)==0x80000000) group.long 0x274++0x03 line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register" bitfld.long 0x00 31. " SATA_SMMU_ENABLE ,SATA translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SATA_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SATA_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SATA_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SATA_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x274++0x03 line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register" bitfld.long 0x00 31. " SATA_SMMU_ENABLE ,SATA translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x280))&0x80000000)==0x80000000) group.long 0x280++0x03 line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register" bitfld.long 0x00 31. " VI_SMMU_ENABLE ,VI translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " VI_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " VI_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " VI_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " VI_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x280++0x03 line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register" bitfld.long 0x00 31. " VI_SMMU_ENABLE ,VI translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x284))&0x80000000)==0x80000000) group.long 0x284++0x03 line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register" bitfld.long 0x00 31. " VIC_SMMU_ENABLE ,VIC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " VIC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x284++0x03 line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register" bitfld.long 0x00 31. " VIC_SMMU_ENABLE ,VIC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x288))&0x80000000)==0x80000000) group.long 0x288++0x03 line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register" bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " XUSB_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " XUSB_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " XUSB_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " XUSB_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x288++0x03 line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register" bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x28C))&0x80000000)==0x80000000) group.long 0x28C++0x03 line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register" bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE ,XUSB DEV translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " XUSB_DEV_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " XUSB_DEV_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " XUSB_DEV_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " XUSB_DEV_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x28C++0x03 line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register" bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE ,XUSB DEV translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x294))&0x80000000)==0x80000000) group.long 0x294++0x03 line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register" bitfld.long 0x00 31. " TSEC_DEV_SMMU_ENABLE ,TSEC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TSEC_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " TSEC_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " TSEC_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " TSEC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x294++0x03 line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register" bitfld.long 0x00 31. " TSEC_SMMU_ENABLE ,TSEC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0x298))&0x80000000)==0x80000000) group.long 0x298++0x03 line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register" bitfld.long 0x00 31. " SMMU_ENABLE ,PPCS1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x298++0x03 line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register" bitfld.long 0x00 31. " PPCS1_SMMU_ENABLE ,PPCS1 translation enable" "Disabled,Enabled" endif endif width 34. textline " " sif (cpuis("TEGRAX2")) group.long 0x404++0x03 line.long 0x00 "USBX_EXTRA_SNAP_LEVELS_0,USBX Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBX ,Response clock-enable override for partition client USBX" "Disabled,Enabled" group.long 0x2B8++0x03 line.long 0x00 "PCX_EXTRA_SNAP_LEVELS_0,PCX Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_PCX ,Response clock-enable override for partition client PCX" "Disabled,Enabled" group.long 0xE08++0x03 line.long 0x00 "MSE2_EXTRA_SNAP_LEVELS_0,MSE2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE2 ,Response clock-enable override for partition client MSE2" "Disabled,Enabled" group.long 0xA7C++0x03 line.long 0x00 "VICPC2_EXTRA_SNAP_LEVELS_0,VICPC2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC2 ,Response clock-enable override for partition client VICPC2" "Disabled,Enabled" group.long 0xA4C++0x03 line.long 0x00 "DFD_EXTRA_SNAP_LEVELS_0,DFD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DFD ,Response clock-enable override for partition client DFD" "Disabled,Enabled" group.long 0xE00++0x03 line.long 0x00 "NVD2_EXTRA_SNAP_LEVELS_0,NVD2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD2 ,Response clock-enable override for partition client NVD2" "Disabled,Enabled" group.long 0xA44++0x03 line.long 0x00 "SDM_EXTRA_SNAP_LEVELS_0,SDM Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM ,Response clock-enable override for partition client SDM" "Disabled,Enabled" group.long 0x2A4++0x03 line.long 0x00 "APB_EXTRA_SNAP_LEVELS_0,APB Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APB ,Response clock-enable override for partition client APB" "Disabled,Enabled" group.long 0xA08++0x03 line.long 0x00 "ISP_EXTRA_SNAP_LEVELS_0,ISP Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_ISP ,Response clock-enable override for partition client ISP" "Disabled,Enabled" group.long 0xA18++0x03 line.long 0x00 "USBD_EXTRA_SNAP_LEVELS_0,USBD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBD ,Response clock-enable override for partition client USBD" "Disabled,Enabled" group.long 0x40C++0x03 line.long 0x00 "MSE_EXTRA_SNAP_LEVELS_0,MSE Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE ,Response clock-enable override for partition client MSE" "Disabled,Enabled" group.long 0xA10++0x03 line.long 0x00 "AUD_EXTRA_SNAP_LEVELS_0,AUD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AUD ,Response clock-enable override for partition client AUD" "Disabled,Enabled" group.long 0xA54++0x03 line.long 0x00 "NIC_EXTRA_SNAP_LEVELS_0,NIC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NIC ,Response clock-enable override for partition client NIC" "Disabled,Enabled" group.long 0xA40++0x03 line.long 0x00 "GK2_EXTRA_SNAP_LEVELS_0,GK2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK2 ,Response clock-enable override for partition client GK2" "Disabled,Enabled" group.long 0xA64++0x03 line.long 0x00 "BPMPDMAPC_EXTRA_SNAP_LEVELS_0,BPMPDMAPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPDMAPC ,Response clock-enable override for partition client BPMPDMAPC" "Disabled,Enabled" group.long 0xE04++0x03 line.long 0x00 "NVD3_EXTRA_SNAP_LEVELS_0,NVD3 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD3 ,Response clock-enable override for partition client NVD3" "Disabled,Enabled" group.long 0x2C0++0x03 line.long 0x00 "SAX_EXTRA_SNAP_LEVELS_0,SAX Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SAX ,Response clock-enable override for partition client SAX" "Disabled,Enabled" group.long 0xA5C++0x03 line.long 0x00 "EQOSPC_EXTRA_SNAP_LEVELS_0,EQOSPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_EQOSPC ,Response clock-enable override for partition client EQOSPC" "Disabled,Enabled" group.long 0xA38++0x03 line.long 0x00 "NVD_EXTRA_SNAP_LEVELS_0,NVD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD ,Response clock-enable override for partition client NVD" "Disabled,Enabled" group.long 0xA50++0x03 line.long 0x00 "SDM1_EXTRA_SNAP_LEVELS_0,SDM1 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM1 ,Response clock-enable override for partition client SDM1" "Disabled,Enabled" group.long 0xA48++0x03 line.long 0x00 "HDAPC_EXTRA_SNAP_LEVELS_0,HDAPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HDAPC ,Response clock-enable override for partition client HDAPC" "Disabled,Enabled" group.long 0xA68++0x03 line.long 0x00 "AONPC_EXTRA_SNAP_LEVELS_0,AONPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONPC ,Response clock-enable override for partition client AONPC" "Disabled,Enabled" group.long 0xA04++0x03 line.long 0x00 "SD_EXTRA_SNAP_LEVELS_0,SD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SD ,Response clock-enable override for partition client SD" "Disabled,Enabled" group.long 0xA84++0x03 line.long 0x00 "DIS2_EXTRA_SNAP_LEVELS_0,DIS2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS2 ,Response clock-enable override for partition client DIS2" "Disabled,Enabled" group.long 0x2D8++0x03 line.long 0x00 "VE_EXTRA_SNAP_LEVELS_0,VE Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VE ,Response clock-enable override for partition client VE" "Disabled,Enabled" group.long 0xA00++0x03 line.long 0x00 "GK_EXTRA_SNAP_LEVELS_0,GK Extra Snap Levels 0" bitfld.long 0x00 31. " GPU_ENABLE_OOO_RESPONSES ,Enable response mode for GPU and GPU2 read AXICIFs" "Disabled,Enabled" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK ,Response clock-enable override for partition client GK" "Disabled,Enabled" textline " " endif sif (!cpuis("TEGRAX2")) group.long 0x418++0x03 line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE_0,Memory Controller VPR Override Register" bitfld.long 0x00 31. " SDMMC3A_VPR_OVERRIDE ,SDMMC3A VPR override" "Disabled,Enabled" bitfld.long 0x00 30. " SDMMC2A_VPR_OVERRIDE ,SDMMC2A VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " SDMMC1A_VPR_OVERRIDE ,SDMMC1A VPR override" "Disabled,Enabled" bitfld.long 0x00 26. " DC1_VPR_OVERRIDE ,DC1 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PPCS1_VPR_OVERRIDE ,PPCS1 VPR override" "Disabled,Enabled" bitfld.long 0x00 22. " TSEC_VPR_OVERRIDE ,TSEC VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " XUSB_DEV_VPR_OVERRIDE ,XUSB SEV VPR override" "Disabled,Enabled" bitfld.long 0x00 19. " XUSB_HOST_VPR_OVERRIDE ,XUSB HOST VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " VIC_VPR_OVERRIDE ,VIC VPR override" "Disabled,Enabled" bitfld.long 0x00 17. " VI_VPR_OVERRIDE ,VI VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SATA_VPR_OVERRIDE ,SATA VPR override" "Disabled,Enabled" bitfld.long 0x00 14. " PPCS_VPR_OVERRIDE ,PPCS VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " NVENC_VPR_OVERRIDE ,NVENC VPR override" "Disabled,Enabled" bitfld.long 0x00 9. " MPCORE_VPR_OVERRIDE ,MPCORE VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " ISP2_VPR_OVERRIDE ,ISP2 VPR override" "Disabled,Enabled" bitfld.long 0x00 7. " HDA_VPR_OVERRIDE ,HDA VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " HC_VPR_OVERRIDE ,HC VPR override" "Disabled,Enabled" bitfld.long 0x00 3. " DCB_VPR_OVERRIDE ,DCB VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DC_VPR_OVERRIDE ,DC VPR override" "Disabled,Enabled" bitfld.long 0x00 1. " AVPC_VPR_OVERRIDE ,AVPC VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AFI_VPR_OVERRIDE ,AFI VPR override" "Disabled,Enabled" group.long 0x590++0x03 line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE1_0,Memory Controller VPR OVERRIDE Register" bitfld.long 0x00 16. " NVDEC1_VPR_OVERRIDE ,NVDEC1 VPR override" "Disabled,Enabled" bitfld.long 0x00 15. " TSECB1_VPR_OVERRIDE ,TSECB11 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TSEC1_VPR_OVERRIDE ,TSEC11 VPR override" "Disabled,Enabled" bitfld.long 0x00 13. " TSECB_VPR_OVERRIDE ,TSECB1 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ETR_VPR_OVERRIDE ,ETR1 VPR override" "Disabled,Enabled" bitfld.long 0x00 11. " AXIAP_VPR_OVERRIDE ,AXIAP1 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SE1_VPR_OVERRIDE ,SE11 VPR override" "Disabled,Enabled" bitfld.long 0x00 9. " HC1_VPR_OVERRIDE ,HC11 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " NVJPG_VPR_OVERRIDE ,NVJPG1 VPR override" "Disabled,Enabled" bitfld.long 0x00 7. " SE_VPR_OVERRIDE ,SE VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " APE_VPR_OVERRIDE ,APE VPR override" "Disabled,Enabled" bitfld.long 0x00 5. " NVDEC_VPR_OVERRIDE ,NVDEC VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PPCS2_VPR_OVERRIDE ,PPCS2 VPR override" "Disabled,Enabled" bitfld.long 0x00 3. " GPUB_VPR_OVERRIDE ,GBUP VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " GPU_VPR_OVERRIDE ,GPU VPR override" "Disabled,Enabled" bitfld.long 0x00 1. " ISP2B_VPR_OVERRIDE ,ISP2B VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SDMMC4A_VPR_OVERRIDE ,SDMMC4A VPR override" "Disabled,Enabled" textline " " group.long 0x600++0x03 line.long 0x00 "SMMUTLB_SET_SELECTION_MASK_0_0,TLB Set Selection Mask" hexmask.long.word 0x00 15.--23. 1. " TLB_SET_SELECTION_MASK_0 ,TLB set selection mask 0" group.long 0x608++0x03 line.long 0x00 "DISPLAY_SNAP_RING_0,Display Arbiter Ring Selection" bitfld.long 0x00 31. " DISPLAY_SNAP_RING_WRITE_ACCESS ,Display snap ring write access" "Enabled,Disabled" bitfld.long 0x00 1. " DISB_SNAP_RING ,DISB snap ring" "RING0,RING1" textline " " bitfld.long 0x00 0. " DIS_SNAP_RING ,DIS snap ring" "RING0,RING1" endif sif (cpuis("TEGRAX2")) group.long 0x648++0x07 line.long 0x00 "VIDEO_PROTECT_BOM_0,Video Protect BOM 0" hexmask.long.word 0x00 20.--31. 0x10 " VIDEO_PROTECT_BOM ,Base address for the VPR address space" line.long 0x04 "VIDEO_PROTECT_SIZE_MB_0,Video Protect Size MB 0" hexmask.long.word 0x04 0.--11. 1. " VIDEO_PROTECT_SIZE_MB ,Size of the VPR region in megabytes" group.long 0x978++0x03 line.long 0x00 "VIDEO_PROTECT_BOM_ADR_HI_0,Video Protect BOM ADR HI 0" bitfld.long 0x00 0.--1. " VIDEO_PROTECT_BOM_ADR_HI ,Higher address bits beyond 32 bits of byte-aligned address of the base address of VPR space" "0,1,2,3" group.long 0x650++0x03 line.long 0x00 "VIDEO_PROTECT_REG_CTRL_0,Control Video Protect Register 0" bitfld.long 0x00 1. " VIDEO_PROTECT_ALLOW_TZ_WRITE_ACCESS ,Allow TrustZone writes to VPR aperature registers" "Disabled,Enabled" bitfld.long 0x00 0. " VIDEO_PROTECT_WRITE_ACCESS ,Sticky bit to control the writes to all VPR aperture registers including this one" "RING0,RING1" textline " " endif rgroup.long 0x654++0x03 line.long 0x00 "ERR_VPR_STATUS_0,Memory Controller Error VPR Status 0" bitfld.long 0x00 20.--21. " ERR_VPR_ADR_HI ,Higher address bits of erring address" "b00,b01,b10,b11" bitfld.long 0x00 18. " ERR_VPR_SWAP ,Error VPR swap" "0,1" textline " " bitfld.long 0x00 17. " ERR_VPR_SECURITY ,Error VPR security" "Nonsecure,Secure" bitfld.long 0x00 16. " ERR_VPR_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_VPR_ADR1 ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111" hexmask.long.byte 0x00 0.--7. 1. " ERR_VPR_ID ,Client identifier" rgroup.long 0x658++0x03 line.long 0x00 "ERR_VPR_ADR_0,Memory Controller Lower Bits Of Erring Address" textline " " sif (cpuis("TEGRAX2")) group.long 0x9BC++0x03 line.long 0x00 "MC_SECURITY_CFG3_0,Memory Controller Security Configuration 3 0" bitfld.long 0x00 0.--1. " SECURITY_BOM_HI ,Higher address bits of the base of the secured region limited to MB granularity" "0,1,2,3" group.long 0xF80++0x07 line.long 0x00 "MC_REGIF_CONFIG_0,Memory Controller REGIF Configuration 0" bitfld.long 0x00 16.--17. " ENABLE_REGIF_HUB ,Enable REGIF HUB" "0,1,2,3" bitfld.long 0x00 8.--11. " ENABLE_REGIF_MC ,Enable REGIF memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ENABLE_REGIF_EMC ,Enable REGIF EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MC_REGIF_BROADCAST_0,Memory Controller REGIF Broadcast 0" bitfld.long 0x04 31. " LOCK_REGIF_CONFIG ,Lock REGIF configuration" "Disabled,Enabled" bitfld.long 0x04 24.--25. " ENABLE_REGIF_BROADCAST_HUB_SID ,Enable REGIF broadcast HUB SID" "0,1,2,3" bitfld.long 0x04 16.--17. " ENABLE_REGIF_BROADCAST_HUB ,Enable REGIF broadcast HUB" "0,1,2,3" textline " " bitfld.long 0x04 8.--11. " ENABLE_REGIF_BROADCAST_MC ,Enable REGIF broadcast memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " ENABLE_REGIF_BROADCAST_EMC ,Enable REGIF broadcast EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xF90++0x0F line.long 0x00 "MC_REGIF_UNICAST0_0,Memory Controller REGIF UNICAST0 0" bitfld.long 0x00 16.--17. " ENABLE_REGIF_UNICAST0_HUB ,Enable REGIF UNICAST0 HUB" "0,1,2,3" bitfld.long 0x00 8.--11. " ENABLE_REGIF_UNICAST0_MC ,Enable REGIF UNICAST0 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ENABLE_REGIF_UNICAST0_EMC ,Enable REGIF UNICAST0 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MC_REGIF_UNICAST1_0,Memory Controller REGIF UNICAST1 0" bitfld.long 0x04 16.--17. " ENABLE_REGIF_UNICAST1_HUB ,Enable REGIF UNICAST1 HUB" "0,1,2,3" bitfld.long 0x04 8.--11. " ENABLE_REGIF_UNICAST1_MC ,Enable REGIF UNICAST1 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " ENABLE_REGIF_UNICAST1_EMC ,Enable REGIF UNICAST1 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "MC_REGIF_UNICAST2_0,Memory Controller REGIF UNICAST2 0" bitfld.long 0x08 16.--17. " ENABLE_REGIF_UNICAST2_HUB ,Enable REGIF UNICAST2 HUB" "0,1,2,3" bitfld.long 0x08 8.--11. " ENABLE_REGIF_UNICAST2_MC ,Enable REGIF UNICAST2 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " ENABLE_REGIF_UNICAST2_EMC ,Enable REGIF UNICAST2 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "MC_REGIF_UNICAST3_0,Memory Controller REGIF UNICAST2 0" bitfld.long 0x0C 16.--17. " ENABLE_REGIF_UNICAST3_HUB ,Enable REGIF UNICAST3 HUB" "0,1,2,3" bitfld.long 0x0C 8.--11. " ENABLE_REGIF_UNICAST3_MC ,Enable REGIF UNICAST3 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " ENABLE_REGIF_UNICAST3_EMC ,Enable REGIF UNICAST3 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xF2C++0x03 line.long 0x00 "MC_HUBC_INTSTATUS_0,Memory Controller HUBC Interrupt Status 0" bitfld.long 0x00 0. " SCRUB_ECC_WR_ACK_INT ,SCRUB ECC WR ACK Interrupt" "Clear,Set" group.long 0xF24++0x07 line.long 0x00 "MC_GLOBAL_INTSTATUS_0,Memory Controller Global Interrupt Status 0" bitfld.long 0x00 24. " COMMON_INTR ,Common interrupt" "Clear,Set" bitfld.long 0x00 17. " HUB1_INTR ,Hub 1 interrupt" "Clear,Set" bitfld.long 0x00 16. " HUB0_INTR ,Hub 0 interrupt" "Clear,Set" textline " " bitfld.long 0x00 3. " MC3_INTR ,Channel 3 interrupt" "Clear,Set" bitfld.long 0x00 2. " MC2_INTR ,Channel 2 interrupt" "Clear,Set" bitfld.long 0x00 1. " MC1_INTR ,Channel 1 interrupt" "Clear,Set" textline " " bitfld.long 0x00 0. " MC0_INTR ,Channel 0 interrupt" "Clear,Set" line.long 0x04 "MC_GLOBAL_CRITICAL_INTSTATUS_0,Memory Controller Global Critical Interrupt Status 0" bitfld.long 0x04 24. " COMMON_CRITICAL_INTR ,Common critical interrupt" "Clear,Set" bitfld.long 0x04 17. " HUB1_CRITICAL_INTR ,Hub 1 critical interrupt" "Clear,Set" bitfld.long 0x04 16. " HUB0_CRITICAL_INTR ,Hub 0 critical interrupt." "Clear,Set" textline " " bitfld.long 0x04 3. " MC3_CRITICAL_INTR ,Channel 3 critical interrupt." "Clear,Set" bitfld.long 0x04 2. " MC2_CRITICAL_INTR ,Channel 2 critical interrupt." "Clear,Set" bitfld.long 0x04 1. " MC1_CRITICAL_INTR ,Channel 1 critical interrupt" "Clear,Set" textline " " bitfld.long 0x04 0. " MC0_CRITICAL_INTR ,Channel 0 critical interrupt" "Clear,Set" endif sif (!cpuis("TEGRAX2")) group.long 0x964++0x03 line.long 0x00 "IRAM_REG_CTRL_0,Access Control Register For IRAM Aperture Programming" bitfld.long 0x00 0. " IRAM_CFG_WRITE_ACCESS ,IRAM configuration write access disable" "No,Yes" group.long 0x664++0x03 line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0 ,Access Control Bit For EMEM_CFG Registers" bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS ,EMEM configuration write access disable" "No,Yes" group.long 0x668++0x07 line.long 0x00 "TZ_SECURITY_CTRL_0,Trustzone Security Control Register" bitfld.long 0x00 0. " CPU_STRICT_TZ_APERTURE_CHECK ,CPU strict TrustZone aperture check enable" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Configuration" bitfld.long 0x04 31. " LIMIT_OUTSTANDING_RING3 ,Limit outstanding RING3" "Disabled,Enabled" bitfld.long 0x04 30. " LIMIT_DURING_HOLDHOFF_OVERRIDE_RING3 ,Limit holdhoff override RING3" "Disabled,Enabled" textline " " hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3 ,Current number of outstanding requests" hexmask.long.word 0x04 0.--8. 1. " ARB_MAX_OUTSTANDING_RING3 ,Maximum number of requests allowed in the arbiter when limit is enabled" group.long 0x670++0x0B line.long 0x00 "SEC_CARVEOUT_BOM_0,Memory Controller Sec Carve Out Bom 0" hexmask.long.word 0x00 20.--31. 0x10 " SEC_CARVEOUT_BOM ,Base address for the SEC carve out address space" line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,Memory Controller Sec Carve Out Size MB 0" hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB ,Size of the SEC carve out region" line.long 0x08 "SEC_CARVEOUT_REG_CTRL_0,Memory Controller Sec Carve Out Register Control 0" bitfld.long 0x08 0. " SEC_CARVEOUT_WRITE_ACCESS ,Sticky bit to control the writes to the other SEC Carve Out registers" "Enabled,Disabled" rgroup.long 0x67C++0x07 line.long 0x00 "ERR_SEC_STATUS_0,Memory Controller Error Sec Status 0" bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI ,Higher address bits of Erring address whose lower bits are available in the ERR_ADR register" "b00,b01,b10,b11" bitfld.long 0x00 18. " ERR_SEC_SWAP ,ERR_SEC_SWAP" "0,1" textline " " bitfld.long 0x00 17. " ERR_SEC_SECURITY ,Set if transaction was secure" "Nonsecure,Secure" bitfld.long 0x00 16. " ERR_SEC_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_SEC_ADR1 ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111" hexmask.long.byte 0x00 0.--6. 1. " ERR_SEC_ID ,Client identifier of the access that caused the error" line.long 0x04 "ERR_SEC_ADR_0,Memory Controller Lower Address Bits Of Erring Address" group.long 0x684++0x07 line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Config" bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS ,Number of idle ticks before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "STUTTER_CONTROL_0,Memory Controller Stutter Control 0" bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR ,Slowing the EMC during dynamic self refresh" "Disabled,Enabled" group.long 0x6B0++0x17 line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,Snap Arbiter Throttle" bitfld.long 0x00 16.--20. " NISO_THROTTLE_CYCLES_HIGH ,Cycles of throttle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " NISO_THROTTLE_CYCLES ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,Highest Ring Input NISO Outstanding Request Limiter" bitfld.long 0x04 31. " LIMIT_OUTSTANDING_NISO ,Requests into NISO are throttled after the request count reaches ARB_MAX_OUTSTANDING_NISO" "Disabled,Enabled" bitfld.long 0x04 30. " LIMIT_DURING_HOLDOFF_OVERRIDE_NISO ,Overrides the limiting of NISO transactions" "Disabled,Enabled" textline " " hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO ,Current number of outstanding requests" hexmask.long.word 0x04 0.--8. 1. " ARB_MAX_OUTSTANDING_NISO ,The maximum number of requests allowed in the arbiter" line.long 0x08 "EMEM_ARB_NISO_THROTTLE_MASK_0,Highest Ring Input NISO Throttle Mask" bitfld.long 0x08 29. " NISO_THROTTLE_MASK_VICPC ,Include VICPC in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 28. " NISO_THROTTLE_MASK_USBD ,Include USBD in the NISO meta-client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " NISO_THROTTLE_MASK_HOST ,Include HOST in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 23. " NISO_THROTTLE_MASK_SD ,Include SD in the NISO meta client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " NISO_THROTTLE_MASK_GK ,Include GK in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 19. " NISO_THROTTLE_MASK_MSE ,Include MSE in the NISO meta-client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " NISO_THROTTLE_MASK_USBX ,Include USBX in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 9. " NISO_THROTTLE_MASK_SAX ,Include SAX in the NISO meta-client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " NISO_THROTTLE_MASK_PCX ,Include PCX in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 3. " NISO_THROTTLE_MASK_AVP ,Include AVP in the NISO meta-client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " NISO_THROTTLE_MASK_APB ,Include APB in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 1. " NISO_THROTTLE_MASK_AHB ,Include AHB in the NISO meta-client group for throttling" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_RING0_THROTTLE_MASK_0,Ring0 Input Throttle Mask" bitfld.long 0x0C 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,Enable ARB_OUTSTANDING count includes requests in SMMU" "Disabled,Enabled" bitfld.long 0x0C 15. " RING0_THROTTLE_MASK_RING1_OUTPUT ,Include the RING1 output in the ring0 meta-client group throttling" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " RING0_THROTTLE_MASK_RING1 ,Include the RING1 in the ring0 meta-client group throttling" "Disabled,Enabled" bitfld.long 0x0C 6. " RING0_THROTTLE_MASK_FTOP ,Include FTOP in the ring0 meta-client group throttling" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " RING0_THROTTLE_MASK_PTC ,Include MEM in the ring0 meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x0C 0. " RING0_THROTTLE_MASK_MPCORER ,Include MPCORER in the ring0 meta-client group for throttling" "Disabled,Enabled" textline " " line.long 0x10 "EMEM_ARB_TIMING_RFCPB_0,DRAM Timing TRFCPB" hexmask.long.word 0x10 0.--8. 1. " RFCPB ,Minimum number of cycles between a per-bank auto refresh command and a subsequent per-bank refresh or activate command to that bank" line.long 0x14 "EMEM_ARB_TIMING_CCDMW_0,DRAM Timing TCCDMW" bitfld.long 0x14 0.--5. " CCDMW ,DRAM CAS to CAS delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x6F0++0x07 line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,Per Bank Refresh High Priority Control" hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH ,If the number of requests to open pages is greater or equal this value a per-bank refresh is favoured to be issued" textline " " hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP ,If the number of REFpb requests is less or equal this value per-bank refreshes become low-priority" hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP ,If the number of REFpb requests is greater or equal this value per-bank refreshes become high-priority" line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,Bank Control" bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE ,REFpb simultaneous issue to more than one rank disable" "Enabled,Disabled" textline " " hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,If the number of REFpb requests is less or equal this value per-bank refreshes will force bank closure" hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE ,If the number of REFpb requests is greater or equal this value per-bank refreshes will force bank closure" group.long 0x968++0x03 line.long 0x00 "EMEM_ARB_OVERRIDE_1_0,Memory Controller EMEM ARB Override 1_0" bitfld.long 0x00 11. " MULTI_BANK_REPLAY_OVERRIDE ,Multi-bank replay override enable" "Disabled,Enabled" bitfld.long 0x00 5. " EXPIRE_UPDATE_DEADLOCK_OVERRIDE ,Expire update deadlock override" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--4. " CPU_READ_PAGE_OPEN_POLICY ,CPU read page open policy" "Disabled,All,Eack_active,Early_ack_enable,Po_hint,?..." bitfld.long 0x00 0.--1. " CPU_WRITE_PAGE_OPEN_POLICY ,CPU write page open policy" "Disabled,All,Eack_hint,?..." group.long 0x970++0x07 line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register" bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE ,TSECB flush enable" "Disabled,Enabled" bitfld.long 0x00 12. " ETR_FLUSH_ENABLE ,ETR flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE ,AXIAP flush enable" "Disabled,Enabled" bitfld.long 0x00 8. " NVJPG_FLUSH_ENABLE ,NVJPG flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SE_FLUSH_ENABLE ,SE flush enable" "Disabled,Enabled" bitfld.long 0x00 6. " APE_FLUSH_ENABLE ,APE flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE ,NVDEC flush enable" "Disabled,Enabled" bitfld.long 0x00 2. " GPU_FLUSH_ENABLE ,GPU flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE ,ISP2B flush enable" "Disabled,Enabled" bitfld.long 0x00 0. " SDMMC4A_FLUSH_ENABLE ,SDMMC4A flush enable" "Disabled,Enabled" line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Status Register" bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS ,TSECB hot reset status" "Done,In progress" bitfld.long 0x04 12. " ETR_HOTRESET_STATUS ,ETR hot reset status" "Done,In progress" textline " " bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS ,AXIAP hot reset status" "Done,In progress" bitfld.long 0x04 8. " NVJPG_HOTRESET_STATUS ,NVJPG hot reset status" "Done,In progress" textline " " bitfld.long 0x04 7. " SE_HOTRESET_STATUS ,SE hot reset status" "Done,In progress" bitfld.long 0x04 6. " APE_HOTRESET_STATUS ,APE hot reset status" "Done,In progress" textline " " bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS ,NVDEC hot reset status" "Done,In progress" bitfld.long 0x04 2. " GPU_HOTRESET_STATUS ,GPU hot reset status" "Done,In progress" textline " " bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS ,ISP2B hot reset status" "Done,In progress" bitfld.long 0x04 0. " SDMMC4A_HOTRESET_STATUS ,SDMMC4A hot reset status" "Done,In progress" group.long 0x984++0x07 line.long 0x00 "VIDEO_PROTECT_GPU_OVERRIDE_0_0,Memory Controller Video Protect GPU Override 0 0" line.long 0x04 "VIDEO_PROTECT_GPU_OVERRIDE_1_0,Memory Controller Video Protect GPU Override 1 0" hexmask.long.word 0x04 0.--15. 1. " VIDEO_PROTECT_GPU_OVERRIDE_1 ,Video protect GPU override 1" group.long 0x9A0++0x0F line.long 0x00 "MTS_CARVEOUT_BOM_0,Memory Controller MTS Carve Out BOM 0" hexmask.long.word 0x00 20.--31. 1. " MTS_CARVEOUT_BOM ,MTS carve out BOM" line.long 0x04 "MTS_CARVEOUT_SIZE_MB_0,Memory Controller MTS Carve Out Size MB 0" hexmask.long.word 0x04 0.--11. 1. " MTS_CARVEOUT_SIZE_MB ,MTS carve out size MB" line.long 0x08 "MTS_CARVEOUT_ADR_HI_0,Memory Controller Mts Carve Out Address Hi 0" bitfld.long 0x08 0.--1. " MTS_CARVEOUT_BOM_HI ,MTS carve out BOM Hi" "0,1,2,3" line.long 0x0C "MTS_CARVEOUT_REG_CTRL_0,Memory Controller MTS carve out reg control 0" bitfld.long 0x0C 0. " MTS_CARVEOUT_WRITE_ACCESS ,MTS carve out write access" "Enabled,Disabled" group.long 0x9B8++0x07 line.long 0x00 "SMMU_PTC_FLUSH_1_0,Page Table Cache Flush Address Register" bitfld.long 0x00 0.--1. " PTC_FLUSH_ADR_HI ,Physical address of PTE group to match for address flushes" "b00,b01,b10,b11" line.long 0x04 "SECURITY_CFG3_0,Secure/Carveout Region Configuration" bitfld.long 0x04 0.--1. " SECURITY_BOM_HI ,Higher address bits beyond 32 bits of the base of the secured region" "b00,b01,b10,b11" textline " " width 26. if (((per.l(ad:0x7001C000+0x664))&0x01)==0x00) group.long 0x9C0++0x0F line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0" hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0 ,EMEM bank mask 0" line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1" hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1 ,EMEM bank mask 1" line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2" hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2 ,EMEM bank mask 2" line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3" bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..." else rgroup.long 0x9C0++0x0F line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0" hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0 ,EMEM bank mask 0" line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1" hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1 ,EMEM bank mask 1" line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2" hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2 ,EMEM bank mask 2" line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3" bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..." endif group.long 0x9D4++0x03 line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Memory Controller Sec Carve Out Address Hi 0" bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Higher address bits beyond 32 bits of the base address of the SEC carve out space" "b00,b01,b10,b11" if (((per.l(ad:0x7001C000+0xA88))&0x80000000)==0x80000000) group.long 0xA88++0x03 line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register" bitfld.long 0x00 31. " DC1_SMMU_ENABLE ,PPCS translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " DC1_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " DC1_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " DC1_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " DC1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xA88++0x03 line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register" bitfld.long 0x00 31. " DC1_SMMU_ENABLE ,PPCS translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xA94))&0x80000000)==0x80000000) group.long 0xA94++0x03 line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SDMMC1A_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SDMMC1A_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SDMMC1A_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SDMMC1A_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xA94++0x03 line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xA98))&0x80000000)==0x80000000) group.long 0xA98++0x03 line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SDMMC2A_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SDMMC2A_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SDMMC2A_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SDMMC2A_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xA98++0x03 line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xA9C))&0x80000000)==0x80000000) group.long 0xA9C++0x03 line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SDMMC3A_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SDMMC3A_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SDMMC3A_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SDMMC3A_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xA9C++0x03 line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAA0))&0x80000000)==0x80000000) group.long 0xAA0++0x03 line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SDMMC4A_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SDMMC4A_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SDMMC4A_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SDMMC4A_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAA0++0x03 line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAA4))&0x80000000)==0x80000000) group.long 0xAA4++0x03 line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register" bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE ,ISP2B translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " ISP2B_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " ISP2B_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " ISP2B_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " ISP2B_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAA4++0x03 line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register" bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE ,ISP2B translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAA8))&0x80000000)==0x80000000) group.long 0xAA8++0x03 line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register" bitfld.long 0x00 31. " GPU_SMMU_ENABLE ,GPU translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " GPU_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " GPU_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " GPU_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " GPU_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAA8++0x03 line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register" bitfld.long 0x00 31. " GPU_SMMU_ENABLE ,GPU translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAAC))&0x80000000)==0x80000000) group.long 0xAAC++0x03 line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register" bitfld.long 0x00 31. " GPUB_SMMU_ENABLE ,GPUB translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " GPUB_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " GPUB_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " GPUB_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " GPUB_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAAC++0x03 line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register" bitfld.long 0x00 31. " GPUB_SMMU_ENABLE ,GPUB translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAB0))&0x80000000)==0x80000000) group.long 0xAB0++0x03 line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register" bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE ,PPCS2 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PPCS2_ASID ,ASID to use for PPCS2 translation" else group.long 0xAB0++0x03 line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register" bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE ,PPCS2 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAB4))&0x80000000)==0x80000000) group.long 0xAB4++0x03 line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register" bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE ,NVDEC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " NVDEC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAB4++0x03 line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register" bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE ,NVDEC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAB8))&0x80000000)==0x80000000) group.long 0xAB8++0x03 line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register" bitfld.long 0x00 31. " APE_SMMU_ENABLE ,APE translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " APE_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAB8++0x03 line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register" bitfld.long 0x00 31. " APE_SMMU_ENABLE ,APE translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xABC))&0x80000000)==0x80000000) group.long 0xABC++0x03 line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register" bitfld.long 0x00 31. " SE_SMMU_ENABLE ,SE translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " SE_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xABC++0x03 line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register" bitfld.long 0x00 31. " SE_SMMU_ENABLE ,SE translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAC0))&0x80000000)==0x80000000) group.long 0xAC0++0x03 line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register" bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE ,NVJPG translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " NVJPG_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAC0++0x03 line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register" bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE ,NVJPG translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAC4))&0x80000000)==0x80000000) group.long 0xAC4++0x03 line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register" bitfld.long 0x00 31. " HC1_SMMU_ENABLE ,HC1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " HC1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAC4++0x03 line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register" bitfld.long 0x00 31. " HC1_SMMU_ENABLE ,HC1 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAC8))&0x80000000)==0x80000000) group.long 0xAC8++0x03 line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register" bitfld.long 0x00 31. " SE1_SMMU_ENABLE ,SE1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " SE1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAC8++0x03 line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register" bitfld.long 0x00 31. " SE1_SMMU_ENABLE ,SE1 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xACC))&0x80000000)==0x80000000) group.long 0xACC++0x03 line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register" bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE ,AXIAP translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " AXIAP_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " AXIAP_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " AXIAP_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " AXIAP_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xACC++0x03 line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register" bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE ,AXIAP translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAD0))&0x80000000)==0x80000000) group.long 0xAD0++0x03 line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register" bitfld.long 0x00 31. " ETR_SMMU_ENABLE ,ETR translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " ETR_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " ETR_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " ETR_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " ETR_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAD0++0x03 line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register" bitfld.long 0x00 31. " ETR_SMMU_ENABLE ,ETR translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAD4))&0x80000000)==0x80000000) group.long 0xAD4++0x03 line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register" bitfld.long 0x00 31. " TSECB_SMMU_ENABLE ,TSECB translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TSECB_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " TSECB_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " TSECB_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " TSECB_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAD4++0x03 line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register" bitfld.long 0x00 31. " TSECB_SMMU_ENABLE ,TSECB translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAD8))&0x80000000)==0x80000000) group.long 0xAD8++0x03 line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register" bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE ,TSEC1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TSEC1_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " TSEC1_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " TSEC1_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " TSEC1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAD8++0x03 line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register" bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE ,TSEC1 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xADC))&0x80000000)==0x80000000) group.long 0xADC++0x03 line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register" bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE ,TSECB1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TSECB1_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " TSECB1_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " TSECB1_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " TSECB1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xADC++0x03 line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register" bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE ,TSECB1 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001C000+0xAE0))&0x80000000)==0x80000000) group.long 0xAE0++0x03 line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register" bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE ,NVDEC1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " NVDEC1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAE0++0x03 line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register" bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE ,NVDEC1 translation enable" "Disabled,Enabled" endif textline " " width 34. group.long 0xB84++0x03 line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,Highest Ring Input NISO Throttle Mask" bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,Include DFD in the NISO meta-client group for throttling" "Not included,Included" bitfld.long 0x00 4. " NISO_THROTTLE_MASK_HDAPC ,Include HDAPC,in the NISO meta-client group for throttling" "Not included,Included" bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM ,Include SDM in the NISO meta-client group for throttling" "Not included,Included" textline " " bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,Include GK2 in the NISO meta-client group for throttling" "Not included,Included" bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG ,Include JPG in the NISO meta-client group for throttling" "Not included,Included" group.long 0xB84++0x0F line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,Per-Client Hysteresis Settings" bitfld.long 0x00 9. " HYST_GPUSWR2 ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 8. " HYST_GPUSRD2 ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 7. " HYST_TSECSWRB ,Client TSECWRB is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " HYST_TSECRDB ,Client RSECRDB is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 5. " HYST_ETRW ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " HYST_ETTR ,Client ETTR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " HYST_AXIAPW ,Client AXIAPW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 2. " HYST_AXIAPR ,Client AXIAPR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " HYST_SESWR ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HYST_SESRD ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled" group.long 0xB94++0x0F line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings" bitfld.long 0x00 9. " ISO_GPUSWR2 ,Client GPUSWR2 is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 8. " ISO_GPUSRD2 ,Client GPUSRD2 is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 7. " ISO_TSECSWRB ,Client TSECWRB is treated as a isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ISO_TSECRDB ,Client RSECRDB is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 5. " ISO_ETRW ,Client ETRW is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 4. " ISO_ETTR ,Client ETTR is treated as a isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ISO_AXIAPW ,Client AXIAPW is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 2. " ISO_AXIAPR ,Client AXIAPR is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 1. " ISO_SESWR ,Client SESWR is treated as a isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ISO_SESRD ,Client SESRD is treated as a isochronous client" "Disabled,Enabled" group.long 0xB94++0x0F line.long 0x00 "EMEM_SMMU_TRANSLATION_ENABLE_4_0,Per-Client Translation Settings" rbitfld.long 0x00 9. " SMMU_GPUSWR2_ENABLE ,Client GPUSWR2 translate by SMMU enable" ",Enabled" rbitfld.long 0x00 8. " SMMU_GPUSRD2_ENABLE ,Client GPUSRD2 translate by SMMU enable" ",Enabled" bitfld.long 0x00 7. " SMMU_TSECSWRB_ENABLE ,Client TSECWRB translate by SMMU enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SMMU_TSECRDB_ENABLE ,Client RSECRDB translate by SMMU enable" "Disabled,Enabled" bitfld.long 0x00 5. " SMMU_ETRW_ENABLE ,Client ETRW translate by SMMU enable" "Disabled,Enabled" bitfld.long 0x00 4. " SMMU_ETTR_ENABLE ,Client ETTR translate by SMMU enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SMMU_AXIAPW_ENABLE ,Client AXIAPW translate by SMMU enable" "Disabled,Enabled" bitfld.long 0x00 2. " SMMU_AXIAPR_ENABLE ,Client AXIAPR translate by SMMU enable" "Disabled,Enabled" bitfld.long 0x00 1. " SMMU_SESWR_ENABLE ,Client SESWR translate by SMMU enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SMMU_SESRD_ENABLE ,Client SESRD translate by SMMU enable" "Disabled,Enabled" textline " " group.long 0xBB0++0x13 line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x00 31. " DHYST_SATAR ,Client SATAR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 30. " DHYST_PPCSAHBSLVR ,Client PPCSAHBSLVR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 29. " DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " DHYST_NVENCSRD ,Client NVENCSRD is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 23. " DHYST_HOST1XR ,Client HOST1XR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 22. " DHYST_HOST1XDMAR ,Client HOST1XDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DHYST_HDAR ,Client HDAR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 17. " DHYST_DISPLAYHCB ,Client DISPLAYHCB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 16. " DHYST_DISPLAYHC ,Client DISPLAYHC is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " DHYST_AVPCARM7R ,Client AVPCARM7R is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 14. " DHYST_AFIR ,Client AFIR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 6. " DHYST_DISPLAY0CB ,Client DISPLAY0CB is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DHYST_DISPLAY0C ,Client DISPLAY0C is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " DHYST_DISPLAY0BB ,Client DISPLAY0BB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 3. " DHYST_DISPLAY0B ,Client DISPLAY0B is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DHYST_DISPLAY0AB ,Client DISPLAY0AB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " DHYST_DISPLAY0A ,Client DISPLAY0A is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 0. " DHYST_PTCR ,Client PTCR is treated as an dynamic hysteresis client" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x04 29. " DHYST_SATAW ,Client SATAW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 28. " DHYST_PPCSAHBSLVW ,Client PPCSAHBSLVW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 27. " DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " DHYST_MPCOREW ,Client MPCOREW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 24. " DHYST_MPCORELPW ,Client MPCORELPW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 22. " DHYST_HOST1XW ,Client HOST1XW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " DHYST_HDAW ,Client HDAW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 18. " DHYST_AVPCARM7W ,Client AVPCARM7W is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 17. " DHYST_AFIW ,Client AFIW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " DHYST_NVENCSWR ,Client NVENCSWR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 7. " DHYST_MPCORER ,Client MPCORER is treated as an dynamic hysteresis client" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_DHYSTERESIS_2_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x08 26. " DHYST_DISPLAYT ,Client DISPLAYT is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 25. " DHYST_GPUSWR ,Client GPUSWR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 24. " DHYST_GPUSRD ,Client GPSURD is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " DHYST_TSECSWR ,Client TSECSWR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 20. " DHYST_TSECSRD ,Client TSECSRD is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 17. " DHYST_ISPWBB ,Client ISPWBB is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " DHYST_ISPWAB ,Client ISPWAB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 14. " DHYST_ISPRAB ,Client ISPRAB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 13. " DHYST_XUSB_DEVW ,Client XUSB DEVW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " DHYST_XUSB_DEVR ,Client XUSB DEVR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 11. " DHYST_XUSB_HOSTW ,Client XUSB HOSTW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 10. " DHYST_XUSB_HOSTR ,Client XUSB HOSTR is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " DHYST_ISPWB ,Client ISPWB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 6. " DHYST_ISPWA ,Client ISPWA is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 4. " DHYST_ISPRA ,Client ISPRA is treated as an dynamic hysteresis client" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x0C 31. " DHYST_NVJPGSWR ,Client NVJPGSWR is treated as dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 30. " DHYST_NVJPGSRD ,Client NVJPGSRD is treated as dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 27. " DHYST_APEW ,Client APEW is treated as dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " DHYST_APER ,Client APER is treated as dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 25. " DHYST_NVDECSWR ,Client NVDECSWR is treated as dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 24. " DHYST_NVDECSRD ,Client NVDECSRD is treated as dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " DHYST_DISPLAYD ,Client DISPLAYD is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 18. " DHYST_VIW ,Client VIW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 13. " DHYST_VICSWR ,Client VICSWR is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " DHYST_VICSRD ,Client VICSRD is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 7. " DHYST_SDMMCWAB ,Client SDMMCWAB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 6. " DHYST_SDMMCW ,Client SDMMCW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " DHYST_SDMMCWAA ,Client SDMMCWAA is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 4. " DHYST_SDMMCWA ,Client SDMMCWA is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 3. " DHYST_SDMMCRAB ,Client SDMMCRAB is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " DHYST_SDMMCR ,Client SDMMCR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 1. " DHYST_SDMMCRAA ,Client SDMMCRAA is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 0. " DHYST_SDMCRA ,Client SDMCRA is treated as an dynamic hysteresis client" "Disabled,Enabled" line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Hysteresis Settings" bitfld.long 0x10 9. " DHYST_GPUSWR2 ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 8. " DHYST_GPUSRD2 ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 7. " DHYST_TSECSWRB ,Client TSECWRB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 6. " DHYST_TSECRDB ,Client RSECRDB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 5. " DHYST_ETRW ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 4. " DHYST_ETTR ,Client ETTR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " DHYST_AXIAPW ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 2. " DHYST_AXIAPR ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 1. " DHYST_SESWR ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " DHYST_SESRD ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled" group.long 0xBCC++0x03 line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Dynamic Hysteresis Logic Control Register" bitfld.long 0x00 31. " DHYST_ENABLE ,Dynamic hysteresis logic enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " DHYST_BW_MON_INTERVAL ,Dynamic hysteresis bandwidth monitor interval" "8 MCLK,16 MCLK,32 MCLK,64 MCLK" group.long 0xBD0++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 0" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0 ,Timeout delay" group.long 0xBD4++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 1" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_1 ,Timeout delay" group.long 0xBD8++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 2" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_2 ,Timeout delay" group.long 0xBDC++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 3" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_3 ,Timeout delay" group.long 0xBE0++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 4" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_4 ,Timeout delay" group.long 0xBE4++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 5" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_5 ,Timeout delay" group.long 0xBE8++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 6" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_6 ,Timeout delay" group.long 0xBEC++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 7" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_7 ,Timeout delay" textline " " width 25. group.long 0x9DC++0x03 line.long 0x00 "DA_CONFIG0_0,DA Configuration Register" bitfld.long 0x00 0. " NEW_ARB_SCHEME ,New DA arbitration scheme use enable" "Disabled,Enabled" textline " " group.long 0x4E0++0x03 line.long 0x00 "AHB_PTSA_MIN_0,AHB PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_AHB ,DDA minimum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x54C++0x03 line.long 0x00 "AUD_PTSA_MIN_0,AUD PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_AUD ,DDA minimum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x44C++0x03 line.long 0x00 "MLL_MPCORER_PTSA_RATE_0,MLL MPCORER PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MLL_MPCORER ,DDA rate for MLL_MPCORER PTSA" group.long 0x440++0x03 line.long 0x00 "RING2_PTSA_RATE_0,RING2 PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING2 ,DDA rate for RING2 PTSA" group.long 0x530++0x03 line.long 0x00 "USBD_PTSA_RATE_0,USBD PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBD ,DDA rate for USBD PTSA" group.long 0x528++0x03 line.long 0x00 "USBX_PTSA_MIN_0,USBX PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_USBX ,DDA minimum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x534++0x03 line.long 0x00 "USBD_PTSA_MIN_0,USBD PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_USBD ,DDA minimum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4F0++0x03 line.long 0x00 "APB_PTSA_MAX_0,APB PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_APB ,DDA maximum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x584++0x03 line.long 0x00 "JPG_PTSA_RATE_0,JPG PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_JPG ,DDA rate for JPG PTSA" group.long 0x420++0x03 line.long 0x00 "DIS_PTSA_MIN_0,DIS PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_DIS ,DDA minimum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4FC++0x03 line.long 0x00 "AVP_PTSA_MAX_0,AVP PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_AVP ,DDA maximum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4F4++0x03 line.long 0x00 "AVP_PTSA_RATE_0,AVP PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AVP ,DDA rate for AVP PTSA" group.long 0x480++0x03 line.long 0x00 "RING1_PTSA_MIN_0,RING1 PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_RING1 ,DDA minimum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x424++0x03 line.long 0x00 "DIS_PTSA_MAX_0,DIS PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_DIS ,DDA maximum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4D8++0x03 line.long 0x00 "SD_PTSA_MAX_0,SD PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_SD ,DDA maximum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4C4++0x03 line.long 0x00 "MSE_PTSA_RATE_0,MSE PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MSE ,DDA rate for MSE PTSA" group.long 0x558++0x03 line.long 0x00 "VICPC_PTSA_MIN_0,VICPC PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_VICPC ,DDA minimum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4B4++0x03 line.long 0x00 "PCX_PTSA_MAX_0,PCX PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_PCX ,DDA maximum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4A0++0x03 line.long 0x00 "ISP_PTSA_RATE_0,ISP PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_ISP ,DDA rate for ISP PTSA" group.long 0x48C++0x03 line.long 0x00 "A9AVPPC_PTSA_MIN_0,A9AVPPC PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_A9AVPPC ,DDA minimum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x448++0x03 line.long 0x00 "RING2_PTSA_MAX_0,RING2 PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_RING2 ,DDA maximum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x548++0x03 line.long 0x00 "AUD_PTSA_RATE_0,AUD PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AUD ,DDA rate for AUD PTSA" group.long 0x51C++0x03 line.long 0x00 "HOST_PTSA_MIN_0,HOST PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_HOST ,DDA minimum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x454++0x03 line.long 0x00 "MLL_MPCORER_PTSA_MAX_0,MLL_MPCORER PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_MLL_MPCORER ,DDA maximum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4D4++0x03 line.long 0x00 "SD_PTSA_MIN_0,SD PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_SD ,DDA minimum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x47C++0x03 line.long 0x00 "RING1_PTSA_RATE_0,RING1 PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING1 ,DDA rate for RING1 PTSA" group.long 0x588++0x03 line.long 0x00 "JPG_PTSA_MIN_0,JPG PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_JPG ,DDA minimum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x62C++0x03 line.long 0x00 "HDAPC_PTSA_MIN_0,HDAPC PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_HDAPC ,DDA minimum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4F8++0x03 line.long 0x00 "AVP_PTSA_MIN_0,AVP PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_AVP ,DDA minimum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x58C++0x03 line.long 0x00 "JPG_PTSA_MAX_0,JPG PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_JPG ,DDA maximum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x43C++0x03 line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_VE ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x43C++0x03 line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_VE ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x63C++0x03 line.long 0x00 "DFD_PTSA_MAX_0,DFD PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_DFD ,DDA maximum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x554++0x03 line.long 0x00 "VICPC_PTSA_RATE_0,VICPC PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VICPC ,DDA rate for VICPC PTSA" group.long 0x544++0x03 line.long 0x00 "GK_PTSA_MAX_0,GK PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_GK ,DDA maximum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x55C++0x03 line.long 0x00 "VICPC_PTSA_MAX_0,VICPC PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_VICPC ,DDA maximum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x624++0x03 line.long 0x00 "SDM_PTSA_MAX_0,SDM PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_SDM ,DDA maximum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4B8++0x03 line.long 0x00 "SAX_PTSA_RATE_0,SAX PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SAX ,DDA rate for SAX PTSA" group.long 0x4B0++0x03 line.long 0x00 "PCX_PTSA_MIN_0,PCX PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_PCX ,DDA minimum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4EC++0x03 line.long 0x00 "APB_PTSA_MIN_0,APB PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_APB ,DDA minimum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x614++0x03 line.long 0x00 "GK2_PTSA_MIN_0,GK2 PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_GK2 ,DDA minimum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4AC++0x03 line.long 0x00 "PCX_PTSA_RATE_0,PCX PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_PCX ,DDA rate for PCX PTSA" group.long 0x484++0x03 line.long 0x00 "RING1_PTSA_MAX_0,RING1 PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_RING1 ,DDA maximum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x628++0x03 line.long 0x00 "HDAPC_PTSA_RATE_0,HDAPC PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HDAPC ,DDA rate for HDAPC PTSA" group.long 0x450++0x03 line.long 0x00 "MLL_MPCORER_PTSA_MIN_0,MLL_MPCORER PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_MLL_MPCORER ,DDA minimum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x618++0x03 line.long 0x00 "GK2_PTSA_MAX_0,GK2 PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_GK2 ,DDA maximum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x550++0x03 line.long 0x00 "AUD_PTSA_MAX_0,AUD PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_AUD ,DDA maximum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x610++0x03 line.long 0x00 "GK2_PTSA_RATE_0,GK2 PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK2 ,DDA rate for GK2 PTSA" group.long 0x4A8++0x03 line.long 0x00 "ISP_PTSA_MAX_0,ISP PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_ISP ,DDA maximum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x428++0x03 line.long 0x00 "DISB_PTSA_RATE_0,DISB PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DISB ,DDA rate for DISB PTSA" group.long 0x49C++0x03 line.long 0x00 "VE2_PTSA_MAX_0,VE2 PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_VE2 ,DDA maximum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x638++0x03 line.long 0x00 "DFD_PTSA_MIN_0,DFD PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_DFD ,DDA minimum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x50C++0x03 line.long 0x00 "FTOP_PTSA_RATE_0,FTOP PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_FTOP ,DDA rate for FTOP PTSA" group.long 0x488++0x03 line.long 0x00 "A9AVPPC_PTSA_RATE_0,A9AVPPC PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_A9AVPPC ,DDA rate for A9AVPPC PTSA" group.long 0x498++0x03 line.long 0x00 "VE2_PTSA_MIN_0,VE2 PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_VE2 ,DDA minimum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x52C++0x03 line.long 0x00 "USBX_PTSA_MAX_0,USBX PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_USBX ,DDA maximum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x41C++0x03 line.long 0x00 "DIS_PTSA_RATE_0,DIS PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DIS ,DDA rate for DIS PTSA" group.long 0x538++0x03 line.long 0x00 "USBD_PTSA_MAX_0,USBD PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_USBD ,DDA maximum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x490++0x03 line.long 0x00 "A9AVPPC_PTSA_MAX_0,A9AVPPC PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_A9AVPPC ,DDA maximum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x524++0x03 line.long 0x00 "USBX_PTSA_RATE_0,USBX PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBX ,DDA rate for USBX PTSA" group.long 0x514++0x03 line.long 0x00 "FTOP_PTSA_MAX_0,FTOP PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_FTOP ,DDA maximum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x630++0x03 line.long 0x00 "HDAPC_PTSA_MAX_0,HDAPC PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_HDAPC ,DDA maximum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4D0++0x03 line.long 0x00 "SD_PTSA_RATE_0,SD PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SD ,DDA rate for SD PTSA" group.long 0x634++0x03 line.long 0x00 "DFD_PTSA_RATE_0,DFD PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DFD ,DDA rate for DFD PTSA" group.long 0x510++0x03 line.long 0x00 "FTOP_PTSA_MIN_0,FTOP PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_FTOP ,DDA minimum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x61C++0x03 line.long 0x00 "SDM_PTSA_RATE_0,SDM PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SDM ,DDA rate for SDM PTSA" group.long 0x4DC++0x03 line.long 0x00 "AHB_PTSA_RATE_0,AHB PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AHB ,DDA rate for AHB PTSA" group.long 0x460++0x03 line.long 0x00 "SMMU_SMMU_PTSA_MAX_0,SMMU_SMMU PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_SMMU_SMMU ,DDA maximum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x444++0x03 line.long 0x00 "RING2_PTSA_MIN_0,RING2 PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_RING2 ,DDA minimum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x620++0x03 line.long 0x00 "SDM_PTSA_MIN_0,SDM PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_SDM ,DDA minimum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4E8++0x03 line.long 0x00 "APB_PTSA_RATE_0,APB PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_APB ,DDA rate for APB PTSA" group.long 0x4C8++0x03 line.long 0x00 "MSE_PTSA_MIN_0,MSE PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_MSE ,DDA minimum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x518++0x03 line.long 0x00 "HOST_PTSA_RATE_0,HOST PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HOST ,DDA rate for HOST PTSA" group.long 0x434++0x03 line.long 0x00 "VE_PTSA_RATE_0,VE PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE ,DDA rate for VE PTSA" group.long 0x4E4++0x03 line.long 0x00 "AHB_PTSA_MAX_0,AHB PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_AHB ,DDA maximum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4BC++0x03 line.long 0x00 "SAX_PTSA_MIN_0,SAX PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_SAX ,DDA minimum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x45C++0x03 line.long 0x00 "SMMU_SMMU_PTSA_MIN_0,SMMU_SMMU PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_SMMU_SMMU ,DDA minimum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4A4++0x03 line.long 0x00 "ISP_PTSA_MIN_0,ISP PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_ISP ,DDA minimum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x520++0x03 line.long 0x00 "HOST_PTSA_MAX_0,HOST PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_HOST ,DDA maximum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4C0++0x03 line.long 0x00 "SAX_PTSA_MAX_0,SAX PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_SAX ,DDA maximum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x438++0x03 line.long 0x00 "VE_PTSA_MIN_0,VE PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_VE ,DDA minimum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x540++0x03 line.long 0x00 "GK_PTSA_MIN_0,GK PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_GK ,DDA minimum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4CC++0x03 line.long 0x00 "MSE_PTSA_MAX_0,MSE PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_MSE ,DDA maximum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x430++0x03 line.long 0x00 "DISB_PTSA_MAX_0,DISB PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_DISB ,DDA maximum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x42C++0x03 line.long 0x00 "DISB_PTSA_MIN_0,DISB PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_DISB ,DDA minimum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x458++0x03 line.long 0x00 "SMMU_SMMU_PTSA_RATE_0,SMMU_SMMU PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SMMU_SMMU ,DDA rate for SMMU_SMMU PTSA" group.long 0x494++0x03 line.long 0x00 "VE2_PTSA_RATE_0,VE2 PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE2 ,DDA rate for VE2 PTSA" group.long 0x53C++0x03 line.long 0x00 "GK_PTSA_RATE_0,GK PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK ,DDA rate for GK PTSA" textline " " group.long 0x960++0x03 line.long 0x00 "PTSA_GRANT_DECREMENT_0,PTSA Grant Decrement Register" bitfld.long 0x00 12. " PTSA_GRANT_DECREMENT_INT ,Integer portion" "0,1" hexmask.long.word 0x00 0.--11. 1. " PTSA_GRANT_DECREMENT_FRAC ,Fractional portion" textline " " width 39. group.long 0x2E4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_AVPC_0_0,Latency Allowance Settings For AVPC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AVPCARM7W ,Number of ticks a request from AVPCARM7W may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_AVPCARM7R ,Number of ticks a request from AVPCARM7R may wait in the EMEM arbiter before becoming high priority request" group.long 0x3A0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_AXIAP_0_0,Latency Allowance Settings For AXIAP Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AXIAPW ,Number of ticks a request from AXIAPW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_AXIAPR ,Number of ticks a request from AXIAPR may wait in the EMEM arbiter before becoming high priority request" group.long 0x380++0x03 line.long 0x00 "LATENCY_ALLOWANCE_XUSB_1_0,Latency Allowance Settings For XUSB_DEV Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_DEVW ,Number of ticks a request from XUSB_DEVW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_XUSB_DEVR ,Number of ticks a request from XUSB_DEVR may wait in the EMEM arbiter before becoming high priority request" group.long 0x384++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_0_0,Latency Allowance Settings For ISP2B Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRAB ,Number of ticks a request from ISPRAB may wait in the EMEM arbiter before becoming high priority request" group.long 0x3BC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAA_0_0,Latency Allowance Settings For SDMMC2A Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAA ,Number of ticks a request from SDMMCWAA may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SDMMWRAA ,Number of ticks a request from SDMMCRAA may wait in the EMEM arbiter before becoming high priority request" group.long 0x3B8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SDMMCA_0_0,Latency Allowance Settings For SDMMC1A Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWA ,Number of ticks a request from SDMMCWA may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SDMMCRA ,Number of ticks a request from SDMMCRA may wait in the EMEM arbiter before becoming high priority request" group.long 0x370++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ISP2_0_0,Latency Allowance Settings For ISP2 Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRA ,Number of ticks a request from ISPRA may wait in the EMEM arbiter before becoming high priority request" group.long 0x3E0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SE_0_0,Latency Allowance Settings For SE Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SESWR ,Number of ticks a request from SESWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SESRD ,Number of ticks a request from SESRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x374++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ISP2_1_0,Latency Allowance Settings For ISP2 Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWB ,Number of ticks a request from ISPWB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPWA ,Number of ticks a request from ISPWA may wait in the EMEM arbiter before becoming high priority request" group.long 0x2E8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DC_0_0,Latency Allowance Settings For DC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0B ,Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0A ,Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request" group.long 0x394++0x03 line.long 0x00 "LATENCY_ALLOWANCE_VIC_0_0,Latency Allowance Settings For VIC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_VICSWR ,Number of ticks a request from VICSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VICSRD ,Number of ticks a request from VICSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x2F8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DCB_1_0,Latency Allowance Settings For DCB Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0CB ,Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request" group.long 0x3D8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_NVDEC_0_0,Latency Allowance Settings For NVDEC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVDECSWR ,Number of ticks a request from NVDECSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_NVDECSRD ,Number of ticks a request from NVDECSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x2FC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DCB_2_0,Latency Allowance Settings For DCB Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHCB ,Number of ticks a request from DISPLAYHCB may wait in the EMEM arbiter before becoming high priority request" group.long 0x390++0x03 line.long 0x00 "LATENCY_ALLOWANCE_TSEC_0_0,Latency Allowance Settings For TSEC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWR ,Number of ticks a request from TSECSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_TSECSRD ,Number of ticks a request from TSECSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x2F0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DC_2_0,Latency Allowance Settings For DC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAYT ,Number of ticks a request from DISPLAYT may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHC ,Number of ticks a request from DISPLAYHC may wait in the EMEM arbiter before becoming high priority request" group.long 0x694++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0AB_0,Scaled Latency Allowance Settings For DISPLAY0AB" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0AB ,(Hi) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0AB ,(Lo) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request" group.long 0x348++0x03 line.long 0x00 "LATENCY_ALLOWANCE_PPCS_1_0,Latency Allowance Settings For PPCS Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVW ,Number of ticks a request from PPCSAHBSLVW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PPCSAHBDMAW ,Number of ticks a request from PPCSSAHBDMAW may wait in the EMEM arbiter before becoming high priority request" group.long 0x37C++0x03 line.long 0x00 "LATENCY_ALLOWANCE_XUSB_0_0,Latency Allowance Settings For XUSB_HOST Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_HOSTW ,Number of ticks a request from XUSB_HOSTW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_XUSB_HOSTR ,Number of ticks a request from XUSB_HOSTR may wait in the EMEM arbiter before becoming high priority request" group.long 0x344++0x03 line.long 0x00 "LATENCY_ALLOWANCE_PPCS_0_0,Latency Allowance Settings For PPCS Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVR ,Number of ticks a request from PPCSAHBSLVR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PPCSAHBDMAR ,Number of ticks a request from PPCSAHBDMAR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3F0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_TSECB_0_0,Latency Allowance Settings For TSECB Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWRB ,Number of ticks a request from TSECSWRB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_TSECSRDB ,Number of ticks a request from TSECSRDB may wait in the EMEM arbiter before becoming high priority request" group.long 0x2E0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_AFI_0_0,Latency Allowance Settings For AFI Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AFIW ,Number of ticks a request from AFIW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_AFIR ,Number of ticks a request from AFIR may wait in the EMEM arbiter before becoming high priority request" group.long 0x698++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0B_0,Latency Allowance Settings For DISPLAY0B" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0B ,(Hi) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0B ,(Lo) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request" group.long 0x2EC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DC_1_0,Latency Allowance Settings For DC Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0C ,Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request" group.long 0x3DC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_APE_0_0,Latency Allowance Settings For APE Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_APEW ,Number of ticks a request from APEW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_APER ,Number of ticks a request from APER may wait in the EMEM arbiter before becoming high priority request" group.long 0x6A0++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0C_0,Latency Allowance Settings For DISPLAY0C" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0C ,(Hi) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0C ,(Lo) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request" group.long 0x3A4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_A9AVP_0_0,Latency Allowance Settings For A9AVP Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_A9AVPSCW ,Number of ticks a request from A9AVPSCW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_A9AVPSCR ,Number of ticks a request from A9AVPSCR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3E8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_GPU2_0_0,Latency Allowance Settings For GPU Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR2 ,Number of ticks a request from GPUSWR2 may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_GPUSRD2 ,Number of ticks a request from GPUSRD2 may wait in the EMEM arbiter before becoming high priority request" group.long 0x2F4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DCB_0_0,Latency Allowance Settings For DCB Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0BB ,Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0AB ,Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request" group.long 0x314++0x03 line.long 0x00 "LATENCY_ALLOWANCE_HC_1_0,Latency Allowance Settings For HC Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XW ,Number of ticks a request from HOST1XW may wait in the EMEM arbiter before becoming high priority request" group.long 0x3C0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SDMMC_0_0,Latency Allowance Settings For SDMMC3A Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCW ,Number of ticks a request from SDMMCW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SDMMCR ,Number of ticks a request from SDMMCR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3E4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_NVJPG_0_0,Latency Allowance Settings For NVJPG Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVJPGSWR ,Number of ticks a request from NVJPGSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_NVJPGSRD ,Number of ticks a request from NVJPGSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x34C++0x03 line.long 0x00 "LATENCY_ALLOWANCE_PTC_0_0,Latency Allowance Settings For PTC Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PTCR ,Number of ticks a request from PTCR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3EC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ETR_0_0,Latency Allowance Settings For ETR Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ETRW ,Number of ticks a request from ETRW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ETRR ,Number of ticks a request from ETRR may wait in the EMEM arbiter before becoming high priority request" group.long 0x320++0x03 line.long 0x00 "LATENCY_ALLOWANCE_MPCORE_0_0,Latency Allowance Settings For MPCORE Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_MPCOREW ,Number of ticks a request from MPCOREW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_MPCORER ,Number of ticks a request from MPCORER may wait in the EMEM arbiter before becoming high priority request" group.long 0x398++0x03 line.long 0x00 "LATENCY_ALLOWANCE_VI2_0_0,Latency Allowance Settings For VI Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VIW ,Number of ticks a request from VIW may wait in the EMEM arbiter before becoming high priority request" group.long 0x69C++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0BB_0,Latency Allowance Settings For DISPLAY0BB" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0BB ,(Hi) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0BB ,(Lo) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request" group.long 0x6A4++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0CB_0,Latency Allowance Settings For DISPLAY0CB" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0CB ,(Hi) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0CB ,(Lo) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request" group.long 0x350++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SATA_0_0,Latency Allowance Settings For SATA Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SATAW ,Number of ticks a request from SATAW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SATAR ,Number of ticks a request from SATAR may wait in the EMEM arbiter before becoming high priority request" group.long 0x690++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0A_0,Latency Allowance Settings For DISPLAY0A" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0A ,(Hi) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0A ,(Lo) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request" group.long 0x310++0x03 line.long 0x00 "LATENCY_ALLOWANCE_HC_0_0,Latency Allowance Settings For HC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HOST1XR ,Number of ticks a request from HOST1XR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XDMAR ,Number of ticks a request from HOST1XDMAR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3C8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DC_3_0,Latency Allowance Settings For DC Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYD ,Number of ticks a request from DISPLAYD may wait in the EMEM arbiter before becoming high priority request" group.long 0x3AC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_GPU_0_0,Latency Allowance Settings For GPU Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR ,Number of ticks a request from GPUSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_GPUSRD ,Number of ticks a request from GPUSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x3C4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAB_0_0,Latency Allowance Settings For SDNNC4A Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAB ,Number of ticks a request from SDMMCWAB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SDMMCRAB ,Number of ticks a request from SDMMCRAB may wait in the EMEM arbiter before becoming high priority request" group.long 0x388++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_1_0,Latency Allowance Settings For ISP2B Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWBB ,Number of ticks a request from ISPWBB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPWAB ,Number of ticks a request from ISPWAB may wait in the EMEM arbiter before becoming high priority request" group.long 0x328++0x03 line.long 0x00 "LATENCY_ALLOWANCE_NVENC_0_0,Latency Allowance Settings For NVENC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVENCSWR ,Number of ticks a request from NVENCSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_NVENCSRD ,Number of ticks a request from NVENCSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x318++0x03 line.long 0x00 "LATENCY_ALLOWANCE_HDA_0_0,Latency Allowance Settings For HDA Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HDAW ,Number of ticks a request from HDAW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HDAR ,Number of ticks a request from HDAR may wait in the EMEM arbiter before becoming high priority request" endif width 0x0B tree.end tree "EMC0" base ad:0x7001E000 width 21. group.long 0x00++0x13 line.long 0x00 "INSTATUS_0,Interrupt Status Register" sif (cpuis("TEGRAX2")) eventfld.long 0x00 13. " TWEAK_UNDERFLOW_INT ,EMC internal tweak FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 12. " ECC_ERR_BUF_OVF_INT ,ECC Error Buffer overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " ECC_CORR_ERR_INT ,Indicates that ECC logic has detected a correctable error" "No interrupt,Interrupt" eventfld.long 0x00 10. " ECC_UNCORR_ERR_INT ,Indicates that ECC logic has detected an uncorrectable error" "No interrupt,Interrupt" textline " " textfld " " endif eventfld.long 0x00 9. " DLL_LOCK_TIMEOUT_INT ,Indicate a DLL lock timeout has occurred" "No interrupt,Interrupt" eventfld.long 0x00 8. " CCFIFO_OVERFLOW_INT ,Clock change FIFO overflow" "No interrupt,Interrupt" eventfld.long 0x00 7. " DLL_ALARM_INT ,Indicate DLL alarm has been set" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ACCESS_TO_SR_DPD_DEV_INT ,Indicate system attempt to access a self-refresh/deep-powered-down device" "No interrupt,Interrupt" eventfld.long 0x00 5. " MRR_DIVLD_INT ,LPDDR2 MRR data is available to be read" "No interrupt,Interrupt" eventfld.long 0x00 4. " CLKCHANGE_COMPLETE_INT ,CAR/EMC clock-change handshake complete" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " REFRESH_OVERFLOW_INT ,Refresh request overflow timeout" "No interrupt,Interrupt" line.long 0x04 "INTMASK_0,Interrupt Mask Register" sif (cpuis("TEGRAX2")) bitfld.long 0x04 13. " TWEAK_UNDERFLOW_INTMASK ,Mask for tweak FIFO underflow interrupt" "Masked,Unmasked" bitfld.long 0x04 12. " ECC_ERR_BUF_OVF_INTMASK ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked" textline " " bitfld.long 0x04 11. " ECC_CORR_ERR_INTMASK ,Mask for ECC correctable error interrupt" "Masked,Unmasked" bitfld.long 0x04 10. " ECC_UNCORR_ERR_INTMASK ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked" textline " " textfld " " endif bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_INTMASK ,Mask for DLL lock timeout interrupt" "Masked,Unmasked" bitfld.long 0x04 8. " CCFIFO_OVERFLOW_INTMASK ,Mask for clock change FIFO overflow" "Masked,Unmasked" bitfld.long 0x04 7. " DLL_ALARM_INTMASK ,Indicate DLL alarm has been set" "Masked,Unmasked" textline " " bitfld.long 0x04 6. " ACCESS_TO_SR_DPD_DEV_INTMASK ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked" bitfld.long 0x04 5. " MRR_DIVLD_INTMASK ,Mask for MRR data available" "Masked,Unmasked" bitfld.long 0x04 4. " CLKCHANGE_COMPLETE_INTMASK ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked" textline " " bitfld.long 0x04 3. " REFRESH_OVERFLOW_INTMASK ,Mask for refresh request overflow timeout" "Masked,Unmasked" line.long 0x08 "DBG_0,Debug Register" bitfld.long 0x08 31. " AUTOCAL_IGNORE_SWAP ,Registers controlled by autocal FSM do not obey CFG_SWAP setting" "Disabled,Enabled" bitfld.long 0x08 30. " WRITE_ACTIVE_ONLY ,Write active version of the register only" "Disabled,Enabled" bitfld.long 0x08 29. " ALLOW_HOSTIF_DURING_CCFIFO ,Unblock hostif requests for debugging training|DVFS hangs" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " ALLOW_EMC1_PCMACRO_CFG_ACCESS ,EMC1 config access to be sent to the pad macro" "Disabled,Enabled" bitfld.long 0x08 26.--27. " CFG_SWAP ,Configuration swap feature enable" "Active only,Swap,Assembly only,?..." bitfld.long 0x08 25. " AUTOCAL_ALLOW_WRITE_MUX ,Registers controlled by autocal FSM obey WRITE_MUX|WRITE_ACTIVE_ONLY settings" "Disabled,Enabled" textline " " bitfld.long 0x08 24. " CFG_PRIORITY ,Priority of cfg accesses to the DRAM" "Disabled,Enabled" bitfld.long 0x08 13. " SUPPRESS_WRITE_CMD ,Suppress write command sent to DRAM" "Disabled,Enabled" bitfld.long 0x08 12. " SUPPRESS_READ_CMD ,Suppress read command sent to DRAM" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " STRETCH_MRW_RESET ,Stretch MRW RESET command to three clocks" "Disabled,Enabled" bitfld.long 0x08 10. " AP_REQ_BUSY_CTRL ,APC fifo busy signal enable to stall requests to the EMC" "Disabled,Enabled" bitfld.long 0x08 9. " READ_DQM_CTRL ,DQM signal control" "Managed,Always on" textline " " bitfld.long 0x08 2. " FORCE_UPDATE ,Active state update enable" "Disabled,Enabled" bitfld.long 0x08 1. " WRITE_MUX ,Controls state of the writes to the configuration registers" "Assembly,Active" bitfld.long 0x08 0. " READ_MUX ,Controls state of the reads to the configuration registers" "Active,Assembly" line.long 0x0C "CFG_0,Configuration Register" bitfld.long 0x0C 31. " DRAM_CLKSTOP_PD ,DRAM clock stop (power down)" "Disabled,Enabled" bitfld.long 0x0C 30. " DRAM_CLKSTOP_SR ,DRAM clock stop (self-refresh)" "Disabled,Enabled" bitfld.long 0x0C 29. " DRAM_ACPD ,Opportunistic active power down for DRAM controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 28. " DYN_SELF_REF ,DYN_SELF_REF" "Disabled,Enabled" bitfld.long 0x0C 26. " REQACT_ASYNC ,Transfers of activates and transactions from the MC to EMC" "Disabled,Enabled" bitfld.long 0x0C 25. " AUTO_PRE_WR ,MC auto-precharge indication for writes" "Disabled,Enabled" textline " " bitfld.long 0x0C 24. " AUTO_PRE_RD ,MC auto-precharge indication for reads" "Disabled,Enabled" bitfld.long 0x0C 23. " MAN_PRE_WR ,[PMC3] Explicit-precharge in the EMC for writes" "Disabled,Enabled" bitfld.long 0x0C 22. " MAN_PRE_RD ,[PMC3] Explicit-precharge in the EMC for reads" "Disabled,Enabled" textline " " bitfld.long 0x0C 21. " PERIODIC_QRST ,[PMC] Specifies periodic reset FBIO read-data FIFO during normal operation" "Disabled,Enabled" sif (cpuis("TEGRAX2")) bitfld.long 0x0C 19. " WAIT_FOR_NVDISPLAY_READY_B4_CC ,Wait for display ready event to be asserted before acknowledge clock change" "Disabled,Enabled" endif textline " " bitfld.long 0x0C 18. " DSR_VTTGEN_DRV_EN ,Enable VTTGEN controls during DSR" "Disabled,Enabled" bitfld.long 0x0C 16.--17. " EMC2MC_CLK_RATIO ,EMC to MC clock ratio" "2x,1x,4x,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 9. " WAIT_FOR_ISP2B_READY_B4_CC ,Wait for isp2b ready event" "Disabled,Enabled" endif textline " " bitfld.long 0x0C 8. " WAIT_FOR_VI2_READY_B4_CC ,Wait for vi2 ready event" "Disabled,Enabled" bitfld.long 0x0C 7. " WAIT_FOR_ISP2_B4_CC ,Wait for isp2 ready event" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " INVERT_DQM ,Invert DQM polarity" "Not inverted,Inverted" sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 5. " WAIT_FOR_DISPLAYB_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled" bitfld.long 0x0C 4. " WAIT_FOR_DISPLAY_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled" endif line.long 0x10 "ADR_CFG_0,External Memory Address Configuration [System]" bitfld.long 0x10 0. " EMEM_NUMDEV ,Number of populated DRAM devises" "N1,N2" group.long 0x20++0x07 line.long 0x00 "REFCTRL_0,Refresh Control Register" bitfld.long 0x00 31. " REF_VALID ,Enable refresh controller" "Disabled,Enabled" bitfld.long 0x00 0.--1. " DEVICE_REFRESH_DISABLE ,Refresh disable to individual attached device" "0,1,2,3" line.long 0x04 "PIN_0,Controls State Of Selected DRAM Pins" bitfld.long 0x04 17. " PIN_GPIO_EN[1] ,General purpose DRAM I/O[1] enable" "Disabled,Enabled" bitfld.long 0x04 16. " PIN_GPIO_EN[0] ,General purpose DRAM I/O[0] enable" "Disabled,Enabled" bitfld.long 0x04 13. " PIN_GPIO[1] ,General purpose DRAM I/O[1] activate" "Inactive,Active" textline " " bitfld.long 0x04 12. " PIN_GPIO[0] ,General purpose DRAM I/O[0] activate" "Inactive,Active" bitfld.long 0x04 8. " PIN_RESET ,DDR3 RESET# pin level" "Active,Inactive" bitfld.long 0x04 4. " PIN_DQM ,Used to always mask DRAM writes" "Normal,Inactive" textline " " bitfld.long 0x04 2. " PIN_CKE_PER_DEV ,Per device CKE enable" "Disabled,Enabled" bitfld.long 0x04 1. " PIN_CKEB ,Level of the CKEB pin" "Power down,Normal" bitfld.long 0x04 0. " PIN_CKE ,Level of the CKE pin" "Power down,Normal" textline " " group.long 0x28++0x93 line.long 0x00 "TIMING_CONTROL_0,Triggers An Update Of The Timing-related Registers" bitfld.long 0x00 0. " TIMING_UPDATE ,Timing update event" "Disabled,Enabled" line.long 0x04 "RC_0,DRAM RC Timing Parameter" hexmask.long.byte 0x04 0.--6. 1. " RC ,Row cycle time" line.long 0x08 "RFC_0,DRAM RFC Timing Parameter" hexmask.long.word 0x08 0.--9. 1. " RFC ,Auto refresh cycle time" line.long 0x0C "RAS_0,DRAM RAS Timing Parameter" bitfld.long 0x0C 0.--5. " RAS ,Row active time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "RP_0,DRAM RP Timing Parameter" bitfld.long 0x10 0.--5. " RP ,Row precharge time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "R2W_0,DRAM R2W Timing Parameter" bitfld.long 0x14 0.--5. " R2W ,Read to write commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "W2R_0,DRAM W2R Timing Parameter" bitfld.long 0x18 0.--5. " W2R ,Write to read commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "R2P_0,DRAM R2P Timing Parameter" bitfld.long 0x1C 0.--5. " R2P ,Read to precharge commands for the same bank number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x20 "W2P_0,DRAM W2P Timing Parameter" hexmask.long.byte 0x20 0.--6. 1. " W2P ,Write to precharge commands for the same bank number of cycles" line.long 0x24 "RD_RCD_0,DRAM RD_RCD Timing Parameter" bitfld.long 0x24 0.--5. " RD_RCD ,RAS to CAS delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x28 "WR_RCD_0,DRAM WR_RCD Timing Parameter" bitfld.long 0x28 0.--5. " WR_RCD ,Minimum number of cycles between activate and write commands to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x2C "RRD_0,DRAM RRD Timing Parameter" bitfld.long 0x2C 0.--4. " RRD ,Bank X Act to Bank Y Act command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "REXT_0,DRAM REXT Timing Parameter" bitfld.long 0x30 0.--4. " REXT ,Read to read delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "WDV_0,DRAM WDV Timing Parameter" bitfld.long 0x34 0.--5. " WDV ,Write data assertion to the rams delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,Max,?..." line.long 0x38 "QUSE_0,DRAM QUSE Timing Parameter" bitfld.long 0x38 0.--5. " QUSE ,Tells the chip when to look for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x3C "QRST_0,DRAM QRST Timing Parameter" bitfld.long 0x3C 16.--20. " QRST_DURATION ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles" hexmask.long.byte 0x3C 0.--6. 1. " QRST ,Time from expiration of QSAFE until reset is issued" line.long 0x40 "QSAFE_0,DRAM QSAFE Timing Parameter" hexmask.long.byte 0x40 0.--6. 1. " QSAFE ,Time from a read command to when it is safe to issue a QRST" line.long 0x44 "RDV_0,DRAM RDV Timing Parameter" hexmask.long.byte 0x44 0.--6. 1. " RDV ,Time from read command to latching the read data from the pad macros" line.long 0x48 "REFRESH_0,DRAM REFRESH Timing Parameter" hexmask.long.word 0x48 6.--15. 1. " REFRESH ,Interval between refresh requests" bitfld.long 0x48 0.--5. " REFRESH_LO ,REFRESH_LO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x4C "BURST_REFRESH_NUM,Refresh Burst Count" bitfld.long 0x4C 0.--3. " BURST_REFRESH_NUM ,Refresh burst count" "BR1,BR2,BR4,BR8,BR16,BR32,BR64,BR128,BR256,BR512,?..." line.long 0x50 "PDEX2WR_0,DRAM PDEX2WR Timing Parameter" bitfld.long 0x50 0.--5. " PDEX2WR ,Timing delay from exit of power down mode to a write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x54 "PDEX2RD_0,DRAM PREX2RD Timing Parameter" bitfld.long 0x54 0.--5. " PDEX2RD ,Timing delay from exit of power down mode to a read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x58 "PCHG2PDEN_0,DRAM PCHG2PDEN Timing Parameter" bitfld.long 0x58 0.--5. " PCHG2PDEN ,Timing delay from a precharge command to power down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x5C "ACT2PDEN_0,DRAM ACT2PDEN Timing Parameter" bitfld.long 0x5C 0.--5. " ACT2PDEN ,Timing delay from an activate MRS or EMRS command to power down entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x60 "AR2PDEN_0,DRAM AR2PDEN Timing Parameter" hexmask.long.word 0x60 0.--8. 1. " AR2PDEN ,Timing delay from an autorefresh command to power down entry" line.long 0x64 "RW2PDEN_0,DRAM RW2PDEN Timing Parameter" hexmask.long.byte 0x64 0.--6. 1. " RW2PDEN ,Timing delay from a read/write command to power down entry" line.long 0x68 "TXSR_0,DRAM TXSR Timing Parameter" hexmask.long.word 0x68 0.--9. 1. " TXSR ,Cycles between self-refresh exit & first DRAM command that doesn't require a locked DLL" line.long 0x6C "TCKE_0,DRAM TCKE Timing Parameter" bitfld.long 0x6C 0.--5. " TCKE ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x70 "TFAW_0,DRAM TFAW Timing Parameter" hexmask.long.byte 0x70 0.--6. 1. " TFAW ,Width of the FAW for 8-bank devices" line.long 0x74 "TRPAB_0,DRAM TRPAB Timing Parameter" bitfld.long 0x74 0.--5. " TRPAB ,Precharge-all tRP allowance for 8-bank devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x78 "TCLKSTABLE_0,DRAM TCLKSTABLE Timing Parameter" hexmask.long.byte 0x78 0.--6. 1. " TCLKSTABLE ,Minimum number of cycles of a stable clock period" line.long 0x7C "TCLKSTOP_0,DRAM TCLKSTOP Timing Parameter" bitfld.long 0x7C 0.--4. " TCLKSTOP ,Delay from last command to stopping the external clock to DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x80 "TREFBW_0,DRAM TREFBW Timing Parameter" hexmask.long.word 0x80 0.--13. 1. " TREFBW ,Width of the burst-refresh window" line.long 0x84 "TPPD_0,DRAM TPPD Timing Parameter" bitfld.long 0x84 0.--3. " TPPD ,Precharge-precharge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x88 "ODT_WRITE_0,ODT Write Control" bitfld.long 0x88 31. " ENABLE_ODT_DURING_WRITE ,ODT enable during write" "Disabled,Enabled" bitfld.long 0x88 8.--11. " ODT_WR_DURATION ,Indicate how long to assert ODT by" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 5. " SHARE_ONE_ODT ,Share one ODT" "Disabled,Enabled" textline " " bitfld.long 0x88 4. " DRIVE_BOTH_ODT ,ODTs' assertion for the requested or both devices" "Requested,Both" bitfld.long 0x88 0.--3. " ODT_WR_DELAY ,ODT write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8C "PDEX2MRR_0,DRAM PDEX2MRR Timing Parameter" hexmask.long.byte 0x8C 0.--6. 1. " PDEX2MRR ,Precharge-precharge delay" line.long 0x90 "WEXT_0,DRAM WEXT Timing Parameter" bitfld.long 0x90 0.--4. " WEXT ,Write to write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpuis("TEGRAX2")) group.long 0xBC++0x03 line.long 0x00 "TRTM_0,TRTM Timing Parameter" hexmask.long.byte 0x00 0.--6. 1. " TRTM ,Read to MRW delay" group.long 0xF8++0x07 line.long 0x00 "TWTM_0,TWTM DRAM timing parameter" hexmask.long.byte 0x00 0.--6. 1. " TWTM ,Read to MRW/MRR delay" line.long 0x04 "TRATM_0,TRATM Timing Parameter" hexmask.long.byte 0x04 0.--6. 1. " TRATM ,Read with AP to MRW/MRR delay" group.long 0x108++0x07 line.long 0x00 "TWATM_0,TWATM DRAM timing parameter" hexmask.long.byte 0x00 0.--6. 1. " TWATM ,Read with AP to MRW/MRR delay" line.long 0x04 "TR2REF_0,TR2REF DRAM timing parameter" hexmask.long.byte 0x04 0.--6. 1. " TR2REF ,Read to refresh delay" endif group.long 0xC0++0x03 line.long 0x00 "RFC_SLR_0,DRAM RFC_SLR Timing Parameter" hexmask.long.word 0x00 0.--8. 1. " RFS_SLR ,Stagger refresh cycle time between ranks" group.long 0xC4++0x1B line.long 0x00 "MRS_WAIT_CNT2_0,Delay Between A MRS And The Following DRAM Commands" hexmask.long.word 0x00 16.--25. 1. " MRS_EXT2_WAIT_CNT ,Number of EMC clocks to wait before issuing any commands after sending MRS ext2 command" hexmask.long.word 0x00 0.--9. 1. " MRS_EXT1_WAIT_CNT ,Number of EMC clocks to wait before issuing any commands after sending MRS ext1 command" line.long 0x04 "MRS_WAIT_CNT_0,Delay Between A MRS And The Following DRAM Commands" hexmask.long.word 0x04 16.--26. 1. " MRS_LONG_WAIT_CNT ,Number of EMC clocks to wait [MRS long command]" hexmask.long.word 0x04 0.--9. 1. " MRS_SHORT_WAIT_CNT ,Number of EMC clocks to wait [MRS short command]" line.long 0x08 "MRS_0,Command Trigger For MRS" bitfld.long 0x08 30.--31. " MRS_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x08 26.--27. " USE_MRS_CNT ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2" textline " " bitfld.long 0x08 20.--21. " MRS_BA ,Registers to be addressed in DRAM" "MRS,?..." hexmask.long.word 0x08 0.--13. 1. " MRS_ADR ,Mode-register data to be written" line.long 0x0C "EMRS_0,Command Trigger For EMRS" bitfld.long 0x0C 30.--31. " EMRS_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x0C 26.--27. " USE_EMRS_CNT ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2" textline " " bitfld.long 0x0C 20.--21. " EMRS_BA ,Registers to be addressed in DRAM" ",EMRS,EMRS2,EMRS3" hexmask.long.word 0x0C 0.--13. 1. " EMRS_ADR ,Mode-register data to be written" line.long 0x10 "REF_0,Command Trigger For Refresh" bitfld.long 0x10 30.--31. " REF_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." hexmask.long.word 0x10 8.--18. 1. " REF_NUM ,Number of refresh cycles (REF_NUM+1)" textline " " bitfld.long 0x10 1. " REF_NORMAL ,Refresh execution mechanism" "Immediate,Normal" bitfld.long 0x10 0. " REF_CMD ,Refresh to all DRAM banks" "Disabled,Enabled" line.long 0x14 "PRE_0,Command Trigger For PRECHARGE-ALL" bitfld.long 0x14 30.--31. " PRE_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x14 0. " PRE_CMD ,PRECHARGE to all DRAM banks" "Disabled,Enabled" line.long 0x18 "NOP_0,Command Trigger For NOP" bitfld.long 0x18 30.--31. " NOP_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x18 0. " NOP_CMD ,NOP to all DRAM banks" "Disabled,Enabled" if ((per.l(ad:0x7001E000+0xE0)&0x1)==0x1) group.long 0xE0++0x03 line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh" bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,None" bitfld.long 0x00 8. " ACTIVE_SELF_REF ,State of CKE pin while SELF_REF_CMD == ENABLE" "Low,High" bitfld.long 0x00 0. " SREF_REF_CMD ,Issue a SELF_REFRESH command" "Disabled,Enabled" else group.long 0xE0++0x03 line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh" bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,None" bitfld.long 0x00 0. " SREF_REF_CMD ,Issue a SELF_REFRESH command" "Disabled,Enabled" endif group.long 0xE4++0x13 line.long 0x00 "DPD_0,Command Trigger For DPD" bitfld.long 0x00 30.--31. " DPD_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x00 0. " DPD_CMD ,Issue a deep power down command" "Disabled,Enabled" line.long 0x04 "MRW_0,Command Trigger For MRW" bitfld.long 0x04 30.--31. " MRW_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x04 26.--27. " USE_MRW_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x04 16.--23. 0x01 " MRW_MA ,Register address" hexmask.long.byte 0x04 0.--7. 1. " MRW_OP ,Data to be written" line.long 0x08 "MRR_0,Command Trigger For MRR" bitfld.long 0x08 30.--31. " MRR_DEV_SELECTN ,Active-low chip-select" "Illegal,Dev1,Dev0,?..." bitfld.long 0x08 26.--27. " USE_MRR_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x08 16.--23. 0x01 " MRR_MA ,Register address" hexmask.long.word 0x08 0.--15. 1. " MRR_OP ,Data returned" line.long 0x0C "CMDQ_0,Command QUEUE Depth Register" bitfld.long 0x0C 24.--28. " RW_WD_DEPTH ,RW WD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 12.--14. " PRE_DEPTH ,Pre depth" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 8.--10. " ACT_DEPTH ,Act depth" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--4. " RW_DEPTH ,RW depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "MC2EMCQ_0,Command Queue Depth Register" bitfld.long 0x10 24.--27. " MCWD_DEPTH ,MCWD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--10. " MCACT_DEPTH ,MCACT depth" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " MCREQ_DEPTH ,MCREQ depth" "0,1,2,3,4,5,6,7" group.long 0x100++0x07 line.long 0x00 "FBIO_SPARE_0,FBIO Spare Register" hexmask.long.byte 0x00 24.--31. 1. " CFG_FBIO_SPARE_3 ,Config FBIO spare 3" hexmask.long.byte 0x00 16.--23. 1. " CFG_FBIO_SPARE_2 ,Config FBIO spare 2" hexmask.long.byte 0x00 8.--15. 1. " CFG_FBIO_SPARE_1 ,Config FBIO spare 1" textline " " hexmask.long.byte 0x00 2.--7. 1. " CFG_FBIO_SPARE_0 ,Config FBIO spare 0" bitfld.long 0x00 1. " CFG_ADR_EN ,Write once after powering up EMC" "Disabled,Enabled" bitfld.long 0x00 0. " CFG_SWAP_DLL ,Config swap DLL" "0,1" line.long 0x04 "FBIO_CFG5_0,FBIO Configuration Register" bitfld.long 0x04 31. " DATA_BUS_RETURN_TO_ZERO ,Drive data bus back to zero as resting stage" "Disabled,Enabled" bitfld.long 0x04 30. " DATA_BUS_RETURN_TO_ONE ,Drive data bus back to one as resting stage" "Disabled,Enabled" bitfld.long 0x04 28. " MASK_PUTERM_N_DQS_PULLD_DURING_ZQCAL ,Deassert DQ/DQS" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " CMD_BUS_RETURN_TO_ZERO ,Drive command bus back to zero as resting stage" "Disabled,Enabled" bitfld.long 0x04 26. " CMD_BUS_RETURN_TO_ONE ,Drives the command bus back to a one as resting stage" "Disabled,Enabled" bitfld.long 0x04 25. " LPDDR3_DRAM ,Enables differentiation between LPDDR3 DRAM protocol" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " LPDDR3_WR_PREAMBLE_TOGGLE ,Enable LPDDR3 write preamble toggle" "Disabled,Enabled" bitfld.long 0x04 20.--23. " ERR_RD_BUBBLE ,Number of bubbles to be inserted in CMDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 13.--15. " EMC2PMACRO_CFG_QUSE_MODE ,QUSE mode select" "Normal,Always on,Internal LPBK,Pulse INT,,Direct QUSE,?..." bitfld.long 0x04 12. " CMD_2T_TIMING ,2T command timing" "Disabled,Enabled" bitfld.long 0x04 10. " DISABLE_CONCURRENT_AUTOPRE ,Disable reads/writes to a device until precharge command" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " CMD_TX_EN ,Controls TX_EN on the command bricks" "No,Yes" bitfld.long 0x04 4. " DRAM_ ,DRAM width" "X32,X64" bitfld.long 0x04 2.--3. " DRAM_BURST ,Burst length to use for the attached device" "BURST4,BURST8,,BURST16" textline " " bitfld.long 0x04 0.--1. " DRAM_TYPE ,DRAM protocol select for the attached device" "DDR3,LPDDR4,LPDDR2,DDR2" sif (cpuis("TEGRAX2")) group.long 0x110++0x07 line.long 0x00 "ACT_0,Command Trigger: Act" bitfld.long 0x00 30.--31. " SW_ACT_DEV_SELECTN ,Active low chip-select" "0,1,2,3" bitfld.long 0x00 23.--25. " SW_ACT_BANK ,Bank to which the act command needs to be issue" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--15. 1. " SW_ACT_ROW ,Row number to be activated" line.long 0x04 "MEM_INIT_DONE_0,DRAM initiation done" bitfld.long 0x04 0. " MEM_INIT_DONE ,This bit is set by boot sequence when DRAM initiation is done" "0,1" endif group.long 0x114++0x0B line.long 0x00 "FBIO_CFG6_0,FBIO Configuration Register" bitfld.long 0x00 0.--2. " CFG_QUSE_LATE ,FBIO configuration register" "0,1,2,3,4,5,6,7" line.long 0x04 "PDEX2CKE_0,DRAM PDEX2CKE Timing Parameter" bitfld.long 0x04 0.--5. " PDEX2CKE ,Timing delay from exit of powerdown mode to turning on CKE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "CKE2PDEN_0,DRAM CKE2PDEN Timing Parameter" bitfld.long 0x08 0.--5. " CKE2PDEN ,Timing delay from turning off CKE to powerdown entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hgroup.long 0x120++0x03 hide.long 0x00 "CFG_RSV_0,EMC Configuration Reserved" group.long 0x124++0x1F line.long 0x00 "ACPD_CONTROL_0,Threshold For ACPD" hexmask.long.word 0x00 0.--15. 1. " ACPD_THRESHOLD ,Number of idle cycles to wait before allowing power-down entry" line.long 0x04 "MPC_0,MPC CMD (LP4 Only)" bitfld.long 0x04 30.--31. " MPC_DEV ,SELECTN" "0,1,2,3" bitfld.long 0x04 26.--27. " MPC_SUBP_SELECTN ,Active-low subchannel select" "Both,Subp1,Subp0,?..." bitfld.long 0x04 9. " MPC_WR ,Send CAS2 (required for FIFO WR)" "Not send,Send" textline " " bitfld.long 0x04 8. " MPC_RD ,Send CAS2 (required for FIFO RD and DQ_CAL RD" "Not send,Send" bitfld.long 0x04 7. " MPC_CAS2 ,Send CAS2 (required for FIFO RD|WR and DQ_CAL RD)" "Not send,Send" hexmask.long.byte 0x04 0.--6. 1. " MPC_OP ,MPC OP code" line.long 0x08 "EMRS2_0,EMRS2 Command Trigger" bitfld.long 0x08 30.--31. " EMRS2_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x08 26.--27. " USE_EMRS2_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " bitfld.long 0x08 20.--21. " EMRS2_BA ,EMRS2 BA" ",EMRS,EMRS2,EMRS3" hexmask.long.word 0x08 0.--13. 1. " EMRS2_ADR ,Mode register data to be written" line.long 0x0C "EMRS3_0,EMRS3 Command Trigger" bitfld.long 0x0C 30.--31. " EMRS3_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x0C 26.--27. " USE_EMRS3_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " bitfld.long 0x0C 20.--21. " EMRS3_BA ,EMRS3 BA" ",Emrs1,Emrs2,Emrs3" hexmask.long.word 0x0C 0.--13. 1. " EMRS3_ADR ,Mode register data to be written" line.long 0x10 "MRW2_0,MRW2 Command Trigger" bitfld.long 0x10 30.--31. " MRW2_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev2,?..." bitfld.long 0x10 26.--27. " USE_MRW2_CNT ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x10 16.--23. 0x01 " MRW2_MA ,Register address" hexmask.long.byte 0x10 0.--7. 1. " MRW2_OP ,Data to be written" line.long 0x14 "MRW3_0,MRW3 Command Trigger" bitfld.long 0x14 30.--31. " MRW3_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev2,?..." bitfld.long 0x14 26.--27. " USE_MRR_CNT ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x14 16.--23. 0x01 " MRW3_MA ,Register address" hexmask.long.byte 0x14 0.--7. 1. " MRW3_OP ,Data to be written" line.long 0x18 "MRW4_0,MRW4 Command Trigger" bitfld.long 0x18 30.--31. " MRW4_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x18 26.--27. " USE_MRR_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x18 16.--23. 0x01 " MRW4_MA ,Register address" hexmask.long.byte 0x18 0.--7. 1. " MRW4_OP ,Data to be written" line.long 0x1C "CLKEN_OVERRIDE_0,Second Level Clock Enable Override Register" bitfld.long 0x1C 31. " OBS_BUS_CLKEN ,OBS bus clock enable" "Disabled,Enabled" bitfld.long 0x1C 8. " PAD_CONFIG_OVR ,Pad config override" "Disabled,Enabled" bitfld.long 0x1C 7. " TR_CLKEN_OVR ,TR clock enable override" "Disabled,Enabled" textline " " bitfld.long 0x1C 6. " STATS_CLKEN_OVR ,Stats clock enable override" "Disabled,Enabled" bitfld.long 0x1C 3. " RR_CLKEN_OVR ,RR clock enable override" "Disabled,Enabled" bitfld.long 0x1C 2. " DRAMC_CLKEN_OVR ,DRAMC clock enable override" "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " CMDQ_CLKEN_OVR ,CMDQ clock enable override" "Disabled,Enabled" group.long 0x144++0x1B line.long 0x00 "R2R_0,R2R_0 Timing Parameter" bitfld.long 0x00 0.--3. " R2R ,R2R" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "W2W_0 ,W2W_0 Timing Parameter" bitfld.long 0x04 0.--3. " W2W ,W2W" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "EINPUT_0,EINPUT_0 Timing Parameter" bitfld.long 0x08 0.--5. " EINPUT ,Specifies when to assert EINPUT for a read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "EINPUT_DURATION_0,EINPUT_DURATION_0 Timing Parameter" bitfld.long 0x0C 0.--5. " EINPUT_DURATION ,Specifies how long the EINPUT should be asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "PUTERM_EXTRA_0,PUTERM EXTRA 0 Timing Parameter" bitfld.long 0x10 0.--5. " RXTERM ,Specifies when to assert dynamic PUTERM for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "TCKESR_0,TCKESR_0 Timing Parameter" bitfld.long 0x14 0.--5. " TCKESR ,Specifies minimum low CKE pulse or self-refresh mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "TPD_0,TPD_0 Timing Parameter" bitfld.long 0x18 0.--5. " TPD ,Specifies minimum low CKE pulse or power-down mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " width 23. group.long 0x2A4++0x07 line.long 0x00 "AUTO_CAL_CONFIG_0,Auto-calibration Settings For EMC Pads" rbitfld.long 0x00 31. " AUTO_CAL_START ,Starts a complete autocal cycle with measure FSM" "Not started,Started" bitfld.long 0x00 30. " AUTO_CAL_COMP_PAD_FLIP ,Flips the COMP pad slices used for pull-up and pull-down calibration" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_CAL_ENABLE ,Specifies whether to use EMC autocal-generated pull-up|pull-down calibration codes or EMC padmacro register settings for drive|termination strength" "Disabled,Enabled" bitfld.long 0x00 25.--28. " AUTO_CAL_NUM_SAMPLES ,Number of samples to take for the majority test" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 24. " AUTO_CAL_CHECK_LOCK ,Whenever COMP pad indicates a lock take multiple samples and latch calibration code" "Disabled,Enabled" bitfld.long 0x00 19.--23. " AUTO_CAL_WAIT_AFTER_EN ,Wait time between enabling COMP pad and changing TX_DRVUP|TX_DRVDN test calibration codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--18. " AUTO_CAL_STEP ,Autocal measure step interval" "0,1,2,3,4,5,6,7" bitfld.long 0x00 11.--15. " AUTO_CAL_UPDATE_DELAY ,Number of EMC clocks to wait before autocal transfer TSM triggers an update FSM cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 10. " AUTO_CAL_UPDATE_STALL ,Autocal update FSM exits any ongoing update cycle and goes to idle state" "Disabled,Enabled" bitfld.long 0x00 9. " AUTO_CAL_MEASURE_STALL ,Autocal measure FSM exits any ongoing VREF cycle and goes to idle state" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " AUTO_CAL_PD_VREF2_EN ,Enables Vref2 pull-down calibration measure cycle" "Disabled,Enabled" bitfld.long 0x00 7. " AUTO_CAL_PD_VREF1_EN ,Enables Vref1 pull-down calibration measure cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " AUTO_CAL_PD_VREF0_EN ,Enables Vref0 pull-down calibration measure cycle" "Disabled,Enabled" bitfld.long 0x00 5. " AUTO_CAL_PD_VREF2_EN ,Enables Vref2 pull-up calibration measure cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " AUTO_CAL_PD_VREF1_EN ,Enables Vref1 pull-up calibration measure cycle" "Disabled,Enabled" bitfld.long 0x00 3. " AUTO_CAL_PD_VREF0_EN ,Enables Vref0 pull-up calibration measure cycle" "Disabled,Enabled" textline " " rbitfld.long 0x00 2. " AUTO_CAL_UPDATE_START ,Triggers an autocal update FSM cycle" "Disabled,Enabled" rbitfld.long 0x00 1. " AUTO_CAL_TRANSFER_START ,Triggers an autocal transfer FSM cycle" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " AUTO_CAL_COMPUTE_START ,Triggers an autocal compute FSM cycle" "Disabled,Enabled" line.long 0x04 "AUTO_CAL_INTERVAL_0,EMC Pad Calibration Interval" hexmask.long.tbyte 0x04 0.--20. 1. " AUTO_CAL_INTERVAL ,Calibration interval value" rgroup.long 0x2AC++0x03 line.long 0x00 "AUTO_CAL_STATUS_0,Auto-calibration Master Status Register" bitfld.long 0x00 24.--29. " AUTO_CAL_VREF0_DRVDN ,Pull-down code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " AUTO_CAL_VREF0_DRVUP ,Pull-up code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 9. " AUTO_CAL_PD_CAL_ZI ,RX_D pin of COMP pad slice used for pull-down calibration" "0,1" bitfld.long 0x00 8. " AUTO_CAL_PU_CAL_ZI ,RX_D pin of COMP pad slice used for pull-up calibration" "0,1" textline " " bitfld.long 0x00 4. " AUTO_CAL_ACTIVE ,Autocal activity status" "Inactive,Active" bitfld.long 0x00 3. " AUTO_CAL_UPDATE_ACTIVE ,Autocal update activity status" "Inactive,Active" textline " " bitfld.long 0x00 2. " AUTO_CAL_TRANSFER_ACTIVE ,Autocal transfer activity status" "Inactive,Active" bitfld.long 0x00 1. " AUTO_CAL_COMPUTE_ACTIVE ,Autocal compute activity status" "Inactive,Active" textline " " bitfld.long 0x00 0. " AUTO_CAL_MEASURE_ACTIVE ,Autocal measure activity status" "Inactive,Active" sif (cpuis("TEGRAX2")) group.long 0x3D4++0x03 line.long 0x00 "AUTO_CAL_STATUS2_0,AUTOCAL Master Status Register" bitfld.long 0x00 24.--29. " AUTO_CAL_VREF2_DRVDN ,Pull-down code from VREF2 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " AUTO_CAL_VREF2_DRVUP ,Pull-up code from VREF2 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_VREF1_DRVDN ,Pull-down code from VREF1 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_VREF1_DRVUP ,Pull-up code from VREF1 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x2B0++0x03 line.long 0x00 "REQ_CTRL_0,Request Status/Control" bitfld.long 0x00 1. " STALL_ALL_WRITES ,Stall incoming write transactions" "Allow,Stall" bitfld.long 0x00 0. " STALL_ALL_READS ,Stall incoming read transactions" "Allow,Stall" rgroup.long 0x2B4++0x03 line.long 0x00 "EMC_STATUS_0,EMC State-Machine Status" bitfld.long 0x00 27. " ACPD_FSM_IDLE[1] ,Device[1] power-down FSM is idle" "No,Yes" bitfld.long 0x00 26. " ACPD_FSM_IDLE[0] ,Device[0] power-down FSM is idle" "No,Yes" textline " " bitfld.long 0x00 25. " DSR_FSM_IDLE[1] ,Device[1] dynamic self refresh FSM is idle" "No,Yes" bitfld.long 0x00 24. " DSR_FSM_IDLE[0] ,Device[0] dynamic self refresh FSM is idle" "No,Yes" textline " " bitfld.long 0x00 23. " TIMING_UPDATE_STALLED ,Indicates whether timing update triggered by TIMING_CONTROL.TIMING_UPDATE is completed" "Completed,Not completed" bitfld.long 0x00 22. " ZQ_FSM_IDLE ,Indicate auto ZQ state machine is idle" "Not idle,Idle" textline " " bitfld.long 0x00 21. " CFG_ZQ_ACTIVE ,Indicates ZQ configuration access is active" "Not active,Active" bitfld.long 0x00 20. " MRR_DIVLD ,MRR data available for reading" "Not available,Available" textline " " bitfld.long 0x00 16.--19. " MRR_FIFO_SPACE ,MRR FIFO space available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DRAM_IN_DPD_DEV[1] ,Device[1] in deep powerdown state" "No,Yes" textline " " bitfld.long 0x00 12. " DRAM_IN_DPD_DEV[0] ,Device[0] in deep powerdown state" "No,Yes" bitfld.long 0x00 11. " DRAM_IN_ACTIVE_SELF_REFRESH[1] ,Device[n] has been put into ACTIVE self-refresh" "No,Yes" textline " " bitfld.long 0x00 10. " DRAM_IN_ACTIVE_SELF_REFRESH[0] ,Device[n] has been put into ACTIVE self-refresh" "No,Yes" bitfld.long 0x00 9. " DRAM_IN_SELF_REFRESH_DEV[1] ,Device[1] in active self-refresh" "No,Yes" textline " " bitfld.long 0x00 8. " DRAM_IN_SELF_REFRESH_DEV[0] ,Device[0] in active self-refresh" "No,Yes" bitfld.long 0x00 5. " DRAM_IN_POWERDOWN_DEV[1] ,Device[1] in powerdown state" "No,Yes" textline " " bitfld.long 0x00 4. " DRAM_IN_POWERDOWN_DEV[0] ,Device[0] in powerdown state" "No,Yes" bitfld.long 0x00 2. " NO_OUTSTANDING_TRANSACTIONS ,All non-stalled requests complete status" "Not completed,Completed" textline " " bitfld.long 0x00 0. " EMC_REQ_FIFO_EMPTY ,Request FIFO is empty" "Not empty,Empty" group.long 0x2B8++0x03 line.long 0x00 "CFG_2_0,EMC Configuration" bitfld.long 0x00 31. " DRAMC_PRE_B4_ACT ,Gives priority to activates" "Disabled,Enabled" bitfld.long 0x00 30. " IGNORE_MC_A_BUS ,Ignore the MC *_A_* bus" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CLR_ACT_BANK_INUSE_WHEN_BANK_CLOSE ,Close|unlock ACTFIFO bank in use bit when the bank is closed" "Disabled,Enabled" bitfld.long 0x00 28. " DONT_CLR_TIMING_COUNTER_WHEN_CLKCHANGE ,Don't clear timing counters when clock change happen" "Disabled,Enabled" textline " " bitfld.long 0x00 26.--27. " DRAMC_WD_CHK_POLICY ,Specifies when there is no need for checking RWAQ_WD FIFO quantity" "WDV >= WDV_CHK_BASE,WDV >= WDV_CHK_BASE+1,WDV => WDV_CHK_BASE+2,Always check" bitfld.long 0x00 25. " ALLOW_REF_DURING_CC_PRE_EXE ,Allow refresh to happen during clock change pre-execute phase" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DSR_STUTTER_ENABLE ,Enables DSR stutter mode|protocol between MC and EMC" "Disabled,Enabled" bitfld.long 0x00 23. " CHK_PDEX2RD_TO_START_WR ,Specifies what to check when starting write" "PDEX2RD,PDEX2WR" textline " " bitfld.long 0x00 22. " ISSUE_PCHGALL_AFTER_REF ,Always generate precharge all bank after refresh" "Disabled,Enabled" bitfld.long 0x00 20. " COMBINED_INTERRUPT_MODE ,Interrupt mode" "Combined,Independent" textline " " bitfld.long 0x00 16. " CLKCHANGE_ACTIVE_SR ,Execute frequency change when DRAM is in active SELF-REF state" "Disabled,Enabled" bitfld.long 0x00 11. " DIS_CNTR_WITH_CFG_TIMING_UPDATE ,Disable|enable reset of timing parameter counters with TIMING_CONTROL.TIMING_UPDATE" "Enabled,Disabled" textline " " bitfld.long 0x00 7. " EARLY_TRFC_8_CLK ,Early TRFC" "16 clocks,8 clocks" bitfld.long 0x00 3.--5. " ZQ_EXTRA_DELAY ,Additional delay to push out ZQCMD" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 2. " REF_AFTER_SREF ,Enables trigger of refresh after exiting self-refresh" "Disabled,Enabled" bitfld.long 0x00 1. " CLKCHANGE_PD_ENABLE ,Force DRAM into power-down during CLKCHANGE" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CLKCHANGE_REQ_ENABLE ,Allows EMC and CAR to handshake on PLL divider|source changes" "Disabled,Enabled" group.long 0x2BC++0x03 line.long 0x00 "CFG_DIG_DLL_0,Configure Digital DLL" rbitfld.long 0x00 31. " CFG_DLL_USE_OVERRIDE_UNTIL_LOCK ,Override_val in use" "No,Yes" rbitfld.long 0x00 30. " DLL_RESET ,Reset pulse sent to DLL's on next shadow update" "No,Yes" textline " " bitfld.long 0x00 27. " CFG_DLL_ALARM_DISABLE ,Disable override of DLL logic" "Disabled,Enabled" rbitfld.long 0x00 26. " CFG_DLL_UPDATE_AT_NXT_REFRESH ,Cause the DLCELL update to occur at the next refresh interval" "No,Yes" textline " " hexmask.long.word 0x00 16.--25. 1. " CFG_DLL_OVERRIDE_VAL ,Value to use in place of DLI output" bitfld.long 0x00 15. " CFG_DLL_TESTEN ,Enable DLL test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " CFG_DLL_QUSE_TESTOUT ,Enable DLL TESTOUT on QUSE pads" "Disabled,Enabled" bitfld.long 0x00 12.--13. " CFG_DLL_TESTSEL ,Select DLL test output" "0,1,2,3" textline " " bitfld.long 0x00 8.--10. " CFG_DLL_UDSET ,Amount of time after DLL will be treated as locked" "16us,64us,12us,512us,1,?..." bitfld.long 0x00 6.--7. " CFG_DLL_MODE ,Controls how frequently DLL runs" "Continuously,Till lock,Periodically,Pre clock" textline " " bitfld.long 0x00 5. " CFG_DLL_LOWSPEED ,Enable DLL for use with low-speed EMCCLK operation" "Disabled,Enabled" rbitfld.long 0x00 4. " CFG_DLL_STALL_RW_UNTIL_LOCK ,Stall all RW traffic until DLL locks by EMC" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CFG_DLL_STALL_ALL_TRAFFIC ,Enable stalling of all DRAM traffic" "Disabled,Enabled" bitfld.long 0x00 2. " CFG_DLL_OVERRIDE_EN ,Override DLL's DLI output with OVERRIDE_VAL" "Disabled,Enabled" textline " " rbitfld.long 0x00 1. " CFG_DLL_STALL_ALL_UNTIL_LOCK ,Stall all traffic until DLL locks" "Disabled,Enabled" bitfld.long 0x00 0. " CFG_DLL_EN ,Enable digital DLL" "Disabled,Enabled" if ((per.l(ad:0x7001E000+0x2BC)&0xC0)==0x80) group.long 0x2C0++0x03 line.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs" hexmask.long.word 0x00 0.--15. 1. " CFG_DLL_RUN_PERIOD ,Interval between runs in uSec" else hgroup.long 0x2C0++0x03 hide.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs" endif rgroup.long 0x2C4++0x03 line.long 0x00 "DIG_DLL_STATUS_0,Digital DLL Status" bitfld.long 0x00 18. " DLL_ALARM_MIN ,DLL alarm MIN status" "No alarm,Alarm" bitfld.long 0x00 17. " DLL_PRIV_UPDATED ,DLL private update status" "Not updated,Updated" textline " " bitfld.long 0x00 16. " DLLCAL_IN_PROGRESS ,DLL calibration in-progress status" "Done,In progress" bitfld.long 0x00 15. " DLL_LOCK ,DLL lock status" "Not locked,Locked" textline " " bitfld.long 0x00 14. " DLL_ALARM ,DLL alarm status" "No alarm,Alarm" bitfld.long 0x00 13. " DLL_LOCK_TIMEOUT ,DLL lock timeout status" "No timeout,Timeout" textline " " hexmask.long.word 0x00 0.--10. 1. " DLL_OUT ,DLL_OUT" group.long 0x2C8++0x13 line.long 0x00 "CFG_DIG_DLL_1_0,Digital DLL Configuration" bitfld.long 0x00 12.--15. " CFG_DLL_WAIT_BEFORE_UPDATE ,Number of clocks to stall before DLL update sent to pad macros" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 6.--11. " DLL_NUM_STALL_CYCLES ,Number of clocks to stall after DLL update sent to pad macros" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 1.--5. " CFG_DLL_UPDATE_TIMEOUT ,Timeout if waiting for idle|refresh" "No timeout,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0. " CFG_DLL_UPDATE_IDLE ,Update dig DLL during idle" "Disabled,Enabled" line.long 0x04 "RDV_MASK_0,RDV_MASK_0 DRAM Timing Parameter" hexmask.long.byte 0x04 0.--6. 1. " RDV_MASK ,Programmed to RDV" line.long 0x08 "WDV_MASK_0 ,WDV_MASK_0 DRAM Timing Parameter" bitfld.long 0x08 0.--5. " WDV_MASK ,Programmed to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "RDV_EARLY_MASK_0,RDV_EARLY_MASK_0 DRAM Timing Parameter" hexmask.long.byte 0x0C 0.--6. 1. " RDV_EARLY_MASK ,Programmed to RDV_EARLY" line.long 0x10 "RDV_EARLY_0,RDV_EARLY_0 DRAM Timing Parameter" hexmask.long.byte 0x10 0.--6. 1. " RDV_EARLY ,Time from read command to latching the read data from the pad macros" sif cpuis("TEGRAX2") group.long 0x2DC++0x03 line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register" bitfld.long 0x00 20.--23. " AUTO_CAL_DQS_TERM_SLOPE ,Slope for DQS term" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." bitfld.long 0x00 16.--19. " AUTO_CAL_DQ_TERM_SLOPE ,Slope for DQ term value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." textline " " hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_DQS_TERM_OFFSET ,2's complement offset for DQS term value" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_DQ_TERM_OFFSET ,2's complement offset for DQ term value" elif (cpuis("TEGRAX1")) group.long 0x2DC++0x03 line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_TERM_SLOPE ,Slope for DQS term" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_DQ_TERM_SLOPE ,Slope for DQ term value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_TERM_OFFSET ,2's complement offset for DQS term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_DQ_TERM_OFFSET ,2's complement offset for DQ term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif (cpuis("TEGRAX2")) group.long 0x42C++0x03 line.long 0x00 "AUTO_CAL_CONFIG9_0,AUTO CAL Master Compute Control Register" bitfld.long 0x00 6. " AUTO_CAL_OVERRIDE_DQS_TERM ,Update DQS term auto-calibration values" "Disabled,Enabled" bitfld.long 0x00 5. " AUTO_CAL_OVERRIDE_DQS ,Update DQS auto-calibration values" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " AUTO_CAL_OVERRIDE_DQ_TERM ,Update DQ term autocal values" "Disabled,Enabled" bitfld.long 0x00 3. " AUTO_CAL_OVERRIDE_DQ ,Update DQ autocal valuess" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " AUTO_CAL_OVERRIDE_CMD ,Update CMD autocal values" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO_CAL_OVERRIDE_CLK ,Update CLK autocal values" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AUTO_CAL_OVERRIDE_CA ,Update CA autocal values" "Disabled,Enabled" endif group.long 0x2E0++0x0F line.long 0x00 "ZCAL_INTERVAL_0,ZCAL_INTERVAL_0 Configure ZQ Calibration" hexmask.long.word 0x00 10.--23. 1. " ZCAL_INTERVAL_HI ,Number of microseconds to wait between issuance of ZCAL_MRW_CMD" hexmask.long.word 0x00 0.--9. 1. " ZCAL_INTERVAL_LO ,ZCAL_INTERVAL_LO" line.long 0x04 "ZCAL_WAIT_CNT_0,ZCAL_WAIT_CNT_0 Configure ZQ Calibration" bitfld.long 0x04 31. " ZCAL_RESISTOR_SHARED ,ZQ resistor is shared across ranks" "Disabled,Enabled" bitfld.long 0x04 16.--21. " ZCAL_LATCH_CNT ,(LPDDR4 only) Number of EMC clocks to wait before issuing any commands after sending MPC ZWCAL_LATCH command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.word 0x04 0.--10. 1. " ZCAL_WAIT_CNT ,Number of EMC clocks to wait before issuing any commands after sending ZCAL_MRW_CMD" line.long 0x08 "ZCAL_MRW_CMD_0,ZCAL_MRW_CMD_0 Configure ZQ Calibration" bitfld.long 0x08 30.--31. " ZQ_MRW_DEV_SELECTN ,Active-low chip-select" "Both,Dev1,Dev0,?..." hexmask.long.byte 0x08 16.--23. 1. " ZQ_MRW_MA ,MRW MA field to be sent after ZCAL_INTERVAL" textline " " hexmask.long.byte 0x08 0.--7. 1. " ZQ_MRW_OP ,MRW OP field to be sent after ZCAL_INTERVAL" line.long 0x0C "ZQ_CAL_0,Trigger A Single ZQ Calibration" bitfld.long 0x0C 30.--31. " ZQ_CAL_DEV_SELECTN ,Active-low chip-select" "Both,Dev1,Dev0,Neither" bitfld.long 0x0C 4. " ZQ_CAL_LENGTH ,Indicate short or long ZQ calibration" "Short,Long" textline " " bitfld.long 0x0C 1. " ZQ_LATCH_CMD ,(LPDDR4 only) Issues a ZQ latch command" "0,1" bitfld.long 0x0C 0. " ZQ_CAL_CMD ,(DDR3 only) Issues a ZQ calibration command" "0,1" group.long 0x2F4++0x03 line.long 0x00 "XM2COMPPADCTRL3_0,Autocal COMP Pad Control Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 20.--23. " XM2COMP_VTTLP_VDDA_LVL ,[PMC] Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PD_E_WKPD ,Enable weak pull-down" "Disabled,Enabled" bitfld.long 0x00 16. " EMC2TMC_CFG_XM2COMP_PD_E_WKPU ,Enable weak pull-up" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PD_DRVDN_ZCTRL ,Drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x00 12.--13. " EMC2TMC_CFG_XM2COMP_PD_DRVUP_ZCTRL ,Drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PD_VDDA_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,11" bitfld.long 0x00 8.--9. " EMC2TMC_CFG_XM2COMP_PD_VAUXP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,11" textline " " bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PD_VCLAMP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,11" bitfld.long 0x00 2.--5. " EMC2TMC_CFG_XM2COMP_PD_TEST_MODE ,Test mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PD_RX_MODE ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1" sif (cpuis("TEGRAX2")) group.long 0x2f8++0x03 line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register" bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PD_VREF1_SEL ,IVREF_LVL for Vref1 pull-down calibration measure cycle" textline " " bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PU_VREF1_SEL ,IVREF_LVL for Vref1 pull-up calibration measure cycle" textline " " bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_VREF0_SEL ,IVREF_LVL for Vref0 pull-down calibration measure cycle" textline " " bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_VREF0_SEL ,IVREF_LVL for Vref0 pull-up calibration measure cycle" elif (cpuis("TEGRAX1")) group.long 0x2f8++0x03 line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register" bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PD_VREF1_SEL ,IVREF_LVL for Vref1 pull-down calibration measure cycle" textline " " bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PU_VREF1_SEL ,IVREF_LVL for Vref1 pull-up calibration measure cycle" textline " " bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_VREF0_SEL ,IVREF_LVL for Vref0 pull-down calibration measure cycle" textline " " bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_VREF0_SEL ,IVREF_LVL for Vref0 pull-up calibration measure cycle" endif sif (cpuis("TEGRAX2")) group.long 0x300++0x03 line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register" bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_VREF2_SEL ,IVREF_LVL for Vref2 pull-down calibration measure cycle" textline " " bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_VREF2_SEL ,IVREF_LVL for Vref2 pull-up calibration measure cycle" elif (cpuis("TEGRAX1")) group.long 0x300++0x03 line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register" bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_VREF2_SEL ,IVREF_LVL for Vref2 pull-down calibration measure cycle" textline " " bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_VREF2_SEL ,IVREF_LVL for Vref2 pull-up calibration measure cycle" endif textline " " width 35. sif (cpuis("TEGRAX2")) group.long 0x30C++0x03 line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register" bitfld.long 0x00 21. " XM2COMP_BGLP_E_PWRD ,[PMC] Active high to power down low power BANDGAP regulator" "Disabled,Enabled" bitfld.long 0x00 20. " XM2COMP_BG_E_PWRD ,[PMC] Active high to power down regulator" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT ,Select test output" "Disabled,Enabled" bitfld.long 0x00 9. " EMC2TMC_CFG_XM2COMP_E_PWRD ,Operation type" "Normal,IDDQ test" textline " " bitfld.long 0x00 4.--6. " EMC2TMC_CFG_XM2COMP_BG_SETUP ,Temperature coefficient pin" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " EMC2TMC_CFG_XM2COMP_BG_MODE ,Regulator mode" "HIGHPERF,LOWPOWER" textline " " bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_MEM_MODE ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU" elif (cpuis("TEGRAX1")) group.long 0x30C++0x03 line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register" bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT ,Select test output" "Disabled,Enabled" bitfld.long 0x00 9. " EMC2TMC_CFG_XM2COMP_E_PWRD ,Operation type" "Normal,IDDQ test" textline " " bitfld.long 0x00 4.--6. " EMC2TMC_CFG_XM2COMP_BG_SETUP ,Temperature coefficient pin" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " EMC2TMC_CFG_XM2COMP_BG_MODE ,Regulator mode" "HIGHPERF,LOWPOWER" textline " " bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_MEM_MODE ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU" endif group.long 0x310++0x0F line.long 0x00 "FDPD_CTRL_DQ_0,DPD Settle Times Configuration Register" bitfld.long 0x00 30.--31. " DQ_PHASE_MIN ,DPD phase lower limiter" "0,1,2,3" sif (!cpuis("TEGRAX2")) bitfld.long 0x00 29. " CMD_DPD_RAMP_ENABLE ,Enables the ramp feature on command" "Disabled,Enabled" endif textline " " bitfld.long 0x00 24.--28. " DQ_DPD_EXIT_DELAY ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. " DQ_PHASE_RAMP_IN_TIME ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--16. " DQ_PHASE_RAMP_OUT_TIME ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--11. " DQ_PHASE_HOLD_MIN ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. " DQ_DPD_ENTRY_DELAY ,Initial delay after idle before starting the FDPD ramp process" line.long 0x04 "FDPD_CTRL_CMD_0,DPD Settle Times Configuration Register" bitfld.long 0x04 30.--31. " CMD_PHASE_MIN ,DPD phase lower limiter" "0,1,2,3" textline " " bitfld.long 0x04 29. " CMD_DPD_RAMP_ENABLE ,Enables the ramp feature on cmd" "Disabled,Enabled" bitfld.long 0x04 24.--28. " CMD_DPD_EXIT_DELAY ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 20.--23. " CMD_PHASE_RAMP_IN_TIME ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--16. " CMD_PHASE_RAMP_OUT_TIME ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 8.--11. " CMD_PHASE_HOLD_MIN ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 0.--7. 1. " CMD_DPD_ENTRY_DELAY ,Initial delay after idle before starting the FDPD ramp process" line.long 0x08 "PMACRO_CMD_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On CMD Channels Control Register" bitfld.long 0x08 16.--17. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT8 ,Assigned to dqs_tx_pwrd" "0,1,2,3" bitfld.long 0x08 14.--15. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT7 ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3" textline " " bitfld.long 0x08 12.--13. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT6 ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3" bitfld.long 0x08 10.--11. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT5 ,Assigned to RFU[13] as spare" "0,1,2,3" textline " " bitfld.long 0x08 8.--9. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT4 ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3" bitfld.long 0x08 6.--7. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT3 ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3" textline " " bitfld.long 0x08 4.--5. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT2 ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3" bitfld.long 0x08 2.--3. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT1 ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3" textline " " bitfld.long 0x08 0.--1. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT0 ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3" line.long 0x0C "PMACRO_DATA_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On DATA Channels Control Register" bitfld.long 0x0C 16.--17. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT8 ,Assigned to dqs_tx_pwrd" "0,1,2,3" bitfld.long 0x0C 14.--15. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT7 ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3" textline " " bitfld.long 0x0C 12.--13. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT6 ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3" bitfld.long 0x0C 10.--11. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT5 ,Assigned to RFU[13] as spare" "0,1,2,3" textline " " bitfld.long 0x0C 8.--9. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT4 ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3" bitfld.long 0x0C 6.--7. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT3 ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3" textline " " bitfld.long 0x0C 4.--5. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT2 ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3" bitfld.long 0x0C 2.--3. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT1 ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3" textline " " bitfld.long 0x0C 0.--1. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT0 ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3" group.long 0x324++0x03 line.long 0x00 "SCRATCH0_0,Scratch Register For General Use" group.long 0x330++0x07 line.long 0x00 "PMACRO_BRICK_CTRL_RFU1_0,Lower 16 RFU Pin Of The IOBRICK Control Register" hexmask.long.word 0x00 16.--31. 1. " DATA_BRICK_CTRL_RFU1 ,Data brick control RFU1" hexmask.long.word 0x00 0.--15. 1. " CMD_BRICK_CTRL_RFU1 ,Command brick control RFU1" line.long 0x04 "PMACRO_BRICK_CTRL_RFU2_0,Upper 16 RFU Pin Of The IOBRICK Control Register" hexmask.long.word 0x04 16.--31. 1. " DATA_BRICK_CTRL_RFU2 ,Data brick control RFU2" hexmask.long.word 0x04 0.--15. 1. " CMD_BRICK_CTRL_RFU2 ,Command brick control RFU2" group.long 0x380++0x0B line.long 0x00 "CMD_MAPPING_CMD0_0_0,Command Mapping Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " CMD0_DQ3_MAP ,Mapping of CMD brick 0 data pin 3" hexmask.long.byte 0x00 16.--22. 1. " CMD0_DQ2_MAP ,Mapping of CMD brick 0 data pin 2" textline " " hexmask.long.byte 0x00 8.--14. 1. " CMD0_DQ1_MAP ,Mapping of CMD brick 0 data pin 1" hexmask.long.byte 0x00 0.--6. 1. " CMD0_DQ0_MAP ,Mapping of CMD brick 0 data pin 0" line.long 0x04 "CMD_MAPPING_CMD0_1_0,Command Mapping Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " CMD0_DQ7_MAP ,Mapping of CMD brick 0 data pin 7" hexmask.long.byte 0x04 16.--22. 1. " CMD0_DQ6_MAP ,Mapping of CMD brick 0 data pin 6" textline " " hexmask.long.byte 0x04 8.--14. 1. " CMD0_DQ5_MAP ,Mapping of CMD brick 0 data pin 5" hexmask.long.byte 0x04 0.--6. 1. " CMD0_DQ4_MAP ,Mapping of CMD brick 0 data pin 4" line.long 0x08 "CMD_MAPPING_CMD0_2_0,Command Mapping Configuration Register" bitfld.long 0x08 24.--27. " CMD0_DQ_CMD_MAP ,Mapping of CMD brick 0 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." hexmask.long.byte 0x08 16.--22. 1. " CMD0_DQSN_MAP ,Mapping of CMD brick 0 DQSN pin" textline " " hexmask.long.byte 0x08 8.--14. 1. " CMD0_DQSP_MAP ,Mapping of CMD brick 0 DQSP pin" hexmask.long.byte 0x08 0.--6. 1. " CMD0_DQ8_MAP ,Mapping of CMD brick 0 data pin 8" group.long 0x38C++0x0B line.long 0x00 "CMD_MAPPING_CMD1_0_0,Command Mapping Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " CMD1_DQ3_MAP ,Mapping of CMD brick 1 data pin 3" hexmask.long.byte 0x00 16.--22. 1. " CMD1_DQ2_MAP ,Mapping of CMD brick 1 data pin 2" textline " " hexmask.long.byte 0x00 8.--14. 1. " CMD1_DQ1_MAP ,Mapping of CMD brick 1 data pin 1" hexmask.long.byte 0x00 0.--6. 1. " CMD1_DQ0_MAP ,Mapping of CMD brick 1 data pin 0" line.long 0x04 "CMD_MAPPING_CMD1_1_0,Command Mapping Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " CMD1_DQ7_MAP ,Mapping of CMD brick 1 data pin 7" hexmask.long.byte 0x04 16.--22. 1. " CMD1_DQ6_MAP ,Mapping of CMD brick 1 data pin 6" textline " " hexmask.long.byte 0x04 8.--14. 1. " CMD1_DQ5_MAP ,Mapping of CMD brick 1 data pin 5" hexmask.long.byte 0x04 0.--6. 1. " CMD1_DQ4_MAP ,Mapping of CMD brick 1 data pin 4" line.long 0x08 "CMD_MAPPING_CMD1_2_0,Command Mapping Configuration Register" bitfld.long 0x08 24.--27. " CMD1_DQ_CMD_MAP ,Mapping of CMD brick 1 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." hexmask.long.byte 0x08 16.--22. 1. " CMD1_DQSN_MAP ,Mapping of CMD brick 1 DQSN pin" textline " " hexmask.long.byte 0x08 8.--14. 1. " CMD1_DQSP_MAP ,Mapping of CMD brick 1 DQSP pin" hexmask.long.byte 0x08 0.--6. 1. " CMD1_DQ8_MAP ,Mapping of CMD brick 1 data pin 8" group.long 0x398++0x0B line.long 0x00 "CMD_MAPPING_CMD2_0_0,Command Mapping Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " CMD2_DQ3_MAP ,Mapping of CMD brick 2 data pin 3" hexmask.long.byte 0x00 16.--22. 1. " CMD2_DQ2_MAP ,Mapping of CMD brick 2 data pin 2" textline " " hexmask.long.byte 0x00 8.--14. 1. " CMD2_DQ1_MAP ,Mapping of CMD brick 2 data pin 1" hexmask.long.byte 0x00 0.--6. 1. " CMD2_DQ0_MAP ,Mapping of CMD brick 2 data pin 0" line.long 0x04 "CMD_MAPPING_CMD2_1_0,Command Mapping Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " CMD2_DQ7_MAP ,Mapping of CMD brick 2 data pin 7" hexmask.long.byte 0x04 16.--22. 1. " CMD2_DQ6_MAP ,Mapping of CMD brick 2 data pin 6" textline " " hexmask.long.byte 0x04 8.--14. 1. " CMD2_DQ5_MAP ,Mapping of CMD brick 2 data pin 5" hexmask.long.byte 0x04 0.--6. 1. " CMD2_DQ4_MAP ,Mapping of CMD brick 2 data pin 4" line.long 0x08 "CMD_MAPPING_CMD2_2_0,Command Mapping Configuration Register" bitfld.long 0x08 24.--27. " CMD2_DQ_CMD_MAP ,Mapping of CMD brick 2 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." hexmask.long.byte 0x08 16.--22. 1. " CMD2_DQSN_MAP ,Mapping of CMD brick 2 DQSN pin" textline " " hexmask.long.byte 0x08 8.--14. 1. " CMD2_DQSP_MAP ,Mapping of CMD brick 2 DQSP pin" hexmask.long.byte 0x08 0.--6. 1. " CMD2_DQ8_MAP ,Mapping of CMD brick 2 data pin 8" group.long 0x3A4++0x0B line.long 0x00 "CMD_MAPPING_CMD3_0_0,Command Mapping Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " CMD3_DQ3_MAP ,Mapping of CMD brick 3 data pin 3" hexmask.long.byte 0x00 16.--22. 1. " CMD3_DQ2_MAP ,Mapping of CMD brick 3 data pin 2" textline " " hexmask.long.byte 0x00 8.--14. 1. " CMD3_DQ1_MAP ,Mapping of CMD brick 3 data pin 1" hexmask.long.byte 0x00 0.--6. 1. " CMD3_DQ0_MAP ,Mapping of CMD brick 3 data pin 0" line.long 0x04 "CMD_MAPPING_CMD3_1_0,Command Mapping Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " CMD3_DQ7_MAP ,Mapping of CMD brick 3 data pin 7" hexmask.long.byte 0x04 16.--22. 1. " CMD3_DQ6_MAP ,Mapping of CMD brick 3 data pin 6" textline " " hexmask.long.byte 0x04 8.--14. 1. " CMD3_DQ5_MAP ,Mapping of CMD brick 3 data pin 5" hexmask.long.byte 0x04 0.--6. 1. " CMD3_DQ4_MAP ,Mapping of CMD brick 3 data pin 4" line.long 0x08 "CMD_MAPPING_CMD3_2_0,Command Mapping Configuration Register" bitfld.long 0x08 24.--27. " CMD3_DQ_CMD_MAP ,Mapping of CMD brick 3 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." hexmask.long.byte 0x08 16.--22. 1. " CMD3_DQSN_MAP ,Mapping of CMD brick 3 DQSN pin" textline " " hexmask.long.byte 0x08 8.--14. 1. " CMD3_DQSP_MAP ,Mapping of CMD brick 3 DQSP pin" hexmask.long.byte 0x08 0.--6. 1. " CMD3_DQ8_MAP ,Mapping of CMD brick 3 data pin 8" group.long 0x3B0++0x17 line.long 0x00 "CMD_MAPPING_BYTE_0,Command Mapping Configuration Register" bitfld.long 0x00 28.--31. " BYTE7_DQ_CMD_MAP ,Mapping of BYTE7 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." bitfld.long 0x00 24.--27. " BYTE6_DQ_CMD_MAP ,Mapping of BYTE6 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." textline " " bitfld.long 0x00 20.--23. " BYTE5_DQ_CMD_MAP ,Mapping of BYTE5 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." bitfld.long 0x00 16.--19. " BYTE4_DQ_CMD_MAP ,Mapping of BYTE4 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." textline " " bitfld.long 0x00 12.--15. " BYTE3_DQ_CMD_MAP ,Mapping of BYTE3 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." bitfld.long 0x00 8.--11. " BYTE2_DQ_CMD_MAP ,Mapping of BYTE2 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." textline " " bitfld.long 0x00 4.--7. " BYTE1_DQ_CMD_MAP ,Mapping of BYTE1 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." bitfld.long 0x00 0.--3. " BYTE0_DQ_CMD_MAP ,Mapping of BYTE0 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." line.long 0x04 "TR_TIMING_0_0,Training Timing Register" bitfld.long 0x04 23.--26. " T_CATR_RD2VREF ,CATR read to CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 18.--21. " T_DHTRAIN ,Hold time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12.--15. " T_DSTRAIN ,Setup time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--9. 1. " T_VREF_LONG ,Delay between CAVREF and CATR reads" line.long 0x08 "TR_CTRL_0_0,Training Control Register 0" bitfld.long 0x08 8. " CATR_ENABLE ,CA Training enable" "Disabled,Enabled" bitfld.long 0x08 5.--7. " CAVREF_DQS_DURATION ,Number of DQS toggles to latch CAVREF" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4. " CAVREF_RIVE_DQS ,Drive DQS" "0,1" bitfld.long 0x08 0.--3. " CAVREF_TX_BYTE_MASK ,Mask TX_D|EN of DQ|DQS during CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "TR_CTRL_1_0,Training Control Register 1" bitfld.long 0x0C 4. " ENABLE_TR_QRST ,TR QRST select" "Disabled,Enabled" bitfld.long 0x0C 3. " ENABLE_TR_QSAFE ,TR QSAFE select" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " ENABLE_TR_RDV_MASK ,TR RDV_MASK select" "Disabled,Enabled" bitfld.long 0x0C 1. " ENABLE_TR_QPOP ,TR QPOP select" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " ENABLE_TR_RDV ,TR RDV select" "Disabled,Enabled" line.long 0x10 "SWITCH_BACK_CTRL_0,Switch Back Control Register" bitfld.long 0x10 0. " CLK_SWITCH_BACK ,Clock switch back request trigger" "Not triggered,Triggered" line.long 0x14 "TR_RDV_0,Training RDV Register" hexmask.long.byte 0x14 0.--6. 1. " TR_RDV ,Training RDV value" rgroup.long 0x3C8++0x0F line.long 0x00 "STALL_THEN_EXE_BEFORE_CLKCHANGE_0,Subsequent Register Access Stall Control" bitfld.long 0x00 0. " STALL_THEN_EXE_BEFORE_CLKCHANGE ,Stall subsequent register access" "Disabled,Enabled" line.long 0x04 "STALL_THEN_EXE_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control" bitfld.long 0x04 0. " STALL_THEN_EXE_AFTER_CLKCHANGE ,Stall subsequent register access" "Disabled,Enabled" line.long 0x08 "UNSTALL_RW_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control" bitfld.long 0x08 0. " UNSTALL_RW_AFTER_CLKCHANGE ,Unstall memory read|write after clock change" "Disabled,Enabled" line.long 0x0C "AUTO_CAL_CLK_STATUS2_0,Autocal Master Status Register" hexmask.long.byte 0x0C 24.--29. 1. " AUTO_CAL_VREF2_DRVDN ,Pull-down code from VREF2 measure cycle" hexmask.long.byte 0x0C 16.--21. 1. " AUTO_CAL_VREF2_DRVUP ,Pull-up code from VREF2 measure cycle" textline " " hexmask.long.byte 0x0C 8.--13. 1. " AUTO_CAL_VREF1_DRVDN ,Pull-down code from VREF1 measure cycle" hexmask.long.byte 0x0C 0.--5. 1. " AUTO_CAL_VREF1_DRVUP ,Pull-up code from VREF1 measure cycle" group.long 0x3D8++0x0F line.long 0x00 "SEL_DPD_CTRL_0,Configures Functional SEL_DPD Modes" bitfld.long 0x00 16.--18. " SEL_DPD_DLY ,Number of cycles to wait before asserting SEL_DPD" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. " DATA_SEL_DPD_EN ,Allow SEL_DPD assertion for data pads" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ODT_SEL_DPD_EN ,Tie SEL_DPD for ODT pads to ENABLE_ODT_DURING_WRITE" "Disabled,Enabled" bitfld.long 0x00 4. " RESET_SEL_DPD_EN ,Assert SEL_DPD for reset pad" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CA_SEL_DPD_EN ,Allow SEL_DPD assertion for discrete command/address pads" "Disabled,Enabled" bitfld.long 0x00 2. " CLK_SEL_DPD_EN ,Allow SEL_DPD assertion for discrete clock pad" "Disabled,Enabled" line.long 0x04 "PRE_REFRESH_REQ_CNT_0,Pre Refresh Request Count" hexmask.long.word 0x04 0.--15. 1. " PRE_REF_REQ_CNT ,Pre-refresh request count" line.long 0x08 "DYN_SELF_REF_CONTROL_0,Threshold For Dynamic Self-refresh Entry" bitfld.long 0x08 31. " DSR_PER_DEVICE ,Controls whether self-refresh is done on a per-device basis" "Disabled,Enabled" hexmask.long.word 0x08 0.--15. 1. " DSR_THRESHOLD ,Number of idle cycles to wait before allowing dynamic self-refresh entry" line.long 0x0C "TXSRDLL_0,DRAM Timing Parameter For TXSRDLL" hexmask.long.word 0x0C 0.--11. 1. " TXSRDLL ,Cycles between self-refresh exit & first DRAM command requiring a locked DLL" group.long 0x3E8++0x07 line.long 0x00 "CCFIFO_ADDR_0,CCFIFO Address Offset" bitfld.long 0x00 31. " CCFIFO_STALL_CNT_BY_1 ,Count-by VALUE clock increments select" "256,1" hexmask.long.word 0x00 16.--30. 1. " CCFIFO_STALL_CNT ,CCFIFO stall counter value" textline " " hexmask.long.word 0x00 0.--15. 0x01 " CCFIFO_ADDR ,Clock change FIFO address register" line.long 0x04 "CCFIFO_ADDR_0,Clock Change FIFO Data Register" rgroup.long 0x3F0++0x03 line.long 0x00 "CCFIFO_STATUS_0,CCFIFO Status" hexmask.long.byte 0x00 0.--6. 1. " CCFIFO_COUNT ,CCFIFO count" group.long 0x3F4++0x0F line.long 0x00 "TR_QPOP_0,TR_QPOP DRAM Timing Parameter" hexmask.long.byte 0x00 16.--22. 1. " TR_QPOP_PREAMBLE ,Time from read command to pop preamble from the pad macro FIFO" hexmask.long.byte 0x00 0.--6. 1. " TR_QPOP ,Time from training read command to pop data from the pad macro FIFO" line.long 0x04 "TR_RDV_MASK_0,TR_RDV_MASK_0 DRAM Timing Parameter" hexmask.long.byte 0x04 0.--6. 1. " TR_RDV_MASK ,Training RDV mask bits" line.long 0x08 "TR_QSAFE_0,TR_QSAFE_0 DRAM Timing Parameter" hexmask.long.byte 0x08 0.--6. 1. " TR_QSAFE ,Training time from a read command to when it is safe to issue a QRST" line.long 0x0C "TR_QRST_0,TR_QRST_0 DRAM Timing Parameter" bitfld.long 0x0C 16.--20. " TR_QRST_DURATION ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles" hexmask.long.byte 0x0C 0.--6. 1. " TR_QRST ,Training time from a read command to when it is safe to issue a QRST" group.long 0x404++0x03 line.long 0x00 "SWIZZLE_RANK0_BYTE0_0,Swizzle Rank0 Byte0 0" bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE0_BIT7_SEL ,SWZ rank0 byte0 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK0_BYTE0_BIT6_SEL ,SWZ rank0 byte0 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK0_BYTE0_BIT5_SEL ,SWZ rank0 byte0 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK0_BYTE0_BIT4_SEL ,SWZ rank0 byte0 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK0_BYTE0_BIT3_SEL ,SWZ rank0 byte0 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK0_BYTE0_BIT2_SEL ,SWZ rank0 byte0 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK0_BYTE0_BIT1_SEL ,SWZ rank0 byte0 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK0_BYTE0_BIT0_SEL ,SWZ rank0 byte0 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x408++0x03 line.long 0x00 "SWIZZLE_RANK0_BYTE1_0,Swizzle Rank0 Byte1 0" bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE1_BIT7_SEL ,SWZ rank0 byte1 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK0_BYTE1_BIT6_SEL ,SWZ rank0 byte1 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK0_BYTE1_BIT5_SEL ,SWZ rank0 byte1 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK0_BYTE1_BIT4_SEL ,SWZ rank0 byte1 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK0_BYTE1_BIT3_SEL ,SWZ rank0 byte1 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK0_BYTE1_BIT2_SEL ,SWZ rank0 byte1 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK0_BYTE1_BIT1_SEL ,SWZ rank0 byte1 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK0_BYTE1_BIT0_SEL ,SWZ rank0 byte1 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x40C++0x03 line.long 0x00 "SWIZZLE_RANK0_BYTE2_0,Swizzle Rank0 Byte2 0" bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE2_BIT7_SEL ,SWZ rank0 byte2 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK0_BYTE2_BIT6_SEL ,SWZ rank0 byte2 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK0_BYTE2_BIT5_SEL ,SWZ rank0 byte2 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK0_BYTE2_BIT4_SEL ,SWZ rank0 byte2 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK0_BYTE2_BIT3_SEL ,SWZ rank0 byte2 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK0_BYTE2_BIT2_SEL ,SWZ rank0 byte2 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK0_BYTE2_BIT1_SEL ,SWZ rank0 byte2 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK0_BYTE2_BIT0_SEL ,SWZ rank0 byte2 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x410++0x03 line.long 0x00 "SWIZZLE_RANK0_BYTE3_0,Swizzle Rank0 Byte3 0" bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE3_BIT7_SEL ,SWZ rank0 byte3 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK0_BYTE3_BIT6_SEL ,SWZ rank0 byte3 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK0_BYTE3_BIT5_SEL ,SWZ rank0 byte3 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK0_BYTE3_BIT4_SEL ,SWZ rank0 byte3 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK0_BYTE3_BIT3_SEL ,SWZ rank0 byte3 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK0_BYTE3_BIT2_SEL ,SWZ rank0 byte3 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK0_BYTE3_BIT1_SEL ,SWZ rank0 byte3 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK0_BYTE3_BIT0_SEL ,SWZ rank0 byte3 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x418++0x03 line.long 0x00 "SWIZZLE_RANK1_BYTE0_0,Swizzle Rank1 Byte0 0" bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE0_BIT7_SEL ,SWZ rank1 byte0 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK1_BYTE0_BIT6_SEL ,SWZ rank1 byte0 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK1_BYTE0_BIT5_SEL ,SWZ rank1 byte0 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK1_BYTE0_BIT4_SEL ,SWZ rank1 byte0 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK1_BYTE0_BIT3_SEL ,SWZ rank1 byte0 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK1_BYTE0_BIT2_SEL ,SWZ rank1 byte0 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK1_BYTE0_BIT1_SEL ,SWZ rank1 byte0 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK1_BYTE0_BIT0_SEL ,SWZ rank1 byte0 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x41C++0x03 line.long 0x00 "SWIZZLE_RANK1_BYTE1_0,Swizzle Rank1 Byte1 0" bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE1_BIT7_SEL ,SWZ rank1 byte1 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK1_BYTE1_BIT6_SEL ,SWZ rank1 byte1 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK1_BYTE1_BIT5_SEL ,SWZ rank1 byte1 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK1_BYTE1_BIT4_SEL ,SWZ rank1 byte1 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK1_BYTE1_BIT3_SEL ,SWZ rank1 byte1 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK1_BYTE1_BIT2_SEL ,SWZ rank1 byte1 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK1_BYTE1_BIT1_SEL ,SWZ rank1 byte1 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK1_BYTE1_BIT0_SEL ,SWZ rank1 byte1 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x420++0x03 line.long 0x00 "SWIZZLE_RANK1_BYTE2_0,Swizzle Rank1 Byte2 0" bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE2_BIT7_SEL ,SWZ rank1 byte2 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK1_BYTE2_BIT6_SEL ,SWZ rank1 byte2 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK1_BYTE2_BIT5_SEL ,SWZ rank1 byte2 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK1_BYTE2_BIT4_SEL ,SWZ rank1 byte2 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK1_BYTE2_BIT3_SEL ,SWZ rank1 byte2 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK1_BYTE2_BIT2_SEL ,SWZ rank1 byte2 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK1_BYTE2_BIT1_SEL ,SWZ rank1 byte2 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK1_BYTE2_BIT0_SEL ,SWZ rank1 byte2 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x424++0x03 line.long 0x00 "SWIZZLE_RANK1_BYTE3_0,Swizzle Rank1 Byte3 0" bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE3_BIT7_SEL ,SWZ rank1 byte3 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK1_BYTE3_BIT6_SEL ,SWZ rank1 byte3 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK1_BYTE3_BIT5_SEL ,SWZ rank1 byte3 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK1_BYTE3_BIT4_SEL ,SWZ rank1 byte3 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK1_BYTE3_BIT3_SEL ,SWZ rank1 byte3 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK1_BYTE3_BIT2_SEL ,SWZ rank1 byte3 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK1_BYTE3_BIT1_SEL ,SWZ rank1 byte3 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK1_BYTE3_BIT0_SEL ,SWZ rank1 byte3 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x428++0x03 line.long 0x00 "ISSUE_QRST_0,ISSUE_QRST_0 DRAM Timing Parameter" bitfld.long 0x00 0. " ISSUE_QRST ,Sets QRST to pads|macros" "0,1" group.long 0x440++0x0B line.long 0x00 "PMC_SCRATCH1_0,PMC Scratch Register 1" line.long 0x04 "PMC_SCRATCH2_0,PMC Scratch Register 2" line.long 0x08 "PMC_SCRATCH3_0,PMC Scratch Register 3" sif (cpuis("TEGRAX2")) group.long 0x44C++0x0B line.long 0x00 "MCH_GLOBAL_INTSTATUS_0,Global interrupt status register for all 4 EMC channels" bitfld.long 0x00 3. " INT_CH3 ,Set when there is a interrupt from channel-3" "None,Interrupt" bitfld.long 0x00 2. " INT_CH2 ,Set when there is a interrupt from channel-2" "None,Interrupt" textline " " bitfld.long 0x00 1. " INT_CH1 ,Set when there is a interrupt from channel-1" "None,Interrupt" bitfld.long 0x00 0. " INT_CH0 ,Set when there is a interrupt from channel-0" "None,Interrupt" line.long 0x04 "MCH_GLOBAL_CRITICAL_INTSTATUS_0,critical interrupt status register for all 4 EMC channels" bitfld.long 0x04 3. " CRITICAL_INT_CH3 ,Set when there is a critical interrupt from channel-3" "None,Interrupt" bitfld.long 0x04 2. " CRITICAL_INT_CH2 ,Set when there is a critical interrupt from channel-2" "None,Interrupt" textline " " bitfld.long 0x04 1. " CRITICAL_INT_CH1 ,Set when there is a critical interrupt from channel-1" "None,Interrupt" bitfld.long 0x04 0. " CRITICAL_INT_CH0 ,Set when there is a critical interrupt from channel-0" "None,Interrupt" line.long 0x08 "RESET_PAD_CTRL_0,Controls the reset pad input bits" bitfld.long 0x08 4.--7. " RESET_RFU ,RFU bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " RESET_EN ,Enables the TH path when set to 0" "None,INT" textline " " bitfld.long 0x08 1. " RESET_E_INPUT ,When set to 1 enables the RX path for reset pads" "None,Interrupt" bitfld.long 0x08 0. " RESET_E_WKPD ,When set to 1 enables the weak pad for reset pads" "None,Interrupt" endif group.long 0x458++0x17 line.long 0x00 "AUTO_CAL_CONFIG2_0,Auto-calibration Master Compute Control Register 2" bitfld.long 0x00 26.--27. " AUTO_CAL_DQS_PD_TERM_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 24.--25. " AUTO_CAL_DQS_PU_TERM_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 22.--23. " AUTO_CAL_DQ_PD_TERM_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 20.--21. " AUTO_CAL_DQ_PU_TERM_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 18.--19. " AUTO_CAL_DQS_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 16.--17. " AUTO_CAL_DQS_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 14.--15. " AUTO_CAL_DQ_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 12.--13. " AUTO_CAL_DQ_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 10.--11. " AUTO_CAL_CMD_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 8.--9. " AUTO_CAL_CMD_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 6.--7. " AUTO_CAL_CA_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 4.--5. " AUTO_CAL_CA_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 2.--3. " AUTO_CAL_CLK_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 0.--1. " AUTO_CAL_CLK_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." sif (cpuis("TEGRAX2")) group.long 0x45C++0x03 line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3" bitfld.long 0x00 20.--23. " AUTO_CAL_CLK_PD_SLOPE ,Slope for CK pull-down value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." bitfld.long 0x00 16.--19. " AUTO_CAL_CLK_PU_SLOPE ,Slope for CK pull-up value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." textline " " hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_CLK_PD_OFFSET ,2's complement offset for CK pull-down value" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_CLK_PU_OFFSET ,2's complement offset for CK pull-up value" elif (cpuis("TEGRAX1")) group.long 0x45C++0x03 line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3" bitfld.long 0x00 20.--22. " AUTO_CAL_CLK_PD_SLOPE ,Slope for CK pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_CLK_PU_SLOPE ,Slope for CK pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_CLK_PD_OFFSET ,2's complement offset for CK pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_CLK_PU_OFFSET ,2's complement offset for CK pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x460++0x0F line.long 0x00 "TR_DVFS,Training DVFS Register" bitfld.long 0x00 0. " TRAINING_DVFS ,DVFS training enable" "Disabled,Enabled" line.long 0x04 "AUTO_CAL_CHANNEL_0,Autocal Slave Control Register" bitfld.long 0x04 31. " AUTO_CAL_UPDATE_IDLE ,Allow autocal update outside of refresh if dramc is idle" "Disabled,Enabled" bitfld.long 0x04 30. " AUTO_CAL_STALL_ALL_TRAFFIC ,Stall all traffic for an autocal update" "Disabled,Enabled" textline " " rbitfld.long 0x04 29. " AUTO_CAL_COMPUTE_START_DVFS ,Trigger autocal compute FSM after DVFS shadow update" "Disabled,Enabled" hexmask.long.byte 0x04 21.--27. 1. " CAL_WAIT_AFTER_DVFS ,Number of EMC clocks to wait after DVFS shadow update before resuming traffic to DRAM" textline " " bitfld.long 0x04 16.--20. " AUTO_CAL_UPDATE_TIMEOUT ,Timeout before forcing dramc idle to issue an autocal update" "Disabled,2 EMCCLKS,2^2 EMCCLKS,2^3 EMCCLKS,2^4 EMCCLKS,2^5 EMCCLKS,2^6 EMCCLKS,2^7 EMCCLKS,2^8 EMCCLKS,2^9 EMCCLKS,2^10 EMCCLKS,2^11 EMCCLKS,2^12 EMCCLKS,2^13 EMCCLKS,2^14 EMCCLKS,2^15 EMCCLKS,2^16 EMCCLKS,2^17 EMCCLKS,2^18 EMCCLKS,2^19 EMCCLKS,2^20 EMCCLKS,2^21 EMCCLKS,2^22 EMCCLKS,2^23 EMCCLKS,2^24 EMCCLKS,2^25 EMCCLKS,2^26 EMCCLKS,2^27 EMCCLKS,2^28 EMCCLKS,2^29 EMCCLKS,2^30 EMCCLKS,2^31 EMCCLKS" bitfld.long 0x04 8.--11. " AUTO_CAL_WAIT_BEFORE_UPDATE ,Number of EMC clocks to wait before update" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--5. " AUTO_CAL_NUM_STALL_CYCLES ,Number of EMC clocks to stall the DRAM bus for autocal codes update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "IBDLY_0,IBDLY_0 DRAM Timing Parameter" bitfld.long 0x08 28.--29. " IBDLY_MODE ,IBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD" hexmask.long.byte 0x08 0.--6. 1. " IBDLY ,Specifies when to change IBDLY for DQ|DQS" line.long 0x0C "OBDLY_0,OBDLY_0 DRAM Timing Parameter" bitfld.long 0x0C 28.--29. " OBDLY_MODE ,OBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD" bitfld.long 0x0C 0.--5. " OBDLY ,Specifies when to update OB trim values with respect to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("TEGRAX2")) group.long 0x470++0x07 line.long 0x00 "ASR_CONTROL_0,Aggressive self refresh control register" bitfld.long 0x00 31. " DISPLAY_STUTTER_EN ,Display stutter enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " ASR_THRESHOLD ,PMC number of idle cycles to wait before allowing dynamic self-refresh entry" line.long 0x04 "MCH_GLOBAL_NONCRITICAL_INTSTATUS_0,Global non critical interrupt status (primarily meant for SBE) register for all 4 EMC channels" bitfld.long 0x04 3. " NONCRITICAL_INT_CH3 ,Set when there is a critical interrupt from channel-3" "None,Interrupt" bitfld.long 0x04 2. " NONCRITICAL_INT_CH2 ,Set when there is a critical interrupt from channel-2" "None,Interrupt" textline " " bitfld.long 0x04 1. " NONCRITICAL_INT_CH1 ,Set when there is a critical interrupt from channel-1" "None,Interrupt" bitfld.long 0x04 0. " NONCRITICAL_INT_CH0 ,Set when there is a critical interrupt from channel-0" "None,Interrupt" endif textline " " width 26. group.long 0x480++0x03 line.long 0x00 "TXDSRVTTGEN_0,TXDSRVTTGEN_0 DRAM Timing Parameter" hexmask.long.word 0x00 0.--11. 1. " TXDSRVTTGEN ,Cycles to wait from DSR exit" group.long 0x48C++0x13 line.long 0x00 "WE_DURATION_0,WE_DURATION_0 DRAM Timing Parameter" bitfld.long 0x00 0.--4. " WE_DURATION ,Number of cycles to assert write enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "WS_DURATION_0,WS_DURATION_0 DRAM Timing Parameter" bitfld.long 0x04 0.--4. " WS_DURATION ,Number of cycles to assert write strobe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "WEV_0,WEV_0 DRAM Timing Parameter" bitfld.long 0x08 0.--5. " WEV ,Number of cycles to post (delay) write enable from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..." line.long 0x0C "WSV_0,WSV_0 DRAM Timing Parameter" bitfld.long 0x0C 0.--5. " WSV ,Number of cycles to post (delay) write strobe from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..." line.long 0x10 "CFG_3_0,EMC Configuration Register 3" bitfld.long 0x10 4.--6. " MRR_BYTESEL_X16 ,Indicates to which byte lane second DRAM byte 0 is connected" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " MRR_BYTESEL ,Indicates which AP byte lane is connected to DRAM byte 0" "0,1,2,3,4,5,6,7" group.long 0x4A0++0x03 line.long 0x00 "MRW5_0,Command Trigger MRW5" bitfld.long 0x00 30.--31. " MRW5_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW5_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " hexmask.long.byte 0x00 16.--23. 0x01 " MRW5_MA ,Register address" hexmask.long.byte 0x00 0.--7. 1. " MRW5_OP ,Data to be written" group.long 0x4A4++0x03 line.long 0x00 "MRW6 _0,Command Trigger MRW6 " bitfld.long 0x00 30.--31. " MRW6 _DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW6 _CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW6 _SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW6 _MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW6 _SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW6 _SP0 ,Data to be written to subp0" group.long 0x4A8++0x03 line.long 0x00 "MRW7 _0,Command Trigger MRW7 " bitfld.long 0x00 30.--31. " MRW7 _DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW7 _CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW7 _SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW7 _MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW7 _SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW7 _SP0 ,Data to be written to subp0" group.long 0x4AC++0x03 line.long 0x00 "MRW8 _0,Command Trigger MRW8 " bitfld.long 0x00 30.--31. " MRW8 _DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW8 _CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW8 _SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW8 _MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW8 _SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW8 _SP0 ,Data to be written to subp0" group.long 0x4B0++0x03 line.long 0x00 "MRW9 _0,Command Trigger MRW9 " bitfld.long 0x00 30.--31. " MRW9 _DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW9 _CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW9 _SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW9 _MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW9 _SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW9 _SP0 ,Data to be written to subp0" group.long 0x4B4++0x03 line.long 0x00 "MRW10_0,Command Trigger MRW10" bitfld.long 0x00 30.--31. " MRW10_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW10_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW10_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW10_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW10_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW10_SP0 ,Data to be written to subp0" group.long 0x4B8++0x03 line.long 0x00 "MRW11_0,Command Trigger MRW11" bitfld.long 0x00 30.--31. " MRW11_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW11_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW11_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW11_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW11_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW11_SP0 ,Data to be written to subp0" group.long 0x4BC++0x03 line.long 0x00 "MRW12_0,Command Trigger MRW12" bitfld.long 0x00 30.--31. " MRW12_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW12_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW12_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW12_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW12_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW12_SP0 ,Data to be written to subp0" group.long 0x4C0++0x03 line.long 0x00 "MRW13_0,Command Trigger MRW13" bitfld.long 0x00 30.--31. " MRW13_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW13_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW13_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW13_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW13_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW13_SP0 ,Data to be written to subp0" group.long 0x4C4++0x03 line.long 0x00 "MRW14_0,Command Trigger MRW14" bitfld.long 0x00 30.--31. " MRW14_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW14_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW14_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW14_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW14_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW14_SP0 ,Data to be written to subp0" group.long 0x4D0++0x03 line.long 0x00 "MRW15_0,Command Trigger MRW15" bitfld.long 0x00 30.--31. " MRW15_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW15_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW15_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW15_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW15_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW15_SP0 ,Data to be written to subp0" group.long 0x4D4++0x07 line.long 0x00 "CFG_SYNC_0,Sync Configuration 0" bitfld.long 0x00 0. " CHANNEL_SYNC ,Channel sync" "0,1" line.long 0x04 "FDPD_CTRL_CMD_NO_RAMP_0,FDPD Control Command No Ramp 0" bitfld.long 0x04 0. " CMD_DPD_NO_RAMP_ENABLE ,No ramp for DI/DT enable" "Disabled,Enabled" group.long 0x4E0++0x03 line.long 0x00 "WDV_CHK_0,WDV_CHK_0 DRAM Timing Parameter" bitfld.long 0x00 0.--5. " WDV_CHK_BASE ,Establish DRAMC write data ready handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("TEGRAX2")) group.long 0x510++0x07 line.long 0x00 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register" bitfld.long 0x00 11. " TWEAK_UNDERFLOW_CRITICAL_INTMASK ,Mask for tweak underflow interrupt" "Masked,Unmasked" bitfld.long 0x00 10. " ECC_UNCORR_ERR_CRITICAL_INTMASK ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked" textline " " bitfld.long 0x00 9. " DLL_LOCK_TIMEOUT_CRITICAL_INTMASK ,Mask for DLL lock time out interrupt" "Masked,Unmasked" bitfld.long 0x00 8. " CCFIFO_OVERFLOW_CRITICAL_INTMASK ,Mask for clock change FIFO overflow" "Masked,Unmasked" textline " " bitfld.long 0x00 7. " DLL_ALARM_CRITICAL_INTMASK ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked" bitfld.long 0x00 6. " ACCESS_TO_SR_DPD_DEV_CRITICAL_INTMASK ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked" textline " " bitfld.long 0x00 5. " MRR_DIVLD_CRITICAL_INTMASK ,Mask for MRR data available" "Masked,Unmasked" bitfld.long 0x00 4. " CLKCHANGE_COMPLETE_CRITICAL_INTMASK ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked" textline " " bitfld.long 0x00 3. " REFRESH_OVERFLOW_CRITICAL_INTMASK ,Mask for refresh request overflow time out" "Masked,Unmasked" line.long 0x04 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register" bitfld.long 0x04 13. " TWEAK_UNDERFLOW_NONCRITICAL_INTMASK ,Mask for tweak underflow interrupt" "Masked,Unmasked" bitfld.long 0x04 12. " ECC_ERR_BUF_OVF_NONCRITICAL_INTMASK ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked" textline " " bitfld.long 0x04 11. " ECC_CORR_ERR_NONCRITICAL_INTMASK ,Mask for ECC correctable error interrupt" "Masked,Unmasked" bitfld.long 0x04 10. " ECC_UNCORR_ERR_NONCRITICAL_INTMASK ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked" textline " " bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_NONCRITICAL_INTMASK ,Mask for DLL lock time out interrupt" "Masked,Unmasked" bitfld.long 0x04 8. " CCFIFO_OVERFLOW_NONCRITICAL_INTMASK ,Mask for clock change FIFO overflow" "Masked,Unmasked" textline " " bitfld.long 0x04 7. " DLL_ALARM_NONCRITICAL_INTMASK ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked" bitfld.long 0x04 6. " ACCESS_TO_SR_DPD_DEV_NONCRITICAL_INTMASK ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked" textline " " bitfld.long 0x04 5. " MRR_DIVLD_NONCRITICAL_INTMASK ,Mask for MRR data available" "Masked,Unmasked" bitfld.long 0x04 4. " CLKCHANGE_COMPLETE_NONCRITICAL_INTMASK ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked" textline " " bitfld.long 0x04 3. " REFRESH_OVERFLOW_NONCRITICAL_INTMASK ,Mask for refresh request overflow time out" "Masked,Unmasked" endif group.long 0x554++0x1F line.long 0x00 "CFG_PIPE_2_0,Pipe Configuration Register 2_0" bitfld.long 0x00 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 11" "No bypass,Bypass" bitfld.long 0x00 26. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 10" "No bypass,Bypass" textline " " bitfld.long 0x00 25. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK9 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 9" "No bypass,Bypass" bitfld.long 0x00 24. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK8 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 8" "No bypass,Bypass" textline " " bitfld.long 0x00 23. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK7 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 7" "No bypass,Bypass" bitfld.long 0x00 22. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK6 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 6" "No bypass,Bypass" textline " " bitfld.long 0x00 21. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK5 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 5" "No bypass,Bypass" bitfld.long 0x00 20. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK4 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 4" "No bypass,Bypass" textline " " bitfld.long 0x00 19. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK3 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 3" "No bypass,Bypass" bitfld.long 0x00 18. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK2 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 2" "No bypass,Bypass" textline " " bitfld.long 0x00 17. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK1 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 1" "No bypass,Bypass" bitfld.long 0x00 16. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK0 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 0" "No bypass,Bypass" textline " " bitfld.long 0x00 11. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 11" "No bypass,Bypass" bitfld.long 0x00 10. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 10" "No bypass,Bypass" textline " " bitfld.long 0x00 9. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK9 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 9" "No bypass,Bypass" bitfld.long 0x00 8. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK8 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 8" "No bypass,Bypass" textline " " bitfld.long 0x00 7. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK7 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 7" "No bypass,Bypass" bitfld.long 0x00 6. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK6 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 6" "No bypass,Bypass" textline " " bitfld.long 0x00 5. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK5 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 5" "No bypass,Bypass" bitfld.long 0x00 4. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK4 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 4" "No bypass,Bypass" textline " " bitfld.long 0x00 3. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK3 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 3" "No bypass,Bypass" bitfld.long 0x00 2. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK2 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 2" "No bypass,Bypass" textline " " bitfld.long 0x00 1. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK1 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 1" "No bypass,Bypass" bitfld.long 0x00 0. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK0 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 0" "No bypass,Bypass" line.long 0x04 "CFG_PIPE_CLK_0,Pipe Clock Configuration Register" bitfld.long 0x04 0. " PIPE_CLK_ENABLE_OVERRIDE ,Pipe clock override enable" "Disabled,Enabled" line.long 0x08 "CFG_PIPE_1_0,Pipe Configuration Register 1_0" bitfld.long 0x08 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass" bitfld.long 0x08 26. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass" textline " " bitfld.long 0x08 25. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK9 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass" bitfld.long 0x08 24. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK8 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass" textline " " bitfld.long 0x08 23. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK7 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass" bitfld.long 0x08 22. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK6 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass" textline " " bitfld.long 0x08 21. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK5 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass" bitfld.long 0x08 20. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK4 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass" textline " " bitfld.long 0x08 19. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK3 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass" bitfld.long 0x08 18. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK2 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass" textline " " bitfld.long 0x08 17. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK1 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass" bitfld.long 0x08 16. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK0 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass" textline " " bitfld.long 0x08 11. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass" bitfld.long 0x08 10. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass" textline " " bitfld.long 0x08 9. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK9 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass" bitfld.long 0x08 8. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK8 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass" textline " " bitfld.long 0x08 7. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK7 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass" bitfld.long 0x08 6. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK6 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass" textline " " bitfld.long 0x08 5. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK5 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass" bitfld.long 0x08 4. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK4 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass" textline " " bitfld.long 0x08 3. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK3 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass" bitfld.long 0x08 2. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK2 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass" textline " " bitfld.long 0x08 1. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK1 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass" bitfld.long 0x08 0. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK0 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass" line.long 0x0C "CFG_PIPE_0,Pipe Configuration Register 0" bitfld.long 0x0C 27. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 11" "No bypass,Bypass" bitfld.long 0x0C 26. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 10" "No bypass,Bypass" textline " " bitfld.long 0x0C 25. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK9 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 9" "No bypass,Bypass" bitfld.long 0x0C 24. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK8 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 8" "No bypass,Bypass" textline " " bitfld.long 0x0C 23. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK7 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 7" "No bypass,Bypass" bitfld.long 0x0C 22. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK6 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 6" "No bypass,Bypass" textline " " bitfld.long 0x0C 21. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK5 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 5" "No bypass,Bypass" bitfld.long 0x0C 20. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK4 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 4" "No bypass,Bypass" textline " " bitfld.long 0x0C 19. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK3 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 3" "No bypass,Bypass" bitfld.long 0x0C 18. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK2 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 2" "No bypass,Bypass" textline " " bitfld.long 0x0C 17. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK1 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 1" "No bypass,Bypass" bitfld.long 0x0C 16. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK0 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 0" "No bypass,Bypass" textline " " bitfld.long 0x0C 11. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 11" "No bypass,Bypass" bitfld.long 0x0C 10. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 10" "No bypass,Bypass" textline " " bitfld.long 0x0C 9. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK9 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 9" "No bypass,Bypass" bitfld.long 0x0C 8. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK8 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 8" "No bypass,Bypass" textline " " bitfld.long 0x0C 7. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK7 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 7" "No bypass,Bypass" bitfld.long 0x0C 6. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK6 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 6" "No bypass,Bypass" textline " " bitfld.long 0x0C 5. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK5 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 5" "No bypass,Bypass" bitfld.long 0x0C 4. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK4 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 4" "No bypass,Bypass" textline " " bitfld.long 0x0C 3. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK3 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 3" "No bypass,Bypass" bitfld.long 0x0C 2. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK2 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 2" "No bypass,Bypass" textline " " bitfld.long 0x0C 1. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK1 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 1" "No bypass,Bypass" bitfld.long 0x0C 0. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK0 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 0" "No bypass,Bypass" line.long 0x10 "QPOP_0,DRAM Timing Parameter" hexmask.long.byte 0x10 16.--22. 1. " QPOP_PREAMBLE ,Time from read command to pop preamble from the pad macro FIFO" hexmask.long.byte 0x10 0.--6. 1. " QPOP ,Time from read command to pop data from the pad macro FIFO" line.long 0x14 "QUSE_WIDTH_0,QUSE_WIDTH_0 DRAM Timing Parameter" bitfld.long 0x14 29. " QUSE_SHORTEN_2UI ,Shorten QUSE 2 UI (1 DRAM clock)" "No change,Shorten" bitfld.long 0x14 28. " QUSE_EXTEND_UI ,Extend QUSE 1 UI (1/2 clock)" "No change,Extend" textline " " bitfld.long 0x14 0.--3. " QUSE_DURATION ,QUSE duration" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "PUTERM_WIDTH_0,PUTERM_WIDTH_0 DRAM Timing Parameter" bitfld.long 0x18 31. " CFG_STATIC_TERM ,IOBRICK internally disables termination based on DOE" "0,1" bitfld.long 0x18 0.--3. " PUTERM_DURATION ,Additional PUTERM duration apart from default BL/2" "Disable termination,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "BGBIAS_CTL0_0,BGBIAS Pad Controls" bitfld.long 0x1C 3. " BIAS0_DSC_E_PWRD_IBIAS_RX ,Bias current going out to brick receiver" "Disabled,Enabled" bitfld.long 0x1C 2. " BIAS0_DSC_E_PWRD_IBIAS_VTTGEN ,Disables biasing current going out to VTTGEN cells" "No,Yes" textline " " bitfld.long 0x1C 1. " BIAS0_DSC_E_PWRD ,Disables all DC current paths within entire cell" "No,Yes" bitfld.long 0x1C 0. " BIAS0_DSC_BG_SEL_N ,Select BandGap reference current" "Enabled,Disabled" sif (cpuis("TEGRAX2")) group.long 0x574++0x03 line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register" bitfld.long 0x00 20.--23. " AUTO_CAL_DQS_PD_SLOPE ,Slope for DQS pull-down value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." bitfld.long 0x00 16.--19. " AUTO_CAL_DQS_PU_SLOPE ,Slope for DQS pull-up value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." textline " " hexmask.long.byte 0x00 8.--14. 0x01 " AUTO_CAL_DQS_PD_OFFSET ,2's complement offset for DQS pull-down value" hexmask.long.byte 0x00 0.--6. 0x01 " AUTO_CAL_DQS_PU_OFFSET ,2's complement offset for DQS pull-up value" elif (cpuis("TEGRAX1")) group.long 0x574++0x03 line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_PD_SLOPE ,Slope for DQS pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_DQS_PU_SLOPE ,Slope for DQS pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_PD_OFFSET ,2's complement offset for DQS pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_DQS_PU_OFFSET ,2's complement offset for DQS pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif (cpuis("TEGRAX2")) group.long 0x578++0x07 line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register" bitfld.long 0x00 24.--28. " M2COMP_VTTLP_VDDA_CTRL ,PMC Fast-droop recovery or stability control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 22.--23. " XM2COMP_VTTLP_SPARE ,PMC spare pins" "0,1,2,3" textline " " bitfld.long 0x00 20.--21. " XM2COMP_VTTLP_VDDA_WB_CTRL ,PMC Weak Bias Level Control" "Higher level,Default level,Lower level,Further lower level" bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PU_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " EMC2TMC_CFG_XM2COMP_PU_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x00 12.--13. " EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" textline " " bitfld.long 0x00 8.--9. " EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" textline " " bitfld.long 0x00 2.--5. " EMC2TMC_CFG_XM2COMP_PU_TEST_MODE ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PU_RX_MODE ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1" line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTO CAL COMP Pad Register For Software Control Of Pad Inputs" bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 29. " AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 27. " AUTO_CAL_SW_CTRL_PD_CAL_EN ,EN pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 24. " AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 22. " AUTO_CAL_SW_CTRL_PU_CAL_EN ,EN pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 16.--21. " AUTO_CAL_SW_CTRL_DRVDN ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--15. " AUTO_CAL_SW_CTRL_DRVUP ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x04 2.--8. 1. " AUTO_CAL_SW_CTRL_IVREF_LVL ,IVREF_LVL software control" bitfld.long 0x04 1. " AUTO_CAL_SW_CTRL_BG_E_PWRD ,BG_E_PWRD software control" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " AUTO_CAL_SW_CTRL ,Software control of COMP pad inputs enable" "Disabled,Enabled" else group.long 0x578++0x07 line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register" bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PU_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" bitfld.long 0x00 16. " EMC2TMC_CFG_XM2COMP_PU_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x00 12.--13. " EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" bitfld.long 0x00 8.--9. " EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" textline " " bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" bitfld.long 0x00 2.--5. " EMC2TMC_CFG_XM2COMP_PU_TEST_MODE ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PU_RX_MODE ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1" line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTOCAL COMP Pad Register For Software Control Of Pad Inputs" bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 29. " AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 27. " AUTO_CAL_SW_CTRL_PD_CAL_EN ,EN pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 24. " AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 22. " AUTO_CAL_SW_CTRL_PU_CAL_EN ,EN pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 16.--21. " AUTO_CAL_SW_CTRL_DRVDN ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--15. " AUTO_CAL_SW_CTRL_DRVUP ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x04 2.--8. 1. " AUTO_CAL_SW_CTRL_IVREF_LVL ,IVREF_LVL software control" bitfld.long 0x04 1. " AUTO_CAL_SW_CTRL_BG_E_PWRD ,BG_E_PWRD software control" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " AUTO_CAL_SW_CTRL ,Software control of COMP pad inputs enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001E000+0x20))&0x80000000)==0x80000000) group.long 0x580++0x03 line.long 0x00 "REFCTRL2_0,REF Control 2" bitfld.long 0x00 31. " REFPB_VALID ,REFpb operation enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " REFPB_PD_THRESHOLD ,REFpb threshold value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0. " REFRESH_PER_DEVICE ,Refresh commands send mode" "Shared,Per device" else group.long 0x580++0x03 line.long 0x00 "REFCTRL2_0,REF Control 2" bitfld.long 0x00 24.--26. " REFPB_PD_THRESHOLD ,REFpb threshold value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0. " REFRESH_PER_DEVICE ,Refresh commands send mode" "Shared,Per device" endif group.long 0x584++0x03 line.long 0x00 "FBIO_CFG7_0,FBIO Configuration Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 18. " SEND_WR1_TO_BOTH_RANKS ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled" bitfld.long 0x00 17. " SEND_RD1_TO_BOTH_RANKS ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled" textline " " endif bitfld.long 0x00 16. " FORCE_CMD_PHASE_EQ0 ,Force DRAM command's to always be launched on phase 1" "Disabled,Enabled" bitfld.long 0x00 15. " DISABLE_CCDP1_WR_SPACING ,Write command spacing of tCCD+1 disable" "No,Yes" textline " " bitfld.long 0x00 14. " DISABLE_CCDP1_RD_SPACING ,Read command spacing of tCCD+1 disable" "No,Yes" bitfld.long 0x00 13. " SUBP_ADDR_MODE ,DRAM SUBP address width" "x32,x16" textline " " bitfld.long 0x00 12. " ZQCAL_LATCH_ENABLE ,EMC send an LPDDR4 MPC ZQCal Latch command as part of ZQ calibration process enable" "Disabled,Enabled" bitfld.long 0x00 11. " ZQCAL_MPC_ENABLE ,EMC send ZQCal command as LPDDR4 MPC enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " QPOP_RD_PREAMBLE_TOGGLE ,LPDDR4 read preamble toggle QPOP filter enable" "Disabled,Enabled" bitfld.long 0x00 9. " CS_POLARITY ,DRAM chip select active polarity" "Low,High" textline " " bitfld.long 0x00 8. " MRR_DBI ,EMC apply data bus inversion protocol to in-coming mode register read data enable" "Disabled,Enabled" bitfld.long 0x00 7. " RD_DBI ,EMC apply data bus inversion protocol to in-coming read data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " WR_DBI ,EMC write data bus inversion protocol enable" "Disabled,Enabled" bitfld.long 0x00 5. " MASKED_WR ,EMC issue LPDDR4 masked write command enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LPDDR4_CMD_MAP ,EMC use LPDDR4 command mapping for DRAM command enable" "Disabled,Enabled" bitfld.long 0x00 3. " QUSE_CCDP1_EXTEND ,QUSE extension through tCCD+1 spacing enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CH1_ENABLE ,CH1 enable" "Disabled,Enabled" bitfld.long 0x00 1. " CH0_ENABLE ,CH0 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DRAM_EMCCLK_2TO1 ,Specifies how much faster is dramclk than emcclk" "1x,2x" sif (cpuis("TEGRAX2")) group.long 0x710++0x03 line.long 0x00 "FBIO_CFG9_0,FBIO Configuration Register" bitfld.long 0x00 8. " USE_SELF_REF_STATE ,Enables RTL to use SELF_REF_CMD state" "Disabled,Enabled" bitfld.long 0x00 4. " ENCR_TWEAK_CHECK_ENABLE ,Determines the policy that EMC DRAM controller uses to determine when a read with encryption enabled can be launched to DRAM" "Off,On" textline " " bitfld.long 0x00 3. " ECC_ENCR_CFG_LOCK ,Setting this bit disables the ability for software to modify ECC_CHECK_DISABLE and ECC_ENCR_DISABLE bits" "Off,On" bitfld.long 0x00 2. " ECC_DYNAMIC_BYPASS_DISABLE ,Setting this bit disables dynamic bypasses in EMC ECC/Encryption pipeline" "Off,On" textline " " bitfld.long 0x00 1. " ECC_ENCR_DISABLE ,Setting this bit completely bypasses EMC ECC/Encryption pipeline" "Off,On" bitfld.long 0x00 0. " ECC_CHECK_DISABLE ,Setting this bit disables EMC ECC check/correct functions" "Off,On" group.long 0xAC0++0x13 line.long 0x00 "ECC_CONTROL_0,ECC Control Register" hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_LIMIT ,Error buffer limit" bitfld.long 0x00 2. " ERR_BUFFER_LOAD ,Error Buffer Load" "No load,Load" textline " " bitfld.long 0x00 1. " ERR_BUFFER_RESET ,Error Buffer Reset" "No reset,Reset" bitfld.long 0x00 0. " ERR_BUFFER_MODE ,Error Buffer Mode" "Ring,Write stop" rgroup.long 0xAC4++0x13 line.long 0x00 "ECC_STATUS_0,ECC Error Status" hexmask.long.byte 0x00 24.--31. 1. " ERR_BUFFER_DEPTH ,The physical size (in number of entries) of ECC error buffer" hexmask.long.byte 0x00 16.--23. 1. " ERR_BUFFER_CNT ,The number of errors physically residing in ECC error buffer" textline " " hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_WR_PTR ,The ECC error buffer write pointer" hexmask.long.byte 0x00 0.--7. 1. " ERR_BUFFER_RD_PTR ,The ECC error buffer read pointer" line.long 0x04 "ECC_STATUS_0,ECC Error Status" hexmask.long.word 0x04 22.--31. 1. " ECC_EERR_SYNDROME_SP0 ,Computed syndrome in ECC word" bitfld.long 0x04 16.--17. " ECC_EERR_PAR_SP0 ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..." textline " " hexmask.long.word 0x04 6.--15. 1. " ECC_DERR_SYNDROME_SP0 ,Computed syndrome in data word" bitfld.long 0x04 3. " ECC_ERR_POISON_SP0 ,Poisoned request" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " ECC_DERR_PAR_SP0 ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..." line.long 0x08 "ECC_ERR_SP1_0,ECC Error Buffer - Sub-Partition 1 Errors" hexmask.long.word 0x08 22.--31. 1. " ECC_EERR_SYNDROME_SP1 ,Computed syndrome in ECC word" bitfld.long 0x08 16.--17. " ECC_EERR_PAR_SP1 ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..." textline " " hexmask.long.word 0x08 6.--15. 1. " ECC_DERR_SYNDROME_SP1 ,Computed syndrome in data word" bitfld.long 0x08 0.--1. " ECC_DERR_PAR_SP1 ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..." line.long 0x0C "ECC_ERR_ADDR_0,ECC Error Buffer - bank/row/gob" bitfld.long 0x0C 28.--30. " ECC_ERR_BANK ,ECC_ERR_BANK" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 8.--23. 1. " ECC_ERR_ROW ,ECC_ERR_ROW" textline " " bitfld.long 0x0C 0.--5. " ECC_ERR_GOB ,ECC_ERR_GOB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "ECC_ERR_REQ_0,ECC Error Buffer - Request Debug" hexmask.long.byte 0x10 24.--31. 1. " ECC_ERR_CGID ,Request ID" bitfld.long 0x10 20.--21. " ECC_ERR_SEQ ,Burst sequence" "0,1,2,3" textline " " bitfld.long 0x10 19. " ECC_ERR_SWAP ,Swap" "No swap,Swap" bitfld.long 0x10 17.--18. " ECC_ERR_SIZE ,Size" "R64B,R32B,R16B,?..." textline " " bitfld.long 0x10 16. " ECC_ERR_DEVICE ,DRAM device" "Disabled,Enabled" bitfld.long 0x10 12.--14. " ECC_ERR_COL_SP1 ,GOB offset - sub-partition 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 8.--10. " ECC_ERR_COL_SP0 ,GOB offset - sub-partition 0" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--7. " ECC_ERR_EMC_ID ,EMC device/channel number" "0,1,2,3" group.long 0xADC++0x03 line.long 0x00 "EMC_ENCR_KEY_STATUS_0,Encryption Key Distribution Status Register" rbitfld.long 0x00 28.--31. " KEY_INIT_DONE ,Key distribution and expansion complete" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " KEY_STATE_CLEAR ,Write one to a bit of this field will clear corresponding bit in following fields" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " KEY_DISTRIB_ERR ,Error on serial bus detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " KEY_ACTIVE ,Serial bus activity for the key was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x588++0x27 line.long 0x00 "DATA_BRLSHFT_0_0,FBIO Configuration Register" bitfld.long 0x00 21.--23. " RANK0_BYTE7_DATA_BRLSHFT ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " RANK0_BYTE6_DATA_BRLSHFT ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 15.--17. " RANK0_BYTE5_DATA_BRLSHFT ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " RANK0_BYTE4_DATA_BRLSHFT ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9.--11. " RANK0_BYTE3_DATA_BRLSHFT ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--8. " RANK0_BYTE2_DATA_BRLSHFT ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 3.--5. " RANK0_BYTE1_DATA_BRLSHFT ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " RANK0_BYTE0_DATA_BRLSHFT ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x04 "DATA_BRLSHFT_1_0,FBIO Configuration Register" bitfld.long 0x04 21.--23. " RANK1_BYTE7_DATA_BRLSHFT ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x04 18.--20. " RANK1_BYTE6_DATA_BRLSHFT ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 15.--17. " RANK1_BYTE5_DATA_BRLSHFT ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " RANK1_BYTE4_DATA_BRLSHFT ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 9.--11. " RANK1_BYTE3_DATA_BRLSHFT ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--8. " RANK1_BYTE2_DATA_BRLSHFT ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 3.--5. " RANK1_BYTE1_DATA_BRLSHFT ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " RANK1_BYTE0_DATA_BRLSHFT ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x08 "RFCPB_0,RFCPB_0 DRAM Timing Parameter" hexmask.long.word 0x08 0.--8. 1. " RFCPB ,Specifies the per-bank auto refresh cycle time" line.long 0x0C "DQS_BRLSHFT_0_0,FBIO Configuration Register" bitfld.long 0x0C 21.--23. " RANK0_BYTE7_DQS_BRLSHFT ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 18.--20. " RANK0_BYTE6_DQS_BRLSHFT ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 15.--17. " RANK0_BYTE5_DQS_BRLSHFT ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 12.--14. " RANK0_BYTE4_DQS_BRLSHFT ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 9.--11. " RANK0_BYTE3_DQS_BRLSHFT ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 6.--8. " RANK0_BYTE2_DQS_BRLSHFT ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 3.--5. " RANK0_BYTE1_DQS_BRLSHFT ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. " RANK0_BYTE0_DQS_BRLSHFT ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x10 "DQS_BRLSHFT_1_0,FBIO Configuration Register" bitfld.long 0x10 21.--23. " RANK1_BYTE7_DQS_BRLSHFT ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x10 18.--20. " RANK1_BYTE6_DQS_BRLSHFT ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 15.--17. " RANK1_BYTE5_DQS_BRLSHFT ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x10 12.--14. " RANK1_BYTE4_DQS_BRLSHFT ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 9.--11. " RANK1_BYTE3_DQS_BRLSHFT ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. " RANK1_BYTE2_DQS_BRLSHFT ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 3.--5. " RANK1_BYTE1_DQS_BRLSHFT ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " RANK1_BYTE0_DQS_BRLSHFT ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x14 "CMD_BRLSHFT_0_0,1T LP4 ADR Barrel Shift Setting On CH0" bitfld.long 0x14 3.--5. " CH0_SUBP1_1T_BRLSHFT ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. " CH0_SUBP0_1T_BRLSHFT ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x18 "CMD_BRLSHFT_1_0,1T LP4 ADR Barrel Shift Setting On CH1" bitfld.long 0x18 3.--5. " CH1_SUBP1_1T_BRLSHFT ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. " CH1_SUBP0_1T_BRLSHFT ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x1C "CMD_BRLSHFT_2_0,2T Signal Barrel Shift Setting On CH0" bitfld.long 0x1C 3.--5. " CH0_SUBP1_2T_BRLSHFT ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. " CH0_SUBP0_2T_BRLSHFT ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x20 "CMD_BRLSHFT_3_0,2T Signal Barrel Shift Setting On CH1" bitfld.long 0x20 3.--5. " CH1_SUBP1_2T_BRLSHFT ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. " CH1_SUBP0_2T_BRLSHFT ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x24 "QUSE_BRLSHFT_0_0,Quse Barrel Shift 0" bitfld.long 0x24 15.--19. " RANK0_BYTE3_QUSE_BRLSHFT ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 10.--14. " RANK0_BYTE2_QUSE_BRLSHFT ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x24 5.--9. " RANK0_BYTE1_QUSE_BRLSHFT ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--4. " RANK0_BYTE0_QUSE_BRLSHFT ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpuis("TEGRAX2")) group.long 0x5B0++0x03 line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register" bitfld.long 0x00 20.--23. " AUTO_CAL_CA_PD_SLOPE ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." bitfld.long 0x00 16.--19. " AUTO_CAL_CA_PU_SLOPE ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." textline " " hexmask.long.byte 0x00 8.--14. 0x01 " AUTO_CAL_CA_PD_OFFSET ,2's complement offset for CA pull-down value" hexmask.long.byte 0x00 0.--6. 0x01 " AUTO_CAL_CA_PU_OFFSET ,2's complement offset for CA pull-up value" else group.long 0x5B0++0x03 line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_CA_PD_SLOPE ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_CA_PU_SLOPE ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_CA_PD_OFFSET ,2's complement offset for CA pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_CA_PU_OFFSET ,2's complement offset for CA pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif (cpuis("TEGRAX2")) group.long 0x5B4++0x03 line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register" bitfld.long 0x00 20.--23. " AUTO_CAL_CMD_PD_SLOPE ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." bitfld.long 0x00 16.--19. " AUTO_CAL_CMD_PU_SLOPE ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." textline " " hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_CMD_PD_OFFSET ,2's complement offset for CMD pull-down value" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_CMD_PU_OFFSET ,2's complement offset for CMD pull-up value" else group.long 0x5B4++0x03 line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_CMD_PD_SLOPE ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_CMD_PU_SLOPE ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_CMD_PD_OFFSET ,2's complement offset for CMD pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_CMD_PU_OFFSET ,2's complement offset for CMD pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x5B8++0x13 line.long 0x00 "QUSE_BRLSHFT_1_0,Quse Barrel Shift 1" bitfld.long 0x00 15.--19. " RANK0_BYTE7_QUSE_BRLSHFT ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10.--14. " RANK0_BYTE6_QUSE_BRLSHFT ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 5.--9. " RANK0_BYTE5_QUSE_BRLSHFT ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RANK0_BYTE4_QUSE_BRLSHFT ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "QUSE_BRLSHFT_2_0,Quse Barrel Shift 2" bitfld.long 0x04 15.--19. " RANK1_BYTE3_QUSE_BRLSHFT ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 10.--14. " RANK1_BYTE2_QUSE_BRLSHFT ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 5.--9. " RANK1_BYTE1_QUSE_BRLSHFT ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " RANK1_BYTE0_QUSE_BRLSHFT ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "CCDMW_0,CCDMW_0 DRAM Timing Parameter" bitfld.long 0x08 0.--5. " CCDMW ,DRAM CAS to CAS delay timing when the current command is any type of write and the next command is a masked write to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "QUSE_BRLSHFT_3_0,Quse Barrel Shift 3" bitfld.long 0x0C 15.--19. " RANK1_BYTE7_QUSE_BRLSHFT ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 10.--14. " RANK1_BYTE6_QUSE_BRLSHFT ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 5.--9. " RANK1_BYTE5_QUSE_BRLSHFT ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " RANK1_BYTE4_QUSE_BRLSHFT ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "FBIO_CFG8_0,FBIO Configuration Register" bitfld.long 0x10 27. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK11 ,Clock to data control signals in pipe stages of brick 11 enable" "Disabled,Enabled" bitfld.long 0x10 26. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK10 ,Clock to data control signals in pipe stages of brick 10 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK9 ,Clock to data control signals in pipe stages of brick 9 enable" "Disabled,Enabled" bitfld.long 0x10 24. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK8 ,Clock to data control signals in pipe stages of brick 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK7 ,Clock to data control signals in pipe stages of brick 7 enable" "Disabled,Enabled" bitfld.long 0x10 22. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK6 ,Clock to data control signals in pipe stages of brick 6 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK5 ,Clock to data control signals in pipe stages of brick 5 enable" "Disabled,Enabled" bitfld.long 0x10 20. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK4 ,Clock to data control signals in pipe stages of brick 4 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK3 ,Clock to data control signals in pipe stages of brick 3 enable" "Disabled,Enabled" bitfld.long 0x10 18. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK2 ,Clock to data control signals in pipe stages of brick 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK1 ,Clock to data control signals in pipe stages of brick 1 enable" "Disabled,Enabled" bitfld.long 0x10 16. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK0 ,Clock to data control signals in pipe stages of brick 0 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " RANK_SWIZZLE ,Asymmetric DRAM size while size of rank1>rank0 enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0x5CC++0x03 line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register" bitfld.long 0x00 20.--23. " AUTO_CAL_DQ_PD_SLOPE ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." bitfld.long 0x00 16.--19. " AUTO_CAL_DQ_PU_SLOPE ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..." textline " " hexmask.long.byte 0x00 8.--14. 0x01 " AUTO_CAL_DQ_PD_OFFSET ,2's complement offset for DQ pull-down value" hexmask.long.byte 0x00 0.--6. 0x01 " AUTO_CAL_DQ_PU_OFFSET ,2's complement offset for DQ pull-up value" else group.long 0x5CC++0x03 line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_DQ_PD_SLOPE ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_DQ_PU_SLOPE ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_DQ_PD_OFFSET ,2's complement offset for DQ pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_DQ_PU_OFFSET ,2's complement offset for DQ pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif wgroup.long 0x5D0++0x07 line.long 0x00 "PROTOBIST_CONFIG_ADR_1_0,Protocol BIST Register" bitfld.long 0x00 29. " PROTOBIST_APC ,Controls the auto-precharge function of transaction" "0,1" bitfld.long 0x00 28. " PROTOBIST_A_RDY ,Indicates active interface is ready" "Not ready,Ready" textline " " hexmask.long.word 0x00 12.--27. 1. " PROTOBIST_A_ROW ,Row control during protobist mode" bitfld.long 0x00 11. " PROTOBIST_A_REF ,Refresh control during active request in protobist" "0,1" textline " " bitfld.long 0x00 9.--10. " PROTOBIST_A_DEV ,Devsel control during active request in protobist" "0,1,2,3" bitfld.long 0x00 6.--8. " PROTOBIST_BANK ,Bank control during transfer request in protobist" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 3.--5. " PROTOBIST_A_BANK ,Bank control during active request in protobist" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PROTOBIST_A_BANK1 ,Bank 1 control during active request in protobist" "0,1,2,3,4,5,6,7" line.long 0x04 "PROTOBIST_CONFIG_ADR_2_0,Protocol BIST Register" bitfld.long 0x04 28. " PROTOBIST_SWAP ,Swap control during protobist mode" "0,1" bitfld.long 0x04 26.--27. " PROTOBIST_SIZE ,Size control during protobist mode" "0,1,2,3" textline " " bitfld.long 0x04 25. " PROTOBIST_MASKED_WRITE ,Mask write control during protobist mode" "0,1" bitfld.long 0x04 24. " PROTOBIST_T_DEV ,Dev control during Xfre request of protobist mode" "0,1" textline " " bitfld.long 0x04 21.--23. " PROTOBIST_T_COL1 ,Column 1 control during transfer request during protobist mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x04 9.--20. 1. " PROTOBIST_T_COL ,Column control during protobist" textline " " bitfld.long 0x04 8. " PROTOBIST_T_RDY ,Indicates transfer interface is ready" "Not ready,Ready" hexmask.long.byte 0x04 0.--7. 1. " PROTOBIST_CGID ,Request ID of transaction control" group.long 0x5D8++0x0B line.long 0x00 "PROTOBIST_MISC_0,Protocol BIST Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " PROTOBIST_RESET ,PROTOBIST reset" "No reset,Reset" textline " " endif bitfld.long 0x00 16.--18. " PROTOBIST_REQ ,Protobist request" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 15. " PROTOBIST_READ_ACK ,Protobist read ACK" "0,1" textline " " bitfld.long 0x00 14. " PROTOBIST_START ,Protobist start" "0,1" bitfld.long 0x00 13. " PROTOBIST_W_BE ,Protobist mode control for byte enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PROTOBIST_MODE ,Protobist mode control indicates bist mode" "0,1" bitfld.long 0x00 8.--11. " PROTOBIST_RDI_SEL ,Protobist RDI select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. " PROTOBIST_TAG ,Protobist mode tag control" line.long 0x04 "PROTOBIST_WDATA_LOWER_0,Protocol BIST Lower Register" line.long 0x08 "PROTOBIST_WDATA_UPPER_0,Protocol BIST Upper Register" rgroup.long 0x5EC++0x03 line.long 0x00 "PROTOCOL_RDATA_0,Protocol BIST Register" group.long 0x5E4++0x07 line.long 0x00 "DLL_CFG_0_0,DLL Calibration Configuration Register 0" bitfld.long 0x00 29. " DDLLCAL_CTRL_IGNORE_START ,Ignore DLLCAL start trim priv value" "0,1" bitfld.long 0x00 28. " DDLLCAL_CTRL_DUAL_PASS_LOCK ,2 pass lock" "0,1" textline " " bitfld.long 0x00 24.--27. " DDLLCAL_CTRL_STEP_SIZE ,Calibration step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DDLLCAL_CTRL_END_COUNT ,End count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16.--19. " DDLLCAL_CTRL_FILTER_BITS ,Filter bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DDLLCAL_CTRL_SAMPLE_COUNT ,Number of samples to take" "1,2,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15" textline " " hexmask.long.byte 0x00 4.--11. 1. " DDLLCAL_CTRL_SAMPLE_DELAY ,Delay to allow DLL value to settle" bitfld.long 0x00 0.--3. " DDLLCAL_UPDATE_CNT_LIMIT ,Wait cycles for priv update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DLL_CFG_1_0,DLL Calibration Configuration Register 1" sif (cpuis("TEGRAX2")) bitfld.long 0x04 28.--29. " DDLL_VTTCDB_SPARE ,RFU" "0,1,2,3" bitfld.long 0x04 24.--25. " DDLL_VTTDDLL_SPARE ,RFU" "0,1,2,3" textline " " bitfld.long 0x04 22. " DDLL_VTTLP_VDDA_E_REGSW ,Active high. Enable to switch to low power regulator" "Low,High" bitfld.long 0x04 21. " DDLL_VTTDDLL_VDDA_E_REG ,Enable DLL regulator" "0,1" textline " " bitfld.long 0x04 20. " DDLL_VTTDDLL_E_WB ,Active high to enable the weak bias for DDLL" "0,1" textline " " endif bitfld.long 0x04 16. " DDLL_BYPASS ,Bypass" "0,1" bitfld.long 0x04 12.--15. " DDLL_RFU ,RFU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 11. " E_DDLL_PWRD ,Master DLL powerdown" "0,1" hexmask.long.word 0x04 0.--10. 1. " DDLLCAL_CTRL_START_TRIM ,Calibration start value" group.long 0x5F0++0x07 line.long 0x00 "CONFIG_SAMPLE_DELAY_0,Config Sample Delay" hexmask.long.byte 0x00 0.--6. 1. " PMACRO_SAMPLE_DELAY ,Delay between sending pad macro configuration read and sampling of the read return data (in emcclk ticks)" line.long 0x04 "CFG_UPDATE_0,Timing Updates Special Features Control" bitfld.long 0x04 31. " STALL_READS_DURING_TIMING_UPDATE ,Disallow configuration reads during a timing update" "Allow,Disallow" bitfld.long 0x04 30. " STALL_WRITES_DURING_TIMING_UPDATE ,Disallow configuration writes during a timing update" "Allow,Disallow" textline " " bitfld.long 0x04 29. " LINKED_TIMING_UPDATE_TIMEOUT ,Linked timing update after 16k emcclk ticks enable" "Disabled,Enabled" bitfld.long 0x04 28. " LINKED_TIMING_UPDATE ,Allow per-channel TIMING_UPDATE requests" "Allow,Disallow" textline " " bitfld.long 0x04 9.--10. " UPDATE_DLL_IN_UPDATE ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..." bitfld.long 0x04 8. " UPDATE_DLL_IN_CLKCHANGE ,Allow a pad macro DLL update to be triggered during a clock change timing update" "Disallow,Allow" textline " " bitfld.long 0x04 1.--2. " UPDATE_AUTOCAL_IN_UPDATE ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..." bitfld.long 0x04 0. " UPDATE_AUTO_CAL_IN_CLKCHANGE ,Allow a pad macro autocal update to be triggered during a clock change timing update" "Disallow,Allow" sif (cpuis("TEGRAX2")) group.long 0x5F8++0x07 line.long 0x00 "DLL_CFG_2_0,DLL Config register 2" bitfld.long 0x00 4.--7. " DDLL_VTTCDB_VDDA_LVL ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DDLL_VTTDDLL_VDDA_LVL ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DLL_CFG_3_0,DLL Config register 3" bitfld.long 0x04 20.--21. " DDLL_VTTCDB_VDDA_WB_CTRL ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level" bitfld.long 0x04 16.--17. " DDLL_VTTDDLL_VDDA_WB_CTRL ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level" textline " " bitfld.long 0x04 8.--12. " DDLL_VTTCDB_VDDA_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " DDLL_VTTDDLL_VDDA_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif width 15. tree "PMACRO Registers" tree "QUSE DDLL Register" group.long 0x600++0x03 line.long 0x00 "RANK0_0_0,Rank 0 QUSE DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to QUSE trimmer value for rank0 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to QUSE trimmer value for rank0 byte0" group.long 0x604++0x03 line.long 0x00 "RANK0_1_0,Rank 0 QUSE DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to QUSE trimmer value for rank0 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to QUSE trimmer value for rank0 byte2" group.long 0x608++0x03 line.long 0x00 "RANK0_2_0,Rank 0 QUSE DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to QUSE trimmer value for rank0 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to QUSE trimmer value for rank0 byte4" group.long 0x60C++0x03 line.long 0x00 "RANK0_3_0,Rank 0 QUSE DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to QUSE trimmer value for rank0 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to QUSE trimmer value for rank0 byte6" group.long 0x610++0x03 line.long 0x00 "RANK0_4_0,Rank 0 CMD DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to QUSE trimmer value for rank0 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to QUSE trimmer value for rank0 command0" group.long 0x614++0x03 line.long 0x00 "RANK0_5_0,Rank 0 CMD DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to QUSE trimmer value for rank0 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to QUSE trimmer value for rank0 command2" textline " " group.long 0x620++0x03 line.long 0x00 "RANK1_0_0,Rank 1 QUSE DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to QUSE trimmer value for rank1 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to QUSE trimmer value for rank1 byte0" group.long 0x624++0x03 line.long 0x00 "RANK1_1_0,Rank 1 QUSE DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to QUSE trimmer value for rank1 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to QUSE trimmer value for rank1 byte2" group.long 0x628++0x03 line.long 0x00 "RANK1_2_0,Rank 1 QUSE DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to QUSE trimmer value for rank1 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to QUSE trimmer value for rank1 byte4" group.long 0x62C++0x03 line.long 0x00 "RANK1_3_0,Rank 1 QUSE DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to QUSE trimmer value for rank1 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to QUSE trimmer value for rank1 byte6" group.long 0x630++0x03 line.long 0x00 "RANK1_4_0,Rank 1 CMD DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to QUSE trimmer value for rank1 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to QUSE trimmer value for rank1 command0" group.long 0x634++0x03 line.long 0x00 "RANK1_5_0,Rank 1 CMD DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to QUSE trimmer value for rank1 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to QUSE trimmer value for rank1 command2" tree.end tree "OB DDLL Long Registers" group.long 0x640++0x03 line.long 0x00 "DQ_RANK0_0_0,Rank 0 OB Long DQ DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to OB trimmer value for rank0 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to OB trimmer value for rank0 byte0" group.long 0x644++0x03 line.long 0x00 "DQ_RANK0_1_0,Rank 0 OB Long DQ DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to OB trimmer value for rank0 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to OB trimmer value for rank0 byte2" group.long 0x648++0x03 line.long 0x00 "DQ_RANK0_2_0,Rank 0 OB Long DQ DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to OB trimmer value for rank0 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to OB trimmer value for rank0 byte4" group.long 0x64C++0x03 line.long 0x00 "DQ_RANK0_3_0,Rank 0 OB Long DQ DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to OB trimmer value for rank0 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to OB trimmer value for rank0 byte6" group.long 0x650++0x03 line.long 0x00 "DQ_RANK0_4_0,Rank 0 OB Long DQ DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to OB trimmer value for rank0 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to OB trimmer value for rank0 command0" group.long 0x654++0x03 line.long 0x00 "DQ_RANK0_5_0,Rank 0 OB Long DQ DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to OB trimmer value for rank0 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to OB trimmer value for rank0 command2" textline " " group.long 0x660++0x03 line.long 0x00 "DQ_RANK1_0_0,Rank 1 OB Long DQ DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to OB trimmer value for rank1 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to OB trimmer value for rank1 byte0" group.long 0x664++0x03 line.long 0x00 "DQ_RANK1_1_0,Rank 1 OB Long DQ DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to OB trimmer value for rank1 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to OB trimmer value for rank1 byte2" group.long 0x668++0x03 line.long 0x00 "DQ_RANK1_2_0,Rank 1 OB Long DQ DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to OB trimmer value for rank1 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to OB trimmer value for rank1 byte4" group.long 0x66C++0x03 line.long 0x00 "DQ_RANK1_3_0,Rank 1 OB Long DQ DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to OB trimmer value for rank1 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to OB trimmer value for rank1 byte6" group.long 0x670++0x03 line.long 0x00 "DQ_RANK1_4_0,Rank 1 OB Long DQ DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to OB trimmer value for rank1 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to OB trimmer value for rank1 command0" group.long 0x674++0x03 line.long 0x00 "DQ_RANK1_5_0,Rank 1 OB Long DQ DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to OB trimmer value for rank1 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to OB trimmer value for rank1 command2" textline " " group.long 0x680++0x03 line.long 0x00 "DQS_RANK0_0_0,Rank 0 OB Long DQS DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to OB DQS trimmer value for rank0 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to OB DQS trimmer value for rank0 byte0" group.long 0x684++0x03 line.long 0x00 "DQS_RANK0_1_0,Rank 0 OB Long DQS DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to OB DQS trimmer value for rank0 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to OB DQS trimmer value for rank0 byte2" group.long 0x688++0x03 line.long 0x00 "DQS_RANK0_2_0,Rank 0 OB Long DQS DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to OB DQS trimmer value for rank0 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to OB DQS trimmer value for rank0 byte4" group.long 0x68C++0x03 line.long 0x00 "DQS_RANK0_3_0,Rank 0 OB Long DQS DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to OB DQS trimmer value for rank0 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to OB DQS trimmer value for rank0 byte6" group.long 0x690++0x03 line.long 0x00 "DQS_RANK0_4_0,Rank 0 OB Long DQS DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to OB DQS trimmer value for rank0 Command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to OB DQS trimmer value for rank0 Command0" group.long 0x694++0x03 line.long 0x00 "DQS_RANK0_5_0,Rank 0 OB Long DQS DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to OB DQS trimmer value for rank0 Command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to OB DQS trimmer value for rank0 Command2" textline " " group.long 0x6A0++0x03 line.long 0x00 "DQS_RANK1_0_0,Rank 1 OB Long DQS DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to OB DQS trimmer value for rank1 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to OB DQS trimmer value for rank1 byte0" group.long 0x6A4++0x03 line.long 0x00 "DQS_RANK1_1_0,Rank 1 OB Long DQS DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to OB DQS trimmer value for rank1 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to OB DQS trimmer value for rank1 byte2" group.long 0x6A8++0x03 line.long 0x00 "DQS_RANK1_2_0,Rank 1 OB Long DQS DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to OB DQS trimmer value for rank1 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to OB DQS trimmer value for rank1 byte4" group.long 0x6AC++0x03 line.long 0x00 "DQS_RANK1_3_0,Rank 1 OB Long DQS DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to OB DQS trimmer value for rank1 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to OB DQS trimmer value for rank1 byte6" group.long 0x6B0++0x03 line.long 0x00 "DQS_RANK1_4_0,Rank 1 OB Long DQS DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to OB DQS trimmer value for rank1 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to OB DQS trimmer value for rank1 command0" group.long 0x6B4++0x03 line.long 0x00 "DQS_RANK1_5_0,Rank 1 OB Long DQS DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to OB DQS trimmer value for rank1 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to OB DQS trimmer value for rank1 command2" tree.end tree "IB DDLL DQS Long Registers" group.long 0x6C0++0x03 line.long 0x00 "RANK0_0_0,Rank 0 IB Long DQS DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to IB DQS trimmer value for rank0 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to IB DQS trimmer value for rank0 byte0" group.long 0x6C4++0x03 line.long 0x00 "RANK0_1_0,Rank 0 IB Long DQS DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to IB DQS trimmer value for rank0 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to IB DQS trimmer value for rank0 byte2" group.long 0x6C8++0x03 line.long 0x00 "RANK0_2_0,Rank 0 IB Long DQS DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to IB DQS trimmer value for rank0 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to IB DQS trimmer value for rank0 byte4" group.long 0x6CC++0x03 line.long 0x00 "RANK0_3_0,Rank 0 IB Long DQS DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to IB DQS trimmer value for rank0 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to IB DQS trimmer value for rank0 byte6" group.long 0x6D0++0x03 line.long 0x00 "RANK0_4_0,Rank 0 IB Long DQS DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to IB DQS trimmer value for rank0 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to IB DQS trimmer value for rank0 command0" group.long 0x6D4++0x03 line.long 0x00 "RANK0_5_0,Rank 0 IB Long DQS DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to IB DQS trimmer value for rank0 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to IB DQS trimmer value for rank0 command2" textline " " group.long 0x6E0++0x03 line.long 0x00 "RANK1_0_0,Rank 1 IB Long DQS DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to IB DQS trimmer value for rank1 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to IB DQS trimmer value for rank1 byte0" group.long 0x6E4++0x03 line.long 0x00 "RANK1_1_0,Rank 1 IB Long DQS DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to IB DQS trimmer value for rank1 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to IB DQS trimmer value for rank1 byte2" group.long 0x6E8++0x03 line.long 0x00 "RANK1_2_0,Rank 1 IB Long DQS DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to IB DQS trimmer value for rank1 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to IB DQS trimmer value for rank1 byte4" group.long 0x6EC++0x03 line.long 0x00 "RANK1_3_0,Rank 1 IB Long DQS DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to IB DQS trimmer value for rank1 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to IB DQS trimmer value for rank1 byte6" group.long 0x6F0++0x03 line.long 0x00 "RANK1_4_0,Rank 1 IB Long DQS DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to IB DQS trimmer value for rank1 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to IB DQS trimmer value for rank1 command0" group.long 0x6F4++0x03 line.long 0x00 "RANK1_5_0,Rank 1 IB Long DQS DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to IB DQS trimmer value for rank1 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to IB DQS trimmer value for rank1 command2" tree.end textline " " width 22. group.long 0x700++0x03 line.long 0x00 "AUTOCAL_CFG_0_0,IOBRICK Controls AUTO CAL PADMACRO Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE3 ,DQS E_CAL_UPDATE byte BYTE3" "Disabled,Enabled" textline " " textfld " " endif bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE3 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 25. " DQS_DRV_SEL_BYTE3 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 24. " CMD_DRV_SEL_BYTE3 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " DQS_E_CAL_UPDATE_BYTE2 ,DQS E_CAL_UPDATE byte BYTE2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " DQS_E_CAL_BYPASS_BYTE2 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 17. " DQS_DRV_SEL_BYTE2 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 16. " CMD_DRV_SEL_BYTE2 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 11. " DQS_E_CAL_UPDATE_BYTE1 ,DQS E_CAL_UPDATE byte BYTE1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " DQS_E_CAL_BYPASS_BYTE1 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 9. " DQS_DRV_SEL_BYTE1 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 8. " CMD_DRV_SEL_BYTE1 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 3. " DQS_E_CAL_UPDATE_BYTE0 ,DQS E_CAL_UPDATE byte BYTE0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 2. " DQS_E_CAL_BYPASS_BYTE0 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 1. " DQS_DRV_SEL_BYTE0 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 0. " CMD_DRV_SEL_BYTE0 ,CMD pad calibration codes select" "CMD,CA" group.long 0x704++0x03 line.long 0x00 "AUTOCAL_CFG_1_0,IOBRICK Controls AUTO CAL PADMACRO Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE7 ,DQS E_CAL_UPDATE byte BYTE7" "Disabled,Enabled" textline " " textfld " " endif bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE7 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 25. " DQS_DRV_SEL_BYTE7 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 24. " CMD_DRV_SEL_BYTE7 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " DQS_E_CAL_UPDATE_BYTE6 ,DQS E_CAL_UPDATE byte BYTE6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " DQS_E_CAL_BYPASS_BYTE6 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 17. " DQS_DRV_SEL_BYTE6 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 16. " CMD_DRV_SEL_BYTE6 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 11. " DQS_E_CAL_UPDATE_BYTE5 ,DQS E_CAL_UPDATE byte BYTE5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " DQS_E_CAL_BYPASS_BYTE5 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 9. " DQS_DRV_SEL_BYTE5 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 8. " CMD_DRV_SEL_BYTE5 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 3. " DQS_E_CAL_UPDATE_BYTE4 ,DQS E_CAL_UPDATE byte BYTE4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 2. " DQS_E_CAL_BYPASS_BYTE4 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 1. " DQS_DRV_SEL_BYTE4 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 0. " CMD_DRV_SEL_BYTE4 ,CMD pad calibration codes select" "CMD,CA" group.long 0x708++0x03 line.long 0x00 "AUTOCAL_CFG_2_0,IOBRICK Controls AUTO CAL PADMACRO Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_CMD3 ,DQS E_CAL_UPDATE byte CMD3" "Disabled,Enabled" textline " " textfld " " endif bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_CMD3 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 25. " DQS_DRV_SEL_CMD3 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 24. " CMD_DRV_SEL_CMD3 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " DQS_E_CAL_UPDATE_CMD2 ,DQS E_CAL_UPDATE byte CMD2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " DQS_E_CAL_BYPASS_CMD2 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 17. " DQS_DRV_SEL_CMD2 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 16. " CMD_DRV_SEL_CMD2 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 11. " DQS_E_CAL_UPDATE_CMD1 ,DQS E_CAL_UPDATE byte CMD1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " DQS_E_CAL_BYPASS_CMD1 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 9. " DQS_DRV_SEL_CMD1 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 8. " CMD_DRV_SEL_CMD1 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 3. " DQS_E_CAL_UPDATE_CMD0 ,DQS E_CAL_UPDATE byte CMD0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 2. " DQS_E_CAL_BYPASS_CMD0 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 1. " DQS_DRV_SEL_CMD0 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 0. " CMD_DRV_SEL_CMD0 ,CMD pad calibration codes select" "CMD,CA" group.long 0x720++0x03 line.long 0x00 "TX_PWRD_0_0,Clock Gate Register For Unused TX Bits In Byte1 And Byte0 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE1 ,Byte1 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_BYTE1 ,Byte1 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for CMD pin of Byte1" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQSN of Byte1" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQSP of Byte1" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit8 of Byte1" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit7 of Byte1" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit6 of Byte1" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit5 of Byte1" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit4 of Byte1" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit3 of Byte1" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit2 of Byte1" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit1 of Byte1" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit0 of Byte1" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_BYTE0 ,Byte0 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_BYTE0 ,Byte0 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for CMD pin of Byte0" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQSN of Byte0" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQSP of Byte0" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit8 of Byte0" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit7 of Byte0" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit6 of Byte0" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit5 of Byte0" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit4 of Byte0" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit3 of Byte0" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit2 of Byte0" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit1 of Byte0" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit0 of Byte0" "0,1" group.long 0x724++0x03 line.long 0x00 "TX_PWRD_1_0,Clock Gate Register For Unused TX Bits In Byte3 And Byte2 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE3 ,Byte3 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_BYTE3 ,Byte3 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for CMD pin of Byte3" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQSN of Byte3" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQSP of Byte3" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit8 of Byte3" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit7 of Byte3" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit6 of Byte3" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit5 of Byte3" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit4 of Byte3" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit3 of Byte3" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit2 of Byte3" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit1 of Byte3" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit0 of Byte3" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_BYTE2 ,Byte2 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_BYTE2 ,Byte2 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for CMD pin of Byte2" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQSN of Byte2" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQSP of Byte2" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit8 of Byte2" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit7 of Byte2" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit6 of Byte2" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit5 of Byte2" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit4 of Byte2" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit3 of Byte2" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit2 of Byte2" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit1 of Byte2" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit0 of Byte2" "0,1" group.long 0x728++0x03 line.long 0x00 "TX_PWRD_2_0,Clock Gate Register For Unused TX Bits In Byte5 And Byte4 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE5 ,Byte5 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_BYTE5 ,Byte5 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for CMD pin of Byte5" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQSN of Byte5" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQSP of Byte5" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit8 of Byte5" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit7 of Byte5" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit6 of Byte5" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit5 of Byte5" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit4 of Byte5" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit3 of Byte5" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit2 of Byte5" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit1 of Byte5" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit0 of Byte5" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_BYTE4 ,Byte4 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_BYTE4 ,Byte4 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for CMD pin of Byte4" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQSN of Byte4" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQSP of Byte4" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit8 of Byte4" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit7 of Byte4" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit6 of Byte4" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit5 of Byte4" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit4 of Byte4" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit3 of Byte4" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit2 of Byte4" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit1 of Byte4" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit0 of Byte4" "0,1" group.long 0x72C++0x03 line.long 0x00 "TX_PWRD_3_0,Clock Gate Register For Unused TX Bits In Byte7 And Byte6 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE7 ,Byte7 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_BYTE7 ,Byte7 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for CMD pin of Byte7" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQSN of Byte7" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQSP of Byte7" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit8 of Byte7" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit7 of Byte7" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit6 of Byte7" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit5 of Byte7" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit4 of Byte7" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit3 of Byte7" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit2 of Byte7" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit1 of Byte7" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit0 of Byte7" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_BYTE6 ,Byte6 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_BYTE6 ,Byte6 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for CMD pin of Byte6" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQSN of Byte6" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQSP of Byte6" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit8 of Byte6" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit7 of Byte6" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit6 of Byte6" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit5 of Byte6" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit4 of Byte6" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit3 of Byte6" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit2 of Byte6" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit1 of Byte6" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit0 of Byte6" "0,1" group.long 0x730++0x03 line.long 0x00 "TX_PWRD_4_0,Clock Gate Register For Unused TX Bits In Cmd1 And Cmd0 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD1 ,Cmd1 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_CMD1 ,Cmd1 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_CMD1 ,Programmed to TX PWRD value for CMD pin of Cmd1" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQSN of Cmd1" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQSP of Cmd1" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit8 of Cmd1" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit7 of Cmd1" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit6 of Cmd1" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit5 of Cmd1" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit4 of Cmd1" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit3 of Cmd1" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit2 of Cmd1" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit1 of Cmd1" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit0 of Cmd1" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_CMD0 ,Cmd0 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_CMD0 ,Cmd0 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_CMD0 ,Programmed to TX PWRD value for CMD pin of Cmd0" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQSN of Cmd0" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQSP of Cmd0" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit8 of Cmd0" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit7 of Cmd0" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit6 of Cmd0" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit5 of Cmd0" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit4 of Cmd0" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit3 of Cmd0" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit2 of Cmd0" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit1 of Cmd0" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit0 of Cmd0" "0,1" group.long 0x734++0x03 line.long 0x00 "TX_PWRD_5_0,Clock Gate Register For Unused TX Bits In Cmd3 And Cmd2 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD3 ,Cmd3 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_CMD3 ,Cmd3 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_CMD3 ,Programmed to TX PWRD value for CMD pin of Cmd3" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQSN of Cmd3" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQSP of Cmd3" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit8 of Cmd3" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit7 of Cmd3" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit6 of Cmd3" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit5 of Cmd3" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit4 of Cmd3" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit3 of Cmd3" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit2 of Cmd3" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit1 of Cmd3" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit0 of Cmd3" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_CMD2 ,Cmd2 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_CMD2 ,Cmd2 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_CMD2 ,Programmed to TX PWRD value for CMD pin of Cmd2" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQSN of Cmd2" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQSP of Cmd2" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit8 of Cmd2" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit7 of Cmd2" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit6 of Cmd2" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit5 of Cmd2" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit4 of Cmd2" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit3 of Cmd2" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit2 of Cmd2" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit1 of Cmd2" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit0 of Cmd2" "0,1" textline " " group.long 0x740++0x03 line.long 0x00 "TX_SEL_CLK_SRC_0_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for CMD pin of Byte1" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQSN of Byte1" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQSP of Byte1" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit8 of Byte1" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit7 of Byte1" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit6 of Byte1" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit5 of Byte1" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit4 of Byte1" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit3 of Byte1" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit2 of Byte1" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit1 of Byte1" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit0 of Byte1" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for CMD pin of Byte0" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQSN of Byte0" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQSP of Byte0" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit8 of Byte0" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit7 of Byte0" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit6 of Byte0" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit5 of Byte0" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit4 of Byte0" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit3 of Byte0" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit2 of Byte0" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit1 of Byte0" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit0 of Byte0" "0,1" group.long 0x744++0x03 line.long 0x00 "TX_SEL_CLK_SRC_1_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for CMD pin of Byte3" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQSN of Byte3" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQSP of Byte3" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit8 of Byte3" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit7 of Byte3" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit6 of Byte3" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit5 of Byte3" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit4 of Byte3" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit3 of Byte3" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit2 of Byte3" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit1 of Byte3" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit0 of Byte3" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for CMD pin of Byte2" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQSN of Byte2" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQSP of Byte2" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit8 of Byte2" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit7 of Byte2" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit6 of Byte2" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit5 of Byte2" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit4 of Byte2" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit3 of Byte2" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit2 of Byte2" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit1 of Byte2" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit0 of Byte2" "0,1" group.long 0x748++0x03 line.long 0x00 "TX_SEL_CLK_SRC_2_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for CMD pin of Byte5" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQSN of Byte5" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQSP of Byte5" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit8 of Byte5" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit7 of Byte5" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit6 of Byte5" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit5 of Byte5" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit4 of Byte5" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit3 of Byte5" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit2 of Byte5" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit1 of Byte5" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit0 of Byte5" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for CMD pin of Byte4" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQSN of Byte4" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQSP of Byte4" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit8 of Byte4" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit7 of Byte4" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit6 of Byte4" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit5 of Byte4" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit4 of Byte4" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit3 of Byte4" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit2 of Byte4" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit1 of Byte4" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit0 of Byte4" "0,1" group.long 0x74C++0x03 line.long 0x00 "TX_SEL_CLK_SRC_3_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for CMD pin of Byte7" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQSN of Byte7" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQSP of Byte7" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit8 of Byte7" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit7 of Byte7" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit6 of Byte7" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit5 of Byte7" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit4 of Byte7" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit3 of Byte7" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit2 of Byte7" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit1 of Byte7" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit0 of Byte7" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for CMD pin of Byte6" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQSN of Byte6" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQSP of Byte6" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit8 of Byte6" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit7 of Byte6" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit6 of Byte6" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit5 of Byte6" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit4 of Byte6" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit3 of Byte6" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit2 of Byte6" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit1 of Byte6" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit0 of Byte6" "0,1" group.long 0x750++0x03 line.long 0x00 "TX_SEL_CLK_SRC_4_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for CMD pin of Cmd1" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQSN of Cmd1" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQSP of Cmd1" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit8 of Cmd1" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit7 of Cmd1" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit6 of Cmd1" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit5 of Cmd1" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit4 of Cmd1" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit3 of Cmd1" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit2 of Cmd1" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit1 of Cmd1" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit0 of Cmd1" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for CMD pin of Cmd0" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQSN of Cmd0" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQSP of Cmd0" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit8 of Cmd0" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit7 of Cmd0" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit6 of Cmd0" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit5 of Cmd0" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit4 of Cmd0" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit3 of Cmd0" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit2 of Cmd0" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit1 of Cmd0" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit0 of Cmd0" "0,1" group.long 0x754++0x03 line.long 0x00 "TX_SEL_CLK_SRC_5_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for CMD pin of Cmd3" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQSN of Cmd3" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQSP of Cmd3" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit8 of Cmd3" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit7 of Cmd3" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit6 of Cmd3" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit5 of Cmd3" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit4 of Cmd3" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit3 of Cmd3" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit2 of Cmd3" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit1 of Cmd3" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit0 of Cmd3" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for CMD pin of Cmd2" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQSN of Cmd2" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQSP of Cmd2" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit8 of Cmd2" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit7 of Cmd2" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit6 of Cmd2" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit5 of Cmd2" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit4 of Cmd2" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit3 of Cmd2" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit2 of Cmd2" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit1 of Cmd2" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit0 of Cmd2" "0,1" textline " " group.long 0x760++0x03 line.long 0x00 "DDLL_BYPASS_0,DLL And DDLLCAL Bypass" bitfld.long 0x00 31. " CMD_DDLLCAL_BIT_RXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 30. " CMD_DDLLCAL_BIT_TXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 29. " CMD_DDLLCAL_BIT_TXDQS_BYPASS ,DDLL calibration value bypass" "0,1" textline " " bitfld.long 0x00 27. " CMD_DDLLCAL_BYTE_QU_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 26. " CMD_DDLLCAL_BYTE_RXDQS_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 25. " CMD_DDLLCAL_BYTE_TXDQS_BYPASS ,DDLL calibration value bypass" "0,1" textline " " bitfld.long 0x00 24. " CMD_DDLLCAL_BYTE_TXDQ_BYPASS ,Bypass the DDLL calibration value" "0,1" bitfld.long 0x00 23. " CMD_DDLL_BIT_RXDQ_BYPASS ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 22. " CMD_DDLL_BIT_TXDQS_BYPASS ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 21. " CMD_DDLL_BIT_TXDQ_BYPASS ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 20. " CMD_DDLL_BYTE_RXRT_BYPASS ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 19. " CMD_DDLL_BYTE_QU_BYPASS ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 18. " CMD_DDLL_BYTE_RXDQS_BYPASS ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 17. " CMD_DDLL_BYTE_TXDQS_BYPASS ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 16. " CMD_DDLL_BYTE_TXDQ_BYPASS ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 15. " DATA_DDLLCAL_BIT_RXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 14. " DATA_DDLLCAL_BIT_TXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 13. " DATA_DDLLCAL_BIT_TXDQS_BYPASS ,DDLL calibration value bypass" "0,1" textline " " bitfld.long 0x00 11. " DATA_DDLLCAL_BYTE_QU_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 10. " DATA_DDLLCAL_BYTE_RXRQS_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 9. " DATA_DDLLCAL_BYTE_TXDQS_BYPASS ,DDLL calibration value bypass" "0,1" textline " " bitfld.long 0x00 8. " DATA_DDLLCAL_BYTE_TXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 7. " DATA_DDLL_BIT_RXDQ_BYPASS ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 6. " DATA_DDLL_BIT_TXDQS_BYPASS ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 5. " DATA_DDLL_BIT_TXDQ_BYPASS ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 4. " DATA_DDLL_BYTE_RXRT_BYPASS ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 3. " DATA_DDLL_BYTE_QU_BYPASS ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 2. " DATA_DDLL_BYTE_RXDQS_BYPASS ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 1. " DATA_DDLL_BYTE_TXDQS_BYPASS ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 0. " DATA_DDLL_BYTE_TXDQ_BYPASS ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass" textline " " group.long 0x770++0x03 line.long 0x00 "DDLL_PWRD_0_0,DLL Power Down Mode Enables" bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE3 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 30. " DDLL_BIT_TXDQ_PWRD_BYTE3 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 28. " DDLL_BYTE_RXRT_PWRD_BYTE3 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " DDLL_BYTE_QU_PWRD_BYTE3 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 26. " DDLL_BYTE_RXDQS_PWRD_BYTE3 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYTE_TXDQS_PWRD_BYTE3 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DDLL_BYTE_TXDQ_PWRD_BYTE3 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 23. " DDLL_BIT_RXDQ_PWRD_BYTE2 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 22. " DDLL_BIT_TXDQ_PWRD_BYTE2 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DDLL_BYTE_RXRT_PWRD_BYTE2 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 19. " DDLL_BYTE_QU_PWRD_BYTE2 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 18. " DDLL_BYTE_RXDQS_PWRD_BYTE2 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDLL_BYTE_TXDQS_PWRD_BYTE2 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 16. " DDLL_BYTE_TXDQ_PWRD_BYTE2 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 15. " DDLL_BIT_RXDQ_PWRD_BYTE1 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " DDLL_BIT_TXDQ_PWRD_BYTE1 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 12. " DDLL_BYTE_RXRT_PWRD_BYTE1 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 11. " DDLL_BYTE_QU_PWRD_BYTE1 ,Programmed to QUSE power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DDLL_BYTE_RXDQS_PWRD_BYTE1 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYTE_TXDQS_PWRD_BYTE1 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 8. " DDLL_BYTE_TXDQ_PWRD_BYTE1 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DDLL_BIT_RXDQ_PWRD_BYTE0 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 6. " DDLL_BIT_TXDQ_PWRD_BYTE0 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 4. " DDLL_BYTE_RXRT_PWRD_BYTE0 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DDLL_BYTE_QU_PWRD_BYTE0 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 2. " DDLL_BYTE_RXDQS_PWRD_BYTE0 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYTE_TXDQS_PWRD_BYTE0 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DDLL_BYTE_TXDQ_PWRD_BYTE0 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" group.long 0x774++0x03 line.long 0x00 "DDLL_PWRD_1_0,DLL Power Down Mode Enables" bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE7 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 30. " DDLL_BIT_TXDQ_PWRD_BYTE7 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 28. " DDLL_BYTE_RXRT_PWRD_BYTE7 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " DDLL_BYTE_QU_PWRD_BYTE7 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 26. " DDLL_BYTE_RXDQS_PWRD_BYTE7 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYTE_TXDQS_PWRD_BYTE7 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DDLL_BYTE_TXDQ_PWRD_BYTE7 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 23. " DDLL_BIT_RXDQ_PWRD_BYTE6 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 22. " DDLL_BIT_TXDQ_PWRD_BYTE6 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DDLL_BYTE_RXRT_PWRD_BYTE6 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 19. " DDLL_BYTE_QU_PWRD_BYTE6 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 18. " DDLL_BYTE_RXDQS_PWRD_BYTE6 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDLL_BYTE_TXDQS_PWRD_BYTE6 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 16. " DDLL_BYTE_TXDQ_PWRD_BYTE6 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 15. " DDLL_BIT_RXDQ_PWRD_BYTE5 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " DDLL_BIT_TXDQ_PWRD_BYTE5 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 12. " DDLL_BYTE_RXRT_PWRD_BYTE5 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 11. " DDLL_BYTE_QU_PWRD_BYTE5 ,Programmed to QUSE power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DDLL_BYTE_RXDQS_PWRD_BYTE5 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYTE_TXDQS_PWRD_BYTE5 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 8. " DDLL_BYTE_TXDQ_PWRD_BYTE5 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DDLL_BIT_RXDQ_PWRD_BYTE4 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 6. " DDLL_BIT_TXDQ_PWRD_BYTE4 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 4. " DDLL_BYTE_RXRT_PWRD_BYTE4 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DDLL_BYTE_QU_PWRD_BYTE4 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 2. " DDLL_BYTE_RXDQS_PWRD_BYTE4 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYTE_TXDQS_PWRD_BYTE4 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DDLL_BYTE_TXDQ_PWRD_BYTE4 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" group.long 0x778++0x03 line.long 0x00 "DDLL_PWRD_2_0,DLL Power Down Mode Enables" bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_CMD3 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 30. " DDLL_BIT_TXDQ_PWRD_CMD3 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 28. " DDLL_BYTE_RXRT_PWRD_CMD3 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " DDLL_BYTE_QU_PWRD_CMD3 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 26. " DDLL_BYTE_RXDQS_PWRD_CMD3 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYTE_TXDQS_PWRD_CMD3 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DDLL_BYTE_TXDQ_PWRD_CMD3 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 23. " DDLL_BIT_RXDQ_PWRD_CMD2 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 22. " DDLL_BIT_TXDQ_PWRD_CMD2 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DDLL_BYTE_RXRT_PWRD_CMD2 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 19. " DDLL_BYTE_QU_PWRD_CMD2 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 18. " DDLL_BYTE_RXDQS_PWRD_CMD2 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDLL_BYTE_TXDQS_PWRD_CMD2 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 16. " DDLL_BYTE_TXDQ_PWRD_CMD2 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 15. " DDLL_BIT_RXDQ_PWRD_CMD1 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " DDLL_BIT_TXDQ_PWRD_CMD1 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 12. " DDLL_BYTE_RXRT_PWRD_CMD1 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 11. " DDLL_BYTE_QU_PWRD_CMD1 ,Programmed to QUSE power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DDLL_BYTE_RXDQS_PWRD_CMD1 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYTE_TXDQS_PWRD_CMD1 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 8. " DDLL_BYTE_TXDQ_PWRD_CMD1 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DDLL_BIT_RXDQ_PWRD_CMD0 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 6. " DDLL_BIT_TXDQ_PWRD_CMD0 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 4. " DDLL_BYTE_RXRT_PWRD_CMD0 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DDLL_BYTE_QU_PWRD_CMD0 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 2. " DDLL_BYTE_RXDQS_PWRD_CMD0 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYTE_TXDQS_PWRD_CMD0 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DDLL_BYTE_TXDQ_PWRD_CMD0 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" textline " " group.long 0x780++0x03 line.long 0x00 "CMD_CTRL_0_0,DLL Bypass And Power Down Mode Enables For CMD I/O" bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 28. " DDLLCAL_BIT_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 27. " DDLL_BIT_TXCMD_BYPASS_CKE3 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 26. " DDLL_BYTE_TXCMD_PWRD_CKE3 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYT_TXCMD_BYPASS_CKE3 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 24. " CMD_E_INPUT_CKE3 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 20. " DDLLCAL_BIT_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 19. " DDLL_BIT_TXCMD_BYPASS_CKE2 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 18. " DDLL_BYTE_TXCMD_PWRD_CKE2 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 17. " DDLL_BYT_TXCMD_BYPASS_CKE2 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 16. " CMD_E_INPUT_CKE2 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 12. " DDLLCAL_BIT_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 11. " DDLL_BIT_TXCMD_BYPASS_CKE1 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 10. " DDLL_BYTE_TXCMD_PWRD_CKE1 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYT_TXCMD_BYPASS_CKE1 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 8. " CMD_E_INPUT_CKE1 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 4. " DDLLCAL_BIT_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 3. " DDLL_BIT_TXCMD_BYPASS_CKE0 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 2. " DDLL_BYTE_TXCMD_PWRD_CKE0 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYT_TXCMD_BYPASS_CKE0 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 0. " CMD_E_INPUT_CKE0 ,IO_CMD input path enable" "Disabled,Enabled" group.long 0x784++0x03 line.long 0x00 "CMD_CTRL_1_0,DLL Bypass And Power Down Mode Enables For CMD I/O" bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 28. " DDLLCAL_BIT_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 27. " DDLL_BIT_TXCMD_BYPASS_CKE7 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 26. " DDLL_BYTE_TXCMD_PWRD_CKE7 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYT_TXCMD_BYPASS_CKE7 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 24. " CMD_E_INPUT_CKE7 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 20. " DDLLCAL_BIT_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 19. " DDLL_BIT_TXCMD_BYPASS_CKE6 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 18. " DDLL_BYTE_TXCMD_PWRD_CKE6 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 17. " DDLL_BYT_TXCMD_BYPASS_CKE6 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 16. " CMD_E_INPUT_CKE6 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 12. " DDLLCAL_BIT_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 11. " DDLL_BIT_TXCMD_BYPASS_CKE5 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 10. " DDLL_BYTE_TXCMD_PWRD_CKE5 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYT_TXCMD_BYPASS_CKE5 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 8. " CMD_E_INPUT_CKE5 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 4. " DDLLCAL_BIT_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 3. " DDLL_BIT_TXCMD_BYPASS_CKE4 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 2. " DDLL_BYTE_TXCMD_PWRD_CKE4 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYT_TXCMD_BYPASS_CKE4 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 0. " CMD_E_INPUT_CKE4 ,IO_CMD input path enable" "Disabled,Enabled" group.long 0x788++0x03 line.long 0x00 "CMD_CTRL_2_0,DLL Bypass And Power Down Mode Enables For CMD I/O" bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 28. " DDLLCAL_BIT_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 27. " DDLL_BIT_TXCMD_BYPASS_MISC2 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 26. " DDLL_BYTE_TXCMD_PWRD_MISC2 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYT_TXCMD_BYPASS_MISC2 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 24. " CMD_E_INPUT_MISC2 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 20. " DDLLCAL_BIT_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 19. " DDLL_BIT_TXCMD_BYPASS_MISC1 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 18. " DDLL_BYTE_TXCMD_PWRD_MISC1 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 17. " DDLL_BYT_TXCMD_BYPASS_MISC1 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 16. " CMD_E_INPUT_MISC1 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 12. " DDLLCAL_BIT_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 11. " DDLL_BIT_TXCMD_BYPASS_MISC0 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 10. " DDLL_BYTE_TXCMD_PWRD_MISC0 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYT_TXCMD_BYPASS_MISC0 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 8. " CMD_E_INPUT_MISC0 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DDLLCAL_BYTE_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 4. " DDLLCAL_BIT_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 3. " DDLL_BIT_TXCMD_BYPASS_RESET ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 2. " DDLL_BYTE_TXCMD_PWRD_RESET ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYT_TXCMD_BYPASS_RESET ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 0. " CMD_E_INPUT_RESET ,IO_CMD input path enable" "Disabled,Enabled" width 17. tree "OB DDLL Short DQ Registers" group.long 0x800++0x0F line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0 ,Programmed to byte0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE0 ,Programmed to byte0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE0 ,Programmed to byte0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE0 ,Programmed to byte0 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0 ,Programmed to byte0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE0 ,Programmed to byte0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE0 ,Programmed to byte0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE0 ,Programmed to byte0 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0 ,Programmed to byte0 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0 ,Programmed to byte0 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE0 ,Programmed to byte0 pin9 TX fine trimmer value" textline " " group.long 0x810++0x0F line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1 ,Programmed to byte1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE1 ,Programmed to byte1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE1 ,Programmed to byte1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE1 ,Programmed to byte1 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1 ,Programmed to byte1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE1 ,Programmed to byte1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE1 ,Programmed to byte1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE1 ,Programmed to byte1 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1 ,Programmed to byte1 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1 ,Programmed to byte1 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE1 ,Programmed to byte1 pin9 TX fine trimmer value" textline " " group.long 0x820++0x0F line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2 ,Programmed to byte2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE2 ,Programmed to byte2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE2 ,Programmed to byte2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE2 ,Programmed to byte2 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2 ,Programmed to byte2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE2 ,Programmed to byte2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE2 ,Programmed to byte2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE2 ,Programmed to byte2 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2 ,Programmed to byte2 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2 ,Programmed to byte2 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE2 ,Programmed to byte2 pin9 TX fine trimmer value" textline " " group.long 0x830++0x0F line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3 ,Programmed to byte3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE3 ,Programmed to byte3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE3 ,Programmed to byte3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE3 ,Programmed to byte3 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3 ,Programmed to byte3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE3 ,Programmed to byte3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE3 ,Programmed to byte3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE3 ,Programmed to byte3 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3 ,Programmed to byte3 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3 ,Programmed to byte3 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE3 ,Programmed to byte3 pin9 TX fine trimmer value" textline " " group.long 0x840++0x0F line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4 ,Programmed to byte4 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE4 ,Programmed to byte4 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE4 ,Programmed to byte4 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE4 ,Programmed to byte4 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4 ,Programmed to byte4 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE4 ,Programmed to byte4 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE4 ,Programmed to byte4 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE4 ,Programmed to byte4 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4 ,Programmed to byte4 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE4_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4 ,Programmed to byte4 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE4 ,Programmed to byte4 pin9 TX fine trimmer value" textline " " group.long 0x850++0x0F line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5 ,Programmed to byte5 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE5 ,Programmed to byte5 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE5 ,Programmed to byte5 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE5 ,Programmed to byte5 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5 ,Programmed to byte5 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE5 ,Programmed to byte5 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE5 ,Programmed to byte5 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE5 ,Programmed to byte5 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5 ,Programmed to byte5 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE5_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5 ,Programmed to byte5 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE5 ,Programmed to byte5 pin9 TX fine trimmer value" textline " " group.long 0x860++0x0F line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6 ,Programmed to byte6 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE6 ,Programmed to byte6 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE6 ,Programmed to byte6 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE6 ,Programmed to byte6 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6 ,Programmed to byte6 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE6 ,Programmed to byte6 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE6 ,Programmed to byte6 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE6 ,Programmed to byte6 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6 ,Programmed to byte6 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE6_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6 ,Programmed to byte6 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE6 ,Programmed to byte6 pin9 TX fine trimmer value" textline " " group.long 0x870++0x0F line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7 ,Programmed to byte7 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE7 ,Programmed to byte7 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE7 ,Programmed to byte7 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE7 ,Programmed to byte7 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7 ,Programmed to byte7 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE7 ,Programmed to byte7 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE7 ,Programmed to byte7 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE7 ,Programmed to byte7 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7 ,Programmed to byte7 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE7_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7 ,Programmed to byte7 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE7 ,Programmed to byte7 pin9 TX fine trimmer value" textline " " group.long 0x880++0x0F line.long 0x00 "RANK0_CMD0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0 ,Programmed to command0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD0 ,Programmed to command0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD0 ,Programmed to command0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD0 ,Programmed to command0 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0 ,Programmed to command0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD0 ,Programmed to command0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD0 ,Programmed to command0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD0 ,Programmed to command0 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0 ,Programmed to command0 pin8 TX fine trimmer value" line.long 0x0C "RANK0_CMD0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0 ,Programmed to command0 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD0 ,Programmed to command0 pin9 TX fine trimmer value" textline " " group.long 0x890++0x0F line.long 0x00 "RANK0_CMD1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1 ,Programmed to command1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD1 ,Programmed to command1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD1 ,Programmed to command1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD1 ,Programmed to command1 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1 ,Programmed to command1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD1 ,Programmed to command1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD1 ,Programmed to command1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD1 ,Programmed to command1 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1 ,Programmed to command1 pin8 TX fine trimmer value" line.long 0x0C "RANK0_CMD1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1 ,Programmed to command1 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD1 ,Programmed to command1 pin9 TX fine trimmer value" textline " " group.long 0x8A0++0x0F line.long 0x00 "RANK0_CMD2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2 ,Programmed to command2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD2 ,Programmed to command2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD2 ,Programmed to command2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD2 ,Programmed to command2 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2 ,Programmed to command2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD2 ,Programmed to command2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD2 ,Programmed to command2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD2 ,Programmed to command2 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2 ,Programmed to command2 pin8 TX fine trimmer value" line.long 0x0C "RANK0_CMD2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2 ,Programmed to command2 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD2 ,Programmed to command2 pin9 TX fine trimmer value" textline " " group.long 0x8B0++0x0F line.long 0x00 "RANK0_CMD3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3 ,Programmed to command3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD3 ,Programmed to command3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD3 ,Programmed to command3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD3 ,Programmed to command3 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3 ,Programmed to command3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD3 ,Programmed to command3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD3 ,Programmed to command3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD3 ,Programmed to command3 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3 ,Programmed to command3 pin8 TX fine trimmer value" line.long 0x0C "RANK0_CMD3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3 ,Programmed to command3 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD3 ,Programmed to command3 pin9 TX fine trimmer value" textline " " group.long 0x900++0x0F line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0 ,Programmed to byte0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE0 ,Programmed to byte0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE0 ,Programmed to byte0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE0 ,Programmed to byte0 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0 ,Programmed to byte0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE0 ,Programmed to byte0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE0 ,Programmed to byte0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE0 ,Programmed to byte0 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0 ,Programmed to byte0 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0 ,Programmed to byte0 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE0 ,Programmed to byte0 pin9 TX fine trimmer value" textline " " group.long 0x910++0x0F line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1 ,Programmed to byte1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE1 ,Programmed to byte1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE1 ,Programmed to byte1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE1 ,Programmed to byte1 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1 ,Programmed to byte1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE1 ,Programmed to byte1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE1 ,Programmed to byte1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE1 ,Programmed to byte1 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1 ,Programmed to byte1 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1 ,Programmed to byte1 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE1 ,Programmed to byte1 pin9 TX fine trimmer value" textline " " group.long 0x920++0x0F line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2 ,Programmed to byte2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE2 ,Programmed to byte2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE2 ,Programmed to byte2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE2 ,Programmed to byte2 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2 ,Programmed to byte2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE2 ,Programmed to byte2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE2 ,Programmed to byte2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE2 ,Programmed to byte2 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2 ,Programmed to byte2 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2 ,Programmed to byte2 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE2 ,Programmed to byte2 pin9 TX fine trimmer value" textline " " group.long 0x930++0x0F line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3 ,Programmed to byte3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE3 ,Programmed to byte3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE3 ,Programmed to byte3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE3 ,Programmed to byte3 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3 ,Programmed to byte3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE3 ,Programmed to byte3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE3 ,Programmed to byte3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE3 ,Programmed to byte3 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3 ,Programmed to byte3 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3 ,Programmed to byte3 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE3 ,Programmed to byte3 pin9 TX fine trimmer value" textline " " group.long 0x940++0x0F line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4 ,Programmed to byte4 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE4 ,Programmed to byte4 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE4 ,Programmed to byte4 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE4 ,Programmed to byte4 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4 ,Programmed to byte4 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE4 ,Programmed to byte4 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE4 ,Programmed to byte4 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE4 ,Programmed to byte4 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4 ,Programmed to byte4 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE4_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4 ,Programmed to byte4 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE4 ,Programmed to byte4 pin9 TX fine trimmer value" textline " " group.long 0x950++0x0F line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5 ,Programmed to byte5 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE5 ,Programmed to byte5 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE5 ,Programmed to byte5 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE5 ,Programmed to byte5 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5 ,Programmed to byte5 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE5 ,Programmed to byte5 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE5 ,Programmed to byte5 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE5 ,Programmed to byte5 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5 ,Programmed to byte5 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE5_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5 ,Programmed to byte5 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE5 ,Programmed to byte5 pin9 TX fine trimmer value" textline " " group.long 0x960++0x0F line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6 ,Programmed to byte6 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE6 ,Programmed to byte6 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE6 ,Programmed to byte6 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE6 ,Programmed to byte6 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6 ,Programmed to byte6 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE6 ,Programmed to byte6 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE6 ,Programmed to byte6 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE6 ,Programmed to byte6 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6 ,Programmed to byte6 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE6_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6 ,Programmed to byte6 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE6 ,Programmed to byte6 pin9 TX fine trimmer value" textline " " group.long 0x970++0x0F line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7 ,Programmed to byte7 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE7 ,Programmed to byte7 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE7 ,Programmed to byte7 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE7 ,Programmed to byte7 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7 ,Programmed to byte7 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE7 ,Programmed to byte7 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE7 ,Programmed to byte7 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE7 ,Programmed to byte7 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7 ,Programmed to byte7 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE7_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7 ,Programmed to byte7 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE7 ,Programmed to byte7 pin9 TX fine trimmer value" textline " " group.long 0x980++0x0F line.long 0x00 "RANK1_CMD0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0 ,Programmed to command0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD0 ,Programmed to command0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD0 ,Programmed to command0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD0 ,Programmed to command0 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0 ,Programmed to command0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD0 ,Programmed to command0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD0 ,Programmed to command0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD0 ,Programmed to command0 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0 ,Programmed to command0 pin8 TX fine trimmer value" line.long 0x0C "RANK1_CMD0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0 ,Programmed to command0 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD0 ,Programmed to command0 pin9 TX fine trimmer value" textline " " group.long 0x990++0x0F line.long 0x00 "RANK1_CMD1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1 ,Programmed to command1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD1 ,Programmed to command1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD1 ,Programmed to command1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD1 ,Programmed to command1 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1 ,Programmed to command1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD1 ,Programmed to command1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD1 ,Programmed to command1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD1 ,Programmed to command1 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1 ,Programmed to command1 pin8 TX fine trimmer value" line.long 0x0C "RANK1_CMD1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1 ,Programmed to command1 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD1 ,Programmed to command1 pin9 TX fine trimmer value" textline " " group.long 0x9A0++0x0F line.long 0x00 "RANK1_CMD2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2 ,Programmed to command2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD2 ,Programmed to command2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD2 ,Programmed to command2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD2 ,Programmed to command2 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2 ,Programmed to command2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD2 ,Programmed to command2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD2 ,Programmed to command2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD2 ,Programmed to command2 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2 ,Programmed to command2 pin8 TX fine trimmer value" line.long 0x0C "RANK1_CMD2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2 ,Programmed to command2 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD2 ,Programmed to command2 pin9 TX fine trimmer value" textline " " group.long 0x9B0++0x0F line.long 0x00 "RANK1_CMD3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3 ,Programmed to command3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD3 ,Programmed to command3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD3 ,Programmed to command3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD3 ,Programmed to command3 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3 ,Programmed to command3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD3 ,Programmed to command3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD3 ,Programmed to command3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD3 ,Programmed to command3 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3 ,Programmed to command3 pin8 TX fine trimmer value" line.long 0x0C "RANK1_CMD3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3 ,Programmed to command3 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD3 ,Programmed to command3 pin9 TX fine trimmer value" textline " " tree.end tree "IB DDLL Short DQ Register" group.long 0xA00++0x0F line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0 ,Programmed to byte0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE0 ,Programmed to byte0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE0 ,Programmed to byte0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE0 ,Programmed to byte0 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0 ,Programmed to byte0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE0 ,Programmed to byte0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE0 ,Programmed to byte0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE0 ,Programmed to byte0 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0 ,Programmed to byte0 pin8 TX fine trimmer value" textline " " group.long 0xA10++0x0F line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1 ,Programmed to byte1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE1 ,Programmed to byte1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE1 ,Programmed to byte1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE1 ,Programmed to byte1 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1 ,Programmed to byte1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE1 ,Programmed to byte1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE1 ,Programmed to byte1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE1 ,Programmed to byte1 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1 ,Programmed to byte1 pin8 TX fine trimmer value" textline " " group.long 0xA20++0x0F line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2 ,Programmed to byte2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE2 ,Programmed to byte2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE2 ,Programmed to byte2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE2 ,Programmed to byte2 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2 ,Programmed to byte2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE2 ,Programmed to byte2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE2 ,Programmed to byte2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE2 ,Programmed to byte2 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2 ,Programmed to byte2 pin8 TX fine trimmer value" textline " " group.long 0xA30++0x0F line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3 ,Programmed to byte3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE3 ,Programmed to byte3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE3 ,Programmed to byte3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE3 ,Programmed to byte3 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3 ,Programmed to byte3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE3 ,Programmed to byte3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE3 ,Programmed to byte3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE3 ,Programmed to byte3 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3 ,Programmed to byte3 pin8 TX fine trimmer value" textline " " group.long 0xA40++0x0F line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4 ,Programmed to byte4 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE4 ,Programmed to byte4 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE4 ,Programmed to byte4 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE4 ,Programmed to byte4 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4 ,Programmed to byte4 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE4 ,Programmed to byte4 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE4 ,Programmed to byte4 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE4 ,Programmed to byte4 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4 ,Programmed to byte4 pin8 TX fine trimmer value" textline " " group.long 0xA50++0x0F line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5 ,Programmed to byte5 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE5 ,Programmed to byte5 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE5 ,Programmed to byte5 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE5 ,Programmed to byte5 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5 ,Programmed to byte5 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE5 ,Programmed to byte5 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE5 ,Programmed to byte5 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE5 ,Programmed to byte5 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5 ,Programmed to byte5 pin8 TX fine trimmer value" textline " " group.long 0xA60++0x0F line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6 ,Programmed to byte6 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE6 ,Programmed to byte6 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE6 ,Programmed to byte6 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE6 ,Programmed to byte6 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6 ,Programmed to byte6 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE6 ,Programmed to byte6 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE6 ,Programmed to byte6 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE6 ,Programmed to byte6 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6 ,Programmed to byte6 pin8 TX fine trimmer value" textline " " group.long 0xA70++0x0F line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7 ,Programmed to byte7 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE7 ,Programmed to byte7 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE7 ,Programmed to byte7 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE7 ,Programmed to byte7 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7 ,Programmed to byte7 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE7 ,Programmed to byte7 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE7 ,Programmed to byte7 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE7 ,Programmed to byte7 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7 ,Programmed to byte7 pin8 TX fine trimmer value" textline " " group.long 0xA80++0x0F line.long 0x00 "RANK0_CMD0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0 ,Programmed to command0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD0 ,Programmed to command0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD0 ,Programmed to command0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD0 ,Programmed to command0 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0 ,Programmed to command0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD0 ,Programmed to command0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD0 ,Programmed to command0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD0 ,Programmed to command0 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0 ,Programmed to command0 pin8 TX fine trimmer value" textline " " group.long 0xA90++0x0F line.long 0x00 "RANK0_CMD1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1 ,Programmed to command1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD1 ,Programmed to command1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD1 ,Programmed to command1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD1 ,Programmed to command1 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1 ,Programmed to command1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD1 ,Programmed to command1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD1 ,Programmed to command1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD1 ,Programmed to command1 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1 ,Programmed to command1 pin8 TX fine trimmer value" textline " " group.long 0xAA0++0x0F line.long 0x00 "RANK0_CMD2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2 ,Programmed to command2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD2 ,Programmed to command2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD2 ,Programmed to command2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD2 ,Programmed to command2 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2 ,Programmed to command2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD2 ,Programmed to command2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD2 ,Programmed to command2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD2 ,Programmed to command2 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2 ,Programmed to command2 pin8 TX fine trimmer value" textline " " group.long 0xAB0++0x0F line.long 0x00 "RANK0_CMD3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3 ,Programmed to command3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD3 ,Programmed to command3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD3 ,Programmed to command3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD3 ,Programmed to command3 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3 ,Programmed to command3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD3 ,Programmed to command3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD3 ,Programmed to command3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD3 ,Programmed to command3 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3 ,Programmed to command3 pin8 TX fine trimmer value" textline " " group.long 0xB00++0x0F line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0 ,Programmed to byte0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE0 ,Programmed to byte0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE0 ,Programmed to byte0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE0 ,Programmed to byte0 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0 ,Programmed to byte0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE0 ,Programmed to byte0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE0 ,Programmed to byte0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE0 ,Programmed to byte0 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0 ,Programmed to byte0 pin8 TX fine trimmer value" group.long 0xB10++0x0F line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1 ,Programmed to byte1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE1 ,Programmed to byte1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE1 ,Programmed to byte1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE1 ,Programmed to byte1 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1 ,Programmed to byte1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE1 ,Programmed to byte1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE1 ,Programmed to byte1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE1 ,Programmed to byte1 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1 ,Programmed to byte1 pin8 TX fine trimmer value" group.long 0xB20++0x0F line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2 ,Programmed to byte2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE2 ,Programmed to byte2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE2 ,Programmed to byte2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE2 ,Programmed to byte2 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2 ,Programmed to byte2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE2 ,Programmed to byte2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE2 ,Programmed to byte2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE2 ,Programmed to byte2 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2 ,Programmed to byte2 pin8 TX fine trimmer value" group.long 0xB30++0x0F line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3 ,Programmed to byte3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE3 ,Programmed to byte3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE3 ,Programmed to byte3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE3 ,Programmed to byte3 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3 ,Programmed to byte3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE3 ,Programmed to byte3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE3 ,Programmed to byte3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE3 ,Programmed to byte3 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3 ,Programmed to byte3 pin8 TX fine trimmer value" group.long 0xB40++0x0F line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4 ,Programmed to byte4 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE4 ,Programmed to byte4 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE4 ,Programmed to byte4 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE4 ,Programmed to byte4 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4 ,Programmed to byte4 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE4 ,Programmed to byte4 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE4 ,Programmed to byte4 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE4 ,Programmed to byte4 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4 ,Programmed to byte4 pin8 TX fine trimmer value" group.long 0xB50++0x0F line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5 ,Programmed to byte5 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE5 ,Programmed to byte5 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE5 ,Programmed to byte5 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE5 ,Programmed to byte5 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5 ,Programmed to byte5 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE5 ,Programmed to byte5 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE5 ,Programmed to byte5 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE5 ,Programmed to byte5 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5 ,Programmed to byte5 pin8 TX fine trimmer value" group.long 0xB60++0x0F line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6 ,Programmed to byte6 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE6 ,Programmed to byte6 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE6 ,Programmed to byte6 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE6 ,Programmed to byte6 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6 ,Programmed to byte6 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE6 ,Programmed to byte6 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE6 ,Programmed to byte6 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE6 ,Programmed to byte6 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6 ,Programmed to byte6 pin8 TX fine trimmer value" group.long 0xB70++0x0F line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7 ,Programmed to byte7 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE7 ,Programmed to byte7 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE7 ,Programmed to byte7 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE7 ,Programmed to byte7 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7 ,Programmed to byte7 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE7 ,Programmed to byte7 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE7 ,Programmed to byte7 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE7 ,Programmed to byte7 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7 ,Programmed to byte7 pin8 TX fine trimmer value" group.long 0xB80++0x0F line.long 0x00 "RANK1_CMD0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0 ,Programmed to command0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD0 ,Programmed to command0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD0 ,Programmed to command0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD0 ,Programmed to command0 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0 ,Programmed to command0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD0 ,Programmed to command0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD0 ,Programmed to command0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD0 ,Programmed to command0 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0 ,Programmed to command0 pin8 TX fine trimmer value" group.long 0xB90++0x0F line.long 0x00 "RANK1_CMD1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1 ,Programmed to command1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD1 ,Programmed to command1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD1 ,Programmed to command1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD1 ,Programmed to command1 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1 ,Programmed to command1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD1 ,Programmed to command1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD1 ,Programmed to command1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD1 ,Programmed to command1 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1 ,Programmed to command1 pin8 TX fine trimmer value" group.long 0xBA0++0x0F line.long 0x00 "RANK1_CMD2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2 ,Programmed to command2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD2 ,Programmed to command2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD2 ,Programmed to command2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD2 ,Programmed to command2 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2 ,Programmed to command2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD2 ,Programmed to command2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD2 ,Programmed to command2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD2 ,Programmed to command2 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2 ,Programmed to command2 pin8 TX fine trimmer value" group.long 0xBB0++0x0F line.long 0x00 "RANK1_CMD3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3 ,Programmed to command3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD3 ,Programmed to command3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD3 ,Programmed to command3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD3 ,Programmed to command3 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3 ,Programmed to command3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD3 ,Programmed to command3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD3 ,Programmed to command3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD3 ,Programmed to command3 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3 ,Programmed to command3 pin8 TX fine trimmer value" tree.end textline " " width 32. group.long 0xBE0++0x03 line.long 0x00 "IB_VREF_DQ_0_0,IB DQ Receiver Vref For Byte0 To Byte3" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE3 ,Programmed to IB Vref value for DQ of BYTE3" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQ_BYTE2 ,Programmed to IB Vref value for DQ of BYTE2" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQ_BYTE1 ,Programmed to IB Vref value for DQ of BYTE1" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQ_BYTE0 ,Programmed to IB Vref value for DQ of BYTE0" group.long 0xBE4++0x03 line.long 0x00 "IB_VREF_DQ_1_0,IB DQ Receiver Vref For Byte4 To Byte7" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE7 ,Programmed to IB Vref value for DQ of BYTE7" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQ_BYTE6 ,Programmed to IB Vref value for DQ of BYTE6" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQ_BYTE5 ,Programmed to IB Vref value for DQ of BYTE5" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQ_BYTE4 ,Programmed to IB Vref value for DQ of BYTE4" group.long 0xBE8++0x03 line.long 0x00 "IB_VREF_DQ_2_0,IB DQ Receiver Vref For Cmd0 To Cmd3" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_CMD3 ,Programmed to IB Vref value for DQ of CMD3" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQ_CMD2 ,Programmed to IB Vref value for DQ of CMD2" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQ_CMD1 ,Programmed to IB Vref value for DQ of CMD1" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQ_CMD0 ,Programmed to IB Vref value for DQ of CMD0" group.long 0xBF0++0x03 line.long 0x00 "IB_VREF_DQS_0_0,IB DQS Receiver Vref For Byte0 To Byte3" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE3 ,Programmed to IB Vref value for DQS of BYTE3" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQS_BYTE2 ,Programmed to IB Vref value for DQS of BYTE2" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQS_BYTE1 ,Programmed to IB Vref value for DQS of BYTE1" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQS_BYTE0 ,Programmed to IB Vref value for DQS of BYTE0" group.long 0xBF4++0x03 line.long 0x00 "IB_VREF_DQS_1_0,IB DQS Receiver Vref For Byte4 To Byte7" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE7 ,Programmed to IB Vref value for DQS of BYTE7" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQS_BYTE6 ,Programmed to IB Vref value for DQS of BYTE6" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQS_BYTE5 ,Programmed to IB Vref value for DQS of BYTE5" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQS_BYTE4 ,Programmed to IB Vref value for DQS of BYTE4" group.long 0xBF8++0x03 line.long 0x00 "IB_VREF_DQS_2_0,IB DQS Receiver Vref For Cmd0 To Cmd3" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_CMD3 ,Programmed to IB Vref value for DQS of CMD3" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQS_CMD2 ,Programmed to IB Vref value for DQS of CMD2" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQS_CMD1 ,Programmed to IB Vref value for DQS of CMD1" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQS_CMD0 ,Programmed to IB Vref value for DQS of CMD0" textline " " group.long 0xC00++0x03 line.long 0x00 "DDLL_LONG_CMD_0_0,DLL Long Trimmer Value For Cke0 And Cke1" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE1 ,Programmed to CKE1 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_CKE0 ,Programmed to CKE0 trimmer value" group.long 0xC04++0x03 line.long 0x00 "DDLL_LONG_CMD_1_0,DLL Long Trimmer Value For Cke2 And Cke3" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE3 ,Programmed to CKE3 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_CKE2 ,Programmed to CKE2 trimmer value" group.long 0xC08++0x03 line.long 0x00 "DDLL_LONG_CMD_2_0,DLL Long Trimmer Value For Cke4 And Cke5" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE5 ,Programmed to CKE5 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_CKE4 ,Programmed to CKE4 trimmer value" group.long 0xC0C++0x03 line.long 0x00 "DDLL_LONG_CMD_3_0,DLL Long Trimmer Value For Cke6 And Cke7" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE7 ,Programmed to CKE7 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_CKE6 ,Programmed to CKE6 trimmer value" group.long 0xC10++0x03 line.long 0x00 "DDLL_LONG_CMD_4_0,DLL Long Trimmer Value For Reset And Misc0" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC0 ,Programmed to MISC0 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_RESET ,Programmed to RESET trimmer value" group.long 0xC14++0x03 line.long 0x00 "DDLL_LONG_CMD_5_0,DLL Long Trimmer Value For Misc1 And Misc2" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC2 ,Programmed to MISC2 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_MISC1 ,Programmed to MISC1 trimmer value" textline " " group.long 0xC20++0x03 line.long 0x00 "DDLL_SHORT_CMD_0_0,DLL Short Trimmer Value" hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE3 ,Programmed to CKE3 fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " DDLL_SHORT_CMD_CKE2 ,Programmed to CKE2 fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " DDLL_SHORT_CMD_CKE1 ,Programmed to CKE1 fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " DDLL_SHORT_CMD_CKE0 ,Programmed to CKE0 fine trimmer value" group.long 0xC24++0x03 line.long 0x00 "DDLL_SHORT_CMD_1_0,DLL Short Trimmer Value" hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE7 ,Programmed to CKE7 fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " DDLL_SHORT_CMD_CKE6 ,Programmed to CKE6 fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " DDLL_SHORT_CMD_CKE5 ,Programmed to CKE5 fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " DDLL_SHORT_CMD_CKE4 ,Programmed to CKE4 fine trimmer value" group.long 0xC28++0x03 line.long 0x00 "DDLL_SHORT_CMD_2_0,DLL Short Trimmer Value" hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_MISC2 ,Programmed to MISC2 fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " DDLL_SHORT_CMD_MISC1 ,Programmed to MISC1 fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " DDLL_SHORT_CMD_MISC0 ,Programmed to MISC0 fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " DDLL_SHORT_CMD_RESET ,Programmed to RESET fine trimmer value" textline " " group.long 0xC30++0x07 line.long 0x00 "CFG_PM_GLOBAL_0_0,Global Register For Pad Macro Control" bitfld.long 0x00 27. " DISABLE_CFG_CMD3 ,CMD3 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 26. " DISABLE_CFG_CMD2 ,CMD2 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 25. " DISABLE_CFG_CMD1 ,CMD1 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 24. " DISABLE_CFG_CMD0 ,CMD0 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 23. " DISABLE_CFG_BYTE7 ,BYTE7 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 22. " DISABLE_CFG_BYTE6 ,BYTE6 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 21. " DISABLE_CFG_BYTE5 ,BYTE5 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 20. " DISABLE_CFG_BYTE4 ,BYTE4 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 19. " DISABLE_CFG_BYTE3 ,BYTE3 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 18. " DISABLE_CFG_BYTE2 ,BYTE2 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 17. " DISABLE_CFG_BYTE1 ,BYTE1 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 16. " DISABLE_CFG_BYTE0 ,BYTE0 pad macro configuration read|write disable" "No,Yes" line.long 0x04 "VTTGEN_CTRL_0_0,VTTGEN Control Register 0" sif (cpuis("TEGRAX2")) bitfld.long 0x04 24. " VTTLP_VDDA_E_REGSW ,Enable switch to low power regulator" "Disabled,Enabled" textline " " endif bitfld.long 0x04 16.--19. " VTT_VDDA_LVL ,VDDA level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " VTT_VAUXP_LVL ,VAUXP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " VTT_VCLAMP_LVL ,VCLAMP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpuis("TEGRAX2")) group.long 0xC38++0x03 line.long 0x00 "VTTGEN_CTRL_1_0,VTTGEN control register" bitfld.long 0x00 10.--14. " VTT_VDDA_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--9. " VTT_VAUXP_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VTT_VCLAMP_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.long 0xC3C++0x2F line.long 0x00 "BG_BIAS_CTRL_0_0,BG Bias Control Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 20.--21. " DDLL_CDB_BG_ILVL_CTRL ,BG current bias select" "25ua,50ua,TBD,TBD" bitfld.long 0x00 16.--17. " DDLL_DDLL_BG_ILVL_CTRL ,BG current bias select" "25ua,50ua,TBD,TBD" textline " " bitfld.long 0x00 12.--13. " XM2COMP_BG_ILVL_CTRL ,BANDGAP output current level control" "25ua,50ua,TBD,TBD" bitfld.long 0x00 8.--9. " BG_ILVL_CTRL ,BG current bias select" "25ua,50ua,TBD,TBD" textline " " endif bitfld.long 0x00 4.--6. " BG_SETUP ,Temperature coefficient control" "0,1,2,3,4,5,6,7" sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " BGLP_E_PWRD ,BGLP E PWRD" "0,1" endif textline " " bitfld.long 0x00 1. " BG_MODE ,Regulator mode" "High performance,Low power" bitfld.long 0x00 0. " BG_E_PWRD ,Power down regulator" "0,1" line.long 0x04 "PAD_CFG_CTRL_0,Config Control Register For Pads" bitfld.long 0x04 28.--30. " PAD_MACRO_QUSE_MODE ,Pad macro QUSE mode" "Direct,,Regular W/O div2,Regular,?..." bitfld.long 0x04 25. " TX_E_DDLL_TCLK ,TX E DDLL TCLK" "0,1" textline " " bitfld.long 0x04 24. " E_TX_NMOS_DRVUP ,E TX NMOS DRVUP" "0,1" bitfld.long 0x04 20.--21. " TX_DCC_MODE ,TX DCC mode" "0,1,2,3" textline " " bitfld.long 0x04 16.--17. " MEM_MODE ,Type of DDR memory used for misc. internal controls" "LPDDR2|3,SDDR3|SDDR3L,LPDDR4,?..." bitfld.long 0x04 13. " TX_SEL_MV_CYCLE ,Multi-voltage timing path timing closure" "1 cycle,2 cycles" textline " " bitfld.long 0x04 10.--11. " CMD_TX_EBOOST_PU_MODE ,DQ pull up pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x04 9. " E_PWRD ,DC current paths within entire brick cell disable" "Enabled,Disabled" textline " " bitfld.long 0x04 5.--6. " CMD_TX_EBOOST_PD_MODE ,DQ pull down pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x04 0.--1. " QUSE_MODE ,Pad quse mode" "0,1,2,3" line.long 0x08 "ZCTRL_0,Driver|Receiver ZCTRL Settings For All IOBRICKs" bitfld.long 0x08 26.--27. " DATA_DQS_TX_DRVDN_ZCTRL ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 24.--25. " DATA_DQ_TX_DRVDN_ZCTRL ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 22.--23. " DATA_DQS_TX_DRVUP_ZCTRL ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 20.--21. " DATA_DQ_TX_DRVUP_ZCTRL ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 18.--19. " CMD_DQS_TX_DRVDN_ZCTRL ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 16.--17. " CMD_DQ_TX_DRVDN_ZCTRL ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 14.--15. " CMD_DQS_TX_DRVUP_ZCTRL ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 12.--13. " CMD_DQ_TX_DRVUP_ZCTRL ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 10.--11. " DQS_RX_DRVDN_TERM_ZCTRL ,DQS pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 8.--9. " DQ_RX_DRVDN_TERM_ZCTRL ,DQ pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 6.--7. " DQS_RX_DRVUP_TERM_ZCTRL ,DQS pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 4.--5. " DQ_RX_DRVUP_TERM_ZCTRL ,DQ pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 2.--3. " CMD_TX_DRVDN_ZCTRL ,CMD pad of DQ|CA drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 0.--1. " CMD_TX_DRVUP_ZCTRL ,CMD pad of DQ|CA drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" line.long 0x0C "RX_TERM_0,Receive Termination Strength Control Register For DQ Brick" bitfld.long 0x0C 24.--29. " DQS_RX_DRVDN_TERM ,DQS pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 16.--21. " DQS_RX_DRVUP_TERM ,DQS pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 8.--13. " DQ_RX_DRVDN_TERM ,DQ pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--5. " DQ_RX_DRVUP_TERM ,DQ pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "CMD_TX_DRV_0,Transmit Drive Strength Control Register For CMD Pad In DQ|CA Brick" bitfld.long 0x10 8.--13. " CMD_TX_DRVDN ,CMD TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--5. " CMD_TX_DRVUP ,CMD TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "CMD_PAD_RX_CTRL_0,Receiver Mode Control For Command Pad" bitfld.long 0x14 24.--28. " CMD_DQ_RX_CTRL ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 22. " CMD_RX_E_DIRECT_ZI ,Command RX E direct ZI" "0,1" textline " " bitfld.long 0x14 21. " CMD_RX_E_IBIAS_PWRD ,Command RX E IBIAS PWRD" "0,1" bitfld.long 0x14 16.--20. " CMD_DQS_RX_CTRL ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x14 15. " CMD_EINPUT_FORCE_ON ,Static einput enable" "Disabled,Enabled" bitfld.long 0x14 14. " CMD_DQ_RX_E_RDIV ,Resistor divider differential amplifier enable" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " CMD_DQ_RX_E_DAMP_DFE ,DFE circuit RX differential amplifier enable" "Disabled,Enabled" bitfld.long 0x14 12. " CMD_DQS_RX_E_DIFF_MODE ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION" textline " " bitfld.long 0x14 8.--10. " CMD_DQ_RX_DAMP_DFE_CTRL ,Different DFE modes selection" "0,1,2,3,4,5,6,7" bitfld.long 0x14 4.--5. " CMD_DQS_RX_MODE ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15" textline " " bitfld.long 0x14 0.--2. " CMD_DQ_RX_MODE ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE" line.long 0x18 "DATA_PAD_RX_CTRL_0,Receiver Mode Control For Data Pad" bitfld.long 0x18 24.--28. " DATA_DQ_RX_CTRL ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 22. " DATA_RX_E_DIRECT_ZI ,Data RX E Direct ZI" "0,1" textline " " bitfld.long 0x18 21. " DATA_RX_E_IBIAS_PWRD ,Data RX E IBIAS PWRD" "0,1" bitfld.long 0x18 16.--20. " DATA_DQS_RX_CTRL ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 15. " DATA_EINPUT_FORCE_ON ,Static einput enable" "Disabled,Enabled" bitfld.long 0x18 14. " DATA_DQ_RX_E_RDIV ,Resistor divider differential amplifier enable" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " DATA_DQ_RX_E_DAMP_DFE ,DFE circuit RX differential amplifier enable" "Disabled,Enabled" bitfld.long 0x18 12. " DATA_DQS_RX_E_DIFF_MODE ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION" textline " " bitfld.long 0x18 8.--10. " DATA_DQ_RX_DAMP_DFE_CTRL ,Different DFE modes selection" "0,1,2,3,4,5,6,7" bitfld.long 0x18 4.--5. " DATA_DQS_RX_MODE ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15" textline " " bitfld.long 0x18 0.--2. " DATA_DQ_RX_MODE ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE" line.long 0x1C "CMD_RX_TERM_MODE_0,Receiver Termination Mode Control For Command Pad" bitfld.long 0x1C 13. " CMD_E_PWRD_RX ,RX DC current paths within entire brick cell disable" "Enabled,Disabled" bitfld.long 0x1C 12. " CMD_DDLL_QU_SEL_M2CLK ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK" textline " " bitfld.long 0x1C 8.--9. " CMD_DQSN_RX_TERM_MODE ,Command DQSN RX termination mode" ",,Pull-up,Center tap" bitfld.long 0x1C 4.--5. " CMD_DQSP_RX_TERM_MODE ,Command DQSP RX termination mode" "HI-Z,Pull-down,?..." textline " " bitfld.long 0x1C 0.--1. " CMD_DQ_RX_TERM_MODE ,Driver as receiver ODT or CTT termination enable" "0,1,2,3" line.long 0x20 "DATA_RX_TERM_MODE_0,Receiver Termination Mode Control For Data Pad" bitfld.long 0x20 13. " DATA_E_PWRD_RX ,RX DC current paths within entire brick cell disable" "Enabled,Disabled" bitfld.long 0x20 12. " DATA_DDLL_QU_SEL_M2CLK ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK" textline " " bitfld.long 0x20 8.--9. " DATA_DQSN_RX_TERM_MODE ,Data DQSN RX termination mode" ",,Pull-up,Center tap" bitfld.long 0x20 4.--5. " DATA_DQSP_RX_TERM_MODE ,Data DQSP RX termination mode" "HI-Z,Pull-down,?..." textline " " bitfld.long 0x20 0.--1. " DATA_DQ_RX_TERM_MODE ,Driver as receiver ODT or CTT termination enable" "0,1,2,3" line.long 0x24 "CMD_PAD_TX_CTRL_0,OB Control For Command Pad" bitfld.long 0x24 27. " CMD_DQS_TX_DRVFORCEON ,Command DQS TX drive force on" "0,1" bitfld.long 0x24 26. " CMD_DQ_TX_DRVFORCEON ,Command DQ TX drive force on" "0,1" textline " " bitfld.long 0x24 25. " CMD_CMD_TX_DRVFORCEON ,Command command TX drive force on" "0,1" bitfld.long 0x24 24. " CMD_CMD_TX_E_DCC ,Command command TX E DCC" "0,1" textline " " bitfld.long 0x24 21. " CMD_DQSN_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x24 20. " CMD_DQSN_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 16. " CMD_DQSN_TX_E_DCC ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " CMD_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" textline " " bitfld.long 0x24 13. " CMD_DQSP_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x24 12. " CMD_DQSP_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 10.--11. " CMD_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x24 9. " CMD_DQSP_TX_E_DCC ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled" textline " " bitfld.long 0x24 8. " CMD_DQS_E_IVREF ,Clock internal vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " CMD_DQ_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" textline " " bitfld.long 0x24 5. " CMD_DQ_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x24 4. " CMD_DQ_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 2.--3. " CMD_DQ_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x24 1. " CMD_DQ_TX_E_DCC ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled" textline " " bitfld.long 0x24 0. " CMD_DQ_E_IVREF ,Data internal vref resistor ladder for data I/O[8:0] enable" "Disabled,Enabled" line.long 0x28 "DATA_PAD_TX_CTRL_0,OB Control For Data Pad" bitfld.long 0x28 27. " DATA_DQS_TX_DRVFORCEON ,Data DQS TX drive force on" "0,1" bitfld.long 0x28 26. " DATA_DQ_TX_DRVFORCEON ,Data DQ TX drive force on" "0,1" textline " " bitfld.long 0x28 25. " DATA_CMD_TX_DRVFORCEON ,Data command TX drive force on" "0,1" bitfld.long 0x28 24. " DATA_CMD_TX_E_DCC ,Data command TX E DCC" "0,1" textline " " bitfld.long 0x28 21. " DATA_DQSN_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x28 20. " DATA_DQSN_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 16. " DATA_DQSN_TX_E_DCC ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " DATA_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" textline " " bitfld.long 0x28 13. " DATA_DQSP_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x28 12. " DATA_DQSP_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 10.--11. " DATA_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x28 9. " DATA_DQSP_TX_E_DCC ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled" textline " " bitfld.long 0x28 8. " DATA_DQS_E_IVREF ,Clock internal Vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " DATA_DQ_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" textline " " bitfld.long 0x28 5. " DATA_DQ_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x28 4. " DATA_DQ_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 2.--3. " DATA_DQ_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x28 1. " DATA_DQ_TX_E_DCC ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " DATA_DQ_E_IVREF ,Data internal Vred resistor ladder for data I/O[8:0] enable" "Disabled,Enabled" line.long 0x2C "COMMON_PAD_TX_CTRL_0,OB Control For Bricks" bitfld.long 0x2C 3. " CMD_DQS_TX_BPSDYNEN ,Command DQS TX BPSDYNEN" "0,1" bitfld.long 0x2C 2. " CMD_DQ_TX_BPSDYNEN ,Command DQ TX BPSDYNEN" "0,1" textline " " bitfld.long 0x2C 1. " DATA_DQS_TX_BPSDYNEN ,Data DQS TX BPSDYNEN" "0,1" bitfld.long 0x2C 0. " DATA_DQ_TX_BPSDYNEN ,Data DQ TX BPSDYNEN" "0,1" sif (cpuis("TEGRAX2")) group.long 0xC6C++0x03 line.long 0x00 "DSR_VTTGEN_CTRL_0_0,VTTGEN control register" hexmask.long.byte 0x00 8.--15. 1. " DSR_VTT_VDDA_LOAD ,DSR VTT VDDA Load" bitfld.long 0x00 0.--3. " DSR_VTT_VDDA_LVL ,Level select for VDDA during DSR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0xC70++0x0B line.long 0x00 "DQ_TX_DRV_0,Transmit Drive Strength Control Register For DQ Brick" bitfld.long 0x00 24.--29. " DATA_DQS_TX_DRVDN ,DQS TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DATA_DQS_TX_DRVUP ,DQS TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--13. " DATA_DQ_TX_DRVDN ,DQ TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DATA_DQ_TX_DRVUP ,DQ TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "CA_TX_DRV_0,Transmit Drive Strength Control Register For CA Brick" bitfld.long 0x04 24.--29. " CMD_DQS_TX_DRVDN ,CK TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " CMD_DQS_TX_DRVUP ,CK TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8.--13. " CMD_DQ_TX_DRVDN ,CA TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " CMD_DQ_TX_DRVUP ,CA TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "AUTOCAL_CFG_COMMON_0,Autocal Padmacro Register For Controls Shared Across All IOBRICKs" bitfld.long 0x08 16. " E_CAL_BYPASS_DVFS ,Assert E_CAL_BYPASS for all pad macros" "Disabled,Enabled" bitfld.long 0x08 8.--13. " E_CAL_UPDATE_HIGH ,Number of EMC clocks for which E_CAL_UPDATE pulse is asserted for CK pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 0.--5. " E_CAL_UPDATE_DELAY ,Wait time in EMC clock cycles between CK pad cal ode change and E_CAL_UPDATE assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " group.long 0xCE0++0x0B line.long 0x00 "DDLLCAL_CAL_0,Communicate Calibration Value To The DDLL Slaves" hexmask.long.word 0x00 0.--10. 1. " DDLLCAL_CAL ,Calibration value" line.long 0x04 "DDLL_OFFSET_0,Verify Margins Of The Trained DDLL Values" bitfld.long 0x04 28. " CMD_DDLL_OFFSET_BYTE_QU_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 27. " CMD_DDLL_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " CMD_DDLL_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 25. " CMD_DDLL_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " CMD_DDLL_OFFSET_BYTE_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 23. " CMD_DDLL_OFFSET_BIT_RXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " CMD_DDLL_OFFSET_BIT_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 21. " CMD_DDLL_OFFSET_BIT_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " CMD_DDLL_OFFSET_BIT_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 16. " DATA_DDLL_OFFSET_BYTE_QU_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " DATA_DDLL_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 14. " DATA_DDLL_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " DATA_DDLL_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 12. " DATA_DDLL_OFFSET_BYTE_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " DATA_DDLL_OFFSET_BIT_RXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 10. " DATA_DDLL_OFFSET_BIT_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " DATA_DDLL_OFFSET_BIT_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 8. " DATA_DDLL_OFFSET_BIT_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--5. " DDLL_OFFSET ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DDLL_PERIODIC_OFFSET_0,Support Periodic Training" bitfld.long 0x08 28. " CMD_DDLL_PERIODIC_OFFSET_BYTE_QU_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 27. " CMD_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 26. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 25. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 24. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 23. " CMD_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 21. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 16. " DATA_DDLL_PERIODIC_OFFSET_BYTE_QU_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " DATA_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 14. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 12. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " DATA_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 10. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 8. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0.--5. " DDLL_PERIODIC_OFFSET ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("TEGRAX2")) group.long 0xCEC++0x03 line.long 0x00 "SEL_NEGEDGE_FLOP_0,EMC PMACRO SE _NEGEDGE FLOP 0" bitfld.long 0x00 0. " SEL_NEG_IB ,Select negative edge flop as output" "Disabled,Enabled" endif group.long 0xCF0++0x0F line.long 0x00 "VTTGEN_CTRL_2_0,VTTGEN Control Register" hexmask.long.byte 0x00 16.--23. 1. " VTT_VDDA_LOAD ,VTT VDDA Load" hexmask.long.byte 0x00 8.--15. 1. " VTT_VAUXP_LOAD ,VTT VAUXP Load" textline " " hexmask.long.byte 0x00 0.--7. 1. " VTT_VCLAMP_LOAD ,VTT VCLAMP Load" line.long 0x04 "IB_RXRT_0,IB DQ Receive Path Retiming For Byte0 To Byte3" hexmask.long.word 0x04 0.--10. 1. " IB_RXRT ,Programmed to IB DQ receive path retiming" line.long 0x08 "TRAINING_CTRL_0_0,Configuration Of Pad Macros For Channel 0" bitfld.long 0x08 4. " CH0_TRAINING_DRV_DQS ,Force DQS_t and DQS_c drivers on" "Not force,Force" textline " " bitfld.long 0x08 3. " CH0_TRAINING_E_WRPTR ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled" bitfld.long 0x08 2. " CH0_TRAINING_RX_E_DIRECT_ZI ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override" textline " " bitfld.long 0x08 1. " CH0_TRAINING_TRAIN_QPOP ,Training QPOP" "0,1" bitfld.long 0x08 0. " CH0_TRAINING_ENABLED ,Channel 0 training enable" "Disabled,Enabled" line.long 0x0C "TRAINING_CTRL_1_0,Configuration Of Pad Macros For Channel 1" bitfld.long 0x0C 4. " CH1_TRAINING_DRV_DQS ,Force DQS_t and DQS_c drivers on" "Not force,Force" bitfld.long 0x0C 3. " CH1_TRAINING_E_WRPTR ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " CH1_TRAINING_RX_E_DIRECT_ZI ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override" bitfld.long 0x0C 1. " CH1_TRAINING_TRAIN_QPOP ,Training QPOP" "0,1" textline " " bitfld.long 0x0C 0. " CH1_TRAINING_ENABLED ,Channel 1 training enable" "Disabled,Enabled" tree.end width 27. tree "TRAINING Registers" group.long 0xE00++0x03 line.long 0x00 "CMD_0,Main Register For Launching Training" bitfld.long 0x00 31. " GO ,Start training" "Not started,Started" bitfld.long 0x00 30. " PERIODIC ,Start periodic training" "Not started,Started" bitfld.long 0x00 8. " QUSE_VREF ,Initiates DQS_VREF training" "Not initiated,Initiated" bitfld.long 0x00 7. " RD_VREF ,Initiates IB_DQ_VREF training" "Not initiated,Initiated" textline " " bitfld.long 0x00 6. " WR_VREF ,Initiates OB (WRIRE) DRAM_VREF training" "Not initiated,Initiated" bitfld.long 0x00 5. " CA_VREF ,Initiates CA_VREF training" "Not initiated,Initiated" bitfld.long 0x00 4. " QUSE ,Initiates QUSE training" "Not initiated,Initiated" bitfld.long 0x00 3. " WR ,Initiates WR training" "Not initiated,Initiated" textline " " bitfld.long 0x00 2. " RD ,Initiates RD training" "Not initiated,Initiated" bitfld.long 0x00 1. " CA ,Initiates CA training" "Not initiated,Initiated" bitfld.long 0x00 0. " PRIME ,Writes the custom pattern into MPC register" "Disabled,Enabled" if ((per.l(ad:0x7001E000+0xE04)&0x00010000)==0x00010000) group.long 0xE04++0x03 line.long 0x00 "CTRL_0,MISC Controls For Training Configuration" bitfld.long 0x00 16. " FORCE_DR_TO_SR ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled" bitfld.long 0x00 15. " TR_IN_SELF_REFRESH ,Do training in self refresh" "Disabled,Enabled" bitfld.long 0x00 14. " SWAP_RANK ,Rank to train" "RANK0,RANK1" bitfld.long 0x00 13. " UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " QUSE_MODE ,Quse mode select" "READ_DATA,IFIFO_WRPTR" hexmask.long.byte 0x00 4.--11. 1. " IFIFO_WRPTR ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM" bitfld.long 0x00 3. " RPT_MODE ,Read preamble training mode available in DRAM" "Disabled,Enabled" bitfld.long 0x00 2. " REFRESH_CA ,Allow refreshes in CA training" "Disallow,Allow" textline " " bitfld.long 0x00 1. " REFRESH ,Allow refreshes in all trainings except CA training" "Disallow,Allow" bitfld.long 0x00 0. " ASYNC_UPDATES ,Set to disabled" "Disabled,Enabled" else group.long 0xE04++0x03 line.long 0x00 "CTRL_0,MISC Controls For Training Configuration" bitfld.long 0x00 16. " FORCE_DR_TO_SR ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled" bitfld.long 0x00 15. " TR_IN_SELF_REFRESH ,Do training in self refresh" "Disabled,Enabled" bitfld.long 0x00 14. " SWAP_RANK ,Order in which ranks will be trained" "RANK0 -> RANK1,RANK1 -> RANK0" bitfld.long 0x00 13. " UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " QUSE_MODE ,Quse mode select" "READ_DATA,IFIFO_WRPTR" hexmask.long.byte 0x00 4.--11. 1. " IFIFO_WRPTR ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM" bitfld.long 0x00 3. " RPT_MODE ,Read preamble training mode available in DRAM" "Disabled,Enabled" bitfld.long 0x00 2. " REFRESH_CA ,Allow refreshes in CA training" "Disallow,Allow" textline " " bitfld.long 0x00 1. " REFRESH ,Allow refreshes in all trainings except CA training" "Disallow,Allow" bitfld.long 0x00 0. " ASYNC_UPDATES ,Set to disabled" "Disabled,Enabled" endif rgroup.long 0xE08++0x03 line.long 0x00 "STATUS_0,Read Back For Training Status" bitfld.long 0x00 0.--1. " STATUS ,Training status" "Done,Running,Error,?..." group.long 0xE0C++0x3F line.long 0x00 "QUSE_CORS_CTRL_0,Controls For QUSE Training Cors Sweep" bitfld.long 0x00 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" bitfld.long 0x00 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x00 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x00 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" textline " " bitfld.long 0x00 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" bitfld.long 0x00 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x00 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x00 21. " STEP[1] ,Step[1]" "Zero,One" textline " " bitfld.long 0x00 20. " STEP[0] ,Step[0]" "Zero,One" hexmask.long.word 0x00 10.--18. 1. " MAXIMUM ,Maximum" hexmask.long.word 0x00 0.--8. 1. " MINIMUM ,Minimum" line.long 0x04 "QUSE_FINE_CTRL,Controls For QUSE Training Fine Sweep" bitfld.long 0x04 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" bitfld.long 0x04 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x04 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x04 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" textline " " bitfld.long 0x04 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" bitfld.long 0x04 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x04 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x04 21. " STEP[1] ,Step[1]" "Zero,One" textline " " bitfld.long 0x04 20. " STEP[0] ,Step[0]" "Zero,One" hexmask.long.word 0x04 10.--19. 1. " MAXIMUM ,2's complement" hexmask.long.word 0x04 0.--9. 1. " MINIMUM ,2' complement" line.long 0x08 "QUSE_CTRL_MISC_0,MISC Controls For QUSE Training" hexmask.long.byte 0x08 24.--31. 1. " PATRAM_MAX ,Patram end index" hexmask.long.byte 0x08 16.--23. 1. " PATRAM_MIN ,Patram start index" bitfld.long 0x08 15. " LEVEL[1] ,Level training style select[1]" "Byte,Bit" bitfld.long 0x08 14. " LEVEL[0] ,Level training style select[0]" "Byte,Bit" textline " " bitfld.long 0x08 13. " PATTERN[1] ,Pattern select[1]" "FIFO,MPC" bitfld.long 0x08 12. " PATTERN[0] ,Pattern select[0]" "FIFO,MPC" bitfld.long 0x08 10.--11. " BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four" bitfld.long 0x08 8.--9. " BURST_COUNT[0] ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four" textline " " hexmask.long.byte 0x08 0.--7. 1. " ERR_LIMIT ,Number of errors allowed before considered a failure" line.long 0x0C "WRITE_FINE_CTRL_0,Controls For Write Training Sweep" bitfld.long 0x0C 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" textline " " bitfld.long 0x0C 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x0C 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x0C 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" bitfld.long 0x0C 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" textline " " bitfld.long 0x0C 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x0C 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x0C 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x0C 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.word 0x0C 10.--19. 1. " MAXIMUM ,Maximum" hexmask.long.word 0x0C 0.--9. 1. " MINIMUM ,Minimum" line.long 0x10 "WRITE_CTRL_MISC_0,MISC Controls For Write Trainings Sweep" hexmask.long.byte 0x10 24.--31. 1. " PATRAM_MAX ,Patram end index" hexmask.long.byte 0x10 16.--23. 1. " PATRAM_MIN ,Patram start index" bitfld.long 0x10 15. " LEVEL[1] ,Level training style select[1]" "Byte,Bit" bitfld.long 0x10 14. " LEVEL[0] ,Level training style select[0]" "Byte,Bit" textline " " bitfld.long 0x10 13. " PATTERN[1] ,Pattern select[1]" "FIFO,MPC" bitfld.long 0x10 12. " PATTERN[0] ,Pattern select[0]" "FIFO,MPC" bitfld.long 0x10 10.--11. " BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four" bitfld.long 0x10 8.--9. " BURST_COUNT[0] ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four" textline " " hexmask.long.byte 0x10 0.--7. 1. " ERR_LIMIT ,Number of errors allowed before considered a failure" line.long 0x14 "WRITE_VREF_CTRL_0,Controls For Write-Vref Training Sweep" bitfld.long 0x14 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x14 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x14 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x14 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.byte 0x14 8.--15. 1. " MAXIMUM ,Maximum" hexmask.long.byte 0x14 0.--7. 1. " MINIMUM ,Minimum" line.long 0x18 "READ_FINE_CTRL_0,Controls For Read Training Sweep" bitfld.long 0x18 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" textline " " bitfld.long 0x18 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x18 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x18 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" bitfld.long 0x18 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" textline " " bitfld.long 0x18 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x18 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x18 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x18 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.word 0x18 10.--19. 1. " MAXIMUM ,Maximum" hexmask.long.word 0x18 0.--9. 1. " MINIMUM ,Minimum" line.long 0x1C "READ_CTRL_MISC_0,MISC Controls For Read Trainings Sweep" hexmask.long.byte 0x1C 24.--31. 1. " PATRAM_MAX ,Patram end index" hexmask.long.byte 0x1C 16.--23. 1. " PATRAM_MIN ,Patram start index" bitfld.long 0x1C 15. " LEVEL[1] ,Level training style select[1]" "Byte,Bit" bitfld.long 0x1C 14. " LEVEL[0] ,Level training style select[0]" "Byte,Bit" textline " " bitfld.long 0x1C 13. " PATTERN[1] ,Pattern select[1]" "FIFO,MPC" bitfld.long 0x1C 12. " PATTERN[0] ,Pattern select[0]" "FIFO,MPC" bitfld.long 0x1C 10.--11. " BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four" bitfld.long 0x1C 8.--9. " BURST_COUNT[0] ,Number of reads in each STEP_LN[0]" ",,,Four" textline " " hexmask.long.byte 0x1C 0.--7. 1. " ERR_LIMIT ,Number of errors allowed before considered a failure" line.long 0x20 "READ_VREF_CTRL_0,Controls For Read-Vref Trainings Sweep" bitfld.long 0x20 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x20 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x20 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x20 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.byte 0x20 8.--15. 1. " MAXIMUM ,Maximum" hexmask.long.byte 0x20 0.--7. 1. " MINIMUM ,Minimum" line.long 0x24 "CA_FINE_CTRL_0,Controls For CA Training Sweep" bitfld.long 0x24 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" textline " " bitfld.long 0x24 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x24 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x24 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" bitfld.long 0x24 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" textline " " bitfld.long 0x24 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x24 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x24 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x24 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.word 0x24 10.--19. 1. " MAXIMUM ,Maximum" hexmask.long.word 0x24 0.--9. 1. " MINIMUM ,Minimum" line.long 0x28 "CA_CTRL_MISC_0,MISC Controls For CA Trainings Sweep" hexmask.long.byte 0x28 24.--31. 1. " PATRAM_MAX ,Patram end index" hexmask.long.byte 0x28 16.--23. 1. " PATRAM_MIN ,Patram start index" bitfld.long 0x28 15. " LEVEL[1] ,Level training style select[1]" "Byte,Bit" bitfld.long 0x28 14. " LEVEL[0] ,Level training style select[0]" "Byte,Bit" textline " " bitfld.long 0x28 13. " PATTERN[1] ,Pattern select[1]" "FIFO,MPC" bitfld.long 0x28 12. " PATTERN[0] ,Pattern select[0]" "FIFO,MPC" bitfld.long 0x28 10.--11. " BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four" bitfld.long 0x28 8.--9. " BURST_COUNT[0] ,Number of reads in each STEP_LN[0]" ",,,Four" textline " " hexmask.long.byte 0x28 0.--7. 1. " ERR_LIMIT ,Number of errors allowed before considered a failure" line.long 0x2C "CA_CTRL_MISC1_0,Misc Controls For CA Training Sweep" hexmask.long.byte 0x2C 0.--7. 1. " SKIP_CNT ,Number of NOPs between 2 CA training reads" line.long 0x30 "CA_VREF_CTRL_0,Controls For CA-Vref Training" bitfld.long 0x30 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x30 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x30 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x30 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.byte 0x30 8.--15. 1. " MAXIMUM ,Maximum" hexmask.long.byte 0x30 0.--7. 1. " MINIMUM ,Minimum" line.long 0x34 "CA_TADR_CTRL_0,Controls For TADR Sweep" bitfld.long 0x34 31. " TADR_ENABLE ,Set to disabled" "Disabled,?..." hexmask.long.byte 0x34 12.--19. 1. " TADR_MAX ,Maximum tADR allowed in tCK" hexmask.long.word 0x34 0.--11. 1. " TADR_SETTING ,CA BRLSHFT + CA trimmer during tADR training" line.long 0x38 "SETTLE_0,Controls Settle Time For Delay Controls In MCCLK" hexmask.long.byte 0x38 24.--31. 1. " APPLY_DELAY ,Wait time after issuing a training priv request" hexmask.long.byte 0x38 16.--23. 1. " PRIV_DELAY ,Wait time after issuing a training priv request" hexmask.long.byte 0x38 8.--15. 1. " SHORT_TRIMMER ,Settle time for short trimmer" hexmask.long.byte 0x38 0.--7. 1. " LONG_TRIMMER ,Settle time for long trimmer" line.long 0x3C "DEBUG_CTRL_0,Controls To Select Which Debug Information Should Be Output In Debug DQ* Registers" bitfld.long 0x3C 24.--27. " WINDOW_LIMIT ,Threshold to determine how many windows to report in debug registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x3C 0.--7. 1. " SELECT ,Specifies output on DQ registers" group.long 0xE5C++0x13 line.long 0x00 "MPC_0,MPC-RD Registers Data" hexmask.long.word 0x00 16.--31. 1. " INVERT_PATTERN ,Invert pattern" hexmask.long.word 0x00 0.--15. 1. " DATA ,Data" line.long 0x04 "PATRAM_CTRL_0,Register To Write Pattern RAM" bitfld.long 0x04 31. " WRITE ,Trigger a write into pattern RAM with data supplied by PATRAM_DATA_* registers" "Not triggered,Triggered" bitfld.long 0x04 16.--19. " FORMAT ,Specifies format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 0.--7. 0x01 " SELECT_OFFSET ,Location to write in pattern RAM" line.long 0x08 "PATRAM_DQ_0,DQ Data To Write Into Pattern RAM" line.long 0x0C "PATRAM_DMI_0,DMI Data To Write Into Pattern RAM" line.long 0x10 "VREF_SETTLE_0,Controls For Settle Time For Vref In MCCLK" hexmask.long.word 0x10 16.--31. 1. " OB ,Settle time for WRITE|CA Vrefs" hexmask.long.word 0x10 0.--15. 1. " IB ,Settle time for READ|QUSE Vrefs" sif (cpuis("TEGRAX2")) group.long 0xE98++0x03 line.long 0x00 "RW_OFFSET_IB_BYTE0_0,EMC Training RW Offset IB Byte0 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xE9C++0x03 line.long 0x00 "RW_OFFSET_IB_BYTE1_0,EMC Training RW Offset IB Byte1 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEA0++0x03 line.long 0x00 "RW_OFFSET_IB_BYTE2_0,EMC Training RW Offset IB Byte2 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEA4++0x03 line.long 0x00 "RW_OFFSET_IB_BYTE3_0,EMC Training RW Offset IB Byte3 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEA8++0x03 line.long 0x00 "RW_OFFSET_IB_MISC_0,EMC training RW Offset IB MISC 0" bitfld.long 0x00 12.--15. " DBI3 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DBI2 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DBI1 ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DBI0 ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEAC++0x03 line.long 0x00 "RW_OFFSET_OB_BYTE0_0,EMC training RW Offset OB BYTE0 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEB0++0x03 line.long 0x00 "RW_OFFSET_OB_BYTE1_0,EMC training RW Offset OB BYTE1 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEB4++0x03 line.long 0x00 "RW_OFFSET_OB_BYTE2_0,EMC training RW Offset OB BYTE2 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEB8++0x03 line.long 0x00 "RW_OFFSET_OB_BYTE3_0,EMC training RW Offset OB BYTE3 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEBC++0x03 line.long 0x00 "RW_OFFSET_OB_MISC_0,EMC training RW Offset OB MISC 0" bitfld.long 0x00 12.--15. " DBI3 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DBI2 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DBI1 ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DBI0 ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif rgroup.long 0xEC0++0x07 line.long 0x00 "OPT_CA_VREF_0,Read Back For CA VREF Optimal Vref Results" hexmask.long.byte 0x00 24.--31. 1. " RANK1_SUB_PARTITION1 ,CA_VREF optimal for RANK1 SUB_PARTITION1 for each channel" hexmask.long.byte 0x00 16.--23. 1. " RANK1_SUB_PARTITION0 ,CA_VREF optimal for RANK1 SUB_PARTITION0 for each channel" textline " " hexmask.long.byte 0x00 8.--15. 1. " RANK0_SUB_PARTITION1 ,CA_VREF optimal for RANK0 SUB_PARTITION1 for each channel" hexmask.long.byte 0x00 0.--7. 1. " RANK0_SUB_PARTITION0 ,CA_VREF optimal for RANK0 SUB_PARTITION0 for each channel" line.long 0x04 "OPT_DQ_OB_VREF_0,Read Back For OB-DQ VREF Optimal Vref Results" hexmask.long.byte 0x04 24.--31. 1. " RANK1_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION1 for each channel" hexmask.long.byte 0x04 16.--23. 1. " RANK1_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION0 for each channel" textline " " hexmask.long.byte 0x04 8.--15. 1. " RANK0_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION1 for each channel" hexmask.long.byte 0x04 0.--7. 1. " RANK0_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION0 for each channel" group.long 0xED0++0x03 line.long 0x00 "QUSE_VREF_CTRL_0,Controls For Read-DQS-Vref Trainings Sweep" bitfld.long 0x00 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x00 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x00 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x00 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM ,Maximum" hexmask.long.byte 0x00 0.--7. 1. " MINIMUM ,Minimum" tree.end width 0x0B tree.end tree "MC1" base ad:0x7001D000 width 19. group.long 0x00++0x07 line.long 0x00 "INTSTATUS_0,Interrupt Status Register" bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INT ,Generalized carve out interrupt" "No interrupt,Interrupt" bitfld.long 0x00 16. " DECERR_MTS_INT ,Access violation on MTS carve out region in the memory controller" "No interrupt,Interrupt" bitfld.long 0x00 13. " SECERR_SEC_INT ,The request violated the SEC carve out requirements" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " DECERR_VPR_INT ,The request violated the VPR requirements" "No interrupt,Interrupt" bitfld.long 0x00 11. " INVALID_APB_ASID_UPDATE_INT ,ASID update through APB interface resulted in an error" "No interrupt,Interrupt" bitfld.long 0x00 10. " INVALID_SMMU_PAGE_INT ,Address translation error" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " ARBITRATION_EMEM_INT ,Warning that a pending request has reached the deadlock-prevention slack threshold" "No interrupt,Interrupt" bitfld.long 0x00 8. " SECURITY_VIOLATION_INT ,Address translation error non secure access was attempted to a secured region" "No interrupt,Interrupt" bitfld.long 0x00 6. " DECERR_EMEM_INT ,Address translation error EMEM address decode error" "No interrupt,Interrupt" line.long 0x04 "INTMASK_0,Interrupt Mask Register" bitfld.long 0x04 17. " DECCER_GENERALIZED_CARVEOUT_INTMASK ,Generalized carve out interrupt interrupt mask" "Masked,Unmasked" bitfld.long 0x04 16. " DECERR_MTS_INTMASK ,Access violation on MTS carve out region in the memory controller interrupt mask" "Masked,Unmasked" bitfld.long 0x04 13. " SECERR_SEC_INTMASK ,The request violated the SEC carve out requirements interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x04 12. " DECERR_VPR_INTMASK ,The request violated the VPR requirements interrupt mask" "Masked,Unmasked" bitfld.long 0x04 11. " INVALID_APB_ASID_UPDATE_INTMASK ,ASID update through APB interface resulted in an error interrupt mask" "Masked,Unmasked" bitfld.long 0x04 10. " INVALID_SMMU_PAGE_INTMASK ,Address translation error interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x04 9. " ARBITRATION_EMEM_INTMASK ,Warning that a pending request has reached the deadlock-prevention slack threshold interrupt mask" "Masked,Unmasked" bitfld.long 0x04 8. " SECURITY_VIOLATION_INTMASK ,Non secure access was attempted to a secured region interrupt mask" "Masked,Unmasked" bitfld.long 0x04 6. " DECERR_EMEM_INTMASK ,EMEM address decode error interrupt mask" "Masked,Unmasked" textline " " sif (cpuis("TEGRAX2")) group.long 0xEC4++0x03 line.long 0x00 "INTPRIORITY_0,Interrupt Priority Register" bitfld.long 0x00 19. " WCAM_ERR_INTPRIORITY ,WCAM detects an error in use of ENCR enable ENKR REY SET or ECC enable interrupt mask" "Masked,Unmasked" bitfld.long 0x00 18. " SCRUB_ECC_WR_ACK_INTPRIORITY ,Prevents SCRUB ECC WR ACK interrupt from triggering a high-priority interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INTPRIORITY ,Generalized carve out interrupt priority interrupt mask" "Masked,Unmasked" bitfld.long 0x00 16. " DECERR_MTS_INTPRIORITY ,DECERR MTS Interrupt priority interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 13. " SECERR_SEC_INTPRIORITY ,Prevents SECERR secure interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" bitfld.long 0x00 12. " DECERR_VPR_INTPRIORITY ,Prevents DECERR VPR interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 11. " NVALID_APB_ASID_UPDATE_INTPRIORITY ,Prevents invalid APB ASID update interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" bitfld.long 0x00 10. " INVALID_SMMU_PAGE_INTPRIORITY ,Prevents INVALID SMMU PAGE interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 9. " ARBITRATION_EMEM_INTPRIORITY ,Prevents ARBITRATION EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" bitfld.long 0x00 8. " SECURITY_VIOLATION_INTPRIORITY ,Prevents security violation interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 6. " DECERR_EMEM_INTPRIORITY ,Prevents DECERR EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked" textline " " endif if ((per.l(ad:0x7001D000+0x08)&0x70000000)==0x60000000) rgroup.long 0x08++0x03 line.long 0x00 "ERR_STATUS_0,Error Data Capture Status" bitfld.long 0x00 28.--30. " ERR_TYPE ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..." bitfld.long 0x00 27. " ERR_INVALID_SMMU_PAGE_READABLE ,Invalid SMMU page error page permission was readable" "Not readable,Readable" textline " " bitfld.long 0x00 26. " ERR_INVALID_SMMU_PAGE_WRITABLE ,Invalid SMMU page error page permission was writeable" "Not writeable,Writeable" bitfld.long 0x00 25. " ERR_INVALID_SMMU_PAGE_NONSECURE ,Invalid SMMU page error page permission was non-secure" "Secure,Non-secure" textline " " bitfld.long 0x00 20.--21. " ERR_ADR_HI ,Higher address bits of erring address whose lower bits are available in error ADR register" "b00,b01,b10,b11" bitfld.long 0x00 18. " ERR_SWAP ,Swap bit for transaction" "0,1" textline " " bitfld.long 0x00 17. " ERR_SECURITY ,Transaction security" "Non secure,Secure" bitfld.long 0x00 16. " ERR_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_ADR1 ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111" hexmask.long.byte 0x00 0.--7. 1. " ERR_ID ,Client identifier of the access that caused the error" else rgroup.long 0x08++0x03 line.long 0x00 "ERR_STATUS_0,Memory Controller Error Data Capture Status" bitfld.long 0x00 28.--30. " ERR_TYPE ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..." textline " " textline " " bitfld.long 0x00 20.--21. " ERR_ADR_HI ,Higher address bits of erring address whose lower bits are available in ERR_ADR register" "b00,b01,b10,b11" bitfld.long 0x00 18. " ERR_SWAP ,Swap bit for transaction" "0,1" textline " " bitfld.long 0x00 17. " ERR_SECURITY ,Transaction security" "Non secure,Secure" bitfld.long 0x00 16. " ERR_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_ADR1 ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111" hexmask.long.byte 0x00 0.--7. 1. " ERR_ID ,Client identifier of the access that caused the error" endif rgroup.long 0x0C++0x03 line.long 0x00 "ERR_ADR_0,Error Data Capture Address" textline " " sif (!cpuis("TEGRAX2")) group.long 0x10++0x13 line.long 0x00 "SMMU_CONFIG_0,SMMU Enable Register" bitfld.long 0x00 0. " SMMU_ENABLE ,SMMU enable" "Disabled,Enabled" line.long 0x04 "SMMU_TLB_CONFIG_0,Translation Lookaside Buffer Configuration Register" bitfld.long 0x04 31. " TLB_STATS_ENABLE ,Enable TLB hit and miss counters" "Disabled,Enabled" bitfld.long 0x04 30. " TLB_STATS_TEST ,Set stats registers to all 1s" "Disabled,Enabled" bitfld.long 0x04 29. " TLB_HIT_UNDER_MISS ,Allow hits to pass misses in the TLB" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " TLB_ROUND_ROBIN_ARBITRATION ,Forces round robin arbitration between TLB hit and miss FIFOs" "Disabled,Enabled" bitfld.long 0x04 0.--5. " TLB_ACTIVE_LINES ,Set the number of active lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "SMMU_PTC_CONFIG_0,Page Table Cache Configuration Register" bitfld.long 0x08 31. " PTC_STATS_ENABLE ,Enable PTC hit and miss counters" "Disabled,Enabled" bitfld.long 0x08 30. " PTC_STATS_TEST ,Set stats registers to all 1s" "Disabled,Enabled" bitfld.long 0x08 29. " PTC_CACHE_ENABLE ,Enable the PTC cache" "Disabled,Enabled" textline " " bitfld.long 0x08 24.--27. " PTC_REQ_LIMIT ,Limit outstanding PTC fill requests to the DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 8.--11. 1. " PTC_LINE_MASK ,XOR pattern for line generation" hexmask.long.byte 0x08 0.--6. 1. " PTC_INDEX_MAP ,XOR pattern for tag generation" line.long 0x0C "SMMU_PTB_ASID_0,Page Table Base ASID Register" hexmask.long.byte 0x0C 0.--6. 1. " CURRENT_ASID ,ASID used to address SMMUT PTB register" line.long 0x10 "SMMU_PTB_DATA_0,Page Table Base Data Register" bitfld.long 0x10 31. " ASID_READABLE ,Allow reads for this ASID" "Not allowed,Allowed" bitfld.long 0x10 30. " ASID_WRITEABLE ,Allow writes for this ASID" "Not allowed,Allowed" textline " " bitfld.long 0x10 29. " ASID_NONSECURE ,Allow non-secure access for this ASID" "Not allowed,Allowed" hexmask.long.tbyte 0x10 0.--21. 1. " ASID_PDE_BASE ,Pointer to page of PDEs" group.long 0x30++0x07 line.long 0x00 "SMMU_TLB_FLUSH_0,Translation Lookaside Buffer Flush Register" bitfld.long 0x00 31. " TLB_FLUSH_ASID_MATCH ,Only entries matching TLB flush ASID are flushed" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TLB_FLUSH_ASID ,ASID to match" hexmask.long.tbyte 0x00 2.--19. 1. " TLB_FLUSH_VA_GROUP ,Virtual address to match for group flashes" textline " " bitfld.long 0x00 0.--1. " TLB_FLUSH_VA_MATCH ,Flushing control" "All,,Section,Group" line.long 0x04 "SMMU_PTC_FLUSH_0,Page Table Cache Flush Register" hexmask.long 0x04 4.--31. 0x10 " PTC_FLUSH_ADR ,Physical address of PTE group" bitfld.long 0x04 3. " PTC_NO_WAIT_IDLE_FLUSH ,Set bit to immediately flush without waiting for hit FIFO to go idle" "Disabled,Enabled" bitfld.long 0x04 0. " PTC_FLUSH_TYPE ,Flushing control (Flush entire PTC ADR,or only the one addressed by ADR)" "All,Adr" endif textline " " width 37. if (((per.l(ad:0x7001D000+0x664))&0x01)==0x00) group.long 0x50++0x0F line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration" bitfld.long 0x00 31. " EMEM_BOM ,Base of DRAM memory in GBs" "B2GB,B0GB" hexmask.long.word 0x00 0.--13. 1. " EMEM_SIZE_MB ,External memory aperture size in megabytes" line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System" bitfld.long 0x04 0. " EMEM_NUMDEV ,Number of populated DRAM devices" "N1,N2" line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0" bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..." bitfld.long 0x08 8.--9. " EMEM_DEV0_BANKWIDTH ,Width of bank address of the first attached DRAM device" ",,W2,W3" bitfld.long 0x08 0.--2. " EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..." line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1" bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..." bitfld.long 0x0C 8.--9. " EMEM_DEV1_BANKWIDTH ,Width of bank address of the first attached DRAM device" ",,W2,W3" bitfld.long 0x0C 0.--2. " EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..." sif (!cpuis("TEGRAX2")) group.long 0x60++0x03 line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask" hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK ,EMEM channel mask bits" else group.long 0xDF8++0x07 line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration" bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE ,Selects which memory controller channels are enabled for normal read/writes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register" hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1 ,Mask is ANDed with address and the resulting value is XORed to a single bit" endif group.long 0x64++0x0B line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0 ,EMEM bank mask bits 0" line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1 ,EMEM bank mask bits 1" line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2 ,EMEM bank mask bits 2" else rgroup.long 0x50++0x0F line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration" bitfld.long 0x00 31. " EMEM_DOM ,Base of DRAM memory in GBs" "B2GB,B0GB" hexmask.long.word 0x00 0.--13. 1. " EMEM_SIZE_MB ,External memory aperture size in megabytes" line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System" bitfld.long 0x04 0. " EMEM_NUMDEV ,Number of populated DRAM devices" "N1,N2" line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0" bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..." bitfld.long 0x08 8.--9. " EMEM_DEV0_BANKWIDTH ,Width of bank address of the first attached DRAM device" ",,W2,W3" bitfld.long 0x08 0.--2. " EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..." line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1" bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..." bitfld.long 0x0C 8.--9. " EMEM_DEV1_BANKWIDTH ,Width of bank address of the first attached DRAM device" ",,W2,W3" bitfld.long 0x0C 0.--2. " EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..." sif (!cpuis("TEGRAX2")) rgroup.long 0x60++0x03 line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask" hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK ,EMEM channel mask bits" else rgroup.long 0xDF8++0x07 line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration Channel Select Mask" bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE ,Selects memory controller channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register" hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1 ,EMEM channel mask bits" endif rgroup.long 0x64++0x0B line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0 ,EMEM bank mask bits 0" line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1 ,EMEM bank mask bits 1" line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask" hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2 ,EMEM bank mask bits 2" endif group.long 0x70++0x07 line.long 0x00 "SECURITY_CFG0_0,Secure Region Configuration For Base" hexmask.long.word 0x00 20.--31. 0x10 " SECURITY_BOM ,Base of the secured region" line.long 0x04 "SECURITY_CFG1_0,Secure Region Configuration For Bound" hexmask.long.word 0x04 0.--12. 1. " SECURITY_SIZE_MB ,Size in MB of the secured region" textline " " sif (cpuis("TEGRAX2")) group.long 0x9BC++0x07 line.long 0x00 "SECURITY_CFG3_0,Security Config3 0" bitfld.long 0x00 0.--1. " SECURITY_BOM_HI ,SECURITY BOM HI" "0,1,2,3" endif group.long 0x90++0x37 line.long 0x00 "EMEM_ARB_CFG_0,External Memory Arbitration Configuration" hexmask.long.byte 0x00 16.--20. 1. " EXTRA_TICKS_PER_UPDATE ,Number of extra ticks to add every deadline timer update" hexmask.long.word 0x00 0.--8. 1. " CYCLES_PER_UPDATE ,Number of MCCLK cycles per deadline timer update" line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_0,External Memory Arbitration Configuration For Outstanding Request Limiter" bitfld.long 0x04 31. " LIMIT_OUTSTANDING ,Total number of requests in the arbitration is limited to the value in ARB_MAX_OUTSTANDING" "Disabled,Enabled" bitfld.long 0x04 30. " LIMIT_DURING_HOLDOFF_OVERRIDE ,Override the limiting of transactions" "Disabled,Enabled" textline " " hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT ,Current number of outstanding requests" hexmask.long.word 0x04 0.--8. 1. " ARB_MAX_OUTSTANDING ,Maximum number of requests" textline " " line.long 0x08 "EMEM_ARB_TIMING_RCD_0,External Memory Arbitration Configuration For DRAM Timing TRCD" bitfld.long 0x08 0.--5. " RCD ,Minimum number of cycles between activate commands to the same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "EMEM_ARB_TIMING_RP_0,External Memory Arbitration Configuration For DRAM Timing TRP" hexmask.long.byte 0x0C 0.--6. 1. " RP ,Minimum number of cycles between an internal precharge and activate command to the same bank" line.long 0x10 "EMEM_ARB_TIMING_RC_0,External Memory Arbitration Configuration For DRAM Timing TRC" hexmask.long.byte 0x10 0.--7. 1. " RC ,Minimum number of cycles between activate commands to the same bank" line.long 0x14 "EMEM_ARB_TIMING_RAS_0,External Memory Arbitration Configuration For DRAM Timing TRAS" hexmask.long.byte 0x14 0.--6. 1. " RAS ,Minimum number of cycles between activate and precharge command to the same bank" line.long 0x18 "EMEM_ARB_TIMING_FAW_0,External Memory Arbitration Configuration For DRAM Timing TFAW" bitfld.long 0x18 0.--5. " FAW ,tFAW setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "EMEM_ARB_TIMING_RRD_0,External Memory Arbitration Configuration For DRAM Timing TRRD" bitfld.long 0x1C 0.--4. " RRD ,Minimum number of cycles between activate command and activate command to a different bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "EMEM_ARB_TIMING_RAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TRAP2PRE" hexmask.long.byte 0x20 0.--6. 1. " RAP2PRE ,Minimum number of cycles between read and internal precharge commands" line.long 0x24 "EMEM_ARB_TIMING_WAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TWAP2PRE" hexmask.long.byte 0x24 0.--6. 1. " WAP2PRE ,Minimum number of cycles between write and internal precharge commands" line.long 0x28 "EMEM_ARB_TIMING_R2R_0,External Memory Arbitration Configuration For DRAM Timing TR2R" bitfld.long 0x28 0.--4. " R2R ,Minimum number of cycles between consecutive read commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "EMEM_ARB_TIMING_W2W_0,External Memory Arbitration Configuration For DRAM Timing TW2W" bitfld.long 0x2C 0.--4. " W2W ,Minimum number of cycles between consecutive write commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "EMEM_ARB_TIMING_R2W_0,External Memory Arbitration Configuration For DRAM Timing TR2W" hexmask.long.byte 0x30 0.--6. 1. " R2W ,Number of cycles to turn the bus from reads to writes" line.long 0x34 "EMEM_ARB_TIMING_W2R_0,External Memory Arbitration Configuration For DRAM Timing TW2R" hexmask.long.byte 0x34 0.--6. 1. " W2R ,Number of cycles to turn the bus from reads to writes" group.long 0xD0++0x0F line.long 0x00 "EMEM_ARB_DA_TURNS_0,External Memory Arbitration Configuration For Direction Arbiter Turns 0" hexmask.long.byte 0x00 24.--31. 1. " W2R_TURN ,Bubbles produced by a write to read bus turn" hexmask.long.byte 0x00 16.--23. 1. " R2W_TURN ,Bubbles produced by a read to write bys turn" hexmask.long.byte 0x00 8.--15. 1. " W2W_TURN ,Bubbles produced by a write to write (other device) bus turn" textline " " hexmask.long.byte 0x00 0.--7. 1. " R2R_TURN ,Bubbles produced by a read to read (other device) bus turn" line.long 0x04 "EMEM_ARB_DA_COVERS_0,External Memory Arbitration Configuration For Direction Arbiter Covers" hexmask.long.byte 0x04 16.--23. 1. " RCD_W_COVER ,Cost to cover the activate-to-write delay" hexmask.long.byte 0x04 8.--15. 1. " RCD_R_COVER ,Cost to cover the activate-to-read delay" hexmask.long.byte 0x04 0.--7. 1. " RC_COVER ,Cost to cover the activate-to-activate delay" textline " " line.long 0x08 "EMEM_ARB_MISC0_0,External Memory Arbitration Configuration For Miscellaneous Thresholds" bitfld.long 0x08 28.--30. " ATOMS_PER_DVFS_PULSE ,Atoms per DVFS pulse setting" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. " MC_EMC_SAME_FREQ ,Memory controller data request frequency is the half/same as EMC" "EMC/2,Same as EMC" textline " " bitfld.long 0x08 21.--26. " EXPIRING_SOON_SLACK_THRESHOLD ,Slack threshold below which an isochronous request is considered to be expiring soon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--20. " PRIORITY_INVERSION_ISO_THRESHOLD ,Maximum number of unexpired or expired and not synchronous requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 15. " EMC_REQ_B2B_XFER ,Allow EMC transactions on back to back clocks regardless of EMC consumption bandwidth" "Disabled,Enabled" hexmask.long.byte 0x08 8.--14. 1. " PRIORITY_INVERSION_THRESHOLD ,Maximum number of unexpired requests" textline " " hexmask.long.byte 0x08 0.--7. 1. " B2AA_HOLDOFF_THRESHOLD ,Activation hold off threshold" line.long 0x0C "EMEM_ARB_MISC1_0,External Memory Arbitration Configuration For Miscellaneous Threshold 1" bitfld.long 0x0C 28.--31. " DEADLOCK_PREVENTATION_SLACK_THRESHOLD ,Deadlock prevention slack threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--25. " REFRESH_ACK_THRESHOLD_USAGE ,Threshold's select for refresh-acknowledge signal" "Normal,ISO,None,?..." textline " " bitfld.long 0x0C 21.--23. " EXPIRING_SOON_SLACK_THRESHOLD_PD ,Slack threshold below which an isochronous request is considered to be expiring soon" "ZERO_TICKS,ONE_TICK,TWO_TICKS,FOUR_TICKS,EIGHT_TICKS,Use SLACK_THRESHOLD,?..." hexmask.long.word 0x0C 4.--12. 1. " ALT_DEADLOCK_PREVENTION_SLACK_THRESHOLD ,Use the absolute value of deadlock prevention slack threshold instead of 2^n format" textline " " bitfld.long 0x0C 3. " COMBINED_INTERRUPT_MODE ,Combined interrupt mode" "Independent,Shadowed" bitfld.long 0x0C 2. " BLOCK_LP_CPU_WR_IF_SMMU_INP_HP ,Low priority CPU writes blocked while SMMU output is high priority" "Not blocked,Blocked" textline " " bitfld.long 0x0C 1. " ALLOW_BCA_HOLDOFF_WHN_EXP ,Allows BCA hold off to occur even when expired requests are present" "Disabled,Enabled" bitfld.long 0x0C 0. " BLOCK_LP_CPU_RD_IF_SMMU_INP_HP ,Low priority CPU reads get blocked" "Disabled,Enabled" group.long 0xC8++0x03 line.long 0x00 "EMEM_ARB_MISC2_0,External Memory Arbitration Configuration For Miscellaneous Threshold 2" bitfld.long 0x00 0. " ALLOW_B2B_TA_REQS ,Transaction arbiter grant requests on back-to-back cycles enable" "Disabled,Enabled" group.long 0xE0++0x07 line.long 0x00 "EMEM_ARB_RING1_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle" bitfld.long 0x00 16.--20. " RING1_THROTTLE_CYCLES_HIGH ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RING1-THROTTLE_CYCLES_LOW ,Cycles of throttle when transaction count is below threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EMEM_ARB_RING3_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle" bitfld.long 0x04 0.--4. " RING3_THROTTLE_CYCLES ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " sif (cpuis("TEGRAX2")) group.long 0x6B0++0x03 line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,External Memory Arbitration Configuration Snap Arbiter Throttle " bitfld.long 0x00 31. " NISO_THROTTLE_DISABLE_CNT_EVENT ,NISO throttle disable count event" "Disabled,Enabled" bitfld.long 0x00 16.--21. " RING1_THROTTLE_CYCLES_HIGH ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--5. " NISO_THROTTLE_CYCLES ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x664++0x0B line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0,Access Control Bit For EMEM Configuration Registers" bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS ,EMEM configuration write access" "Disabled,Enabled" line.long 0x04 "TZ_SECURITY_CTRL_0,TrustZone Security Control Register" bitfld.long 0x04 0. " CPU_STRICT_TZ_APERTURE_CHECK ,CPU STRICT TZ aperture check" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Highest Ring Outstanding Request Limiter" bitfld.long 0x08 31. " LIMIT_OUTSTANDING_RING3 ,Limit outstanding ring3" "Disabled,Enabled" bitfld.long 0x08 30. " LIMIT_DURING_HOLDOFF_OVERRIDE_RING3 ,Limit during hold off override ring3" "Disabled,Enabled" textline " " hexmask.long.word 0x08 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3 ,Current number of outstanding requests" hexmask.long.word 0x08 0.--8. 1. " ARB_MAX_OUTSTANDING_RING3 ,ARB maximum outstanding ring3" group.long 0x6B4++0x0B line.long 0x00 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,External Memory Arbitration Configuration:Outstanding Request Limiter" bitfld.long 0x00 31. " LIMIT_OUTSTANDING_NISO ,Limit outstanding NISO" "Disabled,Enabled" bitfld.long 0x00 30. " LIMIT_DURING_HOLDOFF_OVERRIDE_NISO ,Limit during hold off override NISO" "Disabled,Enabled" textline " " hexmask.long.word 0x00 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO ,Current number of outstanding requests" hexmask.long.word 0x00 0.--8. 1. " ARB_MAX_OUTSTANDING_NISO ,The maximum number of requests allowed in the arbiter" line.long 0x04 "EMEM_ARB_NISO_THROTTLE_MASK_0,External Memory Arbitration Configuration:Throttle Mask" bitfld.long 0x04 29. " NISO_THROTTLE_MASK_VICPC ,NISO throttle mask VICPC" "Disabled,Enabled" bitfld.long 0x04 28. " NISO_THROTTLE_MASK_USBD ,NISO throttle mask USBD" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " NISO_THROTTLE_MASK_HOST ,NISO throttle mask HOST" "Disabled,Enabled" bitfld.long 0x04 23. " NISO_THROTTLE_MASK_SD ,NISO throttle mask SD" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " NISO_THROTTLE_MASK_GK ,NISO throttle mask GK" "Disabled,Enabled" bitfld.long 0x04 19. " NISO_THROTTLE_MASK_MSE ,NISO throttle mask MSE" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " NISO_THROTTLE_MASK_USBX ,NISO throttle mask USBX" "Disabled,Enabled" bitfld.long 0x04 9. " NISO_THROTTLE_MASK_SAX ,NISO throttle mask SAX" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " NISO_THROTTLE_MASK_PCX ,NISO throttle mask PCX" "Disabled,Enabled" bitfld.long 0x04 3. " NISO_THROTTLE_MASK_AVP ,NISO throttle mask AVP" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " NISO_THROTTLE_MASK_APB ,NISO throttle mask APB" "Disabled,Enabled" bitfld.long 0x04 1. " NISO_THROTTLE_MASK_AHB ,NISO throttle mask AHB" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_RING0_THROTTLE_MASK_0,External Memory Arbitration Configuration:Ring0 Input Throttle Mask" bitfld.long 0x08 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,ARB outstanding count above SMMU" "Disabled,Enabled" bitfld.long 0x08 15. " RING0_THROTTLE_MASK_RING1_OUTPUT ,Ring0 throttle mask ring1 output" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " RING0_THROTTLE_MASK_RING1 ,Ring0 throttle mask ring1" "Disabled,Enabled" bitfld.long 0x08 6. " RING0_THROTTLE_MASK_FTOP ,Ring0 throttle mask FTOP" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " RING0_THROTTLE_MASK_PTC ,Ring0 throttle mask PTC" "Disabled,Enabled" bitfld.long 0x08 0. " RING0_THROTTLE_MASK_MPCORER ,Ring0 throttle mask MPCORER" "Disabled,Enabled" group.long 0xB80++0x03 line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,External Memory Arbitration Configuration:Input NISO Throttle Mask" bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,NISO throttle mask DFD" "Disabled,Enabled" bitfld.long 0x00 4. " NISO_THROTTLE_MASK_HDAPC ,NISO throttle mask HDAPC" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM ,NISO throttle mask SDM" "Disabled,Enabled" bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,NISO throttle mask GK2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG ,NISO throttle mask JPG" "Disabled,Enabled" group.long 0x670++0x07 line.long 0x00 "SEC_CARVEOUT_BOM_0,Security Carve Out BOM 0" hexmask.long.word 0x00 20.--31. 1. " SEC_CARVEOUT_BOM ,Base address for the SEC carve out address space" line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,SEC Carve Out Size MB 0" hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB ,SEC carve out size MB" group.long 0x9D4++0x03 line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0" bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Security carve out BOM HI" "0,1,2,3" group.long 0x678++0x03 line.long 0x00 "SEC_CARVEOUT_REG_CTRL_0,Security Carve Out Register Control 0" bitfld.long 0x00 0. " SEC_CARVEOUT_WRITE_ACCESS ,Sticky bit to control the writes to the other security carve out aperture registers" "Enabled,Disabled" rgroup.long 0x67C++0x07 line.long 0x00 "ERR_SEC_STATUS_0,Error Security Status 0" bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI ,Higher address bits of erring address whose lower bits are available in the error ADR register" "0,1,2,3" bitfld.long 0x00 18. " ERR_SEC_SWAP ,Error security swap" "No error,Error" textline " " bitfld.long 0x00 17. " ERR_SEC_SECURITY ,Error secure security" "Non secure,Secure" bitfld.long 0x00 16. " ERR_SEC_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_SEC_ADR1 ,Second sub partition unique address bits" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--6. 1. " ERR_SEC_ID ,Client identifier of the access that caused the error" line.long 0x04 "ERR_SEC_ADR_0,Error Security ADR 0" group.long 0x684++0x07 line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Configuration" bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS ,Number of idle before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "STUTTER_CONTROL_0,Stutter Control 0" bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR ,Slow EMCCLK during DSR" "Disabled,Enabled" group.long 0x9D4++0x03 line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0" bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Security carve out BOM HI" "0,1,2,3" group.long 0x6C0++0x07 line.long 0x00 "EMEM_ARB_TIMING_RFCPB_0,External Memory Arbitration Configuration" hexmask.long.word 0x00 0.--8. 1. " RFCPB ,PMC specifies the per-bank auto refresh cycle time" line.long 0x04 "EMEM_ARB_TIMING_CCDMW_0,External Memory Arbitration Configuration:DRAM Timing:tCCDMW" bitfld.long 0x04 0.--5. " CCDMW ,PMC This field supports LPDDR4 DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x6F0++0x07 line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,External Memory Arbitration Configuration Per Bank Refresh High Priority Control" hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH ,Open work control threshold" hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP ,Low priority control threshold" textline " " hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP ,High priority control threshold" line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,External Memory Arbitration Configuration:REFPB-Bank control" bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE ,Explicit bank mode" "0,1" hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,Force bank closure,low threshold" textline " " hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE ,Force bank closure,high threshold" group.long 0x970++0x07 line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register" bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE ,TSECB flush enable" "Disabled,Enabled" bitfld.long 0x00 12. " ETR_FLUSH_ENABLE ,ETR flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE ,AXIAP flush enable" "Disabled,Enabled" bitfld.long 0x00 8. " NVJPG_FLUSH_ENABLE ,NVJPG flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SE_FLUSH_ENABLE ,SE flush enable" "Disabled,Enabled" bitfld.long 0x00 6. " APE_FLUSH_ENABLE ,APE flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE ,NVDEC flush enable" "Disabled,Enabled" bitfld.long 0x00 2. " GPU_FLUSH_ENABLE ,GPU flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE ,ISP2B flush enable" "Disabled,Enabled" bitfld.long 0x00 0. " SDMMC4A_FLUSH_ENABLE ,SDMMC4A flush enable" "Disabled,Enabled" line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Control Register" bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS ,TSECB hot reset status" "In progress,Done" bitfld.long 0x04 12. " ETR_HOTRESET_STATUS ,ETR hot reset status" "In progress,Done" textline " " bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS ,AXIAP hot reset status" "In progress,Done" bitfld.long 0x04 8. " NVJPG_HOTRESET_STATUS ,NVJPG hot reset status" "In progress,Done" textline " " bitfld.long 0x04 7. " SE_HOTRESET_STATUS ,SE hot reset status" "In progress,Done" bitfld.long 0x04 6. " APE_HOTRESET_STATUS ,APE hot reset status" "In progress,Done" textline " " bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS ,NVDEC hot reset status" "In progress,Done" bitfld.long 0x04 2. " GPU_HOTRESET_STATUS ,GPU hot reset status" "In progress,Done" textline " " bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS ,ISP2B hot reset status" "In progress,Done" bitfld.long 0x04 0. " SDMMC4A_HOTRESET_STATUS ,SDMMC4A hot reset status" "In progress,Done" textline " " endif sif (!cpuis("TEGRAX2")) group.long 0xE8++0x07 line.long 0x00 "EMEM_ARB_OVERRIDE_0,External Memory Arbitration Configuration For Feature Overrides" bitfld.long 0x00 31. " ARB_HUM_FIFO_DEADLOCK_CHECK_OVERRIDE ,FIFO deadlock check override" "Disabled,Enabled" bitfld.long 0x00 28. " ARB_EMEM_SPO_OVERRIDE ,EMEM SPO override" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ARB_EMEM_AP_OVERRIDE ,EMEM AP override" "Disabled,Enabled" bitfld.long 0x00 26. " ARB_HUM_FIFO_OVERRIDE ,Hum FIFO override" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " ISO_TA_OVERRIDE ,ISO TA override" "Disabled,Enabled" bitfld.long 0x00 22. " ISO_DA_OVERRIDE ,ISO DA override" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ISO_BC_INHERIT_ON_PRIINV_OVERRIDE ,ISO BC inherit on PRINV override" "Disabled,Enabled" bitfld.long 0x00 20. " ISO_BC_CAUSE_PRIINV_OVERRIDE ,ISO BC cause PRINV override" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ISO_BA_OVERRIDE ,ISO_BA override" "Disabled,Enabled" bitfld.long 0x00 18. " ISO_AA_OVERRIDE ,ISO AA override" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " ARB_EMEM_BUBBLECALC_OVERRIDE ,EMEM bubble CALC override" "Disabled,Enabled" bitfld.long 0x00 16. " ALLOC_ONE_BQ_PER_CLIENT ,Allocate one BQ per client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " PRIORITY_INVERSION_ISO_THRESHOLD_BUS_OVERRIDE ,Priority inversion is threshold BUS override" "Disabled,Enabled" bitfld.long 0x00 14. " PRIORITY_INVERSION_ISO_THRESHOLD_BANK_OVERRIDE ,Priority inversion threshold bank override" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " PRIORITY_INVERSION_THRESHOLD_BUS_OVERRIDE ,Priority inversion threshold BUS override" "Disabled,Enabled" bitfld.long 0x00 12. " PRIORITY_INVERSION_THRESHOLD_BANK_OVERRIDE ,Priority inversion bank override" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " PRIORITY_INVERSION_EQ_PRI_LEN_LIMIT_OVERRIDE ,Priority inversion EQ PRI LEN limit override" "Disabled,Enabled" bitfld.long 0x00 10. " OBSERVED_DIRECTION_OVERRIDE ,Observed direction override" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " BC2AA_HOLDHOFF_OVERRIDE ,BC2AA hold off override" "Disabled,Enabled" bitfld.long 0x00 8. " TS2AA_HOLDHOFF_OVERRIDE ,TS2AA hold off override" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPIRE_UPDATE_OVERRIDE ,Expire update override" "Disabled,Enabled" bitfld.long 0x00 3. " GPU_SLICE_MERGE_OVERRIDE ,Combine GPU traffic override" "Disabled,Enabled" textline " " line.long 0x04 "EMEM_ARB_RSV_0,EMEM Arbiter Reserved" hexmask.long.byte 0x04 24.--31. 1. " EMEM_ARB_RESERVED_BYTE3 ,EMEM ARB reserved byte 3" hexmask.long.byte 0x04 16.--23. 1. " EMEM_ARB_RESERVED_BYTE2 ,EMEM ARB reserved byte2" textline " " hexmask.long.byte 0x04 8.--15. 1. " EMEM_ARB_RESERVED_BYTE1 ,EMEM ARB reserved byte1 " hexmask.long.byte 0x04 0.--7. 1. " EMEM_ARB_RESERVED_BYTE0 ,EMEM ARB reserved byte0" group.long 0x0F4++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,Second-Level Clock Enable Overrides" bitfld.long 0x00 15. " EMC_RESP_CLKEN_OVR ,EMC response clock override" "Gated,Override" bitfld.long 0x00 14. " TSR_CLKEN_OVR ,EARB TSR clock override" "Gated,Override" textline " " bitfld.long 0x00 13. " RING2_CLKEN_OVR ,Ring2 clock override" "Gated,Always on" bitfld.long 0x00 12. " RING1_CLKEN_OVR ,Ring1 clock override" "Gated,Always on" textline " " bitfld.long 0x00 11. " CH_DDA_CLKEN_OVR ,CH_DDA_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 10. " HUB_DDA_CLKEN_OVR ,HUB_DDA_CLKEN_OVR" "Gated,Always on" textline " " bitfld.long 0x00 9. " WCAM_CLKEN_OVR ,WCAM_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 8. " PTC_CACHE_CLKEN_OVR ,PTC_CACHE_CLKEN_OVR" "Gated,Always on" textline " " bitfld.long 0x00 7. " PTC_CLKEN_OVR ,PTC_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 6. " TLB_CLKEN_OVR ,TLB_CLKEN_OVR" "Gated,Always on" textline " " bitfld.long 0x00 5. " WB_CLKEN_OVR ,WB_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 3. " REGS_CLKEN_OVR ,REGS_CLKEN_OVR" "Gated,Always on" textline " " bitfld.long 0x00 2. " EARB_CLKEN_OVR ,EARB_CLKEN_OVR" "Gated,Always on" bitfld.long 0x00 0. " CIF_CLKEN_OVR ,CIF_CLKEN_OVR" "Gated,Always on" group.long 0x0FC++0x07 line.long 0x00 "TIMING_CONTROL_0 ,Shadowed Registers Update Trigger" bitfld.long 0x00 0. " TIMING_UPDATE ,Trigger a timing update event" "No trigger,Trigger" textline " " line.long 0x04 "STAT_CONTROL_0,Statistic Control" bitfld.long 0x04 3. " EMC_PM_STOP_TRIGGER ,EMC PM stop trigger" "No trigger,Trigger" bitfld.long 0x04 2. " EMC_PM_START_TRIGGER ,EEMC PM start trigger" "No trigger,Trigger" textline " " bitfld.long 0x04 0.--1. " EMC_GATHER ,EMC gather" "RST,,Disabled,Enabled" textline " " endif group.long 0x200++0x03 line.long 0x00 "CLIENT_HOTRESET_CTRL_0,Memory Client Hot Reset Control Register" bitfld.long 0x00 31. " SDMMC3A_FLUSH_ENABLE ,SDMMC3A flush enable" "Disabled,Enabled" bitfld.long 0x00 30. " SDMMC2A_FLUSH_ENABLE ,SDMMC2A flush enable" "Disabled,Enabled" bitfld.long 0x00 29. " SDMMC1A_FLUSH_ENABLE ,SDMMC1A flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " TSEC_FLUSH_ENABLE ,TSEC flush enable" "Disabled,Enabled" bitfld.long 0x00 20. " XUSB_DEV_FLUSH_ENABLE ,XUSB DEV flush enable" "Disabled,Enabled" bitfld.long 0x00 19. " XUSB_HOST_FLUSH_ENABLE ,XUSB host flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " VIC_FLUSH_ENABLE ,VIC flush enable" "Disabled,Enabled" bitfld.long 0x00 17. " VI_FLUSH_ENABLE ,VI flush enable" "Disabled,Enabled" bitfld.long 0x00 15. " SATA_FLUSH_ENABLE ,SATA flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " PPCS_FLUSH_ENABLE ,PPCS flush enable" "Disabled,Enabled" bitfld.long 0x00 11. " NVENC_FLUSH_ENABLE ,NVENC flush enable" "Disabled,Enabled" bitfld.long 0x00 9. " MPCORE_FLUSH_ENABLE ,MPCORE flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " ISP2_FLUSH_ENABLE ,ISP2 flush enable" "Disabled,Enabled" bitfld.long 0x00 7. " HDA_FLUSH_ENABLE ,HDA flush enable" "Disabled,Enabled" bitfld.long 0x00 6. " HC_FLUSH_ENABLE ,HC flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DCB_FLUSH_ENABLE ,DCB flush enable" "Disabled,Enabled" bitfld.long 0x00 2. " DC_FLUSH_ENABLE ,DC flush enable" "Disabled,Enabled" bitfld.long 0x00 1. " AVPC_FLUSH_ENABLE ,AVPC flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AFI_FLUSH_ENABLE ,AFI flush enable" "Disabled,Enabled" rgroup.long 0x204++0x03 line.long 0x00 "CLIENT_HOTRESET_STATUS_0,Memory Client Hot Reset Status Register" bitfld.long 0x00 31. " SDMMC3A_HOTRESET_STATUS ,SDMMC3A flush status" "In progress,Done" bitfld.long 0x00 30. " SDMMC2A_HOTRESET_STATUS ,SDMMC2A flush status" "In progress,Done" bitfld.long 0x00 29. " SDMMC1A_HOTRESET_STATUS ,SDMMC1A flush status" "In progress,Done" textline " " bitfld.long 0x00 22. " TSEC_HOTRESET_STATUS ,TSEC flush status" "In progress,Done" bitfld.long 0x00 20. " XUSB_DEV_HOTRESET_STATUS ,XUSB DEV flush status" "In progress,Done" bitfld.long 0x00 19. " XUSB_HOST_HOTRESET_STATUS ,XUSB Host flush status" "In progress,Done" textline " " bitfld.long 0x00 18. " VIC_HOTRESET_STATUS ,VIC flush status" "In progress,Done" bitfld.long 0x00 17. " VI_HOTRESET_STATUS ,VI flush status" "In progress,Done" bitfld.long 0x00 15. " SATA_HOTRESET_STATUS ,SATA flush status" "In progress,Done" textline " " bitfld.long 0x00 14. " PPCS_HOTRESET_STATUS ,PPCS flush status" "In progress,Done" bitfld.long 0x00 11. " NVENC_HOTRESET_STATUS ,NVENC flush status" "In progress,Done" bitfld.long 0x00 9. " MPCORE_HOTRESET_STATUS ,MPCORE flush status" "In progress,Done" textline " " bitfld.long 0x00 8. " ISP2_HOTRESET_STATUS ,ISP flush status" "In progress,Done" bitfld.long 0x00 7. " HDA_HOTRESET_STATUS ,HDA flush status" "In progress,Done" bitfld.long 0x00 6. " HC_HOTRESET_STATUS ,HC flush status" "In progress,Done" textline " " bitfld.long 0x00 3. " DCB_HOTRESET_STATUS ,DCB flush status" "In progress,Done" bitfld.long 0x00 2. " DC_HOTRESET_STATUS ,DC flush status" "In progress,Done" bitfld.long 0x00 1. " AVPC_HOTRESET_STATUS ,AVPC flush status" "In progress,Done" textline " " bitfld.long 0x00 0. " AFI_HOTRESET_STATUS ,AFI flush status" "In progress,Done" group.long 0x208++0x0F line.long 0x00 "EMEM_ARB_ISOCHRONOUS_0_0,Per-Client Isochronous Settings" bitfld.long 0x00 31. " ISO_SATAR ,Client SATAR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 30. " ISO_PPCSAHBSLVR ,Client PPCSAHBSLVR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 29. " ISO_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ISO_NVENCCSRD ,Client NVENCSRD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 23. " ISO_HOST1XR ,Client HOST1XR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 22. " ISO_HOST1XDMAR ,Client HOST1XDMAR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ISO_HDAR ,Client HDAR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 17. " ISO_DISPLAYHCB ,Client DISPLAYHCB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 16. " ISO_DISPLAYHC ,Client DISPLAYHC is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ISO_AVPCARM7R ,Client AVPCARM7R is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 14. " ISO_AFIR ,Client AFIR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 6. " ISO_DISPLAY0CB ,Client DISPLAY0CB is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ISO_DISPLAY0C ,Client DISPLAY0C is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 4. " ISO_DISPLAY0BB ,Client DISPLAY0BB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 3. " ISO_DISPLAY0B ,Client DISPLAY0B is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ISO_DISPLAY0AB ,Client DISPLAY0AB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 1. " ISO_DISPLAY0A ,Client DISPLAY0A is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 0. " ISO_PTCR ,Client PTCR is treated as an isochronous client" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_ISOCHRONOUS_1_0,Per-Client Isochronous Settings" bitfld.long 0x04 29. " ISO_SATAW ,Client SATAW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 28. " ISO_PPCSAHBSLVW ,Client PPCSAHBSLVW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 27. " ISO_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " ISO_MPCOREW ,Client MPCOREW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 22. " ISO_HOST1XW ,Client HOST1XW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 21. " ISO_HDAW ,Client HDAW is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " ISO_AVPCARM7W ,Client AVPCARM7W is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 17. " ISO_AFIW ,Client AFIW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x04 11. " ISO_NVENCSWR ,Client NVENCSWR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " ISO_MPCORER ,Client MPCORER is treated as an isochronous client" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_ISOCHRONOUS_2_0,Per-Client Isochronous Settings" bitfld.long 0x08 26. " ISO_DISPLAYT ,Client DISPLAYT is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 25. " ISO_GPUSWR ,Client GPUSWR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 24. " ISO_GPUSRD ,Client GPUSRD is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " ISO_TSECSWR ,Client TSECSWR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 20. " ISO_TSECSRD ,Client TSECSRD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 17. " ISO_ISPWBB ,Client ISPWBB is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " ISO_ISPWAB ,Client ISPWAB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 14. " ISO_ISPRAB ,Client ISPRAB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 13. " ISO_XUSB_DEVW ,Client XUSB DEVQ is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " ISO_XUSB_DEVR ,Client XUSB DEVR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 11. " ISO_XUSB_HOSTW ,Client XUSB HOSTW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 10. " ISO_XUSB_HOSTR ,Client XUSB HOSTR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " ISO_ISPWB ,Client ISPWB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 6. " ISO_ISPWA ,Client ISPWA is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x08 4. " ISO_ISPRA ,Client ISPRA is treated as an isochronous client" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_ISOCHRONOUS_3_0,Per-Client Isochronous Settings" bitfld.long 0x0C 31. " ISO_NVJPGSWR ,Client NVJPGSWR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 30. " ISO_NVJPGSRD ,Client NVJPGSRD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 27. " ISO_APEW ,Client APEW is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " ISO_APER ,Client APER is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 25. " ISO_NVDECSWR ,Client NVDECSWR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 24. " ISO_NVDECSRD ,Client NVDECSRD is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " ISO_DISPLAYD ,Client DISPLAYD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 18. " ISO_VIW ,Client VIW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 13. " ISO_VICSWR ,Client VICSWR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " ISO_VICSRD ,Client VICSRD is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 7. " ISO_SDMMCWAB ,Client SDMMCWAB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 6. " ISO_SDMMCW ,Client SDMMCW is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " ISO_SDMMCWAA ,Client SDMMCWAA is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 4. " ISO_SDMMCWA ,Client SDMMCWA is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 3. " ISO_SDMMCRAB ,Client SDMMCRAB is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " ISO_SDMMCR ,Client SDMMCR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 1. " ISO_SDMMCRAA ,Client SDMMCRAA is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x0C 0. " ISO_SDMMCCRA ,Client SDMMCRA is treated as an isochronous client" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0xB94++0x03 line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings" bitfld.long 0x00 9. " SO_GPUSWR2 ,Client gpuswr2 is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 8. " ISO_GPUSRD2 ,Client gpusrd2 is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 7. " ISO_TSECSWRB ,Client TSECSWRB is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ISO_TSECSRDB ,Client TSECSRDB is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 5. " ISO_ETRW ,Client ETRW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 4. " ISO_ETRR ,Client ETRR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ISO_AXIAPW ,Client AXIAPW is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 2. " ISO_AXIAPR ,Client AXIAPR is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 1. " ISO_SESWR ,Client SESWR is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ISO_SESRD ,Client SESRD is treated as an isochronous client" "Disabled,Enabled" group.long 0xBA8++0x0F line.long 0x00 "EMEM_ARB_ISOCHRONOUS_5_0,EMEM_ARB_ISOCHRONOUS_5_0" bitfld.long 0x00 3. " ISO_NVDECSRD1 ,Client nvdecsrd1 is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 2. " ISO_VICSRD1 ,Client vicsrd1 is treated as an isochronous client" "Disabled,Enabled" bitfld.long 0x00 1. " ISO_NVDISPLAYR1 ,Client nvdisplayr1 is treated as an isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ISO_APEDMAW ,Client APEDMAW is treated as an isochronous client" "Disabled,Enabled" endif group.long 0x218++0x0F line.long 0x00 "EMEM_ARB_HYSTERESIS_0_0,Per-Client Hysteresis Settings" bitfld.long 0x00 31. " HYST_SATAR ,Client SATAR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 30. " HYST_PPCSAHBSLVR ,Client PPCSAHBSLVR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 29. " HYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " HYST_NVENCSRD ,Client NVENCSRD is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 23. " HYST_HOST1XR ,Client HOST1XR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 22. " HYST_HOST1XDMAR ,Client HOST1XDMAR is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " HYST_HDAR ,Client HDAR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 17. " HYST_DISPLAYHCB ,Client DISPLAYHCB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 16. " HYST_DISPLAYHC ,Client DISPLAYHC is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " HYST_AVPCARM7R ,Client AVPCARM7R is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 14. " HYST_AFIR ,Client AFIR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 6. " HYST_DISPLAY0CB ,Client DISPLAY0CB is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HYST_DISPLAY0C ,Client DISPLAY0C is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " HYST_DISPLAY0BB ,Client DISPLAY0BB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 3. " HYST_DISPLAY0B ,Client DISPLAY0B is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HYST_DISPLAY0AB ,Client DISPLAY0AB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " HYST_DISPLAY0A ,Client DISPLAY0A is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x00 0. " HYST_PTCR ,Client PTCR is treated as an hysteresis client" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_HYSTERESIS_1_0,Per-Client Hysteresis Settings" bitfld.long 0x04 29. " HYST_SATAW ,Client SATAW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 28. " HYST_PPCSAHBSLVW ,Client PPCSAHBSLVW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 27. " HYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " HYST_MPCOREW ,Client MPCOREW is treated as an hysteresis client" "Disabled,Enabled" sif (!cpuis("TEGRAX2")&&!cpuis("TEGRAX1")) bitfld.long 0x04 24. " HYST_MPCORELPW ,Client MPCORELPW is treated as an hysteresis client" "Disabled,Enabled" endif bitfld.long 0x04 22. " HYST_HOST1XW ,Client HOST1XW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " HYST_HDAW ,Client HDAW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 18. " HYST_AVPCARM7W ,Client AVPCARM7W is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 17. " HYST_AFIW ,Client AFIW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " HYST_NVENCSWR ,Client NVENCSWR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x04 7. " HYST_MPCORER ,Client MPCORER is treated as an hysteresis client" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_HYSTERESIS_2_0,Per-Client Hysteresis Settings" bitfld.long 0x08 26. " HYST_DISPLAYT ,Client DISPLAYT is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 25. " HYST_GPUSWR ,Client GPUSWR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 24. " HYST_GPUSRD ,Client GPSURD is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " HYST_TSECSWR ,Client TSECSWR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 20. " HYST_TSECSRD ,Client TSECSRD is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 17. " HYST_ISPWBB ,Client ISPWBB is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " HYST_ISPWAB ,Client ISPWAB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 14. " HYST_ISPRAB ,Client ISPRAB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 13. " HYST_XUSB_DEVW ,Client XUSB DEVW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " HYST_XUSB_DEVR ,Client XUSB DEVR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 11. " HYST_XUSB_HOSTW ,Client XUSB HOSTW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 10. " HYST_XUSB_HOSTR ,Client XUSB HOSTR is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " HYST_ISPWB ,Client ISPWB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 6. " HYST_ISPWA ,Client ISPWA is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x08 4. " HYST_ISPRA ,Client ISPRA is treated as an hysteresis client" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_HYSTERESIS_3_0,Per-Client Hysteresis Settings" bitfld.long 0x0C 31. " HYST_NVJPGSWR ,Client NVJPGSWR is treated as hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 30. " HYST_NVJPGSRD ,Client NVJPGSRD is treated as hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 27. " HYST_APEW ,Client APEW is treated as hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " HYST_APER ,Client APER is treated as hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 25. " HYST_NVDECSWR ,Client NVDECSWR is treated as hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 24. " HYST_NVDECSRD ,Client NVDECSRD is treated as hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " HYST_DISPLAYD ,Client DISPLAYD is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 18. " HYST_VIW ,Client VIW is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 13. " HYST_VICSWR ,Client VICSWR is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " HYST_VICSRD ,Client VICSRD is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 7. " HYST_SDMMCWAB ,Client SDMMCWAB is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 6. " HYST_SDMMCW ,Client SDMMCW is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " HYST_SDMMCWAA ,Client SDMMCWAA is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 4. " HYST_SDMMCWA ,Client SDMMCWA is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 3. " HYST_SDMMCRAB ,Client SDMMCRAB is treated as an hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " HYST_SDMMCR ,Client SDMMCR is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 1. " HYST_SDMMCRAA ,Client SDMMCRAA is treated as an hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 0. " HYST_SDMCRA ,Client SDMCRA is treated as an hysteresis client" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) group.long 0xB84++0x03 line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,EMEM ARB Hysteresis4 0" bitfld.long 0x00 31. " HYST_APEDMAR ,Client APEDMAR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 30. " HYST_SCEDMAW ,Client SCEDMAW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 29. " HYST_SCEDMAR ,Client SCEDMAR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " HYST_SCEW ,Client SCEW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 27. " HYST_SCER ,Client SCER is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 26. " HYST_AONDMAW ,Client AONDMAW is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " HYST_AONDMAR ,Client AONDMAR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 24. " HYST_AONW ,Client AONW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 23. " HYST_AONR ,Client AONR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " HYST_BPMPDMAW ,Client BPMPDMAW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 21. " HYST_BPMPDMAR ,Client BPMPDMAR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 20. " HYST_BPMPW ,Client BPMPW is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " HYST_BPMPR ,Client BPMPR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 18. " HYST_NVDISPLAYR ,Client NVDISPLAYR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 17. " HYST_UFSHCW ,Client UFSHCW is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " HYST_UFSHCR ,Client UFSHCR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 15. " HYST_EQOSW ,Client EQOSW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 14. " HYST_EQOSR ,Client EQOSR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " HYST_AXISW ,Client AXISW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 12. " HYST_AXISR ,Client AXISR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 9. " HYST_GPUSWR2 ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " HYST_GPUSRD2 ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 7. " HYST_TSECSWRB ,Client TSECSWRB is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 6. " HYST_TSECSRDB ,Client TSECSRDB is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HYST_ETRW ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " HYST_ETRR ,Client ETRR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " HYST_SESWR ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HYST_SESRD ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled" group.long 0xBA4++0x03 line.long 0x00 "EMEM_ARB_HYSTERESIS_5_0,EMEM ARB Hysteresis5_0" bitfld.long 0x00 3. " HYST_NVDECSRD1 ,Client NVDECSRD1 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 2. " HYST_VICSRD1 ,Client VICSRD1 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " HYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HYST_APEDMAW ,Client APEDMAW is treated as a hysteresis client" "Disabled,Enabled" group.long 0xBB0++0x13 line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x00 31. " DHYST_SATAR ,Client SATAR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 30. " DHYST_PPCSAHBSLVR ,Client PPCSAHBSLVR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 29. " DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " DHYST_NVENCSRD ,Client NVENCSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 23. " DHYST_HOST1XR ,Client HOST1XR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 22. " DHYST_HOST1XDMAR ,Client HOST1XDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DHYST_HDAR ,Client HDAR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 17. " DHYST_DISPLAYHCB ,Client DISPLAYHCB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 16. " DHYST_DISPLAYHC ,Client DISPLAYHC is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " DHYST_AVPCARM7R ,Client AVPCARM7R is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 14. " DHYST_AFIR ,Client AFIR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 6. " DHYST_DISPLAY0CB ,Client DISPLAY0CB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DHYST_DISPLAY0C ,Client DISPLAY0C is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " DHYST_DISPLAY0BB ,Client DISPLAY0BB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 3. " DHYST_DISPLAY0B ,Client DISPLAY0B is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DHYST_DISPLAY0AB ,Client DISPLAY0AB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " DHYST_DISPLAY0A ,Client DISPLAY0A is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 0. " DHYST_PTCR ,Client PTCR is treated as a dynamic hysteresis client" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x04 29. " DHYST_SATAW ,Client SATAW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 28. " DHYST_PPCSAHBSLVW ,Client PPCSAHBSLVW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 27. " DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " DHYST_MPCOREW ,Client MPCOREW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 22. " DHYST_HOST1XW ,Client HOST1XW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 21. " DHYST_HDAW ,Client HDAW is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " DHYST_AVPCARM7W ,Client AVPCARM7W is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 17. " DHYST_AFIW ,Client AFIW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 11. " DHYST_NVENCSWR ,Client NVENCSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " DHYST_MPCORER ,Client MPCORER is treated as a dynamic hysteresis client" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x08 26. " DHYST_DISPLAYT ,Client DISPLAYT is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 25. " DHYST_GPUSWR ,Client GPUSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 24. " DHYST_GPUSRD ,Client GPUSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " DHYST_A9AVPSCW ,Client A9AVPSCW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 22. " DHYST_A9AVPSCR ,Client A9AVPSCR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 21. " DHYST_TSECSWR ,Client TSECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " DHYST_TSECSRD ,Client TSECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 17. " DHYST_ISPWBB ,Client ISPWBB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 16. " DHYST_ISPWAB ,Client ISPWAB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " DHYST_ISPRAB ,Client ISPRAB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 13. " DHYST_XUSB_DEVW ,Client XUSB DEVW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 12. " DHYST_XUSB_DEVR ,Client XUSB DEVR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " DHYST_XUSB_HOSTW ,Client XUSB HOSTW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 10. " DHYST_XUSB_HOSTR ,Client XUSB HOSTR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 7. " DHYST_ISPWB ,Client ISPWB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " DHYST_ISPWA ,Client ISPWA is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 4. " DHYST_ISPRA ,Client ISPRA is treated as a dynamic hysteresis client" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x0C 31. " DHYST_NVJPGSWR ,Client NVJPGSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 30. " DHYST_NVJPGSRD ,Client NVJPGSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 27. " DHYST_APEW ,Client APEW is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " DHYST_APER ,Client APER is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 25. " DHYST_NVDECSWR ,Client NVDECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 24. " DHYST_NVDECSRD ,Client NVDECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " DHYST_DISPLAYD ,Client DISPLAYD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 18. " DHYST_VIW ,Client VIW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 13. " DHYST_VICSWR ,Client VICSWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " DHYST_VICSRD ,Client VICSRD is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 7. " DHYST_SDMMCWAB ,Client SDMMCWAB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 6. " DHYST_SDMMCW ,Client SDMMCW is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " DHYST_SDMMCWAA ,Client SDMMCWAA is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 4. " DHYST_SDMMCWA ,Client SDMMCWA is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 3. " DHYST_SDMMCRAB ,Client SDMMCRAB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " DHYST_SDMMCR ,Client SDMMCR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 1. " DHYST_SDMMCRAA ,Client SDMMCRAA is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 0. " DHYST_SDMMCRA ,Client SDMMCRA is treated as a dynamic hysteresis client" "Disabled,Enabled" line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x10 9. " DHYST_GPUSWR2 ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 8. " DHYST_GPUSRD2 ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 7. " DHYST_TSECSWRB ,Client TSECSWRB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 6. " DHYST_TSECSRDB ,Client TSECSRDB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 5. " DHYST_ETRW ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 4. " DHYST_ETRR ,Client ETRR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " DHYST_AXIAPW ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 2. " DHYST_AXIAPR ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 1. " DHYST_SESWR ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " DHYST_SESRD ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled" group.long 0xBF0++0x03 line.long 0x00 "EMEM_ARB_DHYSTERESIS_5_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x00 3. " DHYST_NVDECSRD1 ,Client NVDECSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 2. " DHYST_VICSRD1 ,Client VICSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " DHYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DHYST_APEDMAW ,Client APEDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled" group.long 0xBCC++0x03 line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Control Register For Dynamic Hysteresis Logic" bitfld.long 0x00 31. " DHYST_ENABLE ,Dynamic hysteresis logic enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " DHYST_BW_MON_INTERVAL ,Bandwidth monitor interval for dynamic hysteresis" "8 MCLK,16 MCLK,32 MCLK,64 MCLK" group.long 0xBD0++0x1F line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 0" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0 ,DHYST delay bin 0" line.long 0x04 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 1" hexmask.long.word 0x04 0.--11. 1. " DHYST_DELAY_BIN_1 ,DHYST delay bin 1" line.long 0x08 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 2" hexmask.long.word 0x08 0.--11. 1. " DHYST_DELAY_BIN_2 ,DHYST delay bin 2" line.long 0x0C "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 3" hexmask.long.word 0x0C 0.--11. 1. " DHYST_DELAY_BIN_3 ,DHYST delay bin 3" line.long 0x10 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 4" hexmask.long.word 0x10 0.--11. 1. " DHYST_DELAY_BIN_4 ,DHYST delay bin 4" line.long 0x14 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 5" hexmask.long.word 0x14 0.--11. 1. " DHYST_DELAY_BIN_5 ,DHYST delay bin 5" line.long 0x18 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 6" hexmask.long.word 0x18 0.--11. 1. " DHYST_DELAY_BIN_6 ,DHYST delay bin 6" line.long 0x1C "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 7" hexmask.long.word 0x1C 0.--11. 1. " DHYST_DELAY_BIN_7 ,DHYST delay bin 7" group.long 0xA60++0x03 line.long 0x00 "BPMPPC_EXTRA_SNAP_LEVELS_0,BPMPPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPPC ,Response clock-enable override for partition client BPMPPC" "Disabled,Enabled" group.long 0xA70++0x07 line.long 0x00 "SCEPC_EXTRA_SNAP_LEVELS_0,SCEPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SCEPC ,Response clock-enable override for partition client SCEPC" "Disabled,Enabled" line.long 0x04 "SCEDMAPC_EXTRA_SNAP_LEVELS_0,SCEDMAPC Extra Snap Levels 0" bitfld.long 0x04 3. " RCLKEN_OVERRIDE_SCEDMAPC ,Response clock-enable override for partition client SCEDMAPC" "Disabled,Enabled" group.long 0x2BC++0x03 line.long 0x00 "FTOP_EXTRA_SNAP_LEVELS_0,FTOP Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_FTOP ,Response clock-enable override for partition client FTOP" "Disabled,Enabled" group.long 0xA80++0x03 line.long 0x00 "VICPC3_EXTRA_SNAP_LEVELS_0,VICPC3 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC3 ,Response clock-enable override for partition client VICPC3" "Disabled,Enabled" group.long 0xA3C++0x03 line.long 0x00 "JPG_EXTRA_SNAP_LEVELS_0,JPG Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_JPG ,Response clock-enable override for partition client JPG" "Disabled,Enabled" group.long 0xA14++0x03 line.long 0x00 "HOST_EXTRA_SNAP_LEVELS_0,HOST Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HOST ,Response clock-enable override for partition client HOST" "Disabled,Enabled" group.long 0x2AC++0x03 line.long 0x00 "DIS_EXTRA_SNAP_LEVELS_0,DIS Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS ,Response clock-enable override for partition client DIS" "Disabled,Enabled" group.long 0xA78++0x03 line.long 0x00 "APEDMAPC_EXTRA_SNAP_LEVELS_0,APEDMAPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APEDMAPC ,Response clock-enable override for partition client APEDMAPC" "Disabled,Enabled" group.long 0xA1C++0x03 line.long 0x00 "VICPC_EXTRA_SNAP_LEVELS_0,VICPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC ,Response clock-enable override for partition client VICPC" "Disabled,Enabled" group.long 0xA58++0x03 line.long 0x00 "UFSHCPC_EXTRA_SNAP_LEVELS_0,UFSHCPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_UFSHCPC ,RCLKEN override UFSHCPC" "Disabled,Enabled" group.long 0xA6C++0x03 line.long 0x00 "AONDMAPC_EXTRA_SNAP_LEVELS_0,AONDMAPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONDMAPC ,Response clock-enable override for partition client AONDMAPC" "Disabled,Enabled" endif sif (!cpuis("TEGRAX2")) group.long 0x228++0x0F line.long 0x00 "SMMU_TRANSLATION_ENABLE_0_0,Per-Client SMMU Translation Enables" bitfld.long 0x00 31. " SMMU_SATAR_ENABLE ,Enable client SATAR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 30. " SMMU_PPCSAHBSLVR_ENABLE ,Enable client PPCSAHBSLVR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 29. " SMMU_PPCSAHBDMAR_ENABLE ,Enable client PPCSAHBDMAR to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " SMMU_NVENCSRD_ENABLE ,Enable client NVENCSRD to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 23. " SMMU_HOST1XR_ENABLE ,Enable client HOST1XR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 22. " SMMU_HOST1XDMAR_ENABLE ,Enable client HOST1XDMAR to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " SMMU_HDAR_ENABLE ,Enable client HDAR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 17. " SMMU_DISPLAYHCB_ENABLE ,Enable client DISPLAYHCB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 16. " SMMU_DISPLAYHC_ENABLE ,Enable client DISPLAYHC to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SMMU_AVPCARM7R_ENABLE ,Enable client AVPCARM7R to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 14. " SMMU_AFIR_ENABLE ,Enable client AFIR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 6. " SMMU_DISPLAY0CB_ENABLE ,Enable client DISPLAY0CB to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SMMU_DISPLAY0C_ENABLE ,Enable client DISPLAY0C to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 4. " SMMU_DISPLAY0BB_ENABLE ,Enable client DISPLAY0BB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 3. " SMMU_DISPLAY0B_ENABLE ,Enable client DISPLAY0B to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SMMU_DISPLAY0AB_ENABLE ,Enable client DISPLAY0AB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x00 1. " SMMU_DISPLAY0A_ENABLE ,Enable client DISPLAY0A to be translated by SMMU" "Disabled,Enabled" line.long 0x04 "SMMU_TRANSLATION_ENABLE_1_0,Per-Client SMMU Translation Enables" bitfld.long 0x04 29. " SMMU_SATAW_ENABLE ,Enable client SATAW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 28. " SMMU_PPCSAHBSLVW_ENABLE ,Enable client PPCSAHBSLVW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 27. " SMMU_PPCSAHBDMAW_ENABLE ,Enable client PPCSAHBDMAW to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " SMMU_HOST1XW_ENABLE ,Enable client HOST1XW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 21. " SMMU_HDAW_ENABLE ,Enable client HDAW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 18. " SMMU_AVPCARM7W_ENABLE ,Enable client AVPCARM7W to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " SMMU_AFIW_ENABLE ,Enable client AFIW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x04 11. " SMMU_NVENCSWR_ENABLE ,Enable client NVENCSWR to be translated by SMMU" "Disabled,Enabled" line.long 0x08 "SMMU_TRANSLATION_ENABLE_2_0,Per-Client SMMU Translation Enables" bitfld.long 0x08 26. " SMMU_DISPLAYT_ENABLE ,Enable client DISPLAYT to be translated by SMMU" "Disabled,Enabled" rbitfld.long 0x08 25. " SMMU_GPUSWR_ENABLE ,GPU translation is handled by SWID" "Disabled,Enabled" rbitfld.long 0x08 24. " SMMU_GPUSRD_ENABLE ,GPU translation is handled by SWID" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " SMMU_TSECSWR_ENABLE ,Enable client TSECSWR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 20. " MMU_TSECSRD_ENABLE ,Enable client TSECSRD to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 17. " SMMU_ISPWBB_ENABLE ,Enable client ISPWBB to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " SMMU_ISPWAB_ENABLE ,Enable client ISPWAB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 14. " SMMU_ISPRAB_ENABLE ,Enable client ISPRAB to be translated by SMMU" "DIsabled,Enabled" bitfld.long 0x08 13. " SMMU_XUSB_DEVW_ENABLE ,Enable client XUSB DEVW to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " SMMU_XUSB_DEVR_ENABLE ,Enable client XUSB DEVR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 11. " SMMU_XUSB_HOSTW_ENABLE ,Enable client XUSB HOSTW to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 10. " SMMU_XUSB_HOSTR_ENABLE ,Enable client XUSB HOSTR to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " SMMU_ISPWB_ENABLE ,Enable client ISPWB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 6. " SMMU_ISPWA_ENABLE ,Enable client ISPWA to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x08 4. " SMMU_ISPRA_ENABLE ,Enable client ISPRA to be translated by SMMU" "Disabled,Enabled" line.long 0x0C "SMMU_TRANSLATION_ENABLE_3_0,Per-Client SMMU Translation Enables" bitfld.long 0x0C 31. " SMMU_NVJPGSWR_ENABLE ,Enable client NVJPGSWR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 30. " SMMU_NVJPGSRD_ENABLE ,Enable client NVJPGSRD to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 27. " SMMU_APEW_ENABLE ,Enable client APEW to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " SMMU_APER_ENABLE ,Enable client APER to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 25. " SMMU_NVDECSWR_ENABLE ,Enable client NVDECSWR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 24. " SMMU_NVDECSRD_ENABLE ,Enable client NVDECSRD to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " SMMU_DISPLAYD_ENABLE ,Enable client DISPLAYD to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 18. " SMMU_VIW_ENABLE ,Client VIW translation to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 13. " SMMU_VICSWR_ENABLE ,Enable client VICSWR to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " SMMU_VICSRD_ENABLE ,Enable client VICSRD to be translated by SMMU" "DIsabled,Enabled" bitfld.long 0x0C 7. " SMMU_SDMMCWAB_ENABLE ,Enable client SDMMCWAB to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 6. " SMMU_SDMMCW_ENABLE ,Enable client SDMMCW to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " SMMU_SDMMWAA_ENABLE ,Enable client SDMMCWAA to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 4. " SMMU_SDMMCWA_ENABLE ,Enable client SDMMCWA to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 3. " SMMU_SDMMCRAB_ENABLE ,Enable client SDMMCRAB to be translated by SMMU" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " SMMU_SDMMCR_ENABLE ,Enable client SDMMCR to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 1. " SMMU_SDMMCRAA_ENABLE ,Enable client SDMMCRAA to be translated by SMMU" "Disabled,Enabled" bitfld.long 0x0C 0. " SMMU_SDMMCRA_ENABLE ,Enable client SDMMCRA to be translated by SMMU" "Disabled,Enabled" textline " " width 23. if (((per.l(ad:0x7001D000+0x238))&0x80000000)==0x80000000) group.long 0x238++0x03 line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register" bitfld.long 0x00 31. " AFI_SMMU_ENABLE ,AFI translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " AFI_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " AFI_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " AFI_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " AFI_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x238++0x03 line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register" bitfld.long 0x00 31. " AFI_SMMU_ENABLE ,AFI translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x23C))&0x80000000)==0x80000000) group.long 0x23C++0x03 line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register" bitfld.long 0x00 31. " AVPC_SMMU_ENABLE ,AVPC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " AVPC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x23C++0x03 line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register" bitfld.long 0x00 31. " AVPC_SMMU_ENABLE ,AVPC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x240))&0x80000000)==0x80000000) group.long 0x240++0x03 line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register" bitfld.long 0x00 31. " DC_SMMU_ENABLE ,DC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " DC_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " DC_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " DC_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " DC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x240++0x03 line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register" bitfld.long 0x00 31. " DC_SMMU_ENABLE ,DC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x244))&0x80000000)==0x80000000) group.long 0x244++0x03 line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register" bitfld.long 0x00 31. " DCB_SMMU_ENABLE ,DCB translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " DCB_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " DCB_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " DCB_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " DCB_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x244++0x03 line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register" bitfld.long 0x00 31. " DCB_SMMU_ENABLE ,DCB translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x250))&0x80000000)==0x80000000) group.long 0x250++0x03 line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register" bitfld.long 0x00 31. " HC_SMMU_ENABLE ,HC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " HC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x250++0x03 line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register" bitfld.long 0x00 31. " HC_SMMU_ENABLE ,HC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x254))&0x80000000)==0x80000000) group.long 0x254++0x03 line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register" bitfld.long 0x00 31. " HDA_SMMU_ENABLE ,HDA translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " HDA_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " HDA_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " HDA_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " HDA_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x254++0x03 line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register" bitfld.long 0x00 31. " HDA_SMMU_ENABLE ,HDA translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x258))&0x80000000)==0x80000000) group.long 0x258++0x03 line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register" bitfld.long 0x00 31. " ISP2_SMMU_ENABLE ,ISP2 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " ISP2_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " ISP2_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " ISP2_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " ISP2_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x258++0x03 line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register" bitfld.long 0x00 31. " ISP2_SMMU_ENABLE ,ISP2 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x264))&0x80000000)==0x80000000) group.long 0x264++0x03 line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register" bitfld.long 0x00 31. " NVENC_SMMU_ENABLE ,NVENC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " NVENC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x264++0x03 line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register" bitfld.long 0x00 31. " MSENC_SMMU_ENABLE ,NVENC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x268))&0x80000000)==0x80000000) group.long 0x268++0x03 line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register" bitfld.long 0x00 31. " NV_SMMU_ENABLE ,NV translation enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " NV_ASID ,ASID to use for NV translation" "0,1,2,3" else group.long 0x268++0x03 line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register" bitfld.long 0x00 31. " NV_SMMU_ENABLE ,NV translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x26C))&0x80000000)==0x80000000) group.long 0x26C++0x03 line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register" bitfld.long 0x00 31. " NV2_SMMU_ENABLE ,NV2 translation enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " NV2_ASID ,ASID to use for NV2 translation" "0,1,2,3" else group.long 0x26C++0x03 line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register" bitfld.long 0x00 31. " NV2_SMMU_ENABLE ,NV2 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x270))&0x80000000)==0x80000000) group.long 0x270++0x03 line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register" bitfld.long 0x00 31. " PPCS_SMMU_ENABLE ,PPCS translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PPCS_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x270++0x03 line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register" bitfld.long 0x00 31. " PPCS_SMMU_ENABLE ,PPCS translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x274))&0x80000000)==0x80000000) group.long 0x274++0x03 line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register" bitfld.long 0x00 31. " SATA_SMMU_ENABLE ,SATA translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SATA_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SATA_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SATA_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SATA_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x274++0x03 line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register" bitfld.long 0x00 31. " SATA_SMMU_ENABLE ,SATA translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x280))&0x80000000)==0x80000000) group.long 0x280++0x03 line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register" bitfld.long 0x00 31. " VI_SMMU_ENABLE ,VI translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " VI_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " VI_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " VI_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " VI_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x280++0x03 line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register" bitfld.long 0x00 31. " VI_SMMU_ENABLE ,VI translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x284))&0x80000000)==0x80000000) group.long 0x284++0x03 line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register" bitfld.long 0x00 31. " VIC_SMMU_ENABLE ,VIC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " VIC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x284++0x03 line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register" bitfld.long 0x00 31. " VIC_SMMU_ENABLE ,VIC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x288))&0x80000000)==0x80000000) group.long 0x288++0x03 line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register" bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " XUSB_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " XUSB_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " XUSB_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " XUSB_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x288++0x03 line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register" bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x28C))&0x80000000)==0x80000000) group.long 0x28C++0x03 line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register" bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE ,XUSB DEV translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " XUSB_DEV_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " XUSB_DEV_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " XUSB_DEV_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " XUSB_DEV_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x28C++0x03 line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register" bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE ,XUSB DEV translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x294))&0x80000000)==0x80000000) group.long 0x294++0x03 line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register" bitfld.long 0x00 31. " TSEC_DEV_SMMU_ENABLE ,TSEC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TSEC_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " TSEC_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " TSEC_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " TSEC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x294++0x03 line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register" bitfld.long 0x00 31. " TSEC_SMMU_ENABLE ,TSEC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0x298))&0x80000000)==0x80000000) group.long 0x298++0x03 line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register" bitfld.long 0x00 31. " SMMU_ENABLE ,PPCS1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " ASID ,ASID to use when VA[3332] == 0x0" else group.long 0x298++0x03 line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register" bitfld.long 0x00 31. " PPCS1_SMMU_ENABLE ,PPCS1 translation enable" "Disabled,Enabled" endif endif width 34. textline " " sif (cpuis("TEGRAX2")) group.long 0x404++0x03 line.long 0x00 "USBX_EXTRA_SNAP_LEVELS_0,USBX Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBX ,Response clock-enable override for partition client USBX" "Disabled,Enabled" group.long 0x2B8++0x03 line.long 0x00 "PCX_EXTRA_SNAP_LEVELS_0,PCX Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_PCX ,Response clock-enable override for partition client PCX" "Disabled,Enabled" group.long 0xE08++0x03 line.long 0x00 "MSE2_EXTRA_SNAP_LEVELS_0,MSE2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE2 ,Response clock-enable override for partition client MSE2" "Disabled,Enabled" group.long 0xA7C++0x03 line.long 0x00 "VICPC2_EXTRA_SNAP_LEVELS_0,VICPC2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC2 ,Response clock-enable override for partition client VICPC2" "Disabled,Enabled" group.long 0xA4C++0x03 line.long 0x00 "DFD_EXTRA_SNAP_LEVELS_0,DFD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DFD ,Response clock-enable override for partition client DFD" "Disabled,Enabled" group.long 0xE00++0x03 line.long 0x00 "NVD2_EXTRA_SNAP_LEVELS_0,NVD2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD2 ,Response clock-enable override for partition client NVD2" "Disabled,Enabled" group.long 0xA44++0x03 line.long 0x00 "SDM_EXTRA_SNAP_LEVELS_0,SDM Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM ,Response clock-enable override for partition client SDM" "Disabled,Enabled" group.long 0x2A4++0x03 line.long 0x00 "APB_EXTRA_SNAP_LEVELS_0,APB Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APB ,Response clock-enable override for partition client APB" "Disabled,Enabled" group.long 0xA08++0x03 line.long 0x00 "ISP_EXTRA_SNAP_LEVELS_0,ISP Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_ISP ,Response clock-enable override for partition client ISP" "Disabled,Enabled" group.long 0xA18++0x03 line.long 0x00 "USBD_EXTRA_SNAP_LEVELS_0,USBD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBD ,Response clock-enable override for partition client USBD" "Disabled,Enabled" group.long 0x40C++0x03 line.long 0x00 "MSE_EXTRA_SNAP_LEVELS_0,MSE Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE ,Response clock-enable override for partition client MSE" "Disabled,Enabled" group.long 0xA10++0x03 line.long 0x00 "AUD_EXTRA_SNAP_LEVELS_0,AUD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AUD ,Response clock-enable override for partition client AUD" "Disabled,Enabled" group.long 0xA54++0x03 line.long 0x00 "NIC_EXTRA_SNAP_LEVELS_0,NIC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NIC ,Response clock-enable override for partition client NIC" "Disabled,Enabled" group.long 0xA40++0x03 line.long 0x00 "GK2_EXTRA_SNAP_LEVELS_0,GK2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK2 ,Response clock-enable override for partition client GK2" "Disabled,Enabled" group.long 0xA64++0x03 line.long 0x00 "BPMPDMAPC_EXTRA_SNAP_LEVELS_0,BPMPDMAPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPDMAPC ,Response clock-enable override for partition client BPMPDMAPC" "Disabled,Enabled" group.long 0xE04++0x03 line.long 0x00 "NVD3_EXTRA_SNAP_LEVELS_0,NVD3 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD3 ,Response clock-enable override for partition client NVD3" "Disabled,Enabled" group.long 0x2C0++0x03 line.long 0x00 "SAX_EXTRA_SNAP_LEVELS_0,SAX Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SAX ,Response clock-enable override for partition client SAX" "Disabled,Enabled" group.long 0xA5C++0x03 line.long 0x00 "EQOSPC_EXTRA_SNAP_LEVELS_0,EQOSPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_EQOSPC ,Response clock-enable override for partition client EQOSPC" "Disabled,Enabled" group.long 0xA38++0x03 line.long 0x00 "NVD_EXTRA_SNAP_LEVELS_0,NVD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD ,Response clock-enable override for partition client NVD" "Disabled,Enabled" group.long 0xA50++0x03 line.long 0x00 "SDM1_EXTRA_SNAP_LEVELS_0,SDM1 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM1 ,Response clock-enable override for partition client SDM1" "Disabled,Enabled" group.long 0xA48++0x03 line.long 0x00 "HDAPC_EXTRA_SNAP_LEVELS_0,HDAPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HDAPC ,Response clock-enable override for partition client HDAPC" "Disabled,Enabled" group.long 0xA68++0x03 line.long 0x00 "AONPC_EXTRA_SNAP_LEVELS_0,AONPC Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONPC ,Response clock-enable override for partition client AONPC" "Disabled,Enabled" group.long 0xA04++0x03 line.long 0x00 "SD_EXTRA_SNAP_LEVELS_0,SD Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SD ,Response clock-enable override for partition client SD" "Disabled,Enabled" group.long 0xA84++0x03 line.long 0x00 "DIS2_EXTRA_SNAP_LEVELS_0,DIS2 Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS2 ,Response clock-enable override for partition client DIS2" "Disabled,Enabled" group.long 0x2D8++0x03 line.long 0x00 "VE_EXTRA_SNAP_LEVELS_0,VE Extra Snap Levels 0" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VE ,Response clock-enable override for partition client VE" "Disabled,Enabled" group.long 0xA00++0x03 line.long 0x00 "GK_EXTRA_SNAP_LEVELS_0,GK Extra Snap Levels 0" bitfld.long 0x00 31. " GPU_ENABLE_OOO_RESPONSES ,Enable response mode for GPU and GPU2 read AXICIFs" "Disabled,Enabled" bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK ,Response clock-enable override for partition client GK" "Disabled,Enabled" textline " " endif sif (!cpuis("TEGRAX2")) group.long 0x418++0x03 line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE_0,Memory Controller VPR Override Register" bitfld.long 0x00 31. " SDMMC3A_VPR_OVERRIDE ,SDMMC3A VPR override" "Disabled,Enabled" bitfld.long 0x00 30. " SDMMC2A_VPR_OVERRIDE ,SDMMC2A VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " SDMMC1A_VPR_OVERRIDE ,SDMMC1A VPR override" "Disabled,Enabled" bitfld.long 0x00 26. " DC1_VPR_OVERRIDE ,DC1 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PPCS1_VPR_OVERRIDE ,PPCS1 VPR override" "Disabled,Enabled" bitfld.long 0x00 22. " TSEC_VPR_OVERRIDE ,TSEC VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " XUSB_DEV_VPR_OVERRIDE ,XUSB SEV VPR override" "Disabled,Enabled" bitfld.long 0x00 19. " XUSB_HOST_VPR_OVERRIDE ,XUSB HOST VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " VIC_VPR_OVERRIDE ,VIC VPR override" "Disabled,Enabled" bitfld.long 0x00 17. " VI_VPR_OVERRIDE ,VI VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SATA_VPR_OVERRIDE ,SATA VPR override" "Disabled,Enabled" bitfld.long 0x00 14. " PPCS_VPR_OVERRIDE ,PPCS VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " NVENC_VPR_OVERRIDE ,NVENC VPR override" "Disabled,Enabled" bitfld.long 0x00 9. " MPCORE_VPR_OVERRIDE ,MPCORE VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " ISP2_VPR_OVERRIDE ,ISP2 VPR override" "Disabled,Enabled" bitfld.long 0x00 7. " HDA_VPR_OVERRIDE ,HDA VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " HC_VPR_OVERRIDE ,HC VPR override" "Disabled,Enabled" bitfld.long 0x00 3. " DCB_VPR_OVERRIDE ,DCB VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DC_VPR_OVERRIDE ,DC VPR override" "Disabled,Enabled" bitfld.long 0x00 1. " AVPC_VPR_OVERRIDE ,AVPC VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AFI_VPR_OVERRIDE ,AFI VPR override" "Disabled,Enabled" group.long 0x590++0x03 line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE1_0,Memory Controller VPR OVERRIDE Register" bitfld.long 0x00 16. " NVDEC1_VPR_OVERRIDE ,NVDEC1 VPR override" "Disabled,Enabled" bitfld.long 0x00 15. " TSECB1_VPR_OVERRIDE ,TSECB11 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TSEC1_VPR_OVERRIDE ,TSEC11 VPR override" "Disabled,Enabled" bitfld.long 0x00 13. " TSECB_VPR_OVERRIDE ,TSECB1 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ETR_VPR_OVERRIDE ,ETR1 VPR override" "Disabled,Enabled" bitfld.long 0x00 11. " AXIAP_VPR_OVERRIDE ,AXIAP1 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SE1_VPR_OVERRIDE ,SE11 VPR override" "Disabled,Enabled" bitfld.long 0x00 9. " HC1_VPR_OVERRIDE ,HC11 VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " NVJPG_VPR_OVERRIDE ,NVJPG1 VPR override" "Disabled,Enabled" bitfld.long 0x00 7. " SE_VPR_OVERRIDE ,SE VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " APE_VPR_OVERRIDE ,APE VPR override" "Disabled,Enabled" bitfld.long 0x00 5. " NVDEC_VPR_OVERRIDE ,NVDEC VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PPCS2_VPR_OVERRIDE ,PPCS2 VPR override" "Disabled,Enabled" bitfld.long 0x00 3. " GPUB_VPR_OVERRIDE ,GBUP VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " GPU_VPR_OVERRIDE ,GPU VPR override" "Disabled,Enabled" bitfld.long 0x00 1. " ISP2B_VPR_OVERRIDE ,ISP2B VPR override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SDMMC4A_VPR_OVERRIDE ,SDMMC4A VPR override" "Disabled,Enabled" textline " " group.long 0x600++0x03 line.long 0x00 "SMMUTLB_SET_SELECTION_MASK_0_0,TLB Set Selection Mask" hexmask.long.word 0x00 15.--23. 1. " TLB_SET_SELECTION_MASK_0 ,TLB set selection mask 0" group.long 0x608++0x03 line.long 0x00 "DISPLAY_SNAP_RING_0,Display Arbiter Ring Selection" bitfld.long 0x00 31. " DISPLAY_SNAP_RING_WRITE_ACCESS ,Display snap ring write access" "Enabled,Disabled" bitfld.long 0x00 1. " DISB_SNAP_RING ,DISB snap ring" "RING0,RING1" textline " " bitfld.long 0x00 0. " DIS_SNAP_RING ,DIS snap ring" "RING0,RING1" endif sif (cpuis("TEGRAX2")) group.long 0x648++0x07 line.long 0x00 "VIDEO_PROTECT_BOM_0,Video Protect BOM 0" hexmask.long.word 0x00 20.--31. 0x10 " VIDEO_PROTECT_BOM ,Base address for the VPR address space" line.long 0x04 "VIDEO_PROTECT_SIZE_MB_0,Video Protect Size MB 0" hexmask.long.word 0x04 0.--11. 1. " VIDEO_PROTECT_SIZE_MB ,Size of the VPR region in megabytes" group.long 0x978++0x03 line.long 0x00 "VIDEO_PROTECT_BOM_ADR_HI_0,Video Protect BOM ADR HI 0" bitfld.long 0x00 0.--1. " VIDEO_PROTECT_BOM_ADR_HI ,Higher address bits beyond 32 bits of byte-aligned address of the base address of VPR space" "0,1,2,3" group.long 0x650++0x03 line.long 0x00 "VIDEO_PROTECT_REG_CTRL_0,Control Video Protect Register 0" bitfld.long 0x00 1. " VIDEO_PROTECT_ALLOW_TZ_WRITE_ACCESS ,Allow TrustZone writes to VPR aperature registers" "Disabled,Enabled" bitfld.long 0x00 0. " VIDEO_PROTECT_WRITE_ACCESS ,Sticky bit to control the writes to all VPR aperture registers including this one" "RING0,RING1" textline " " endif rgroup.long 0x654++0x03 line.long 0x00 "ERR_VPR_STATUS_0,Memory Controller Error VPR Status 0" bitfld.long 0x00 20.--21. " ERR_VPR_ADR_HI ,Higher address bits of erring address" "b00,b01,b10,b11" bitfld.long 0x00 18. " ERR_VPR_SWAP ,Error VPR swap" "0,1" textline " " bitfld.long 0x00 17. " ERR_VPR_SECURITY ,Error VPR security" "Nonsecure,Secure" bitfld.long 0x00 16. " ERR_VPR_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_VPR_ADR1 ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111" hexmask.long.byte 0x00 0.--7. 1. " ERR_VPR_ID ,Client identifier" rgroup.long 0x658++0x03 line.long 0x00 "ERR_VPR_ADR_0,Memory Controller Lower Bits Of Erring Address" textline " " sif (cpuis("TEGRAX2")) group.long 0x9BC++0x03 line.long 0x00 "MC_SECURITY_CFG3_0,Memory Controller Security Configuration 3 0" bitfld.long 0x00 0.--1. " SECURITY_BOM_HI ,Higher address bits of the base of the secured region limited to MB granularity" "0,1,2,3" group.long 0xF80++0x07 line.long 0x00 "MC_REGIF_CONFIG_0,Memory Controller REGIF Configuration 0" bitfld.long 0x00 16.--17. " ENABLE_REGIF_HUB ,Enable REGIF HUB" "0,1,2,3" bitfld.long 0x00 8.--11. " ENABLE_REGIF_MC ,Enable REGIF memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ENABLE_REGIF_EMC ,Enable REGIF EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MC_REGIF_BROADCAST_0,Memory Controller REGIF Broadcast 0" bitfld.long 0x04 31. " LOCK_REGIF_CONFIG ,Lock REGIF configuration" "Disabled,Enabled" bitfld.long 0x04 24.--25. " ENABLE_REGIF_BROADCAST_HUB_SID ,Enable REGIF broadcast HUB SID" "0,1,2,3" bitfld.long 0x04 16.--17. " ENABLE_REGIF_BROADCAST_HUB ,Enable REGIF broadcast HUB" "0,1,2,3" textline " " bitfld.long 0x04 8.--11. " ENABLE_REGIF_BROADCAST_MC ,Enable REGIF broadcast memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " ENABLE_REGIF_BROADCAST_EMC ,Enable REGIF broadcast EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xF90++0x0F line.long 0x00 "MC_REGIF_UNICAST0_0,Memory Controller REGIF UNICAST0 0" bitfld.long 0x00 16.--17. " ENABLE_REGIF_UNICAST0_HUB ,Enable REGIF UNICAST0 HUB" "0,1,2,3" bitfld.long 0x00 8.--11. " ENABLE_REGIF_UNICAST0_MC ,Enable REGIF UNICAST0 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ENABLE_REGIF_UNICAST0_EMC ,Enable REGIF UNICAST0 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MC_REGIF_UNICAST1_0,Memory Controller REGIF UNICAST1 0" bitfld.long 0x04 16.--17. " ENABLE_REGIF_UNICAST1_HUB ,Enable REGIF UNICAST1 HUB" "0,1,2,3" bitfld.long 0x04 8.--11. " ENABLE_REGIF_UNICAST1_MC ,Enable REGIF UNICAST1 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " ENABLE_REGIF_UNICAST1_EMC ,Enable REGIF UNICAST1 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "MC_REGIF_UNICAST2_0,Memory Controller REGIF UNICAST2 0" bitfld.long 0x08 16.--17. " ENABLE_REGIF_UNICAST2_HUB ,Enable REGIF UNICAST2 HUB" "0,1,2,3" bitfld.long 0x08 8.--11. " ENABLE_REGIF_UNICAST2_MC ,Enable REGIF UNICAST2 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " ENABLE_REGIF_UNICAST2_EMC ,Enable REGIF UNICAST2 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "MC_REGIF_UNICAST3_0,Memory Controller REGIF UNICAST2 0" bitfld.long 0x0C 16.--17. " ENABLE_REGIF_UNICAST3_HUB ,Enable REGIF UNICAST3 HUB" "0,1,2,3" bitfld.long 0x0C 8.--11. " ENABLE_REGIF_UNICAST3_MC ,Enable REGIF UNICAST3 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " ENABLE_REGIF_UNICAST3_EMC ,Enable REGIF UNICAST3 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xF2C++0x03 line.long 0x00 "MC_HUBC_INTSTATUS_0,Memory Controller HUBC Interrupt Status 0" bitfld.long 0x00 0. " SCRUB_ECC_WR_ACK_INT ,SCRUB ECC WR ACK Interrupt" "Clear,Set" group.long 0xF24++0x07 line.long 0x00 "MC_GLOBAL_INTSTATUS_0,Memory Controller Global Interrupt Status 0" bitfld.long 0x00 24. " COMMON_INTR ,Common interrupt" "Clear,Set" bitfld.long 0x00 17. " HUB1_INTR ,Hub 1 interrupt" "Clear,Set" bitfld.long 0x00 16. " HUB0_INTR ,Hub 0 interrupt" "Clear,Set" textline " " bitfld.long 0x00 3. " MC3_INTR ,Channel 3 interrupt" "Clear,Set" bitfld.long 0x00 2. " MC2_INTR ,Channel 2 interrupt" "Clear,Set" bitfld.long 0x00 1. " MC1_INTR ,Channel 1 interrupt" "Clear,Set" textline " " bitfld.long 0x00 0. " MC0_INTR ,Channel 0 interrupt" "Clear,Set" line.long 0x04 "MC_GLOBAL_CRITICAL_INTSTATUS_0,Memory Controller Global Critical Interrupt Status 0" bitfld.long 0x04 24. " COMMON_CRITICAL_INTR ,Common critical interrupt" "Clear,Set" bitfld.long 0x04 17. " HUB1_CRITICAL_INTR ,Hub 1 critical interrupt" "Clear,Set" bitfld.long 0x04 16. " HUB0_CRITICAL_INTR ,Hub 0 critical interrupt." "Clear,Set" textline " " bitfld.long 0x04 3. " MC3_CRITICAL_INTR ,Channel 3 critical interrupt." "Clear,Set" bitfld.long 0x04 2. " MC2_CRITICAL_INTR ,Channel 2 critical interrupt." "Clear,Set" bitfld.long 0x04 1. " MC1_CRITICAL_INTR ,Channel 1 critical interrupt" "Clear,Set" textline " " bitfld.long 0x04 0. " MC0_CRITICAL_INTR ,Channel 0 critical interrupt" "Clear,Set" endif sif (!cpuis("TEGRAX2")) group.long 0x964++0x03 line.long 0x00 "IRAM_REG_CTRL_0,Access Control Register For IRAM Aperture Programming" bitfld.long 0x00 0. " IRAM_CFG_WRITE_ACCESS ,IRAM configuration write access disable" "No,Yes" group.long 0x664++0x03 line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0 ,Access Control Bit For EMEM_CFG Registers" bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS ,EMEM configuration write access disable" "No,Yes" group.long 0x668++0x07 line.long 0x00 "TZ_SECURITY_CTRL_0,Trustzone Security Control Register" bitfld.long 0x00 0. " CPU_STRICT_TZ_APERTURE_CHECK ,CPU strict TrustZone aperture check enable" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Configuration" bitfld.long 0x04 31. " LIMIT_OUTSTANDING_RING3 ,Limit outstanding RING3" "Disabled,Enabled" bitfld.long 0x04 30. " LIMIT_DURING_HOLDHOFF_OVERRIDE_RING3 ,Limit holdhoff override RING3" "Disabled,Enabled" textline " " hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3 ,Current number of outstanding requests" hexmask.long.word 0x04 0.--8. 1. " ARB_MAX_OUTSTANDING_RING3 ,Maximum number of requests allowed in the arbiter when limit is enabled" group.long 0x670++0x0B line.long 0x00 "SEC_CARVEOUT_BOM_0,Memory Controller Sec Carve Out Bom 0" hexmask.long.word 0x00 20.--31. 0x10 " SEC_CARVEOUT_BOM ,Base address for the SEC carve out address space" line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,Memory Controller Sec Carve Out Size MB 0" hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB ,Size of the SEC carve out region" line.long 0x08 "SEC_CARVEOUT_REG_CTRL_0,Memory Controller Sec Carve Out Register Control 0" bitfld.long 0x08 0. " SEC_CARVEOUT_WRITE_ACCESS ,Sticky bit to control the writes to the other SEC Carve Out registers" "Enabled,Disabled" rgroup.long 0x67C++0x07 line.long 0x00 "ERR_SEC_STATUS_0,Memory Controller Error Sec Status 0" bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI ,Higher address bits of Erring address whose lower bits are available in the ERR_ADR register" "b00,b01,b10,b11" bitfld.long 0x00 18. " ERR_SEC_SWAP ,ERR_SEC_SWAP" "0,1" textline " " bitfld.long 0x00 17. " ERR_SEC_SECURITY ,Set if transaction was secure" "Nonsecure,Secure" bitfld.long 0x00 16. " ERR_SEC_RW ,Direction of the access that caused the error" "Read,Write" textline " " bitfld.long 0x00 12.--14. " ERR_SEC_ADR1 ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111" hexmask.long.byte 0x00 0.--6. 1. " ERR_SEC_ID ,Client identifier of the access that caused the error" line.long 0x04 "ERR_SEC_ADR_0,Memory Controller Lower Address Bits Of Erring Address" group.long 0x684++0x07 line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Config" bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS ,Number of idle ticks before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "STUTTER_CONTROL_0,Memory Controller Stutter Control 0" bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR ,Slowing the EMC during dynamic self refresh" "Disabled,Enabled" group.long 0x6B0++0x17 line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,Snap Arbiter Throttle" bitfld.long 0x00 16.--20. " NISO_THROTTLE_CYCLES_HIGH ,Cycles of throttle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " NISO_THROTTLE_CYCLES ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,Highest Ring Input NISO Outstanding Request Limiter" bitfld.long 0x04 31. " LIMIT_OUTSTANDING_NISO ,Requests into NISO are throttled after the request count reaches ARB_MAX_OUTSTANDING_NISO" "Disabled,Enabled" bitfld.long 0x04 30. " LIMIT_DURING_HOLDOFF_OVERRIDE_NISO ,Overrides the limiting of NISO transactions" "Disabled,Enabled" textline " " hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO ,Current number of outstanding requests" hexmask.long.word 0x04 0.--8. 1. " ARB_MAX_OUTSTANDING_NISO ,The maximum number of requests allowed in the arbiter" line.long 0x08 "EMEM_ARB_NISO_THROTTLE_MASK_0,Highest Ring Input NISO Throttle Mask" bitfld.long 0x08 29. " NISO_THROTTLE_MASK_VICPC ,Include VICPC in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 28. " NISO_THROTTLE_MASK_USBD ,Include USBD in the NISO meta-client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " NISO_THROTTLE_MASK_HOST ,Include HOST in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 23. " NISO_THROTTLE_MASK_SD ,Include SD in the NISO meta client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " NISO_THROTTLE_MASK_GK ,Include GK in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 19. " NISO_THROTTLE_MASK_MSE ,Include MSE in the NISO meta-client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " NISO_THROTTLE_MASK_USBX ,Include USBX in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 9. " NISO_THROTTLE_MASK_SAX ,Include SAX in the NISO meta-client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " NISO_THROTTLE_MASK_PCX ,Include PCX in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 3. " NISO_THROTTLE_MASK_AVP ,Include AVP in the NISO meta-client group for throttling" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " NISO_THROTTLE_MASK_APB ,Include APB in the NISO meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x08 1. " NISO_THROTTLE_MASK_AHB ,Include AHB in the NISO meta-client group for throttling" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_RING0_THROTTLE_MASK_0,Ring0 Input Throttle Mask" bitfld.long 0x0C 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,Enable ARB_OUTSTANDING count includes requests in SMMU" "Disabled,Enabled" bitfld.long 0x0C 15. " RING0_THROTTLE_MASK_RING1_OUTPUT ,Include the RING1 output in the ring0 meta-client group throttling" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " RING0_THROTTLE_MASK_RING1 ,Include the RING1 in the ring0 meta-client group throttling" "Disabled,Enabled" bitfld.long 0x0C 6. " RING0_THROTTLE_MASK_FTOP ,Include FTOP in the ring0 meta-client group throttling" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " RING0_THROTTLE_MASK_PTC ,Include MEM in the ring0 meta-client group for throttling" "Disabled,Enabled" bitfld.long 0x0C 0. " RING0_THROTTLE_MASK_MPCORER ,Include MPCORER in the ring0 meta-client group for throttling" "Disabled,Enabled" textline " " line.long 0x10 "EMEM_ARB_TIMING_RFCPB_0,DRAM Timing TRFCPB" hexmask.long.word 0x10 0.--8. 1. " RFCPB ,Minimum number of cycles between a per-bank auto refresh command and a subsequent per-bank refresh or activate command to that bank" line.long 0x14 "EMEM_ARB_TIMING_CCDMW_0,DRAM Timing TCCDMW" bitfld.long 0x14 0.--5. " CCDMW ,DRAM CAS to CAS delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x6F0++0x07 line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,Per Bank Refresh High Priority Control" hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH ,If the number of requests to open pages is greater or equal this value a per-bank refresh is favoured to be issued" textline " " hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP ,If the number of REFpb requests is less or equal this value per-bank refreshes become low-priority" hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP ,If the number of REFpb requests is greater or equal this value per-bank refreshes become high-priority" line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,Bank Control" bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE ,REFpb simultaneous issue to more than one rank disable" "Enabled,Disabled" textline " " hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,If the number of REFpb requests is less or equal this value per-bank refreshes will force bank closure" hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE ,If the number of REFpb requests is greater or equal this value per-bank refreshes will force bank closure" group.long 0x968++0x03 line.long 0x00 "EMEM_ARB_OVERRIDE_1_0,Memory Controller EMEM ARB Override 1_0" bitfld.long 0x00 11. " MULTI_BANK_REPLAY_OVERRIDE ,Multi-bank replay override enable" "Disabled,Enabled" bitfld.long 0x00 5. " EXPIRE_UPDATE_DEADLOCK_OVERRIDE ,Expire update deadlock override" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--4. " CPU_READ_PAGE_OPEN_POLICY ,CPU read page open policy" "Disabled,All,Eack_active,Early_ack_enable,Po_hint,?..." bitfld.long 0x00 0.--1. " CPU_WRITE_PAGE_OPEN_POLICY ,CPU write page open policy" "Disabled,All,Eack_hint,?..." group.long 0x970++0x07 line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register" bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE ,TSECB flush enable" "Disabled,Enabled" bitfld.long 0x00 12. " ETR_FLUSH_ENABLE ,ETR flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE ,AXIAP flush enable" "Disabled,Enabled" bitfld.long 0x00 8. " NVJPG_FLUSH_ENABLE ,NVJPG flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SE_FLUSH_ENABLE ,SE flush enable" "Disabled,Enabled" bitfld.long 0x00 6. " APE_FLUSH_ENABLE ,APE flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE ,NVDEC flush enable" "Disabled,Enabled" bitfld.long 0x00 2. " GPU_FLUSH_ENABLE ,GPU flush enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE ,ISP2B flush enable" "Disabled,Enabled" bitfld.long 0x00 0. " SDMMC4A_FLUSH_ENABLE ,SDMMC4A flush enable" "Disabled,Enabled" line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Status Register" bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS ,TSECB hot reset status" "Done,In progress" bitfld.long 0x04 12. " ETR_HOTRESET_STATUS ,ETR hot reset status" "Done,In progress" textline " " bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS ,AXIAP hot reset status" "Done,In progress" bitfld.long 0x04 8. " NVJPG_HOTRESET_STATUS ,NVJPG hot reset status" "Done,In progress" textline " " bitfld.long 0x04 7. " SE_HOTRESET_STATUS ,SE hot reset status" "Done,In progress" bitfld.long 0x04 6. " APE_HOTRESET_STATUS ,APE hot reset status" "Done,In progress" textline " " bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS ,NVDEC hot reset status" "Done,In progress" bitfld.long 0x04 2. " GPU_HOTRESET_STATUS ,GPU hot reset status" "Done,In progress" textline " " bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS ,ISP2B hot reset status" "Done,In progress" bitfld.long 0x04 0. " SDMMC4A_HOTRESET_STATUS ,SDMMC4A hot reset status" "Done,In progress" group.long 0x984++0x07 line.long 0x00 "VIDEO_PROTECT_GPU_OVERRIDE_0_0,Memory Controller Video Protect GPU Override 0 0" line.long 0x04 "VIDEO_PROTECT_GPU_OVERRIDE_1_0,Memory Controller Video Protect GPU Override 1 0" hexmask.long.word 0x04 0.--15. 1. " VIDEO_PROTECT_GPU_OVERRIDE_1 ,Video protect GPU override 1" group.long 0x9A0++0x0F line.long 0x00 "MTS_CARVEOUT_BOM_0,Memory Controller MTS Carve Out BOM 0" hexmask.long.word 0x00 20.--31. 1. " MTS_CARVEOUT_BOM ,MTS carve out BOM" line.long 0x04 "MTS_CARVEOUT_SIZE_MB_0,Memory Controller MTS Carve Out Size MB 0" hexmask.long.word 0x04 0.--11. 1. " MTS_CARVEOUT_SIZE_MB ,MTS carve out size MB" line.long 0x08 "MTS_CARVEOUT_ADR_HI_0,Memory Controller Mts Carve Out Address Hi 0" bitfld.long 0x08 0.--1. " MTS_CARVEOUT_BOM_HI ,MTS carve out BOM Hi" "0,1,2,3" line.long 0x0C "MTS_CARVEOUT_REG_CTRL_0,Memory Controller MTS carve out reg control 0" bitfld.long 0x0C 0. " MTS_CARVEOUT_WRITE_ACCESS ,MTS carve out write access" "Enabled,Disabled" group.long 0x9B8++0x07 line.long 0x00 "SMMU_PTC_FLUSH_1_0,Page Table Cache Flush Address Register" bitfld.long 0x00 0.--1. " PTC_FLUSH_ADR_HI ,Physical address of PTE group to match for address flushes" "b00,b01,b10,b11" line.long 0x04 "SECURITY_CFG3_0,Secure/Carveout Region Configuration" bitfld.long 0x04 0.--1. " SECURITY_BOM_HI ,Higher address bits beyond 32 bits of the base of the secured region" "b00,b01,b10,b11" textline " " width 26. if (((per.l(ad:0x7001D000+0x664))&0x01)==0x00) group.long 0x9C0++0x0F line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0" hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0 ,EMEM bank mask 0" line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1" hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1 ,EMEM bank mask 1" line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2" hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2 ,EMEM bank mask 2" line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3" bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..." else rgroup.long 0x9C0++0x0F line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0" hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0 ,EMEM bank mask 0" line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1" hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1 ,EMEM bank mask 1" line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2" hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2 ,EMEM bank mask 2" line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3" bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..." endif group.long 0x9D4++0x03 line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Memory Controller Sec Carve Out Address Hi 0" bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Higher address bits beyond 32 bits of the base address of the SEC carve out space" "b00,b01,b10,b11" if (((per.l(ad:0x7001D000+0xA88))&0x80000000)==0x80000000) group.long 0xA88++0x03 line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register" bitfld.long 0x00 31. " DC1_SMMU_ENABLE ,PPCS translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " DC1_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " DC1_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " DC1_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " DC1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xA88++0x03 line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register" bitfld.long 0x00 31. " DC1_SMMU_ENABLE ,PPCS translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xA94))&0x80000000)==0x80000000) group.long 0xA94++0x03 line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SDMMC1A_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SDMMC1A_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SDMMC1A_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SDMMC1A_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xA94++0x03 line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xA98))&0x80000000)==0x80000000) group.long 0xA98++0x03 line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SDMMC2A_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SDMMC2A_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SDMMC2A_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SDMMC2A_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xA98++0x03 line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xA9C))&0x80000000)==0x80000000) group.long 0xA9C++0x03 line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SDMMC3A_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SDMMC3A_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SDMMC3A_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SDMMC3A_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xA9C++0x03 line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAA0))&0x80000000)==0x80000000) group.long 0xAA0++0x03 line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " SDMMC4A_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " SDMMC4A_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " SDMMC4A_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " SDMMC4A_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAA0++0x03 line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register" bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAA4))&0x80000000)==0x80000000) group.long 0xAA4++0x03 line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register" bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE ,ISP2B translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " ISP2B_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " ISP2B_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " ISP2B_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " ISP2B_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAA4++0x03 line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register" bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE ,ISP2B translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAA8))&0x80000000)==0x80000000) group.long 0xAA8++0x03 line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register" bitfld.long 0x00 31. " GPU_SMMU_ENABLE ,GPU translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " GPU_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " GPU_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " GPU_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " GPU_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAA8++0x03 line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register" bitfld.long 0x00 31. " GPU_SMMU_ENABLE ,GPU translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAAC))&0x80000000)==0x80000000) group.long 0xAAC++0x03 line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register" bitfld.long 0x00 31. " GPUB_SMMU_ENABLE ,GPUB translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " GPUB_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " GPUB_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " GPUB_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " GPUB_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAAC++0x03 line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register" bitfld.long 0x00 31. " GPUB_SMMU_ENABLE ,GPUB translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAB0))&0x80000000)==0x80000000) group.long 0xAB0++0x03 line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register" bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE ,PPCS2 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PPCS2_ASID ,ASID to use for PPCS2 translation" else group.long 0xAB0++0x03 line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register" bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE ,PPCS2 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAB4))&0x80000000)==0x80000000) group.long 0xAB4++0x03 line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register" bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE ,NVDEC translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " NVDEC_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAB4++0x03 line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register" bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE ,NVDEC translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAB8))&0x80000000)==0x80000000) group.long 0xAB8++0x03 line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register" bitfld.long 0x00 31. " APE_SMMU_ENABLE ,APE translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " APE_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAB8++0x03 line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register" bitfld.long 0x00 31. " APE_SMMU_ENABLE ,APE translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xABC))&0x80000000)==0x80000000) group.long 0xABC++0x03 line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register" bitfld.long 0x00 31. " SE_SMMU_ENABLE ,SE translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " SE_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xABC++0x03 line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register" bitfld.long 0x00 31. " SE_SMMU_ENABLE ,SE translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAC0))&0x80000000)==0x80000000) group.long 0xAC0++0x03 line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register" bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE ,NVJPG translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " NVJPG_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAC0++0x03 line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register" bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE ,NVJPG translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAC4))&0x80000000)==0x80000000) group.long 0xAC4++0x03 line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register" bitfld.long 0x00 31. " HC1_SMMU_ENABLE ,HC1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " HC1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAC4++0x03 line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register" bitfld.long 0x00 31. " HC1_SMMU_ENABLE ,HC1 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAC8))&0x80000000)==0x80000000) group.long 0xAC8++0x03 line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register" bitfld.long 0x00 31. " SE1_SMMU_ENABLE ,SE1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " SE1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAC8++0x03 line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register" bitfld.long 0x00 31. " SE1_SMMU_ENABLE ,SE1 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xACC))&0x80000000)==0x80000000) group.long 0xACC++0x03 line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register" bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE ,AXIAP translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " AXIAP_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " AXIAP_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " AXIAP_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " AXIAP_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xACC++0x03 line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register" bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE ,AXIAP translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAD0))&0x80000000)==0x80000000) group.long 0xAD0++0x03 line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register" bitfld.long 0x00 31. " ETR_SMMU_ENABLE ,ETR translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " ETR_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " ETR_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " ETR_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " ETR_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAD0++0x03 line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register" bitfld.long 0x00 31. " ETR_SMMU_ENABLE ,ETR translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAD4))&0x80000000)==0x80000000) group.long 0xAD4++0x03 line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register" bitfld.long 0x00 31. " TSECB_SMMU_ENABLE ,TSECB translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TSECB_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " TSECB_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " TSECB_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " TSECB_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAD4++0x03 line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register" bitfld.long 0x00 31. " TSECB_SMMU_ENABLE ,TSECB translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAD8))&0x80000000)==0x80000000) group.long 0xAD8++0x03 line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register" bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE ,TSEC1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TSEC1_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " TSEC1_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " TSEC1_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " TSEC1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAD8++0x03 line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register" bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE ,TSEC1 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xADC))&0x80000000)==0x80000000) group.long 0xADC++0x03 line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register" bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE ,TSECB1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " TSECB1_ASID_3 ,ASID to use when VA[3332] == 0x3" hexmask.long.byte 0x00 16.--22. 1. " TSECB1_ASID_2 ,ASID to use when VA[3332] == 0x2" hexmask.long.byte 0x00 8.--14. 1. " TSECB1_ASID_1 ,ASID to use when VA[3332] == 0x1" hexmask.long.byte 0x00 0.--6. 1. " TSECB1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xADC++0x03 line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register" bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE ,TSECB1 translation enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001D000+0xAE0))&0x80000000)==0x80000000) group.long 0xAE0++0x03 line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register" bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE ,NVDEC1 translation enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " NVDEC1_ASID ,ASID to use when VA[3332] == 0x0" else group.long 0xAE0++0x03 line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register" bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE ,NVDEC1 translation enable" "Disabled,Enabled" endif textline " " width 34. group.long 0xB84++0x03 line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,Highest Ring Input NISO Throttle Mask" bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,Include DFD in the NISO meta-client group for throttling" "Not included,Included" bitfld.long 0x00 4. " NISO_THROTTLE_MASK_HDAPC ,Include HDAPC,in the NISO meta-client group for throttling" "Not included,Included" bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM ,Include SDM in the NISO meta-client group for throttling" "Not included,Included" textline " " bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,Include GK2 in the NISO meta-client group for throttling" "Not included,Included" bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG ,Include JPG in the NISO meta-client group for throttling" "Not included,Included" group.long 0xB84++0x0F line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,Per-Client Hysteresis Settings" bitfld.long 0x00 9. " HYST_GPUSWR2 ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 8. " HYST_GPUSRD2 ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 7. " HYST_TSECSWRB ,Client TSECWRB is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " HYST_TSECRDB ,Client RSECRDB is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 5. " HYST_ETRW ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " HYST_ETTR ,Client ETTR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " HYST_AXIAPW ,Client AXIAPW is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 2. " HYST_AXIAPR ,Client AXIAPR is treated as a hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " HYST_SESWR ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HYST_SESRD ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled" group.long 0xB94++0x0F line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings" bitfld.long 0x00 9. " ISO_GPUSWR2 ,Client GPUSWR2 is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 8. " ISO_GPUSRD2 ,Client GPUSRD2 is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 7. " ISO_TSECSWRB ,Client TSECWRB is treated as a isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ISO_TSECRDB ,Client RSECRDB is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 5. " ISO_ETRW ,Client ETRW is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 4. " ISO_ETTR ,Client ETTR is treated as a isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ISO_AXIAPW ,Client AXIAPW is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 2. " ISO_AXIAPR ,Client AXIAPR is treated as a isochronous client" "Disabled,Enabled" bitfld.long 0x00 1. " ISO_SESWR ,Client SESWR is treated as a isochronous client" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ISO_SESRD ,Client SESRD is treated as a isochronous client" "Disabled,Enabled" group.long 0xB94++0x0F line.long 0x00 "EMEM_SMMU_TRANSLATION_ENABLE_4_0,Per-Client Translation Settings" rbitfld.long 0x00 9. " SMMU_GPUSWR2_ENABLE ,Client GPUSWR2 translate by SMMU enable" ",Enabled" rbitfld.long 0x00 8. " SMMU_GPUSRD2_ENABLE ,Client GPUSRD2 translate by SMMU enable" ",Enabled" bitfld.long 0x00 7. " SMMU_TSECSWRB_ENABLE ,Client TSECWRB translate by SMMU enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SMMU_TSECRDB_ENABLE ,Client RSECRDB translate by SMMU enable" "Disabled,Enabled" bitfld.long 0x00 5. " SMMU_ETRW_ENABLE ,Client ETRW translate by SMMU enable" "Disabled,Enabled" bitfld.long 0x00 4. " SMMU_ETTR_ENABLE ,Client ETTR translate by SMMU enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SMMU_AXIAPW_ENABLE ,Client AXIAPW translate by SMMU enable" "Disabled,Enabled" bitfld.long 0x00 2. " SMMU_AXIAPR_ENABLE ,Client AXIAPR translate by SMMU enable" "Disabled,Enabled" bitfld.long 0x00 1. " SMMU_SESWR_ENABLE ,Client SESWR translate by SMMU enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SMMU_SESRD_ENABLE ,Client SESRD translate by SMMU enable" "Disabled,Enabled" textline " " group.long 0xBB0++0x13 line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x00 31. " DHYST_SATAR ,Client SATAR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 30. " DHYST_PPCSAHBSLVR ,Client PPCSAHBSLVR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 29. " DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " DHYST_NVENCSRD ,Client NVENCSRD is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 23. " DHYST_HOST1XR ,Client HOST1XR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 22. " DHYST_HOST1XDMAR ,Client HOST1XDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DHYST_HDAR ,Client HDAR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 17. " DHYST_DISPLAYHCB ,Client DISPLAYHCB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 16. " DHYST_DISPLAYHC ,Client DISPLAYHC is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " DHYST_AVPCARM7R ,Client AVPCARM7R is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 14. " DHYST_AFIR ,Client AFIR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 6. " DHYST_DISPLAY0CB ,Client DISPLAY0CB is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DHYST_DISPLAY0C ,Client DISPLAY0C is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 4. " DHYST_DISPLAY0BB ,Client DISPLAY0BB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 3. " DHYST_DISPLAY0B ,Client DISPLAY0B is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DHYST_DISPLAY0AB ,Client DISPLAY0AB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 1. " DHYST_DISPLAY0A ,Client DISPLAY0A is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x00 0. " DHYST_PTCR ,Client PTCR is treated as an dynamic hysteresis client" "Disabled,Enabled" line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x04 29. " DHYST_SATAW ,Client SATAW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 28. " DHYST_PPCSAHBSLVW ,Client PPCSAHBSLVW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 27. " DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " DHYST_MPCOREW ,Client MPCOREW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 24. " DHYST_MPCORELPW ,Client MPCORELPW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 22. " DHYST_HOST1XW ,Client HOST1XW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " DHYST_HDAW ,Client HDAW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 18. " DHYST_AVPCARM7W ,Client AVPCARM7W is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 17. " DHYST_AFIW ,Client AFIW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " DHYST_NVENCSWR ,Client NVENCSWR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x04 7. " DHYST_MPCORER ,Client MPCORER is treated as an dynamic hysteresis client" "Disabled,Enabled" line.long 0x08 "EMEM_ARB_DHYSTERESIS_2_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x08 26. " DHYST_DISPLAYT ,Client DISPLAYT is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 25. " DHYST_GPUSWR ,Client GPUSWR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 24. " DHYST_GPUSRD ,Client GPSURD is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " DHYST_TSECSWR ,Client TSECSWR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 20. " DHYST_TSECSRD ,Client TSECSRD is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 17. " DHYST_ISPWBB ,Client ISPWBB is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " DHYST_ISPWAB ,Client ISPWAB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 14. " DHYST_ISPRAB ,Client ISPRAB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 13. " DHYST_XUSB_DEVW ,Client XUSB DEVW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " DHYST_XUSB_DEVR ,Client XUSB DEVR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 11. " DHYST_XUSB_HOSTW ,Client XUSB HOSTW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 10. " DHYST_XUSB_HOSTR ,Client XUSB HOSTR is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " DHYST_ISPWB ,Client ISPWB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 6. " DHYST_ISPWA ,Client ISPWA is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x08 4. " DHYST_ISPRA ,Client ISPRA is treated as an dynamic hysteresis client" "Disabled,Enabled" line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings" bitfld.long 0x0C 31. " DHYST_NVJPGSWR ,Client NVJPGSWR is treated as dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 30. " DHYST_NVJPGSRD ,Client NVJPGSRD is treated as dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 27. " DHYST_APEW ,Client APEW is treated as dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " DHYST_APER ,Client APER is treated as dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 25. " DHYST_NVDECSWR ,Client NVDECSWR is treated as dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 24. " DHYST_NVDECSRD ,Client NVDECSRD is treated as dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " DHYST_DISPLAYD ,Client DISPLAYD is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 18. " DHYST_VIW ,Client VIW is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 13. " DHYST_VICSWR ,Client VICSWR is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " DHYST_VICSRD ,Client VICSRD is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 7. " DHYST_SDMMCWAB ,Client SDMMCWAB is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 6. " DHYST_SDMMCW ,Client SDMMCW is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " DHYST_SDMMCWAA ,Client SDMMCWAA is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 4. " DHYST_SDMMCWA ,Client SDMMCWA is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 3. " DHYST_SDMMCRAB ,Client SDMMCRAB is treated as an dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " DHYST_SDMMCR ,Client SDMMCR is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 1. " DHYST_SDMMCRAA ,Client SDMMCRAA is treated as an dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x0C 0. " DHYST_SDMCRA ,Client SDMCRA is treated as an dynamic hysteresis client" "Disabled,Enabled" line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Hysteresis Settings" bitfld.long 0x10 9. " DHYST_GPUSWR2 ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 8. " DHYST_GPUSRD2 ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 7. " DHYST_TSECSWRB ,Client TSECWRB is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 6. " DHYST_TSECRDB ,Client RSECRDB is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 5. " DHYST_ETRW ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 4. " DHYST_ETTR ,Client ETTR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " DHYST_AXIAPW ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 2. " DHYST_AXIAPR ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled" bitfld.long 0x10 1. " DHYST_SESWR ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " DHYST_SESRD ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled" group.long 0xBCC++0x03 line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Dynamic Hysteresis Logic Control Register" bitfld.long 0x00 31. " DHYST_ENABLE ,Dynamic hysteresis logic enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " DHYST_BW_MON_INTERVAL ,Dynamic hysteresis bandwidth monitor interval" "8 MCLK,16 MCLK,32 MCLK,64 MCLK" group.long 0xBD0++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 0" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0 ,Timeout delay" group.long 0xBD4++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 1" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_1 ,Timeout delay" group.long 0xBD8++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 2" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_2 ,Timeout delay" group.long 0xBDC++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 3" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_3 ,Timeout delay" group.long 0xBE0++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 4" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_4 ,Timeout delay" group.long 0xBE4++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 5" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_5 ,Timeout delay" group.long 0xBE8++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 6" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_6 ,Timeout delay" group.long 0xBEC++0x03 line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 7" hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_7 ,Timeout delay" textline " " width 25. group.long 0x9DC++0x03 line.long 0x00 "DA_CONFIG0_0,DA Configuration Register" bitfld.long 0x00 0. " NEW_ARB_SCHEME ,New DA arbitration scheme use enable" "Disabled,Enabled" textline " " group.long 0x4E0++0x03 line.long 0x00 "AHB_PTSA_MIN_0,AHB PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_AHB ,DDA minimum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x54C++0x03 line.long 0x00 "AUD_PTSA_MIN_0,AUD PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_AUD ,DDA minimum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x44C++0x03 line.long 0x00 "MLL_MPCORER_PTSA_RATE_0,MLL MPCORER PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MLL_MPCORER ,DDA rate for MLL_MPCORER PTSA" group.long 0x440++0x03 line.long 0x00 "RING2_PTSA_RATE_0,RING2 PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING2 ,DDA rate for RING2 PTSA" group.long 0x530++0x03 line.long 0x00 "USBD_PTSA_RATE_0,USBD PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBD ,DDA rate for USBD PTSA" group.long 0x528++0x03 line.long 0x00 "USBX_PTSA_MIN_0,USBX PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_USBX ,DDA minimum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x534++0x03 line.long 0x00 "USBD_PTSA_MIN_0,USBD PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_USBD ,DDA minimum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4F0++0x03 line.long 0x00 "APB_PTSA_MAX_0,APB PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_APB ,DDA maximum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x584++0x03 line.long 0x00 "JPG_PTSA_RATE_0,JPG PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_JPG ,DDA rate for JPG PTSA" group.long 0x420++0x03 line.long 0x00 "DIS_PTSA_MIN_0,DIS PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_DIS ,DDA minimum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4FC++0x03 line.long 0x00 "AVP_PTSA_MAX_0,AVP PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_AVP ,DDA maximum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4F4++0x03 line.long 0x00 "AVP_PTSA_RATE_0,AVP PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AVP ,DDA rate for AVP PTSA" group.long 0x480++0x03 line.long 0x00 "RING1_PTSA_MIN_0,RING1 PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_RING1 ,DDA minimum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x424++0x03 line.long 0x00 "DIS_PTSA_MAX_0,DIS PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_DIS ,DDA maximum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4D8++0x03 line.long 0x00 "SD_PTSA_MAX_0,SD PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_SD ,DDA maximum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4C4++0x03 line.long 0x00 "MSE_PTSA_RATE_0,MSE PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MSE ,DDA rate for MSE PTSA" group.long 0x558++0x03 line.long 0x00 "VICPC_PTSA_MIN_0,VICPC PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_VICPC ,DDA minimum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4B4++0x03 line.long 0x00 "PCX_PTSA_MAX_0,PCX PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_PCX ,DDA maximum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4A0++0x03 line.long 0x00 "ISP_PTSA_RATE_0,ISP PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_ISP ,DDA rate for ISP PTSA" group.long 0x48C++0x03 line.long 0x00 "A9AVPPC_PTSA_MIN_0,A9AVPPC PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_A9AVPPC ,DDA minimum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x448++0x03 line.long 0x00 "RING2_PTSA_MAX_0,RING2 PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_RING2 ,DDA maximum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x548++0x03 line.long 0x00 "AUD_PTSA_RATE_0,AUD PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AUD ,DDA rate for AUD PTSA" group.long 0x51C++0x03 line.long 0x00 "HOST_PTSA_MIN_0,HOST PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_HOST ,DDA minimum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x454++0x03 line.long 0x00 "MLL_MPCORER_PTSA_MAX_0,MLL_MPCORER PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_MLL_MPCORER ,DDA maximum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4D4++0x03 line.long 0x00 "SD_PTSA_MIN_0,SD PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_SD ,DDA minimum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x47C++0x03 line.long 0x00 "RING1_PTSA_RATE_0,RING1 PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING1 ,DDA rate for RING1 PTSA" group.long 0x588++0x03 line.long 0x00 "JPG_PTSA_MIN_0,JPG PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_JPG ,DDA minimum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x62C++0x03 line.long 0x00 "HDAPC_PTSA_MIN_0,HDAPC PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_HDAPC ,DDA minimum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4F8++0x03 line.long 0x00 "AVP_PTSA_MIN_0,AVP PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_AVP ,DDA minimum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x58C++0x03 line.long 0x00 "JPG_PTSA_MAX_0,JPG PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_JPG ,DDA maximum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x43C++0x03 line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_VE ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x43C++0x03 line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_VE ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x63C++0x03 line.long 0x00 "DFD_PTSA_MAX_0,DFD PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_DFD ,DDA maximum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x554++0x03 line.long 0x00 "VICPC_PTSA_RATE_0,VICPC PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VICPC ,DDA rate for VICPC PTSA" group.long 0x544++0x03 line.long 0x00 "GK_PTSA_MAX_0,GK PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_GK ,DDA maximum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x55C++0x03 line.long 0x00 "VICPC_PTSA_MAX_0,VICPC PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_VICPC ,DDA maximum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x624++0x03 line.long 0x00 "SDM_PTSA_MAX_0,SDM PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_SDM ,DDA maximum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4B8++0x03 line.long 0x00 "SAX_PTSA_RATE_0,SAX PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SAX ,DDA rate for SAX PTSA" group.long 0x4B0++0x03 line.long 0x00 "PCX_PTSA_MIN_0,PCX PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_PCX ,DDA minimum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4EC++0x03 line.long 0x00 "APB_PTSA_MIN_0,APB PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_APB ,DDA minimum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x614++0x03 line.long 0x00 "GK2_PTSA_MIN_0,GK2 PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_GK2 ,DDA minimum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4AC++0x03 line.long 0x00 "PCX_PTSA_RATE_0,PCX PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_PCX ,DDA rate for PCX PTSA" group.long 0x484++0x03 line.long 0x00 "RING1_PTSA_MAX_0,RING1 PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_RING1 ,DDA maximum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x628++0x03 line.long 0x00 "HDAPC_PTSA_RATE_0,HDAPC PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HDAPC ,DDA rate for HDAPC PTSA" group.long 0x450++0x03 line.long 0x00 "MLL_MPCORER_PTSA_MIN_0,MLL_MPCORER PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_MLL_MPCORER ,DDA minimum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x618++0x03 line.long 0x00 "GK2_PTSA_MAX_0,GK2 PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_GK2 ,DDA maximum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x550++0x03 line.long 0x00 "AUD_PTSA_MAX_0,AUD PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_AUD ,DDA maximum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x610++0x03 line.long 0x00 "GK2_PTSA_RATE_0,GK2 PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK2 ,DDA rate for GK2 PTSA" group.long 0x4A8++0x03 line.long 0x00 "ISP_PTSA_MAX_0,ISP PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_ISP ,DDA maximum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x428++0x03 line.long 0x00 "DISB_PTSA_RATE_0,DISB PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DISB ,DDA rate for DISB PTSA" group.long 0x49C++0x03 line.long 0x00 "VE2_PTSA_MAX_0,VE2 PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_VE2 ,DDA maximum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x638++0x03 line.long 0x00 "DFD_PTSA_MIN_0,DFD PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_DFD ,DDA minimum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x50C++0x03 line.long 0x00 "FTOP_PTSA_RATE_0,FTOP PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_FTOP ,DDA rate for FTOP PTSA" group.long 0x488++0x03 line.long 0x00 "A9AVPPC_PTSA_RATE_0,A9AVPPC PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_A9AVPPC ,DDA rate for A9AVPPC PTSA" group.long 0x498++0x03 line.long 0x00 "VE2_PTSA_MIN_0,VE2 PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_VE2 ,DDA minimum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x52C++0x03 line.long 0x00 "USBX_PTSA_MAX_0,USBX PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_USBX ,DDA maximum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x41C++0x03 line.long 0x00 "DIS_PTSA_RATE_0,DIS PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DIS ,DDA rate for DIS PTSA" group.long 0x538++0x03 line.long 0x00 "USBD_PTSA_MAX_0,USBD PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_USBD ,DDA maximum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x490++0x03 line.long 0x00 "A9AVPPC_PTSA_MAX_0,A9AVPPC PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_A9AVPPC ,DDA maximum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x524++0x03 line.long 0x00 "USBX_PTSA_RATE_0,USBX PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBX ,DDA rate for USBX PTSA" group.long 0x514++0x03 line.long 0x00 "FTOP_PTSA_MAX_0,FTOP PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_FTOP ,DDA maximum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x630++0x03 line.long 0x00 "HDAPC_PTSA_MAX_0,HDAPC PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_HDAPC ,DDA maximum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4D0++0x03 line.long 0x00 "SD_PTSA_RATE_0,SD PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SD ,DDA rate for SD PTSA" group.long 0x634++0x03 line.long 0x00 "DFD_PTSA_RATE_0,DFD PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DFD ,DDA rate for DFD PTSA" group.long 0x510++0x03 line.long 0x00 "FTOP_PTSA_MIN_0,FTOP PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_FTOP ,DDA minimum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x61C++0x03 line.long 0x00 "SDM_PTSA_RATE_0,SDM PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SDM ,DDA rate for SDM PTSA" group.long 0x4DC++0x03 line.long 0x00 "AHB_PTSA_RATE_0,AHB PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AHB ,DDA rate for AHB PTSA" group.long 0x460++0x03 line.long 0x00 "SMMU_SMMU_PTSA_MAX_0,SMMU_SMMU PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_SMMU_SMMU ,DDA maximum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x444++0x03 line.long 0x00 "RING2_PTSA_MIN_0,RING2 PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_RING2 ,DDA minimum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x620++0x03 line.long 0x00 "SDM_PTSA_MIN_0,SDM PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_SDM ,DDA minimum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4E8++0x03 line.long 0x00 "APB_PTSA_RATE_0,APB PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_APB ,DDA rate for APB PTSA" group.long 0x4C8++0x03 line.long 0x00 "MSE_PTSA_MIN_0,MSE PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_MSE ,DDA minimum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x518++0x03 line.long 0x00 "HOST_PTSA_RATE_0,HOST PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HOST ,DDA rate for HOST PTSA" group.long 0x434++0x03 line.long 0x00 "VE_PTSA_RATE_0,VE PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE ,DDA rate for VE PTSA" group.long 0x4E4++0x03 line.long 0x00 "AHB_PTSA_MAX_0,AHB PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_AHB ,DDA maximum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4BC++0x03 line.long 0x00 "SAX_PTSA_MIN_0,SAX PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_SAX ,DDA minimum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x45C++0x03 line.long 0x00 "SMMU_SMMU_PTSA_MIN_0,SMMU_SMMU PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_SMMU_SMMU ,DDA minimum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4A4++0x03 line.long 0x00 "ISP_PTSA_MIN_0,ISP PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_ISP ,DDA minimum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x520++0x03 line.long 0x00 "HOST_PTSA_MAX_0,HOST PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_HOST ,DDA maximum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4C0++0x03 line.long 0x00 "SAX_PTSA_MAX_0,SAX PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_SAX ,DDA maximum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x438++0x03 line.long 0x00 "VE_PTSA_MIN_0,VE PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_VE ,DDA minimum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x540++0x03 line.long 0x00 "GK_PTSA_MIN_0,GK PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_GK ,DDA minimum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x4CC++0x03 line.long 0x00 "MSE_PTSA_MAX_0,MSE PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_MSE ,DDA maximum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x430++0x03 line.long 0x00 "DISB_PTSA_MAX_0,DISB PTSA Maximum Value" bitfld.long 0x00 0.--5. " PTSA_MAX_DISB ,DDA maximum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x42C++0x03 line.long 0x00 "DISB_PTSA_MIN_0,DISB PTSA Minimum Value" bitfld.long 0x00 0.--5. " PTSA_MIN_DISB ,DDA minimum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x458++0x03 line.long 0x00 "SMMU_SMMU_PTSA_RATE_0,SMMU_SMMU PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SMMU_SMMU ,DDA rate for SMMU_SMMU PTSA" group.long 0x494++0x03 line.long 0x00 "VE2_PTSA_RATE_0,VE2 PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE2 ,DDA rate for VE2 PTSA" group.long 0x53C++0x03 line.long 0x00 "GK_PTSA_RATE_0,GK PTSA Rate" hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK ,DDA rate for GK PTSA" textline " " group.long 0x960++0x03 line.long 0x00 "PTSA_GRANT_DECREMENT_0,PTSA Grant Decrement Register" bitfld.long 0x00 12. " PTSA_GRANT_DECREMENT_INT ,Integer portion" "0,1" hexmask.long.word 0x00 0.--11. 1. " PTSA_GRANT_DECREMENT_FRAC ,Fractional portion" textline " " width 39. group.long 0x2E4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_AVPC_0_0,Latency Allowance Settings For AVPC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AVPCARM7W ,Number of ticks a request from AVPCARM7W may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_AVPCARM7R ,Number of ticks a request from AVPCARM7R may wait in the EMEM arbiter before becoming high priority request" group.long 0x3A0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_AXIAP_0_0,Latency Allowance Settings For AXIAP Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AXIAPW ,Number of ticks a request from AXIAPW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_AXIAPR ,Number of ticks a request from AXIAPR may wait in the EMEM arbiter before becoming high priority request" group.long 0x380++0x03 line.long 0x00 "LATENCY_ALLOWANCE_XUSB_1_0,Latency Allowance Settings For XUSB_DEV Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_DEVW ,Number of ticks a request from XUSB_DEVW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_XUSB_DEVR ,Number of ticks a request from XUSB_DEVR may wait in the EMEM arbiter before becoming high priority request" group.long 0x384++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_0_0,Latency Allowance Settings For ISP2B Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRAB ,Number of ticks a request from ISPRAB may wait in the EMEM arbiter before becoming high priority request" group.long 0x3BC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAA_0_0,Latency Allowance Settings For SDMMC2A Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAA ,Number of ticks a request from SDMMCWAA may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SDMMWRAA ,Number of ticks a request from SDMMCRAA may wait in the EMEM arbiter before becoming high priority request" group.long 0x3B8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SDMMCA_0_0,Latency Allowance Settings For SDMMC1A Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWA ,Number of ticks a request from SDMMCWA may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SDMMCRA ,Number of ticks a request from SDMMCRA may wait in the EMEM arbiter before becoming high priority request" group.long 0x370++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ISP2_0_0,Latency Allowance Settings For ISP2 Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRA ,Number of ticks a request from ISPRA may wait in the EMEM arbiter before becoming high priority request" group.long 0x3E0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SE_0_0,Latency Allowance Settings For SE Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SESWR ,Number of ticks a request from SESWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SESRD ,Number of ticks a request from SESRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x374++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ISP2_1_0,Latency Allowance Settings For ISP2 Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWB ,Number of ticks a request from ISPWB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPWA ,Number of ticks a request from ISPWA may wait in the EMEM arbiter before becoming high priority request" group.long 0x2E8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DC_0_0,Latency Allowance Settings For DC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0B ,Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0A ,Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request" group.long 0x394++0x03 line.long 0x00 "LATENCY_ALLOWANCE_VIC_0_0,Latency Allowance Settings For VIC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_VICSWR ,Number of ticks a request from VICSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VICSRD ,Number of ticks a request from VICSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x2F8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DCB_1_0,Latency Allowance Settings For DCB Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0CB ,Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request" group.long 0x3D8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_NVDEC_0_0,Latency Allowance Settings For NVDEC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVDECSWR ,Number of ticks a request from NVDECSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_NVDECSRD ,Number of ticks a request from NVDECSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x2FC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DCB_2_0,Latency Allowance Settings For DCB Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHCB ,Number of ticks a request from DISPLAYHCB may wait in the EMEM arbiter before becoming high priority request" group.long 0x390++0x03 line.long 0x00 "LATENCY_ALLOWANCE_TSEC_0_0,Latency Allowance Settings For TSEC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWR ,Number of ticks a request from TSECSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_TSECSRD ,Number of ticks a request from TSECSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x2F0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DC_2_0,Latency Allowance Settings For DC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAYT ,Number of ticks a request from DISPLAYT may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHC ,Number of ticks a request from DISPLAYHC may wait in the EMEM arbiter before becoming high priority request" group.long 0x694++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0AB_0,Scaled Latency Allowance Settings For DISPLAY0AB" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0AB ,(Hi) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0AB ,(Lo) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request" group.long 0x348++0x03 line.long 0x00 "LATENCY_ALLOWANCE_PPCS_1_0,Latency Allowance Settings For PPCS Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVW ,Number of ticks a request from PPCSAHBSLVW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PPCSAHBDMAW ,Number of ticks a request from PPCSSAHBDMAW may wait in the EMEM arbiter before becoming high priority request" group.long 0x37C++0x03 line.long 0x00 "LATENCY_ALLOWANCE_XUSB_0_0,Latency Allowance Settings For XUSB_HOST Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_HOSTW ,Number of ticks a request from XUSB_HOSTW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_XUSB_HOSTR ,Number of ticks a request from XUSB_HOSTR may wait in the EMEM arbiter before becoming high priority request" group.long 0x344++0x03 line.long 0x00 "LATENCY_ALLOWANCE_PPCS_0_0,Latency Allowance Settings For PPCS Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVR ,Number of ticks a request from PPCSAHBSLVR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PPCSAHBDMAR ,Number of ticks a request from PPCSAHBDMAR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3F0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_TSECB_0_0,Latency Allowance Settings For TSECB Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWRB ,Number of ticks a request from TSECSWRB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_TSECSRDB ,Number of ticks a request from TSECSRDB may wait in the EMEM arbiter before becoming high priority request" group.long 0x2E0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_AFI_0_0,Latency Allowance Settings For AFI Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AFIW ,Number of ticks a request from AFIW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_AFIR ,Number of ticks a request from AFIR may wait in the EMEM arbiter before becoming high priority request" group.long 0x698++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0B_0,Latency Allowance Settings For DISPLAY0B" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0B ,(Hi) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0B ,(Lo) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request" group.long 0x2EC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DC_1_0,Latency Allowance Settings For DC Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0C ,Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request" group.long 0x3DC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_APE_0_0,Latency Allowance Settings For APE Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_APEW ,Number of ticks a request from APEW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_APER ,Number of ticks a request from APER may wait in the EMEM arbiter before becoming high priority request" group.long 0x6A0++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0C_0,Latency Allowance Settings For DISPLAY0C" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0C ,(Hi) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0C ,(Lo) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request" group.long 0x3A4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_A9AVP_0_0,Latency Allowance Settings For A9AVP Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_A9AVPSCW ,Number of ticks a request from A9AVPSCW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_A9AVPSCR ,Number of ticks a request from A9AVPSCR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3E8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_GPU2_0_0,Latency Allowance Settings For GPU Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR2 ,Number of ticks a request from GPUSWR2 may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_GPUSRD2 ,Number of ticks a request from GPUSRD2 may wait in the EMEM arbiter before becoming high priority request" group.long 0x2F4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DCB_0_0,Latency Allowance Settings For DCB Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0BB ,Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0AB ,Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request" group.long 0x314++0x03 line.long 0x00 "LATENCY_ALLOWANCE_HC_1_0,Latency Allowance Settings For HC Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XW ,Number of ticks a request from HOST1XW may wait in the EMEM arbiter before becoming high priority request" group.long 0x3C0++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SDMMC_0_0,Latency Allowance Settings For SDMMC3A Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCW ,Number of ticks a request from SDMMCW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SDMMCR ,Number of ticks a request from SDMMCR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3E4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_NVJPG_0_0,Latency Allowance Settings For NVJPG Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVJPGSWR ,Number of ticks a request from NVJPGSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_NVJPGSRD ,Number of ticks a request from NVJPGSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x34C++0x03 line.long 0x00 "LATENCY_ALLOWANCE_PTC_0_0,Latency Allowance Settings For PTC Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PTCR ,Number of ticks a request from PTCR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3EC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ETR_0_0,Latency Allowance Settings For ETR Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ETRW ,Number of ticks a request from ETRW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ETRR ,Number of ticks a request from ETRR may wait in the EMEM arbiter before becoming high priority request" group.long 0x320++0x03 line.long 0x00 "LATENCY_ALLOWANCE_MPCORE_0_0,Latency Allowance Settings For MPCORE Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_MPCOREW ,Number of ticks a request from MPCOREW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_MPCORER ,Number of ticks a request from MPCORER may wait in the EMEM arbiter before becoming high priority request" group.long 0x398++0x03 line.long 0x00 "LATENCY_ALLOWANCE_VI2_0_0,Latency Allowance Settings For VI Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VIW ,Number of ticks a request from VIW may wait in the EMEM arbiter before becoming high priority request" group.long 0x69C++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0BB_0,Latency Allowance Settings For DISPLAY0BB" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0BB ,(Hi) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0BB ,(Lo) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request" group.long 0x6A4++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0CB_0,Latency Allowance Settings For DISPLAY0CB" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0CB ,(Hi) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0CB ,(Lo) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request" group.long 0x350++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SATA_0_0,Latency Allowance Settings For SATA Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SATAW ,Number of ticks a request from SATAW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SATAR ,Number of ticks a request from SATAR may wait in the EMEM arbiter before becoming high priority request" group.long 0x690++0x03 line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0A_0,Latency Allowance Settings For DISPLAY0A" hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0A ,(Hi) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " SCALED_2_ALLOWANCE_LO_DISPLAY0A ,(Lo) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request" group.long 0x310++0x03 line.long 0x00 "LATENCY_ALLOWANCE_HC_0_0,Latency Allowance Settings For HC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HOST1XR ,Number of ticks a request from HOST1XR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XDMAR ,Number of ticks a request from HOST1XDMAR may wait in the EMEM arbiter before becoming high priority request" group.long 0x3C8++0x03 line.long 0x00 "LATENCY_ALLOWANCE_DC_3_0,Latency Allowance Settings For DC Clients" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYD ,Number of ticks a request from DISPLAYD may wait in the EMEM arbiter before becoming high priority request" group.long 0x3AC++0x03 line.long 0x00 "LATENCY_ALLOWANCE_GPU_0_0,Latency Allowance Settings For GPU Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR ,Number of ticks a request from GPUSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_GPUSRD ,Number of ticks a request from GPUSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x3C4++0x03 line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAB_0_0,Latency Allowance Settings For SDNNC4A Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAB ,Number of ticks a request from SDMMCWAB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_SDMMCRAB ,Number of ticks a request from SDMMCRAB may wait in the EMEM arbiter before becoming high priority request" group.long 0x388++0x03 line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_1_0,Latency Allowance Settings For ISP2B Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWBB ,Number of ticks a request from ISPWBB may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPWAB ,Number of ticks a request from ISPWAB may wait in the EMEM arbiter before becoming high priority request" group.long 0x328++0x03 line.long 0x00 "LATENCY_ALLOWANCE_NVENC_0_0,Latency Allowance Settings For NVENC Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVENCSWR ,Number of ticks a request from NVENCSWR may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_NVENCSRD ,Number of ticks a request from NVENCSRD may wait in the EMEM arbiter before becoming high priority request" group.long 0x318++0x03 line.long 0x00 "LATENCY_ALLOWANCE_HDA_0_0,Latency Allowance Settings For HDA Clients" hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HDAW ,Number of ticks a request from HDAW may wait in the EMEM arbiter before becoming high priority request" hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HDAR ,Number of ticks a request from HDAR may wait in the EMEM arbiter before becoming high priority request" endif width 0x0B tree.end tree "EMC1" base ad:0x7001F000 width 21. group.long 0x00++0x13 line.long 0x00 "INSTATUS_0,Interrupt Status Register" sif (cpuis("TEGRAX2")) eventfld.long 0x00 13. " TWEAK_UNDERFLOW_INT ,EMC internal tweak FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 12. " ECC_ERR_BUF_OVF_INT ,ECC Error Buffer overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " ECC_CORR_ERR_INT ,Indicates that ECC logic has detected a correctable error" "No interrupt,Interrupt" eventfld.long 0x00 10. " ECC_UNCORR_ERR_INT ,Indicates that ECC logic has detected an uncorrectable error" "No interrupt,Interrupt" textline " " textfld " " endif eventfld.long 0x00 9. " DLL_LOCK_TIMEOUT_INT ,Indicate a DLL lock timeout has occurred" "No interrupt,Interrupt" eventfld.long 0x00 8. " CCFIFO_OVERFLOW_INT ,Clock change FIFO overflow" "No interrupt,Interrupt" eventfld.long 0x00 7. " DLL_ALARM_INT ,Indicate DLL alarm has been set" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ACCESS_TO_SR_DPD_DEV_INT ,Indicate system attempt to access a self-refresh/deep-powered-down device" "No interrupt,Interrupt" eventfld.long 0x00 5. " MRR_DIVLD_INT ,LPDDR2 MRR data is available to be read" "No interrupt,Interrupt" eventfld.long 0x00 4. " CLKCHANGE_COMPLETE_INT ,CAR/EMC clock-change handshake complete" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " REFRESH_OVERFLOW_INT ,Refresh request overflow timeout" "No interrupt,Interrupt" line.long 0x04 "INTMASK_0,Interrupt Mask Register" sif (cpuis("TEGRAX2")) bitfld.long 0x04 13. " TWEAK_UNDERFLOW_INTMASK ,Mask for tweak FIFO underflow interrupt" "Masked,Unmasked" bitfld.long 0x04 12. " ECC_ERR_BUF_OVF_INTMASK ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked" textline " " bitfld.long 0x04 11. " ECC_CORR_ERR_INTMASK ,Mask for ECC correctable error interrupt" "Masked,Unmasked" bitfld.long 0x04 10. " ECC_UNCORR_ERR_INTMASK ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked" textline " " textfld " " endif bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_INTMASK ,Mask for DLL lock timeout interrupt" "Masked,Unmasked" bitfld.long 0x04 8. " CCFIFO_OVERFLOW_INTMASK ,Mask for clock change FIFO overflow" "Masked,Unmasked" bitfld.long 0x04 7. " DLL_ALARM_INTMASK ,Indicate DLL alarm has been set" "Masked,Unmasked" textline " " bitfld.long 0x04 6. " ACCESS_TO_SR_DPD_DEV_INTMASK ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked" bitfld.long 0x04 5. " MRR_DIVLD_INTMASK ,Mask for MRR data available" "Masked,Unmasked" bitfld.long 0x04 4. " CLKCHANGE_COMPLETE_INTMASK ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked" textline " " bitfld.long 0x04 3. " REFRESH_OVERFLOW_INTMASK ,Mask for refresh request overflow timeout" "Masked,Unmasked" line.long 0x08 "DBG_0,Debug Register" bitfld.long 0x08 31. " AUTOCAL_IGNORE_SWAP ,Registers controlled by autocal FSM do not obey CFG_SWAP setting" "Disabled,Enabled" bitfld.long 0x08 30. " WRITE_ACTIVE_ONLY ,Write active version of the register only" "Disabled,Enabled" bitfld.long 0x08 29. " ALLOW_HOSTIF_DURING_CCFIFO ,Unblock hostif requests for debugging training|DVFS hangs" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " ALLOW_EMC1_PCMACRO_CFG_ACCESS ,EMC1 config access to be sent to the pad macro" "Disabled,Enabled" bitfld.long 0x08 26.--27. " CFG_SWAP ,Configuration swap feature enable" "Active only,Swap,Assembly only,?..." bitfld.long 0x08 25. " AUTOCAL_ALLOW_WRITE_MUX ,Registers controlled by autocal FSM obey WRITE_MUX|WRITE_ACTIVE_ONLY settings" "Disabled,Enabled" textline " " bitfld.long 0x08 24. " CFG_PRIORITY ,Priority of cfg accesses to the DRAM" "Disabled,Enabled" bitfld.long 0x08 13. " SUPPRESS_WRITE_CMD ,Suppress write command sent to DRAM" "Disabled,Enabled" bitfld.long 0x08 12. " SUPPRESS_READ_CMD ,Suppress read command sent to DRAM" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " STRETCH_MRW_RESET ,Stretch MRW RESET command to three clocks" "Disabled,Enabled" bitfld.long 0x08 10. " AP_REQ_BUSY_CTRL ,APC fifo busy signal enable to stall requests to the EMC" "Disabled,Enabled" bitfld.long 0x08 9. " READ_DQM_CTRL ,DQM signal control" "Managed,Always on" textline " " bitfld.long 0x08 2. " FORCE_UPDATE ,Active state update enable" "Disabled,Enabled" bitfld.long 0x08 1. " WRITE_MUX ,Controls state of the writes to the configuration registers" "Assembly,Active" bitfld.long 0x08 0. " READ_MUX ,Controls state of the reads to the configuration registers" "Active,Assembly" line.long 0x0C "CFG_0,Configuration Register" bitfld.long 0x0C 31. " DRAM_CLKSTOP_PD ,DRAM clock stop (power down)" "Disabled,Enabled" bitfld.long 0x0C 30. " DRAM_CLKSTOP_SR ,DRAM clock stop (self-refresh)" "Disabled,Enabled" bitfld.long 0x0C 29. " DRAM_ACPD ,Opportunistic active power down for DRAM controller" "Disabled,Enabled" textline " " bitfld.long 0x0C 28. " DYN_SELF_REF ,DYN_SELF_REF" "Disabled,Enabled" bitfld.long 0x0C 26. " REQACT_ASYNC ,Transfers of activates and transactions from the MC to EMC" "Disabled,Enabled" bitfld.long 0x0C 25. " AUTO_PRE_WR ,MC auto-precharge indication for writes" "Disabled,Enabled" textline " " bitfld.long 0x0C 24. " AUTO_PRE_RD ,MC auto-precharge indication for reads" "Disabled,Enabled" bitfld.long 0x0C 23. " MAN_PRE_WR ,[PMC3] Explicit-precharge in the EMC for writes" "Disabled,Enabled" bitfld.long 0x0C 22. " MAN_PRE_RD ,[PMC3] Explicit-precharge in the EMC for reads" "Disabled,Enabled" textline " " bitfld.long 0x0C 21. " PERIODIC_QRST ,[PMC] Specifies periodic reset FBIO read-data FIFO during normal operation" "Disabled,Enabled" sif (cpuis("TEGRAX2")) bitfld.long 0x0C 19. " WAIT_FOR_NVDISPLAY_READY_B4_CC ,Wait for display ready event to be asserted before acknowledge clock change" "Disabled,Enabled" endif textline " " bitfld.long 0x0C 18. " DSR_VTTGEN_DRV_EN ,Enable VTTGEN controls during DSR" "Disabled,Enabled" bitfld.long 0x0C 16.--17. " EMC2MC_CLK_RATIO ,EMC to MC clock ratio" "2x,1x,4x,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 9. " WAIT_FOR_ISP2B_READY_B4_CC ,Wait for isp2b ready event" "Disabled,Enabled" endif textline " " bitfld.long 0x0C 8. " WAIT_FOR_VI2_READY_B4_CC ,Wait for vi2 ready event" "Disabled,Enabled" bitfld.long 0x0C 7. " WAIT_FOR_ISP2_B4_CC ,Wait for isp2 ready event" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " INVERT_DQM ,Invert DQM polarity" "Not inverted,Inverted" sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 5. " WAIT_FOR_DISPLAYB_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled" bitfld.long 0x0C 4. " WAIT_FOR_DISPLAY_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled" endif line.long 0x10 "ADR_CFG_0,External Memory Address Configuration [System]" bitfld.long 0x10 0. " EMEM_NUMDEV ,Number of populated DRAM devises" "N1,N2" group.long 0x20++0x07 line.long 0x00 "REFCTRL_0,Refresh Control Register" bitfld.long 0x00 31. " REF_VALID ,Enable refresh controller" "Disabled,Enabled" bitfld.long 0x00 0.--1. " DEVICE_REFRESH_DISABLE ,Refresh disable to individual attached device" "0,1,2,3" line.long 0x04 "PIN_0,Controls State Of Selected DRAM Pins" bitfld.long 0x04 17. " PIN_GPIO_EN[1] ,General purpose DRAM I/O[1] enable" "Disabled,Enabled" bitfld.long 0x04 16. " PIN_GPIO_EN[0] ,General purpose DRAM I/O[0] enable" "Disabled,Enabled" bitfld.long 0x04 13. " PIN_GPIO[1] ,General purpose DRAM I/O[1] activate" "Inactive,Active" textline " " bitfld.long 0x04 12. " PIN_GPIO[0] ,General purpose DRAM I/O[0] activate" "Inactive,Active" bitfld.long 0x04 8. " PIN_RESET ,DDR3 RESET# pin level" "Active,Inactive" bitfld.long 0x04 4. " PIN_DQM ,Used to always mask DRAM writes" "Normal,Inactive" textline " " bitfld.long 0x04 2. " PIN_CKE_PER_DEV ,Per device CKE enable" "Disabled,Enabled" bitfld.long 0x04 1. " PIN_CKEB ,Level of the CKEB pin" "Power down,Normal" bitfld.long 0x04 0. " PIN_CKE ,Level of the CKE pin" "Power down,Normal" textline " " group.long 0x28++0x93 line.long 0x00 "TIMING_CONTROL_0,Triggers An Update Of The Timing-related Registers" bitfld.long 0x00 0. " TIMING_UPDATE ,Timing update event" "Disabled,Enabled" line.long 0x04 "RC_0,DRAM RC Timing Parameter" hexmask.long.byte 0x04 0.--6. 1. " RC ,Row cycle time" line.long 0x08 "RFC_0,DRAM RFC Timing Parameter" hexmask.long.word 0x08 0.--9. 1. " RFC ,Auto refresh cycle time" line.long 0x0C "RAS_0,DRAM RAS Timing Parameter" bitfld.long 0x0C 0.--5. " RAS ,Row active time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "RP_0,DRAM RP Timing Parameter" bitfld.long 0x10 0.--5. " RP ,Row precharge time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "R2W_0,DRAM R2W Timing Parameter" bitfld.long 0x14 0.--5. " R2W ,Read to write commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "W2R_0,DRAM W2R Timing Parameter" bitfld.long 0x18 0.--5. " W2R ,Write to read commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "R2P_0,DRAM R2P Timing Parameter" bitfld.long 0x1C 0.--5. " R2P ,Read to precharge commands for the same bank number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x20 "W2P_0,DRAM W2P Timing Parameter" hexmask.long.byte 0x20 0.--6. 1. " W2P ,Write to precharge commands for the same bank number of cycles" line.long 0x24 "RD_RCD_0,DRAM RD_RCD Timing Parameter" bitfld.long 0x24 0.--5. " RD_RCD ,RAS to CAS delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x28 "WR_RCD_0,DRAM WR_RCD Timing Parameter" bitfld.long 0x28 0.--5. " WR_RCD ,Minimum number of cycles between activate and write commands to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x2C "RRD_0,DRAM RRD Timing Parameter" bitfld.long 0x2C 0.--4. " RRD ,Bank X Act to Bank Y Act command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "REXT_0,DRAM REXT Timing Parameter" bitfld.long 0x30 0.--4. " REXT ,Read to read delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "WDV_0,DRAM WDV Timing Parameter" bitfld.long 0x34 0.--5. " WDV ,Write data assertion to the rams delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,Max,?..." line.long 0x38 "QUSE_0,DRAM QUSE Timing Parameter" bitfld.long 0x38 0.--5. " QUSE ,Tells the chip when to look for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x3C "QRST_0,DRAM QRST Timing Parameter" bitfld.long 0x3C 16.--20. " QRST_DURATION ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles" hexmask.long.byte 0x3C 0.--6. 1. " QRST ,Time from expiration of QSAFE until reset is issued" line.long 0x40 "QSAFE_0,DRAM QSAFE Timing Parameter" hexmask.long.byte 0x40 0.--6. 1. " QSAFE ,Time from a read command to when it is safe to issue a QRST" line.long 0x44 "RDV_0,DRAM RDV Timing Parameter" hexmask.long.byte 0x44 0.--6. 1. " RDV ,Time from read command to latching the read data from the pad macros" line.long 0x48 "REFRESH_0,DRAM REFRESH Timing Parameter" hexmask.long.word 0x48 6.--15. 1. " REFRESH ,Interval between refresh requests" bitfld.long 0x48 0.--5. " REFRESH_LO ,REFRESH_LO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x4C "BURST_REFRESH_NUM,Refresh Burst Count" bitfld.long 0x4C 0.--3. " BURST_REFRESH_NUM ,Refresh burst count" "BR1,BR2,BR4,BR8,BR16,BR32,BR64,BR128,BR256,BR512,?..." line.long 0x50 "PDEX2WR_0,DRAM PDEX2WR Timing Parameter" bitfld.long 0x50 0.--5. " PDEX2WR ,Timing delay from exit of power down mode to a write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x54 "PDEX2RD_0,DRAM PREX2RD Timing Parameter" bitfld.long 0x54 0.--5. " PDEX2RD ,Timing delay from exit of power down mode to a read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x58 "PCHG2PDEN_0,DRAM PCHG2PDEN Timing Parameter" bitfld.long 0x58 0.--5. " PCHG2PDEN ,Timing delay from a precharge command to power down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x5C "ACT2PDEN_0,DRAM ACT2PDEN Timing Parameter" bitfld.long 0x5C 0.--5. " ACT2PDEN ,Timing delay from an activate MRS or EMRS command to power down entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x60 "AR2PDEN_0,DRAM AR2PDEN Timing Parameter" hexmask.long.word 0x60 0.--8. 1. " AR2PDEN ,Timing delay from an autorefresh command to power down entry" line.long 0x64 "RW2PDEN_0,DRAM RW2PDEN Timing Parameter" hexmask.long.byte 0x64 0.--6. 1. " RW2PDEN ,Timing delay from a read/write command to power down entry" line.long 0x68 "TXSR_0,DRAM TXSR Timing Parameter" hexmask.long.word 0x68 0.--9. 1. " TXSR ,Cycles between self-refresh exit & first DRAM command that doesn't require a locked DLL" line.long 0x6C "TCKE_0,DRAM TCKE Timing Parameter" bitfld.long 0x6C 0.--5. " TCKE ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x70 "TFAW_0,DRAM TFAW Timing Parameter" hexmask.long.byte 0x70 0.--6. 1. " TFAW ,Width of the FAW for 8-bank devices" line.long 0x74 "TRPAB_0,DRAM TRPAB Timing Parameter" bitfld.long 0x74 0.--5. " TRPAB ,Precharge-all tRP allowance for 8-bank devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x78 "TCLKSTABLE_0,DRAM TCLKSTABLE Timing Parameter" hexmask.long.byte 0x78 0.--6. 1. " TCLKSTABLE ,Minimum number of cycles of a stable clock period" line.long 0x7C "TCLKSTOP_0,DRAM TCLKSTOP Timing Parameter" bitfld.long 0x7C 0.--4. " TCLKSTOP ,Delay from last command to stopping the external clock to DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x80 "TREFBW_0,DRAM TREFBW Timing Parameter" hexmask.long.word 0x80 0.--13. 1. " TREFBW ,Width of the burst-refresh window" line.long 0x84 "TPPD_0,DRAM TPPD Timing Parameter" bitfld.long 0x84 0.--3. " TPPD ,Precharge-precharge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x88 "ODT_WRITE_0,ODT Write Control" bitfld.long 0x88 31. " ENABLE_ODT_DURING_WRITE ,ODT enable during write" "Disabled,Enabled" bitfld.long 0x88 8.--11. " ODT_WR_DURATION ,Indicate how long to assert ODT by" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 5. " SHARE_ONE_ODT ,Share one ODT" "Disabled,Enabled" textline " " bitfld.long 0x88 4. " DRIVE_BOTH_ODT ,ODTs' assertion for the requested or both devices" "Requested,Both" bitfld.long 0x88 0.--3. " ODT_WR_DELAY ,ODT write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8C "PDEX2MRR_0,DRAM PDEX2MRR Timing Parameter" hexmask.long.byte 0x8C 0.--6. 1. " PDEX2MRR ,Precharge-precharge delay" line.long 0x90 "WEXT_0,DRAM WEXT Timing Parameter" bitfld.long 0x90 0.--4. " WEXT ,Write to write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpuis("TEGRAX2")) group.long 0xBC++0x03 line.long 0x00 "TRTM_0,TRTM Timing Parameter" hexmask.long.byte 0x00 0.--6. 1. " TRTM ,Read to MRW delay" group.long 0xF8++0x07 line.long 0x00 "TWTM_0,TWTM DRAM timing parameter" hexmask.long.byte 0x00 0.--6. 1. " TWTM ,Read to MRW/MRR delay" line.long 0x04 "TRATM_0,TRATM Timing Parameter" hexmask.long.byte 0x04 0.--6. 1. " TRATM ,Read with AP to MRW/MRR delay" group.long 0x108++0x07 line.long 0x00 "TWATM_0,TWATM DRAM timing parameter" hexmask.long.byte 0x00 0.--6. 1. " TWATM ,Read with AP to MRW/MRR delay" line.long 0x04 "TR2REF_0,TR2REF DRAM timing parameter" hexmask.long.byte 0x04 0.--6. 1. " TR2REF ,Read to refresh delay" endif group.long 0xC0++0x03 line.long 0x00 "RFC_SLR_0,DRAM RFC_SLR Timing Parameter" hexmask.long.word 0x00 0.--8. 1. " RFS_SLR ,Stagger refresh cycle time between ranks" group.long 0xC4++0x1B line.long 0x00 "MRS_WAIT_CNT2_0,Delay Between A MRS And The Following DRAM Commands" hexmask.long.word 0x00 16.--25. 1. " MRS_EXT2_WAIT_CNT ,Number of EMC clocks to wait before issuing any commands after sending MRS ext2 command" hexmask.long.word 0x00 0.--9. 1. " MRS_EXT1_WAIT_CNT ,Number of EMC clocks to wait before issuing any commands after sending MRS ext1 command" line.long 0x04 "MRS_WAIT_CNT_0,Delay Between A MRS And The Following DRAM Commands" hexmask.long.word 0x04 16.--26. 1. " MRS_LONG_WAIT_CNT ,Number of EMC clocks to wait [MRS long command]" hexmask.long.word 0x04 0.--9. 1. " MRS_SHORT_WAIT_CNT ,Number of EMC clocks to wait [MRS short command]" line.long 0x08 "MRS_0,Command Trigger For MRS" bitfld.long 0x08 30.--31. " MRS_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x08 26.--27. " USE_MRS_CNT ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2" textline " " bitfld.long 0x08 20.--21. " MRS_BA ,Registers to be addressed in DRAM" "MRS,?..." hexmask.long.word 0x08 0.--13. 1. " MRS_ADR ,Mode-register data to be written" line.long 0x0C "EMRS_0,Command Trigger For EMRS" bitfld.long 0x0C 30.--31. " EMRS_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x0C 26.--27. " USE_EMRS_CNT ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2" textline " " bitfld.long 0x0C 20.--21. " EMRS_BA ,Registers to be addressed in DRAM" ",EMRS,EMRS2,EMRS3" hexmask.long.word 0x0C 0.--13. 1. " EMRS_ADR ,Mode-register data to be written" line.long 0x10 "REF_0,Command Trigger For Refresh" bitfld.long 0x10 30.--31. " REF_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." hexmask.long.word 0x10 8.--18. 1. " REF_NUM ,Number of refresh cycles (REF_NUM+1)" textline " " bitfld.long 0x10 1. " REF_NORMAL ,Refresh execution mechanism" "Immediate,Normal" bitfld.long 0x10 0. " REF_CMD ,Refresh to all DRAM banks" "Disabled,Enabled" line.long 0x14 "PRE_0,Command Trigger For PRECHARGE-ALL" bitfld.long 0x14 30.--31. " PRE_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x14 0. " PRE_CMD ,PRECHARGE to all DRAM banks" "Disabled,Enabled" line.long 0x18 "NOP_0,Command Trigger For NOP" bitfld.long 0x18 30.--31. " NOP_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x18 0. " NOP_CMD ,NOP to all DRAM banks" "Disabled,Enabled" if ((per.l(ad:0x7001F000+0xE0)&0x1)==0x1) group.long 0xE0++0x03 line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh" bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,None" bitfld.long 0x00 8. " ACTIVE_SELF_REF ,State of CKE pin while SELF_REF_CMD == ENABLE" "Low,High" bitfld.long 0x00 0. " SREF_REF_CMD ,Issue a SELF_REFRESH command" "Disabled,Enabled" else group.long 0xE0++0x03 line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh" bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,None" bitfld.long 0x00 0. " SREF_REF_CMD ,Issue a SELF_REFRESH command" "Disabled,Enabled" endif group.long 0xE4++0x13 line.long 0x00 "DPD_0,Command Trigger For DPD" bitfld.long 0x00 30.--31. " DPD_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x00 0. " DPD_CMD ,Issue a deep power down command" "Disabled,Enabled" line.long 0x04 "MRW_0,Command Trigger For MRW" bitfld.long 0x04 30.--31. " MRW_DEV_SELECTN ,Active low chip-select" "Both devices,Dev1,Dev0,?..." bitfld.long 0x04 26.--27. " USE_MRW_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x04 16.--23. 0x01 " MRW_MA ,Register address" hexmask.long.byte 0x04 0.--7. 1. " MRW_OP ,Data to be written" line.long 0x08 "MRR_0,Command Trigger For MRR" bitfld.long 0x08 30.--31. " MRR_DEV_SELECTN ,Active-low chip-select" "Illegal,Dev1,Dev0,?..." bitfld.long 0x08 26.--27. " USE_MRR_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x08 16.--23. 0x01 " MRR_MA ,Register address" hexmask.long.word 0x08 0.--15. 1. " MRR_OP ,Data returned" line.long 0x0C "CMDQ_0,Command QUEUE Depth Register" bitfld.long 0x0C 24.--28. " RW_WD_DEPTH ,RW WD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 12.--14. " PRE_DEPTH ,Pre depth" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 8.--10. " ACT_DEPTH ,Act depth" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--4. " RW_DEPTH ,RW depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "MC2EMCQ_0,Command Queue Depth Register" bitfld.long 0x10 24.--27. " MCWD_DEPTH ,MCWD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--10. " MCACT_DEPTH ,MCACT depth" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " MCREQ_DEPTH ,MCREQ depth" "0,1,2,3,4,5,6,7" group.long 0x100++0x07 line.long 0x00 "FBIO_SPARE_0,FBIO Spare Register" hexmask.long.byte 0x00 24.--31. 1. " CFG_FBIO_SPARE_3 ,Config FBIO spare 3" hexmask.long.byte 0x00 16.--23. 1. " CFG_FBIO_SPARE_2 ,Config FBIO spare 2" hexmask.long.byte 0x00 8.--15. 1. " CFG_FBIO_SPARE_1 ,Config FBIO spare 1" textline " " hexmask.long.byte 0x00 2.--7. 1. " CFG_FBIO_SPARE_0 ,Config FBIO spare 0" bitfld.long 0x00 1. " CFG_ADR_EN ,Write once after powering up EMC" "Disabled,Enabled" bitfld.long 0x00 0. " CFG_SWAP_DLL ,Config swap DLL" "0,1" line.long 0x04 "FBIO_CFG5_0,FBIO Configuration Register" bitfld.long 0x04 31. " DATA_BUS_RETURN_TO_ZERO ,Drive data bus back to zero as resting stage" "Disabled,Enabled" bitfld.long 0x04 30. " DATA_BUS_RETURN_TO_ONE ,Drive data bus back to one as resting stage" "Disabled,Enabled" bitfld.long 0x04 28. " MASK_PUTERM_N_DQS_PULLD_DURING_ZQCAL ,Deassert DQ/DQS" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " CMD_BUS_RETURN_TO_ZERO ,Drive command bus back to zero as resting stage" "Disabled,Enabled" bitfld.long 0x04 26. " CMD_BUS_RETURN_TO_ONE ,Drives the command bus back to a one as resting stage" "Disabled,Enabled" bitfld.long 0x04 25. " LPDDR3_DRAM ,Enables differentiation between LPDDR3 DRAM protocol" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " LPDDR3_WR_PREAMBLE_TOGGLE ,Enable LPDDR3 write preamble toggle" "Disabled,Enabled" bitfld.long 0x04 20.--23. " ERR_RD_BUBBLE ,Number of bubbles to be inserted in CMDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 13.--15. " EMC2PMACRO_CFG_QUSE_MODE ,QUSE mode select" "Normal,Always on,Internal LPBK,Pulse INT,,Direct QUSE,?..." bitfld.long 0x04 12. " CMD_2T_TIMING ,2T command timing" "Disabled,Enabled" bitfld.long 0x04 10. " DISABLE_CONCURRENT_AUTOPRE ,Disable reads/writes to a device until precharge command" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " CMD_TX_EN ,Controls TX_EN on the command bricks" "No,Yes" bitfld.long 0x04 4. " DRAM_ ,DRAM width" "X32,X64" bitfld.long 0x04 2.--3. " DRAM_BURST ,Burst length to use for the attached device" "BURST4,BURST8,,BURST16" textline " " bitfld.long 0x04 0.--1. " DRAM_TYPE ,DRAM protocol select for the attached device" "DDR3,LPDDR4,LPDDR2,DDR2" sif (cpuis("TEGRAX2")) group.long 0x110++0x07 line.long 0x00 "ACT_0,Command Trigger: Act" bitfld.long 0x00 30.--31. " SW_ACT_DEV_SELECTN ,Active low chip-select" "0,1,2,3" bitfld.long 0x00 23.--25. " SW_ACT_BANK ,Bank to which the act command needs to be issue" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--15. 1. " SW_ACT_ROW ,Row number to be activated" line.long 0x04 "MEM_INIT_DONE_0,DRAM initiation done" bitfld.long 0x04 0. " MEM_INIT_DONE ,This bit is set by boot sequence when DRAM initiation is done" "0,1" endif group.long 0x114++0x0B line.long 0x00 "FBIO_CFG6_0,FBIO Configuration Register" bitfld.long 0x00 0.--2. " CFG_QUSE_LATE ,FBIO configuration register" "0,1,2,3,4,5,6,7" line.long 0x04 "PDEX2CKE_0,DRAM PDEX2CKE Timing Parameter" bitfld.long 0x04 0.--5. " PDEX2CKE ,Timing delay from exit of powerdown mode to turning on CKE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "CKE2PDEN_0,DRAM CKE2PDEN Timing Parameter" bitfld.long 0x08 0.--5. " CKE2PDEN ,Timing delay from turning off CKE to powerdown entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hgroup.long 0x120++0x03 hide.long 0x00 "CFG_RSV_0,EMC Configuration Reserved" group.long 0x124++0x1F line.long 0x00 "ACPD_CONTROL_0,Threshold For ACPD" hexmask.long.word 0x00 0.--15. 1. " ACPD_THRESHOLD ,Number of idle cycles to wait before allowing power-down entry" line.long 0x04 "MPC_0,MPC CMD (LP4 Only)" bitfld.long 0x04 30.--31. " MPC_DEV ,SELECTN" "0,1,2,3" bitfld.long 0x04 26.--27. " MPC_SUBP_SELECTN ,Active-low subchannel select" "Both,Subp1,Subp0,?..." bitfld.long 0x04 9. " MPC_WR ,Send CAS2 (required for FIFO WR)" "Not send,Send" textline " " bitfld.long 0x04 8. " MPC_RD ,Send CAS2 (required for FIFO RD and DQ_CAL RD" "Not send,Send" bitfld.long 0x04 7. " MPC_CAS2 ,Send CAS2 (required for FIFO RD|WR and DQ_CAL RD)" "Not send,Send" hexmask.long.byte 0x04 0.--6. 1. " MPC_OP ,MPC OP code" line.long 0x08 "EMRS2_0,EMRS2 Command Trigger" bitfld.long 0x08 30.--31. " EMRS2_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x08 26.--27. " USE_EMRS2_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " bitfld.long 0x08 20.--21. " EMRS2_BA ,EMRS2 BA" ",EMRS,EMRS2,EMRS3" hexmask.long.word 0x08 0.--13. 1. " EMRS2_ADR ,Mode register data to be written" line.long 0x0C "EMRS3_0,EMRS3 Command Trigger" bitfld.long 0x0C 30.--31. " EMRS3_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x0C 26.--27. " USE_EMRS3_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " bitfld.long 0x0C 20.--21. " EMRS3_BA ,EMRS3 BA" ",Emrs1,Emrs2,Emrs3" hexmask.long.word 0x0C 0.--13. 1. " EMRS3_ADR ,Mode register data to be written" line.long 0x10 "MRW2_0,MRW2 Command Trigger" bitfld.long 0x10 30.--31. " MRW2_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev2,?..." bitfld.long 0x10 26.--27. " USE_MRW2_CNT ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x10 16.--23. 0x01 " MRW2_MA ,Register address" hexmask.long.byte 0x10 0.--7. 1. " MRW2_OP ,Data to be written" line.long 0x14 "MRW3_0,MRW3 Command Trigger" bitfld.long 0x14 30.--31. " MRW3_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev2,?..." bitfld.long 0x14 26.--27. " USE_MRR_CNT ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x14 16.--23. 0x01 " MRW3_MA ,Register address" hexmask.long.byte 0x14 0.--7. 1. " MRW3_OP ,Data to be written" line.long 0x18 "MRW4_0,MRW4 Command Trigger" bitfld.long 0x18 30.--31. " MRW4_DEV_SELECTN ,Active low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x18 26.--27. " USE_MRR_CNT ,MRS wait count" "Short,Long,Ext1,Ext2" textline " " hexmask.long.byte 0x18 16.--23. 0x01 " MRW4_MA ,Register address" hexmask.long.byte 0x18 0.--7. 1. " MRW4_OP ,Data to be written" line.long 0x1C "CLKEN_OVERRIDE_0,Second Level Clock Enable Override Register" bitfld.long 0x1C 31. " OBS_BUS_CLKEN ,OBS bus clock enable" "Disabled,Enabled" bitfld.long 0x1C 8. " PAD_CONFIG_OVR ,Pad config override" "Disabled,Enabled" bitfld.long 0x1C 7. " TR_CLKEN_OVR ,TR clock enable override" "Disabled,Enabled" textline " " bitfld.long 0x1C 6. " STATS_CLKEN_OVR ,Stats clock enable override" "Disabled,Enabled" bitfld.long 0x1C 3. " RR_CLKEN_OVR ,RR clock enable override" "Disabled,Enabled" bitfld.long 0x1C 2. " DRAMC_CLKEN_OVR ,DRAMC clock enable override" "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " CMDQ_CLKEN_OVR ,CMDQ clock enable override" "Disabled,Enabled" group.long 0x144++0x1B line.long 0x00 "R2R_0,R2R_0 Timing Parameter" bitfld.long 0x00 0.--3. " R2R ,R2R" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "W2W_0 ,W2W_0 Timing Parameter" bitfld.long 0x04 0.--3. " W2W ,W2W" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "EINPUT_0,EINPUT_0 Timing Parameter" bitfld.long 0x08 0.--5. " EINPUT ,Specifies when to assert EINPUT for a read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "EINPUT_DURATION_0,EINPUT_DURATION_0 Timing Parameter" bitfld.long 0x0C 0.--5. " EINPUT_DURATION ,Specifies how long the EINPUT should be asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "PUTERM_EXTRA_0,PUTERM EXTRA 0 Timing Parameter" bitfld.long 0x10 0.--5. " RXTERM ,Specifies when to assert dynamic PUTERM for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "TCKESR_0,TCKESR_0 Timing Parameter" bitfld.long 0x14 0.--5. " TCKESR ,Specifies minimum low CKE pulse or self-refresh mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "TPD_0,TPD_0 Timing Parameter" bitfld.long 0x18 0.--5. " TPD ,Specifies minimum low CKE pulse or power-down mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " width 23. group.long 0x2A4++0x07 line.long 0x00 "AUTO_CAL_CONFIG_0,Auto-calibration Settings For EMC Pads" rbitfld.long 0x00 31. " AUTO_CAL_START ,Starts a complete autocal cycle with measure FSM" "Not started,Started" bitfld.long 0x00 30. " AUTO_CAL_COMP_PAD_FLIP ,Flips the COMP pad slices used for pull-up and pull-down calibration" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " AUTO_CAL_ENABLE ,Specifies whether to use EMC autocal-generated pull-up|pull-down calibration codes or EMC padmacro register settings for drive|termination strength" "Disabled,Enabled" bitfld.long 0x00 25.--28. " AUTO_CAL_NUM_SAMPLES ,Number of samples to take for the majority test" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 24. " AUTO_CAL_CHECK_LOCK ,Whenever COMP pad indicates a lock take multiple samples and latch calibration code" "Disabled,Enabled" bitfld.long 0x00 19.--23. " AUTO_CAL_WAIT_AFTER_EN ,Wait time between enabling COMP pad and changing TX_DRVUP|TX_DRVDN test calibration codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--18. " AUTO_CAL_STEP ,Autocal measure step interval" "0,1,2,3,4,5,6,7" bitfld.long 0x00 11.--15. " AUTO_CAL_UPDATE_DELAY ,Number of EMC clocks to wait before autocal transfer TSM triggers an update FSM cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 10. " AUTO_CAL_UPDATE_STALL ,Autocal update FSM exits any ongoing update cycle and goes to idle state" "Disabled,Enabled" bitfld.long 0x00 9. " AUTO_CAL_MEASURE_STALL ,Autocal measure FSM exits any ongoing VREF cycle and goes to idle state" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " AUTO_CAL_PD_VREF2_EN ,Enables Vref2 pull-down calibration measure cycle" "Disabled,Enabled" bitfld.long 0x00 7. " AUTO_CAL_PD_VREF1_EN ,Enables Vref1 pull-down calibration measure cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " AUTO_CAL_PD_VREF0_EN ,Enables Vref0 pull-down calibration measure cycle" "Disabled,Enabled" bitfld.long 0x00 5. " AUTO_CAL_PD_VREF2_EN ,Enables Vref2 pull-up calibration measure cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " AUTO_CAL_PD_VREF1_EN ,Enables Vref1 pull-up calibration measure cycle" "Disabled,Enabled" bitfld.long 0x00 3. " AUTO_CAL_PD_VREF0_EN ,Enables Vref0 pull-up calibration measure cycle" "Disabled,Enabled" textline " " rbitfld.long 0x00 2. " AUTO_CAL_UPDATE_START ,Triggers an autocal update FSM cycle" "Disabled,Enabled" rbitfld.long 0x00 1. " AUTO_CAL_TRANSFER_START ,Triggers an autocal transfer FSM cycle" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " AUTO_CAL_COMPUTE_START ,Triggers an autocal compute FSM cycle" "Disabled,Enabled" line.long 0x04 "AUTO_CAL_INTERVAL_0,EMC Pad Calibration Interval" hexmask.long.tbyte 0x04 0.--20. 1. " AUTO_CAL_INTERVAL ,Calibration interval value" rgroup.long 0x2AC++0x03 line.long 0x00 "AUTO_CAL_STATUS_0,Auto-calibration Master Status Register" bitfld.long 0x00 24.--29. " AUTO_CAL_VREF0_DRVDN ,Pull-down code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " AUTO_CAL_VREF0_DRVUP ,Pull-up code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 9. " AUTO_CAL_PD_CAL_ZI ,RX_D pin of COMP pad slice used for pull-down calibration" "0,1" bitfld.long 0x00 8. " AUTO_CAL_PU_CAL_ZI ,RX_D pin of COMP pad slice used for pull-up calibration" "0,1" textline " " bitfld.long 0x00 4. " AUTO_CAL_ACTIVE ,Autocal activity status" "Inactive,Active" bitfld.long 0x00 3. " AUTO_CAL_UPDATE_ACTIVE ,Autocal update activity status" "Inactive,Active" textline " " bitfld.long 0x00 2. " AUTO_CAL_TRANSFER_ACTIVE ,Autocal transfer activity status" "Inactive,Active" bitfld.long 0x00 1. " AUTO_CAL_COMPUTE_ACTIVE ,Autocal compute activity status" "Inactive,Active" textline " " bitfld.long 0x00 0. " AUTO_CAL_MEASURE_ACTIVE ,Autocal measure activity status" "Inactive,Active" sif (cpuis("TEGRAX2")) endif group.long 0x2B0++0x03 line.long 0x00 "REQ_CTRL_0,Request Status/Control" bitfld.long 0x00 1. " STALL_ALL_WRITES ,Stall incoming write transactions" "Allow,Stall" bitfld.long 0x00 0. " STALL_ALL_READS ,Stall incoming read transactions" "Allow,Stall" rgroup.long 0x2B4++0x03 line.long 0x00 "EMC_STATUS_0,EMC State-Machine Status" bitfld.long 0x00 27. " ACPD_FSM_IDLE[1] ,Device[1] power-down FSM is idle" "No,Yes" bitfld.long 0x00 26. " ACPD_FSM_IDLE[0] ,Device[0] power-down FSM is idle" "No,Yes" textline " " bitfld.long 0x00 25. " DSR_FSM_IDLE[1] ,Device[1] dynamic self refresh FSM is idle" "No,Yes" bitfld.long 0x00 24. " DSR_FSM_IDLE[0] ,Device[0] dynamic self refresh FSM is idle" "No,Yes" textline " " bitfld.long 0x00 23. " TIMING_UPDATE_STALLED ,Indicates whether timing update triggered by TIMING_CONTROL.TIMING_UPDATE is completed" "Completed,Not completed" bitfld.long 0x00 22. " ZQ_FSM_IDLE ,Indicate auto ZQ state machine is idle" "Not idle,Idle" textline " " bitfld.long 0x00 21. " CFG_ZQ_ACTIVE ,Indicates ZQ configuration access is active" "Not active,Active" bitfld.long 0x00 20. " MRR_DIVLD ,MRR data available for reading" "Not available,Available" textline " " bitfld.long 0x00 16.--19. " MRR_FIFO_SPACE ,MRR FIFO space available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 13. " DRAM_IN_DPD_DEV[1] ,Device[1] in deep powerdown state" "No,Yes" textline " " bitfld.long 0x00 12. " DRAM_IN_DPD_DEV[0] ,Device[0] in deep powerdown state" "No,Yes" bitfld.long 0x00 11. " DRAM_IN_ACTIVE_SELF_REFRESH[1] ,Device[n] has been put into ACTIVE self-refresh" "No,Yes" textline " " bitfld.long 0x00 10. " DRAM_IN_ACTIVE_SELF_REFRESH[0] ,Device[n] has been put into ACTIVE self-refresh" "No,Yes" bitfld.long 0x00 9. " DRAM_IN_SELF_REFRESH_DEV[1] ,Device[1] in active self-refresh" "No,Yes" textline " " bitfld.long 0x00 8. " DRAM_IN_SELF_REFRESH_DEV[0] ,Device[0] in active self-refresh" "No,Yes" bitfld.long 0x00 5. " DRAM_IN_POWERDOWN_DEV[1] ,Device[1] in powerdown state" "No,Yes" textline " " bitfld.long 0x00 4. " DRAM_IN_POWERDOWN_DEV[0] ,Device[0] in powerdown state" "No,Yes" bitfld.long 0x00 2. " NO_OUTSTANDING_TRANSACTIONS ,All non-stalled requests complete status" "Not completed,Completed" textline " " bitfld.long 0x00 0. " EMC_REQ_FIFO_EMPTY ,Request FIFO is empty" "Not empty,Empty" group.long 0x2B8++0x03 line.long 0x00 "CFG_2_0,EMC Configuration" bitfld.long 0x00 31. " DRAMC_PRE_B4_ACT ,Gives priority to activates" "Disabled,Enabled" bitfld.long 0x00 30. " IGNORE_MC_A_BUS ,Ignore the MC *_A_* bus" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " CLR_ACT_BANK_INUSE_WHEN_BANK_CLOSE ,Close|unlock ACTFIFO bank in use bit when the bank is closed" "Disabled,Enabled" bitfld.long 0x00 28. " DONT_CLR_TIMING_COUNTER_WHEN_CLKCHANGE ,Don't clear timing counters when clock change happen" "Disabled,Enabled" textline " " bitfld.long 0x00 26.--27. " DRAMC_WD_CHK_POLICY ,Specifies when there is no need for checking RWAQ_WD FIFO quantity" "WDV >= WDV_CHK_BASE,WDV >= WDV_CHK_BASE+1,WDV => WDV_CHK_BASE+2,Always check" bitfld.long 0x00 25. " ALLOW_REF_DURING_CC_PRE_EXE ,Allow refresh to happen during clock change pre-execute phase" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DSR_STUTTER_ENABLE ,Enables DSR stutter mode|protocol between MC and EMC" "Disabled,Enabled" bitfld.long 0x00 23. " CHK_PDEX2RD_TO_START_WR ,Specifies what to check when starting write" "PDEX2RD,PDEX2WR" textline " " bitfld.long 0x00 22. " ISSUE_PCHGALL_AFTER_REF ,Always generate precharge all bank after refresh" "Disabled,Enabled" bitfld.long 0x00 20. " COMBINED_INTERRUPT_MODE ,Interrupt mode" "Combined,Independent" textline " " bitfld.long 0x00 16. " CLKCHANGE_ACTIVE_SR ,Execute frequency change when DRAM is in active SELF-REF state" "Disabled,Enabled" bitfld.long 0x00 11. " DIS_CNTR_WITH_CFG_TIMING_UPDATE ,Disable|enable reset of timing parameter counters with TIMING_CONTROL.TIMING_UPDATE" "Enabled,Disabled" textline " " bitfld.long 0x00 7. " EARLY_TRFC_8_CLK ,Early TRFC" "16 clocks,8 clocks" bitfld.long 0x00 3.--5. " ZQ_EXTRA_DELAY ,Additional delay to push out ZQCMD" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 2. " REF_AFTER_SREF ,Enables trigger of refresh after exiting self-refresh" "Disabled,Enabled" bitfld.long 0x00 1. " CLKCHANGE_PD_ENABLE ,Force DRAM into power-down during CLKCHANGE" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CLKCHANGE_REQ_ENABLE ,Allows EMC and CAR to handshake on PLL divider|source changes" "Disabled,Enabled" group.long 0x2BC++0x03 line.long 0x00 "CFG_DIG_DLL_0,Configure Digital DLL" rbitfld.long 0x00 31. " CFG_DLL_USE_OVERRIDE_UNTIL_LOCK ,Override_val in use" "No,Yes" rbitfld.long 0x00 30. " DLL_RESET ,Reset pulse sent to DLL's on next shadow update" "No,Yes" textline " " bitfld.long 0x00 27. " CFG_DLL_ALARM_DISABLE ,Disable override of DLL logic" "Disabled,Enabled" rbitfld.long 0x00 26. " CFG_DLL_UPDATE_AT_NXT_REFRESH ,Cause the DLCELL update to occur at the next refresh interval" "No,Yes" textline " " hexmask.long.word 0x00 16.--25. 1. " CFG_DLL_OVERRIDE_VAL ,Value to use in place of DLI output" bitfld.long 0x00 15. " CFG_DLL_TESTEN ,Enable DLL test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " CFG_DLL_QUSE_TESTOUT ,Enable DLL TESTOUT on QUSE pads" "Disabled,Enabled" bitfld.long 0x00 12.--13. " CFG_DLL_TESTSEL ,Select DLL test output" "0,1,2,3" textline " " bitfld.long 0x00 8.--10. " CFG_DLL_UDSET ,Amount of time after DLL will be treated as locked" "16us,64us,12us,512us,1,?..." bitfld.long 0x00 6.--7. " CFG_DLL_MODE ,Controls how frequently DLL runs" "Continuously,Till lock,Periodically,Pre clock" textline " " bitfld.long 0x00 5. " CFG_DLL_LOWSPEED ,Enable DLL for use with low-speed EMCCLK operation" "Disabled,Enabled" rbitfld.long 0x00 4. " CFG_DLL_STALL_RW_UNTIL_LOCK ,Stall all RW traffic until DLL locks by EMC" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CFG_DLL_STALL_ALL_TRAFFIC ,Enable stalling of all DRAM traffic" "Disabled,Enabled" bitfld.long 0x00 2. " CFG_DLL_OVERRIDE_EN ,Override DLL's DLI output with OVERRIDE_VAL" "Disabled,Enabled" textline " " rbitfld.long 0x00 1. " CFG_DLL_STALL_ALL_UNTIL_LOCK ,Stall all traffic until DLL locks" "Disabled,Enabled" bitfld.long 0x00 0. " CFG_DLL_EN ,Enable digital DLL" "Disabled,Enabled" if ((per.l(ad:0x7001F000+0x2BC)&0xC0)==0x80) group.long 0x2C0++0x03 line.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs" hexmask.long.word 0x00 0.--15. 1. " CFG_DLL_RUN_PERIOD ,Interval between runs in uSec" else hgroup.long 0x2C0++0x03 hide.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs" endif rgroup.long 0x2C4++0x03 line.long 0x00 "DIG_DLL_STATUS_0,Digital DLL Status" bitfld.long 0x00 18. " DLL_ALARM_MIN ,DLL alarm MIN status" "No alarm,Alarm" bitfld.long 0x00 17. " DLL_PRIV_UPDATED ,DLL private update status" "Not updated,Updated" textline " " bitfld.long 0x00 16. " DLLCAL_IN_PROGRESS ,DLL calibration in-progress status" "Done,In progress" bitfld.long 0x00 15. " DLL_LOCK ,DLL lock status" "Not locked,Locked" textline " " bitfld.long 0x00 14. " DLL_ALARM ,DLL alarm status" "No alarm,Alarm" bitfld.long 0x00 13. " DLL_LOCK_TIMEOUT ,DLL lock timeout status" "No timeout,Timeout" textline " " hexmask.long.word 0x00 0.--10. 1. " DLL_OUT ,DLL_OUT" group.long 0x2C8++0x13 line.long 0x00 "CFG_DIG_DLL_1_0,Digital DLL Configuration" bitfld.long 0x00 12.--15. " CFG_DLL_WAIT_BEFORE_UPDATE ,Number of clocks to stall before DLL update sent to pad macros" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 6.--11. " DLL_NUM_STALL_CYCLES ,Number of clocks to stall after DLL update sent to pad macros" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 1.--5. " CFG_DLL_UPDATE_TIMEOUT ,Timeout if waiting for idle|refresh" "No timeout,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0. " CFG_DLL_UPDATE_IDLE ,Update dig DLL during idle" "Disabled,Enabled" line.long 0x04 "RDV_MASK_0,RDV_MASK_0 DRAM Timing Parameter" hexmask.long.byte 0x04 0.--6. 1. " RDV_MASK ,Programmed to RDV" line.long 0x08 "WDV_MASK_0 ,WDV_MASK_0 DRAM Timing Parameter" bitfld.long 0x08 0.--5. " WDV_MASK ,Programmed to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "RDV_EARLY_MASK_0,RDV_EARLY_MASK_0 DRAM Timing Parameter" hexmask.long.byte 0x0C 0.--6. 1. " RDV_EARLY_MASK ,Programmed to RDV_EARLY" line.long 0x10 "RDV_EARLY_0,RDV_EARLY_0 DRAM Timing Parameter" hexmask.long.byte 0x10 0.--6. 1. " RDV_EARLY ,Time from read command to latching the read data from the pad macros" sif cpuis("TEGRAX2") elif (cpuis("TEGRAX1")) group.long 0x2DC++0x03 line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_TERM_SLOPE ,Slope for DQS term" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_DQ_TERM_SLOPE ,Slope for DQ term value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_TERM_OFFSET ,2's complement offset for DQS term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_DQ_TERM_OFFSET ,2's complement offset for DQ term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif (cpuis("TEGRAX2")) endif group.long 0x2E0++0x0F line.long 0x00 "ZCAL_INTERVAL_0,ZCAL_INTERVAL_0 Configure ZQ Calibration" hexmask.long.word 0x00 10.--23. 1. " ZCAL_INTERVAL_HI ,Number of microseconds to wait between issuance of ZCAL_MRW_CMD" hexmask.long.word 0x00 0.--9. 1. " ZCAL_INTERVAL_LO ,ZCAL_INTERVAL_LO" line.long 0x04 "ZCAL_WAIT_CNT_0,ZCAL_WAIT_CNT_0 Configure ZQ Calibration" bitfld.long 0x04 31. " ZCAL_RESISTOR_SHARED ,ZQ resistor is shared across ranks" "Disabled,Enabled" bitfld.long 0x04 16.--21. " ZCAL_LATCH_CNT ,(LPDDR4 only) Number of EMC clocks to wait before issuing any commands after sending MPC ZWCAL_LATCH command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.word 0x04 0.--10. 1. " ZCAL_WAIT_CNT ,Number of EMC clocks to wait before issuing any commands after sending ZCAL_MRW_CMD" line.long 0x08 "ZCAL_MRW_CMD_0,ZCAL_MRW_CMD_0 Configure ZQ Calibration" bitfld.long 0x08 30.--31. " ZQ_MRW_DEV_SELECTN ,Active-low chip-select" "Both,Dev1,Dev0,?..." hexmask.long.byte 0x08 16.--23. 1. " ZQ_MRW_MA ,MRW MA field to be sent after ZCAL_INTERVAL" textline " " hexmask.long.byte 0x08 0.--7. 1. " ZQ_MRW_OP ,MRW OP field to be sent after ZCAL_INTERVAL" line.long 0x0C "ZQ_CAL_0,Trigger A Single ZQ Calibration" bitfld.long 0x0C 30.--31. " ZQ_CAL_DEV_SELECTN ,Active-low chip-select" "Both,Dev1,Dev0,Neither" bitfld.long 0x0C 4. " ZQ_CAL_LENGTH ,Indicate short or long ZQ calibration" "Short,Long" textline " " bitfld.long 0x0C 1. " ZQ_LATCH_CMD ,(LPDDR4 only) Issues a ZQ latch command" "0,1" bitfld.long 0x0C 0. " ZQ_CAL_CMD ,(DDR3 only) Issues a ZQ calibration command" "0,1" group.long 0x2F4++0x03 line.long 0x00 "XM2COMPPADCTRL3_0,Autocal COMP Pad Control Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 20.--23. " XM2COMP_VTTLP_VDDA_LVL ,[PMC] Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " endif bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PD_E_WKPD ,Enable weak pull-down" "Disabled,Enabled" bitfld.long 0x00 16. " EMC2TMC_CFG_XM2COMP_PD_E_WKPU ,Enable weak pull-up" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PD_DRVDN_ZCTRL ,Drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x00 12.--13. " EMC2TMC_CFG_XM2COMP_PD_DRVUP_ZCTRL ,Drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PD_VDDA_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,11" bitfld.long 0x00 8.--9. " EMC2TMC_CFG_XM2COMP_PD_VAUXP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,11" textline " " bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PD_VCLAMP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,11" bitfld.long 0x00 2.--5. " EMC2TMC_CFG_XM2COMP_PD_TEST_MODE ,Test mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PD_RX_MODE ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1" sif (cpuis("TEGRAX2")) elif (cpuis("TEGRAX1")) group.long 0x2f8++0x03 line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register" bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PD_VREF1_SEL ,IVREF_LVL for Vref1 pull-down calibration measure cycle" textline " " bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PU_VREF1_SEL ,IVREF_LVL for Vref1 pull-up calibration measure cycle" textline " " bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_VREF0_SEL ,IVREF_LVL for Vref0 pull-down calibration measure cycle" textline " " bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_VREF0_SEL ,IVREF_LVL for Vref0 pull-up calibration measure cycle" endif sif (cpuis("TEGRAX2")) elif (cpuis("TEGRAX1")) group.long 0x300++0x03 line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register" bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_VREF2_SEL ,IVREF_LVL for Vref2 pull-down calibration measure cycle" textline " " bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_VREF2_SEL ,IVREF_LVL for Vref2 pull-up calibration measure cycle" endif textline " " width 35. sif (cpuis("TEGRAX2")) elif (cpuis("TEGRAX1")) group.long 0x30C++0x03 line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register" bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT ,Select test output" "Disabled,Enabled" bitfld.long 0x00 9. " EMC2TMC_CFG_XM2COMP_E_PWRD ,Operation type" "Normal,IDDQ test" textline " " bitfld.long 0x00 4.--6. " EMC2TMC_CFG_XM2COMP_BG_SETUP ,Temperature coefficient pin" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " EMC2TMC_CFG_XM2COMP_BG_MODE ,Regulator mode" "HIGHPERF,LOWPOWER" textline " " bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_MEM_MODE ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU" endif group.long 0x310++0x0F line.long 0x00 "FDPD_CTRL_DQ_0,DPD Settle Times Configuration Register" bitfld.long 0x00 30.--31. " DQ_PHASE_MIN ,DPD phase lower limiter" "0,1,2,3" sif (!cpuis("TEGRAX2")) bitfld.long 0x00 29. " CMD_DPD_RAMP_ENABLE ,Enables the ramp feature on command" "Disabled,Enabled" endif textline " " bitfld.long 0x00 24.--28. " DQ_DPD_EXIT_DELAY ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. " DQ_PHASE_RAMP_IN_TIME ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--16. " DQ_PHASE_RAMP_OUT_TIME ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--11. " DQ_PHASE_HOLD_MIN ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. " DQ_DPD_ENTRY_DELAY ,Initial delay after idle before starting the FDPD ramp process" line.long 0x04 "FDPD_CTRL_CMD_0,DPD Settle Times Configuration Register" bitfld.long 0x04 30.--31. " CMD_PHASE_MIN ,DPD phase lower limiter" "0,1,2,3" textline " " bitfld.long 0x04 29. " CMD_DPD_RAMP_ENABLE ,Enables the ramp feature on cmd" "Disabled,Enabled" bitfld.long 0x04 24.--28. " CMD_DPD_EXIT_DELAY ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 20.--23. " CMD_PHASE_RAMP_IN_TIME ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--16. " CMD_PHASE_RAMP_OUT_TIME ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 8.--11. " CMD_PHASE_HOLD_MIN ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 0.--7. 1. " CMD_DPD_ENTRY_DELAY ,Initial delay after idle before starting the FDPD ramp process" line.long 0x08 "PMACRO_CMD_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On CMD Channels Control Register" bitfld.long 0x08 16.--17. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT8 ,Assigned to dqs_tx_pwrd" "0,1,2,3" bitfld.long 0x08 14.--15. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT7 ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3" textline " " bitfld.long 0x08 12.--13. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT6 ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3" bitfld.long 0x08 10.--11. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT5 ,Assigned to RFU[13] as spare" "0,1,2,3" textline " " bitfld.long 0x08 8.--9. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT4 ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3" bitfld.long 0x08 6.--7. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT3 ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3" textline " " bitfld.long 0x08 4.--5. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT2 ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3" bitfld.long 0x08 2.--3. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT1 ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3" textline " " bitfld.long 0x08 0.--1. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT0 ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3" line.long 0x0C "PMACRO_DATA_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On DATA Channels Control Register" bitfld.long 0x0C 16.--17. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT8 ,Assigned to dqs_tx_pwrd" "0,1,2,3" bitfld.long 0x0C 14.--15. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT7 ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3" textline " " bitfld.long 0x0C 12.--13. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT6 ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3" bitfld.long 0x0C 10.--11. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT5 ,Assigned to RFU[13] as spare" "0,1,2,3" textline " " bitfld.long 0x0C 8.--9. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT4 ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3" bitfld.long 0x0C 6.--7. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT3 ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3" textline " " bitfld.long 0x0C 4.--5. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT2 ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3" bitfld.long 0x0C 2.--3. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT1 ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3" textline " " bitfld.long 0x0C 0.--1. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT0 ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3" group.long 0x324++0x03 line.long 0x00 "SCRATCH0_0,Scratch Register For General Use" group.long 0x330++0x07 line.long 0x00 "PMACRO_BRICK_CTRL_RFU1_0,Lower 16 RFU Pin Of The IOBRICK Control Register" hexmask.long.word 0x00 16.--31. 1. " DATA_BRICK_CTRL_RFU1 ,Data brick control RFU1" hexmask.long.word 0x00 0.--15. 1. " CMD_BRICK_CTRL_RFU1 ,Command brick control RFU1" line.long 0x04 "PMACRO_BRICK_CTRL_RFU2_0,Upper 16 RFU Pin Of The IOBRICK Control Register" hexmask.long.word 0x04 16.--31. 1. " DATA_BRICK_CTRL_RFU2 ,Data brick control RFU2" hexmask.long.word 0x04 0.--15. 1. " CMD_BRICK_CTRL_RFU2 ,Command brick control RFU2" group.long 0x380++0x0B line.long 0x00 "CMD_MAPPING_CMD0_0_0,Command Mapping Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " CMD0_DQ3_MAP ,Mapping of CMD brick 0 data pin 3" hexmask.long.byte 0x00 16.--22. 1. " CMD0_DQ2_MAP ,Mapping of CMD brick 0 data pin 2" textline " " hexmask.long.byte 0x00 8.--14. 1. " CMD0_DQ1_MAP ,Mapping of CMD brick 0 data pin 1" hexmask.long.byte 0x00 0.--6. 1. " CMD0_DQ0_MAP ,Mapping of CMD brick 0 data pin 0" line.long 0x04 "CMD_MAPPING_CMD0_1_0,Command Mapping Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " CMD0_DQ7_MAP ,Mapping of CMD brick 0 data pin 7" hexmask.long.byte 0x04 16.--22. 1. " CMD0_DQ6_MAP ,Mapping of CMD brick 0 data pin 6" textline " " hexmask.long.byte 0x04 8.--14. 1. " CMD0_DQ5_MAP ,Mapping of CMD brick 0 data pin 5" hexmask.long.byte 0x04 0.--6. 1. " CMD0_DQ4_MAP ,Mapping of CMD brick 0 data pin 4" line.long 0x08 "CMD_MAPPING_CMD0_2_0,Command Mapping Configuration Register" bitfld.long 0x08 24.--27. " CMD0_DQ_CMD_MAP ,Mapping of CMD brick 0 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." hexmask.long.byte 0x08 16.--22. 1. " CMD0_DQSN_MAP ,Mapping of CMD brick 0 DQSN pin" textline " " hexmask.long.byte 0x08 8.--14. 1. " CMD0_DQSP_MAP ,Mapping of CMD brick 0 DQSP pin" hexmask.long.byte 0x08 0.--6. 1. " CMD0_DQ8_MAP ,Mapping of CMD brick 0 data pin 8" group.long 0x38C++0x0B line.long 0x00 "CMD_MAPPING_CMD1_0_0,Command Mapping Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " CMD1_DQ3_MAP ,Mapping of CMD brick 1 data pin 3" hexmask.long.byte 0x00 16.--22. 1. " CMD1_DQ2_MAP ,Mapping of CMD brick 1 data pin 2" textline " " hexmask.long.byte 0x00 8.--14. 1. " CMD1_DQ1_MAP ,Mapping of CMD brick 1 data pin 1" hexmask.long.byte 0x00 0.--6. 1. " CMD1_DQ0_MAP ,Mapping of CMD brick 1 data pin 0" line.long 0x04 "CMD_MAPPING_CMD1_1_0,Command Mapping Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " CMD1_DQ7_MAP ,Mapping of CMD brick 1 data pin 7" hexmask.long.byte 0x04 16.--22. 1. " CMD1_DQ6_MAP ,Mapping of CMD brick 1 data pin 6" textline " " hexmask.long.byte 0x04 8.--14. 1. " CMD1_DQ5_MAP ,Mapping of CMD brick 1 data pin 5" hexmask.long.byte 0x04 0.--6. 1. " CMD1_DQ4_MAP ,Mapping of CMD brick 1 data pin 4" line.long 0x08 "CMD_MAPPING_CMD1_2_0,Command Mapping Configuration Register" bitfld.long 0x08 24.--27. " CMD1_DQ_CMD_MAP ,Mapping of CMD brick 1 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." hexmask.long.byte 0x08 16.--22. 1. " CMD1_DQSN_MAP ,Mapping of CMD brick 1 DQSN pin" textline " " hexmask.long.byte 0x08 8.--14. 1. " CMD1_DQSP_MAP ,Mapping of CMD brick 1 DQSP pin" hexmask.long.byte 0x08 0.--6. 1. " CMD1_DQ8_MAP ,Mapping of CMD brick 1 data pin 8" group.long 0x398++0x0B line.long 0x00 "CMD_MAPPING_CMD2_0_0,Command Mapping Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " CMD2_DQ3_MAP ,Mapping of CMD brick 2 data pin 3" hexmask.long.byte 0x00 16.--22. 1. " CMD2_DQ2_MAP ,Mapping of CMD brick 2 data pin 2" textline " " hexmask.long.byte 0x00 8.--14. 1. " CMD2_DQ1_MAP ,Mapping of CMD brick 2 data pin 1" hexmask.long.byte 0x00 0.--6. 1. " CMD2_DQ0_MAP ,Mapping of CMD brick 2 data pin 0" line.long 0x04 "CMD_MAPPING_CMD2_1_0,Command Mapping Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " CMD2_DQ7_MAP ,Mapping of CMD brick 2 data pin 7" hexmask.long.byte 0x04 16.--22. 1. " CMD2_DQ6_MAP ,Mapping of CMD brick 2 data pin 6" textline " " hexmask.long.byte 0x04 8.--14. 1. " CMD2_DQ5_MAP ,Mapping of CMD brick 2 data pin 5" hexmask.long.byte 0x04 0.--6. 1. " CMD2_DQ4_MAP ,Mapping of CMD brick 2 data pin 4" line.long 0x08 "CMD_MAPPING_CMD2_2_0,Command Mapping Configuration Register" bitfld.long 0x08 24.--27. " CMD2_DQ_CMD_MAP ,Mapping of CMD brick 2 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." hexmask.long.byte 0x08 16.--22. 1. " CMD2_DQSN_MAP ,Mapping of CMD brick 2 DQSN pin" textline " " hexmask.long.byte 0x08 8.--14. 1. " CMD2_DQSP_MAP ,Mapping of CMD brick 2 DQSP pin" hexmask.long.byte 0x08 0.--6. 1. " CMD2_DQ8_MAP ,Mapping of CMD brick 2 data pin 8" group.long 0x3A4++0x0B line.long 0x00 "CMD_MAPPING_CMD3_0_0,Command Mapping Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " CMD3_DQ3_MAP ,Mapping of CMD brick 3 data pin 3" hexmask.long.byte 0x00 16.--22. 1. " CMD3_DQ2_MAP ,Mapping of CMD brick 3 data pin 2" textline " " hexmask.long.byte 0x00 8.--14. 1. " CMD3_DQ1_MAP ,Mapping of CMD brick 3 data pin 1" hexmask.long.byte 0x00 0.--6. 1. " CMD3_DQ0_MAP ,Mapping of CMD brick 3 data pin 0" line.long 0x04 "CMD_MAPPING_CMD3_1_0,Command Mapping Configuration Register" hexmask.long.byte 0x04 24.--30. 1. " CMD3_DQ7_MAP ,Mapping of CMD brick 3 data pin 7" hexmask.long.byte 0x04 16.--22. 1. " CMD3_DQ6_MAP ,Mapping of CMD brick 3 data pin 6" textline " " hexmask.long.byte 0x04 8.--14. 1. " CMD3_DQ5_MAP ,Mapping of CMD brick 3 data pin 5" hexmask.long.byte 0x04 0.--6. 1. " CMD3_DQ4_MAP ,Mapping of CMD brick 3 data pin 4" line.long 0x08 "CMD_MAPPING_CMD3_2_0,Command Mapping Configuration Register" bitfld.long 0x08 24.--27. " CMD3_DQ_CMD_MAP ,Mapping of CMD brick 3 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." hexmask.long.byte 0x08 16.--22. 1. " CMD3_DQSN_MAP ,Mapping of CMD brick 3 DQSN pin" textline " " hexmask.long.byte 0x08 8.--14. 1. " CMD3_DQSP_MAP ,Mapping of CMD brick 3 DQSP pin" hexmask.long.byte 0x08 0.--6. 1. " CMD3_DQ8_MAP ,Mapping of CMD brick 3 data pin 8" group.long 0x3B0++0x17 line.long 0x00 "CMD_MAPPING_BYTE_0,Command Mapping Configuration Register" bitfld.long 0x00 28.--31. " BYTE7_DQ_CMD_MAP ,Mapping of BYTE7 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." bitfld.long 0x00 24.--27. " BYTE6_DQ_CMD_MAP ,Mapping of BYTE6 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." textline " " bitfld.long 0x00 20.--23. " BYTE5_DQ_CMD_MAP ,Mapping of BYTE5 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." bitfld.long 0x00 16.--19. " BYTE4_DQ_CMD_MAP ,Mapping of BYTE4 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." textline " " bitfld.long 0x00 12.--15. " BYTE3_DQ_CMD_MAP ,Mapping of BYTE3 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." bitfld.long 0x00 8.--11. " BYTE2_DQ_CMD_MAP ,Mapping of BYTE2 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." textline " " bitfld.long 0x00 4.--7. " BYTE1_DQ_CMD_MAP ,Mapping of BYTE1 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." bitfld.long 0x00 0.--3. " BYTE0_DQ_CMD_MAP ,Mapping of BYTE0 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..." line.long 0x04 "TR_TIMING_0_0,Training Timing Register" bitfld.long 0x04 23.--26. " T_CATR_RD2VREF ,CATR read to CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 18.--21. " T_DHTRAIN ,Hold time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12.--15. " T_DSTRAIN ,Setup time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--9. 1. " T_VREF_LONG ,Delay between CAVREF and CATR reads" line.long 0x08 "TR_CTRL_0_0,Training Control Register 0" bitfld.long 0x08 8. " CATR_ENABLE ,CA Training enable" "Disabled,Enabled" bitfld.long 0x08 5.--7. " CAVREF_DQS_DURATION ,Number of DQS toggles to latch CAVREF" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4. " CAVREF_RIVE_DQS ,Drive DQS" "0,1" bitfld.long 0x08 0.--3. " CAVREF_TX_BYTE_MASK ,Mask TX_D|EN of DQ|DQS during CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "TR_CTRL_1_0,Training Control Register 1" bitfld.long 0x0C 4. " ENABLE_TR_QRST ,TR QRST select" "Disabled,Enabled" bitfld.long 0x0C 3. " ENABLE_TR_QSAFE ,TR QSAFE select" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " ENABLE_TR_RDV_MASK ,TR RDV_MASK select" "Disabled,Enabled" bitfld.long 0x0C 1. " ENABLE_TR_QPOP ,TR QPOP select" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " ENABLE_TR_RDV ,TR RDV select" "Disabled,Enabled" line.long 0x10 "SWITCH_BACK_CTRL_0,Switch Back Control Register" bitfld.long 0x10 0. " CLK_SWITCH_BACK ,Clock switch back request trigger" "Not triggered,Triggered" line.long 0x14 "TR_RDV_0,Training RDV Register" hexmask.long.byte 0x14 0.--6. 1. " TR_RDV ,Training RDV value" rgroup.long 0x3C8++0x0F line.long 0x00 "STALL_THEN_EXE_BEFORE_CLKCHANGE_0,Subsequent Register Access Stall Control" bitfld.long 0x00 0. " STALL_THEN_EXE_BEFORE_CLKCHANGE ,Stall subsequent register access" "Disabled,Enabled" line.long 0x04 "STALL_THEN_EXE_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control" bitfld.long 0x04 0. " STALL_THEN_EXE_AFTER_CLKCHANGE ,Stall subsequent register access" "Disabled,Enabled" line.long 0x08 "UNSTALL_RW_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control" bitfld.long 0x08 0. " UNSTALL_RW_AFTER_CLKCHANGE ,Unstall memory read|write after clock change" "Disabled,Enabled" line.long 0x0C "AUTO_CAL_CLK_STATUS2_0,Autocal Master Status Register" hexmask.long.byte 0x0C 24.--29. 1. " AUTO_CAL_VREF2_DRVDN ,Pull-down code from VREF2 measure cycle" hexmask.long.byte 0x0C 16.--21. 1. " AUTO_CAL_VREF2_DRVUP ,Pull-up code from VREF2 measure cycle" textline " " hexmask.long.byte 0x0C 8.--13. 1. " AUTO_CAL_VREF1_DRVDN ,Pull-down code from VREF1 measure cycle" hexmask.long.byte 0x0C 0.--5. 1. " AUTO_CAL_VREF1_DRVUP ,Pull-up code from VREF1 measure cycle" group.long 0x3D8++0x0F line.long 0x00 "SEL_DPD_CTRL_0,Configures Functional SEL_DPD Modes" bitfld.long 0x00 16.--18. " SEL_DPD_DLY ,Number of cycles to wait before asserting SEL_DPD" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. " DATA_SEL_DPD_EN ,Allow SEL_DPD assertion for data pads" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ODT_SEL_DPD_EN ,Tie SEL_DPD for ODT pads to ENABLE_ODT_DURING_WRITE" "Disabled,Enabled" bitfld.long 0x00 4. " RESET_SEL_DPD_EN ,Assert SEL_DPD for reset pad" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CA_SEL_DPD_EN ,Allow SEL_DPD assertion for discrete command/address pads" "Disabled,Enabled" bitfld.long 0x00 2. " CLK_SEL_DPD_EN ,Allow SEL_DPD assertion for discrete clock pad" "Disabled,Enabled" line.long 0x04 "PRE_REFRESH_REQ_CNT_0,Pre Refresh Request Count" hexmask.long.word 0x04 0.--15. 1. " PRE_REF_REQ_CNT ,Pre-refresh request count" line.long 0x08 "DYN_SELF_REF_CONTROL_0,Threshold For Dynamic Self-refresh Entry" bitfld.long 0x08 31. " DSR_PER_DEVICE ,Controls whether self-refresh is done on a per-device basis" "Disabled,Enabled" hexmask.long.word 0x08 0.--15. 1. " DSR_THRESHOLD ,Number of idle cycles to wait before allowing dynamic self-refresh entry" line.long 0x0C "TXSRDLL_0,DRAM Timing Parameter For TXSRDLL" hexmask.long.word 0x0C 0.--11. 1. " TXSRDLL ,Cycles between self-refresh exit & first DRAM command requiring a locked DLL" group.long 0x3E8++0x07 line.long 0x00 "CCFIFO_ADDR_0,CCFIFO Address Offset" bitfld.long 0x00 31. " CCFIFO_STALL_CNT_BY_1 ,Count-by VALUE clock increments select" "256,1" hexmask.long.word 0x00 16.--30. 1. " CCFIFO_STALL_CNT ,CCFIFO stall counter value" textline " " hexmask.long.word 0x00 0.--15. 0x01 " CCFIFO_ADDR ,Clock change FIFO address register" line.long 0x04 "CCFIFO_ADDR_0,Clock Change FIFO Data Register" rgroup.long 0x3F0++0x03 line.long 0x00 "CCFIFO_STATUS_0,CCFIFO Status" hexmask.long.byte 0x00 0.--6. 1. " CCFIFO_COUNT ,CCFIFO count" group.long 0x3F4++0x0F line.long 0x00 "TR_QPOP_0,TR_QPOP DRAM Timing Parameter" hexmask.long.byte 0x00 16.--22. 1. " TR_QPOP_PREAMBLE ,Time from read command to pop preamble from the pad macro FIFO" hexmask.long.byte 0x00 0.--6. 1. " TR_QPOP ,Time from training read command to pop data from the pad macro FIFO" line.long 0x04 "TR_RDV_MASK_0,TR_RDV_MASK_0 DRAM Timing Parameter" hexmask.long.byte 0x04 0.--6. 1. " TR_RDV_MASK ,Training RDV mask bits" line.long 0x08 "TR_QSAFE_0,TR_QSAFE_0 DRAM Timing Parameter" hexmask.long.byte 0x08 0.--6. 1. " TR_QSAFE ,Training time from a read command to when it is safe to issue a QRST" line.long 0x0C "TR_QRST_0,TR_QRST_0 DRAM Timing Parameter" bitfld.long 0x0C 16.--20. " TR_QRST_DURATION ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles" hexmask.long.byte 0x0C 0.--6. 1. " TR_QRST ,Training time from a read command to when it is safe to issue a QRST" group.long 0x404++0x03 line.long 0x00 "SWIZZLE_RANK0_BYTE0_0,Swizzle Rank0 Byte0 0" bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE0_BIT7_SEL ,SWZ rank0 byte0 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK0_BYTE0_BIT6_SEL ,SWZ rank0 byte0 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK0_BYTE0_BIT5_SEL ,SWZ rank0 byte0 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK0_BYTE0_BIT4_SEL ,SWZ rank0 byte0 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK0_BYTE0_BIT3_SEL ,SWZ rank0 byte0 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK0_BYTE0_BIT2_SEL ,SWZ rank0 byte0 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK0_BYTE0_BIT1_SEL ,SWZ rank0 byte0 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK0_BYTE0_BIT0_SEL ,SWZ rank0 byte0 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x408++0x03 line.long 0x00 "SWIZZLE_RANK0_BYTE1_0,Swizzle Rank0 Byte1 0" bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE1_BIT7_SEL ,SWZ rank0 byte1 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK0_BYTE1_BIT6_SEL ,SWZ rank0 byte1 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK0_BYTE1_BIT5_SEL ,SWZ rank0 byte1 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK0_BYTE1_BIT4_SEL ,SWZ rank0 byte1 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK0_BYTE1_BIT3_SEL ,SWZ rank0 byte1 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK0_BYTE1_BIT2_SEL ,SWZ rank0 byte1 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK0_BYTE1_BIT1_SEL ,SWZ rank0 byte1 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK0_BYTE1_BIT0_SEL ,SWZ rank0 byte1 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x40C++0x03 line.long 0x00 "SWIZZLE_RANK0_BYTE2_0,Swizzle Rank0 Byte2 0" bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE2_BIT7_SEL ,SWZ rank0 byte2 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK0_BYTE2_BIT6_SEL ,SWZ rank0 byte2 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK0_BYTE2_BIT5_SEL ,SWZ rank0 byte2 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK0_BYTE2_BIT4_SEL ,SWZ rank0 byte2 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK0_BYTE2_BIT3_SEL ,SWZ rank0 byte2 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK0_BYTE2_BIT2_SEL ,SWZ rank0 byte2 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK0_BYTE2_BIT1_SEL ,SWZ rank0 byte2 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK0_BYTE2_BIT0_SEL ,SWZ rank0 byte2 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x410++0x03 line.long 0x00 "SWIZZLE_RANK0_BYTE3_0,Swizzle Rank0 Byte3 0" bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE3_BIT7_SEL ,SWZ rank0 byte3 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK0_BYTE3_BIT6_SEL ,SWZ rank0 byte3 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK0_BYTE3_BIT5_SEL ,SWZ rank0 byte3 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK0_BYTE3_BIT4_SEL ,SWZ rank0 byte3 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK0_BYTE3_BIT3_SEL ,SWZ rank0 byte3 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK0_BYTE3_BIT2_SEL ,SWZ rank0 byte3 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK0_BYTE3_BIT1_SEL ,SWZ rank0 byte3 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK0_BYTE3_BIT0_SEL ,SWZ rank0 byte3 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x418++0x03 line.long 0x00 "SWIZZLE_RANK1_BYTE0_0,Swizzle Rank1 Byte0 0" bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE0_BIT7_SEL ,SWZ rank1 byte0 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK1_BYTE0_BIT6_SEL ,SWZ rank1 byte0 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK1_BYTE0_BIT5_SEL ,SWZ rank1 byte0 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK1_BYTE0_BIT4_SEL ,SWZ rank1 byte0 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK1_BYTE0_BIT3_SEL ,SWZ rank1 byte0 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK1_BYTE0_BIT2_SEL ,SWZ rank1 byte0 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK1_BYTE0_BIT1_SEL ,SWZ rank1 byte0 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK1_BYTE0_BIT0_SEL ,SWZ rank1 byte0 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x41C++0x03 line.long 0x00 "SWIZZLE_RANK1_BYTE1_0,Swizzle Rank1 Byte1 0" bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE1_BIT7_SEL ,SWZ rank1 byte1 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK1_BYTE1_BIT6_SEL ,SWZ rank1 byte1 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK1_BYTE1_BIT5_SEL ,SWZ rank1 byte1 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK1_BYTE1_BIT4_SEL ,SWZ rank1 byte1 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK1_BYTE1_BIT3_SEL ,SWZ rank1 byte1 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK1_BYTE1_BIT2_SEL ,SWZ rank1 byte1 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK1_BYTE1_BIT1_SEL ,SWZ rank1 byte1 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK1_BYTE1_BIT0_SEL ,SWZ rank1 byte1 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x420++0x03 line.long 0x00 "SWIZZLE_RANK1_BYTE2_0,Swizzle Rank1 Byte2 0" bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE2_BIT7_SEL ,SWZ rank1 byte2 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK1_BYTE2_BIT6_SEL ,SWZ rank1 byte2 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK1_BYTE2_BIT5_SEL ,SWZ rank1 byte2 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK1_BYTE2_BIT4_SEL ,SWZ rank1 byte2 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK1_BYTE2_BIT3_SEL ,SWZ rank1 byte2 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK1_BYTE2_BIT2_SEL ,SWZ rank1 byte2 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK1_BYTE2_BIT1_SEL ,SWZ rank1 byte2 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK1_BYTE2_BIT0_SEL ,SWZ rank1 byte2 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x424++0x03 line.long 0x00 "SWIZZLE_RANK1_BYTE3_0,Swizzle Rank1 Byte3 0" bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE3_BIT7_SEL ,SWZ rank1 byte3 bit 7 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " SWZ_RANK1_BYTE3_BIT6_SEL ,SWZ rank1 byte3 bit 6 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 20.--22. " SWZ_RANK1_BYTE3_BIT5_SEL ,SWZ rank1 byte3 bit 5 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " SWZ_RANK1_BYTE3_BIT4_SEL ,SWZ rank1 byte3 bit 4 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " SWZ_RANK1_BYTE3_BIT3_SEL ,SWZ rank1 byte3 bit 3 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " SWZ_RANK1_BYTE3_BIT2_SEL ,SWZ rank1 byte3 bit 2 select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " SWZ_RANK1_BYTE3_BIT1_SEL ,SWZ rank1 byte3 bit 1 select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " SWZ_RANK1_BYTE3_BIT0_SEL ,SWZ rank1 byte3 bit 0 select" "0,1,2,3,4,5,6,7" group.long 0x428++0x03 line.long 0x00 "ISSUE_QRST_0,ISSUE_QRST_0 DRAM Timing Parameter" bitfld.long 0x00 0. " ISSUE_QRST ,Sets QRST to pads|macros" "0,1" group.long 0x440++0x0B line.long 0x00 "PMC_SCRATCH1_0,PMC Scratch Register 1" line.long 0x04 "PMC_SCRATCH2_0,PMC Scratch Register 2" line.long 0x08 "PMC_SCRATCH3_0,PMC Scratch Register 3" sif (cpuis("TEGRAX2")) group.long 0x44C++0x0B line.long 0x00 "MCH_GLOBAL_INTSTATUS_0,Global interrupt status register for all 4 EMC channels" bitfld.long 0x00 3. " INT_CH3 ,Set when there is a interrupt from channel-3" "None,Interrupt" bitfld.long 0x00 2. " INT_CH2 ,Set when there is a interrupt from channel-2" "None,Interrupt" textline " " bitfld.long 0x00 1. " INT_CH1 ,Set when there is a interrupt from channel-1" "None,Interrupt" bitfld.long 0x00 0. " INT_CH0 ,Set when there is a interrupt from channel-0" "None,Interrupt" line.long 0x04 "MCH_GLOBAL_CRITICAL_INTSTATUS_0,critical interrupt status register for all 4 EMC channels" bitfld.long 0x04 3. " CRITICAL_INT_CH3 ,Set when there is a critical interrupt from channel-3" "None,Interrupt" bitfld.long 0x04 2. " CRITICAL_INT_CH2 ,Set when there is a critical interrupt from channel-2" "None,Interrupt" textline " " bitfld.long 0x04 1. " CRITICAL_INT_CH1 ,Set when there is a critical interrupt from channel-1" "None,Interrupt" bitfld.long 0x04 0. " CRITICAL_INT_CH0 ,Set when there is a critical interrupt from channel-0" "None,Interrupt" line.long 0x08 "RESET_PAD_CTRL_0,Controls the reset pad input bits" bitfld.long 0x08 4.--7. " RESET_RFU ,RFU bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " RESET_EN ,Enables the TH path when set to 0" "None,INT" textline " " bitfld.long 0x08 1. " RESET_E_INPUT ,When set to 1 enables the RX path for reset pads" "None,Interrupt" bitfld.long 0x08 0. " RESET_E_WKPD ,When set to 1 enables the weak pad for reset pads" "None,Interrupt" endif group.long 0x458++0x17 line.long 0x00 "AUTO_CAL_CONFIG2_0,Auto-calibration Master Compute Control Register 2" bitfld.long 0x00 26.--27. " AUTO_CAL_DQS_PD_TERM_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 24.--25. " AUTO_CAL_DQS_PU_TERM_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 22.--23. " AUTO_CAL_DQ_PD_TERM_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 20.--21. " AUTO_CAL_DQ_PU_TERM_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 18.--19. " AUTO_CAL_DQS_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 16.--17. " AUTO_CAL_DQS_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 14.--15. " AUTO_CAL_DQ_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 12.--13. " AUTO_CAL_DQ_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 10.--11. " AUTO_CAL_CMD_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 8.--9. " AUTO_CAL_CMD_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 6.--7. " AUTO_CAL_CA_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 4.--5. " AUTO_CAL_CA_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." textline " " bitfld.long 0x00 2.--3. " AUTO_CAL_CLK_PD_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." bitfld.long 0x00 0.--1. " AUTO_CAL_CLK_PU_CODE_SEL ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..." sif (cpuis("TEGRAX2")) elif (cpuis("TEGRAX1")) group.long 0x45C++0x03 line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3" bitfld.long 0x00 20.--22. " AUTO_CAL_CLK_PD_SLOPE ,Slope for CK pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_CLK_PU_SLOPE ,Slope for CK pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_CLK_PD_OFFSET ,2's complement offset for CK pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_CLK_PU_OFFSET ,2's complement offset for CK pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x460++0x0F line.long 0x00 "TR_DVFS,Training DVFS Register" bitfld.long 0x00 0. " TRAINING_DVFS ,DVFS training enable" "Disabled,Enabled" line.long 0x04 "AUTO_CAL_CHANNEL_0,Autocal Slave Control Register" bitfld.long 0x04 31. " AUTO_CAL_UPDATE_IDLE ,Allow autocal update outside of refresh if dramc is idle" "Disabled,Enabled" bitfld.long 0x04 30. " AUTO_CAL_STALL_ALL_TRAFFIC ,Stall all traffic for an autocal update" "Disabled,Enabled" textline " " rbitfld.long 0x04 29. " AUTO_CAL_COMPUTE_START_DVFS ,Trigger autocal compute FSM after DVFS shadow update" "Disabled,Enabled" hexmask.long.byte 0x04 21.--27. 1. " CAL_WAIT_AFTER_DVFS ,Number of EMC clocks to wait after DVFS shadow update before resuming traffic to DRAM" textline " " bitfld.long 0x04 16.--20. " AUTO_CAL_UPDATE_TIMEOUT ,Timeout before forcing dramc idle to issue an autocal update" "Disabled,2 EMCCLKS,2^2 EMCCLKS,2^3 EMCCLKS,2^4 EMCCLKS,2^5 EMCCLKS,2^6 EMCCLKS,2^7 EMCCLKS,2^8 EMCCLKS,2^9 EMCCLKS,2^10 EMCCLKS,2^11 EMCCLKS,2^12 EMCCLKS,2^13 EMCCLKS,2^14 EMCCLKS,2^15 EMCCLKS,2^16 EMCCLKS,2^17 EMCCLKS,2^18 EMCCLKS,2^19 EMCCLKS,2^20 EMCCLKS,2^21 EMCCLKS,2^22 EMCCLKS,2^23 EMCCLKS,2^24 EMCCLKS,2^25 EMCCLKS,2^26 EMCCLKS,2^27 EMCCLKS,2^28 EMCCLKS,2^29 EMCCLKS,2^30 EMCCLKS,2^31 EMCCLKS" bitfld.long 0x04 8.--11. " AUTO_CAL_WAIT_BEFORE_UPDATE ,Number of EMC clocks to wait before update" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--5. " AUTO_CAL_NUM_STALL_CYCLES ,Number of EMC clocks to stall the DRAM bus for autocal codes update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "IBDLY_0,IBDLY_0 DRAM Timing Parameter" bitfld.long 0x08 28.--29. " IBDLY_MODE ,IBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD" hexmask.long.byte 0x08 0.--6. 1. " IBDLY ,Specifies when to change IBDLY for DQ|DQS" line.long 0x0C "OBDLY_0,OBDLY_0 DRAM Timing Parameter" bitfld.long 0x0C 28.--29. " OBDLY_MODE ,OBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD" bitfld.long 0x0C 0.--5. " OBDLY ,Specifies when to update OB trim values with respect to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("TEGRAX2")) group.long 0x470++0x07 line.long 0x00 "ASR_CONTROL_0,Aggressive self refresh control register" bitfld.long 0x00 31. " DISPLAY_STUTTER_EN ,Display stutter enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " ASR_THRESHOLD ,PMC number of idle cycles to wait before allowing dynamic self-refresh entry" line.long 0x04 "MCH_GLOBAL_NONCRITICAL_INTSTATUS_0,Global non critical interrupt status (primarily meant for SBE) register for all 4 EMC channels" bitfld.long 0x04 3. " NONCRITICAL_INT_CH3 ,Set when there is a critical interrupt from channel-3" "None,Interrupt" bitfld.long 0x04 2. " NONCRITICAL_INT_CH2 ,Set when there is a critical interrupt from channel-2" "None,Interrupt" textline " " bitfld.long 0x04 1. " NONCRITICAL_INT_CH1 ,Set when there is a critical interrupt from channel-1" "None,Interrupt" bitfld.long 0x04 0. " NONCRITICAL_INT_CH0 ,Set when there is a critical interrupt from channel-0" "None,Interrupt" endif textline " " width 26. group.long 0x480++0x03 line.long 0x00 "TXDSRVTTGEN_0,TXDSRVTTGEN_0 DRAM Timing Parameter" hexmask.long.word 0x00 0.--11. 1. " TXDSRVTTGEN ,Cycles to wait from DSR exit" group.long 0x48C++0x13 line.long 0x00 "WE_DURATION_0,WE_DURATION_0 DRAM Timing Parameter" bitfld.long 0x00 0.--4. " WE_DURATION ,Number of cycles to assert write enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "WS_DURATION_0,WS_DURATION_0 DRAM Timing Parameter" bitfld.long 0x04 0.--4. " WS_DURATION ,Number of cycles to assert write strobe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "WEV_0,WEV_0 DRAM Timing Parameter" bitfld.long 0x08 0.--5. " WEV ,Number of cycles to post (delay) write enable from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..." line.long 0x0C "WSV_0,WSV_0 DRAM Timing Parameter" bitfld.long 0x0C 0.--5. " WSV ,Number of cycles to post (delay) write strobe from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..." line.long 0x10 "CFG_3_0,EMC Configuration Register 3" bitfld.long 0x10 4.--6. " MRR_BYTESEL_X16 ,Indicates to which byte lane second DRAM byte 0 is connected" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " MRR_BYTESEL ,Indicates which AP byte lane is connected to DRAM byte 0" "0,1,2,3,4,5,6,7" group.long 0x4A0++0x03 line.long 0x00 "MRW5_0,Command Trigger MRW5" bitfld.long 0x00 30.--31. " MRW5_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW5_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " hexmask.long.byte 0x00 16.--23. 0x01 " MRW5_MA ,Register address" hexmask.long.byte 0x00 0.--7. 1. " MRW5_OP ,Data to be written" group.long 0x4A4++0x03 line.long 0x00 "MRW6 _0,Command Trigger MRW6 " bitfld.long 0x00 30.--31. " MRW6 _DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW6 _CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW6 _SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW6 _MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW6 _SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW6 _SP0 ,Data to be written to subp0" group.long 0x4A8++0x03 line.long 0x00 "MRW7 _0,Command Trigger MRW7 " bitfld.long 0x00 30.--31. " MRW7 _DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW7 _CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW7 _SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW7 _MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW7 _SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW7 _SP0 ,Data to be written to subp0" group.long 0x4AC++0x03 line.long 0x00 "MRW8 _0,Command Trigger MRW8 " bitfld.long 0x00 30.--31. " MRW8 _DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW8 _CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW8 _SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW8 _MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW8 _SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW8 _SP0 ,Data to be written to subp0" group.long 0x4B0++0x03 line.long 0x00 "MRW9 _0,Command Trigger MRW9 " bitfld.long 0x00 30.--31. " MRW9 _DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW9 _CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW9 _SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW9 _MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW9 _SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW9 _SP0 ,Data to be written to subp0" group.long 0x4B4++0x03 line.long 0x00 "MRW10_0,Command Trigger MRW10" bitfld.long 0x00 30.--31. " MRW10_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW10_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW10_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW10_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW10_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW10_SP0 ,Data to be written to subp0" group.long 0x4B8++0x03 line.long 0x00 "MRW11_0,Command Trigger MRW11" bitfld.long 0x00 30.--31. " MRW11_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW11_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW11_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW11_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW11_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW11_SP0 ,Data to be written to subp0" group.long 0x4BC++0x03 line.long 0x00 "MRW12_0,Command Trigger MRW12" bitfld.long 0x00 30.--31. " MRW12_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW12_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW12_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW12_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW12_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW12_SP0 ,Data to be written to subp0" group.long 0x4C0++0x03 line.long 0x00 "MRW13_0,Command Trigger MRW13" bitfld.long 0x00 30.--31. " MRW13_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW13_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW13_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW13_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW13_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW13_SP0 ,Data to be written to subp0" group.long 0x4C4++0x03 line.long 0x00 "MRW14_0,Command Trigger MRW14" bitfld.long 0x00 30.--31. " MRW14_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW14_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW14_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW14_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW14_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW14_SP0 ,Data to be written to subp0" group.long 0x4D0++0x03 line.long 0x00 "MRW15_0,Command Trigger MRW15" bitfld.long 0x00 30.--31. " MRW15_DEV_SELECTN ,Active-low chip select" "Both,Dev1,Dev0,?..." bitfld.long 0x00 26.--27. " USE_MRW15_CNT ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2" textline " " bitfld.long 0x00 24.--25. " MRW15_SP_SELECTN ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..." hexmask.long.byte 0x00 16.--23. 0x01 " MRW15_MA ,Register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " MRW15_SP1 ,Data to be written to subp1" hexmask.long.byte 0x00 0.--7. 1. " MRW15_SP0 ,Data to be written to subp0" group.long 0x4D4++0x07 line.long 0x00 "CFG_SYNC_0,Sync Configuration 0" bitfld.long 0x00 0. " CHANNEL_SYNC ,Channel sync" "0,1" line.long 0x04 "FDPD_CTRL_CMD_NO_RAMP_0,FDPD Control Command No Ramp 0" bitfld.long 0x04 0. " CMD_DPD_NO_RAMP_ENABLE ,No ramp for DI/DT enable" "Disabled,Enabled" group.long 0x4E0++0x03 line.long 0x00 "WDV_CHK_0,WDV_CHK_0 DRAM Timing Parameter" bitfld.long 0x00 0.--5. " WDV_CHK_BASE ,Establish DRAMC write data ready handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("TEGRAX2")) group.long 0x510++0x07 line.long 0x00 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register" bitfld.long 0x00 11. " TWEAK_UNDERFLOW_CRITICAL_INTMASK ,Mask for tweak underflow interrupt" "Masked,Unmasked" bitfld.long 0x00 10. " ECC_UNCORR_ERR_CRITICAL_INTMASK ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked" textline " " bitfld.long 0x00 9. " DLL_LOCK_TIMEOUT_CRITICAL_INTMASK ,Mask for DLL lock time out interrupt" "Masked,Unmasked" bitfld.long 0x00 8. " CCFIFO_OVERFLOW_CRITICAL_INTMASK ,Mask for clock change FIFO overflow" "Masked,Unmasked" textline " " bitfld.long 0x00 7. " DLL_ALARM_CRITICAL_INTMASK ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked" bitfld.long 0x00 6. " ACCESS_TO_SR_DPD_DEV_CRITICAL_INTMASK ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked" textline " " bitfld.long 0x00 5. " MRR_DIVLD_CRITICAL_INTMASK ,Mask for MRR data available" "Masked,Unmasked" bitfld.long 0x00 4. " CLKCHANGE_COMPLETE_CRITICAL_INTMASK ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked" textline " " bitfld.long 0x00 3. " REFRESH_OVERFLOW_CRITICAL_INTMASK ,Mask for refresh request overflow time out" "Masked,Unmasked" line.long 0x04 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register" bitfld.long 0x04 13. " TWEAK_UNDERFLOW_NONCRITICAL_INTMASK ,Mask for tweak underflow interrupt" "Masked,Unmasked" bitfld.long 0x04 12. " ECC_ERR_BUF_OVF_NONCRITICAL_INTMASK ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked" textline " " bitfld.long 0x04 11. " ECC_CORR_ERR_NONCRITICAL_INTMASK ,Mask for ECC correctable error interrupt" "Masked,Unmasked" bitfld.long 0x04 10. " ECC_UNCORR_ERR_NONCRITICAL_INTMASK ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked" textline " " bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_NONCRITICAL_INTMASK ,Mask for DLL lock time out interrupt" "Masked,Unmasked" bitfld.long 0x04 8. " CCFIFO_OVERFLOW_NONCRITICAL_INTMASK ,Mask for clock change FIFO overflow" "Masked,Unmasked" textline " " bitfld.long 0x04 7. " DLL_ALARM_NONCRITICAL_INTMASK ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked" bitfld.long 0x04 6. " ACCESS_TO_SR_DPD_DEV_NONCRITICAL_INTMASK ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked" textline " " bitfld.long 0x04 5. " MRR_DIVLD_NONCRITICAL_INTMASK ,Mask for MRR data available" "Masked,Unmasked" bitfld.long 0x04 4. " CLKCHANGE_COMPLETE_NONCRITICAL_INTMASK ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked" textline " " bitfld.long 0x04 3. " REFRESH_OVERFLOW_NONCRITICAL_INTMASK ,Mask for refresh request overflow time out" "Masked,Unmasked" endif group.long 0x554++0x1F line.long 0x00 "CFG_PIPE_2_0,Pipe Configuration Register 2_0" bitfld.long 0x00 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 11" "No bypass,Bypass" bitfld.long 0x00 26. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 10" "No bypass,Bypass" textline " " bitfld.long 0x00 25. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK9 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 9" "No bypass,Bypass" bitfld.long 0x00 24. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK8 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 8" "No bypass,Bypass" textline " " bitfld.long 0x00 23. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK7 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 7" "No bypass,Bypass" bitfld.long 0x00 22. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK6 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 6" "No bypass,Bypass" textline " " bitfld.long 0x00 21. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK5 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 5" "No bypass,Bypass" bitfld.long 0x00 20. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK4 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 4" "No bypass,Bypass" textline " " bitfld.long 0x00 19. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK3 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 3" "No bypass,Bypass" bitfld.long 0x00 18. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK2 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 2" "No bypass,Bypass" textline " " bitfld.long 0x00 17. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK1 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 1" "No bypass,Bypass" bitfld.long 0x00 16. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK0 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 0" "No bypass,Bypass" textline " " bitfld.long 0x00 11. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 11" "No bypass,Bypass" bitfld.long 0x00 10. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 10" "No bypass,Bypass" textline " " bitfld.long 0x00 9. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK9 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 9" "No bypass,Bypass" bitfld.long 0x00 8. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK8 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 8" "No bypass,Bypass" textline " " bitfld.long 0x00 7. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK7 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 7" "No bypass,Bypass" bitfld.long 0x00 6. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK6 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 6" "No bypass,Bypass" textline " " bitfld.long 0x00 5. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK5 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 5" "No bypass,Bypass" bitfld.long 0x00 4. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK4 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 4" "No bypass,Bypass" textline " " bitfld.long 0x00 3. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK3 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 3" "No bypass,Bypass" bitfld.long 0x00 2. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK2 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 2" "No bypass,Bypass" textline " " bitfld.long 0x00 1. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK1 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 1" "No bypass,Bypass" bitfld.long 0x00 0. " EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK0 ,Bypass pipeline stage 3 between EMC and pad-macro for brick 0" "No bypass,Bypass" line.long 0x04 "CFG_PIPE_CLK_0,Pipe Clock Configuration Register" bitfld.long 0x04 0. " PIPE_CLK_ENABLE_OVERRIDE ,Pipe clock override enable" "Disabled,Enabled" line.long 0x08 "CFG_PIPE_1_0,Pipe Configuration Register 1_0" bitfld.long 0x08 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass" bitfld.long 0x08 26. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass" textline " " bitfld.long 0x08 25. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK9 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass" bitfld.long 0x08 24. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK8 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass" textline " " bitfld.long 0x08 23. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK7 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass" bitfld.long 0x08 22. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK6 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass" textline " " bitfld.long 0x08 21. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK5 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass" bitfld.long 0x08 20. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK4 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass" textline " " bitfld.long 0x08 19. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK3 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass" bitfld.long 0x08 18. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK2 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass" textline " " bitfld.long 0x08 17. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK1 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass" bitfld.long 0x08 16. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK0 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass" textline " " bitfld.long 0x08 11. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass" bitfld.long 0x08 10. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass" textline " " bitfld.long 0x08 9. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK9 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass" bitfld.long 0x08 8. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK8 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass" textline " " bitfld.long 0x08 7. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK7 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass" bitfld.long 0x08 6. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK6 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass" textline " " bitfld.long 0x08 5. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK5 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass" bitfld.long 0x08 4. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK4 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass" textline " " bitfld.long 0x08 3. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK3 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass" bitfld.long 0x08 2. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK2 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass" textline " " bitfld.long 0x08 1. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK1 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass" bitfld.long 0x08 0. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK0 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass" line.long 0x0C "CFG_PIPE_0,Pipe Configuration Register 0" bitfld.long 0x0C 27. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 11" "No bypass,Bypass" bitfld.long 0x0C 26. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 10" "No bypass,Bypass" textline " " bitfld.long 0x0C 25. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK9 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 9" "No bypass,Bypass" bitfld.long 0x0C 24. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK8 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 8" "No bypass,Bypass" textline " " bitfld.long 0x0C 23. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK7 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 7" "No bypass,Bypass" bitfld.long 0x0C 22. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK6 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 6" "No bypass,Bypass" textline " " bitfld.long 0x0C 21. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK5 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 5" "No bypass,Bypass" bitfld.long 0x0C 20. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK4 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 4" "No bypass,Bypass" textline " " bitfld.long 0x0C 19. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK3 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 3" "No bypass,Bypass" bitfld.long 0x0C 18. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK2 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 2" "No bypass,Bypass" textline " " bitfld.long 0x0C 17. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK1 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 1" "No bypass,Bypass" bitfld.long 0x0C 16. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK0 ,Bypass pipeline stage 2 between EMC and pad-macro for brick 0" "No bypass,Bypass" textline " " bitfld.long 0x0C 11. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 11" "No bypass,Bypass" bitfld.long 0x0C 10. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 10" "No bypass,Bypass" textline " " bitfld.long 0x0C 9. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK9 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 9" "No bypass,Bypass" bitfld.long 0x0C 8. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK8 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 8" "No bypass,Bypass" textline " " bitfld.long 0x0C 7. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK7 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 7" "No bypass,Bypass" bitfld.long 0x0C 6. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK6 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 6" "No bypass,Bypass" textline " " bitfld.long 0x0C 5. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK5 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 5" "No bypass,Bypass" bitfld.long 0x0C 4. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK4 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 4" "No bypass,Bypass" textline " " bitfld.long 0x0C 3. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK3 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 3" "No bypass,Bypass" bitfld.long 0x0C 2. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK2 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 2" "No bypass,Bypass" textline " " bitfld.long 0x0C 1. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK1 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 1" "No bypass,Bypass" bitfld.long 0x0C 0. " EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK0 ,Bypass pipeline stage 1 between EMC and pad-macro for brick 0" "No bypass,Bypass" line.long 0x10 "QPOP_0,DRAM Timing Parameter" hexmask.long.byte 0x10 16.--22. 1. " QPOP_PREAMBLE ,Time from read command to pop preamble from the pad macro FIFO" hexmask.long.byte 0x10 0.--6. 1. " QPOP ,Time from read command to pop data from the pad macro FIFO" line.long 0x14 "QUSE_WIDTH_0,QUSE_WIDTH_0 DRAM Timing Parameter" bitfld.long 0x14 29. " QUSE_SHORTEN_2UI ,Shorten QUSE 2 UI (1 DRAM clock)" "No change,Shorten" bitfld.long 0x14 28. " QUSE_EXTEND_UI ,Extend QUSE 1 UI (1/2 clock)" "No change,Extend" textline " " bitfld.long 0x14 0.--3. " QUSE_DURATION ,QUSE duration" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "PUTERM_WIDTH_0,PUTERM_WIDTH_0 DRAM Timing Parameter" bitfld.long 0x18 31. " CFG_STATIC_TERM ,IOBRICK internally disables termination based on DOE" "0,1" bitfld.long 0x18 0.--3. " PUTERM_DURATION ,Additional PUTERM duration apart from default BL/2" "Disable termination,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "BGBIAS_CTL0_0,BGBIAS Pad Controls" bitfld.long 0x1C 3. " BIAS0_DSC_E_PWRD_IBIAS_RX ,Bias current going out to brick receiver" "Disabled,Enabled" bitfld.long 0x1C 2. " BIAS0_DSC_E_PWRD_IBIAS_VTTGEN ,Disables biasing current going out to VTTGEN cells" "No,Yes" textline " " bitfld.long 0x1C 1. " BIAS0_DSC_E_PWRD ,Disables all DC current paths within entire cell" "No,Yes" bitfld.long 0x1C 0. " BIAS0_DSC_BG_SEL_N ,Select BandGap reference current" "Enabled,Disabled" sif (cpuis("TEGRAX2")) elif (cpuis("TEGRAX1")) group.long 0x574++0x03 line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_PD_SLOPE ,Slope for DQS pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_DQS_PU_SLOPE ,Slope for DQS pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_PD_OFFSET ,2's complement offset for DQS pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_DQS_PU_OFFSET ,2's complement offset for DQS pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif (cpuis("TEGRAX2")) else group.long 0x578++0x07 line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register" bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PU_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" bitfld.long 0x00 16. " EMC2TMC_CFG_XM2COMP_PU_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x00 12.--13. " EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" bitfld.long 0x00 8.--9. " EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" textline " " bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch" bitfld.long 0x00 2.--5. " EMC2TMC_CFG_XM2COMP_PU_TEST_MODE ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PU_RX_MODE ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1" line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTOCAL COMP Pad Register For Software Control Of Pad Inputs" bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 29. " AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 27. " AUTO_CAL_SW_CTRL_PD_CAL_EN ,EN pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 24. " AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled" bitfld.long 0x04 22. " AUTO_CAL_SW_CTRL_PU_CAL_EN ,EN pin of COMP pad slice software control" "Disabled,Enabled" textline " " bitfld.long 0x04 16.--21. " AUTO_CAL_SW_CTRL_DRVDN ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--15. " AUTO_CAL_SW_CTRL_DRVUP ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x04 2.--8. 1. " AUTO_CAL_SW_CTRL_IVREF_LVL ,IVREF_LVL software control" bitfld.long 0x04 1. " AUTO_CAL_SW_CTRL_BG_E_PWRD ,BG_E_PWRD software control" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " AUTO_CAL_SW_CTRL ,Software control of COMP pad inputs enable" "Disabled,Enabled" endif if (((per.l(ad:0x7001F000+0x20))&0x80000000)==0x80000000) group.long 0x580++0x03 line.long 0x00 "REFCTRL2_0,REF Control 2" bitfld.long 0x00 31. " REFPB_VALID ,REFpb operation enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " REFPB_PD_THRESHOLD ,REFpb threshold value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0. " REFRESH_PER_DEVICE ,Refresh commands send mode" "Shared,Per device" else group.long 0x580++0x03 line.long 0x00 "REFCTRL2_0,REF Control 2" bitfld.long 0x00 24.--26. " REFPB_PD_THRESHOLD ,REFpb threshold value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0. " REFRESH_PER_DEVICE ,Refresh commands send mode" "Shared,Per device" endif group.long 0x584++0x03 line.long 0x00 "FBIO_CFG7_0,FBIO Configuration Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 18. " SEND_WR1_TO_BOTH_RANKS ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled" bitfld.long 0x00 17. " SEND_RD1_TO_BOTH_RANKS ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled" textline " " endif bitfld.long 0x00 16. " FORCE_CMD_PHASE_EQ0 ,Force DRAM command's to always be launched on phase 1" "Disabled,Enabled" bitfld.long 0x00 15. " DISABLE_CCDP1_WR_SPACING ,Write command spacing of tCCD+1 disable" "No,Yes" textline " " bitfld.long 0x00 14. " DISABLE_CCDP1_RD_SPACING ,Read command spacing of tCCD+1 disable" "No,Yes" bitfld.long 0x00 13. " SUBP_ADDR_MODE ,DRAM SUBP address width" "x32,x16" textline " " bitfld.long 0x00 12. " ZQCAL_LATCH_ENABLE ,EMC send an LPDDR4 MPC ZQCal Latch command as part of ZQ calibration process enable" "Disabled,Enabled" bitfld.long 0x00 11. " ZQCAL_MPC_ENABLE ,EMC send ZQCal command as LPDDR4 MPC enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " QPOP_RD_PREAMBLE_TOGGLE ,LPDDR4 read preamble toggle QPOP filter enable" "Disabled,Enabled" bitfld.long 0x00 9. " CS_POLARITY ,DRAM chip select active polarity" "Low,High" textline " " bitfld.long 0x00 8. " MRR_DBI ,EMC apply data bus inversion protocol to in-coming mode register read data enable" "Disabled,Enabled" bitfld.long 0x00 7. " RD_DBI ,EMC apply data bus inversion protocol to in-coming read data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " WR_DBI ,EMC write data bus inversion protocol enable" "Disabled,Enabled" bitfld.long 0x00 5. " MASKED_WR ,EMC issue LPDDR4 masked write command enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LPDDR4_CMD_MAP ,EMC use LPDDR4 command mapping for DRAM command enable" "Disabled,Enabled" bitfld.long 0x00 3. " QUSE_CCDP1_EXTEND ,QUSE extension through tCCD+1 spacing enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CH1_ENABLE ,CH1 enable" "Disabled,Enabled" bitfld.long 0x00 1. " CH0_ENABLE ,CH0 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DRAM_EMCCLK_2TO1 ,Specifies how much faster is dramclk than emcclk" "1x,2x" sif (cpuis("TEGRAX2")) group.long 0x710++0x03 line.long 0x00 "FBIO_CFG9_0,FBIO Configuration Register" bitfld.long 0x00 8. " USE_SELF_REF_STATE ,Enables RTL to use SELF_REF_CMD state" "Disabled,Enabled" bitfld.long 0x00 4. " ENCR_TWEAK_CHECK_ENABLE ,Determines the policy that EMC DRAM controller uses to determine when a read with encryption enabled can be launched to DRAM" "Off,On" textline " " bitfld.long 0x00 3. " ECC_ENCR_CFG_LOCK ,Setting this bit disables the ability for software to modify ECC_CHECK_DISABLE and ECC_ENCR_DISABLE bits" "Off,On" bitfld.long 0x00 2. " ECC_DYNAMIC_BYPASS_DISABLE ,Setting this bit disables dynamic bypasses in EMC ECC/Encryption pipeline" "Off,On" textline " " bitfld.long 0x00 1. " ECC_ENCR_DISABLE ,Setting this bit completely bypasses EMC ECC/Encryption pipeline" "Off,On" bitfld.long 0x00 0. " ECC_CHECK_DISABLE ,Setting this bit disables EMC ECC check/correct functions" "Off,On" group.long 0xAC0++0x13 line.long 0x00 "ECC_CONTROL_0,ECC Control Register" hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_LIMIT ,Error buffer limit" bitfld.long 0x00 2. " ERR_BUFFER_LOAD ,Error Buffer Load" "No load,Load" textline " " bitfld.long 0x00 1. " ERR_BUFFER_RESET ,Error Buffer Reset" "No reset,Reset" bitfld.long 0x00 0. " ERR_BUFFER_MODE ,Error Buffer Mode" "Ring,Write stop" rgroup.long 0xAC4++0x13 line.long 0x00 "ECC_STATUS_0,ECC Error Status" hexmask.long.byte 0x00 24.--31. 1. " ERR_BUFFER_DEPTH ,The physical size (in number of entries) of ECC error buffer" hexmask.long.byte 0x00 16.--23. 1. " ERR_BUFFER_CNT ,The number of errors physically residing in ECC error buffer" textline " " hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_WR_PTR ,The ECC error buffer write pointer" hexmask.long.byte 0x00 0.--7. 1. " ERR_BUFFER_RD_PTR ,The ECC error buffer read pointer" line.long 0x04 "ECC_STATUS_0,ECC Error Status" hexmask.long.word 0x04 22.--31. 1. " ECC_EERR_SYNDROME_SP0 ,Computed syndrome in ECC word" bitfld.long 0x04 16.--17. " ECC_EERR_PAR_SP0 ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..." textline " " hexmask.long.word 0x04 6.--15. 1. " ECC_DERR_SYNDROME_SP0 ,Computed syndrome in data word" bitfld.long 0x04 3. " ECC_ERR_POISON_SP0 ,Poisoned request" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " ECC_DERR_PAR_SP0 ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..." line.long 0x08 "ECC_ERR_SP1_0,ECC Error Buffer - Sub-Partition 1 Errors" hexmask.long.word 0x08 22.--31. 1. " ECC_EERR_SYNDROME_SP1 ,Computed syndrome in ECC word" bitfld.long 0x08 16.--17. " ECC_EERR_PAR_SP1 ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..." textline " " hexmask.long.word 0x08 6.--15. 1. " ECC_DERR_SYNDROME_SP1 ,Computed syndrome in data word" bitfld.long 0x08 0.--1. " ECC_DERR_PAR_SP1 ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..." line.long 0x0C "ECC_ERR_ADDR_0,ECC Error Buffer - bank/row/gob" bitfld.long 0x0C 28.--30. " ECC_ERR_BANK ,ECC_ERR_BANK" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 8.--23. 1. " ECC_ERR_ROW ,ECC_ERR_ROW" textline " " bitfld.long 0x0C 0.--5. " ECC_ERR_GOB ,ECC_ERR_GOB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "ECC_ERR_REQ_0,ECC Error Buffer - Request Debug" hexmask.long.byte 0x10 24.--31. 1. " ECC_ERR_CGID ,Request ID" bitfld.long 0x10 20.--21. " ECC_ERR_SEQ ,Burst sequence" "0,1,2,3" textline " " bitfld.long 0x10 19. " ECC_ERR_SWAP ,Swap" "No swap,Swap" bitfld.long 0x10 17.--18. " ECC_ERR_SIZE ,Size" "R64B,R32B,R16B,?..." textline " " bitfld.long 0x10 16. " ECC_ERR_DEVICE ,DRAM device" "Disabled,Enabled" bitfld.long 0x10 12.--14. " ECC_ERR_COL_SP1 ,GOB offset - sub-partition 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 8.--10. " ECC_ERR_COL_SP0 ,GOB offset - sub-partition 0" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--7. " ECC_ERR_EMC_ID ,EMC device/channel number" "0,1,2,3" group.long 0xADC++0x03 line.long 0x00 "EMC_ENCR_KEY_STATUS_0,Encryption Key Distribution Status Register" rbitfld.long 0x00 28.--31. " KEY_INIT_DONE ,Key distribution and expansion complete" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " KEY_STATE_CLEAR ,Write one to a bit of this field will clear corresponding bit in following fields" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " KEY_DISTRIB_ERR ,Error on serial bus detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " KEY_ACTIVE ,Serial bus activity for the key was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x588++0x27 line.long 0x00 "DATA_BRLSHFT_0_0,FBIO Configuration Register" bitfld.long 0x00 21.--23. " RANK0_BYTE7_DATA_BRLSHFT ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " RANK0_BYTE6_DATA_BRLSHFT ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 15.--17. " RANK0_BYTE5_DATA_BRLSHFT ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " RANK0_BYTE4_DATA_BRLSHFT ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9.--11. " RANK0_BYTE3_DATA_BRLSHFT ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--8. " RANK0_BYTE2_DATA_BRLSHFT ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 3.--5. " RANK0_BYTE1_DATA_BRLSHFT ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " RANK0_BYTE0_DATA_BRLSHFT ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x04 "DATA_BRLSHFT_1_0,FBIO Configuration Register" bitfld.long 0x04 21.--23. " RANK1_BYTE7_DATA_BRLSHFT ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x04 18.--20. " RANK1_BYTE6_DATA_BRLSHFT ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 15.--17. " RANK1_BYTE5_DATA_BRLSHFT ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " RANK1_BYTE4_DATA_BRLSHFT ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 9.--11. " RANK1_BYTE3_DATA_BRLSHFT ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--8. " RANK1_BYTE2_DATA_BRLSHFT ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 3.--5. " RANK1_BYTE1_DATA_BRLSHFT ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " RANK1_BYTE0_DATA_BRLSHFT ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x08 "RFCPB_0,RFCPB_0 DRAM Timing Parameter" hexmask.long.word 0x08 0.--8. 1. " RFCPB ,Specifies the per-bank auto refresh cycle time" line.long 0x0C "DQS_BRLSHFT_0_0,FBIO Configuration Register" bitfld.long 0x0C 21.--23. " RANK0_BYTE7_DQS_BRLSHFT ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 18.--20. " RANK0_BYTE6_DQS_BRLSHFT ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 15.--17. " RANK0_BYTE5_DQS_BRLSHFT ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 12.--14. " RANK0_BYTE4_DQS_BRLSHFT ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 9.--11. " RANK0_BYTE3_DQS_BRLSHFT ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 6.--8. " RANK0_BYTE2_DQS_BRLSHFT ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 3.--5. " RANK0_BYTE1_DQS_BRLSHFT ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. " RANK0_BYTE0_DQS_BRLSHFT ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x10 "DQS_BRLSHFT_1_0,FBIO Configuration Register" bitfld.long 0x10 21.--23. " RANK1_BYTE7_DQS_BRLSHFT ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x10 18.--20. " RANK1_BYTE6_DQS_BRLSHFT ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 15.--17. " RANK1_BYTE5_DQS_BRLSHFT ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x10 12.--14. " RANK1_BYTE4_DQS_BRLSHFT ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 9.--11. " RANK1_BYTE3_DQS_BRLSHFT ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. " RANK1_BYTE2_DQS_BRLSHFT ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 3.--5. " RANK1_BYTE1_DQS_BRLSHFT ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " RANK1_BYTE0_DQS_BRLSHFT ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x14 "CMD_BRLSHFT_0_0,1T LP4 ADR Barrel Shift Setting On CH0" bitfld.long 0x14 3.--5. " CH0_SUBP1_1T_BRLSHFT ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. " CH0_SUBP0_1T_BRLSHFT ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x18 "CMD_BRLSHFT_1_0,1T LP4 ADR Barrel Shift Setting On CH1" bitfld.long 0x18 3.--5. " CH1_SUBP1_1T_BRLSHFT ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. " CH1_SUBP0_1T_BRLSHFT ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x1C "CMD_BRLSHFT_2_0,2T Signal Barrel Shift Setting On CH0" bitfld.long 0x1C 3.--5. " CH0_SUBP1_2T_BRLSHFT ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. " CH0_SUBP0_2T_BRLSHFT ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x20 "CMD_BRLSHFT_3_0,2T Signal Barrel Shift Setting On CH1" bitfld.long 0x20 3.--5. " CH1_SUBP1_2T_BRLSHFT ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. " CH1_SUBP0_2T_BRLSHFT ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7" line.long 0x24 "QUSE_BRLSHFT_0_0,Quse Barrel Shift 0" bitfld.long 0x24 15.--19. " RANK0_BYTE3_QUSE_BRLSHFT ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 10.--14. " RANK0_BYTE2_QUSE_BRLSHFT ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x24 5.--9. " RANK0_BYTE1_QUSE_BRLSHFT ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--4. " RANK0_BYTE0_QUSE_BRLSHFT ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpuis("TEGRAX2")) else group.long 0x5B0++0x03 line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_CA_PD_SLOPE ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_CA_PU_SLOPE ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_CA_PD_OFFSET ,2's complement offset for CA pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_CA_PU_OFFSET ,2's complement offset for CA pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif sif (cpuis("TEGRAX2")) else group.long 0x5B4++0x03 line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_CMD_PD_SLOPE ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_CMD_PU_SLOPE ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_CMD_PD_OFFSET ,2's complement offset for CMD pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_CMD_PU_OFFSET ,2's complement offset for CMD pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x5B8++0x13 line.long 0x00 "QUSE_BRLSHFT_1_0,Quse Barrel Shift 1" bitfld.long 0x00 15.--19. " RANK0_BYTE7_QUSE_BRLSHFT ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10.--14. " RANK0_BYTE6_QUSE_BRLSHFT ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 5.--9. " RANK0_BYTE5_QUSE_BRLSHFT ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RANK0_BYTE4_QUSE_BRLSHFT ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "QUSE_BRLSHFT_2_0,Quse Barrel Shift 2" bitfld.long 0x04 15.--19. " RANK1_BYTE3_QUSE_BRLSHFT ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 10.--14. " RANK1_BYTE2_QUSE_BRLSHFT ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 5.--9. " RANK1_BYTE1_QUSE_BRLSHFT ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " RANK1_BYTE0_QUSE_BRLSHFT ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "CCDMW_0,CCDMW_0 DRAM Timing Parameter" bitfld.long 0x08 0.--5. " CCDMW ,DRAM CAS to CAS delay timing when the current command is any type of write and the next command is a masked write to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "QUSE_BRLSHFT_3_0,Quse Barrel Shift 3" bitfld.long 0x0C 15.--19. " RANK1_BYTE7_QUSE_BRLSHFT ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 10.--14. " RANK1_BYTE6_QUSE_BRLSHFT ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 5.--9. " RANK1_BYTE5_QUSE_BRLSHFT ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " RANK1_BYTE4_QUSE_BRLSHFT ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "FBIO_CFG8_0,FBIO Configuration Register" bitfld.long 0x10 27. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK11 ,Clock to data control signals in pipe stages of brick 11 enable" "Disabled,Enabled" bitfld.long 0x10 26. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK10 ,Clock to data control signals in pipe stages of brick 10 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK9 ,Clock to data control signals in pipe stages of brick 9 enable" "Disabled,Enabled" bitfld.long 0x10 24. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK8 ,Clock to data control signals in pipe stages of brick 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK7 ,Clock to data control signals in pipe stages of brick 7 enable" "Disabled,Enabled" bitfld.long 0x10 22. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK6 ,Clock to data control signals in pipe stages of brick 6 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK5 ,Clock to data control signals in pipe stages of brick 5 enable" "Disabled,Enabled" bitfld.long 0x10 20. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK4 ,Clock to data control signals in pipe stages of brick 4 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK3 ,Clock to data control signals in pipe stages of brick 3 enable" "Disabled,Enabled" bitfld.long 0x10 18. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK2 ,Clock to data control signals in pipe stages of brick 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK1 ,Clock to data control signals in pipe stages of brick 1 enable" "Disabled,Enabled" bitfld.long 0x10 16. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK0 ,Clock to data control signals in pipe stages of brick 0 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " RANK_SWIZZLE ,Asymmetric DRAM size while size of rank1>rank0 enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) else group.long 0x5CC++0x03 line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register" bitfld.long 0x00 20.--22. " AUTO_CAL_DQ_PD_SLOPE ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" bitfld.long 0x00 16.--18. " AUTO_CAL_DQ_PU_SLOPE ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000" textline " " bitfld.long 0x00 8.--13. " AUTO_CAL_DQ_PD_OFFSET ,2's complement offset for DQ pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " AUTO_CAL_DQ_PU_OFFSET ,2's complement offset for DQ pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif wgroup.long 0x5D0++0x07 line.long 0x00 "PROTOBIST_CONFIG_ADR_1_0,Protocol BIST Register" bitfld.long 0x00 29. " PROTOBIST_APC ,Controls the auto-precharge function of transaction" "0,1" bitfld.long 0x00 28. " PROTOBIST_A_RDY ,Indicates active interface is ready" "Not ready,Ready" textline " " hexmask.long.word 0x00 12.--27. 1. " PROTOBIST_A_ROW ,Row control during protobist mode" bitfld.long 0x00 11. " PROTOBIST_A_REF ,Refresh control during active request in protobist" "0,1" textline " " bitfld.long 0x00 9.--10. " PROTOBIST_A_DEV ,Devsel control during active request in protobist" "0,1,2,3" bitfld.long 0x00 6.--8. " PROTOBIST_BANK ,Bank control during transfer request in protobist" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 3.--5. " PROTOBIST_A_BANK ,Bank control during active request in protobist" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PROTOBIST_A_BANK1 ,Bank 1 control during active request in protobist" "0,1,2,3,4,5,6,7" line.long 0x04 "PROTOBIST_CONFIG_ADR_2_0,Protocol BIST Register" bitfld.long 0x04 28. " PROTOBIST_SWAP ,Swap control during protobist mode" "0,1" bitfld.long 0x04 26.--27. " PROTOBIST_SIZE ,Size control during protobist mode" "0,1,2,3" textline " " bitfld.long 0x04 25. " PROTOBIST_MASKED_WRITE ,Mask write control during protobist mode" "0,1" bitfld.long 0x04 24. " PROTOBIST_T_DEV ,Dev control during Xfre request of protobist mode" "0,1" textline " " bitfld.long 0x04 21.--23. " PROTOBIST_T_COL1 ,Column 1 control during transfer request during protobist mode" "0,1,2,3,4,5,6,7" hexmask.long.word 0x04 9.--20. 1. " PROTOBIST_T_COL ,Column control during protobist" textline " " bitfld.long 0x04 8. " PROTOBIST_T_RDY ,Indicates transfer interface is ready" "Not ready,Ready" hexmask.long.byte 0x04 0.--7. 1. " PROTOBIST_CGID ,Request ID of transaction control" group.long 0x5D8++0x0B line.long 0x00 "PROTOBIST_MISC_0,Protocol BIST Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " PROTOBIST_RESET ,PROTOBIST reset" "No reset,Reset" textline " " endif bitfld.long 0x00 16.--18. " PROTOBIST_REQ ,Protobist request" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 15. " PROTOBIST_READ_ACK ,Protobist read ACK" "0,1" textline " " bitfld.long 0x00 14. " PROTOBIST_START ,Protobist start" "0,1" bitfld.long 0x00 13. " PROTOBIST_W_BE ,Protobist mode control for byte enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PROTOBIST_MODE ,Protobist mode control indicates bist mode" "0,1" bitfld.long 0x00 8.--11. " PROTOBIST_RDI_SEL ,Protobist RDI select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. " PROTOBIST_TAG ,Protobist mode tag control" line.long 0x04 "PROTOBIST_WDATA_LOWER_0,Protocol BIST Lower Register" line.long 0x08 "PROTOBIST_WDATA_UPPER_0,Protocol BIST Upper Register" rgroup.long 0x5EC++0x03 line.long 0x00 "PROTOCOL_RDATA_0,Protocol BIST Register" group.long 0x5E4++0x07 line.long 0x00 "DLL_CFG_0_0,DLL Calibration Configuration Register 0" bitfld.long 0x00 29. " DDLLCAL_CTRL_IGNORE_START ,Ignore DLLCAL start trim priv value" "0,1" bitfld.long 0x00 28. " DDLLCAL_CTRL_DUAL_PASS_LOCK ,2 pass lock" "0,1" textline " " bitfld.long 0x00 24.--27. " DDLLCAL_CTRL_STEP_SIZE ,Calibration step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DDLLCAL_CTRL_END_COUNT ,End count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16.--19. " DDLLCAL_CTRL_FILTER_BITS ,Filter bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DDLLCAL_CTRL_SAMPLE_COUNT ,Number of samples to take" "1,2,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15" textline " " hexmask.long.byte 0x00 4.--11. 1. " DDLLCAL_CTRL_SAMPLE_DELAY ,Delay to allow DLL value to settle" bitfld.long 0x00 0.--3. " DDLLCAL_UPDATE_CNT_LIMIT ,Wait cycles for priv update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DLL_CFG_1_0,DLL Calibration Configuration Register 1" sif (cpuis("TEGRAX2")) bitfld.long 0x04 28.--29. " DDLL_VTTCDB_SPARE ,RFU" "0,1,2,3" bitfld.long 0x04 24.--25. " DDLL_VTTDDLL_SPARE ,RFU" "0,1,2,3" textline " " bitfld.long 0x04 22. " DDLL_VTTLP_VDDA_E_REGSW ,Active high. Enable to switch to low power regulator" "Low,High" bitfld.long 0x04 21. " DDLL_VTTDDLL_VDDA_E_REG ,Enable DLL regulator" "0,1" textline " " bitfld.long 0x04 20. " DDLL_VTTDDLL_E_WB ,Active high to enable the weak bias for DDLL" "0,1" textline " " endif bitfld.long 0x04 16. " DDLL_BYPASS ,Bypass" "0,1" bitfld.long 0x04 12.--15. " DDLL_RFU ,RFU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 11. " E_DDLL_PWRD ,Master DLL powerdown" "0,1" hexmask.long.word 0x04 0.--10. 1. " DDLLCAL_CTRL_START_TRIM ,Calibration start value" group.long 0x5F0++0x07 line.long 0x00 "CONFIG_SAMPLE_DELAY_0,Config Sample Delay" hexmask.long.byte 0x00 0.--6. 1. " PMACRO_SAMPLE_DELAY ,Delay between sending pad macro configuration read and sampling of the read return data (in emcclk ticks)" line.long 0x04 "CFG_UPDATE_0,Timing Updates Special Features Control" bitfld.long 0x04 31. " STALL_READS_DURING_TIMING_UPDATE ,Disallow configuration reads during a timing update" "Allow,Disallow" bitfld.long 0x04 30. " STALL_WRITES_DURING_TIMING_UPDATE ,Disallow configuration writes during a timing update" "Allow,Disallow" textline " " bitfld.long 0x04 29. " LINKED_TIMING_UPDATE_TIMEOUT ,Linked timing update after 16k emcclk ticks enable" "Disabled,Enabled" bitfld.long 0x04 28. " LINKED_TIMING_UPDATE ,Allow per-channel TIMING_UPDATE requests" "Allow,Disallow" textline " " bitfld.long 0x04 9.--10. " UPDATE_DLL_IN_UPDATE ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..." bitfld.long 0x04 8. " UPDATE_DLL_IN_CLKCHANGE ,Allow a pad macro DLL update to be triggered during a clock change timing update" "Disallow,Allow" textline " " bitfld.long 0x04 1.--2. " UPDATE_AUTOCAL_IN_UPDATE ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..." bitfld.long 0x04 0. " UPDATE_AUTO_CAL_IN_CLKCHANGE ,Allow a pad macro autocal update to be triggered during a clock change timing update" "Disallow,Allow" sif (cpuis("TEGRAX2")) group.long 0x5F8++0x07 line.long 0x00 "DLL_CFG_2_0,DLL Config register 2" bitfld.long 0x00 4.--7. " DDLL_VTTCDB_VDDA_LVL ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DDLL_VTTDDLL_VDDA_LVL ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DLL_CFG_3_0,DLL Config register 3" bitfld.long 0x04 20.--21. " DDLL_VTTCDB_VDDA_WB_CTRL ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level" bitfld.long 0x04 16.--17. " DDLL_VTTDDLL_VDDA_WB_CTRL ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level" textline " " bitfld.long 0x04 8.--12. " DDLL_VTTCDB_VDDA_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " DDLL_VTTDDLL_VDDA_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif width 15. tree "PMACRO Registers" tree "QUSE DDLL Register" group.long 0x600++0x03 line.long 0x00 "RANK0_0_0,Rank 0 QUSE DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to QUSE trimmer value for rank0 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to QUSE trimmer value for rank0 byte0" group.long 0x604++0x03 line.long 0x00 "RANK0_1_0,Rank 0 QUSE DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to QUSE trimmer value for rank0 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to QUSE trimmer value for rank0 byte2" group.long 0x608++0x03 line.long 0x00 "RANK0_2_0,Rank 0 QUSE DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to QUSE trimmer value for rank0 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to QUSE trimmer value for rank0 byte4" group.long 0x60C++0x03 line.long 0x00 "RANK0_3_0,Rank 0 QUSE DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to QUSE trimmer value for rank0 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to QUSE trimmer value for rank0 byte6" group.long 0x610++0x03 line.long 0x00 "RANK0_4_0,Rank 0 CMD DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to QUSE trimmer value for rank0 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to QUSE trimmer value for rank0 command0" group.long 0x614++0x03 line.long 0x00 "RANK0_5_0,Rank 0 CMD DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to QUSE trimmer value for rank0 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to QUSE trimmer value for rank0 command2" textline " " group.long 0x620++0x03 line.long 0x00 "RANK1_0_0,Rank 1 QUSE DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to QUSE trimmer value for rank1 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to QUSE trimmer value for rank1 byte0" group.long 0x624++0x03 line.long 0x00 "RANK1_1_0,Rank 1 QUSE DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to QUSE trimmer value for rank1 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to QUSE trimmer value for rank1 byte2" group.long 0x628++0x03 line.long 0x00 "RANK1_2_0,Rank 1 QUSE DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to QUSE trimmer value for rank1 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to QUSE trimmer value for rank1 byte4" group.long 0x62C++0x03 line.long 0x00 "RANK1_3_0,Rank 1 QUSE DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to QUSE trimmer value for rank1 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to QUSE trimmer value for rank1 byte6" group.long 0x630++0x03 line.long 0x00 "RANK1_4_0,Rank 1 CMD DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to QUSE trimmer value for rank1 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to QUSE trimmer value for rank1 command0" group.long 0x634++0x03 line.long 0x00 "RANK1_5_0,Rank 1 CMD DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to QUSE trimmer value for rank1 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to QUSE trimmer value for rank1 command2" tree.end tree "OB DDLL Long Registers" group.long 0x640++0x03 line.long 0x00 "DQ_RANK0_0_0,Rank 0 OB Long DQ DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to OB trimmer value for rank0 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to OB trimmer value for rank0 byte0" group.long 0x644++0x03 line.long 0x00 "DQ_RANK0_1_0,Rank 0 OB Long DQ DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to OB trimmer value for rank0 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to OB trimmer value for rank0 byte2" group.long 0x648++0x03 line.long 0x00 "DQ_RANK0_2_0,Rank 0 OB Long DQ DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to OB trimmer value for rank0 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to OB trimmer value for rank0 byte4" group.long 0x64C++0x03 line.long 0x00 "DQ_RANK0_3_0,Rank 0 OB Long DQ DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to OB trimmer value for rank0 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to OB trimmer value for rank0 byte6" group.long 0x650++0x03 line.long 0x00 "DQ_RANK0_4_0,Rank 0 OB Long DQ DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to OB trimmer value for rank0 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to OB trimmer value for rank0 command0" group.long 0x654++0x03 line.long 0x00 "DQ_RANK0_5_0,Rank 0 OB Long DQ DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to OB trimmer value for rank0 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to OB trimmer value for rank0 command2" textline " " group.long 0x660++0x03 line.long 0x00 "DQ_RANK1_0_0,Rank 1 OB Long DQ DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to OB trimmer value for rank1 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to OB trimmer value for rank1 byte0" group.long 0x664++0x03 line.long 0x00 "DQ_RANK1_1_0,Rank 1 OB Long DQ DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to OB trimmer value for rank1 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to OB trimmer value for rank1 byte2" group.long 0x668++0x03 line.long 0x00 "DQ_RANK1_2_0,Rank 1 OB Long DQ DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to OB trimmer value for rank1 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to OB trimmer value for rank1 byte4" group.long 0x66C++0x03 line.long 0x00 "DQ_RANK1_3_0,Rank 1 OB Long DQ DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to OB trimmer value for rank1 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to OB trimmer value for rank1 byte6" group.long 0x670++0x03 line.long 0x00 "DQ_RANK1_4_0,Rank 1 OB Long DQ DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to OB trimmer value for rank1 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to OB trimmer value for rank1 command0" group.long 0x674++0x03 line.long 0x00 "DQ_RANK1_5_0,Rank 1 OB Long DQ DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to OB trimmer value for rank1 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to OB trimmer value for rank1 command2" textline " " group.long 0x680++0x03 line.long 0x00 "DQS_RANK0_0_0,Rank 0 OB Long DQS DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to OB DQS trimmer value for rank0 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to OB DQS trimmer value for rank0 byte0" group.long 0x684++0x03 line.long 0x00 "DQS_RANK0_1_0,Rank 0 OB Long DQS DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to OB DQS trimmer value for rank0 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to OB DQS trimmer value for rank0 byte2" group.long 0x688++0x03 line.long 0x00 "DQS_RANK0_2_0,Rank 0 OB Long DQS DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to OB DQS trimmer value for rank0 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to OB DQS trimmer value for rank0 byte4" group.long 0x68C++0x03 line.long 0x00 "DQS_RANK0_3_0,Rank 0 OB Long DQS DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to OB DQS trimmer value for rank0 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to OB DQS trimmer value for rank0 byte6" group.long 0x690++0x03 line.long 0x00 "DQS_RANK0_4_0,Rank 0 OB Long DQS DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to OB DQS trimmer value for rank0 Command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to OB DQS trimmer value for rank0 Command0" group.long 0x694++0x03 line.long 0x00 "DQS_RANK0_5_0,Rank 0 OB Long DQS DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to OB DQS trimmer value for rank0 Command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to OB DQS trimmer value for rank0 Command2" textline " " group.long 0x6A0++0x03 line.long 0x00 "DQS_RANK1_0_0,Rank 1 OB Long DQS DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to OB DQS trimmer value for rank1 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to OB DQS trimmer value for rank1 byte0" group.long 0x6A4++0x03 line.long 0x00 "DQS_RANK1_1_0,Rank 1 OB Long DQS DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to OB DQS trimmer value for rank1 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to OB DQS trimmer value for rank1 byte2" group.long 0x6A8++0x03 line.long 0x00 "DQS_RANK1_2_0,Rank 1 OB Long DQS DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to OB DQS trimmer value for rank1 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to OB DQS trimmer value for rank1 byte4" group.long 0x6AC++0x03 line.long 0x00 "DQS_RANK1_3_0,Rank 1 OB Long DQS DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to OB DQS trimmer value for rank1 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to OB DQS trimmer value for rank1 byte6" group.long 0x6B0++0x03 line.long 0x00 "DQS_RANK1_4_0,Rank 1 OB Long DQS DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to OB DQS trimmer value for rank1 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to OB DQS trimmer value for rank1 command0" group.long 0x6B4++0x03 line.long 0x00 "DQS_RANK1_5_0,Rank 1 OB Long DQS DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to OB DQS trimmer value for rank1 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to OB DQS trimmer value for rank1 command2" tree.end tree "IB DDLL DQS Long Registers" group.long 0x6C0++0x03 line.long 0x00 "RANK0_0_0,Rank 0 IB Long DQS DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to IB DQS trimmer value for rank0 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to IB DQS trimmer value for rank0 byte0" group.long 0x6C4++0x03 line.long 0x00 "RANK0_1_0,Rank 0 IB Long DQS DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to IB DQS trimmer value for rank0 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to IB DQS trimmer value for rank0 byte2" group.long 0x6C8++0x03 line.long 0x00 "RANK0_2_0,Rank 0 IB Long DQS DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to IB DQS trimmer value for rank0 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to IB DQS trimmer value for rank0 byte4" group.long 0x6CC++0x03 line.long 0x00 "RANK0_3_0,Rank 0 IB Long DQS DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to IB DQS trimmer value for rank0 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to IB DQS trimmer value for rank0 byte6" group.long 0x6D0++0x03 line.long 0x00 "RANK0_4_0,Rank 0 IB Long DQS DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to IB DQS trimmer value for rank0 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to IB DQS trimmer value for rank0 command0" group.long 0x6D4++0x03 line.long 0x00 "RANK0_5_0,Rank 0 IB Long DQS DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to IB DQS trimmer value for rank0 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to IB DQS trimmer value for rank0 command2" textline " " group.long 0x6E0++0x03 line.long 0x00 "RANK1_0_0,Rank 1 IB Long DQS DDLL Value For Byte0 And Byte1" hexmask.long.word 0x00 16.--26. 1. " BYTE1 ,Programmed to IB DQS trimmer value for rank1 byte1" hexmask.long.word 0x00 0.--10. 1. " BYTE0 ,Programmed to IB DQS trimmer value for rank1 byte0" group.long 0x6E4++0x03 line.long 0x00 "RANK1_1_0,Rank 1 IB Long DQS DDLL Value For Byte2 And Byte3" hexmask.long.word 0x00 16.--26. 1. " BYTE3 ,Programmed to IB DQS trimmer value for rank1 byte3" hexmask.long.word 0x00 0.--10. 1. " BYTE2 ,Programmed to IB DQS trimmer value for rank1 byte2" group.long 0x6E8++0x03 line.long 0x00 "RANK1_2_0,Rank 1 IB Long DQS DDLL Value For Byte4 And Byte5" hexmask.long.word 0x00 16.--26. 1. " BYTE5 ,Programmed to IB DQS trimmer value for rank1 byte5" hexmask.long.word 0x00 0.--10. 1. " BYTE4 ,Programmed to IB DQS trimmer value for rank1 byte4" group.long 0x6EC++0x03 line.long 0x00 "RANK1_3_0,Rank 1 IB Long DQS DDLL Value For Byte6 And Byte7" hexmask.long.word 0x00 16.--26. 1. " BYTE7 ,Programmed to IB DQS trimmer value for rank1 byte7" hexmask.long.word 0x00 0.--10. 1. " BYTE6 ,Programmed to IB DQS trimmer value for rank1 byte6" group.long 0x6F0++0x03 line.long 0x00 "RANK1_4_0,Rank 1 IB Long DQS DDLL Value For Command0 And Command1" hexmask.long.word 0x00 16.--26. 1. " CMD1 ,Programmed to IB DQS trimmer value for rank1 command1" hexmask.long.word 0x00 0.--10. 1. " CMD0 ,Programmed to IB DQS trimmer value for rank1 command0" group.long 0x6F4++0x03 line.long 0x00 "RANK1_5_0,Rank 1 IB Long DQS DDLL Value For Command2 And Command3" hexmask.long.word 0x00 16.--26. 1. " CMD3 ,Programmed to IB DQS trimmer value for rank1 command3" hexmask.long.word 0x00 0.--10. 1. " CMD2 ,Programmed to IB DQS trimmer value for rank1 command2" tree.end textline " " width 22. group.long 0x700++0x03 line.long 0x00 "AUTOCAL_CFG_0_0,IOBRICK Controls AUTO CAL PADMACRO Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE3 ,DQS E_CAL_UPDATE byte BYTE3" "Disabled,Enabled" textline " " textfld " " endif bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE3 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 25. " DQS_DRV_SEL_BYTE3 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 24. " CMD_DRV_SEL_BYTE3 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " DQS_E_CAL_UPDATE_BYTE2 ,DQS E_CAL_UPDATE byte BYTE2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " DQS_E_CAL_BYPASS_BYTE2 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 17. " DQS_DRV_SEL_BYTE2 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 16. " CMD_DRV_SEL_BYTE2 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 11. " DQS_E_CAL_UPDATE_BYTE1 ,DQS E_CAL_UPDATE byte BYTE1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " DQS_E_CAL_BYPASS_BYTE1 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 9. " DQS_DRV_SEL_BYTE1 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 8. " CMD_DRV_SEL_BYTE1 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 3. " DQS_E_CAL_UPDATE_BYTE0 ,DQS E_CAL_UPDATE byte BYTE0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 2. " DQS_E_CAL_BYPASS_BYTE0 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 1. " DQS_DRV_SEL_BYTE0 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 0. " CMD_DRV_SEL_BYTE0 ,CMD pad calibration codes select" "CMD,CA" group.long 0x704++0x03 line.long 0x00 "AUTOCAL_CFG_1_0,IOBRICK Controls AUTO CAL PADMACRO Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE7 ,DQS E_CAL_UPDATE byte BYTE7" "Disabled,Enabled" textline " " textfld " " endif bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE7 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 25. " DQS_DRV_SEL_BYTE7 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 24. " CMD_DRV_SEL_BYTE7 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " DQS_E_CAL_UPDATE_BYTE6 ,DQS E_CAL_UPDATE byte BYTE6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " DQS_E_CAL_BYPASS_BYTE6 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 17. " DQS_DRV_SEL_BYTE6 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 16. " CMD_DRV_SEL_BYTE6 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 11. " DQS_E_CAL_UPDATE_BYTE5 ,DQS E_CAL_UPDATE byte BYTE5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " DQS_E_CAL_BYPASS_BYTE5 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 9. " DQS_DRV_SEL_BYTE5 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 8. " CMD_DRV_SEL_BYTE5 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 3. " DQS_E_CAL_UPDATE_BYTE4 ,DQS E_CAL_UPDATE byte BYTE4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 2. " DQS_E_CAL_BYPASS_BYTE4 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 1. " DQS_DRV_SEL_BYTE4 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 0. " CMD_DRV_SEL_BYTE4 ,CMD pad calibration codes select" "CMD,CA" group.long 0x708++0x03 line.long 0x00 "AUTOCAL_CFG_2_0,IOBRICK Controls AUTO CAL PADMACRO Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_CMD3 ,DQS E_CAL_UPDATE byte CMD3" "Disabled,Enabled" textline " " textfld " " endif bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_CMD3 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 25. " DQS_DRV_SEL_CMD3 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 24. " CMD_DRV_SEL_CMD3 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " DQS_E_CAL_UPDATE_CMD2 ,DQS E_CAL_UPDATE byte CMD2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " DQS_E_CAL_BYPASS_CMD2 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 17. " DQS_DRV_SEL_CMD2 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 16. " CMD_DRV_SEL_CMD2 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 11. " DQS_E_CAL_UPDATE_CMD1 ,DQS E_CAL_UPDATE byte CMD1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " DQS_E_CAL_BYPASS_CMD1 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 9. " DQS_DRV_SEL_CMD1 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 8. " CMD_DRV_SEL_CMD1 ,CMD pad calibration codes select" "CMD,CA" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 3. " DQS_E_CAL_UPDATE_CMD0 ,DQS E_CAL_UPDATE byte CMD0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 2. " DQS_E_CAL_BYPASS_CMD0 ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled" bitfld.long 0x00 1. " DQS_DRV_SEL_CMD0 ,DQS pad calibration codes select" "DQS,CA" bitfld.long 0x00 0. " CMD_DRV_SEL_CMD0 ,CMD pad calibration codes select" "CMD,CA" group.long 0x720++0x03 line.long 0x00 "TX_PWRD_0_0,Clock Gate Register For Unused TX Bits In Byte1 And Byte0 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE1 ,Byte1 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_BYTE1 ,Byte1 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for CMD pin of Byte1" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQSN of Byte1" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQSP of Byte1" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit8 of Byte1" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit7 of Byte1" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit6 of Byte1" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit5 of Byte1" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit4 of Byte1" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit3 of Byte1" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit2 of Byte1" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit1 of Byte1" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_BYTE1 ,Programmed to TX PWRD value for DQ bit0 of Byte1" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_BYTE0 ,Byte0 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_BYTE0 ,Byte0 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for CMD pin of Byte0" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQSN of Byte0" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQSP of Byte0" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit8 of Byte0" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit7 of Byte0" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit6 of Byte0" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit5 of Byte0" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit4 of Byte0" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit3 of Byte0" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit2 of Byte0" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit1 of Byte0" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_BYTE0 ,Programmed to TX PWRD value for DQ bit0 of Byte0" "0,1" group.long 0x724++0x03 line.long 0x00 "TX_PWRD_1_0,Clock Gate Register For Unused TX Bits In Byte3 And Byte2 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE3 ,Byte3 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_BYTE3 ,Byte3 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for CMD pin of Byte3" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQSN of Byte3" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQSP of Byte3" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit8 of Byte3" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit7 of Byte3" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit6 of Byte3" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit5 of Byte3" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit4 of Byte3" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit3 of Byte3" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit2 of Byte3" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit1 of Byte3" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_BYTE3 ,Programmed to TX PWRD value for DQ bit0 of Byte3" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_BYTE2 ,Byte2 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_BYTE2 ,Byte2 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for CMD pin of Byte2" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQSN of Byte2" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQSP of Byte2" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit8 of Byte2" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit7 of Byte2" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit6 of Byte2" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit5 of Byte2" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit4 of Byte2" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit3 of Byte2" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit2 of Byte2" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit1 of Byte2" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_BYTE2 ,Programmed to TX PWRD value for DQ bit0 of Byte2" "0,1" group.long 0x728++0x03 line.long 0x00 "TX_PWRD_2_0,Clock Gate Register For Unused TX Bits In Byte5 And Byte4 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE5 ,Byte5 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_BYTE5 ,Byte5 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for CMD pin of Byte5" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQSN of Byte5" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQSP of Byte5" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit8 of Byte5" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit7 of Byte5" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit6 of Byte5" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit5 of Byte5" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit4 of Byte5" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit3 of Byte5" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit2 of Byte5" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit1 of Byte5" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_BYTE5 ,Programmed to TX PWRD value for DQ bit0 of Byte5" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_BYTE4 ,Byte4 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_BYTE4 ,Byte4 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for CMD pin of Byte4" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQSN of Byte4" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQSP of Byte4" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit8 of Byte4" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit7 of Byte4" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit6 of Byte4" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit5 of Byte4" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit4 of Byte4" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit3 of Byte4" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit2 of Byte4" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit1 of Byte4" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_BYTE4 ,Programmed to TX PWRD value for DQ bit0 of Byte4" "0,1" group.long 0x72C++0x03 line.long 0x00 "TX_PWRD_3_0,Clock Gate Register For Unused TX Bits In Byte7 And Byte6 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE7 ,Byte7 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_BYTE7 ,Byte7 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for CMD pin of Byte7" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQSN of Byte7" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQSP of Byte7" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit8 of Byte7" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit7 of Byte7" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit6 of Byte7" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit5 of Byte7" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit4 of Byte7" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit3 of Byte7" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit2 of Byte7" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit1 of Byte7" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_BYTE7 ,Programmed to TX PWRD value for DQ bit0 of Byte7" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_BYTE6 ,Byte6 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_BYTE6 ,Byte6 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for CMD pin of Byte6" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQSN of Byte6" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQSP of Byte6" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit8 of Byte6" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit7 of Byte6" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit6 of Byte6" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit5 of Byte6" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit4 of Byte6" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit3 of Byte6" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit2 of Byte6" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit1 of Byte6" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_BYTE6 ,Programmed to TX PWRD value for DQ bit0 of Byte6" "0,1" group.long 0x730++0x03 line.long 0x00 "TX_PWRD_4_0,Clock Gate Register For Unused TX Bits In Cmd1 And Cmd0 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD1 ,Cmd1 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_CMD1 ,Cmd1 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_CMD1 ,Programmed to TX PWRD value for CMD pin of Cmd1" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQSN of Cmd1" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQSP of Cmd1" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit8 of Cmd1" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit7 of Cmd1" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit6 of Cmd1" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit5 of Cmd1" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit4 of Cmd1" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit3 of Cmd1" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit2 of Cmd1" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit1 of Cmd1" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_CMD1 ,Programmed to TX PWRD value for DQ bit0 of Cmd1" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_CMD0 ,Cmd0 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_CMD0 ,Cmd0 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_CMD0 ,Programmed to TX PWRD value for CMD pin of Cmd0" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQSN of Cmd0" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQSP of Cmd0" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit8 of Cmd0" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit7 of Cmd0" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit6 of Cmd0" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit5 of Cmd0" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit4 of Cmd0" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit3 of Cmd0" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit2 of Cmd0" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit1 of Cmd0" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_CMD0 ,Programmed to TX PWRD value for DQ bit0 of Cmd0" "0,1" group.long 0x734++0x03 line.long 0x00 "TX_PWRD_5_0,Clock Gate Register For Unused TX Bits In Cmd3 And Cmd2 Brick" bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD3 ,Cmd3 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 28. " CMD_TX_E_WKPU_CMD3 ,Cmd3 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CMD_TX_PWRD_CMD3 ,Programmed to TX PWRD value for CMD pin of Cmd3" "0,1" bitfld.long 0x00 26. " DQSN_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQSN of Cmd3" "0,1" bitfld.long 0x00 25. " DQSP_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQSP of Cmd3" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit8 of Cmd3" "0,1" bitfld.long 0x00 23. " DQ7_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit7 of Cmd3" "0,1" bitfld.long 0x00 22. " DQ6_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit6 of Cmd3" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit5 of Cmd3" "0,1" bitfld.long 0x00 20. " DQ4_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit4 of Cmd3" "0,1" bitfld.long 0x00 19. " DQ3_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit3 of Cmd3" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit2 of Cmd3" "0,1" bitfld.long 0x00 17. " DQ1_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit1 of Cmd3" "0,1" bitfld.long 0x00 16. " DQ0_TX_PWRD_CMD3 ,Programmed to TX PWRD value for DQ bit0 of Cmd3" "0,1" textline " " bitfld.long 0x00 13. " CMD_TX_E_WKPD_CMD2 ,Cmd2 weak pull down enable" "Disabled,Enabled" bitfld.long 0x00 12. " CMD_TX_E_WKPU_CMD2 ,Cmd2 weak pull up enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CMD_TX_PWRD_CMD2 ,Programmed to TX PWRD value for CMD pin of Cmd2" "0,1" bitfld.long 0x00 10. " DQSN_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQSN of Cmd2" "0,1" bitfld.long 0x00 9. " DQSP_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQSP of Cmd2" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit8 of Cmd2" "0,1" bitfld.long 0x00 7. " DQ7_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit7 of Cmd2" "0,1" bitfld.long 0x00 6. " DQ6_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit6 of Cmd2" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit5 of Cmd2" "0,1" bitfld.long 0x00 4. " DQ4_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit4 of Cmd2" "0,1" bitfld.long 0x00 3. " DQ3_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit3 of Cmd2" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit2 of Cmd2" "0,1" bitfld.long 0x00 1. " DQ1_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit1 of Cmd2" "0,1" bitfld.long 0x00 0. " DQ0_TX_PWRD_CMD2 ,Programmed to TX PWRD value for DQ bit0 of Cmd2" "0,1" textline " " group.long 0x740++0x03 line.long 0x00 "TX_SEL_CLK_SRC_0_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for CMD pin of Byte1" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQSN of Byte1" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQSP of Byte1" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit8 of Byte1" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit7 of Byte1" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit6 of Byte1" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit5 of Byte1" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit4 of Byte1" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit3 of Byte1" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit2 of Byte1" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit1 of Byte1" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_BYTE1 ,Programmed to TX clock source select value for DQ bit0 of Byte1" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for CMD pin of Byte0" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQSN of Byte0" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQSP of Byte0" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit8 of Byte0" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit7 of Byte0" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit6 of Byte0" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit5 of Byte0" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit4 of Byte0" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit3 of Byte0" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit2 of Byte0" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit1 of Byte0" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_BYTE0 ,Programmed to TX clock source select value for DQ bit0 of Byte0" "0,1" group.long 0x744++0x03 line.long 0x00 "TX_SEL_CLK_SRC_1_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for CMD pin of Byte3" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQSN of Byte3" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQSP of Byte3" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit8 of Byte3" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit7 of Byte3" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit6 of Byte3" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit5 of Byte3" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit4 of Byte3" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit3 of Byte3" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit2 of Byte3" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit1 of Byte3" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_BYTE3 ,Programmed to TX clock source select value for DQ bit0 of Byte3" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for CMD pin of Byte2" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQSN of Byte2" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQSP of Byte2" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit8 of Byte2" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit7 of Byte2" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit6 of Byte2" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit5 of Byte2" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit4 of Byte2" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit3 of Byte2" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit2 of Byte2" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit1 of Byte2" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_BYTE2 ,Programmed to TX clock source select value for DQ bit0 of Byte2" "0,1" group.long 0x748++0x03 line.long 0x00 "TX_SEL_CLK_SRC_2_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for CMD pin of Byte5" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQSN of Byte5" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQSP of Byte5" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit8 of Byte5" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit7 of Byte5" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit6 of Byte5" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit5 of Byte5" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit4 of Byte5" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit3 of Byte5" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit2 of Byte5" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit1 of Byte5" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_BYTE5 ,Programmed to TX clock source select value for DQ bit0 of Byte5" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for CMD pin of Byte4" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQSN of Byte4" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQSP of Byte4" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit8 of Byte4" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit7 of Byte4" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit6 of Byte4" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit5 of Byte4" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit4 of Byte4" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit3 of Byte4" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit2 of Byte4" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit1 of Byte4" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_BYTE4 ,Programmed to TX clock source select value for DQ bit0 of Byte4" "0,1" group.long 0x74C++0x03 line.long 0x00 "TX_SEL_CLK_SRC_3_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for CMD pin of Byte7" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQSN of Byte7" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQSP of Byte7" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit8 of Byte7" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit7 of Byte7" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit6 of Byte7" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit5 of Byte7" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit4 of Byte7" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit3 of Byte7" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit2 of Byte7" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit1 of Byte7" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_BYTE7 ,Programmed to TX clock source select value for DQ bit0 of Byte7" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for CMD pin of Byte6" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQSN of Byte6" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQSP of Byte6" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit8 of Byte6" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit7 of Byte6" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit6 of Byte6" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit5 of Byte6" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit4 of Byte6" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit3 of Byte6" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit2 of Byte6" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit1 of Byte6" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_BYTE6 ,Programmed to TX clock source select value for DQ bit0 of Byte6" "0,1" group.long 0x750++0x03 line.long 0x00 "TX_SEL_CLK_SRC_4_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for CMD pin of Cmd1" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQSN of Cmd1" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQSP of Cmd1" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit8 of Cmd1" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit7 of Cmd1" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit6 of Cmd1" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit5 of Cmd1" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit4 of Cmd1" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit3 of Cmd1" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit2 of Cmd1" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit1 of Cmd1" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_CMD1 ,Programmed to TX clock source select value for DQ bit0 of Cmd1" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for CMD pin of Cmd0" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQSN of Cmd0" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQSP of Cmd0" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit8 of Cmd0" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit7 of Cmd0" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit6 of Cmd0" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit5 of Cmd0" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit4 of Cmd0" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit3 of Cmd0" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit2 of Cmd0" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit1 of Cmd0" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_CMD0 ,Programmed to TX clock source select value for DQ bit0 of Cmd0" "0,1" group.long 0x754++0x03 line.long 0x00 "TX_SEL_CLK_SRC_5_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick" bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for CMD pin of Cmd3" "0,1" bitfld.long 0x00 26. " DQSN_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQSN of Cmd3" "0,1" bitfld.long 0x00 25. " DQSP_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQSP of Cmd3" "0,1" textline " " bitfld.long 0x00 24. " DQ8_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit8 of Cmd3" "0,1" bitfld.long 0x00 23. " DQ7_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit7 of Cmd3" "0,1" bitfld.long 0x00 22. " DQ6_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit6 of Cmd3" "0,1" textline " " bitfld.long 0x00 21. " DQ5_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit5 of Cmd3" "0,1" bitfld.long 0x00 20. " DQ4_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit4 of Cmd3" "0,1" bitfld.long 0x00 19. " DQ3_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit3 of Cmd3" "0,1" textline " " bitfld.long 0x00 18. " DQ2_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit2 of Cmd3" "0,1" bitfld.long 0x00 17. " DQ1_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit1 of Cmd3" "0,1" bitfld.long 0x00 16. " DQ0_TX_SEL_CLK_SRC_CMD3 ,Programmed to TX clock source select value for DQ bit0 of Cmd3" "0,1" textline " " bitfld.long 0x00 11. " CMD_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for CMD pin of Cmd2" "0,1" bitfld.long 0x00 10. " DQSN_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQSN of Cmd2" "0,1" bitfld.long 0x00 9. " DQSP_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQSP of Cmd2" "0,1" textline " " bitfld.long 0x00 8. " DQ8_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit8 of Cmd2" "0,1" bitfld.long 0x00 7. " DQ7_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit7 of Cmd2" "0,1" bitfld.long 0x00 6. " DQ6_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit6 of Cmd2" "0,1" textline " " bitfld.long 0x00 5. " DQ5_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit5 of Cmd2" "0,1" bitfld.long 0x00 4. " DQ4_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit4 of Cmd2" "0,1" bitfld.long 0x00 3. " DQ3_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit3 of Cmd2" "0,1" textline " " bitfld.long 0x00 2. " DQ2_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit2 of Cmd2" "0,1" bitfld.long 0x00 1. " DQ1_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit1 of Cmd2" "0,1" bitfld.long 0x00 0. " DQ0_TX_SEL_CLK_SRC_CMD2 ,Programmed to TX clock source select value for DQ bit0 of Cmd2" "0,1" textline " " group.long 0x760++0x03 line.long 0x00 "DDLL_BYPASS_0,DLL And DDLLCAL Bypass" bitfld.long 0x00 31. " CMD_DDLLCAL_BIT_RXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 30. " CMD_DDLLCAL_BIT_TXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 29. " CMD_DDLLCAL_BIT_TXDQS_BYPASS ,DDLL calibration value bypass" "0,1" textline " " bitfld.long 0x00 27. " CMD_DDLLCAL_BYTE_QU_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 26. " CMD_DDLLCAL_BYTE_RXDQS_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 25. " CMD_DDLLCAL_BYTE_TXDQS_BYPASS ,DDLL calibration value bypass" "0,1" textline " " bitfld.long 0x00 24. " CMD_DDLLCAL_BYTE_TXDQ_BYPASS ,Bypass the DDLL calibration value" "0,1" bitfld.long 0x00 23. " CMD_DDLL_BIT_RXDQ_BYPASS ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 22. " CMD_DDLL_BIT_TXDQS_BYPASS ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 21. " CMD_DDLL_BIT_TXDQ_BYPASS ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 20. " CMD_DDLL_BYTE_RXRT_BYPASS ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 19. " CMD_DDLL_BYTE_QU_BYPASS ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 18. " CMD_DDLL_BYTE_RXDQS_BYPASS ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 17. " CMD_DDLL_BYTE_TXDQS_BYPASS ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 16. " CMD_DDLL_BYTE_TXDQ_BYPASS ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 15. " DATA_DDLLCAL_BIT_RXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 14. " DATA_DDLLCAL_BIT_TXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 13. " DATA_DDLLCAL_BIT_TXDQS_BYPASS ,DDLL calibration value bypass" "0,1" textline " " bitfld.long 0x00 11. " DATA_DDLLCAL_BYTE_QU_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 10. " DATA_DDLLCAL_BYTE_RXRQS_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 9. " DATA_DDLLCAL_BYTE_TXDQS_BYPASS ,DDLL calibration value bypass" "0,1" textline " " bitfld.long 0x00 8. " DATA_DDLLCAL_BYTE_TXDQ_BYPASS ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 7. " DATA_DDLL_BIT_RXDQ_BYPASS ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 6. " DATA_DDLL_BIT_TXDQS_BYPASS ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 5. " DATA_DDLL_BIT_TXDQ_BYPASS ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 4. " DATA_DDLL_BYTE_RXRT_BYPASS ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 3. " DATA_DDLL_BYTE_QU_BYPASS ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 2. " DATA_DDLL_BYTE_RXDQS_BYPASS ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 1. " DATA_DDLL_BYTE_TXDQS_BYPASS ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 0. " DATA_DDLL_BYTE_TXDQ_BYPASS ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass" textline " " group.long 0x770++0x03 line.long 0x00 "DDLL_PWRD_0_0,DLL Power Down Mode Enables" bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE3 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 30. " DDLL_BIT_TXDQ_PWRD_BYTE3 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 28. " DDLL_BYTE_RXRT_PWRD_BYTE3 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " DDLL_BYTE_QU_PWRD_BYTE3 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 26. " DDLL_BYTE_RXDQS_PWRD_BYTE3 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYTE_TXDQS_PWRD_BYTE3 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DDLL_BYTE_TXDQ_PWRD_BYTE3 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 23. " DDLL_BIT_RXDQ_PWRD_BYTE2 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 22. " DDLL_BIT_TXDQ_PWRD_BYTE2 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DDLL_BYTE_RXRT_PWRD_BYTE2 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 19. " DDLL_BYTE_QU_PWRD_BYTE2 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 18. " DDLL_BYTE_RXDQS_PWRD_BYTE2 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDLL_BYTE_TXDQS_PWRD_BYTE2 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 16. " DDLL_BYTE_TXDQ_PWRD_BYTE2 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 15. " DDLL_BIT_RXDQ_PWRD_BYTE1 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " DDLL_BIT_TXDQ_PWRD_BYTE1 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 12. " DDLL_BYTE_RXRT_PWRD_BYTE1 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 11. " DDLL_BYTE_QU_PWRD_BYTE1 ,Programmed to QUSE power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DDLL_BYTE_RXDQS_PWRD_BYTE1 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYTE_TXDQS_PWRD_BYTE1 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 8. " DDLL_BYTE_TXDQ_PWRD_BYTE1 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DDLL_BIT_RXDQ_PWRD_BYTE0 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 6. " DDLL_BIT_TXDQ_PWRD_BYTE0 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 4. " DDLL_BYTE_RXRT_PWRD_BYTE0 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DDLL_BYTE_QU_PWRD_BYTE0 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 2. " DDLL_BYTE_RXDQS_PWRD_BYTE0 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYTE_TXDQS_PWRD_BYTE0 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DDLL_BYTE_TXDQ_PWRD_BYTE0 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" group.long 0x774++0x03 line.long 0x00 "DDLL_PWRD_1_0,DLL Power Down Mode Enables" bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE7 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 30. " DDLL_BIT_TXDQ_PWRD_BYTE7 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 28. " DDLL_BYTE_RXRT_PWRD_BYTE7 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " DDLL_BYTE_QU_PWRD_BYTE7 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 26. " DDLL_BYTE_RXDQS_PWRD_BYTE7 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYTE_TXDQS_PWRD_BYTE7 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DDLL_BYTE_TXDQ_PWRD_BYTE7 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 23. " DDLL_BIT_RXDQ_PWRD_BYTE6 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 22. " DDLL_BIT_TXDQ_PWRD_BYTE6 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DDLL_BYTE_RXRT_PWRD_BYTE6 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 19. " DDLL_BYTE_QU_PWRD_BYTE6 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 18. " DDLL_BYTE_RXDQS_PWRD_BYTE6 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDLL_BYTE_TXDQS_PWRD_BYTE6 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 16. " DDLL_BYTE_TXDQ_PWRD_BYTE6 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 15. " DDLL_BIT_RXDQ_PWRD_BYTE5 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " DDLL_BIT_TXDQ_PWRD_BYTE5 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 12. " DDLL_BYTE_RXRT_PWRD_BYTE5 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 11. " DDLL_BYTE_QU_PWRD_BYTE5 ,Programmed to QUSE power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DDLL_BYTE_RXDQS_PWRD_BYTE5 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYTE_TXDQS_PWRD_BYTE5 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 8. " DDLL_BYTE_TXDQ_PWRD_BYTE5 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DDLL_BIT_RXDQ_PWRD_BYTE4 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 6. " DDLL_BIT_TXDQ_PWRD_BYTE4 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 4. " DDLL_BYTE_RXRT_PWRD_BYTE4 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DDLL_BYTE_QU_PWRD_BYTE4 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 2. " DDLL_BYTE_RXDQS_PWRD_BYTE4 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYTE_TXDQS_PWRD_BYTE4 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DDLL_BYTE_TXDQ_PWRD_BYTE4 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" group.long 0x778++0x03 line.long 0x00 "DDLL_PWRD_2_0,DLL Power Down Mode Enables" bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_CMD3 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 30. " DDLL_BIT_TXDQ_PWRD_CMD3 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 28. " DDLL_BYTE_RXRT_PWRD_CMD3 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " DDLL_BYTE_QU_PWRD_CMD3 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 26. " DDLL_BYTE_RXDQS_PWRD_CMD3 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYTE_TXDQS_PWRD_CMD3 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DDLL_BYTE_TXDQ_PWRD_CMD3 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 23. " DDLL_BIT_RXDQ_PWRD_CMD2 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 22. " DDLL_BIT_TXDQ_PWRD_CMD2 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DDLL_BYTE_RXRT_PWRD_CMD2 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 19. " DDLL_BYTE_QU_PWRD_CMD2 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 18. " DDLL_BYTE_RXDQS_PWRD_CMD2 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDLL_BYTE_TXDQS_PWRD_CMD2 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 16. " DDLL_BYTE_TXDQ_PWRD_CMD2 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 15. " DDLL_BIT_RXDQ_PWRD_CMD1 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " DDLL_BIT_TXDQ_PWRD_CMD1 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 12. " DDLL_BYTE_RXRT_PWRD_CMD1 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 11. " DDLL_BYTE_QU_PWRD_CMD1 ,Programmed to QUSE power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DDLL_BYTE_RXDQS_PWRD_CMD1 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYTE_TXDQS_PWRD_CMD1 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" bitfld.long 0x00 8. " DDLL_BYTE_TXDQ_PWRD_CMD1 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DDLL_BIT_RXDQ_PWRD_CMD0 ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 6. " DDLL_BIT_TXDQ_PWRD_CMD0 ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled" bitfld.long 0x00 4. " DDLL_BYTE_RXRT_PWRD_CMD0 ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DDLL_BYTE_QU_PWRD_CMD0 ,Programmed to QUSE power down enable value" "Disabled,Enabled" bitfld.long 0x00 2. " DDLL_BYTE_RXDQS_PWRD_CMD0 ,Programmed to DQS RX power down enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYTE_TXDQS_PWRD_CMD0 ,Programmed to DQS TX power down enable value" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DDLL_BYTE_TXDQ_PWRD_CMD0 ,Programmed to DQ TX power down enable value" "Disabled,Enabled" textline " " group.long 0x780++0x03 line.long 0x00 "CMD_CTRL_0_0,DLL Bypass And Power Down Mode Enables For CMD I/O" bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 28. " DDLLCAL_BIT_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 27. " DDLL_BIT_TXCMD_BYPASS_CKE3 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 26. " DDLL_BYTE_TXCMD_PWRD_CKE3 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYT_TXCMD_BYPASS_CKE3 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 24. " CMD_E_INPUT_CKE3 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 20. " DDLLCAL_BIT_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 19. " DDLL_BIT_TXCMD_BYPASS_CKE2 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 18. " DDLL_BYTE_TXCMD_PWRD_CKE2 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 17. " DDLL_BYT_TXCMD_BYPASS_CKE2 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 16. " CMD_E_INPUT_CKE2 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 12. " DDLLCAL_BIT_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 11. " DDLL_BIT_TXCMD_BYPASS_CKE1 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 10. " DDLL_BYTE_TXCMD_PWRD_CKE1 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYT_TXCMD_BYPASS_CKE1 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 8. " CMD_E_INPUT_CKE1 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 4. " DDLLCAL_BIT_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 3. " DDLL_BIT_TXCMD_BYPASS_CKE0 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 2. " DDLL_BYTE_TXCMD_PWRD_CKE0 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYT_TXCMD_BYPASS_CKE0 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 0. " CMD_E_INPUT_CKE0 ,IO_CMD input path enable" "Disabled,Enabled" group.long 0x784++0x03 line.long 0x00 "CMD_CTRL_1_0,DLL Bypass And Power Down Mode Enables For CMD I/O" bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 28. " DDLLCAL_BIT_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 27. " DDLL_BIT_TXCMD_BYPASS_CKE7 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 26. " DDLL_BYTE_TXCMD_PWRD_CKE7 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYT_TXCMD_BYPASS_CKE7 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 24. " CMD_E_INPUT_CKE7 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 20. " DDLLCAL_BIT_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 19. " DDLL_BIT_TXCMD_BYPASS_CKE6 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 18. " DDLL_BYTE_TXCMD_PWRD_CKE6 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 17. " DDLL_BYT_TXCMD_BYPASS_CKE6 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 16. " CMD_E_INPUT_CKE6 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 12. " DDLLCAL_BIT_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 11. " DDLL_BIT_TXCMD_BYPASS_CKE5 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 10. " DDLL_BYTE_TXCMD_PWRD_CKE5 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYT_TXCMD_BYPASS_CKE5 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 8. " CMD_E_INPUT_CKE5 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 4. " DDLLCAL_BIT_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 3. " DDLL_BIT_TXCMD_BYPASS_CKE4 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 2. " DDLL_BYTE_TXCMD_PWRD_CKE4 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYT_TXCMD_BYPASS_CKE4 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 0. " CMD_E_INPUT_CKE4 ,IO_CMD input path enable" "Disabled,Enabled" group.long 0x788++0x03 line.long 0x00 "CMD_CTRL_2_0,DLL Bypass And Power Down Mode Enables For CMD I/O" bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 28. " DDLLCAL_BIT_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 27. " DDLL_BIT_TXCMD_BYPASS_MISC2 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 26. " DDLL_BYTE_TXCMD_PWRD_MISC2 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 25. " DDLL_BYT_TXCMD_BYPASS_MISC2 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 24. " CMD_E_INPUT_MISC2 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 20. " DDLLCAL_BIT_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 19. " DDLL_BIT_TXCMD_BYPASS_MISC1 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 18. " DDLL_BYTE_TXCMD_PWRD_MISC1 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 17. " DDLL_BYT_TXCMD_BYPASS_MISC1 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 16. " CMD_E_INPUT_MISC1 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 12. " DDLLCAL_BIT_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 11. " DDLL_BIT_TXCMD_BYPASS_MISC0 ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 10. " DDLL_BYTE_TXCMD_PWRD_MISC0 ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 9. " DDLL_BYT_TXCMD_BYPASS_MISC0 ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 8. " CMD_E_INPUT_MISC0 ,IO_CMD input path enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DDLLCAL_BYTE_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 4. " DDLLCAL_BIT_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1" bitfld.long 0x00 3. " DDLL_BIT_TXCMD_BYPASS_RESET ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass" textline " " bitfld.long 0x00 2. " DDLL_BYTE_TXCMD_PWRD_RESET ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled" bitfld.long 0x00 1. " DDLL_BYT_TXCMD_BYPASS_RESET ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass" bitfld.long 0x00 0. " CMD_E_INPUT_RESET ,IO_CMD input path enable" "Disabled,Enabled" width 17. tree "OB DDLL Short DQ Registers" group.long 0x800++0x0F line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0 ,Programmed to byte0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE0 ,Programmed to byte0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE0 ,Programmed to byte0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE0 ,Programmed to byte0 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0 ,Programmed to byte0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE0 ,Programmed to byte0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE0 ,Programmed to byte0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE0 ,Programmed to byte0 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0 ,Programmed to byte0 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0 ,Programmed to byte0 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE0 ,Programmed to byte0 pin9 TX fine trimmer value" textline " " group.long 0x810++0x0F line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1 ,Programmed to byte1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE1 ,Programmed to byte1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE1 ,Programmed to byte1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE1 ,Programmed to byte1 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1 ,Programmed to byte1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE1 ,Programmed to byte1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE1 ,Programmed to byte1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE1 ,Programmed to byte1 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1 ,Programmed to byte1 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1 ,Programmed to byte1 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE1 ,Programmed to byte1 pin9 TX fine trimmer value" textline " " group.long 0x820++0x0F line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2 ,Programmed to byte2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE2 ,Programmed to byte2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE2 ,Programmed to byte2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE2 ,Programmed to byte2 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2 ,Programmed to byte2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE2 ,Programmed to byte2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE2 ,Programmed to byte2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE2 ,Programmed to byte2 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2 ,Programmed to byte2 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2 ,Programmed to byte2 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE2 ,Programmed to byte2 pin9 TX fine trimmer value" textline " " group.long 0x830++0x0F line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3 ,Programmed to byte3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE3 ,Programmed to byte3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE3 ,Programmed to byte3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE3 ,Programmed to byte3 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3 ,Programmed to byte3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE3 ,Programmed to byte3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE3 ,Programmed to byte3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE3 ,Programmed to byte3 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3 ,Programmed to byte3 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3 ,Programmed to byte3 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE3 ,Programmed to byte3 pin9 TX fine trimmer value" textline " " group.long 0x840++0x0F line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4 ,Programmed to byte4 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE4 ,Programmed to byte4 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE4 ,Programmed to byte4 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE4 ,Programmed to byte4 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4 ,Programmed to byte4 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE4 ,Programmed to byte4 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE4 ,Programmed to byte4 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE4 ,Programmed to byte4 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4 ,Programmed to byte4 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE4_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4 ,Programmed to byte4 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE4 ,Programmed to byte4 pin9 TX fine trimmer value" textline " " group.long 0x850++0x0F line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5 ,Programmed to byte5 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE5 ,Programmed to byte5 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE5 ,Programmed to byte5 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE5 ,Programmed to byte5 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5 ,Programmed to byte5 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE5 ,Programmed to byte5 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE5 ,Programmed to byte5 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE5 ,Programmed to byte5 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5 ,Programmed to byte5 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE5_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5 ,Programmed to byte5 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE5 ,Programmed to byte5 pin9 TX fine trimmer value" textline " " group.long 0x860++0x0F line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6 ,Programmed to byte6 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE6 ,Programmed to byte6 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE6 ,Programmed to byte6 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE6 ,Programmed to byte6 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6 ,Programmed to byte6 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE6 ,Programmed to byte6 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE6 ,Programmed to byte6 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE6 ,Programmed to byte6 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6 ,Programmed to byte6 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE6_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6 ,Programmed to byte6 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE6 ,Programmed to byte6 pin9 TX fine trimmer value" textline " " group.long 0x870++0x0F line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7 ,Programmed to byte7 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE7 ,Programmed to byte7 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE7 ,Programmed to byte7 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE7 ,Programmed to byte7 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7 ,Programmed to byte7 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE7 ,Programmed to byte7 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE7 ,Programmed to byte7 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE7 ,Programmed to byte7 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7 ,Programmed to byte7 pin8 TX fine trimmer value" line.long 0x0C "RANK0_BYTE7_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7 ,Programmed to byte7 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE7 ,Programmed to byte7 pin9 TX fine trimmer value" textline " " group.long 0x880++0x0F line.long 0x00 "RANK0_CMD0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0 ,Programmed to command0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD0 ,Programmed to command0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD0 ,Programmed to command0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD0 ,Programmed to command0 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0 ,Programmed to command0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD0 ,Programmed to command0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD0 ,Programmed to command0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD0 ,Programmed to command0 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0 ,Programmed to command0 pin8 TX fine trimmer value" line.long 0x0C "RANK0_CMD0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0 ,Programmed to command0 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD0 ,Programmed to command0 pin9 TX fine trimmer value" textline " " group.long 0x890++0x0F line.long 0x00 "RANK0_CMD1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1 ,Programmed to command1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD1 ,Programmed to command1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD1 ,Programmed to command1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD1 ,Programmed to command1 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1 ,Programmed to command1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD1 ,Programmed to command1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD1 ,Programmed to command1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD1 ,Programmed to command1 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1 ,Programmed to command1 pin8 TX fine trimmer value" line.long 0x0C "RANK0_CMD1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1 ,Programmed to command1 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD1 ,Programmed to command1 pin9 TX fine trimmer value" textline " " group.long 0x8A0++0x0F line.long 0x00 "RANK0_CMD2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2 ,Programmed to command2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD2 ,Programmed to command2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD2 ,Programmed to command2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD2 ,Programmed to command2 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2 ,Programmed to command2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD2 ,Programmed to command2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD2 ,Programmed to command2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD2 ,Programmed to command2 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2 ,Programmed to command2 pin8 TX fine trimmer value" line.long 0x0C "RANK0_CMD2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2 ,Programmed to command2 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD2 ,Programmed to command2 pin9 TX fine trimmer value" textline " " group.long 0x8B0++0x0F line.long 0x00 "RANK0_CMD3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3 ,Programmed to command3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD3 ,Programmed to command3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD3 ,Programmed to command3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD3 ,Programmed to command3 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3 ,Programmed to command3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD3 ,Programmed to command3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD3 ,Programmed to command3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD3 ,Programmed to command3 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3 ,Programmed to command3 pin8 TX fine trimmer value" line.long 0x0C "RANK0_CMD3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3 ,Programmed to command3 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD3 ,Programmed to command3 pin9 TX fine trimmer value" textline " " group.long 0x900++0x0F line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0 ,Programmed to byte0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE0 ,Programmed to byte0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE0 ,Programmed to byte0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE0 ,Programmed to byte0 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0 ,Programmed to byte0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE0 ,Programmed to byte0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE0 ,Programmed to byte0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE0 ,Programmed to byte0 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0 ,Programmed to byte0 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0 ,Programmed to byte0 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE0 ,Programmed to byte0 pin9 TX fine trimmer value" textline " " group.long 0x910++0x0F line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1 ,Programmed to byte1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE1 ,Programmed to byte1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE1 ,Programmed to byte1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE1 ,Programmed to byte1 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1 ,Programmed to byte1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE1 ,Programmed to byte1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE1 ,Programmed to byte1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE1 ,Programmed to byte1 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1 ,Programmed to byte1 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1 ,Programmed to byte1 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE1 ,Programmed to byte1 pin9 TX fine trimmer value" textline " " group.long 0x920++0x0F line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2 ,Programmed to byte2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE2 ,Programmed to byte2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE2 ,Programmed to byte2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE2 ,Programmed to byte2 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2 ,Programmed to byte2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE2 ,Programmed to byte2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE2 ,Programmed to byte2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE2 ,Programmed to byte2 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2 ,Programmed to byte2 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2 ,Programmed to byte2 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE2 ,Programmed to byte2 pin9 TX fine trimmer value" textline " " group.long 0x930++0x0F line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3 ,Programmed to byte3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE3 ,Programmed to byte3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE3 ,Programmed to byte3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE3 ,Programmed to byte3 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3 ,Programmed to byte3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE3 ,Programmed to byte3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE3 ,Programmed to byte3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE3 ,Programmed to byte3 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3 ,Programmed to byte3 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3 ,Programmed to byte3 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE3 ,Programmed to byte3 pin9 TX fine trimmer value" textline " " group.long 0x940++0x0F line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4 ,Programmed to byte4 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE4 ,Programmed to byte4 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE4 ,Programmed to byte4 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE4 ,Programmed to byte4 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4 ,Programmed to byte4 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE4 ,Programmed to byte4 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE4 ,Programmed to byte4 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE4 ,Programmed to byte4 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4 ,Programmed to byte4 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE4_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4 ,Programmed to byte4 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE4 ,Programmed to byte4 pin9 TX fine trimmer value" textline " " group.long 0x950++0x0F line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5 ,Programmed to byte5 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE5 ,Programmed to byte5 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE5 ,Programmed to byte5 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE5 ,Programmed to byte5 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5 ,Programmed to byte5 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE5 ,Programmed to byte5 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE5 ,Programmed to byte5 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE5 ,Programmed to byte5 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5 ,Programmed to byte5 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE5_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5 ,Programmed to byte5 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE5 ,Programmed to byte5 pin9 TX fine trimmer value" textline " " group.long 0x960++0x0F line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6 ,Programmed to byte6 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE6 ,Programmed to byte6 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE6 ,Programmed to byte6 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE6 ,Programmed to byte6 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6 ,Programmed to byte6 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE6 ,Programmed to byte6 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE6 ,Programmed to byte6 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE6 ,Programmed to byte6 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6 ,Programmed to byte6 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE6_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6 ,Programmed to byte6 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE6 ,Programmed to byte6 pin9 TX fine trimmer value" textline " " group.long 0x970++0x0F line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7 ,Programmed to byte7 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE7 ,Programmed to byte7 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE7 ,Programmed to byte7 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE7 ,Programmed to byte7 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7 ,Programmed to byte7 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE7 ,Programmed to byte7 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE7 ,Programmed to byte7 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE7 ,Programmed to byte7 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7 ,Programmed to byte7 pin8 TX fine trimmer value" line.long 0x0C "RANK1_BYTE7_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7 ,Programmed to byte7 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_BYTE7 ,Programmed to byte7 pin9 TX fine trimmer value" textline " " group.long 0x980++0x0F line.long 0x00 "RANK1_CMD0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0 ,Programmed to command0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD0 ,Programmed to command0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD0 ,Programmed to command0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD0 ,Programmed to command0 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0 ,Programmed to command0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD0 ,Programmed to command0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD0 ,Programmed to command0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD0 ,Programmed to command0 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0 ,Programmed to command0 pin8 TX fine trimmer value" line.long 0x0C "RANK1_CMD0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0 ,Programmed to command0 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD0 ,Programmed to command0 pin9 TX fine trimmer value" textline " " group.long 0x990++0x0F line.long 0x00 "RANK1_CMD1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1 ,Programmed to command1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD1 ,Programmed to command1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD1 ,Programmed to command1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD1 ,Programmed to command1 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1 ,Programmed to command1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD1 ,Programmed to command1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD1 ,Programmed to command1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD1 ,Programmed to command1 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1 ,Programmed to command1 pin8 TX fine trimmer value" line.long 0x0C "RANK1_CMD1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1 ,Programmed to command1 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD1 ,Programmed to command1 pin9 TX fine trimmer value" textline " " group.long 0x9A0++0x0F line.long 0x00 "RANK1_CMD2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2 ,Programmed to command2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD2 ,Programmed to command2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD2 ,Programmed to command2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD2 ,Programmed to command2 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2 ,Programmed to command2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD2 ,Programmed to command2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD2 ,Programmed to command2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD2 ,Programmed to command2 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2 ,Programmed to command2 pin8 TX fine trimmer value" line.long 0x0C "RANK1_CMD2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2 ,Programmed to command2 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD2 ,Programmed to command2 pin9 TX fine trimmer value" textline " " group.long 0x9B0++0x0F line.long 0x00 "RANK1_CMD3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3 ,Programmed to command3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD3 ,Programmed to command3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD3 ,Programmed to command3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD3 ,Programmed to command3 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3 ,Programmed to command3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD3 ,Programmed to command3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD3 ,Programmed to command3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD3 ,Programmed to command3 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3 ,Programmed to command3 pin8 TX fine trimmer value" line.long 0x0C "RANK1_CMD3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick" hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3 ,Programmed to command3 pin10 TX fine trimmer value" hexmask.long.byte 0x0C 0.--6. 1. " PIN9_CMD3 ,Programmed to command3 pin9 TX fine trimmer value" textline " " tree.end tree "IB DDLL Short DQ Register" group.long 0xA00++0x0F line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0 ,Programmed to byte0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE0 ,Programmed to byte0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE0 ,Programmed to byte0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE0 ,Programmed to byte0 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0 ,Programmed to byte0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE0 ,Programmed to byte0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE0 ,Programmed to byte0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE0 ,Programmed to byte0 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0 ,Programmed to byte0 pin8 TX fine trimmer value" textline " " group.long 0xA10++0x0F line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1 ,Programmed to byte1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE1 ,Programmed to byte1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE1 ,Programmed to byte1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE1 ,Programmed to byte1 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1 ,Programmed to byte1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE1 ,Programmed to byte1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE1 ,Programmed to byte1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE1 ,Programmed to byte1 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1 ,Programmed to byte1 pin8 TX fine trimmer value" textline " " group.long 0xA20++0x0F line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2 ,Programmed to byte2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE2 ,Programmed to byte2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE2 ,Programmed to byte2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE2 ,Programmed to byte2 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2 ,Programmed to byte2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE2 ,Programmed to byte2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE2 ,Programmed to byte2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE2 ,Programmed to byte2 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2 ,Programmed to byte2 pin8 TX fine trimmer value" textline " " group.long 0xA30++0x0F line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3 ,Programmed to byte3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE3 ,Programmed to byte3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE3 ,Programmed to byte3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE3 ,Programmed to byte3 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3 ,Programmed to byte3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE3 ,Programmed to byte3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE3 ,Programmed to byte3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE3 ,Programmed to byte3 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3 ,Programmed to byte3 pin8 TX fine trimmer value" textline " " group.long 0xA40++0x0F line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4 ,Programmed to byte4 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE4 ,Programmed to byte4 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE4 ,Programmed to byte4 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE4 ,Programmed to byte4 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4 ,Programmed to byte4 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE4 ,Programmed to byte4 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE4 ,Programmed to byte4 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE4 ,Programmed to byte4 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4 ,Programmed to byte4 pin8 TX fine trimmer value" textline " " group.long 0xA50++0x0F line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5 ,Programmed to byte5 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE5 ,Programmed to byte5 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE5 ,Programmed to byte5 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE5 ,Programmed to byte5 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5 ,Programmed to byte5 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE5 ,Programmed to byte5 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE5 ,Programmed to byte5 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE5 ,Programmed to byte5 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5 ,Programmed to byte5 pin8 TX fine trimmer value" textline " " group.long 0xA60++0x0F line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6 ,Programmed to byte6 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE6 ,Programmed to byte6 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE6 ,Programmed to byte6 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE6 ,Programmed to byte6 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6 ,Programmed to byte6 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE6 ,Programmed to byte6 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE6 ,Programmed to byte6 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE6 ,Programmed to byte6 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6 ,Programmed to byte6 pin8 TX fine trimmer value" textline " " group.long 0xA70++0x0F line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7 ,Programmed to byte7 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE7 ,Programmed to byte7 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE7 ,Programmed to byte7 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE7 ,Programmed to byte7 pin0 TX fine trimmer value" line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7 ,Programmed to byte7 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE7 ,Programmed to byte7 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE7 ,Programmed to byte7 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE7 ,Programmed to byte7 pin4 TX fine trimmer value" line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7 ,Programmed to byte7 pin8 TX fine trimmer value" textline " " group.long 0xA80++0x0F line.long 0x00 "RANK0_CMD0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0 ,Programmed to command0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD0 ,Programmed to command0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD0 ,Programmed to command0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD0 ,Programmed to command0 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0 ,Programmed to command0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD0 ,Programmed to command0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD0 ,Programmed to command0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD0 ,Programmed to command0 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0 ,Programmed to command0 pin8 TX fine trimmer value" textline " " group.long 0xA90++0x0F line.long 0x00 "RANK0_CMD1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1 ,Programmed to command1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD1 ,Programmed to command1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD1 ,Programmed to command1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD1 ,Programmed to command1 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1 ,Programmed to command1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD1 ,Programmed to command1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD1 ,Programmed to command1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD1 ,Programmed to command1 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1 ,Programmed to command1 pin8 TX fine trimmer value" textline " " group.long 0xAA0++0x0F line.long 0x00 "RANK0_CMD2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2 ,Programmed to command2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD2 ,Programmed to command2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD2 ,Programmed to command2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD2 ,Programmed to command2 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2 ,Programmed to command2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD2 ,Programmed to command2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD2 ,Programmed to command2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD2 ,Programmed to command2 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2 ,Programmed to command2 pin8 TX fine trimmer value" textline " " group.long 0xAB0++0x0F line.long 0x00 "RANK0_CMD3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3 ,Programmed to command3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD3 ,Programmed to command3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD3 ,Programmed to command3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD3 ,Programmed to command3 pin0 TX fine trimmer value" line.long 0x04 "RANK0_CMD3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3 ,Programmed to command3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD3 ,Programmed to command3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD3 ,Programmed to command3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD3 ,Programmed to command3 pin4 TX fine trimmer value" line.long 0x08 "RANK0_CMD3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3 ,Programmed to command3 pin8 TX fine trimmer value" textline " " group.long 0xB00++0x0F line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0 ,Programmed to byte0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE0 ,Programmed to byte0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE0 ,Programmed to byte0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE0 ,Programmed to byte0 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0 ,Programmed to byte0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE0 ,Programmed to byte0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE0 ,Programmed to byte0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE0 ,Programmed to byte0 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0 ,Programmed to byte0 pin8 TX fine trimmer value" group.long 0xB10++0x0F line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1 ,Programmed to byte1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE1 ,Programmed to byte1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE1 ,Programmed to byte1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE1 ,Programmed to byte1 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1 ,Programmed to byte1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE1 ,Programmed to byte1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE1 ,Programmed to byte1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE1 ,Programmed to byte1 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1 ,Programmed to byte1 pin8 TX fine trimmer value" group.long 0xB20++0x0F line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2 ,Programmed to byte2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE2 ,Programmed to byte2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE2 ,Programmed to byte2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE2 ,Programmed to byte2 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2 ,Programmed to byte2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE2 ,Programmed to byte2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE2 ,Programmed to byte2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE2 ,Programmed to byte2 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2 ,Programmed to byte2 pin8 TX fine trimmer value" group.long 0xB30++0x0F line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3 ,Programmed to byte3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE3 ,Programmed to byte3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE3 ,Programmed to byte3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE3 ,Programmed to byte3 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3 ,Programmed to byte3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE3 ,Programmed to byte3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE3 ,Programmed to byte3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE3 ,Programmed to byte3 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3 ,Programmed to byte3 pin8 TX fine trimmer value" group.long 0xB40++0x0F line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4 ,Programmed to byte4 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE4 ,Programmed to byte4 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE4 ,Programmed to byte4 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE4 ,Programmed to byte4 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4 ,Programmed to byte4 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE4 ,Programmed to byte4 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE4 ,Programmed to byte4 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE4 ,Programmed to byte4 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4 ,Programmed to byte4 pin8 TX fine trimmer value" group.long 0xB50++0x0F line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5 ,Programmed to byte5 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE5 ,Programmed to byte5 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE5 ,Programmed to byte5 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE5 ,Programmed to byte5 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5 ,Programmed to byte5 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE5 ,Programmed to byte5 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE5 ,Programmed to byte5 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE5 ,Programmed to byte5 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5 ,Programmed to byte5 pin8 TX fine trimmer value" group.long 0xB60++0x0F line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6 ,Programmed to byte6 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE6 ,Programmed to byte6 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE6 ,Programmed to byte6 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE6 ,Programmed to byte6 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6 ,Programmed to byte6 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE6 ,Programmed to byte6 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE6 ,Programmed to byte6 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE6 ,Programmed to byte6 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6 ,Programmed to byte6 pin8 TX fine trimmer value" group.long 0xB70++0x0F line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7 ,Programmed to byte7 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_BYTE7 ,Programmed to byte7 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_BYTE7 ,Programmed to byte7 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_BYTE7 ,Programmed to byte7 pin0 TX fine trimmer value" line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7 ,Programmed to byte7 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_BYTE7 ,Programmed to byte7 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_BYTE7 ,Programmed to byte7 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_BYTE7 ,Programmed to byte7 pin4 TX fine trimmer value" line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7 ,Programmed to byte7 pin8 TX fine trimmer value" group.long 0xB80++0x0F line.long 0x00 "RANK1_CMD0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0 ,Programmed to command0 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD0 ,Programmed to command0 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD0 ,Programmed to command0 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD0 ,Programmed to command0 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0 ,Programmed to command0 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD0 ,Programmed to command0 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD0 ,Programmed to command0 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD0 ,Programmed to command0 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0 ,Programmed to command0 pin8 TX fine trimmer value" group.long 0xB90++0x0F line.long 0x00 "RANK1_CMD1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1 ,Programmed to command1 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD1 ,Programmed to command1 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD1 ,Programmed to command1 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD1 ,Programmed to command1 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1 ,Programmed to command1 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD1 ,Programmed to command1 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD1 ,Programmed to command1 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD1 ,Programmed to command1 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1 ,Programmed to command1 pin8 TX fine trimmer value" group.long 0xBA0++0x0F line.long 0x00 "RANK1_CMD2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2 ,Programmed to command2 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD2 ,Programmed to command2 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD2 ,Programmed to command2 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD2 ,Programmed to command2 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2 ,Programmed to command2 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD2 ,Programmed to command2 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD2 ,Programmed to command2 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD2 ,Programmed to command2 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2 ,Programmed to command2 pin8 TX fine trimmer value" group.long 0xBB0++0x0F line.long 0x00 "RANK1_CMD3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick" hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3 ,Programmed to command3 pin3 TX fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " PIN2_CMD3 ,Programmed to command3 pin2 TX fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " PIN1_CMD3 ,Programmed to command3 pin1 TX fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " PIN0_CMD3 ,Programmed to command3 pin0 TX fine trimmer value" line.long 0x04 "RANK1_CMD3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick" hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3 ,Programmed to command3 pin7 TX fine trimmer value" hexmask.long.byte 0x04 16.--22. 1. " PIN6_CMD3 ,Programmed to command3 pin6 TX fine trimmer value" textline " " hexmask.long.byte 0x04 8.--14. 1. " PIN5_CMD3 ,Programmed to command3 pin5 TX fine trimmer value" hexmask.long.byte 0x04 0.--6. 1. " PIN4_CMD3 ,Programmed to command3 pin4 TX fine trimmer value" line.long 0x08 "RANK1_CMD3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick" hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3 ,Programmed to command3 pin8 TX fine trimmer value" tree.end textline " " width 32. group.long 0xBE0++0x03 line.long 0x00 "IB_VREF_DQ_0_0,IB DQ Receiver Vref For Byte0 To Byte3" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE3 ,Programmed to IB Vref value for DQ of BYTE3" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQ_BYTE2 ,Programmed to IB Vref value for DQ of BYTE2" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQ_BYTE1 ,Programmed to IB Vref value for DQ of BYTE1" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQ_BYTE0 ,Programmed to IB Vref value for DQ of BYTE0" group.long 0xBE4++0x03 line.long 0x00 "IB_VREF_DQ_1_0,IB DQ Receiver Vref For Byte4 To Byte7" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE7 ,Programmed to IB Vref value for DQ of BYTE7" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQ_BYTE6 ,Programmed to IB Vref value for DQ of BYTE6" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQ_BYTE5 ,Programmed to IB Vref value for DQ of BYTE5" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQ_BYTE4 ,Programmed to IB Vref value for DQ of BYTE4" group.long 0xBE8++0x03 line.long 0x00 "IB_VREF_DQ_2_0,IB DQ Receiver Vref For Cmd0 To Cmd3" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_CMD3 ,Programmed to IB Vref value for DQ of CMD3" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQ_CMD2 ,Programmed to IB Vref value for DQ of CMD2" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQ_CMD1 ,Programmed to IB Vref value for DQ of CMD1" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQ_CMD0 ,Programmed to IB Vref value for DQ of CMD0" group.long 0xBF0++0x03 line.long 0x00 "IB_VREF_DQS_0_0,IB DQS Receiver Vref For Byte0 To Byte3" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE3 ,Programmed to IB Vref value for DQS of BYTE3" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQS_BYTE2 ,Programmed to IB Vref value for DQS of BYTE2" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQS_BYTE1 ,Programmed to IB Vref value for DQS of BYTE1" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQS_BYTE0 ,Programmed to IB Vref value for DQS of BYTE0" group.long 0xBF4++0x03 line.long 0x00 "IB_VREF_DQS_1_0,IB DQS Receiver Vref For Byte4 To Byte7" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE7 ,Programmed to IB Vref value for DQS of BYTE7" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQS_BYTE6 ,Programmed to IB Vref value for DQS of BYTE6" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQS_BYTE5 ,Programmed to IB Vref value for DQS of BYTE5" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQS_BYTE4 ,Programmed to IB Vref value for DQS of BYTE4" group.long 0xBF8++0x03 line.long 0x00 "IB_VREF_DQS_2_0,IB DQS Receiver Vref For Cmd0 To Cmd3" hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_CMD3 ,Programmed to IB Vref value for DQS of CMD3" hexmask.long.byte 0x00 16.--22. 1. " IB_VREF_DQS_CMD2 ,Programmed to IB Vref value for DQS of CMD2" textline " " hexmask.long.byte 0x00 8.--14. 1. " IB_VREF_DQS_CMD1 ,Programmed to IB Vref value for DQS of CMD1" hexmask.long.byte 0x00 0.--6. 1. " IB_VREF_DQS_CMD0 ,Programmed to IB Vref value for DQS of CMD0" textline " " group.long 0xC00++0x03 line.long 0x00 "DDLL_LONG_CMD_0_0,DLL Long Trimmer Value For Cke0 And Cke1" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE1 ,Programmed to CKE1 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_CKE0 ,Programmed to CKE0 trimmer value" group.long 0xC04++0x03 line.long 0x00 "DDLL_LONG_CMD_1_0,DLL Long Trimmer Value For Cke2 And Cke3" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE3 ,Programmed to CKE3 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_CKE2 ,Programmed to CKE2 trimmer value" group.long 0xC08++0x03 line.long 0x00 "DDLL_LONG_CMD_2_0,DLL Long Trimmer Value For Cke4 And Cke5" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE5 ,Programmed to CKE5 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_CKE4 ,Programmed to CKE4 trimmer value" group.long 0xC0C++0x03 line.long 0x00 "DDLL_LONG_CMD_3_0,DLL Long Trimmer Value For Cke6 And Cke7" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE7 ,Programmed to CKE7 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_CKE6 ,Programmed to CKE6 trimmer value" group.long 0xC10++0x03 line.long 0x00 "DDLL_LONG_CMD_4_0,DLL Long Trimmer Value For Reset And Misc0" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC0 ,Programmed to MISC0 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_RESET ,Programmed to RESET trimmer value" group.long 0xC14++0x03 line.long 0x00 "DDLL_LONG_CMD_5_0,DLL Long Trimmer Value For Misc1 And Misc2" hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC2 ,Programmed to MISC2 trimmer value" hexmask.long.word 0x00 0.--10. 1. " DDLL_LONG_CMD_MISC1 ,Programmed to MISC1 trimmer value" textline " " group.long 0xC20++0x03 line.long 0x00 "DDLL_SHORT_CMD_0_0,DLL Short Trimmer Value" hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE3 ,Programmed to CKE3 fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " DDLL_SHORT_CMD_CKE2 ,Programmed to CKE2 fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " DDLL_SHORT_CMD_CKE1 ,Programmed to CKE1 fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " DDLL_SHORT_CMD_CKE0 ,Programmed to CKE0 fine trimmer value" group.long 0xC24++0x03 line.long 0x00 "DDLL_SHORT_CMD_1_0,DLL Short Trimmer Value" hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE7 ,Programmed to CKE7 fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " DDLL_SHORT_CMD_CKE6 ,Programmed to CKE6 fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " DDLL_SHORT_CMD_CKE5 ,Programmed to CKE5 fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " DDLL_SHORT_CMD_CKE4 ,Programmed to CKE4 fine trimmer value" group.long 0xC28++0x03 line.long 0x00 "DDLL_SHORT_CMD_2_0,DLL Short Trimmer Value" hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_MISC2 ,Programmed to MISC2 fine trimmer value" hexmask.long.byte 0x00 16.--22. 1. " DDLL_SHORT_CMD_MISC1 ,Programmed to MISC1 fine trimmer value" textline " " hexmask.long.byte 0x00 8.--14. 1. " DDLL_SHORT_CMD_MISC0 ,Programmed to MISC0 fine trimmer value" hexmask.long.byte 0x00 0.--6. 1. " DDLL_SHORT_CMD_RESET ,Programmed to RESET fine trimmer value" textline " " group.long 0xC30++0x07 line.long 0x00 "CFG_PM_GLOBAL_0_0,Global Register For Pad Macro Control" bitfld.long 0x00 27. " DISABLE_CFG_CMD3 ,CMD3 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 26. " DISABLE_CFG_CMD2 ,CMD2 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 25. " DISABLE_CFG_CMD1 ,CMD1 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 24. " DISABLE_CFG_CMD0 ,CMD0 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 23. " DISABLE_CFG_BYTE7 ,BYTE7 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 22. " DISABLE_CFG_BYTE6 ,BYTE6 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 21. " DISABLE_CFG_BYTE5 ,BYTE5 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 20. " DISABLE_CFG_BYTE4 ,BYTE4 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 19. " DISABLE_CFG_BYTE3 ,BYTE3 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 18. " DISABLE_CFG_BYTE2 ,BYTE2 pad macro configuration read|write disable" "No,Yes" textline " " bitfld.long 0x00 17. " DISABLE_CFG_BYTE1 ,BYTE1 pad macro configuration read|write disable" "No,Yes" bitfld.long 0x00 16. " DISABLE_CFG_BYTE0 ,BYTE0 pad macro configuration read|write disable" "No,Yes" line.long 0x04 "VTTGEN_CTRL_0_0,VTTGEN Control Register 0" sif (cpuis("TEGRAX2")) bitfld.long 0x04 24. " VTTLP_VDDA_E_REGSW ,Enable switch to low power regulator" "Disabled,Enabled" textline " " endif bitfld.long 0x04 16.--19. " VTT_VDDA_LVL ,VDDA level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " VTT_VAUXP_LVL ,VAUXP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " VTT_VCLAMP_LVL ,VCLAMP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpuis("TEGRAX2")) group.long 0xC38++0x03 line.long 0x00 "VTTGEN_CTRL_1_0,VTTGEN control register" bitfld.long 0x00 10.--14. " VTT_VDDA_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--9. " VTT_VAUXP_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " VTT_VCLAMP_CTRL ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.long 0xC3C++0x2F line.long 0x00 "BG_BIAS_CTRL_0_0,BG Bias Control Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 20.--21. " DDLL_CDB_BG_ILVL_CTRL ,BG current bias select" "25ua,50ua,TBD,TBD" bitfld.long 0x00 16.--17. " DDLL_DDLL_BG_ILVL_CTRL ,BG current bias select" "25ua,50ua,TBD,TBD" textline " " bitfld.long 0x00 12.--13. " XM2COMP_BG_ILVL_CTRL ,BANDGAP output current level control" "25ua,50ua,TBD,TBD" bitfld.long 0x00 8.--9. " BG_ILVL_CTRL ,BG current bias select" "25ua,50ua,TBD,TBD" textline " " endif bitfld.long 0x00 4.--6. " BG_SETUP ,Temperature coefficient control" "0,1,2,3,4,5,6,7" sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " BGLP_E_PWRD ,BGLP E PWRD" "0,1" endif textline " " bitfld.long 0x00 1. " BG_MODE ,Regulator mode" "High performance,Low power" bitfld.long 0x00 0. " BG_E_PWRD ,Power down regulator" "0,1" line.long 0x04 "PAD_CFG_CTRL_0,Config Control Register For Pads" bitfld.long 0x04 28.--30. " PAD_MACRO_QUSE_MODE ,Pad macro QUSE mode" "Direct,,Regular W/O div2,Regular,?..." bitfld.long 0x04 25. " TX_E_DDLL_TCLK ,TX E DDLL TCLK" "0,1" textline " " bitfld.long 0x04 24. " E_TX_NMOS_DRVUP ,E TX NMOS DRVUP" "0,1" bitfld.long 0x04 20.--21. " TX_DCC_MODE ,TX DCC mode" "0,1,2,3" textline " " bitfld.long 0x04 16.--17. " MEM_MODE ,Type of DDR memory used for misc. internal controls" "LPDDR2|3,SDDR3|SDDR3L,LPDDR4,?..." bitfld.long 0x04 13. " TX_SEL_MV_CYCLE ,Multi-voltage timing path timing closure" "1 cycle,2 cycles" textline " " bitfld.long 0x04 10.--11. " CMD_TX_EBOOST_PU_MODE ,DQ pull up pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x04 9. " E_PWRD ,DC current paths within entire brick cell disable" "Enabled,Disabled" textline " " bitfld.long 0x04 5.--6. " CMD_TX_EBOOST_PD_MODE ,DQ pull down pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x04 0.--1. " QUSE_MODE ,Pad quse mode" "0,1,2,3" line.long 0x08 "ZCTRL_0,Driver|Receiver ZCTRL Settings For All IOBRICKs" bitfld.long 0x08 26.--27. " DATA_DQS_TX_DRVDN_ZCTRL ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 24.--25. " DATA_DQ_TX_DRVDN_ZCTRL ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 22.--23. " DATA_DQS_TX_DRVUP_ZCTRL ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 20.--21. " DATA_DQ_TX_DRVUP_ZCTRL ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 18.--19. " CMD_DQS_TX_DRVDN_ZCTRL ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 16.--17. " CMD_DQ_TX_DRVDN_ZCTRL ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 14.--15. " CMD_DQS_TX_DRVUP_ZCTRL ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 12.--13. " CMD_DQ_TX_DRVUP_ZCTRL ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 10.--11. " DQS_RX_DRVDN_TERM_ZCTRL ,DQS pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 8.--9. " DQ_RX_DRVDN_TERM_ZCTRL ,DQ pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 6.--7. " DQS_RX_DRVUP_TERM_ZCTRL ,DQS pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 4.--5. " DQ_RX_DRVUP_TERM_ZCTRL ,DQ pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm" textline " " bitfld.long 0x08 2.--3. " CMD_TX_DRVDN_ZCTRL ,CMD pad of DQ|CA drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm" bitfld.long 0x08 0.--1. " CMD_TX_DRVUP_ZCTRL ,CMD pad of DQ|CA drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm" line.long 0x0C "RX_TERM_0,Receive Termination Strength Control Register For DQ Brick" bitfld.long 0x0C 24.--29. " DQS_RX_DRVDN_TERM ,DQS pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 16.--21. " DQS_RX_DRVUP_TERM ,DQS pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 8.--13. " DQ_RX_DRVDN_TERM ,DQ pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--5. " DQ_RX_DRVUP_TERM ,DQ pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "CMD_TX_DRV_0,Transmit Drive Strength Control Register For CMD Pad In DQ|CA Brick" bitfld.long 0x10 8.--13. " CMD_TX_DRVDN ,CMD TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--5. " CMD_TX_DRVUP ,CMD TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "CMD_PAD_RX_CTRL_0,Receiver Mode Control For Command Pad" bitfld.long 0x14 24.--28. " CMD_DQ_RX_CTRL ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 22. " CMD_RX_E_DIRECT_ZI ,Command RX E direct ZI" "0,1" textline " " bitfld.long 0x14 21. " CMD_RX_E_IBIAS_PWRD ,Command RX E IBIAS PWRD" "0,1" bitfld.long 0x14 16.--20. " CMD_DQS_RX_CTRL ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x14 15. " CMD_EINPUT_FORCE_ON ,Static einput enable" "Disabled,Enabled" bitfld.long 0x14 14. " CMD_DQ_RX_E_RDIV ,Resistor divider differential amplifier enable" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " CMD_DQ_RX_E_DAMP_DFE ,DFE circuit RX differential amplifier enable" "Disabled,Enabled" bitfld.long 0x14 12. " CMD_DQS_RX_E_DIFF_MODE ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION" textline " " bitfld.long 0x14 8.--10. " CMD_DQ_RX_DAMP_DFE_CTRL ,Different DFE modes selection" "0,1,2,3,4,5,6,7" bitfld.long 0x14 4.--5. " CMD_DQS_RX_MODE ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15" textline " " bitfld.long 0x14 0.--2. " CMD_DQ_RX_MODE ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE" line.long 0x18 "DATA_PAD_RX_CTRL_0,Receiver Mode Control For Data Pad" bitfld.long 0x18 24.--28. " DATA_DQ_RX_CTRL ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 22. " DATA_RX_E_DIRECT_ZI ,Data RX E Direct ZI" "0,1" textline " " bitfld.long 0x18 21. " DATA_RX_E_IBIAS_PWRD ,Data RX E IBIAS PWRD" "0,1" bitfld.long 0x18 16.--20. " DATA_DQS_RX_CTRL ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 15. " DATA_EINPUT_FORCE_ON ,Static einput enable" "Disabled,Enabled" bitfld.long 0x18 14. " DATA_DQ_RX_E_RDIV ,Resistor divider differential amplifier enable" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " DATA_DQ_RX_E_DAMP_DFE ,DFE circuit RX differential amplifier enable" "Disabled,Enabled" bitfld.long 0x18 12. " DATA_DQS_RX_E_DIFF_MODE ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION" textline " " bitfld.long 0x18 8.--10. " DATA_DQ_RX_DAMP_DFE_CTRL ,Different DFE modes selection" "0,1,2,3,4,5,6,7" bitfld.long 0x18 4.--5. " DATA_DQS_RX_MODE ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15" textline " " bitfld.long 0x18 0.--2. " DATA_DQ_RX_MODE ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE" line.long 0x1C "CMD_RX_TERM_MODE_0,Receiver Termination Mode Control For Command Pad" bitfld.long 0x1C 13. " CMD_E_PWRD_RX ,RX DC current paths within entire brick cell disable" "Enabled,Disabled" bitfld.long 0x1C 12. " CMD_DDLL_QU_SEL_M2CLK ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK" textline " " bitfld.long 0x1C 8.--9. " CMD_DQSN_RX_TERM_MODE ,Command DQSN RX termination mode" ",,Pull-up,Center tap" bitfld.long 0x1C 4.--5. " CMD_DQSP_RX_TERM_MODE ,Command DQSP RX termination mode" "HI-Z,Pull-down,?..." textline " " bitfld.long 0x1C 0.--1. " CMD_DQ_RX_TERM_MODE ,Driver as receiver ODT or CTT termination enable" "0,1,2,3" line.long 0x20 "DATA_RX_TERM_MODE_0,Receiver Termination Mode Control For Data Pad" bitfld.long 0x20 13. " DATA_E_PWRD_RX ,RX DC current paths within entire brick cell disable" "Enabled,Disabled" bitfld.long 0x20 12. " DATA_DDLL_QU_SEL_M2CLK ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK" textline " " bitfld.long 0x20 8.--9. " DATA_DQSN_RX_TERM_MODE ,Data DQSN RX termination mode" ",,Pull-up,Center tap" bitfld.long 0x20 4.--5. " DATA_DQSP_RX_TERM_MODE ,Data DQSP RX termination mode" "HI-Z,Pull-down,?..." textline " " bitfld.long 0x20 0.--1. " DATA_DQ_RX_TERM_MODE ,Driver as receiver ODT or CTT termination enable" "0,1,2,3" line.long 0x24 "CMD_PAD_TX_CTRL_0,OB Control For Command Pad" bitfld.long 0x24 27. " CMD_DQS_TX_DRVFORCEON ,Command DQS TX drive force on" "0,1" bitfld.long 0x24 26. " CMD_DQ_TX_DRVFORCEON ,Command DQ TX drive force on" "0,1" textline " " bitfld.long 0x24 25. " CMD_CMD_TX_DRVFORCEON ,Command command TX drive force on" "0,1" bitfld.long 0x24 24. " CMD_CMD_TX_E_DCC ,Command command TX E DCC" "0,1" textline " " bitfld.long 0x24 21. " CMD_DQSN_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x24 20. " CMD_DQSN_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 16. " CMD_DQSN_TX_E_DCC ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled" bitfld.long 0x24 14.--15. " CMD_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" textline " " bitfld.long 0x24 13. " CMD_DQSP_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x24 12. " CMD_DQSP_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 10.--11. " CMD_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x24 9. " CMD_DQSP_TX_E_DCC ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled" textline " " bitfld.long 0x24 8. " CMD_DQS_E_IVREF ,Clock internal vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled" bitfld.long 0x24 6.--7. " CMD_DQ_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" textline " " bitfld.long 0x24 5. " CMD_DQ_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x24 4. " CMD_DQ_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 2.--3. " CMD_DQ_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x24 1. " CMD_DQ_TX_E_DCC ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled" textline " " bitfld.long 0x24 0. " CMD_DQ_E_IVREF ,Data internal vref resistor ladder for data I/O[8:0] enable" "Disabled,Enabled" line.long 0x28 "DATA_PAD_TX_CTRL_0,OB Control For Data Pad" bitfld.long 0x28 27. " DATA_DQS_TX_DRVFORCEON ,Data DQS TX drive force on" "0,1" bitfld.long 0x28 26. " DATA_DQ_TX_DRVFORCEON ,Data DQ TX drive force on" "0,1" textline " " bitfld.long 0x28 25. " DATA_CMD_TX_DRVFORCEON ,Data command TX drive force on" "0,1" bitfld.long 0x28 24. " DATA_CMD_TX_E_DCC ,Data command TX E DCC" "0,1" textline " " bitfld.long 0x28 21. " DATA_DQSN_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x28 20. " DATA_DQSN_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 16. " DATA_DQSN_TX_E_DCC ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled" bitfld.long 0x28 14.--15. " DATA_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" textline " " bitfld.long 0x28 13. " DATA_DQSP_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x28 12. " DATA_DQSP_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 10.--11. " DATA_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x28 9. " DATA_DQSP_TX_E_DCC ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled" textline " " bitfld.long 0x28 8. " DATA_DQS_E_IVREF ,Clock internal Vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled" bitfld.long 0x28 6.--7. " DATA_DQ_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" textline " " bitfld.long 0x28 5. " DATA_DQ_TX_E_WKPU ,Weak pull-up enable" "Disabled,Enabled" bitfld.long 0x28 4. " DATA_DQ_TX_E_WKPD ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 2.--3. " DATA_DQ_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost" bitfld.long 0x28 1. " DATA_DQ_TX_E_DCC ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " DATA_DQ_E_IVREF ,Data internal Vred resistor ladder for data I/O[8:0] enable" "Disabled,Enabled" line.long 0x2C "COMMON_PAD_TX_CTRL_0,OB Control For Bricks" bitfld.long 0x2C 3. " CMD_DQS_TX_BPSDYNEN ,Command DQS TX BPSDYNEN" "0,1" bitfld.long 0x2C 2. " CMD_DQ_TX_BPSDYNEN ,Command DQ TX BPSDYNEN" "0,1" textline " " bitfld.long 0x2C 1. " DATA_DQS_TX_BPSDYNEN ,Data DQS TX BPSDYNEN" "0,1" bitfld.long 0x2C 0. " DATA_DQ_TX_BPSDYNEN ,Data DQ TX BPSDYNEN" "0,1" sif (cpuis("TEGRAX2")) group.long 0xC6C++0x03 line.long 0x00 "DSR_VTTGEN_CTRL_0_0,VTTGEN control register" hexmask.long.byte 0x00 8.--15. 1. " DSR_VTT_VDDA_LOAD ,DSR VTT VDDA Load" bitfld.long 0x00 0.--3. " DSR_VTT_VDDA_LVL ,Level select for VDDA during DSR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0xC70++0x0B line.long 0x00 "DQ_TX_DRV_0,Transmit Drive Strength Control Register For DQ Brick" bitfld.long 0x00 24.--29. " DATA_DQS_TX_DRVDN ,DQS TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DATA_DQS_TX_DRVUP ,DQS TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--13. " DATA_DQ_TX_DRVDN ,DQ TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DATA_DQ_TX_DRVUP ,DQ TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "CA_TX_DRV_0,Transmit Drive Strength Control Register For CA Brick" bitfld.long 0x04 24.--29. " CMD_DQS_TX_DRVDN ,CK TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " CMD_DQS_TX_DRVUP ,CK TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8.--13. " CMD_DQ_TX_DRVDN ,CA TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " CMD_DQ_TX_DRVUP ,CA TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "AUTOCAL_CFG_COMMON_0,Autocal Padmacro Register For Controls Shared Across All IOBRICKs" bitfld.long 0x08 16. " E_CAL_BYPASS_DVFS ,Assert E_CAL_BYPASS for all pad macros" "Disabled,Enabled" bitfld.long 0x08 8.--13. " E_CAL_UPDATE_HIGH ,Number of EMC clocks for which E_CAL_UPDATE pulse is asserted for CK pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 0.--5. " E_CAL_UPDATE_DELAY ,Wait time in EMC clock cycles between CK pad cal ode change and E_CAL_UPDATE assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " group.long 0xCE0++0x0B line.long 0x00 "DDLLCAL_CAL_0,Communicate Calibration Value To The DDLL Slaves" hexmask.long.word 0x00 0.--10. 1. " DDLLCAL_CAL ,Calibration value" line.long 0x04 "DDLL_OFFSET_0,Verify Margins Of The Trained DDLL Values" bitfld.long 0x04 28. " CMD_DDLL_OFFSET_BYTE_QU_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 27. " CMD_DDLL_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " CMD_DDLL_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 25. " CMD_DDLL_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " CMD_DDLL_OFFSET_BYTE_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 23. " CMD_DDLL_OFFSET_BIT_RXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " CMD_DDLL_OFFSET_BIT_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 21. " CMD_DDLL_OFFSET_BIT_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " CMD_DDLL_OFFSET_BIT_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 16. " DATA_DDLL_OFFSET_BYTE_QU_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " DATA_DDLL_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 14. " DATA_DDLL_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " DATA_DDLL_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 12. " DATA_DDLL_OFFSET_BYTE_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " DATA_DDLL_OFFSET_BIT_RXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 10. " DATA_DDLL_OFFSET_BIT_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " DATA_DDLL_OFFSET_BIT_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x04 8. " DATA_DDLL_OFFSET_BIT_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--5. " DDLL_OFFSET ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "DDLL_PERIODIC_OFFSET_0,Support Periodic Training" bitfld.long 0x08 28. " CMD_DDLL_PERIODIC_OFFSET_BYTE_QU_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 27. " CMD_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 26. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 25. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 24. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 23. " CMD_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 21. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 16. " DATA_DDLL_PERIODIC_OFFSET_BYTE_QU_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " DATA_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 14. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 12. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " DATA_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 10. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled" bitfld.long 0x08 8. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN ,DDLL offset enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0.--5. " DDLL_PERIODIC_OFFSET ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (cpuis("TEGRAX2")) group.long 0xCEC++0x03 line.long 0x00 "SEL_NEGEDGE_FLOP_0,EMC PMACRO SE _NEGEDGE FLOP 0" bitfld.long 0x00 0. " SEL_NEG_IB ,Select negative edge flop as output" "Disabled,Enabled" endif group.long 0xCF0++0x0F line.long 0x00 "VTTGEN_CTRL_2_0,VTTGEN Control Register" hexmask.long.byte 0x00 16.--23. 1. " VTT_VDDA_LOAD ,VTT VDDA Load" hexmask.long.byte 0x00 8.--15. 1. " VTT_VAUXP_LOAD ,VTT VAUXP Load" textline " " hexmask.long.byte 0x00 0.--7. 1. " VTT_VCLAMP_LOAD ,VTT VCLAMP Load" line.long 0x04 "IB_RXRT_0,IB DQ Receive Path Retiming For Byte0 To Byte3" hexmask.long.word 0x04 0.--10. 1. " IB_RXRT ,Programmed to IB DQ receive path retiming" line.long 0x08 "TRAINING_CTRL_0_0,Configuration Of Pad Macros For Channel 0" bitfld.long 0x08 4. " CH0_TRAINING_DRV_DQS ,Force DQS_t and DQS_c drivers on" "Not force,Force" textline " " bitfld.long 0x08 3. " CH0_TRAINING_E_WRPTR ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled" bitfld.long 0x08 2. " CH0_TRAINING_RX_E_DIRECT_ZI ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override" textline " " bitfld.long 0x08 1. " CH0_TRAINING_TRAIN_QPOP ,Training QPOP" "0,1" bitfld.long 0x08 0. " CH0_TRAINING_ENABLED ,Channel 0 training enable" "Disabled,Enabled" line.long 0x0C "TRAINING_CTRL_1_0,Configuration Of Pad Macros For Channel 1" bitfld.long 0x0C 4. " CH1_TRAINING_DRV_DQS ,Force DQS_t and DQS_c drivers on" "Not force,Force" bitfld.long 0x0C 3. " CH1_TRAINING_E_WRPTR ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " CH1_TRAINING_RX_E_DIRECT_ZI ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override" bitfld.long 0x0C 1. " CH1_TRAINING_TRAIN_QPOP ,Training QPOP" "0,1" textline " " bitfld.long 0x0C 0. " CH1_TRAINING_ENABLED ,Channel 1 training enable" "Disabled,Enabled" tree.end width 27. tree "TRAINING Registers" group.long 0xE00++0x03 line.long 0x00 "CMD_0,Main Register For Launching Training" bitfld.long 0x00 31. " GO ,Start training" "Not started,Started" bitfld.long 0x00 30. " PERIODIC ,Start periodic training" "Not started,Started" bitfld.long 0x00 8. " QUSE_VREF ,Initiates DQS_VREF training" "Not initiated,Initiated" bitfld.long 0x00 7. " RD_VREF ,Initiates IB_DQ_VREF training" "Not initiated,Initiated" textline " " bitfld.long 0x00 6. " WR_VREF ,Initiates OB (WRIRE) DRAM_VREF training" "Not initiated,Initiated" bitfld.long 0x00 5. " CA_VREF ,Initiates CA_VREF training" "Not initiated,Initiated" bitfld.long 0x00 4. " QUSE ,Initiates QUSE training" "Not initiated,Initiated" bitfld.long 0x00 3. " WR ,Initiates WR training" "Not initiated,Initiated" textline " " bitfld.long 0x00 2. " RD ,Initiates RD training" "Not initiated,Initiated" bitfld.long 0x00 1. " CA ,Initiates CA training" "Not initiated,Initiated" bitfld.long 0x00 0. " PRIME ,Writes the custom pattern into MPC register" "Disabled,Enabled" if ((per.l(ad:0x7001F000+0xE04)&0x00010000)==0x00010000) group.long 0xE04++0x03 line.long 0x00 "CTRL_0,MISC Controls For Training Configuration" bitfld.long 0x00 16. " FORCE_DR_TO_SR ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled" bitfld.long 0x00 15. " TR_IN_SELF_REFRESH ,Do training in self refresh" "Disabled,Enabled" bitfld.long 0x00 14. " SWAP_RANK ,Rank to train" "RANK0,RANK1" bitfld.long 0x00 13. " UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " QUSE_MODE ,Quse mode select" "READ_DATA,IFIFO_WRPTR" hexmask.long.byte 0x00 4.--11. 1. " IFIFO_WRPTR ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM" bitfld.long 0x00 3. " RPT_MODE ,Read preamble training mode available in DRAM" "Disabled,Enabled" bitfld.long 0x00 2. " REFRESH_CA ,Allow refreshes in CA training" "Disallow,Allow" textline " " bitfld.long 0x00 1. " REFRESH ,Allow refreshes in all trainings except CA training" "Disallow,Allow" bitfld.long 0x00 0. " ASYNC_UPDATES ,Set to disabled" "Disabled,Enabled" else group.long 0xE04++0x03 line.long 0x00 "CTRL_0,MISC Controls For Training Configuration" bitfld.long 0x00 16. " FORCE_DR_TO_SR ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled" bitfld.long 0x00 15. " TR_IN_SELF_REFRESH ,Do training in self refresh" "Disabled,Enabled" bitfld.long 0x00 14. " SWAP_RANK ,Order in which ranks will be trained" "RANK0 -> RANK1,RANK1 -> RANK0" bitfld.long 0x00 13. " UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " QUSE_MODE ,Quse mode select" "READ_DATA,IFIFO_WRPTR" hexmask.long.byte 0x00 4.--11. 1. " IFIFO_WRPTR ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM" bitfld.long 0x00 3. " RPT_MODE ,Read preamble training mode available in DRAM" "Disabled,Enabled" bitfld.long 0x00 2. " REFRESH_CA ,Allow refreshes in CA training" "Disallow,Allow" textline " " bitfld.long 0x00 1. " REFRESH ,Allow refreshes in all trainings except CA training" "Disallow,Allow" bitfld.long 0x00 0. " ASYNC_UPDATES ,Set to disabled" "Disabled,Enabled" endif rgroup.long 0xE08++0x03 line.long 0x00 "STATUS_0,Read Back For Training Status" bitfld.long 0x00 0.--1. " STATUS ,Training status" "Done,Running,Error,?..." group.long 0xE0C++0x3F line.long 0x00 "QUSE_CORS_CTRL_0,Controls For QUSE Training Cors Sweep" bitfld.long 0x00 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" bitfld.long 0x00 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x00 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x00 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" textline " " bitfld.long 0x00 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" bitfld.long 0x00 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x00 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x00 21. " STEP[1] ,Step[1]" "Zero,One" textline " " bitfld.long 0x00 20. " STEP[0] ,Step[0]" "Zero,One" hexmask.long.word 0x00 10.--18. 1. " MAXIMUM ,Maximum" hexmask.long.word 0x00 0.--8. 1. " MINIMUM ,Minimum" line.long 0x04 "QUSE_FINE_CTRL,Controls For QUSE Training Fine Sweep" bitfld.long 0x04 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" bitfld.long 0x04 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x04 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x04 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" textline " " bitfld.long 0x04 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" bitfld.long 0x04 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x04 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x04 21. " STEP[1] ,Step[1]" "Zero,One" textline " " bitfld.long 0x04 20. " STEP[0] ,Step[0]" "Zero,One" hexmask.long.word 0x04 10.--19. 1. " MAXIMUM ,2's complement" hexmask.long.word 0x04 0.--9. 1. " MINIMUM ,2' complement" line.long 0x08 "QUSE_CTRL_MISC_0,MISC Controls For QUSE Training" hexmask.long.byte 0x08 24.--31. 1. " PATRAM_MAX ,Patram end index" hexmask.long.byte 0x08 16.--23. 1. " PATRAM_MIN ,Patram start index" bitfld.long 0x08 15. " LEVEL[1] ,Level training style select[1]" "Byte,Bit" bitfld.long 0x08 14. " LEVEL[0] ,Level training style select[0]" "Byte,Bit" textline " " bitfld.long 0x08 13. " PATTERN[1] ,Pattern select[1]" "FIFO,MPC" bitfld.long 0x08 12. " PATTERN[0] ,Pattern select[0]" "FIFO,MPC" bitfld.long 0x08 10.--11. " BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four" bitfld.long 0x08 8.--9. " BURST_COUNT[0] ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four" textline " " hexmask.long.byte 0x08 0.--7. 1. " ERR_LIMIT ,Number of errors allowed before considered a failure" line.long 0x0C "WRITE_FINE_CTRL_0,Controls For Write Training Sweep" bitfld.long 0x0C 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" textline " " bitfld.long 0x0C 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x0C 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x0C 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" bitfld.long 0x0C 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" textline " " bitfld.long 0x0C 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x0C 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x0C 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x0C 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.word 0x0C 10.--19. 1. " MAXIMUM ,Maximum" hexmask.long.word 0x0C 0.--9. 1. " MINIMUM ,Minimum" line.long 0x10 "WRITE_CTRL_MISC_0,MISC Controls For Write Trainings Sweep" hexmask.long.byte 0x10 24.--31. 1. " PATRAM_MAX ,Patram end index" hexmask.long.byte 0x10 16.--23. 1. " PATRAM_MIN ,Patram start index" bitfld.long 0x10 15. " LEVEL[1] ,Level training style select[1]" "Byte,Bit" bitfld.long 0x10 14. " LEVEL[0] ,Level training style select[0]" "Byte,Bit" textline " " bitfld.long 0x10 13. " PATTERN[1] ,Pattern select[1]" "FIFO,MPC" bitfld.long 0x10 12. " PATTERN[0] ,Pattern select[0]" "FIFO,MPC" bitfld.long 0x10 10.--11. " BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four" bitfld.long 0x10 8.--9. " BURST_COUNT[0] ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four" textline " " hexmask.long.byte 0x10 0.--7. 1. " ERR_LIMIT ,Number of errors allowed before considered a failure" line.long 0x14 "WRITE_VREF_CTRL_0,Controls For Write-Vref Training Sweep" bitfld.long 0x14 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x14 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x14 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x14 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.byte 0x14 8.--15. 1. " MAXIMUM ,Maximum" hexmask.long.byte 0x14 0.--7. 1. " MINIMUM ,Minimum" line.long 0x18 "READ_FINE_CTRL_0,Controls For Read Training Sweep" bitfld.long 0x18 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" textline " " bitfld.long 0x18 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x18 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x18 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" bitfld.long 0x18 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" textline " " bitfld.long 0x18 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x18 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x18 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x18 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.word 0x18 10.--19. 1. " MAXIMUM ,Maximum" hexmask.long.word 0x18 0.--9. 1. " MINIMUM ,Minimum" line.long 0x1C "READ_CTRL_MISC_0,MISC Controls For Read Trainings Sweep" hexmask.long.byte 0x1C 24.--31. 1. " PATRAM_MAX ,Patram end index" hexmask.long.byte 0x1C 16.--23. 1. " PATRAM_MIN ,Patram start index" bitfld.long 0x1C 15. " LEVEL[1] ,Level training style select[1]" "Byte,Bit" bitfld.long 0x1C 14. " LEVEL[0] ,Level training style select[0]" "Byte,Bit" textline " " bitfld.long 0x1C 13. " PATTERN[1] ,Pattern select[1]" "FIFO,MPC" bitfld.long 0x1C 12. " PATTERN[0] ,Pattern select[0]" "FIFO,MPC" bitfld.long 0x1C 10.--11. " BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four" bitfld.long 0x1C 8.--9. " BURST_COUNT[0] ,Number of reads in each STEP_LN[0]" ",,,Four" textline " " hexmask.long.byte 0x1C 0.--7. 1. " ERR_LIMIT ,Number of errors allowed before considered a failure" line.long 0x20 "READ_VREF_CTRL_0,Controls For Read-Vref Trainings Sweep" bitfld.long 0x20 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x20 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x20 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x20 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.byte 0x20 8.--15. 1. " MAXIMUM ,Maximum" hexmask.long.byte 0x20 0.--7. 1. " MINIMUM ,Minimum" line.long 0x24 "CA_FINE_CTRL_0,Controls For CA Training Sweep" bitfld.long 0x24 28. " STEP_LN_SIZE ,Step LN size" "Zero,One" textline " " bitfld.long 0x24 27. " STEP_LN[3] ,Step LN[3]" "Zero,One" bitfld.long 0x24 26. " STEP_LN[2] ,Step LN[2]" "Zero,One" bitfld.long 0x24 25. " STEP_LN[1] ,Step LN[1]" "Zero,One" bitfld.long 0x24 24. " STEP_LN[0] ,Step LN[0]" "Zero,One" textline " " bitfld.long 0x24 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x24 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x24 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x24 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.word 0x24 10.--19. 1. " MAXIMUM ,Maximum" hexmask.long.word 0x24 0.--9. 1. " MINIMUM ,Minimum" line.long 0x28 "CA_CTRL_MISC_0,MISC Controls For CA Trainings Sweep" hexmask.long.byte 0x28 24.--31. 1. " PATRAM_MAX ,Patram end index" hexmask.long.byte 0x28 16.--23. 1. " PATRAM_MIN ,Patram start index" bitfld.long 0x28 15. " LEVEL[1] ,Level training style select[1]" "Byte,Bit" bitfld.long 0x28 14. " LEVEL[0] ,Level training style select[0]" "Byte,Bit" textline " " bitfld.long 0x28 13. " PATTERN[1] ,Pattern select[1]" "FIFO,MPC" bitfld.long 0x28 12. " PATTERN[0] ,Pattern select[0]" "FIFO,MPC" bitfld.long 0x28 10.--11. " BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four" bitfld.long 0x28 8.--9. " BURST_COUNT[0] ,Number of reads in each STEP_LN[0]" ",,,Four" textline " " hexmask.long.byte 0x28 0.--7. 1. " ERR_LIMIT ,Number of errors allowed before considered a failure" line.long 0x2C "CA_CTRL_MISC1_0,Misc Controls For CA Training Sweep" hexmask.long.byte 0x2C 0.--7. 1. " SKIP_CNT ,Number of NOPs between 2 CA training reads" line.long 0x30 "CA_VREF_CTRL_0,Controls For CA-Vref Training" bitfld.long 0x30 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x30 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x30 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x30 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.byte 0x30 8.--15. 1. " MAXIMUM ,Maximum" hexmask.long.byte 0x30 0.--7. 1. " MINIMUM ,Minimum" line.long 0x34 "CA_TADR_CTRL_0,Controls For TADR Sweep" bitfld.long 0x34 31. " TADR_ENABLE ,Set to disabled" "Disabled,?..." hexmask.long.byte 0x34 12.--19. 1. " TADR_MAX ,Maximum tADR allowed in tCK" hexmask.long.word 0x34 0.--11. 1. " TADR_SETTING ,CA BRLSHFT + CA trimmer during tADR training" line.long 0x38 "SETTLE_0,Controls Settle Time For Delay Controls In MCCLK" hexmask.long.byte 0x38 24.--31. 1. " APPLY_DELAY ,Wait time after issuing a training priv request" hexmask.long.byte 0x38 16.--23. 1. " PRIV_DELAY ,Wait time after issuing a training priv request" hexmask.long.byte 0x38 8.--15. 1. " SHORT_TRIMMER ,Settle time for short trimmer" hexmask.long.byte 0x38 0.--7. 1. " LONG_TRIMMER ,Settle time for long trimmer" line.long 0x3C "DEBUG_CTRL_0,Controls To Select Which Debug Information Should Be Output In Debug DQ* Registers" bitfld.long 0x3C 24.--27. " WINDOW_LIMIT ,Threshold to determine how many windows to report in debug registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x3C 0.--7. 1. " SELECT ,Specifies output on DQ registers" group.long 0xE5C++0x13 line.long 0x00 "MPC_0,MPC-RD Registers Data" hexmask.long.word 0x00 16.--31. 1. " INVERT_PATTERN ,Invert pattern" hexmask.long.word 0x00 0.--15. 1. " DATA ,Data" line.long 0x04 "PATRAM_CTRL_0,Register To Write Pattern RAM" bitfld.long 0x04 31. " WRITE ,Trigger a write into pattern RAM with data supplied by PATRAM_DATA_* registers" "Not triggered,Triggered" bitfld.long 0x04 16.--19. " FORMAT ,Specifies format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 0.--7. 0x01 " SELECT_OFFSET ,Location to write in pattern RAM" line.long 0x08 "PATRAM_DQ_0,DQ Data To Write Into Pattern RAM" line.long 0x0C "PATRAM_DMI_0,DMI Data To Write Into Pattern RAM" line.long 0x10 "VREF_SETTLE_0,Controls For Settle Time For Vref In MCCLK" hexmask.long.word 0x10 16.--31. 1. " OB ,Settle time for WRITE|CA Vrefs" hexmask.long.word 0x10 0.--15. 1. " IB ,Settle time for READ|QUSE Vrefs" sif (cpuis("TEGRAX2")) group.long 0xE98++0x03 line.long 0x00 "RW_OFFSET_IB_BYTE0_0,EMC Training RW Offset IB Byte0 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xE9C++0x03 line.long 0x00 "RW_OFFSET_IB_BYTE1_0,EMC Training RW Offset IB Byte1 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEA0++0x03 line.long 0x00 "RW_OFFSET_IB_BYTE2_0,EMC Training RW Offset IB Byte2 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEA4++0x03 line.long 0x00 "RW_OFFSET_IB_BYTE3_0,EMC Training RW Offset IB Byte3 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEA8++0x03 line.long 0x00 "RW_OFFSET_IB_MISC_0,EMC training RW Offset IB MISC 0" bitfld.long 0x00 12.--15. " DBI3 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DBI2 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DBI1 ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DBI0 ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEAC++0x03 line.long 0x00 "RW_OFFSET_OB_BYTE0_0,EMC training RW Offset OB BYTE0 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEB0++0x03 line.long 0x00 "RW_OFFSET_OB_BYTE1_0,EMC training RW Offset OB BYTE1 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEB4++0x03 line.long 0x00 "RW_OFFSET_OB_BYTE2_0,EMC training RW Offset OB BYTE2 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEB8++0x03 line.long 0x00 "RW_OFFSET_OB_BYTE3_0,EMC training RW Offset OB BYTE3 0" bitfld.long 0x00 28.--31. " DQ7 ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " DQ6 ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " DQ5 ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DQ4 ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " DQ3 ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DQ2 ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DQ1 ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DQ0 ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xEBC++0x03 line.long 0x00 "RW_OFFSET_OB_MISC_0,EMC training RW Offset OB MISC 0" bitfld.long 0x00 12.--15. " DBI3 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " DBI2 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DBI1 ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DBI0 ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif rgroup.long 0xEC0++0x07 line.long 0x00 "OPT_CA_VREF_0,Read Back For CA VREF Optimal Vref Results" hexmask.long.byte 0x00 24.--31. 1. " RANK1_SUB_PARTITION1 ,CA_VREF optimal for RANK1 SUB_PARTITION1 for each channel" hexmask.long.byte 0x00 16.--23. 1. " RANK1_SUB_PARTITION0 ,CA_VREF optimal for RANK1 SUB_PARTITION0 for each channel" textline " " hexmask.long.byte 0x00 8.--15. 1. " RANK0_SUB_PARTITION1 ,CA_VREF optimal for RANK0 SUB_PARTITION1 for each channel" hexmask.long.byte 0x00 0.--7. 1. " RANK0_SUB_PARTITION0 ,CA_VREF optimal for RANK0 SUB_PARTITION0 for each channel" line.long 0x04 "OPT_DQ_OB_VREF_0,Read Back For OB-DQ VREF Optimal Vref Results" hexmask.long.byte 0x04 24.--31. 1. " RANK1_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION1 for each channel" hexmask.long.byte 0x04 16.--23. 1. " RANK1_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION0 for each channel" textline " " hexmask.long.byte 0x04 8.--15. 1. " RANK0_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION1 for each channel" hexmask.long.byte 0x04 0.--7. 1. " RANK0_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION0 for each channel" group.long 0xED0++0x03 line.long 0x00 "QUSE_VREF_CTRL_0,Controls For Read-DQS-Vref Trainings Sweep" bitfld.long 0x00 23. " STEP[3] ,Step[3]" "Zero,One" bitfld.long 0x00 22. " STEP[2] ,Step[2]" "Zero,One" bitfld.long 0x00 21. " STEP[1] ,Step[1]" "Zero,One" bitfld.long 0x00 20. " STEP[0] ,Step[0]" "Zero,One" textline " " hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM ,Maximum" hexmask.long.byte 0x00 0.--7. 1. " MINIMUM ,Minimum" tree.end width 0x0B tree.end tree.end tree "AHB Controller" base ad:0x6000C000 tree "AHB Arbiter Register" width 17. sif cpuis("TEGRAX1") group.long 0x04++0x03 line.long 0x00 "DISABLE_0,AHB Arbitration Controller" bitfld.long 0x00 31. " DIS_BUS_PARK ,Disable bus parking" "No,Yes" bitfld.long 0x00 30. " DIS_PENULTIMATE_ARB ,Disable arbitration on the second to last transfer" "No,Yes" bitfld.long 0x00 18. " USB2 ,Disable USB2 from arbitration" "No,Yes" textline " " bitfld.long 0x00 14. " SE ,Disable SE from arbitration" "No,Yes" bitfld.long 0x00 7. " APBDMA ,Disable APB-DMA from arbitration" "No,Yes" bitfld.long 0x00 6. " USB ,Disable USB from arbitration" "No,Yes" textline " " bitfld.long 0x00 4. " ARC ,Disable ARC from arbitration" "No,Yes" bitfld.long 0x00 1. " COP ,Disable COP from arbitration" "No,Yes" bitfld.long 0x00 0. " CPU ,Disable CPU from arbitration" "No,Yes" textline " " else group.long 0x04++0x03 line.long 0x00 "DISABLE_0,AHB Arbitration Controller" bitfld.long 0x00 31. " DIS_BUS_PARK ,Disable bus parking" "No,Yes" bitfld.long 0x00 30. " DIS_PENULTIMATE_ARB ,Disable arbitration on the second to last transfer" "No,Yes" bitfld.long 0x00 21. " MIPIHSI ,Disable MIPIHSI from arbitration" "No,Yes" textline " " bitfld.long 0x00 18. " USB2 ,Disable USB2 from arbitration" "No,Yes" bitfld.long 0x00 17. " USB3 ,Disable USB3 from arbitration" "No,Yes" bitfld.long 0x00 16. " BSEA ,Disable BSEA from arbitration" "No,Yes" textline " " bitfld.long 0x00 15. " DDS ,Disable DDS from arbitration" "No,Yes" bitfld.long 0x00 14. " SE ,Disable SE from arbitration" "No,Yes" bitfld.long 0x00 13. " BSEV ,Disable BSEV from arbitration" "No,Yes" textline " " bitfld.long 0x00 11. " SNOR ,Disable SNOR from arbitration" "No,Yes" bitfld.long 0x00 7. " APBDMA ,Disable APB-DMA from arbitration" "No,Yes" bitfld.long 0x00 6. " USB ,Disable USB from arbitration" "No,Yes" textline " " bitfld.long 0x00 5. " AHBDMA ,Disable AHB-DMA from arbitration" "No,Yes" bitfld.long 0x00 4. " ARC ,Disable ARC from arbitration" "No,Yes" bitfld.long 0x00 3. " CSITE ,Disable CoreSight from arbitration" "No,Yes" textline " " bitfld.long 0x00 2. " VCP ,Disable VCP from arbitration" "No,Yes" bitfld.long 0x00 1. " COP ,Disable COP from arbitration" "No,Yes" bitfld.long 0x00 0. " CPU ,Disable CPU from arbitration" "No,Yes" textline " " endif group.long 0x08++0x07 line.long 0x00 "PRIORITY_CTRL_0,AHB Arbitration Priority Control Register" bitfld.long 0x00 29.--31. " AHB_PRIORITY_WEIGHT ,AHB priority weight count" "0,1,2,3,4,5,6,7" hexmask.long 0x00 0.--28. 1. " AHB_PRIORITY_SELECT ,Priority group" line.long 0x04 "USR_PROTECT_0,USR Protection Register" bitfld.long 0x04 8. " CACHE ,Abort on USR mode access to Cache memory space" "ABT_DIS,ABT_EN" bitfld.long 0x04 7. " ROM ,Abort on USR mode access to internal ROM memory space" "ABT_DIS,ABT_EN" bitfld.long 0x04 6. " APB ,Abort on USR mode access to APB memory space" "ABT_DIS,ABT_EN" textline " " bitfld.long 0x04 5. " AHB ,Abort on USR mode access to AHB memory space" "ABT_DIS,ABT_EN" bitfld.long 0x04 3. " IRAMD ,Abort on USR mode access to iRAMd memory space" "ABT_DIS,ABT_EN" bitfld.long 0x04 2. " IRAMC ,Abort on USR mode access to iRAMc memory space" "ABT_DIS,ABT_EN" textline " " bitfld.long 0x04 1. " IRAMB ,Abort on USR mode access to iRAMb memory space" "ABT_DIS,ABT_EN" bitfld.long 0x04 0. " IRAMA ,Abort on USR mode access to iRAMa memory space" "ABT_DIS,ABT_EN" textline " " tree.end tree "AHB GIZMO" width 25. group.long 0x10++0x0F line.long 0x00 "GIZMO_AHB_DMA,Memory Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " sif cpuis("TEGRAX1") bitfld.long 0x00 9. " EN_USB_WAIT_COMMIT_ON_XK_STALL ,En USB wait commit on XK stall" "Disabled,Enabled" bitfld.long 0x00 8. " WR_WAIT_COMMIT_ON_XK ,Wr wait commit on XK" "Disabled,Enabled" else bitfld.long 0x00 9. " EN_USB_WAIT_COMMIT_ON_1K_STALL ,En USB wait commit on 1K stall" "Disabled,Enabled" bitfld.long 0x00 8. " WR_WAIT_COMMIT_ON_1K ,Wr wait commit on 1K" "Disabled,Enabled" endif bitfld.long 0x00 7. " DONT_SPLIT_AHB_WR ,Split AHB write transaction" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACCEPT_AHB_WR_ALWAYS ,Accept AHB write request" "Accept on check,Accept on nocheck" bitfld.long 0x00 2. " ENB_FAST_REARBITRATE ,Enable fast re-arbitration" "Disabled,Enabled" bitfld.long 0x00 1. " FORCE_TO_AHB_SINGLE ,Force all AHB transaction to single data request transaction" "Not single data,Single data" textline " " bitfld.long 0x00 0. " ENABLE_SPLIT ,Enable spliting AHB transaction" "Disabled,Enabled" textline " " line.long 0x04 "GIZMO_APB_DMA_0,AHB Gizmo APB-DMA Control Register" hexmask.long.byte 0x04 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x04 18. " IMMEDIATE ,Start AHB write immediately" "Disabled,Enabled" bitfld.long 0x04 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " sif cpuis("TEGRAX1") group.long 0x18++0x03 line.long 0x00 "MASTER_SWID_0,AHB Master SWID[0] Register" bitfld.long 0x00 18. " USB2 ,SWID for USB2" "Disabled,Enabled" bitfld.long 0x00 14. " SE ,SWID for SE" "Disabled,ENabled" bitfld.long 0x00 6. " USB1 ,SWID for USB1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ARC ,SWID for ARC" "Disabled,Enabled" bitfld.long 0x00 1. " COP ,SWID for COP" "Disabled,Enabled" bitfld.long 0x00 0. " CPU ,SWID for CPU" "Disabled,Enabled" textline " " else group.long 0x18++0x03 line.long 0x00 "MASTER_SWID_0,AHB Master SWID[0] Register" bitfld.long 0x00 21. " MIPIHSI ,SWID for MIPIHSI" "Disabled,Enabled" bitfld.long 0x00 18. " USB2 ,SWID for USB2" "Disabled,Enabled" bitfld.long 0x00 17. " USB3 ,SWID for USB3" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BSEA ,SWID for BSEA" "Disabled,Enabled" bitfld.long 0x00 15. " DDS ,SWID for DDS" "Disabled,Enabled" bitfld.long 0x00 14. " SE ,SWID for SE" "Disabled,ENabled" textline " " bitfld.long 0x00 13. " BSEV ,SWID for BSEV" "Disabled,Enabled" bitfld.long 0x00 11. " NOR ,SWID for NOR" "Disabled,Enabled" bitfld.long 0x00 6. " USB1 ,SWID for USB1" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AHBDMA ,SWID for AHBDMA" "Disabled,Enabled" bitfld.long 0x00 4. " ARC ,SWID for ARC" "Disabled,Enabled" bitfld.long 0x00 3. " CORESIGHT ,SWID for CORESIGHT" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " VCP ,SWID for VCP" "Disabled,Enabled" bitfld.long 0x00 1. " COP ,SWID for COP" "Disabled,Enabled" bitfld.long 0x00 0. " CPU ,SWID for CPU" "Disabled,Enabled" textline " " endif group.long 0x20++0x13 line.long 0x00 "GIZMO_USB_0,AHB Gizmo USB Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " bitfld.long 0x00 7. " DONT_SPLIT_AHB_WR ,Split AHB write transaction" "Enabled,Disabled" bitfld.long 0x00 6. " ACCEPT_AHB_WR_ALWAYS ,Accept AHB write request" "Accept on check,Accept on nocheck" bitfld.long 0x00 2. " ENB_FAST_REARBITRATE ,Enable fast re-arbitration" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FORCE_TO_AHB_SINGLE ,Force all AHB transaction to single data request transaction" "Not single data,Single data" bitfld.long 0x00 0. " ENABLE_SPLIT ,Enable spliting AHB transactions" "Disabled,Enabled" textline " " line.long 0x04 "GIZMO_AHB_XBAR_BRIDGE_0,AHB Gizmo AHB XBAR Bridge Control Register" bitfld.long 0x04 7. " DONT_SPLIT_AHB_WR ,Split AHB write transaction" "Enabled,Disabled" bitfld.long 0x04 6. " ACCEPT_AHB_WR_ALWAYS ,Accept AHB write request" "Accept on check,Accept on nocheck" bitfld.long 0x04 4.--5. " MAX_IP_BURSTSIZE ,Maximum allowed IP burst size" "1,4,8,16" textline " " bitfld.long 0x04 3. " IMMEDIATE ,Start write request to device immediately" "Disabled,Enabled" bitfld.long 0x04 2. " ENB_FAST_REARBITRATE ,Enable fast re-arbitration" "Disabled,Enabled" bitfld.long 0x04 1. " FORCE_TO_AHB_SINGLE ,Force all AHB transaction to single data request transaction" "Not single data,Single data" textline " " bitfld.long 0x04 0. " ENABLE_SPLIT ,Enable splitting AHB transactions" "Disabled,Enabled" textline " " line.long 0x08 "GIZMO_CPU_AHB_BRIDGE_0,AHB Gizmo CPU AHB Bridge Control Register" hexmask.long.byte 0x08 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count." bitfld.long 0x08 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x08 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" line.long 0x0C "GIZMO_COP_AHB_BRIDGE_0,AHB Gizmo COP AHB Bridge Control Register" hexmask.long.byte 0x0C 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x0C 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x0C 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" line.long 0x10 "GIZMO_XBAR_APB_CTLR_0,AHB Gizmo XBAR APB Control Register" bitfld.long 0x10 4.--5. " MAX_IP_BURSTSIZE ,Maximum allowed IP burst size" "1,4,8,16" bitfld.long 0x10 3. " IMMEDIATE ,Start write request to device immediately" "Disabled,Enabled" sif cpuis("TEGRAX1") group.long 0x38++0x03 line.long 0x00 "MASTER_SWID_1,AHB Master SWID[1] Register" bitfld.long 0x00 18. " USB2 ,SWID for USB2" "Disabled,Enabled" bitfld.long 0x00 14. " SE ,SWID for SE" "Disabled,Enabled" bitfld.long 0x00 6. " USB1 ,SWID for USB1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ARC ,SWID for ARC" "Disabled,Enabled" bitfld.long 0x00 1. " COP ,SWID for COP" "Disabled,Enabled" bitfld.long 0x00 0. " CPU ,SWID for CPU" "Disabled,Enabled" textline " " else group.long 0x34++0x07 line.long 0x00 "GIZMO_VCP_AHB_BRIDGE_0,AHB Gizmo VCP AHB Bridge Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,AHB master gizmo" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" line.long 0x04 "MASTER_SWID_1,AHB Master SWID[1] Register" bitfld.long 0x04 20. " MIPIHSI ,SWID for MIPIHSI" "Disabled,Enabled" bitfld.long 0x04 18. " USB2 ,SWID for USB2" "Disabled,Enabled" bitfld.long 0x04 17. " USB3 ,SWID for USB3" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " BSEA ,SWID for BSEA" "Disabled,Enabled" bitfld.long 0x04 15. " DDS ,SWID for DDS" "Disabled,Enabled" bitfld.long 0x04 14. " SE ,SWID for SE" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " BSEV ,SWID for BSEV" "Disabled,Enabled" bitfld.long 0x04 11. " NOR ,SWID for NOR" "Disabled,Enabled" bitfld.long 0x04 6. " USB1 ,SWID for USB1" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " AHBDMA ,SWID for AHBDMA" "Disabled,Enabled" bitfld.long 0x04 4. " ARC ,SWID for ARC" "Disabled,Enabled" bitfld.long 0x04 3. " CORESIGHT ,SWID for CORESIGHT" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " VCP ,SWID for VCP" "Disabled,Enabled" bitfld.long 0x04 1. " COP ,SWID for COP" "Disabled,Enabled" bitfld.long 0x04 0. " CPU ,SWID for CPU" "Disabled,Enabled" textline " " endif group.long 0x50++0x07 line.long 0x00 "GIZMO_SE_0,AHB Gizmo SE Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " line.long 0x04 "GIZMO_TZRAM_0,AHB Gizmo AHB TZRAM Control Register" bitfld.long 0x04 7. " DONT_SPLIT_AHB_WR ,Do not split AHB write transaction" "Enabled,Disabled" bitfld.long 0x04 6. " ACCEPT_AHB_WR_ALWAYS ,Accept AHB write request always" "Accept on check,Accept on nocheck" bitfld.long 0x04 2. " ENB_FAST_REARBITRATE ,Enable fast re-arbitration" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " FORCE_TO_AHB_SINGLE ,Force all AHB transaction to single data request transaction" "Not single data,Single data" bitfld.long 0x04 0. " ENABLE_SPLIT ,Enable splitting AHB transactions" "Disabled,Enabled" textline " " sif !cpuis("TEGRAX1") group.long 0x64++0x03 line.long 0x00 "GIZMO_BSEV_0,AHB Gizmo BSE Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " group.long 0x74++0x07 line.long 0x00 "GIZMO_BSEA_0 ,AHB Gizmo SCE Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " line.long 0x04 "GIZMO_NOR_0,AHB Gizmo AHB NOR Flash Control Register" hexmask.long.byte 0x04 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x04 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x04 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " bitfld.long 0x04 7. " DONT_SPLIT_AHB_WR ,Do not split AHB write transaction" "Enabled,Disabled" bitfld.long 0x04 6. " ACCEPT_AHB_WR_ALWAYS ,Always accept AHB write requests" "Accept on check,Accept on nocheck" bitfld.long 0x04 2. " ENB_FAST_REARBITRATE ,Enable fast re-arbitration" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " FORCE_TO_AHB_SINGLE ,Force all AHB transactions to single data request transaction" "Not single data,Single data" bitfld.long 0x04 0. " ENABLE_SPLIT ,Enable splitting AHB transactions" "Disabled,Enabled" textline " " endif group.long 0x7C++0x03 line.long 0x00 "GIZMO_USB2_0,AHB Gizmo USB2 Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " bitfld.long 0x00 7. " DONT_SPLIT_AHB_WR ,Do not split AHB write transaction" "Enabled,Disabled" bitfld.long 0x00 6. " ACCEPT_AHB_WR_ALWAYS ,Accept AHB write request always" "Accept on check,Accept on nocheck" bitfld.long 0x00 2. " ENB_FAST_REARBITRATE ,Enable fast re-arbitration" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FORCE_TO_AHB_SINGLE ,Force all AHB transaction to single data request transaction" "Not single data,Single data" bitfld.long 0x00 0. " ENABLE_SPLIT ,Enable splitting AHB transactions" "Disabled,Enabled" textline " " sif !cpuis("TEGRAX1") group.long 0x80++0x03 line.long 0x00 "GIZMO_USB3_0,AHB Gizmo USB3 Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" textline " " bitfld.long 0x00 7. " DONT_SPLIT_AHB_WR ,Do not split AHB write transaction" "Enabled,Disabled" bitfld.long 0x00 6. " ACCEPT_AHB_WR_ALWAYS ,Accept AHB write request always" "Accept on check,Accept on nocheck" bitfld.long 0x00 2. " ENB_FAST_REARBITRATE ,Enable fast re-arbitration" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FORCE_TO_AHB_SINGLE ,Force all AHB transaction to single data request transaction" "Not single data,Single data" bitfld.long 0x00 0. " ENABLE_SPLIT ,Enable splitting AHB transactions" "Disabled,Enabled" textline " " group.long 0x90++0x07 line.long 0x00 "GIZMO_DDS_0,AHB Gizmo DDS Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" line.long 0x04 "GIZMO_MIPIHSI_0,AHB Gizmo MIPIHSI Control Register" hexmask.long.byte 0x04 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x04 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x04 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" endif group.long 0x98++0x03 line.long 0x00 "GIZMO_ARC_0,AHB Gizmo ARC Control Register" hexmask.long.byte 0x00 24.--31. 1. " REQ_NEG_CNT ,AHB master request negate count" bitfld.long 0x00 18. " IMMEDIATE ,Start AHB write request immediately" "Disabled,Enabled" bitfld.long 0x00 16.--17. " MAX_AHB_BURSTSIZE ,Maximum allowed AHB burst size" "1,4,8,16" rgroup.long 0xC4++0x03 line.long 0x00 "AHB_WRQ_EMPTY_0 ,AHB WRQ Empty 0" bitfld.long 0x00 1. " COP_AHB_WRQ_EMPTY ,COP ahb wrq empty" "0,1" bitfld.long 0x00 0. " CPU_AHB_WRQ_EMPTY ,CPU ahb wrq empty" "0,1" tree.end tree "AHB Memory Controller Slave Registers" width 26. group.long 0xCC++0x0F line.long 0x00 "AHB_MEM_PREFETCH_CFG5_0,AHB AHB Mem Prefetch CFG5 0" bitfld.long 0x00 31. " ENABLE ,Enable" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x00 26.--30. " AHB_MST_ID ,AHB mst ID USB" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,SDIO1,NAND_FLASH,,HSMMC,,SE,,BSEA,USB3,USB2,SDIO2,?..." else bitfld.long 0x00 26.--30. " AHB_MST_ID ,AHB mst ID USB" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,SDIO1,NAND_FLASH,SNOR,HSMMC,BSEV,SE,,BSEA,USB3,USB2,SDIO2,?..." endif textline " " bitfld.long 0x00 21.--25. " ADDR_BNDRY ,2^(n+6) byte boundary" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. " INACTIVITY_TIMEOUT ,Inactivity timeout" line.long 0x04 "AHB_MEM_PREFETCH_CFG6_0 ,AHB AHB Mem Prefetch CFG6 0" bitfld.long 0x04 31. " ENABLE ,Enable" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x04 26.--30. " AHB_MST_ID ,AHB mst ID USB" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,SDIO1,NAND_FLASH,,HSMMC,,SE,,BSEA,USB3,USB2,SDIO2,?..." else bitfld.long 0x04 26.--30. " AHB_MST_ID ,AHB mst ID USB" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,SDIO1,NAND_FLASH,SNOR,HSMMC,BSEV,SE,,BSEA,USB3,USB2,SDIO2,?..." endif textline " " bitfld.long 0x04 21.--25. " ADDR_BNDRY ,2^(n+6) byte boundary" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " INACTIVITY_TIMEOUT ,Inactivity timeout" line.long 0x08 "AHB_MEM_PREFETCH_CFG7_0 ,AHB AHB Mem Prefetch CFG7 0" bitfld.long 0x08 31. " ENABLE ,Enable" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x08 26.--30. " AHB_MST_ID ,AHB mst ID USB" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,SDIO1,NAND_FLASH,,HSMMC,,SE,,BSEA,USB3,USB2,SDIO2,?..." else bitfld.long 0x08 26.--30. " AHB_MST_ID ,AHB mst ID USB" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,SDIO1,NAND_FLASH,SNOR,HSMMC,BSEV,SE,,BSEA,USB3,USB2,SDIO2,?..." endif textline " " bitfld.long 0x08 21.--25. " ADDR_BNDRY ,2^(n+6) byte boundary" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. " INACTIVITY_TIMEOUT ,Inactivity timeout" line.long 0x0C "AHB_MEM_PREFETCH_CFG8_0 ,AHB AHB Mem Prefetch CFG8 0" bitfld.long 0x0C 31. " ENABLE ,Enable" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x0C 26.--30. " AHB_MST_ID ,AHB mst ID USB" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,SDIO1,NAND_FLASH,,HSMMC,,SE,,BSEA,USB3,USB2,SDIO2,?..." else bitfld.long 0x0C 26.--30. " AHB_MST_ID ,AHB mst ID USB" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,SDIO1,NAND_FLASH,SNOR,HSMMC,BSEV,SE,,BSEA,USB3,USB2,SDIO2,?..." endif textline " " bitfld.long 0x0C 21.--25. " ADDR_BNDRY ,2^(n+6) byte boundary" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 0.--15. 1. " INACTIVITY_TIMEOUT ,Inactivity timeout" width 26. group.long 0xDC++0x0F line.long 0x00 "AHB_MEM_PREFETCH_CFG_X_0,AHB AHB Mem Prefetch Cfg X 0" bitfld.long 0x00 15. " DISABLE_ADDR_BNDY_CHK_MST8 ,Disable addr bndy chk mst8" "Disabled,Enabled" bitfld.long 0x00 14. " DISABLE_ADDR_BNDY_CHK_MST7 ,Disable addr bndy chk mst 7" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DISABLE_ADDR_BNDY_CHK_MST6 ,Disable addr bndy chk mst 6" "Disabled,Enabled" bitfld.long 0x00 12. " DISABLE_ADDR_BNDY_CHK_MST5 , Disable addr bndy chk mst 5" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " DISABLE_ADDR_BNDY_CHK_MST4 ,Disable addr bndy chk mst 4" "Disabled,Enabled" bitfld.long 0x00 10. " DISABLE_ADDR_BNDY_CHK_MST3 ,Disable addr bndy chk mst 3" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " DISABLE_ADDR_BNDY_CHK_MST2 ,Disable addr bndy chk mst 2" "Disabled,Enabled" bitfld.long 0x00 8. " DISABLE_ADDR_BNDY_CHK_MST1 ,Disable addr bndy chk mst 1" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DISABLE_CHECK_SIZE_MASTER8 ,Disable check size master 8" "Disabled,Enabled" bitfld.long 0x00 6. " DISABLE_CHECK_SIZE_MASTER7 ,Disable check size master 7" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DISABLE_CHECK_SIZE_MASTER6 ,Disable check size master 6" "Disabled,Enabled" bitfld.long 0x00 4. " DISABLE_CHECK_SIZE_MASTER5 ,Disable check size master 5" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DISABLE_CHECK_SIZE_MASTER4 ,Disable check size master 4" "Disabled,Enabled" bitfld.long 0x00 2. " DISABLE_CHECK_SIZE_MASTER3 ,Disable check size master 3" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DISABLE_CHECK_SIZE_MASTER2 ,Disable check size master 2" "Disabled,Enabled" bitfld.long 0x00 0. " DISABLE_CHECK_SIZE_MASTER1 ,Disable check size master 1" "Disabled,Enabled" textline " " line.long 0x04 "ARBITRATION_XBAR_CTRL_0,XBAR Control Register" bitfld.long 0x04 16. " MEM_INIT_DONE ,Software should set this bit when memory has been initialized" "Not done,Done" bitfld.long 0x04 1. " HOLD_DIS ,Software writes to modify" "No,Yes" textline " " bitfld.long 0x04 0. " POST_DIS ,Software writes to modify" "No,Yes" textline " " line.long 0x08 "AHB_MEM_PREFETCH_CFG3_0 ,AHB AHB Mem Prefetch CFG 3 0" bitfld.long 0x08 31. " ENABLE ,Enable" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x08 26.--30. " AHB_MST_ID ,AHBDMA master" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,,,,HSMMC,,SE,,BSEA,USB3,USB2,?..." else bitfld.long 0x08 26.--30. " AHB_MST_ID ,AHBDMA master" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,,,SNOR,HSMMC,BSEV,SE,,BSEA,USB3,USB2,?..." endif textline " " bitfld.long 0x08 21.--25. " ADDR_BNDRY ,2^(n+6) byte boundary" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. " INACTIVITY_TIMEOUT ,2048 cycles" textline " " line.long 0x0C "AHB_MEM_PREFETCH_CFG4_0 ,AHB AHB Mem Prefetch CFG 4 0" bitfld.long 0x0C 31. " ENABLE ,Enable" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x0C 26.--30. " AHB_MST_ID ,AHBDMA master" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,,,,HSMMC,,SE,,BSEA,USB3,USB2,?..." else bitfld.long 0x0C 26.--30. " AHB_MST_ID ,AHBDMA master" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,,,SNOR,HSMMC,BSEV,SE,,BSEA,USB3,USB2,?..." endif textline " " bitfld.long 0x0C 21.--25. " ADDR_BNDRY ,2^(n+6) byte boundary" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 0.--15. 1. " INACTIVITY_TIMEOUT ,2048 cycles" textline " " rgroup.long 0xEC++0x03 line.long 0x00 "AVP_PPCS_RD_COH_STATUS_0,ARM7 outstanding rd/wr" bitfld.long 0x00 16. " RDS_OUTSTANDING ,Rds outstanding" "0,1" bitfld.long 0x00 0. " WRS_OUTSTANDING ,Wrs outstanding" "0,1" textline " " group.long 0x0F0++0x07 line.long 0x00 "AHB_MEM_PREFETCH_CFG1_0,NV_ahbslvmem prefetch cfg1" bitfld.long 0x00 31. " ENABLE ,Enable" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x00 26.--30. " AHB_MST_ID ,AHBDMA master" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,,,,HSMMC,,SE,,BSEA,USB3,USB2,?..." else bitfld.long 0x00 26.--30. " AHB_MST_ID ,AHBDMA master" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,,,SNOR,HSMMC,BSEV,SE,,BSEA,USB3,USB2,?..." endif textline " " bitfld.long 0x00 21.--25. " ADDR_BNDRY ,2^(n+6) byte boundary" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. " INACTIVITY_TIMEOUT ,2048 cycles" textline " " line.long 0x04 "AHB_MEM_PREFETCH_CFG2_0,NV_ahbslvmem prefetch cfg2" bitfld.long 0x04 31. " ENABLE ,Enable" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x04 26.--30. " AHB_MST_ID ,AHBDMA master" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,,,,HSMMC,,SE,,BSEA,USB3,USB2,?..." else bitfld.long 0x04 26.--30. " AHB_MST_ID ,AHBDMA master" "CPU,COP,VCP,CSITE,IDE,AHBDMA,USB,APBDMA,,,,SNOR,HSMMC,BSEV,SE,,BSEA,USB3,USB2,?..." endif textline " " bitfld.long 0x04 21.--25. " ADDR_BNDRY ,2^(n+6) byte boundary" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " INACTIVITY_TIMEOUT ,2048 cycles" textline " " width 36. rgroup.long 0xF8++0x17 line.long 0x00 "AHBSLVMEM_STATUS_0,Ahbslv Outstanding rd" bitfld.long 0x00 1. " PPCS_RDS_OUTSTANDING ,PPCS rds outstanding" "Disabled,Enabled" bitfld.long 0x00 0. " GIZMO_IP_RDQUE_EMPTY ,GIZMO IP rdque empty" "Disabled,Enabled" textline " " line.long 0x04 "ARBITRATION_AHB_MEM_WRQUE_MST_ID_0,AHB Memory Write Queue AHB Master ID Register" line.long 0x08 "ARBITRATION_CPU_ABORT_ADDR_0,CPU Abort Address Register" line.long 0x0C "ARBITRATION_CPU_ABORT_INFO_0,CPU Abort Info Register" bitfld.long 0x0C 15. " IRAMA ,Abort occurred due to an iRAMa protection violation" "Disabled,Enabled" bitfld.long 0x0C 14. " IRAMB ,Abort occurred due to an iRAMb protection violation" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " IRAMC ,Abort occurred due to an iRAMc protection violation" "Disabled,Enabled" bitfld.long 0x0C 12. " IRAMD ,Abort occurred due to an iRAMd protection violation" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " INV_IRAM ,Abort occurred due to an access to invalid iRAM address space" "Disabled,Enabled" bitfld.long 0x0C 10. " PPSB ,Abort occurred due to a PPSB protection violation" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " APB ,Abort occurred due to an APB protection violation" "Disabled,Enabled" bitfld.long 0x0C 8. " AHB ,Abort occurred due to an AHB protection violation" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " CACHE ,Abort occurred due to a Cache protection violation" "Disabled,Enabled" bitfld.long 0x0C 6. " PROTECTION ,TRUE for any protection violation" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " ALIGN ,TRUE for abort caused by Misalignment" "Disabled,Enabled" bitfld.long 0x0C 4. " BADSIZE ,TRUE for abort caused by Bad Size" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " WRITE ,Aborted transaction was a Write" "Disabled,Enabled" bitfld.long 0x0C 2. " DATA ,Aborted transaction was a Data access" "Disabled,Enabled" textline " " bitfld.long 0x0C 0.--1. " SIZE ,Aborted transaction Request Size" "Byte abort,Hword abort,Word abort,?..." textline " " line.long 0x10 "ARBITRATION_COP_ABORT_ADDR_0,CPU Abort Address Register" line.long 0x14 "ARBITRATION_COP_ABORT_INFO_0,COP Abort Info Register" bitfld.long 0x14 15. " IRAMA ,Abort occurred due to an iRAMa protection violation" "Disabled,Enabled" bitfld.long 0x14 14. " IRAMB ,Abort occurred due to an iRAMb protection violation" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " IRAMC ,Abort occurred due to an iRAMc protection violation" "Disabled,Enabled" bitfld.long 0x14 10. " PPSB ,Abort occurred due to a PPSB protection violation" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " APB ,Abort occurred due to an APB protection violation" "Disabled,Enabled" bitfld.long 0x14 8. " AHB ,Abort occurred due to an AHB protection violation" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " CACHE ,Abort occurred due to a Cache protection violation" "Disabled,Enabled" bitfld.long 0x14 6. " PROTECTION ,TRUE for any protection violation" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " ALIGN ,TRUE for abort caused by Misalignment" "Disabled,Enabled" bitfld.long 0x14 4. " BADSIZE ,TRUE for abort caused by Bad Size" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " WRITE ,Aborted transaction was a Write" "Disabled,Enabled" bitfld.long 0x14 2. " DATA ,Aborted transaction was a Data access" "Disabled,Enabled" textline " " bitfld.long 0x14 0.--1. " SIZE ,Aborted transaction Request Size" "Byte abort,Hword abort,Word abort," textline " " group.long 0x110++0x07 line.long 0x00 "AHB_SPARE_REG_0,AHB Spare Register Bits" hexmask.long.tbyte 0x00 12.--31. 1. " AHB_SPARE_REG ,AHB Spare Register" bitfld.long 0x00 0.--4. " CSITE_PADMACRO_TRIM_SEL ,Trimmer select register for CoreSight clock pad macro" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " line.long 0x04 "XBAR_SPARE_REG_0,XBAR Spare Register Bits" sif !cpuis("TEGRAX1") hexmask.long.tbyte 0x04 11.--31. 1. " UNUSED ,XBAR Diagnostic Register Spare Bits" textline " " else hexmask.long.tbyte 0x04 12.--31. 1. " UNUSED ,XBAR Diagnostic Register Spare Bits" bitfld.long 0x04 11. " DISABLE_XBAR_ABORT_EXTENSION ,XBAR Diagnostic Register to disable one clock extension of u_abort" "Disabled,Enabled" textline " " endif bitfld.long 0x04 10. " DISABLE_COP_BYTE_WR ,XBAR Diagnostic Register to disable COP byte writes" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " DISABLE_XUSB_DEV_BYTE_WR ,XBAR Diagnostic Register to disable XUSB dev byte writes" "Disabled,Enabled" bitfld.long 0x04 8. " DISABLE_XUSB_HOST_BYTE_WR ,XBAR Diagnostic Register to disable XUSB host byte writes" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " DISABLE_SDMMC_BYTE_WR ,XBAR Diagnostic Register to disable SDMMC byte writes" "Disabled,Enabled" bitfld.long 0x04 6. " DISABLE_XBAR_APB_BYTE_WR ,XBAR Diagnostic Register to disable byte writes to APB slaves" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " MASK_PEND_IRAM_REQ ,XBAR Diagnostic Register to mask pending IRAM request while arbitration" "Disabled,Enabled" bitfld.long 0x04 4. " KILL_NEXT_REQ_ON_ABORT_UCQ ,XBAR Diagnostic Register to kill next request on ABORT from UCQ" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " KILL_NEXT_REQ_ON_ABORT_AHB ,XBAR Diagnostic Register to kill next request on ABORT from AHB Bridge" "Disabled,Enabled" bitfld.long 0x04 2. " KILL_NEXT_REQ_ON_ABORT_VCP2 ,XBAR Diagnostic Register to kill next request on ABORT from VCP2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " KILL_NEXT_REQ_ON_ABORT_COP ,XBAR Diagnostic Register to kill next request on ABORT from COP" "Disabled,Enabled" bitfld.long 0x04 0. " KILL_NEXT_REQ_ON_ABORT_APC ,XBAR Diagnostic Register to kill next request on ABORT from APC" "Disabled,Enabled" textline " " group.long 0x120++0x0B line.long 0x00 "AVPC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control and Clock Gating Control Register" bitfld.long 0x00 20. " AVPC_RCLK_OVR_MODE ,Avpc rclk override mode" "Legacy,On" bitfld.long 0x00 19. " AVPC_WCLK_OVR_MODE ,Avcp wclk override mode" "Legacy,On" textline " " bitfld.long 0x00 18. " AVPC_CCLK_OVERRIDE ,Avpc cclk override" "Disabled,Enabled" bitfld.long 0x00 17. " AVPC_RCLK_OVERRIDE ,Avpc rclk override" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " AVPC_WCLK_OVERRIDE ,Avpc wclk override" "Disabled,Enabled" bitfld.long 0x00 3. " AVPC_MCCIF_RDCL_RDFAST ,Avpc mccif rdcl rdfast" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " AVPC_MCCIF_WRMC_CLLE2X ,Avpc mccif wrmc clle2x" "Disabled,Enabled" bitfld.long 0x00 1. " AVPC_MCCIF_RDMC_RDFAST ,Avpc mccif rdmc rdfast" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AVPC_MCCIF_WRCL_MCLE2X ,Avpc mccif wrcl mcle2x" "Disabled,Enabled" textline " " line.long 0x04 "TIMEOUT_WCOAL_AVPC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x04 0.--7. 1. " AVPCARM7W_WCOAL_TMVAL ,Avpcarm7w wcoal tmval" line.long 0x08 "AHB_MPCORELP_MCCIF_FIFOCTRL_0 ,Memory Client Interface FIFO Control and Clock Gating Control Register" bitfld.long 0x08 20. " SYS_REGS_MPCORELP_RCLK_OVR_MODE ,Sys regs mpcorelp rclk ovr mode" "Legacy,On" bitfld.long 0x08 19. " SYS_REGS_MPCORELP_WCLK_OVR_MODE ,Sys regs mpcorelp wclk ovr mode" "Legacy,On" textline " " bitfld.long 0x08 18. " SYS_REGS_MPCORELP_CCLK_OVERRIDE ,Sys regs mpcorelp cclk override" "Disabled,Enabled" bitfld.long 0x08 17. " SYS_REGS_MPCORELP_RCLK_OVERRIDE ,Sys regs mpcorelp rclk override" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " SYS_REGS_MPCORELP_WCLK_OVERRIDE ,Sys regs mpcorelp wclk override" "Disabled,Enabled" textline " " sif !cpuis("TEGRAX1") group.long 0x12C++0x03 line.long 0x00 "AHB_MPCORE_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control and Clock Gating Control Register" bitfld.long 0x00 20. " SYS_REGS_MPCORE_RCLK_OVR_MODE ,Sys regs mpcore rclk ovr mode" "Legacy,On" bitfld.long 0x00 19. " SYS_REGS_MPCORE_WCLK_OVR_MODE ,Sys regs mpcore wclk ovr mode" "Legacy,On" textline " " bitfld.long 0x00 18. " SYS_REGS_MPCORE_CCLK_OVERRIDE ,Sys regs mpcore cclk override" "Disabled,Enabled" bitfld.long 0x00 17. " SYS_REGS_MPCORE_RCLK_OVERRIDE ,Sys regs mpcore rclk override" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SYS_REGS_MPCORE_WCLK_OVERRIDE ,Sys regs mpcore wclk override" "Disabled,Enabled" textline " " endif tree.end width 0x0B tree.end tree "APB" tree "APB Control" base ad:0x70000000 width 36. group.long 0x08++0x03 line.long 0x00 "PP_STRAPPING_OPT_A_0,Strapping Options Register" bitfld.long 0x00 26.--28. " BOOT_SELECT ,Read at power-on reset time from gmi_ad strap pads" "0,1,2,3,4,5,6,7" bitfld.long 0x00 13. " NVPROD_UART ,NVPROD UART" "0,1" textline " " bitfld.long 0x00 10.--12. " RCM_STRAPS ,RCM_STRAPS" "0,1,2,3,4,5,6,7" bitfld.long 0x00 9. " BOOT_FAST_UART ,UART Boot speed from TMC JTAG configuration bit" "Slow,Fast" textline " " bitfld.long 0x00 8. " MIO_WIDTH ,MIO width" "RSVD1,RSVD2" bitfld.long 0x00 4.--5. " RAM_CODE ,RAM code" "0,1,2,3" textline " " bitfld.long 0x00 0. " NOR_WIDTH ,NOR width" "RSVD1,RSVD2" group.long 0x24++0x03 line.long 0x00 "PP_CONFIG_CTL_0,JTAG configuration register" bitfld.long 0x00 7. " TBE ,RTCK daisy chaining" "Disabled,Enabled" bitfld.long 0x00 1. " XBAR_SO_DEFAULT ,XBAR SO default" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CPU_XBAR_SO_ENABLE ,CPU XBAR SO enable" "Disabled,Enabled" group.long 0x40++0x03 line.long 0x00 "PP_PINMUX_GLOBAL_0_0,Global Pinmux Control Register" bitfld.long 0x00 0. " CLAMP_INPUTS_WHEN_TRISTATED ,Clamp inputs when tristated" "Disabled,Enabled" group.long 0x428++0x03 line.long 0x00 "SC1X_PADS_VIP_VCLKCTRL_0,VCLK Control Register" bitfld.long 0x00 1. " INVERSION ,VCLK invert enable" "Disabled,Enabled" bitfld.long 0x00 0. " IE ,VLCK input enable" "Disabled,Enabled" rgroup.long 0x804++0x03 line.long 0x00 "GP_HIDREV_0,Chip ID revision register" bitfld.long 0x00 16.--19. " MINORREV ,Chip ID minor revision" "0,1,,,,,,,,,,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. " CHIPID ,Chip ID" textline " " bitfld.long 0x00 4.--7. " MAJORREV ,Chip ID major revision" "Emulation,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon,Silicon" bitfld.long 0x00 0.--3. " HIDFAM ,Chip ID family register" "GPU,HANDHELD,BR_CHIPS,CRUSH,MCP,CK,VAIO,HANDHELD_SOC,?..." group.long 0x810++0x03 line.long 0x00 "GP_ASDBGREG_0,Controls for Debug and Performance Enable" bitfld.long 0x00 28.--29. " CFG2TMC_RAM_SVOP_SP ,Control write timing characteristics for the compiled RAMSP" "0,1,2,3" bitfld.long 0x00 26.--27. " CFG2TMC_RAM_SVOP_REG ,Control write timing characteristics for the compiled RAMREG" "0,1,2,3" textline " " bitfld.long 0x00 24.--25. " CFG2TMC_RAM_SVOP_PDP ,Control write timing characteristics for the compiled RAMPDP" "0,1,2,3" bitfld.long 0x00 22.--23. " CFG2TMC_RAM_SVOP_DP ,Control write timing characteristics for the compiled RAMDP" "0,1,2,3" textline " " bitfld.long 0x00 20.--21. " CFG2TMC_RAM_EMAA ,Control timing characteristics for the compiled rams" "Disabled,Enabled,?..." bitfld.long 0x00 6.--7. " CFG2TMC_CLKBYP_FUNC ,Clock bypass function" "Disabled,Enabled,?..." textline " " bitfld.long 0x00 2. " CFG2TMC_PULLDOWN_EN ,Enables pulldown" "Disabled,Enabled" bitfld.long 0x00 1. " CFG2TMC_PULLUP_EN ,Enables pullup" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CFG2TMC_IDDQ_EN ,Enables iddq" "Disabled,Enabled" group.long 0x8D4++0x0E line.long 0x00 "GP_SDMMC1_CLK_LPBK_CONTROL_0,SDMMC1 Clock Loopback Control 0" bitfld.long 0x00 0. " SDMMC1_CLK_PAD_E_LPBK ,Enables deep loopback in SDMMC1 CLK pad" "Disabled,Enabled" line.long 0x04 "GP_SDMMC3_CLK_LPBK_CONTROL_0,SDMMC3 Clock Loopback Control 0" bitfld.long 0x04 0. " SDMMC3_CLK_PAD_E_LPBK ,Enables deep loopback in SDMMC3 CLK pad" "Disabled,Enabled" line.long 0x08 "GP_EMMC2_PAD_CFG_CONTROL_0,EMMC2 Pad Configuration Control 0" hexmask.long.byte 0x08 8.--15. 1. " EMMC2_PAD_E_INPUT ,Enable input path for D0-D7" bitfld.long 0x08 5. " EMMC2_PAD_E_INPUT_CLK ,Enable input for CLK pad" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " EMMC2_PAD_E_INPUT_CLKB ,Enable input for CLKB pad" "Disabled,Enabled" bitfld.long 0x08 2. " EMMC2_PAD_E_INPUT_DQS ,Enable Differential receiver for the DQS" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " EMMC2_PAD_E_INPUT_DQSB ,Enable Differential receiver for the DQSB" "Disabled,Enabled" bitfld.long 0x08 0. " EMMC2_PAD_E_DEEP_LPBK_CLK ,Enables deep loopback in SDMMC2 CLK pad" "Disabled,Enabled" group.long 0x8E0++0x19B line.long 0x00 "GP_EMMC2_PAD_CFG_CONTROL_0,EMMC2 Pad Configuration Control 0" hexmask.long.byte 0x00 8.--15. 1. " EMMC4_PAD_E_INPUT ,Enable input path for D0-D7" bitfld.long 0x00 5. " EMMC4_PAD_E_INPUT_CLK ,Enable input for CLK pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EMMC4_PAD_E_INPUT_CLKB ,Enable input for CLKB pad" "Disabled,Enabled" bitfld.long 0x00 2. " EMMC4_PAD_E_INPUT_DQS ,Enable Differential receiver for the DQS" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EMMC4_PAD_E_INPUT_DQSB ,Enable Differential receiver for the DQSB" "Disabled,Enabled" bitfld.long 0x00 0. " EMMC4_PAD_E_DEEP_LPBK_CLK ,Enables deep loopback in SDMMC4 CLK pad" "Disabled,Enabled" line.long 0x04 "GP_ALS_PROX_INT_CFGPADCTRL_0,ALS_PROX_INT_CFG Pad Control Register" bitfld.long 0x04 20.--24. " CFG2TMC_ALS_PROX_INT_CFG_CAL_DRVUP ,CFG2TMC_ALS_PROX_INT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 12.--16. " CFG2TMC_ALS_PROX_INT_CFG_CAL_DRVDN ,CFG2TMC_ALS_PROX_INT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "GP_AP_READY_CFGPADCTRL_0,AP_READY_CFG Pad Control Register" bitfld.long 0x08 20.--24. " CFG2TMC_AP_READY_CFG_CAL_DRVUP ,CFG2TMC_AP_READY_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 12.--16. " CFG2TMC_AP_READY_CFG_CAL_DRVDN ,CFG2TMC_AP_READY_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "GP_AP_WAKE_BT_CFGPADCTRL_0,AP_WAKE_BT_CFG Pad Control Register" bitfld.long 0x0C 20.--24. " CFG2TMC_AP_WAKE_BT_CFG_CAL_DRVUP ,CFG2TMC_AP_WAKE_BT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 12.--16. " CFG2TMC_AP_WAKE_BT_CFG_CAL_DRVDN ,CFG2TMC_AP_WAKE_BT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "GP_AP_WAKE_NFC_CFGPADCTRL_0,AP_WAKE_NFC_CFG Pad Control Register" bitfld.long 0x10 20.--24. " CFG2TMC_AP_WAKE_NFC_CFG_CAL_DRVUP ,CFG2TMC_AP_WAKE_NFC_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 12.--16. " CFG2TMC_AP_WAKE_NFC_CFG_CAL_DRVDN ,CFG2TMC_AP_WAKE_NFC_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "GP_AUD_MCLK_CFGPADCTRL_0,AUD_MCLK_CFG Pad Control Register" bitfld.long 0x14 20.--24. " CFG2TMC_AUD_MCLK_CFG_CAL_DRVUP ,CFG2TMC_AUD_MCLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 12.--16. " CFG2TMC_AUD_MCLK_CFG_CAL_DRVDN ,CFG2TMC_AUD_MCLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "GP_BATT_BCL_CFGPADCTRL_0,BATT_BCL_CFG Pad Control Register" bitfld.long 0x18 20.--24. " CFG2TMC_BATT_BCL_CFG_CAL_DRVUP ,CFG2TMC_BATT_BCL_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 12.--16. " CFG2TMC_BATT_BCL_CFG_CAL_DRVDN ,CFG2TMC_BATT_BCL_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "GP_BT_RST_CFGPADCTRL_0,BT_RST_CFG Pad Control Register" bitfld.long 0x1C 20.--24. " CFG2TMC_BT_RST_CFG_CAL_DRVUP ,CFG2TMC_BT_RST_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 12.--16. " CFG2TMC_BT_RST_CFG_CAL_DRVDN ,CFG2TMC_BT_RST_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "GP_BT_WAKE_AP_CFGPADCTRL_0,BT_WAKE_AP_CFG Pad Control Register" bitfld.long 0x20 20.--24. " CFG2TMC_BT_WAKE_AP_CFG_CAL_DRVUP ,CFG2TMC_BT_WAKE_AP_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 12.--16. " CFG2TMC_BT_WAKE_AP_CFG_CAL_DRVDN ,CFG2TMC_BT_WAKE_AP_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "GP_BUTTON_HOME_CFGPADCTRL_0,BT_WAKE_AP_CFG Pad Control Register" bitfld.long 0x24 20.--24. " CFG2TMC_BUTTON_HOME_CFG_CAL_DRVUP ,CFG2TMC_BUTTON_HOME_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 12.--16. " CFG2TMC_BUTTON_HOME_CFG_CAL_DRVDN ,CFG2TMC_BUTTON_HOME_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "GP_BUTTON_POWER_ON_CFGPADCTRL_0,BUTTON_POWER_ON_CFG Pad Control Register" bitfld.long 0x28 20.--24. " CFG2TMC_BUTTON_POWER_ON_CFG_CAL_DRVUP ,CFG2TMC_BUTTON_POWER_ON_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 12.--16. " CFG2TMC_BUTTON_POWER_ON_CFG_CAL_DRVDN ,CFG2TMC_BUTTON_POWER_ON_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "GP_BUTTON_SLIDE_SW_CFGPADCTRL_0,BUTTON_SLIDE_SW_CFG Pad Control Register" bitfld.long 0x2C 20.--24. " CFG2TMC_BUTTON_SLIDE_SW_CFG_CAL_DRVUP ,CFG2TMC_BUTTON_SLIDE_SW_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 12.--16. " CFG2TMC_BUTTON_SLIDE_SW_CFG_CAL_DRVDN ,CFG2TMC_BUTTON_SLIDE_SW_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "GP_BUTTON_VOL_DOWN_CFGPADCTRL_0,BUTTON_VOL_DOWN_CFG Pad Control Register" bitfld.long 0x30 20.--24. " CFG2TMC_BUTTON_VOL_DOWN_CFG_CAL_DRVUP ,CFG2TMC_BUTTON_VOL_DOWN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 12.--16. " CFG2TMC_BUTTON_VOL_DOWN_CFG_CAL_DRVDN ,CFG2TMC_BUTTON_VOL_DOWN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "GP_BUTTON_VOL_UP_CFGPADCTRL_0,BUTTON_VOL_UP_CFG Pad Control Register" bitfld.long 0x34 20.--24. " CFG2TMC_BUTTON_VOL_UP_CFG_CAL_DRVUP ,CFG2TMC_BUTTON_VOL_UP_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 12.--16. " CFG2TMC_BUTTON_VOL_UP_CFG_CAL_DRVDN ,CFG2TMC_BUTTON_VOL_UP_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "GP_CAM1_MCLK_CFGPADCTRL_0,CAM1_MCLK_CFG Pad Control Register" bitfld.long 0x38 20.--24. " CFG2TMC_CAM1_MCLK_CFG_CAL_DRVUP ,CFG2TMC_CAM1_MCLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 12.--16. " CFG2TMC_CAM1_MCLK_CFG_CAL_DRVDN ,CFG2TMC_CAM1_MCLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "GP_CAM1_PWDN_CFGPADCTRL_0,CAM1_PWDN_CFG Pad Control Register" bitfld.long 0x3C 20.--24. " CFG2TMC_CAM1_PWDN_CFG_CAL_DRVUP ,CFG2TMC_CAM1_PWDN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 12.--16. " CFG2TMC_CAM1_PWDN_CFG_CAL_DRVDN ,CFG2TMC_CAM1_PWDN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x40 "GP_CAM1_STROBE_CFGPADCTRL_0,CAM1_STROBE_CFG Pad Control Register" bitfld.long 0x40 20.--24. " CFG2TMC_CAM1_STROBE_CFG_CAL_DRVUP ,CFG2TMC_CAM1_STROBE_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 12.--16. " CFG2TMC_CAM1_STROBE_CFG_CAL_DRVDN ,CFG2TMC_CAM1_STROBE_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x44 "GP_CAM2_MCLK_CFGPADCTRL_0,CAM2_MCLK_CFG Pad Control Register" bitfld.long 0x44 20.--24. " CFG2TMC_CAM2_MCLK_CFG_CAL_DRVUP ,CFG2TMC_CAM2_MCLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 12.--16. " CFG2TMC_CAM2_MCLK_CFG_CAL_DRVDN ,CFG2TMC_CAM2_MCLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x48 "GP_CAM2_PWDN_CFGPADCTRL_0,CAM2_PWDN_CFG Pad Control Register" bitfld.long 0x48 20.--24. " CFG2TMC_CAM2_PWDN_CFG_CAL_DRVUP ,CFG2TMC_CAM2_PWDN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 12.--16. " CFG2TMC_CAM2_PWDN_CFG_CAL_DRVDN ,CFG2TMC_CAM2_PWDN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4C "GP_CAM_AF_EN_CFGPADCTRL_0,CAM_AF_EN_CFG Pad Control Register" bitfld.long 0x4C 20.--24. " CFG2TMC_CAM_AF_EN_CFG_CAL_DRVUP ,CFG2TMC_CAM_AF_EN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 12.--16. " CFG2TMC_CAM_AF_EN_CFG_CAL_DRVDN ,CFG2TMC_CAM_AF_EN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x50 "GP_CAM_FLASH_EN_CFGPADCTRL_0,CAM_FLASH_EN_CFG Pad Control Register" bitfld.long 0x50 20.--24. " CFG2TMC_CAM_FLASH_EN_CFG_CAL_DRVUP ,CFG2TMC_CAM_FLASH_EN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 12.--16. " CFG2TMC_CAM_FLASH_EN_CFG_CAL_DRVDN ,CFG2TMC_CAM_FLASH_EN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x54 "GP_CAM_I2C_SCL_CFGPADCTRL_0,CAM_I2C_SCL_CFG Pad Control Register" bitfld.long 0x54 20.--24. " CFG2TMC_CAM_I2C_SCL_CFG_CAL_DRVUP ,CFG2TMC_CAM_I2C_SCL_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 12.--16. " CFG2TMC_CAM_I2C_SCL_CFG_CAL_DRVDN ,CFG2TMC_CAM_I2C_SCL_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x58 "GP_CAM_I2C_SDA_CFGPADCTRL_0,CAM_I2C_SDA_CFG Pad Control Register" bitfld.long 0x58 20.--24. " CFG2TMC_CAM_I2C_SDA_CFG_CAL_DRVUP ,CFG2TMC_CAM_I2C_SDA_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 12.--16. " CFG2TMC_CAM_I2C_SDA_CFG_CAL_DRVDN ,CFG2TMC_CAM_I2C_SDA_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x5C "GP_CAM_RST_CFGPADCTRL_0,CAM_RST_CFG Pad Control Register" bitfld.long 0x5C 20.--24. " CFG2TMC_CAM_RST_CFG_CAL_DRVUP ,CFG2TMC_CAM_RST_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x5C 12.--16. " CFG2TMC_CAM_RST_CFG_CAL_DRVDN ,CFG2TMC_CAM_RST_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x60 "GP_CLK_32K_IN_CFGPADCTRL_0,CLK_32K_IN_CFG Pad Control Register" bitfld.long 0x60 20.--24. " CFG2TMC_CLK_32K_IN_CFG_CAL_DRVUP ,CFG2TMC_CLK_32K_IN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x60 12.--16. " CFG2TMC_CLK_32K_IN_CFG_CAL_DRVDN ,CFG2TMC_CLK_32K_IN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x64 "GP_CLK_32K_OUT_CFGPADCTRL_0,CLK_32K_OUT_CFG Pad Control Register" bitfld.long 0x64 20.--24. " CFG2TMC_CLK_32K_OUT_CFG_CAL_DRVUP ,CFG2TMC_CLK_32K_OUT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x64 12.--16. " CFG2TMC_CLK_32K_OUT_CFG_CAL_DRVDN ,CFG2TMC_CLK_32K_OUT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x68 "GP_CLK_REQ_CFGPADCTRL_0,CLK_REQ_CFG Pad Control Register" bitfld.long 0x68 20.--24. " CFG2TMC_CLK_REQ_CFG_CAL_DRVUP ,CFG2TMC_CLK_REQ_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x68 12.--16. " CFG2TMC_CLK_REQ_CFG_CAL_DRVDN ,CFG2TMC_CLK_REQ_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x6C "GP_CORE_PWR_REQ_CFGPADCTRL_0,CORE_PWR_REQ_CFG Pad Control Register" bitfld.long 0x6C 20.--24. " CFG2TMC_CORE_PWR_REQ_CFG_CAL_DRVUP ,CFG2TMC_CORE_PWR_REQ_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x6C 12.--16. " CFG2TMC_CORE_PWR_REQ_CFG_CAL_DRVDN ,CFG2TMC_CORE_PWR_REQ_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x70 "GP_CPU_PWR_REQ_CFGPADCTRL_0,CPU_PWR_REQ_CFG Pad Control Register" bitfld.long 0x70 20.--24. " CFG2TMC_CPU_PWR_REQ_CFG_CAL_DRVUP ,CFG2TMC_CPU_PWR_REQ_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x70 12.--16. " CFG2TMC_CPU_PWR_REQ_CFG_CAL_DRVDN ,CFG2TMC_CPU_PWR_REQ_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x74 "GP_DAP1_DIN_CFGPADCTRL_0,DAP1_DIN_CFG Pad Control Register" bitfld.long 0x74 20.--24. " CFG2TMC_DAP1_DIN_CFG_CAL_DRVUP_SLWF ,CFG2TMC_DAP1_DIN_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x74 12.--16. " CFG2TMC_DAP1_DIN_CFG_CAL_DRVDN_SLWR ,CFG2TMC_DAP1_DIN_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x78 "GP_DAP1_DOUT_CFGPADCTRL_0,DAP1_DOUT_CFG Pad Control Register" bitfld.long 0x78 20.--24. " CFG2TMC_DAP1_DOUT_CFG_CAL_DRVUP_SLWF ,CFG2TMC_DAP1_DOUT_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x78 12.--16. " CFG2TMC_DAP1_DOUT_CFG_CAL_DRVDN_SLWR ,CFG2TMC_DAP1_DOUT_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x7C "GP_DAP1_FS_CFGPADCTRL_0,DAP1_FS_CFG Pad Control Register" bitfld.long 0x7C 20.--24. " CFG2TMC_DAP1_FS_CFG_CAL_DRVUP_SLWF ,CFG2TMC_DAP1_FS_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x7C 12.--16. " CFG2TMC_DAP1_FS_CFG_CAL_DRVDN_SLWR ,CFG2TMC_DAP1_FS_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x80 "GP_DAP1_SCLK_CFGPADCTRL_0,DAP1_SCLK_CFG Pad Control Register" bitfld.long 0x80 20.--24. " CFG2TMC_DAP1_SCLK_CFG_CAL_DRVUP_SLWF ,CFG2TMC_DAP1_SCLK_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x80 12.--16. " CFG2TMC_DAP1_SCLK_CFG_CAL_DRVDN_SLWR ,CFG2TMC_DAP1_SCLK_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x84 "GP_DAP2_DIN_CFGPADCTRL_0,DAP2_DIN_CFG Pad Control Register" bitfld.long 0x84 20.--24. " CFG2TMC_DAP2_DIN_CFG_CAL_DRVUP_SLWF ,CFG2TMC_DAP2_DIN_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x84 12.--16. " CFG2TMC_DAP2_DIN_CFG_CAL_DRVDN_SLWR ,CFG2TMC_DAP2_DIN_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x88 "GP_DAP2_DOUT_CFGPADCTRL_0,DAP2_DOUT_CFG Pad Control Register" bitfld.long 0x88 20.--24. " CFG2TMC_DAP2_DOUT_CFG_CAL_DRVUP_SLWF ,CFG2TMC_DAP2_DOUT_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x88 12.--16. " CFG2TMC_DAP2_DOUT_CFG_CAL_DRVDN_SLWR ,CFG2TMC_DAP2_DOUT_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x8C "GP_DAP2_FS_CFGPADCTRL_0,DAP2_FS_CFG Pad Control Register" bitfld.long 0x8C 20.--24. " CFG2TMC_DAP2_FS_CFG_CAL_DRVUP_SLWF ,CFG2TMC_DAP2_FS_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x8C 12.--16. " CFG2TMC_DAP2_FS_CFG_CAL_DRVDN_SLWR ,CFG2TMC_DAP2_FS_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x90 "GP_DAP2_SCLK_CFGPADCTRL_0,DAP2_SCLK_CFG Pad Control Register" bitfld.long 0x90 20.--24. " CFG2TMC_DAP2_SCLK_CFG_CAL_DRVUP_SLWF ,CFG2TMC_DAP2_SCLK_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x90 12.--16. " CFG2TMC_DAP2_SCLK_CFG_CAL_DRVDN_SLWR ,CFG2TMC_DAP2_SCLK_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x94 "GP_DAP4_DIN_CFGPADCTRL_0,DAP4_DIN_CFG Pad Control Register" bitfld.long 0x94 20.--24. " CFG2TMC_DAP4_DIN_CFG_CAL_DRVUP ,CFG2TMC_DAP4_DIN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x94 12.--16. " CFG2TMC_DAP4_DIN_CFG_CAL_DRVDN ,CFG2TMC_DAP4_DIN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x98 "GP_DAP4_DOUT_CFGPADCTRL_0,DAP4_DOUT_CFG Pad Control Register" bitfld.long 0x98 20.--24. " CFG2TMC_DAP4_DOUT_CFG_CAL_DRVUP ,CFG2TMC_DAP4_DOUT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x98 12.--16. " CFG2TMC_DAP4_DOUT_CFG_CAL_DRVDN ,CFG2TMC_DAP4_DOUT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x9C "GP_DAP4_FS_CFGPADCTRL_0,DAP4_FS_CFG Pad Control Register" bitfld.long 0x9C 20.--24. " CFG2TMC_DAP4_FS_CFG_CAL_DRVUP ,CFG2TMC_DAP4_FS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x9C 12.--16. " CFG2TMC_DAP4_FS_CFG_CAL_DRVDN ,CFG2TMC_DAP4_FS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xA0 "GP_DAP4_SCLK_CFGPADCTRL_0,DAP4_SCLK_CFG Pad Control Register" bitfld.long 0xA0 20.--24. " CFG2TMC_DAP4_SCLK_CFG_CAL_DRVUP ,CFG2TMC_DAP4_SCLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xA0 12.--16. " CFG2TMC_DAP4_SCLK_CFG_CAL_DRVDN ,CFG2TMC_DAP4_SCLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xA4 "GP_DMIC1_CLK_CFGPADCTRL_0,DMIC1_CLK_CFG Pad Control Register" bitfld.long 0xA4 20.--24. " CFG2TMC_DMIC1_CLK_CFG_CAL_DRVUP ,CFG2TMC_DMIC1_CLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xA4 12.--16. " CFG2TMC_DMIC1_CLK_CFG_CAL_DRVDN ,CFG2TMC_DMIC1_CLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xA8 "GP_DMIC1_DAT_CFGPADCTRL_0,DMIC1_DAT_CFG Pad Control Register" bitfld.long 0xA8 20.--24. " CFG2TMC_DMIC1_DAT_CFG_CAL_DRVUP ,CFG2TMC_DMIC1_DAT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xA8 12.--16. " CFG2TMC_DMIC1_DAT_CFG_CAL_DRVDN ,CFG2TMC_DMIC1_DAT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xAC "GP_DMIC2_CLK_CFGPADCTRL_0,DMIC2_CLK_CFG Pad Control Register" bitfld.long 0xAC 20.--24. " CFG2TMC_DMIC2_CLK_CFG_CAL_DRVUP ,CFG2TMC_DMIC2_CLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xAC 12.--16. " CFG2TMC_DMIC2_CLK_CFG_CAL_DRVDN ,CFG2TMC_DMIC2_CLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xB0 "GP_DMIC2_DAT_CFGPADCTRL_0,DMIC2_DAT_CFG Pad Control Register" bitfld.long 0xB0 20.--24. " CFG2TMC_DMIC2_DAT_CFG_CAL_DRVUP ,CFG2TMC_DMIC2_DAT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xB0 12.--16. " CFG2TMC_DMIC2_DAT_CFG_CAL_DRVDN ,CFG2TMC_DMIC2_DAT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xB4 "GP_DMIC3_CLK_CFGPADCTRL_0,DMIC3_CLK_CFG Pad Control Register" bitfld.long 0xB4 20.--24. " CFG2TMC_DMIC3_CLK_CFG_CAL_DRVUP ,CFG2TMC_DMIC3_CLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xB4 12.--16. " CFG2TMC_DMIC3_CLK_CFG_CAL_DRVDN ,CFG2TMC_DMIC3_CLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xB8 "GP_DMIC3_DAT_CFGPADCTRL_0,DMIC3_DAT_CFG Pad Control Register" bitfld.long 0xB8 20.--24. " CFG2TMC_DMIC3_DAT_CFG_CAL_DRVUP ,CFG2TMC_DMIC3_DAT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xB8 12.--16. " CFG2TMC_DMIC3_DAT_CFG_CAL_DRVDN ,CFG2TMC_DMIC3_DAT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xBC "GP_DP_HPD_CFGPADCTRL_0,DP_HPD_CFG Pad Control Register" bitfld.long 0xBC 20.--24. " CFG2TMC_DP_HPD0_CFG_CAL_DRVUP ,CFG2TMC_DP_HPD0_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xBC 12.--16. " CFG2TMC_DP_HPD0_CFG_CAL_DRVDN ,CFG2TMC_DP_HPD0_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xC0 "GP_DVFS_CLK_CFGPADCTRL_0,DVFS_CLK_CFG Pad Control Register" bitfld.long 0xC0 20.--24. " CFG2TMC_DVFS_CLK_CFG_CAL_DRVUP ,CFG2TMC_DVFS_CLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xC0 12.--16. " CFG2TMC_DVFS_CLK_CFG_CAL_DRVDN ,CFG2TMC_DVFS_CLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xC4 "GP_DVFS_PWM_CFGPADCTRL_0,DVFS_PWM_CFG Pad Control Register" bitfld.long 0xC4 20.--24. " CFG2TMC_DVFS_PWM_CFG_CAL_DRVUP ,CFG2TMC_DVFS_PWM_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xC4 12.--16. " CFG2TMC_DVFS_PWM_CFG_CAL_DRVDN ,CFG2TMC_DVFS_PWM_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xC8 "GP_GEN1_I2C_SCL_CFGPADCTRL_0,GEN1_I2C_SCL_CFG Pad Control Register" bitfld.long 0xC8 20.--24. " CFG2TMC_GEN1_I2C_SCL_CFG_CAL_DRVUP ,CFG2TMC_GEN1_I2C_SCL_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xC8 12.--16. " CFG2TMC_GEN1_I2C_SCL_CFG_CAL_DRVDN ,CFG2TMC_GEN1_I2C_SCL_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xCC "GP_GEN1_I2C_SDA_CFGPADCTRL_0,GEN1_I2C_SDA_CFG Pad Control Register" bitfld.long 0xCC 20.--24. " CFG2TMC_GEN1_I2C_SDA_CFG_CAL_DRVUP ,CFG2TMC_GEN1_I2C_SDA_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xCC 12.--16. " CFG2TMC_GEN1_I2C_SDA_CFG_CAL_DRVDN ,CFG2TMC_GEN1_I2C_SDA_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xD0 "GP_GEN2_I2C_SCL_CFGPADCTRL_0,GEN2_I2C_SCL_CFG Pad Control Register" bitfld.long 0xD0 20.--24. " CFG2TMC_GEN2_I2C_SCL_CFG_CAL_DRVUP ,CFG2TMC_GEN2_I2C_SCL_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xD0 12.--16. " CFG2TMC_GEN2_I2C_SCL_CFG_CAL_DRVDN ,CFG2TMC_GEN2_I2C_SCL_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xD4 "GP_GEN2_I2C_SDA_CFGPADCTRL_0,GEN2_I2C_SDA_CFG Pad Control Register" bitfld.long 0xD4 20.--24. " CFG2TMC_GEN2_I2C_SDA_CFG_CAL_DRVUP ,CFG2TMC_GEN2_I2C_SDA_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xD4 12.--16. " CFG2TMC_GEN2_I2C_SDA_CFG_CAL_DRVDN ,CFG2TMC_GEN2_I2C_SDA_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xD8 "GP_GEN3_I2C_SCL_CFGPADCTRL_0,GEN3_I2C_SCL_CFG Pad Control Register" bitfld.long 0xD8 20.--24. " CFG2TMC_GEN3_I2C_SCL_CFG_CAL_DRVUP ,CFG2TMC_GEN3_I2C_SCL_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xD8 12.--16. " CFG2TMC_GEN3_I2C_SCL_CFG_CAL_DRVDN ,CFG2TMC_GEN3_I2C_SCL_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xDC "GP_GEN3_I2C_SDA_CFGPADCTRL_0,GEN3_I2C_SDA_CFG Pad Control Register" bitfld.long 0xDC 20.--24. " CFG2TMC_GEN3_I2C_SDA_CFG_CAL_DRVUP ,CFG2TMC_GEN3_I2C_SDA_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xDC 12.--16. " CFG2TMC_GEN3_I2C_SDA_CFG_CAL_DRVDN ,CFG2TMC_GEN3_I2C_SDA_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xE0 "GP_GPIO_PA6_CFGPADCTRL_0,GPIO_PA6_CFG Pad Control Register" bitfld.long 0xE0 20.--24. " CFG2TMC_GPIO_PA6_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PA6_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xE0 12.--16. " CFG2TMC_GPIO_PA6_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PA6_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xE4 "GP_GPIO_PCC7_CFGPADCTRL_0,GPIO_PCC7_CFG Pad Control Register" bitfld.long 0xE4 20.--24. " CFG2TMC_GPIO_PCC7_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PCC7_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xE4 12.--16. " CFG2TMC_GPIO_PCC7_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PCC7_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xE8 "GP_GPIO_PE6_CFGPADCTRL_0,GPIO_PE6_CFG Pad Control Register" bitfld.long 0xE8 20.--24. " CFG2TMC_GPIO_PE6_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PE6_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xE8 12.--16. " CFG2TMC_GPIO_PE6_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PE6_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xEC "GP_GPIO_PE7_CFGPADCTRL_0,GPIO_PE7_CFG Pad Control Register" bitfld.long 0xEC 20.--24. " CFG2TMC_GPIO_PE7_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PE7_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xEC 12.--16. " CFG2TMC_GPIO_PE7_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PE7_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xF0 "GP_GPIO_PH6_CFGPADCTRL_0,GPIO_PH6_CFG Pad Control Register" bitfld.long 0xF0 20.--24. " CFG2TMC_GPIO_PH6_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PH6_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xF0 12.--16. " CFG2TMC_GPIO_PH6_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PH6_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xF4 "GP_GPIO_PK0_CFGPADCTRL_0,GPIO_PK0_CFG Pad Control Register" bitfld.long 0xF4 20.--24. " CFG2TMC_GPIO_PK0_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PK0_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xF4 12.--16. " CFG2TMC_GPIO_PK0_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PK0_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xF8 "GP_GPIO_PK1_CFGPADCTRL_0,GPIO_PK1_CFG Pad Control Register" bitfld.long 0xF8 20.--24. " CFG2TMC_GPIO_PK1_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PK1_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xF8 12.--16. " CFG2TMC_GPIO_PK1_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PK1_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xFC "GP_GPIO_PK2_CFGPADCTRL_0,GPIO_PK2_CFG Pad Control Register" bitfld.long 0xFC 20.--24. " CFG2TMC_GPIO_PK2_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PK2_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xFC 12.--16. " CFG2TMC_GPIO_PK2_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PK2_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x100 "GP_GPIO_PK3_CFGPADCTRL_0,GPIO_PK3_CFG Pad Control Register" bitfld.long 0x100 20.--24. " CFG2TMC_GPIO_PK3_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PK3_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x100 12.--16. " CFG2TMC_GPIO_PK3_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PK3_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x104 "GP_GPIO_PK4_CFGPADCTRL_0,GPIO_PK4_CFG Pad Control Register" bitfld.long 0x104 20.--24. " CFG2TMC_GPIO_PK4_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PK4_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x104 12.--16. " CFG2TMC_GPIO_PK4_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PK4_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x108 "GP_GPIO_PK5_CFGPADCTRL_0,GPIO_PK5_CFG Pad Control Register" bitfld.long 0x108 20.--24. " CFG2TMC_GPIO_PK5_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PK5_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x108 12.--16. " CFG2TMC_GPIO_PK5_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PK5_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10C "GP_GPIO_PK6_CFGPADCTRL_0,GPIO_PK6_CFG Pad Control Register" bitfld.long 0x10C 20.--24. " CFG2TMC_GPIO_PK6_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PK6_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10C 12.--16. " CFG2TMC_GPIO_PK6_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PK6_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x110 "GP_GPIO_PK7_CFGPADCTRL_0,GPIO_PK7_CFG Pad Control Register" bitfld.long 0x110 20.--24. " CFG2TMC_GPIO_PK7_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PK7_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x110 12.--16. " CFG2TMC_GPIO_PK7_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PK7_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x114 "GP_GPIO_PL0_CFGPADCTRL_0,GPIO_PL0_CFG Pad Control Register" bitfld.long 0x114 20.--24. " CFG2TMC_GPIO_PL0_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PL0_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x114 12.--16. " CFG2TMC_GPIO_PL0_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PL0_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x118 "GP_GPIO_PL1_CFGPADCTRL_0,GPIO_PL1_CFG Pad Control Register" bitfld.long 0x118 20.--24. " CFG2TMC_GPIO_PL1_CFG_CAL_DRVUP_SLWF ,CFG2TMC_GPIO_PL1_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x118 12.--16. " CFG2TMC_GPIO_PL1_CFG_CAL_DRVDN_SLWR ,CFG2TMC_GPIO_PL1_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x11C "GP_GPIO_PZ0_CFGPADCTRL_0,GPIO_PZ0_CFG Pad Control Register" bitfld.long 0x11C 20.--24. " CFG2TMC_GPIO_PZ0_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PZ0_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x11C 12.--16. " CFG2TMC_GPIO_PZ0_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PZ0_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x120 "GP_GPIO_PZ1_CFGPADCTRL_0,GPIO_PZ1_CFG Pad Control Register" bitfld.long 0x120 20.--24. " CFG2TMC_GPIO_PZ1_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PZ1_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x120 12.--16. " CFG2TMC_GPIO_PZ1_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PZ1_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x124 "GP_GPIO_PZ2_CFGPADCTRL_0,GPIO_PZ2_CFG Pad Control Register" bitfld.long 0x124 20.--24. " CFG2TMC_GPIO_PZ2_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PZ2_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x124 12.--16. " CFG2TMC_GPIO_PZ2_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PZ2_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x128 "GP_GPIO_PZ3_CFGPADCTRL_0,GPIO_PZ3_CFG Pad Control Register" bitfld.long 0x128 20.--24. " CFG2TMC_GPIO_PZ3_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PZ3_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x128 12.--16. " CFG2TMC_GPIO_PZ3_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PZ3_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x12C "GP_GPIO_PZ4_CFGPADCTRL_0,GPIO_PZ4_CFG Pad Control Register" bitfld.long 0x12C 20.--24. " CFG2TMC_GPIO_PZ4_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PZ4_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x12C 12.--16. " CFG2TMC_GPIO_PZ4_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PZ4_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x130 "GP_GPIO_PZ5_CFGPADCTRL_0,GPIO_PZ5_CFG Pad Control Register" bitfld.long 0x130 20.--24. " CFG2TMC_GPIO_PZ5_CFG_CAL_DRVUP ,CFG2TMC_GPIO_PZ5_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x130 12.--16. " CFG2TMC_GPIO_PZ5_CFG_CAL_DRVDN ,CFG2TMC_GPIO_PZ5_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x134 "GP_GPIO_X1_AUD_CFGPADCTRL_0,GPIO_X1_AUD_CFG Pad Control Register" bitfld.long 0x134 20.--24. " CFG2TMC_GPIO_X1_AUD_CFG_CAL_DRVUP ,CFG2TMC_GPIO_X1_AUD_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x134 12.--16. " CFG2TMC_GPIO_X1_AUD_CFG_CAL_DRVDN ,CFG2TMC_GPIO_X1_AUD_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x138 "GP_GPIO_X3_AUD_CFGPADCTRL_0,GPIO_X1_AUD_CFG Pad Control Register" bitfld.long 0x138 20.--24. " CFG2TMC_GPIO_X1_AUD_CFG_CAL_DRVUP ,CFG2TMC_GPIO_X1_AUD_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x138 12.--16. " CFG2TMC_GPIO_X3_AUD_CFG_CAL_DRVDN ,CFG2TMC_GPIO_X3_AUD_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x13C "GP_GPS_EN_CFGPADCTRL_0,GPS_EN_CFG Pad Control Register" bitfld.long 0x13C 20.--24. " CFG2TMC_GPS_EN_CFG_CAL_DRVUP ,CFG2TMC_GPS_EN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x13C 12.--16. " CFG2TMC_GPS_EN_CFG_CAL_DRVDN ,CFG2TMC_GPS_EN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x140 "GP_GPS_RST_CFGPADCTRL_0,GPS_RST_CFG Pad Control Register" bitfld.long 0x140 20.--24. " CFG2TMC_GPS_RST_CFG_CAL_DRVUP ,CFG2TMC_GPS_RST_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x140 12.--16. " CFG2TMC_GPS_RST_CFG_CAL_DRVDN ,CFG2TMC_GPS_RST_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x144 "GP_HDMI_CEC_CFGPADCTRL_0,HDMI_CEC_CFG Pad Control Register" bitfld.long 0x144 20.--24. " CFG2TMC_HDMI_CEC_CFG_CAL_DRVUP ,CFG2TMC_HDMI_CEC_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x144 12.--16. " CFG2TMC_HDMI_CEC_CFG_CAL_DRVDN ,CFG2TMC_HDMI_CEC_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x148 "GP_HDMI_INT_DP_HPD_CFGPADCTRL_0,HDMI_INT_DP_HPD_CFG Pad Control Register" bitfld.long 0x148 20.--24. " CFG2TMC_HDMI_INT_DP_HPD_CFG_CAL_DRVUP ,CFG2TMC_HDMI_INT_DP_HPD_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x148 12.--16. " CFG2TMC_HDMI_INT_DP_HPD_CFG_CAL_DRVDN ,CFG2TMC_HDMI_INT_DP_HPD_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14C "GP_JTAG_RTCK_CFGPADCTRL_0,JTAG_RTCK_CFG Pad Control Register" bitfld.long 0x14C 20.--24. " CFG2TMC_JTAG_RTCK_CFG_CAL_DRVUP ,CFG2TMC_JTAG_RTCK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14C 12.--16. " CFG2TMC_JTAG_RTCK_CFG_CAL_DRVDN ,CFG2TMC_JTAG_RTCK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x150 "GP_LCD_BL_EN_CFGPADCTRL_0,LCD_BL_EN_CFG Pad Control Register" bitfld.long 0x150 20.--24. " CFG2TMC_LCD_BL_EN_CFG_CAL_DRVUP ,CFG2TMC_LCD_BL_EN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x150 12.--16. " CFG2TMC_LCD_BL_EN_CFG_CAL_DRVDN ,CFG2TMC_LCD_BL_EN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x154 "GP_LCD_BL_PWM_CFGPADCTRL_0,LCD_BL_PWM_CFG Pad Control Register" bitfld.long 0x154 20.--24. " CFG2TMC_LCD_BL_PWM_CFG_CAL_DRVUP ,CFG2TMC_LCD_BL_PWM_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x154 12.--16. " CFG2TMC_LCD_BL_PWM_CFG_CAL_DRVDN ,CFG2TMC_LCD_BL_PWM_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x158 "GP_LCD_GPIO1_CFGPADCTRL_0,LCD_GPIO1_CFG Pad Control Register" bitfld.long 0x158 20.--24. " CFG2TMC_LCD_GPIO1_CFG_CAL_DRVUP ,CFG2TMC_LCD_GPIO1_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x158 12.--16. " CFG2TMC_LCD_GPIO1_CFG_CAL_DRVDN ,CFG2TMC_LCD_GPIO1_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x15C "GP_LCD_GPIO2_CFGPADCTRL_0,LCD_GPIO2_CFG Pad Control Register" bitfld.long 0x15C 20.--24. " CFG2TMC_LCD_GPIO2_CFG_CAL_DRVUP ,CFG2TMC_LCD_GPIO2_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x15C 12.--16. " CFG2TMC_LCD_GPIO2_CFG_CAL_DRVDN ,CFG2TMC_LCD_GPIO2_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x160 "GP_LCD_RST_CFGPADCTRL_0,LCD_RST_CFG Pad Control Register" bitfld.long 0x160 20.--24. " CFG2TMC_LCD_RST_CFG_CAL_DRVUP ,CFG2TMC_LCD_RST_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x160 12.--16. " CFG2TMC_LCD_RST_CFG_CAL_DRVDN ,CFG2TMC_LCD_RST_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x164 "GP_LCD_TE_CFGPADCTRL_0,LCD_TE_CFG Pad Control Register" bitfld.long 0x164 20.--24. " CFG2TMC_LCD_TE_CFG_CAL_DRVUP ,CFG2TMC_LCD_TE_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x164 12.--16. " CFG2TMC_LCD_TE_CFG_CAL_DRVDN ,CFG2TMC_LCD_TE_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x168 "GP_MODEM_WAKE_AP_CFGPADCTRL_0,MODEM_WAKE_AP_CFG Pad Control Register" bitfld.long 0x168 20.--24. " CFG2TMC_MODEM_WAKE_AP_CFG_CAL_DRVUP ,CFG2TMC_MODEM_WAKE_AP_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x168 12.--16. " CFG2TMC_MODEM_WAKE_AP_CFG_CAL_DRVDN ,CFG2TMC_MODEM_WAKE_AP_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x16C "GP_MOTION_INT_CFGPADCTRL_0,MOTION_INT_CFG Pad Control Register" bitfld.long 0x16C 20.--24. " CFG2TMC_MOTION_INT_CFG_CAL_DRVUP ,CFG2TMC_MOTION_INT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x16C 12.--16. " CFG2TMC_MOTION_INT_CFG_CAL_DRVDN ,CFG2TMC_MOTION_INT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x170 "GP_NFC_EN_CFGPADCTRL_0,NFC_EN_CFG Pad Control Register" bitfld.long 0x170 20.--24. " CFG2TMC_NFC_EN_CFG_CAL_DRVUP ,CFG2TMC_NFC_EN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x170 12.--16. " CFG2TMC_NFC_EN_CFG_CAL_DRVDN ,CFG2TMC_NFC_EN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x174 "GP_NFC_INT_CFGPADCTRL_0,NFC_INT_CFG Pad Control Register" bitfld.long 0x174 20.--24. " CFG2TMC_NFC_INT_CFG_CAL_DRVUP ,CFG2TMC_NFC_INT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x174 12.--16. " CFG2TMC_NFC_INT_CFG_CAL_DRVDN ,CFG2TMC_NFC_INT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x178 "GP_PEX_L0_CLKREQ_N_CFGPADCTRL_0,PEX_L0_CLKREQ_N_CFG Pad Control Register" bitfld.long 0x178 20.--24. " CFG2TMC_PEX_L0_CLKREQ_N_CFG_CAL_DRVUP ,CFG2TMC_PEX_L0_CLKREQ_N_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x178 12.--16. " CFG2TMC_PEX_L0_CLKREQ_N_CFG_CAL_DRVDN ,CFG2TMC_PEX_L0_CLKREQ_N_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x17C "GP_PEX_L0_RST_N_CFGPADCTRL_0,PEX_L0_RST_N_CFG Pad Control Register" bitfld.long 0x17C 20.--24. " CFG2TMC_PEX_L0_RST_N_CFG_CAL_DRVUP ,CFG2TMC_PEX_L0_RST_N_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x17C 12.--16. " CFG2TMC_PEX_L0_RST_N_CFG_CAL_DRVDN ,CFG2TMC_PEX_L0_RST_N_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x180 "GP_PEX_L1_CLKREQ_N_CFGPADCTRL_0,PEX_L1_CLKREQ_N_CFG Pad Control Register" bitfld.long 0x180 20.--24. " CFG2TMC_PEX_L1_CLKREQ_N_CFG_CAL_DRVUP ,CFG2TMC_PEX_L1_CLKREQ_N_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x180 12.--16. " CFG2TMC_PEX_L1_CLKREQ_N_CFG_CAL_DRVDN ,CFG2TMC_PEX_L1_CLKREQ_N_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x184 "GP_PEX_L1_RST_N_CFGPADCTRL_0,PEX_L1_RST_N_CFG Pad Control Register" bitfld.long 0x184 20.--24. " CFG2TMC_PEX_L1_RST_N_CFG_CAL_DRVUP ,CFG2TMC_PEX_L1_RST_N_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x184 12.--16. " CFG2TMC_PEX_L1_RST_N_CFG_CAL_DRVDN ,CFG2TMC_PEX_L1_RST_N_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x188 "GP_PEX_WAKE_N_CFGPADCTRL_0,PEX_WAKE_N_CFG Pad Control Register" bitfld.long 0x188 20.--24. " CFG2TMC_PEX_WAKE_N_CFG_CAL_DRVUP ,CFG2TMC_PEX_WAKE_N_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x188 12.--16. " CFG2TMC_PEX_WAKE_N_CFG_CAL_DRVDN ,CFG2TMC_PEX_WAKE_N_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18C "GP_PWR_I2C_SCL_CFGPADCTRL_0,PWR_I2C_SCL_CFG Pad Control Register" bitfld.long 0x18C 20.--24. " CFG2TMC_PWR_I2C_SCL_CFG_CAL_DRVUP ,CFG2TMC_PWR_I2C_SCL_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18C 12.--16. " CFG2TMC_PWR_I2C_SCL_CFG_CAL_DRVDN ,CFG2TMC_PWR_I2C_SCL_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x190 "GP_PWR_I2C_SDA_CFGPADCTRL_0,PWR_I2C_SDA_CFG Pad Control Register" bitfld.long 0x190 20.--24. " CFG2TMC_PWR_I2C_SDA_CFG_CAL_DRVUP ,CFG2TMC_PWR_I2C_SDA_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x190 12.--16. " CFG2TMC_PWR_I2C_SDA_CFG_CAL_DRVDN ,CFG2TMC_PWR_I2C_SDA_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x194 "GP_PWR_INT_N_CFGPADCTRL_0,PWR_INT_N_CFG Pad Control Register" bitfld.long 0x194 20.--24. " CFG2TMC_PWR_INT_N_CFG_CAL_DRVUP ,CFG2TMC_PWR_INT_N_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x194 12.--16. " CFG2TMC_PWR_INT_N_CFG_CAL_DRVDN ,CFG2TMC_PWR_INT_N_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x198 "GP_QSPI_COMP_CFGPADCTRL_0,QSPI_COMP_CFG Pad Control Register" bitfld.long 0x198 20.--24. " CFG2TMC_QSPI_COMP_CFG_CAL_DRVUP ,CFG2TMC_QSPI_COMP_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x198 12.--16. " CFG2TMC_QSPI_COMP_CFG_CAL_DRVDN ,CFG2TMC_QSPI_COMP_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xA90++0x17 line.long 0x00 "GP_QSPI_SCK_CFGPADCTRL_0,QSPI_SCK_CFG Pad Control Register" bitfld.long 0x00 20.--24. " CFG2TMC_QSPI_SCK_CFG_CAL_DRVUP_SLWF ,CFG2TMC_QSPI_SCK_CFG_CAL_DRVUP_SLWF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12.--16. " CFG2TMC_QSPI_SCK_CFG_CAL_DRVDN_SLWR ,CFG2TMC_QSPI_SCK_CFG_CAL_DRVDN_SLWR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "GP_SATA_LED_ACTIVE_CFGPADCTRL_0,SATA_LED_ACTIVE_CFG Pad Control Register" bitfld.long 0x04 20.--24. " CFG2TMC_SATA_LED_ACTIVE_CFG_CAL_DRVUP ,CFG2TMC_SATA_LED_ACTIVE_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 12.--16. " CFG2TMC_SATA_LED_ACTIVE_CFG_CAL_DRVDN ,CFG2TMC_SATA_LED_ACTIVE_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "GP_SDMMC1_PAD_CFGPADCTRL_0,SDMMC1_PAD_CFG Pad Control Register" bitfld.long 0x08 30.--31. " CFG2TMC_SDMMC1_CLK_CFG_CAL_DRVUP_SLWF ,SlewF code override" "0,1,2,3" bitfld.long 0x08 28.--29. " CFG2TMC_SDMMC1_CLK_CFG_CAL_DRVDN_SLWR ,SlewR code override" "0,1,2,3" textline " " hexmask.long.byte 0x08 20.--26. 1. " CFG2TMC_SDMMC1_PAD_CAL_DRVUP ,3.3V 50ohm driver" hexmask.long.byte 0x08 12.--18. 1. " CFG2TMC_SDMMC1_PAD_CAL_DRVDN ,3.3V 50ohm driver" line.long 0x0C "GP_EMMC2_PAD_CFGPADCTRL_0,EMMC2_PAD_E_CFG Pad Control Register" bitfld.long 0x0C 30.--31. " CFG2TMC_EMMC2_PAD_DRVUP_SLWF ,SLWF code for CLK pad of emmc2 iobrick" "0,1,2,3" bitfld.long 0x0C 28.--29. " CFG2TMC_EMMC2_PAD_DRVDN_SLWR ,SLWR code for CLK pad of emmc2 iobrick" "0,1,2,3" textline " " bitfld.long 0x0C 26. " MISC2PMC_EMMC2_DAT7_PARK ,MISC2PMC_EMMC2_DAT7_PARK" "Normal,Parked" bitfld.long 0x0C 25. " MISC2PMC_EMMC2_DAT6_PARK ,MISC2PMC_EMMC2_DAT6_PARK" "Normal,Parked" textline " " bitfld.long 0x0C 24. " MISC2PMC_EMMC2_DAT5_PARK ,MISC2PMC_EMMC2_DAT5_PARK" "Normal,Parked" bitfld.long 0x0C 23. " MISC2PMC_EMMC2_DAT4_PARK ,MISC2PMC_EMMC2_DAT4_PARK" "Normal,Parked" textline " " bitfld.long 0x0C 22. " MISC2PMC_EMMC2_DAT3_PARK ,MISC2PMC_EMMC2_DAT3_PARK" "Normal,Parked" bitfld.long 0x0C 21. " MISC2PMC_EMMC2_DAT2_PARK ,MISC2PMC_EMMC2_DAT2_PARK" "Normal,Parked" textline " " bitfld.long 0x0C 20. " MISC2PMC_EMMC2_DAT1_PARK ,MISC2PMC_EMMC2_DAT1_PARK" "Normal,Parked" bitfld.long 0x0C 19. " MISC2PMC_EMMC2_DAT0_PARK ,MISC2PMC_EMMC2_DAT0_PARK" "Normal,Parked" textline " " bitfld.long 0x0C 18. " MISC2PMC_EMMC2_CMD_PARK ,MISC2PMC_EMMC2_CMD_PARK" "Normal,Parked" bitfld.long 0x0C 17. " MISC2PMC_EMMC2_DQSB_PARK ,MISC2PMC_EMMC2_DQSB_PARK" "Normal,Parked" textline " " bitfld.long 0x0C 16. " MISC2PMC_EMMC2_DQS_PARK ,MISC2PMC_EMMC2_DQS_PARK" "Normal,Parked" bitfld.long 0x0C 15. " MISC2PMC_EMMC2_CLKB_PARK ,MISC2PMC_EMMC2_CLKB_PARK" "Normal,Parked" textline " " bitfld.long 0x0C 14. " MISC2PMC_EMMC2_CLK_PARK ,MISC2PMC_EMMC2_CLK_PARK" "Normal,Parked" bitfld.long 0x0C 8.--13. " CFG2TMC_EMMC2_PAD_DRVUP_COMP ,DRVUP code for CLK/DAT/CMD pads in emmc2 iobrick" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 2.--7. " CFG2TMC_EMMC2_PAD_DRVDN_COMP ,DRVDN code for CLK/DAT/CMD pads in emmc2 iobrick" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 1. " CFG2TMC_EMMC2_PAD_E_PREEMP ,Enables pre-emphasis circuit in emmc2 iobrick" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " CFG2TMC_EMMC2_PAD_E_SCH ,Enables Schmitt trigger in emmc2 iobrick" "Disabled,Enabled" line.long 0x10 "GP_EMMC2_PAD_DRV_TYPE_CFGPADCTRL_0,EMMC2_PAD_DRV_TYPE_CFG Pad Control Register" bitfld.long 0x10 20.--21. " CFG2TMC_EMMC2_PAD_D7_DRV_TYPE ,Selects driver type for DAT7 pad" "0,1,2,3" bitfld.long 0x10 18.--19. " CFG2TMC_EMMC2_PAD_D6_DRV_TYPE ,Selects driver type for DAT6 pad" "0,1,2,3" textline " " bitfld.long 0x10 16.--17. " CFG2TMC_EMMC2_PAD_D5_DRV_TYPE ,Selects driver type for DAT5 pad" "0,1,2,3" bitfld.long 0x10 14.--15. " CFG2TMC_EMMC2_PAD_D4_DRV_TYPE ,Selects driver type for DAT4 pad" "0,1,2,3" textline " " bitfld.long 0x10 12.--13. " CFG2TMC_EMMC2_PAD_D3_DRV_TYPE ,Selects driver type for DAT3 pad" "0,1,2,3" bitfld.long 0x10 10.--11. " CFG2TMC_EMMC2_PAD_D2_DRV_TYPE ,Selects driver type for DAT2 pad" "0,1,2,3" textline " " bitfld.long 0x10 8.--9. " CFG2TMC_EMMC2_PAD_D1_DRV_TYPE ,Selects driver type for DAT1 pad" "0,1,2,3" bitfld.long 0x10 6.--7. " CFG2TMC_EMMC2_PAD_D0_DRV_TYPE ,Selects driver type for DAT0 pad" "0,1,2,3" textline " " bitfld.long 0x10 4.--5. " CFG2TMC_EMMC2_PAD_CLKB_DRV_TYPE ,Selects driver type for CLKB pad" "0,1,2,3" bitfld.long 0x10 2.--3. " CFG2TMC_EMMC2_PAD_CLK_DRV_TYPE ,Selects driver type for CLK pad" "0,1,2,3" textline " " bitfld.long 0x10 0.--1. " CFG2TMC_EMMC2_PAD_CMD_DRV_TYPE ,Selects driver type for CMD pad" "0,1,2,3" line.long 0x14 "GP_EMMC2_PAD_PUPD_CFGPADCTRL_0,EMMC2_PAD_PUPD_CFG Pad Control Register" bitfld.long 0x14 25. " CFG2TMC_EMMC2_PAD_DQSB_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_DQSB_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 24. " CFG2TMC_EMMC2_PAD_DQSB_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_DQSB_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 23. " CFG2TMC_EMMC2_PAD_DQS_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_DQS_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 22. " CFG2TMC_EMMC2_PAD_DQS_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_DQS_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " CFG2TMC_EMMC2_PAD_D7_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_D7_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 20. " CFG2TMC_EMMC2_PAD_D7_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_D7_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " CFG2TMC_EMMC2_PAD_D6_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_D6_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 18. " CFG2TMC_EMMC2_PAD_D6_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_D6_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 17. " CFG2TMC_EMMC2_PAD_D5_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_D5_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 16. " CFG2TMC_EMMC2_PAD_D5_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_D5_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 15. " CFG2TMC_EMMC2_PAD_D4_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_D4_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 14. " CFG2TMC_EMMC2_PAD_D4_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_D4_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " CFG2TMC_EMMC2_PAD_D3_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_D3_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 12. " CFG2TMC_EMMC2_PAD_D3_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_D3_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " CFG2TMC_EMMC2_PAD_D2_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_D2_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 10. " CFG2TMC_EMMC2_PAD_D2_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_D2_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " CFG2TMC_EMMC2_PAD_D1_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_D1_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 8. " CFG2TMC_EMMC2_PAD_D1_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_D1_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " CFG2TMC_EMMC2_PAD_D0_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_D0_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 6. " CFG2TMC_EMMC2_PAD_D0_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_D0_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " CFG2TMC_EMMC2_PAD_CLKB_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_CLKB_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 4. " CFG2TMC_EMMC2_PAD_CLKB_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_CLKB_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " CFG2TMC_EMMC2_PAD_CLK_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_CLK_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 2. " CFG2TMC_EMMC2_PAD_CLK_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_CLK_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " CFG2TMC_EMMC2_PAD_CMD_PUPD_PULLU ,CFG2TMC_EMMC2_PAD_CMD_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x14 0. " CFG2TMC_EMMC2_PAD_CMD_PUPD_PULLD ,CFG2TMC_EMMC2_PAD_CMD_PUPD_PULLD" "Disabled,Enabled" group.long 0xAB0++0x07 line.long 0x00 "GP_SDMMC3_PAD_CFGPADCTRL_0,SDMMC3_PAD_CFG Pad Control Register" bitfld.long 0x00 30.--31. " CFG2TMC_SDMMC3_CLK_CFG_CAL_DRVUP_SLWF ,SlewF code override for CLK pad only" "0,1,2,3" bitfld.long 0x00 28.--29. " CFG2TMC_SDMMC3_CLK_CFG_CAL_DRVDN_SLWR ,SlewR code override for CLK pad only" "0,1,2,3" textline " " hexmask.long.byte 0x00 20.--26. 1. " CFG2TMC_SDMMC3_PAD_CAL_DRVUP ,3.3V 50ohm driver" hexmask.long.byte 0x00 12.--18. 1. " CFG2TMC_SDMMC3_PAD_CAL_DRVDN ,3.3V 50ohm driver" line.long 0x04 "GP_EMMC4_PAD_CFGPADCTRL_0,EMMC4_PAD_E_CFG Pad Control Register" bitfld.long 0x04 30.--31. " CFG2TMC_EMMC4_PAD_DRVUP_SLWF ,SLWF code for CLK pad of emmc4 iobrick" "0,1,2,3" bitfld.long 0x04 28.--29. " CFG2TMC_EMMC4_PAD_DRVDN_SLWR ,SLWR code for CLK pad of emmc4 iobrick" "0,1,2,3" textline " " bitfld.long 0x04 26. " MISC2PMC_EMMC4_DAT7_PARK ,MISC2PMC_EMMC4_DAT7_PARK" "Normal,Parked" bitfld.long 0x04 25. " MISC2PMC_EMMC4_DAT6_PARK ,MISC2PMC_EMMC4_DAT6_PARK" "Normal,Parked" textline " " bitfld.long 0x04 24. " MISC2PMC_EMMC4_DAT5_PARK ,MISC2PMC_EMMC4_DAT5_PARK" "Normal,Parked" bitfld.long 0x04 23. " MISC2PMC_EMMC4_DAT4_PARK ,MISC2PMC_EMMC4_DAT4_PARK" "Normal,Parked" textline " " bitfld.long 0x04 22. " MISC2PMC_EMMC4_DAT3_PARK ,MISC2PMC_EMMC4_DAT3_PARK" "Normal,Parked" bitfld.long 0x04 21. " MISC2PMC_EMMC4_DAT2_PARK ,MISC2PMC_EMMC4_DAT2_PARK" "Normal,Parked" textline " " bitfld.long 0x04 20. " MISC2PMC_EMMC4_DAT1_PARK ,MISC2PMC_EMMC4_DAT1_PARK" "Normal,Parked" bitfld.long 0x04 19. " MISC2PMC_EMMC4_DAT0_PARK ,MISC2PMC_EMMC4_DAT0_PARK" "Normal,Parked" textline " " bitfld.long 0x04 18. " MISC2PMC_EMMC4_CMD_PARK ,MISC2PMC_EMMC4_CMD_PARK" "Normal,Parked" bitfld.long 0x04 17. " MISC2PMC_EMMC4_DQSB_PARK ,MISC2PMC_EMMC4_DQSB_PARK" "Normal,Parked" textline " " bitfld.long 0x04 16. " MISC2PMC_EMMC4_DQS_PARK ,MISC2PMC_EMMC4_DQS_PARK" "Normal,Parked" bitfld.long 0x04 15. " MISC2PMC_EMMC4_CLKB_PARK ,MISC2PMC_EMMC4_CLKB_PARK" "Normal,Parked" textline " " bitfld.long 0x04 14. " MISC2PMC_EMMC4_CLK_PARK ,MISC2PMC_EMMC4_CLK_PARK" "Normal,Parked" hexmask.long.byte 0x04 8.--13. 1. " CFG2TMC_EMMC4_PAD_DRVUP_COMP ,CFG2TMC_EMMC4_PAD_DRVUP_COMP" textline " " hexmask.long.byte 0x04 2.--7. 1. " CFG2TMC_EMMC4_PAD_DRVDN_COMP ,CFG2TMC_EMMC4_PAD_DRVDN_COMP" bitfld.long 0x04 1. " CFG2TMC_EMMC4_PAD_E_PREEMP ,CFG2TMC_EMMC4_PAD_E_PREEMP" "Normal,Parked" textline " " bitfld.long 0x04 0. " CFG2TMC_EMMC4_PAD_E_SCH ,CFG2TMC_EMMC4_PAD_E_SCH" "Normal,Parked" group.long 0xAB8++0x03 line.long 0x00 "GP_EMMC4_PAD_DRV_TYPE_CFGPADCTRL_0,EMMC4_PAD_DRV_TYPE_CFG Pad Control Register" bitfld.long 0x00 20.--21. " CFG2TMC_EMMC4_PAD_D7_DRV_TYPE ,Selects driver type for DAT7 pad" "0,1,2,3" bitfld.long 0x00 18.--19. " CFG2TMC_EMMC4_PAD_D6_DRV_TYPE ,Selects driver type for DAT6 pad" "0,1,2,3" textline " " bitfld.long 0x00 16.--17. " CFG2TMC_EMMC4_PAD_D5_DRV_TYPE ,Selects driver type for DAT5 pad" "0,1,2,3" bitfld.long 0x00 14.--15. " CFG2TMC_EMMC4_PAD_D4_DRV_TYPE ,Selects driver type for DAT4 pad" "0,1,2,3" textline " " bitfld.long 0x00 12.--13. " CFG2TMC_EMMC4_PAD_D3_DRV_TYPE ,Selects driver type for DAT3 pad" "0,1,2,3" bitfld.long 0x00 10.--11. " CFG2TMC_EMMC4_PAD_D2_DRV_TYPE ,Selects driver type for DAT2 pad" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " CFG2TMC_EMMC4_PAD_D1_DRV_TYPE ,Selects driver type for DAT1 pad" "0,1,2,3" bitfld.long 0x00 6.--7. " CFG2TMC_EMMC4_PAD_D0_DRV_TYPE ,Selects driver type for DAT0 pad" "0,1,2,3" textline " " bitfld.long 0x00 4.--5. " CFG2TMC_EMMC4_PAD_CLKB_DRV_TYPE ,Selects driver type for CLKB pad" "0,1,2,3" bitfld.long 0x00 2.--3. " CFG2TMC_EMMC4_PAD_CLK_DRV_TYPE ,Selects driver type for CLK pad" "0,1,2,3" textline " " bitfld.long 0x00 0.--1. " CFG2TMC_EMMC4_PAD_CMD_DRV_TYPE ,Selects driver type for CMD pad" "0,1,2,3" group.long 0xABC++0x03 line.long 0x00 "GP_EMMC4_PAD_PUPD_CFGPADCTRL_0,EMMC4_PAD_PUPD_CFG Pad Control Register" bitfld.long 0x00 25. " CFG2TMC_EMMC4_PAD_DQSB_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_DQSB_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 24. " CFG2TMC_EMMC4_PAD_DQSB_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_DQSB_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " CFG2TMC_EMMC4_PAD_DQS_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_DQS_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 22. " CFG2TMC_EMMC4_PAD_DQS_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_DQS_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " CFG2TMC_EMMC4_PAD_D7_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_D7_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 20. " CFG2TMC_EMMC4_PAD_D7_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_D7_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " CFG2TMC_EMMC4_PAD_D6_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_D6_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 18. " CFG2TMC_EMMC4_PAD_D6_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_D6_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CFG2TMC_EMMC4_PAD_D5_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_D5_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 16. " CFG2TMC_EMMC4_PAD_D5_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_D5_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " CFG2TMC_EMMC4_PAD_D4_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_D4_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 14. " CFG2TMC_EMMC4_PAD_D4_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_D4_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " CFG2TMC_EMMC4_PAD_D3_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_D3_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 12. " CFG2TMC_EMMC4_PAD_D3_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_D3_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CFG2TMC_EMMC4_PAD_D2_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_D2_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 10. " CFG2TMC_EMMC4_PAD_D2_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_D2_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CFG2TMC_EMMC4_PAD_D1_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_D1_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 8. " CFG2TMC_EMMC4_PAD_D1_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_D1_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CFG2TMC_EMMC4_PAD_D0_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_D0_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 6. " CFG2TMC_EMMC4_PAD_D0_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_D0_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CFG2TMC_EMMC4_PAD_CLKB_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_CLKB_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 4. " CFG2TMC_EMMC4_PAD_CLKB_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_CLKB_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CFG2TMC_EMMC4_PAD_CLK_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_CLK_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 2. " CFG2TMC_EMMC4_PAD_CLK_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_CLK_PUPD_PULLD" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CFG2TMC_EMMC4_PAD_CMD_PUPD_PULLU ,CFG2TMC_EMMC4_PAD_CMD_PUPD_PULLU" "Disabled,Enabled" bitfld.long 0x00 0. " CFG2TMC_EMMC4_PAD_CMD_PUPD_PULLD ,CFG2TMC_EMMC4_PAD_CMD_PUPD_PULLD" "Disabled,Enabled" group.long 0xAC8++0xB3 line.long 0x00 "GP_SHUTDOWN_CFGPADCTRL_0,SHUTDOWN_CFG Pad Control Register" bitfld.long 0x00 20.--24. " CFG2TMC_SHUTDOWN_CFG_CAL_DRVUP ,CFG2TMC_SHUTDOWN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12.--16. " CFG2TMC_SHUTDOWN_CFG_CAL_DRVDN ,CFG2TMC_SHUTDOWN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "GP_SPDIF_IN_CFGPADCTRL_0,SPDIF_IN_CFG Pad Control Register" bitfld.long 0x04 20.--24. " CFG2TMC_SPDIF_IN_CFG_CAL_DRVUP ,CFG2TMC_SPDIF_IN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 12.--16. " CFG2TMC_SPDIF_IN_CFG_CAL_DRVDN ,CFG2TMC_SPDIF_IN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "GP_SPDIF_OUT_CFGPADCTRL_0,SPDIF_OUT_CFG Pad Control Register" bitfld.long 0x08 20.--24. " CFG2TMC_SPDIF_OUT_CFG_CAL_DRVUP ,CFG2TMC_SPDIF_OUT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 12.--16. " CFG2TMC_SPDIF_OUT_CFG_CAL_DRVDN ,CFG2TMC_SPDIF_OUT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "GP_SPI1_CS0_CFGPADCTRL_0,SPI1_CS0_CFG Pad Control Register" bitfld.long 0x0C 30.--31. " CFG2TMC_SPI1_CS0_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI1_CS0_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x0C 28.--29. " CFG2TMC_SPI1_CS0_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI1_CS0_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x10 "GP_SPI1_CS1_CFGPADCTRL_0,SPI1_CS1_CFG Pad Control Register" bitfld.long 0x10 30.--31. " CFG2TMC_SPI1_CS1_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI1_CS1_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x10 28.--29. " CFG2TMC_SPI1_CS1_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI1_CS1_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x14 "GP_SPI1_MISO_CFGPADCTRL_0,SPI1_MISO_CFG Pad Control Register" bitfld.long 0x14 30.--31. " CFG2TMC_SPI1_MISO_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI1_MISO_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x14 28.--29. " CFG2TMC_SPI1_MISO_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI1_MISO_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x18 "GP_SPI1_MOSI_CFGPADCTRL_0,SPI1_MOSI_CFG Pad Control Register" bitfld.long 0x18 30.--31. " CFG2TMC_SPI1_MOSI_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI1_MOSI_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x18 28.--29. " CFG2TMC_SPI1_MOSI_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI1_MOSI_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x1C "GP_SPI1_SCK_CFGPADCTRL_0,SPI1_SCK_CFG Pad Control Register" bitfld.long 0x1C 30.--31. " CFG2TMC_SPI1_SCK_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI1_SCK_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x1C 28.--29. " CFG2TMC_SPI1_SCK_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI1_SCK_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x20 "GP_SPI2_CS0_CFGPADCTRL_0,SPI2_CS0_CFG Pad Control Register" bitfld.long 0x20 30.--31. " CFG2TMC_SPI2_CS0_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI2_CS0_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x20 28.--29. " CFG2TMC_SPI2_CS0_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI2_CS0_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x24 "GP_SPI2_CS1_CFGPADCTRL_0,SPI2_CS1_CFG Pad Control Register" bitfld.long 0x24 30.--31. " CFG2TMC_SPI2_CS1_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI2_CS1_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x24 28.--29. " CFG2TMC_SPI2_CS1_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI2_CS1_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x28 "GP_SPI2_MISO_CFGPADCTRL_0,SPI2_MISO_CFG Pad Control Register" bitfld.long 0x28 30.--31. " CFG2TMC_SPI2_MISO_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI2_MISO_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x28 28.--29. " CFG2TMC_SPI2_MISO_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI2_MISO_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x2C "GP_SPI2_MOSI_CFGPADCTRL_0,SPI2_MOSI_CFG Pad Control Register" bitfld.long 0x2C 30.--31. " CFG2TMC_SPI2_MOSI_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI2_MOSI_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x2C 28.--29. " CFG2TMC_SPI2_MOSI_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI2_MOSI_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x30 "GP_SPI2_SCK_CFGPADCTRL_0,SPI2_SCK_CFG Pad Control Register" bitfld.long 0x30 30.--31. " CFG2TMC_SPI2_SCK_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI2_SCK_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x30 28.--29. " CFG2TMC_SPI2_SCK_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI2_SCK_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x34 "GP_SPI4_CS0_CFGPADCTRL_0,SPI4_CS0_CFG Pad Control Register" bitfld.long 0x34 30.--31. " CFG2TMC_SPI4_CS0_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI4_CS0_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x34 28.--29. " CFG2TMC_SPI4_CS0_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI4_CS0_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x38 "GP_SPI4_MISO_CFGPADCTRL_0,SPI4_MISO_CFG Pad Control Register" bitfld.long 0x38 30.--31. " CFG2TMC_SPI4_MISO_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI4_MISO_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x38 28.--29. " CFG2TMC_SPI4_MISO_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI4_MISO_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x3C "GP_SPI4_MOSI_CFGPADCTRL_0,SPI4_MOSI_CFG Pad Control Register" bitfld.long 0x3C 30.--31. " CFG2TMC_SPI4_MOSI_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI4_MOSI_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x3C 28.--29. " CFG2TMC_SPI4_MOSI_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI4_MOSI_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x40 "GP_SPI4_SCK_CFGPADCTRL_0,SPI4_SCK_CFG Pad Control Register" bitfld.long 0x40 30.--31. " CFG2TMC_SPI4_SCK_CFG_CAL_DRVUP_SLWF ,CFG2TMC_SPI4_SCK_CFG_CAL_DRVUP_SLWF" "0,1,2,3" bitfld.long 0x40 28.--29. " CFG2TMC_SPI4_SCK_CFG_CAL_DRVDN_SLWR ,CFG2TMC_SPI4_SCK_CFG_CAL_DRVDN_SLWR" "0,1,2,3" line.long 0x44 "GP_TEMP_ALERT_CFGPADCTRL_0,TEMP_ALERT_CFG Pad Control Register" bitfld.long 0x44 20.--24. " CFG2TMC_TEMP_ALERT_CFG_CAL_DRVUP ,CFG2TMC_TEMP_ALERT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 12.--16. " CFG2TMC_TEMP_ALERT_CFG_CAL_DRVDN ,CFG2TMC_TEMP_ALERT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x48 "GP_TOUCH_CLK_CFGPADCTRL_0,TOUCH_CLK_CFG Pad Control Register" bitfld.long 0x48 20.--24. " CFG2TMC_TOUCH_CLK_CFG_CAL_DRVUP ,CFG2TMC_TOUCH_CLK_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 12.--16. " CFG2TMC_TOUCH_CLK_CFG_CAL_DRVDN ,CFG2TMC_TOUCH_CLK_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4C "GP_TOUCH_INT_CFGPADCTRL_0,TOUCH_INT_CFG Pad Control Register" bitfld.long 0x4C 20.--24. " CFG2TMC_TOUCH_INT_CFG_CAL_DRVUP ,CFG2TMC_TOUCH_INT_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 12.--16. " CFG2TMC_TOUCH_INT_CFG_CAL_DRVDN ,CFG2TMC_TOUCH_INT_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x50 "GP_TOUCH_RST_CFGPADCTRL_0,TOUCH_RST_CFG Pad Control Register" bitfld.long 0x50 20.--24. " CFG2TMC_TOUCH_RST_CFG_CAL_DRVUP ,CFG2TMC_TOUCH_RST_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 12.--16. " CFG2TMC_TOUCH_RST_CFG_CAL_DRVDN ,CFG2TMC_TOUCH_RST_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x54 "GP_UART1_CTS_CFGPADCTRL_0,UART1_CTS_CFG Pad Control Register" bitfld.long 0x54 20.--24. " CFG2TMC_UART1_CTS_CFG_CAL_DRVUP ,CFG2TMC_UART1_CTS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 12.--16. " CFG2TMC_UART1_CTS_CFG_CAL_DRVDN ,CFG2TMC_UART1_CTS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x58 "GP_UART1_RTS_CFGPADCTRL_0,UART1_RTS_CFG Pad Control Register" bitfld.long 0x58 20.--24. " CFG2TMC_UART1_RTS_CFG_CAL_DRVUP ,CFG2TMC_UART1_RTS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 12.--16. " CFG2TMC_UART1_RTS_CFG_CAL_DRVDN ,CFG2TMC_UART1_RTS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x5C "GP_UART1_RX_CFGPADCTRL_0,UART1_RX_CFG Pad Control Register" bitfld.long 0x5C 20.--24. " CFG2TMC_UART1_RX_CFG_CAL_DRVUP ,CFG2TMC_UART1_RX_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x5C 12.--16. " CFG2TMC_UART1_RX_CFG_CAL_DRVDN ,CFG2TMC_UART1_RX_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x60 "GP_UART1_TX_CFGPADCTRL_0,UART1_TX_CFG Pad Control Register" bitfld.long 0x60 20.--24. " CFG2TMC_UART1_TX_CFG_CAL_DRVUP ,CFG2TMC_UART1_TX_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x60 12.--16. " CFG2TMC_UART1_TX_CFG_CAL_DRVDN ,CFG2TMC_UART1_TX_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x64 "GP_UART2_CTS_CFGPADCTRL_0,UART2_CTS_CFG Pad Control Register" bitfld.long 0x64 20.--24. " CFG2TMC_UART2_CTS_CFG_CAL_DRVUP ,CFG2TMC_UART2_CTS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x64 12.--16. " CFG2TMC_UART2_CTS_CFG_CAL_DRVDN ,CFG2TMC_UART2_CTS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x68 "GP_UART2_RTS_CFGPADCTRL_0,UART2_RTS_CFG Pad Control Register" bitfld.long 0x68 20.--24. " CFG2TMC_UART2_RTS_CFG_CAL_DRVUP ,CFG2TMC_UART2_RTS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x68 12.--16. " CFG2TMC_UART2_RTS_CFG_CAL_DRVDN ,CFG2TMC_UART2_RTS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x6C "GP_UART2_RX_CFGPADCTRL_0,UART2_RX_CFG Pad Control Register" bitfld.long 0x6C 20.--24. " CFG2TMC_UART2_RX_CFG_CAL_DRVUP ,CFG2TMC_UART2_RX_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x6C 12.--16. " CFG2TMC_UART2_RX_CFG_CAL_DRVDN ,CFG2TMC_UART2_RX_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x70 "GP_UART2_TX_CFGPADCTRL_0,UART2_TX_CFG Pad Control Register" bitfld.long 0x70 20.--24. " CFG2TMC_UART2_TX_CFG_CAL_DRVUP ,CFG2TMC_UART2_TX_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x70 12.--16. " CFG2TMC_UART2_TX_CFG_CAL_DRVDN ,CFG2TMC_UART2_TX_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x74 "GP_UART3_CTS_CFGPADCTRL_0,UART3_CTS_CFG Pad Control Register" bitfld.long 0x74 20.--24. " CFG2TMC_UART3_CTS_CFG_CAL_DRVUP ,CFG2TMC_UART3_CTS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x74 12.--16. " CFG2TMC_UART3_CTS_CFG_CAL_DRVDN ,CFG2TMC_UART3_CTS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x78 "GP_UART3_RTS_CFGPADCTRL_0,UART3_RTS_CFG Pad Control Register" bitfld.long 0x78 20.--24. " CFG2TMC_UART3_RTS_CFG_CAL_DRVUP ,CFG2TMC_UART3_RTS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x78 12.--16. " CFG2TMC_UART3_RTS_CFG_CAL_DRVDN ,CFG2TMC_UART3_RTS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x7C "GP_UART3_RX_CFGPADCTRL_0,UART3_RX_CFG Pad Control Register" bitfld.long 0x7C 20.--24. " CFG2TMC_UART3_RX_CFG_CAL_DRVUP ,CFG2TMC_UART3_RX_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x7C 12.--16. " CFG2TMC_UART3_RX_CFG_CAL_DRVDN ,CFG2TMC_UART3_RX_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x80 "GP_UART3_TX_CFGPADCTRL_0,UART3_TX_CFG Pad Control Register" bitfld.long 0x80 20.--24. " CFG2TMC_UART3_TX_CFG_CAL_DRVUP ,CFG2TMC_UART3_TX_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x80 12.--16. " CFG2TMC_UART3_TX_CFG_CAL_DRVDN ,CFG2TMC_UART3_TX_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x84 "GP_UART4_CTS_CFGPADCTRL_0,UART4_CTS_CFG Pad Control Register" bitfld.long 0x84 20.--24. " CFG2TMC_UART4_CTS_CFG_CAL_DRVUP ,CFG2TMC_UART4_CTS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x84 12.--16. " CFG2TMC_UART4_CTS_CFG_CAL_DRVDN ,CFG2TMC_UART4_CTS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x88 "GP_UART4_RTS_CFGPADCTRL_0,UART4_RTS_CFG Pad Control Register" bitfld.long 0x88 20.--24. " CFG2TMC_UART4_RTS_CFG_CAL_DRVUP ,CFG2TMC_UART4_RTS_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x88 12.--16. " CFG2TMC_UART4_RTS_CFG_CAL_DRVDN ,CFG2TMC_UART4_RTS_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x8C "GP_UART4_RX_CFGPADCTRL_0,UART4_RX_CFG Pad Control Register" bitfld.long 0x8C 20.--24. " CFG2TMC_UART4_RX_CFG_CAL_DRVUP ,CFG2TMC_UART4_RX_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x8C 12.--16. " CFG2TMC_UART4_RX_CFG_CAL_DRVDN ,CFG2TMC_UART4_RX_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x90 "GP_UART4_TX_CFGPADCTRL_0,UART4_TX_CFG Pad Control Register" bitfld.long 0x90 20.--24. " CFG2TMC_UART4_TX_CFG_CAL_DRVUP ,CFG2TMC_UART4_TX_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x90 12.--16. " CFG2TMC_UART4_TX_CFG_CAL_DRVDN ,CFG2TMC_UART4_TX_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x94 "GP_USB_VBUS_EN0_CFGPADCTRL_0,USB_VBUS_EN0_CFG Pad Control Register" bitfld.long 0x94 20.--24. " CFG2TMC_USB_VBUS_EN0_CFG_CAL_DRVUP ,CFG2TMC_USB_VBUS_EN0_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x94 12.--16. " CFG2TMC_USB_VBUS_EN0_CFG_CAL_DRVDN ,CFG2TMC_USB_VBUS_EN0_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x98 "GP_USB_VBUS_EN1_CFGPADCTRL_0,USB_VBUS_EN1_CFG Pad Control Register" bitfld.long 0x98 20.--24. " CFG2TMC_USB_VBUS_EN1_CFG_CAL_DRVUP ,CFG2TMC_USB_VBUS_EN1_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x98 12.--16. " CFG2TMC_USB_VBUS_EN1_CFG_CAL_DRVDN ,CFG2TMC_USB_VBUS_EN1_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x9C "GP_WIFI_EN_CFGPADCTRL_0,WIFI_EN_CFG Pad Control Register" bitfld.long 0x9C 20.--24. " CFG2TMC_WIFI_EN_CFG_CAL_DRVUP ,CFG2TMC_WIFI_EN_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x9C 12.--16. " CFG2TMC_WIFI_EN_CFG_CAL_DRVDN ,CFG2TMC_WIFI_EN_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xA0 "GP_WIFI_RST_CFGPADCTRL_0,WIFI_RST_CFG Pad Control Register" bitfld.long 0xA0 20.--24. " CFG2TMC_WIFI_RST_CFG_CAL_DRVUP ,CFG2TMC_WIFI_RST_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xA0 12.--16. " CFG2TMC_WIFI_RST_CFG_CAL_DRVDN ,CFG2TMC_WIFI_RST_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xA4 "GP_WIFI_WAKE_AP_CFGPADCTRL_0,WIFI_WAKE_AP_CFG Pad Control Register" bitfld.long 0xA4 20.--24. " CFG2TMC_WIFI_WAKE_AP_CFG_CAL_DRVUP ,CFG2TMC_WIFI_WAKE_AP_CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xA4 12.--16. " CFG2TMC_WIFI_WAKE_AP_CFG_CAL_DRVDN ,CFG2TMC_WIFI_WAKE_AP_CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0xA8 "GP_QSPI_COMP_CONTROL_0,QSPI Registers" bitfld.long 0xA8 7. " QSPI_COMP_PAD_REG_ON ,QSPI_COMP_PAD_REG_ON" "0,1" bitfld.long 0xA8 3.--6. " QSPI_COMP_PAD_VREF_SEL ,QSPI_COMP_PAD_VREF_SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xA8 2. " QSPI_COMP_PAD_CLK ,QSPI_COMP_PAD_CLK" "0,1" bitfld.long 0xA8 1. " QSPI_COMP_PAD_E_INPUT ,QSPI_COMP_PAD_E_INPUT" "0,1" textline " " rbitfld.long 0xA8 0. " QSPI_COMP_CALIB_STATUS ,QSPI_COMP_CALIB_STATUS" "0,1" line.long 0xAC "GP_VGPIO_GPIO_MUX_SEL_0,GP_VGPIO_GPIO_MUX_SEL_0" bitfld.long 0xAC 3. " SDMMC3_WP_SOURCE ,Selects between GPIO and VGPIO" "GPIO,VGPIO" bitfld.long 0xAC 2. " SDMMC3_CD_SOURCE ,Selects between GPIO and VGPIO" "GPIO,VGPIO" textline " " bitfld.long 0xAC 1. " SDMMC1_WP_SOURCE ,Selects between GPIO and VGPIO" "GPIO,VGPIO" bitfld.long 0xAC 0. " SDMMC1_CD_SOURCE ,Selects between GPIO and VGPIO" "GPIO,VGPIO" line.long 0xB0 "GP_QSPI_SCK_LPBK_CONTROL_0,GP_QSPI_SCK_LPBK_CONTROL_0" bitfld.long 0xB0 0. " QSPI_SCK_PAD_E_LPBK ,Enables deep loopback in the QSPI pad" "Disabled,Enabled" width 0x0B tree.end tree "SATA Aux" base ad:0x70000000 width 21. group.long 0x1108++0x13 line.long 0x00 "MISC_CNTL_1_0,MISC_CNTL_1 Register" bitfld.long 0x00 18. " AUX_RX_IDLE_STATUS_MASK ,Mask the aux_rx_idle_status input to the SATA core to 0" "Disabled,Enabled" bitfld.long 0x00 17. " DEVSLP_OVERRIDE ,Override the DEVSLP output from the SATA core" "Disabled,Enabled" bitfld.long 0x00 16. " DSP_SUPPORT ,Set AHCI's PxDEVSLP.DSP register bit" "Clear,Set" textline " " bitfld.long 0x00 15. " DESO_SUPPORT ,Set AHCI's CAP2.DESO register bit" "Clear,Set" bitfld.long 0x00 14. " SADM_SUPPORT ,Set AHCI's CAP2.SADM register bit" "Clear,Set" bitfld.long 0x00 13. " SDS_SUPPORT ,Set AHCI's CAP2.SAS register bit" "Clear,Set" textline " " bitfld.long 0x00 12. " RX_STAT_IDLE_MASK ,Bit mask the rx_stat_idle input to the SATA core" "Disabled,Enabled" rbitfld.long 0x00 11. " SATA2IPSM_DEVSLP ,Indicates SATA link DEVSLP" "0,1" rbitfld.long 0x00 9.--10. " SATA2IPSM_ST ,Indicates SATA link partial/slumber modes" "0,1,2,3" textline " " bitfld.long 0x00 8. " NVA2SATA_OOB_ON_SCONTROL_SPD_WR ,OOB SATA controller" "No,Yes" bitfld.long 0x00 7. " NVA2SATA_OOB_ON_POR ,Controls whether or not SATA controllers do an OOB sequence automatically" "No,Yes" rbitfld.long 0x00 5.--6. " L0_RX_IDLE_T_SAX ,l0_rx_idle_t value from the SATA controller" "NORMAL,?..." textline " " bitfld.long 0x00 3.--4. " L0_RX_IDLE_T_NPG ,Sets the l0_rx_idle_t value for the SATA PHY from apb_misc" "NORMAL,?..." bitfld.long 0x00 2. " L0_RX_IDLE_T_MUX ,Select l0_rx_idle_t driving source for SATA PHY" "SATA,APB MISC" bitfld.long 0x00 1. " PMU2SATA_ACCLMTR_TRIG ,Select between the external trigger and the PMU's trigger" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DEVICE_DIS_SATA0 ,Serial ATA Interface 0 Disable" "No,Yes" line.long 0x04 "RX_STAT_INT_0,RX_STAT_INT Register" bitfld.long 0x04 8. " SATA_DEVSLP_INT_DISABLE ,SATA devslp interrupt disable" "No,Yes" rbitfld.long 0x04 7. " SATA_DEVSLP ,SATA devslp state interrupt status" "No,Yes" setclrfld.long 0x04 6. 0x08 2. 0x0C 2. " SATA_DEVSLP_INT_SET/CLR ,SATA devslp state interrupt status" "None,Pending" textline " " bitfld.long 0x04 5. " SATA_DEV_ATTEN_INT_DISABLE ,SATA device attention interrupt disable" "No,Yes" rbitfld.long 0x04 4. " SATA_DEVICE_ATTENTION ,SATA device attention status" "No,Yes" setclrfld.long 0x04 3. 0x08 1. 0x0C 1. " SATA_DEV_ATTEN_INT_SET/CLR ,SATA device attention interrupt status from GPIO" "None,Pending" textline " " bitfld.long 0x04 2. " SATA_RX_STAT_INT_DISABLE ,SATA rx_stat interrupt disable" "No,Yes" rbitfld.long 0x04 1. " SATA_L0_RX_STAT_IDLE ,SATA pad L0 rx_stat_idle status" "No,Yes" setclrfld.long 0x04 0. 0x08 0. 0x0C 0. " SATA_RX_STAT_INT_SET/CLR ,SATA rx_stat interrupt status from the SATA pad" "None,Pending" group.long 0x1118++0x13 line.long 0x00 "SPARE_CFG0_0,SPARE_CFG0 Register" bitfld.long 0x00 14. " MDAT_TIMER_AFTER_PG_VALID ,Indicates the MDAT timer value is to be loaded in the SATA register space" "Not valid,Valid" bitfld.long 0x00 8.--13. " MDAT_TIMER_AFTER_PG ,MDAT timer value to be updated by the software (PEP driver) before power-ungating the SATA controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " MDAT_TIMER_BEFORE_PG ,MDAT timer value loaded from the SATA register space before SATA is power-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hgroup.long 0x111C++0x03 hide.long 0x00 "SPARE_CFG1_0,SPARE_CFG1 Register" group.long 0x1120++0x13 line.long 0x00 "PAD_PLL_CTRL_0_0,SATA PAD PLL Control Register" bitfld.long 0x00 28.--29. " PLL1_REFCLK_NDIV ,PLL1_REFCLK_NDIV" "0,1,2,3" rbitfld.long 0x00 27. " PLL1_LOCKDET ,PLL1_LOCKDET" "0,1" bitfld.long 0x00 24. " PLL1_MODE ,PLL1_MODE" "0,1" textline " " bitfld.long 0x00 20.--21. " PLL0_REFCLK_NDIV ,Select feedback divider for PLL" "0,1,2,3" rbitfld.long 0x00 19. " PLL0_LOCKDET ,Status signal indicating whether PLL is locked within the desired resolution" "Not locked,Locked" bitfld.long 0x00 16. " PLL0_MODE ,PLL0_MODE" "0,1" textline " " bitfld.long 0x00 12.--15. " REFCLK_SEL ,REFCLK_SEL" "Internal CML,Internal CMOS,External,?..." bitfld.long 0x00 11. " REFCLK_TERM100 ,REFCLK_TERM100" "0,1" bitfld.long 0x00 9. " PLL_CKBUFPD_OVRD ,PLL_CKBUFPD_OVRD" "0,1" textline " " bitfld.long 0x00 8. " PLL_CKBUFPD_M ,PLL_CKBUFPD_M" "0,1" bitfld.long 0x00 7. " PLL_CKBUFPD_BL ,PLL_CKBUFPD_BL" "0,1" bitfld.long 0x00 6. " PLL_CKBUFPD_BR ,PLL_CKBUFPD_BR" "0,1" textline " " bitfld.long 0x00 5. " PLL_CKBUFPD_TL ,PLL_CKBUFPD_TL" "0,1" bitfld.long 0x00 4. " PLL_CKBUFPD_TR ,PLL_CKBUFPD_TR" "0,1" bitfld.long 0x00 2. " PLL_EMULATION_RSTN ,Digital reset for clock divider during emulation mode" "Asserted,De-asserted" line.long 0x04 "PAD_PLL_CTRL_1_0,PAD_PLL_CTRL_1_0" bitfld.long 0x04 20.--23. " PLL1_CP_CNTL ,Charge-pump current control for PLL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " PLL0_CP_CNTL ,Charge-pump current control for PLL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 15. " PLL_BYPASS_EN ,Bypass PLL serial output clocks with input reference clock" "0,1" textline " " bitfld.long 0x04 13. " PLL_EMULATION_ON ,Enable clock bypass for emulation mode" "Disabled,Enabled" bitfld.long 0x04 12. " TCLKOUT_EN ,Enable test clock output pads, TSTCLKP/N" "Disabled,Enabled" bitfld.long 0x04 8.--11. " TCLKOUT_SEL ,Select internal clock source to bring out through the TSTCLKP/N pads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 7. " XDIGCLK4P5_EN ,Enable XDIGCLK4P5 clock output to core" "Disabled,Enabled" bitfld.long 0x04 6. " REFCLKBUF_EN ,Enable REFCLKBUF clock output to core" "Disabled,Enabled" bitfld.long 0x04 5. " TXCLKREF_EN ,Enable TXCLKREF clock to core" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TXCLKREF_SEL ,Select the post divider for TXCLKREF clock" "0,1" bitfld.long 0x04 3. " XDIGCLK_EN ,Enable XDIGCLK output clock" "Disabled,Enabled" bitfld.long 0x04 0.--2. " XDIGCLK_SEL ,Select the output frequency of XDIGCLK" "0,1,2,3,4,5,6,7" line.long 0x08 "PAD_PLL_CTRL_2_0,PAD_PLL_CTRL_2_0" bitfld.long 0x08 28.--31. " PLL_TEMP_CNTL ,PLL_TEMP_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 18.--23. " PLL_BW_CNTL ,PLL_BW_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--17. " PLL_BGAP_CNTL ,PLL_BGAP_CNTL" "0,1,2,3" textline " " rbitfld.long 0x08 15. " RCAL_DONE ,Status signal to indicate calibration status" "0,1" bitfld.long 0x08 14. " RCAL_RESET ,Reset the resistor calibration logic" "0,1" rbitfld.long 0x08 8.--12. " RCAL_VAL ,Setting of current active resistor calibration code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 7. " RCAL_BYPASS ,Bypass resistor calibration logic" "0,1" bitfld.long 0x08 0.--4. " RCAL_CODE ,Sets resistor calibration code when logic is bypassed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "PAD_PLL_CTRL_3_0,PAD_PLL_CTRL_3_0" hexmask.long 0x0C 0.--11. 1. " PLL_MISC_CNTL ,PLL_MISC_CNTL" line.long 0x10 "PAD_L0_AUX_CTRL_0_0,PAD_L0_AUX_CTRL_0_0" bitfld.long 0x10 11. " AUX_TX_RDET_CLK_EN ,AUX_TX_RDET_CLK_EN" "Disabled,Enabled" rbitfld.long 0x10 9.--10. " AUX_RX_IDLE_STATUS ,AUX_RX_IDLE_STATUS" "0,1,2,3" rbitfld.long 0x10 8. " AUX_TX_RDET_STATUS ,AUX_TX_RDET_STATUS" "0,1" textline " " bitfld.long 0x10 7. " AUX_RX_TERM_MODE ,AUX_RX_TERM_MODE" "0,1" bitfld.long 0x10 6. " AUX_HOLD_EN ,AUX_HOLD_EN" "Disabled,Enabled" bitfld.long 0x10 4.--5. " AUX_RX_IDLE_MODE ,AUX_RX_IDLE_MODE" "0,1,2,3" textline " " bitfld.long 0x10 3. " AUX_RX_IDLE_EN ,AUX_RX_IDLE_EN" "Disabled,Enabled" bitfld.long 0x10 2. " AUX_RX_TERM_EN ,AUX_RX_TERM_EN" "Disabled,Enabled" bitfld.long 0x10 1. " AUX_TX_RDET_EN ,AUX_TX_RDET_EN" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " AUX_TX_TERM_EN ,AUX_TX_TERM_EN" "Disabled,Enabled" width 0x0B tree.end tree "DAC/DAP" base ad:0x70000000 width 30. group.long 0xC00++0x03 line.long 0x00 "DAS_DAP_CTRL_SEL_0,DAP Control Register 0" bitfld.long 0x00 31. " DAP_MS_SEL ,DAP master or slave mode when two or more DAPs are in bypass mode" "Slave,Master" bitfld.long 0x00 30. " DAP_SDATA1_TX_RX ,Programs sdata1 in either tx or rx mode when two or more DAPs are in bypass mode" "TX,RX" textline " " bitfld.long 0x00 29. " DAP_SDATA2_RX_TX ,Programs sdata2 in either tx or rx mode when two or more DAPs are in bypass mode" "RX,TX" bitfld.long 0x00 0.--4. " DAP_CTRL_SEL ,DAP bits selection of the DACs or DAPs" "DAC1,DAC2,DAC3,,,,,,,,,,,,,,DAP1,DAP2,DAP3,DAP4,DAP5,?..." group.long 0xC04++0x03 line.long 0x00 "DAS_DAP_CTRL_SEL_1,DAP Control Register 1" bitfld.long 0x00 31. " DAP_MS_SEL ,DAP master or slave mode when two or more DAPs are in bypass mode" "Slave,Master" bitfld.long 0x00 30. " DAP_SDATA1_TX_RX ,Programs sdata1 in either tx or rx mode when two or more DAPs are in bypass mode" "TX,RX" textline " " bitfld.long 0x00 29. " DAP_SDATA2_RX_TX ,Programs sdata2 in either tx or rx mode when two or more DAPs are in bypass mode" "RX,TX" bitfld.long 0x00 0.--4. " DAP_CTRL_SEL ,DAP bits selection of the DACs or DAPs" "DAC1,DAC2,DAC3,,,,,,,,,,,,,,DAP1,DAP2,DAP3,DAP4,DAP5,?..." group.long 0xC08++0x03 line.long 0x00 "DAS_DAP_CTRL_SEL_2,DAP Control Register 2" bitfld.long 0x00 31. " DAP_MS_SEL ,DAP master or slave mode when two or more DAPs are in bypass mode" "Slave,Master" bitfld.long 0x00 30. " DAP_SDATA1_TX_RX ,Programs sdata1 in either tx or rx mode when two or more DAPs are in bypass mode" "TX,RX" textline " " bitfld.long 0x00 29. " DAP_SDATA2_RX_TX ,Programs sdata2 in either tx or rx mode when two or more DAPs are in bypass mode" "RX,TX" bitfld.long 0x00 0.--4. " DAP_CTRL_SEL ,DAP bits selection of the DACs or DAPs" "DAC1,DAC2,DAC3,,,,,,,,,,,,,,DAP1,DAP2,DAP3,DAP4,DAP5,?..." group.long 0xC0C++0x03 line.long 0x00 "DAS_DAP_CTRL_SEL_3,DAP Control Register 3" bitfld.long 0x00 31. " DAP_MS_SEL ,DAP master or slave mode when two or more DAPs are in bypass mode" "Slave,Master" bitfld.long 0x00 30. " DAP_SDATA1_TX_RX ,Programs sdata1 in either tx or rx mode when two or more DAPs are in bypass mode" "TX,RX" textline " " bitfld.long 0x00 29. " DAP_SDATA2_RX_TX ,Programs sdata2 in either tx or rx mode when two or more DAPs are in bypass mode" "RX,TX" bitfld.long 0x00 0.--4. " DAP_CTRL_SEL ,DAP bits selection of the DACs or DAPs" "DAC1,DAC2,DAC3,,,,,,,,,,,,,,DAP1,DAP2,DAP3,DAP4,DAP5,?..." group.long 0xC10++0x03 line.long 0x00 "DAS_DAP_CTRL_SEL_4,DAP Control Register 4" bitfld.long 0x00 31. " DAP_MS_SEL ,DAP master or slave mode when two or more DAPs are in bypass mode" "Slave,Master" bitfld.long 0x00 30. " DAP_SDATA1_TX_RX ,Programs sdata1 in either tx or rx mode when two or more DAPs are in bypass mode" "TX,RX" textline " " bitfld.long 0x00 29. " DAP_SDATA2_RX_TX ,Programs sdata2 in either tx or rx mode when two or more DAPs are in bypass mode" "RX,TX" bitfld.long 0x00 0.--4. " DAP_CTRL_SEL ,DAP bits selection of the DACs or DAPs" "DAC1,DAC2,DAC3,,,,,,,,,,,,,,DAP1,DAP2,DAP3,DAP4,DAP5,?..." group.long 0xC40++0x03 line.long 0x00 "DAS_DAC_INPUT_DATA_CLK_SEL_0,DAC Input Data Selections" bitfld.long 0x00 28.--31. " DAC_SDATA2_SEL ,These bits control the sdata2 input selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." bitfld.long 0x00 24.--27. " DAC_SDATA1_SEL ,These bits control the sdata1 input selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." textline " " bitfld.long 0x00 0.--3. " DAC_CLK_SEL ,These bits control the bit clock and fsync selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." group.long 0xC44++0x03 line.long 0x00 "DAS_DAC_INPUT_DATA_CLK_SEL_0,DAC Input Data Selections" bitfld.long 0x00 28.--31. " DAC_SDATA2_SEL ,These bits control the sdata2 input selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." bitfld.long 0x00 24.--27. " DAC_SDATA1_SEL ,These bits control the sdata1 input selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." textline " " bitfld.long 0x00 0.--3. " DAC_CLK_SEL ,These bits control the bit clock and fsync selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." group.long 0xC48++0x03 line.long 0x00 "DAS_DAC_INPUT_DATA_CLK_SEL_0,DAC Input Data Selections" bitfld.long 0x00 28.--31. " DAC_SDATA2_SEL ,These bits control the sdata2 input selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." bitfld.long 0x00 24.--27. " DAC_SDATA1_SEL ,These bits control the sdata1 input selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." textline " " bitfld.long 0x00 0.--3. " DAC_CLK_SEL ,These bits control the bit clock and fsync selection for DACs" "DAP1,DAP2,DAP3,DAP4,DAP5,?..." width 0xB tree.end tree "AP Control" base ad:0x70000000 width 46. group.long 0xC00++0x0B line.long 0x00 "SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0,APB Slave Security Enable Register 0" bitfld.long 0x00 29. " STM_SECURITY_EN ,STM security enable" "Disabled,Enabled" bitfld.long 0x00 24. " CEC_SECURITY_EN ,CEC security enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " ATOMICS_SECURITY_EN ,ATOMICS security enable" "Disabled,Enabled" bitfld.long 0x00 22. " LA_SECURITY_EN ,LA security enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " HDA_SECURITY_EN ,HDA security enable" "Disabled,Enabled" bitfld.long 0x00 20. " SATA_SECURITY_EN ,SATA security enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " KFUSE_SECURITY_EN ,KFUSE security enable" "Disabled,Enabled" bitfld.long 0x00 15. " FUSE_SECURITY_EN ,FUSE security enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SE_SECURITY_EN ,SE security enable" "Disabled,Enabled" bitfld.long 0x00 13. " PMC_SECURITY_EN ,PMC security enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RTC_SECURITY_EN ,RTC security enable" "Disabled,Enabled" bitfld.long 0x00 10. " CSITE_SECURITY_EN ,CSITE security enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " QSPI_SECURITY_EN ,QSPI security enable" "Disabled,Enabled" bitfld.long 0x00 8. " PWM_SECURITY_EN ,PWM security enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " DTV_SECURITY_EN ,DTV security enable" "Disabled,Enabled" bitfld.long 0x00 4. " APE_SECURITY_EN ,APE security enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PINMUX_AUX_SECURITY_EN ,Pinmux aux registers" "Disabled,Enabled" bitfld.long 0x00 2. " SATA_AUX_SECURITY_EN ,SATA aux registers" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MISC_REGS_SECURITY_EN ,PP SC1x pads and GP registers" "Disabled,Enabled" line.long 0x04 "SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0,APB Slave Security Enable Register 1" bitfld.long 0x04 31. " I2C6_SECURITY_EN ,I2C6 security enable" "Disabled,Enabled" bitfld.long 0x04 30. " DVC_SECURITY_EN ,DVC security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " I2C4_SECURITY_EN ,I2C4 security enable" "Disabled,Enabled" bitfld.long 0x04 28. " I2C3_SECURITY_EN ,I2C3 security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " I2C2_SECURITY_EN ,I2C2 security enable" "Disabled,Enabled" bitfld.long 0x04 26. " I2C1_SECURITY_EN ,I2C1 security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " SPI6_SECURITY_EN ,SPI6 security enable" "Disabled,Enabled" bitfld.long 0x04 24. " SPI5_SECURITY_EN ,SPI5 security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SPI4_SECURITY_EN ,SPI4 security enable" "Disabled,Enabled" bitfld.long 0x04 22. " SPI3_SECURITY_EN ,SPI3 security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " SPI2_SECURITY_EN ,SPI2 security enable" "Disabled,Enabled" bitfld.long 0x04 20. " SPI1_SECURITY_EN ,SPI1 security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " UART_D_SECURITY_EN ,UART_D security enable" "Disabled,Enabled" bitfld.long 0x04 14. " UART_C_SECURITY_EN ,UART_C security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " UART_B_SECURITY_EN ,UART_B security enable" "Disabled,Enabled" bitfld.long 0x04 12. " UART_A_SECURITY_EN ,UART_A security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " EMCB_SECURITY_EN ,EMCB security enable" "Disabled,Enabled" bitfld.long 0x04 10. " MCB_SECURITY_EN ,MCB security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " EMC1_SECURITY_EN ,EMC1DVFS" "Disabled,Enabled" bitfld.long 0x04 8. " MC1_SECURITY_EN ,MC1 security enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " EMC0_SECURITY_EN ,EMC0 security enable" "Disabled,Enabled" bitfld.long 0x04 4. " MC0_SECURITY_EN ,MC0 security enable" "Disabled,Enabled" line.long 0x08 "SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG2_0,APB Slave Security Enable Register 2" bitfld.long 0x08 16. " DVFS_SECURITY_EN ,DVFS security enable" "Disabled,Enabled" bitfld.long 0x08 15. " MIPI_CAL_SECURITY_EN ,MIPI cal security enable" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " XUSB_PADCTL_SECURITY_EN ,XUSB_PADCTL security enable" "Disabled,Enabled" bitfld.long 0x08 13. " XUSB_DEV_SECURITY_EN ,XUSB_dev security enable" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " XUSB_HOST_SECURITY_EN ,XUSB_host security enable" "Disabled,Enabled" bitfld.long 0x08 11. " APB2JTAG_SECURITY_EN ,APB2JTAG security enable" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " SOC_THERM_SECURITY_EN ,SOC_THERM security enable" "Disabled,Enabled" bitfld.long 0x08 9. " DP2_SECURITY_EN ,DP2 security enable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " DDS_SECURITY_EN ,DDS security enable" "Disabled,Enabled" bitfld.long 0x08 3. " SDMMC4_SECURITY_EN ,SDMMC4 security enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " SDMMC3_SECURITY_EN ,SDMMC3 security enable" "Disabled,Enabled" bitfld.long 0x08 1. " SDMMC2_SECURITY_EN ,SDMMC2 security enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " SDMMC1_SECURITY_EN ,SDMMC1 security enable" "Disabled,Enabled" width 0xB tree.end tree "APB DMA Controller" base ad:0x60020000 width 20. tree "APB DMA Main Registers" group.long 0x00++0x03 line.long 0x00 "COMMAND_0,Command Register" bitfld.long 0x00 31. " GEN ,Enables global APB-DMA" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 31. " BSY_31 ,DMA channel 31 status" "Not busy,Busy" bitfld.long 0x00 30. " BSY_30 ,DMA channel 30 status" "Not busy,Busy" bitfld.long 0x00 29. " BSY_29 ,DMA channel 29 status" "Not busy,Busy" bitfld.long 0x00 28. " BSY_28 ,DMA channel 28 status" "Not busy,Busy" textline " " bitfld.long 0x00 27. " BSY_27 ,DMA channel 27 status" "Not busy,Busy" bitfld.long 0x00 26. " BSY_26 ,DMA channel 26 status" "Not busy,Busy" bitfld.long 0x00 25. " BSY_25 ,DMA channel 25 status" "Not busy,Busy" bitfld.long 0x00 24. " BSY_24 ,DMA channel 24 status" "Not busy,Busy" textline " " bitfld.long 0x00 23. " BSY_23 ,DMA channel 23 status" "Not busy,Busy" bitfld.long 0x00 22. " BSY_22 ,DMA channel 22 status" "Not busy,Busy" bitfld.long 0x00 21. " BSY_21 ,DMA channel 21 status" "Not busy,Busy" bitfld.long 0x00 20. " BSY_20 ,DMA channel 20 status" "Not busy,Busy" textline " " bitfld.long 0x00 19. " BSY_19 ,DMA channel 19 status" "Not busy,Busy" bitfld.long 0x00 18. " BSY_18 ,DMA channel 18 status" "Not busy,Busy" bitfld.long 0x00 17. " BSY_17 ,DMA channel 17 status" "Not busy,Busy" bitfld.long 0x00 16. " BSY_16 ,DMA channel 16 status" "Not busy,Busy" textline " " bitfld.long 0x00 15. " BSY_15 ,DMA channel 15 status" "Not busy,Busy" bitfld.long 0x00 14. " BSY_14 ,DMA channel 14 status" "Not busy,Busy" bitfld.long 0x00 13. " BSY_13 ,DMA channel 13 status" "Not busy,Busy" bitfld.long 0x00 12. " BSY_12 ,DMA channel 12 status" "Not busy,Busy" textline " " bitfld.long 0x00 11. " BSY_11 ,DMA channel 11 status" "Not busy,Busy" bitfld.long 0x00 10. " BSY_10 ,DMA channel 10 status" "Not busy,Busy" bitfld.long 0x00 9. " BSY_9 ,DMA channel 9 status" "Not busy,Busy" bitfld.long 0x00 8. " BSY_8 ,DMA channel 8 status" "Not busy,Busy" textline " " bitfld.long 0x00 7. " BSY_7 ,DMA channel 7 status" "Not busy,Busy" bitfld.long 0x00 6. " BSY_6 ,DMA channel 6 status" "Not busy,Busy" bitfld.long 0x00 5. " BSY_5 ,DMA channel 5 status" "Not busy,Busy" bitfld.long 0x00 4. " BSY_4 ,DMA channel 4 status" "Not busy,Busy" textline " " bitfld.long 0x00 3. " BSY_3 ,DMA channel 3 status" "Not busy,Busy" bitfld.long 0x00 2. " BSY_2 ,DMA channel 2 status" "Not busy,Busy" bitfld.long 0x00 1. " BSY_1 ,DMA channel 1 status" "Not busy,Busy" bitfld.long 0x00 0. " BSY_0 ,DMA channel 0 status" "Not busy,Busy" group.long 0x10++0x03 line.long 0x00 "CNTRL_REG_0,Counter Register" rgroup.long 0x14++0x1F line.long 0x00 "IRQ_STA_CPU_0,CPU IRQ Status Register" bitfld.long 0x00 31. " CH31 ,Gathers all the after-masking CPU directed IRQ status bits from channel 31" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 30. " CH30 ,Gathers all the after-masking CPU directed IRQ status bits from channel 30" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 29. " CH29 ,Gathers all the after-masking CPU directed IRQ status bits from channel 29" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 28. " CH28 ,Gathers all the after-masking CPU directed IRQ status bits from channel 28" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x00 27. " CH27 ,Gathers all the after-masking CPU directed IRQ status bits from channel 27" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 26. " CH26 ,Gathers all the after-masking CPU directed IRQ status bits from channel 26" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 25. " CH25 ,Gathers all the after-masking CPU directed IRQ status bits from channel 25" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 24. " CH24 ,Gathers all the after-masking CPU directed IRQ status bits from channel 24" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x00 23. " CH23 ,Gathers all the after-masking CPU directed IRQ status bits from channel 23" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 22. " CH22 ,Gathers all the after-masking CPU directed IRQ status bits from channel 22" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 21. " CH21 ,Gathers all the after-masking CPU directed IRQ status bits from channel 21" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 20. " CH20 ,Gathers all the after-masking CPU directed IRQ status bits from channel 20" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x00 19. " CH19 ,Gathers all the after-masking CPU directed IRQ status bits from channel 19" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 18. " CH18 ,Gathers all the after-masking CPU directed IRQ status bits from channel 18" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 17. " CH17 ,Gathers all the after-masking CPU directed IRQ status bits from channel 17" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 16. " CH16 ,Gathers all the after-masking CPU directed IRQ status bits from channel 16" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x00 15. " CH15 ,Gathers all the after-masking CPU directed IRQ status bits from channel 15" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 14. " CH14 ,Gathers all the after-masking CPU directed IRQ status bits from channel 14" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 13. " CH13 ,Gathers all the after-masking CPU directed IRQ status bits from channel 13" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 12. " CH12 ,Gathers all the after-masking CPU directed IRQ status bits from channel 12" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x00 11. " CH11 ,Gathers all the after-masking CPU directed IRQ status bits from channel 11" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 10. " CH10 ,Gathers all the after-masking CPU directed IRQ status bits from channel 10" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 9. " CH9 ,Gathers all the after-masking CPU directed IRQ status bits from channel 9" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 8. " CH8 ,Gathers all the after-masking CPU directed IRQ status bits from channel 8" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x00 7. " CH7 ,Gathers all the after-masking CPU directed IRQ status bits from channel 7" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 6. " CH6 ,Gathers all the after-masking CPU directed IRQ status bits from channel 6" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 5. " CH5 ,Gathers all the after-masking CPU directed IRQ status bits from channel 5" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 4. " CH4 ,Gathers all the after-masking CPU directed IRQ status bits from channel 4" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x00 3. " CH3 ,Gathers all the after-masking CPU directed IRQ status bits from channel 3" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 2. " CH2 ,Gathers all the after-masking CPU directed IRQ status bits from channel 2" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 1. " CH1 ,Gathers all the after-masking CPU directed IRQ status bits from channel 1" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x00 0. " CH0 ,Gathers all the after-masking CPU directed IRQ status bits from channel 0" "No IRQ/Disabled,IRQ/Enabled" line.long 0x04 "IRQ_STA_COP_0,COP IRQ Status Register" bitfld.long 0x04 31. " CH31 ,Gathers all the after-masking COP directed IRQ status bits from channel 31" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 30. " CH30 ,Gathers all the after-masking COP directed IRQ status bits from channel 30" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 29. " CH29 ,Gathers all the after-masking COP directed IRQ status bits from channel 29" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 28. " CH28 ,Gathers all the after-masking COP directed IRQ status bits from channel 28" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x04 27. " CH27 ,Gathers all the after-masking COP directed IRQ status bits from channel 27" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 26. " CH26 ,Gathers all the after-masking COP directed IRQ status bits from channel 26" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 25. " CH25 ,Gathers all the after-masking COP directed IRQ status bits from channel 25" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 24. " CH24 ,Gathers all the after-masking COP directed IRQ status bits from channel 24" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x04 23. " CH23 ,Gathers all the after-masking COP directed IRQ status bits from channel 23" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 22. " CH22 ,Gathers all the after-masking COP directed IRQ status bits from channel 22" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 21. " CH21 ,Gathers all the after-masking COP directed IRQ status bits from channel 21" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 20. " CH20 ,Gathers all the after-masking COP directed IRQ status bits from channel 20" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x04 19. " CH19 ,Gathers all the after-masking COP directed IRQ status bits from channel 19" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 18. " CH18 ,Gathers all the after-masking COP directed IRQ status bits from channel 18" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 17. " CH17 ,Gathers all the after-masking COP directed IRQ status bits from channel 17" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 16. " CH16 ,Gathers all the after-masking COP directed IRQ status bits from channel 16" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x04 15. " CH15 ,Gathers all the after-masking COP directed IRQ status bits from channel 15" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 14. " CH14 ,Gathers all the after-masking COP directed IRQ status bits from channel 14" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 13. " CH13 ,Gathers all the after-masking COP directed IRQ status bits from channel 13" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 12. " CH12 ,Gathers all the after-masking COP directed IRQ status bits from channel 12" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x04 11. " CH11 ,Gathers all the after-masking COP directed IRQ status bits from channel 11" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 10. " CH10 ,Gathers all the after-masking COP directed IRQ status bits from channel 10" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 9. " CH9 ,Gathers all the after-masking COP directed IRQ status bits from channel 9" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 8. " CH8 ,Gathers all the after-masking COP directed IRQ status bits from channel 8" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x04 7. " CH7 ,Gathers all the after-masking COP directed IRQ status bits from channel 7" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 6. " CH6 ,Gathers all the after-masking COP directed IRQ status bits from channel 6" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 5. " CH5 ,Gathers all the after-masking COP directed IRQ status bits from channel 5" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 4. " CH4 ,Gathers all the after-masking COP directed IRQ status bits from channel 4" "No IRQ/Disabled,IRQ/Enabled" textline " " bitfld.long 0x04 3. " CH3 ,Gathers all the after-masking COP directed IRQ status bits from channel 3" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 2. " CH2 ,Gathers all the after-masking COP directed IRQ status bits from channel 2" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 1. " CH1 ,Gathers all the after-masking COP directed IRQ status bits from channel 1" "No IRQ/Disabled,IRQ/Enabled" bitfld.long 0x04 0. " CH0 ,Gathers all the after-masking COP directed IRQ status bits from channel 0" "No IRQ/Disabled,IRQ/Enabled" line.long 0x08 "IRQ_MASK_0_SET/CLR,IRQ Mask Register" setclrfld.long 0x08 31. 0x0C 31. 0x10 31. " CH31 ,Each bit allows the associated channel 31 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 30. 0x0C 30. 0x10 30. " CH30 ,Each bit allows the associated channel 30 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 29. 0x0C 29. 0x10 29. " CH29 ,Each bit allows the associated channel 29 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 28. 0x0C 28. 0x10 28. " CH28 ,Each bit allows the associated channel 28 IRQ to propagate" "Disabled,Enabled" textline " " setclrfld.long 0x08 27. 0x0C 27. 0x10 27. " CH27 ,Each bit allows the associated channel 27 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 26. 0x0C 26. 0x10 26. " CH26 ,Each bit allows the associated channel 26 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 25. 0x0C 25. 0x10 25. " CH25 ,Each bit allows the associated channel 25 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 24. 0x0C 24. 0x10 24. " CH24 ,Each bit allows the associated channel 24 IRQ to propagate" "Disabled,Enabled" textline " " setclrfld.long 0x08 23. 0x0C 23. 0x10 23. " CH23 ,Each bit allows the associated channel 23 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 22. 0x0C 22. 0x10 22. " CH22 ,Each bit allows the associated channel 22 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 21. 0x0C 21. 0x10 21. " CH21 ,Each bit allows the associated channel 21 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 20. 0x0C 20. 0x10 20. " CH20 ,Each bit allows the associated channel 20 IRQ to propagate" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x0C 19. 0x10 19. " CH19 ,Each bit allows the associated channel 19 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 18. 0x0C 18. 0x10 18. " CH18 ,Each bit allows the associated channel 18 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 17. 0x0C 17. 0x10 17. " CH17 ,Each bit allows the associated channel 17 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 16. 0x0C 16. 0x10 16. " CH16 ,Each bit allows the associated channel 16 IRQ to propagate" "Disabled,Enabled" textline " " setclrfld.long 0x08 15. 0x0C 15. 0x10 15. " CH15 ,Each bit allows the associated channel 15 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 14. 0x0C 14. 0x10 14. " CH14 ,Each bit allows the associated channel 14 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 13. 0x0C 13. 0x10 13. " CH13 ,Each bit allows the associated channel 13 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 12. 0x0C 12. 0x10 12. " CH12 ,Each bit allows the associated channel 12 IRQ to propagate" "Disabled,Enabled" textline " " setclrfld.long 0x08 11. 0x0C 11. 0x10 11. " CH11 ,Each bit allows the associated channel 11 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 10. 0x0C 10. 0x10 10. " CH10 ,Each bit allows the associated channel 10 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 9. 0x0C 9. 0x10 9. " CH9 ,Each bit allows the associated channel 9 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 8. 0x0C 8. 0x10 8. " CH8 ,Each bit allows the associated channel 8 IRQ to propagate" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x0C 7. 0x10 7. " CH7 ,Each bit allows the associated channel 7 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 6. 0x0C 6. 0x10 6. " CH6 ,Each bit allows the associated channel 6 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 5. 0x0C 5. 0x10 5. " CH5 ,Each bit allows the associated channel 5 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 4. 0x0C 4. 0x10 4. " CH4 ,Each bit allows the associated channel 4 IRQ to propagate" "Disabled,Enabled" textline " " setclrfld.long 0x08 3. 0x0C 3. 0x10 3. " CH3 ,Each bit allows the associated channel 3 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 2. 0x0C 2. 0x10 2. " CH2 ,Each bit allows the associated channel 2 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 1. 0x0C 1. 0x10 1. " CH1 ,Each bit allows the associated channel 1 IRQ to propagate" "Disabled,Enabled" setclrfld.long 0x08 0. 0x0C 0. 0x10 0. " CH0 ,Each bit allows the associated channel 0 IRQ to propagate" "Disabled,Enabled" line.word 0x14 "TRIG_REG_0,Trigger Register" bitfld.word 0x14 8. " TMR2 ,Trigger select from Timer (Hardware initiated DMA request)" "Not active,Active" bitfld.word 0x14 7. " TMR1 ,Trigger select from Timer (Hardware initiated DMA request)" "Not active,Active" bitfld.word 0x14 6. " XRQ_B ,XRQ.B (GPIOB) (Hardware initiated DMA request)" "Not active,Active" bitfld.word 0x14 5. " XRQ_A ,XRQ.A (GPIOA) (Hardware initiated DMA request)" "Not active,Active" textline " " bitfld.word 0x14 4. " SMP_27 ,Semaphore requests SW initiated DMA request" "Not active,Active" bitfld.word 0x14 3. " SMP_26 ,Semaphore requests SW initiated DMA request" "Not active,Active" bitfld.word 0x14 2. " SMP_25 ,Semaphore requests SW initiated DMA request" "Not active,Active" bitfld.word 0x14 1. " SMP_24 ,Semaphore requests SW initiated DMA request" "Not active,Active" line.long 0x18 "CHANNEL_TRIG_REG_0,Channel Trigger registers" bitfld.long 0x18 31. " APB_31 ,EOC-31 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 30. " APB_30 ,EOC-30 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 29. " APB_29 ,EOC-29 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 28. " APB_28 ,EOC-28 initiated DMA request after transfer completion" "Not active,Active" textline " " bitfld.long 0x18 27. " APB_27 ,EOC-27 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 26. " APB_26 ,EOC-26 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 25. " APB_25 ,EOC-25 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 24. " APB_24 ,EOC-24 initiated DMA request after transfer completion" "Not active,Active" textline " " bitfld.long 0x18 23. " APB_23 ,EOC-23 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 22. " APB_22 ,EOC-22 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 21. " APB_21 ,EOC-21 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 20. " APB_20 ,EOC-20 initiated DMA request after transfer completion" "Not active,Active" textline " " bitfld.long 0x18 19. " APB_19 ,EOC-19 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 18. " APB_18 ,EOC-18 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 17. " APB_17 ,EOC-17 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 16. " APB_16 ,EOC-16 initiated DMA request after transfer completion" "Not active,Active" textline " " bitfld.long 0x18 15. " APB_15 ,EOC-15 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 14. " APB_14 ,EOC-14 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 13. " APB_13 ,EOC-13 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 12. " APB_12 ,EOC-12 initiated DMA request after transfer completion" "Not active,Active" textline " " bitfld.long 0x18 11. " APB_11 ,EOC-11 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 10. " APB_10 ,EOC-10 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 9. " APB_9 ,EOC-9 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 8. " APB_8 ,EOC-8 initiated DMA request after transfer completion" "Not active,Active" textline " " bitfld.long 0x18 7. " APB_7 ,EOC-7 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 6. " APB_6 ,EOC-6 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 5. " APB_5 ,EOC-5 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 4. " APB_4 ,EOC-4 initiated DMA request after transfer completion" "Not active,Active" textline " " bitfld.long 0x18 3. " APB_3 ,EOC-3 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 2. " APB_2 ,EOC-2 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 1. " APB_1 ,EOC-1 initiated DMA request after transfer completion" "Not active,Active" bitfld.long 0x18 0. " APB_0 ,EOC-0 initiated DMA request after transfer completion" "Not active,Active" line.long 0x1C "DMA_STATUS_0,Interrupt Status" bitfld.long 0x1C 31. " ISE_EOC_31 ,DMA channel 31 interrupt status" "Not active,Active" bitfld.long 0x1C 30. " ISE_EOC_30 ,DMA channel 30 interrupt status" "Not active,Active" bitfld.long 0x1C 29. " ISE_EOC_29 ,DMA channel 29 interrupt status" "Not active,Active" bitfld.long 0x1C 28. " ISE_EOC_28 ,DMA channel 28 interrupt status" "Not active,Active" textline " " bitfld.long 0x1C 27. " ISE_EOC_27 ,DMA channel 27 interrupt status" "Not active,Active" bitfld.long 0x1C 26. " ISE_EOC_26 ,DMA channel 26 interrupt status" "Not active,Active" bitfld.long 0x1C 25. " ISE_EOC_25 ,DMA channel 25 interrupt status" "Not active,Active" bitfld.long 0x1C 24. " ISE_EOC_24 ,DMA channel 24 interrupt status" "Not active,Active" textline " " bitfld.long 0x1C 23. " ISE_EOC_23 ,DMA channel 23 interrupt status" "Not active,Active" bitfld.long 0x1C 22. " ISE_EOC_22 ,DMA channel 22 interrupt status" "Not active,Active" bitfld.long 0x1C 21. " ISE_EOC_21 ,DMA channel 21 interrupt status" "Not active,Active" bitfld.long 0x1C 20. " ISE_EOC_20 ,DMA channel 20 interrupt status" "Not active,Active" textline " " bitfld.long 0x1C 19. " ISE_EOC_19 ,DMA channel 19 interrupt status" "Not active,Active" bitfld.long 0x1C 18. " ISE_EOC_18 ,DMA channel 18 interrupt status" "Not active,Active" bitfld.long 0x1C 17. " ISE_EOC_17 ,DMA channel 17 interrupt status" "Not active,Active" bitfld.long 0x1C 16. " ISE_EOC_16 ,DMA channel 16 interrupt status" "Not active,Active" textline " " bitfld.long 0x1C 15. " ISE_EOC_15 ,DMA channel 15 interrupt status" "Not active,Active" bitfld.long 0x1C 14. " ISE_EOC_14 ,DMA channel 14 interrupt status" "Not active,Active" bitfld.long 0x1C 13. " ISE_EOC_13 ,DMA channel 13 interrupt status" "Not active,Active" bitfld.long 0x1C 12. " ISE_EOC_12 ,DMA channel 12 interrupt status" "Not active,Active" textline " " bitfld.long 0x1C 11. " ISE_EOC_11 ,DMA channel 11 interrupt status" "Not active,Active" bitfld.long 0x1C 10. " ISE_EOC_10 ,DMA channel 10 interrupt status" "Not active,Active" bitfld.long 0x1C 9. " ISE_EOC_9 ,DMA channel 9 interrupt status" "Not active,Active" bitfld.long 0x1C 8. " ISE_EOC_8 ,DMA channel 8 interrupt status" "Not active,Active" textline " " bitfld.long 0x1C 7. " ISE_EOC_7 ,DMA channel 7 interrupt status" "Not active,Active" bitfld.long 0x1C 6. " ISE_EOC_6 ,DMA channel 6 interrupt status" "Not active,Active" bitfld.long 0x1C 5. " ISE_EOC_5 ,DMA channel 5 interrupt status" "Not active,Active" bitfld.long 0x1C 4. " ISE_EOC_4 ,DMA channel 4 interrupt status" "Not active,Active" textline " " bitfld.long 0x1C 3. " ISE_EOC_3 ,DMA channel 3 interrupt status" "Not active,Active" bitfld.long 0x1C 2. " ISE_EOC_2 ,DMA channel 2 interrupt status" "Not active,Active" bitfld.long 0x1C 1. " ISE_EOC_1 ,DMA channel 1 interrupt status" "Not active,Active" bitfld.long 0x1C 0. " ISE_EOC_0 ,DMA channel 0 interrupt status" "Not active,Active" group.long 0x34++0x0B line.long 0x00 "CHANNEL_EN_REG_0,Channel Counter Enable registers" bitfld.long 0x00 31. " CH31_CNT_EN ,Enable the channel 31 count" "Disabled,Enabled" bitfld.long 0x00 30. " CH30_CNT_EN ,Enable the channel 30 count" "Disabled,Enabled" bitfld.long 0x00 29. " CH29_CNT_EN ,Enable the channel 29 count" "Disabled,Enabled" bitfld.long 0x00 28. " CH28_CNT_EN ,Enable the channel 28 count" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " CH27_CNT_EN ,Enable the channel 27 count" "Disabled,Enabled" bitfld.long 0x00 26. " CH26_CNT_EN ,Enable the channel 26 count" "Disabled,Enabled" bitfld.long 0x00 25. " CH25_CNT_EN ,Enable the channel 25 count" "Disabled,Enabled" bitfld.long 0x00 24. " CH24_CNT_EN ,Enable the channel 24 count" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " CH23_CNT_EN ,Enable the channel 23 count" "Disabled,Enabled" bitfld.long 0x00 22. " CH22_CNT_EN ,Enable the channel 22 count" "Disabled,Enabled" bitfld.long 0x00 21. " CH21_CNT_EN ,Enable the channel 21 count" "Disabled,Enabled" bitfld.long 0x00 20. " CH20_CNT_EN ,Enable the channel 20 count" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " CH19_CNT_EN ,Enable the channel 19 count" "Disabled,Enabled" bitfld.long 0x00 18. " CH18_CNT_EN ,Enable the channel 18 count" "Disabled,Enabled" bitfld.long 0x00 17. " CH17_CNT_EN ,Enable the channel 17 count" "Disabled,Enabled" bitfld.long 0x00 16. " CH16_CNT_EN ,Enable the channel 16 count" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " CH15_CNT_EN ,Enable the channel 15 count" "Disabled,Enabled" bitfld.long 0x00 14. " CH14_CNT_EN ,Enable the channel 14 count" "Disabled,Enabled" bitfld.long 0x00 13. " CH13_CNT_EN ,Enable the channel 13 count" "Disabled,Enabled" bitfld.long 0x00 12. " CH12_CNT_EN ,Enable the channel 12 count" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " CH11_CNT_EN ,Enable the channel 11 count" "Disabled,Enabled" bitfld.long 0x00 10. " CH10_CNT_EN ,Enable the channel 10 count" "Disabled,Enabled" bitfld.long 0x00 9. " CH9_CNT_EN ,Enable the channel 9 count" "Disabled,Enabled" bitfld.long 0x00 8. " CH8_CNT_EN ,Enable the channel 8 count" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CH7_CNT_EN ,Enable the channel 7 count" "Disabled,Enabled" bitfld.long 0x00 6. " CH6_CNT_EN ,Enable the channel 6 count" "Disabled,Enabled" bitfld.long 0x00 5. " CH5_CNT_EN ,Enable the channel 5 count" "Disabled,Enabled" bitfld.long 0x00 4. " CH4_CNT_EN ,Enable the channel 4 count" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CH3_CNT_EN ,Enable the channel 3 count" "Disabled,Enabled" bitfld.long 0x00 2. " CH2_CNT_EN ,Enable the channel 2 count" "Disabled,Enabled" bitfld.long 0x00 1. " CH1_CNT_EN ,Enable the channel 1 count" "Disabled,Enabled" bitfld.long 0x00 0. " CH0_CNT_EN ,Enable the channel 0 count" "Disabled,Enabled" line.long 0x04 "SECURITY_REG_0,Security Enables for Each Channel" bitfld.long 0x04 31. " CH_31_SECURITY_EN ,Enables secure channel 31" "Disabled,Enabled" bitfld.long 0x04 30. " CH_30_SECURITY_EN ,Enables secure channel 30" "Disabled,Enabled" bitfld.long 0x04 29. " CH_29_SECURITY_EN ,Enables secure channel 29" "Disabled,Enabled" bitfld.long 0x04 28. " CH_28_SECURITY_EN ,Enables secure channel 28" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " CH_27_SECURITY_EN ,Enables secure channel 27" "Disabled,Enabled" bitfld.long 0x04 26. " CH_26_SECURITY_EN ,Enables secure channel 26" "Disabled,Enabled" bitfld.long 0x04 25. " CH_25_SECURITY_EN ,Enables secure channel 25" "Disabled,Enabled" bitfld.long 0x04 24. " CH_24_SECURITY_EN ,Enables secure channel 24" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " CH_23_SECURITY_EN ,Enables secure channel 23" "Disabled,Enabled" bitfld.long 0x04 22. " CH_22_SECURITY_EN ,Enables secure channel 22" "Disabled,Enabled" bitfld.long 0x04 21. " CH_21_SECURITY_EN ,Enables secure channel 21" "Disabled,Enabled" bitfld.long 0x04 20. " CH_20_SECURITY_EN ,Enables secure channel 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " CH_19_SECURITY_EN ,Enables secure channel 19" "Disabled,Enabled" bitfld.long 0x04 18. " CH_18_SECURITY_EN ,Enables secure channel 18" "Disabled,Enabled" bitfld.long 0x04 17. " CH_17_SECURITY_EN ,Enables secure channel 17" "Disabled,Enabled" bitfld.long 0x04 16. " CH_16_SECURITY_EN ,Enables secure channel 16" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " CH_15_SECURITY_EN ,Enables secure channel 15" "Disabled,Enabled" bitfld.long 0x04 14. " CH_14_SECURITY_EN ,Enables secure channel 14" "Disabled,Enabled" bitfld.long 0x04 13. " CH_13_SECURITY_EN ,Enables secure channel 13" "Disabled,Enabled" bitfld.long 0x04 12. " CH_12_SECURITY_EN ,Enables secure channel 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " CH_11_SECURITY_EN ,Enables secure channel 11" "Disabled,Enabled" bitfld.long 0x04 10. " CH_10_SECURITY_EN ,Enables secure channel 10" "Disabled,Enabled" bitfld.long 0x04 9. " CH_9_SECURITY_EN ,Enables secure channel 9" "Disabled,Enabled" bitfld.long 0x04 8. " CH_8_SECURITY_EN ,Enables secure channel 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " CH_7_SECURITY_EN ,Enables secure channel 7" "Disabled,Enabled" bitfld.long 0x04 6. " CH_6_SECURITY_EN ,Enables secure channel 6" "Disabled,Enabled" bitfld.long 0x04 5. " CH_5_SECURITY_EN ,Enables secure channel 5" "Disabled,Enabled" bitfld.long 0x04 4. " CH_4_SECURITY_EN ,Enables secure channel 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " CH_3_SECURITY_EN ,Enables secure channel 3" "Disabled,Enabled" bitfld.long 0x04 2. " CH_2_SECURITY_EN ,Enables secure channel 2" "Disabled,Enabled" bitfld.long 0x04 1. " CH_1_SECURITY_EN ,Enables secure channel 1" "Disabled,Enabled" bitfld.long 0x04 0. " CH_0_SECURITY_EN ,Enables secure channel 0" "Disabled,Enabled" line.long 0x08 "CHANNEL_SWID_0,Supports Secure Writes 0" bitfld.long 0x08 31. " CH_31_SWID ,SWID for Channel 31" "0,1" bitfld.long 0x08 30. " CH_30_SWID ,SWID for Channel 30" "0,1" bitfld.long 0x08 29. " CH_29_SWID ,SWID for Channel 29" "0,1" bitfld.long 0x08 28. " CH_28_SWID ,SWID for Channel 28" "0,1" textline " " bitfld.long 0x08 27. " CH_27_SWID ,SWID for Channel 27" "0,1" bitfld.long 0x08 26. " CH_26_SWID ,SWID for Channel 26" "0,1" bitfld.long 0x08 25. " CH_25_SWID ,SWID for Channel 25" "0,1" bitfld.long 0x08 24. " CH_24_SWID ,SWID for Channel 24" "0,1" textline " " bitfld.long 0x08 23. " CH_23_SWID ,SWID for Channel 23" "0,1" bitfld.long 0x08 22. " CH_22_SWID ,SWID for Channel 22" "0,1" bitfld.long 0x08 21. " CH_21_SWID ,SWID for Channel 21" "0,1" bitfld.long 0x08 20. " CH_20_SWID ,SWID for Channel 20" "0,1" textline " " bitfld.long 0x08 19. " CH_19_SWID ,SWID for Channel 19" "0,1" bitfld.long 0x08 18. " CH_18_SWID ,SWID for Channel 18" "0,1" bitfld.long 0x08 17. " CH_17_SWID ,SWID for Channel 17" "0,1" bitfld.long 0x08 16. " CH_16_SWID ,SWID for Channel 16" "0,1" textline " " bitfld.long 0x08 15. " CH_15_SWID ,SWID for Channel 15" "0,1" bitfld.long 0x08 14. " CH_14_SWID ,SWID for Channel 14" "0,1" bitfld.long 0x08 13. " CH_13_SWID ,SWID for Channel 13" "0,1" bitfld.long 0x08 12. " CH_12_SWID ,SWID for Channel 12" "0,1" textline " " bitfld.long 0x08 11. " CH_11_SWID ,SWID for Channel 11" "0,1" bitfld.long 0x08 10. " CH_10_SWID ,SWID for Channel 10" "0,1" bitfld.long 0x08 9. " CH_9_SWID ,SWID for Channel 9" "0,1" bitfld.long 0x08 8. " CH_8_SWID ,SWID for Channel 8" "0,1" textline " " bitfld.long 0x08 7. " CH_7_SWID ,SWID for Channel 7" "0,1" bitfld.long 0x08 6. " CH_6_SWID ,SWID for Channel 6" "0,1" bitfld.long 0x08 5. " CH_5_SWID ,SWID for Channel 5" "0,1" bitfld.long 0x08 4. " CH_4_SWID ,SWID for Channel 4" "0,1" textline " " bitfld.long 0x08 3. " CH_3_SWID ,SWID for Channel 3" "0,1" bitfld.long 0x08 2. " CH_2_SWID ,SWID for Channel 2" "0,1" bitfld.long 0x08 1. " CH_1_SWID ,SWID for Channel 1" "0,1" bitfld.long 0x08 0. " CH_0_SWID ,SWID for Channel 0" "0,1" group.long 0x44++0x13 line.long 0x00 "CHAN_WT_REG0_0,Channel Weights for Weighted-Round-Robin Arbitration 0" bitfld.long 0x00 28.--31. " WT_CH31 ,Weight of channel 31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " WT_CH30 ,Weight of channel 30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " WT_CH29 ,Weight of channel 29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " WT_CH28 ,Weight of channel 28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " WT_CH27 ,Weight of channel 27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " WT_CH26 ,Weight of channel 26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " WT_CH25 ,Weight of channel 25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " WT_CH24 ,Weight of channel 24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CHAN_WT_REG1_0,Channel Weights for Weighted-Round-Robin Arbitration 1" bitfld.long 0x04 28.--31. " WT_CH23 ,Weight of channel 23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--27. " WT_CH22 ,Weight of channel 22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " WT_CH21 ,Weight of channel 21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " WT_CH20 ,Weight of channel 20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12.--15. " WT_CH19 ,Weight of channel 19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " WT_CH18 ,Weight of channel 18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " WT_CH17 ,Weight of channel 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " WT_CH16 ,Weight of channel 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CHAN_WT_REG2_0,Channel Weights for Weighted-Round-Robin Arbitration 2" bitfld.long 0x08 28.--31. " WT_CH15 ,Weight of channel 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. " WT_CH14 ,Weight of channel 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. " WT_CH13 ,Weight of channel 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " WT_CH12 ,Weight of channel 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 12.--15. " WT_CH11 ,Weight of channel 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " WT_CH10 ,Weight of channel 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " WT_CH9 ,Weight of channel 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " WT_CH8 ,Weight of channel 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CHAN_WT_REG3_0,Channel Weights for Weighted-Round-Robin Arbitration 3" bitfld.long 0x0C 28.--31. " WT_CH7 ,Weight of channel 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. " WT_CH6 ,Weight of channel 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. " WT_CH5 ,Weight of channel 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. " WT_CH4 ,Weight of channel 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 12.--15. " WT_CH3 ,Weight of channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. " WT_CH2 ,Weight of channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 4.--7. " WT_CH1 ,Weight of channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " WT_CH0 ,Weight of channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "CHANNEL_SWID1_0,Supports Secure Writes 1" bitfld.long 0x10 31. " CH_31_SWID_1 ,SWID_1 for Channel 31" "0,1" bitfld.long 0x10 30. " CH_30_SWID_1 ,SWID_1 for Channel 30" "0,1" bitfld.long 0x10 29. " CH_29_SWID_1 ,SWID_1 for Channel 29" "0,1" bitfld.long 0x10 28. " CH_28_SWID_1 ,SWID_1 for Channel 28" "0,1" textline " " bitfld.long 0x10 27. " CH_27_SWID_1 ,SWID_1 for Channel 27" "0,1" bitfld.long 0x10 26. " CH_26_SWID_1 ,SWID_1 for Channel 26" "0,1" bitfld.long 0x10 25. " CH_25_SWID_1 ,SWID_1 for Channel 25" "0,1" bitfld.long 0x10 24. " CH_24_SWID_1 ,SWID_1 for Channel 24" "0,1" textline " " bitfld.long 0x10 23. " CH_23_SWID_1 ,SWID_1 for Channel 23" "0,1" bitfld.long 0x10 22. " CH_22_SWID_1 ,SWID_1 for Channel 22" "0,1" bitfld.long 0x10 21. " CH_21_SWID_1 ,SWID_1 for Channel 21" "0,1" bitfld.long 0x10 20. " CH_20_SWID_1 ,SWID_1 for Channel 20" "0,1" textline " " bitfld.long 0x10 19. " CH_19_SWID_1 ,SWID_1 for Channel 19" "0,1" bitfld.long 0x10 18. " CH_18_SWID_1 ,SWID_1 for Channel 18" "0,1" bitfld.long 0x10 17. " CH_17_SWID_1 ,SWID_1 for Channel 17" "0,1" bitfld.long 0x10 16. " CH_16_SWID_1 ,SWID_1 for Channel 16" "0,1" textline " " bitfld.long 0x10 15. " CH_15_SWID_1 ,SWID_1 for Channel 15" "0,1" bitfld.long 0x10 14. " CH_14_SWID_1 ,SWID_1 for Channel 14" "0,1" bitfld.long 0x10 13. " CH_13_SWID_1 ,SWID_1 for Channel 13" "0,1" bitfld.long 0x10 12. " CH_12_SWID_1 ,SWID_1 for Channel 12" "0,1" textline " " bitfld.long 0x10 11. " CH_11_SWID_1 ,SWID_1 for Channel 11" "0,1" bitfld.long 0x10 10. " CH_10_SWID_1 ,SWID_1 for Channel 10" "0,1" bitfld.long 0x10 9. " CH_9_SWID_1 ,SWID_1 for Channel 9" "0,1" bitfld.long 0x10 8. " CH_8_SWID_1 ,SWID_1 for Channel 8" "0,1" textline " " bitfld.long 0x10 7. " CH_7_SWID_1 ,SWID_1 for Channel 7" "0,1" bitfld.long 0x10 6. " CH_6_SWID_1 ,SWID_1 for Channel 6" "0,1" bitfld.long 0x10 5. " CH_5_SWID_1 ,SWID_1 for Channel 5" "0,1" bitfld.long 0x10 4. " CH_4_SWID_1 ,SWID_1 for Channel 4" "0,1" textline " " bitfld.long 0x10 3. " CH_3_SWID_1 ,SWID_1 for Channel 3" "0,1" bitfld.long 0x10 2. " CH_2_SWID_1 ,SWID_1 for Channel 2" "0,1" bitfld.long 0x10 1. " CH_1_SWID_1 ,SWID_1 for Channel 1" "0,1" bitfld.long 0x10 0. " CH_0_SWID_1 ,SWID_1 for Channel 0" "0,1" tree.end base ad:0x60021000 width 28. tree "DMA Channel 0" group.long 0x0++0x07 line.long 0x00 "CHANNEL_0_CSR_0,Control Register 0" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x0+0x04)++0x07 line.long 0x00 "CHANNEL_0_STA_0,Status Register 0" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x0+0x04)++0x07 line.long 0x00 "CHANNEL_0_STA_0,Status Register 0" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x0+0x08)++0x03 line.long 0x00 "CHANNEL_0_DMA_BYTE_STA_0,DMA Byte Status Register 0" group.long (0x0+0x0C)++0x17 line.long 0x00 "CHANNEL_0_CSRE_0,Control-Extended Register 0" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_0_AHB_PTR_0,AHB Starting Address Pointer Register 0" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_0_AHB_SEQ_0,AHB Address Sequencer Register 0" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_0_APB_PTR_0,APB Starting Address Pointer Register 0" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_0_APB_SEQ_0,APB Address Sequencer Assignments 0" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_0_WCOUNT_0, Word Count Register 0" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x0+0x24)++0x03 line.long 0x00 "CHANNEL_0_WORD_TRANSFER_0,Word Transfer Register 0" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 1" group.long 0x40++0x07 line.long 0x00 "CHANNEL_1_CSR_0,Control Register 1" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x40+0x04)++0x07 line.long 0x00 "CHANNEL_1_STA_0,Status Register 1" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x40+0x04)++0x07 line.long 0x00 "CHANNEL_1_STA_0,Status Register 1" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x40+0x08)++0x03 line.long 0x00 "CHANNEL_1_DMA_BYTE_STA_0,DMA Byte Status Register 1" group.long (0x40+0x0C)++0x17 line.long 0x00 "CHANNEL_1_CSRE_0,Control-Extended Register 1" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_1_AHB_PTR_0,AHB Starting Address Pointer Register 1" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_1_AHB_SEQ_0,AHB Address Sequencer Register 1" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_1_APB_PTR_0,APB Starting Address Pointer Register 1" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_1_APB_SEQ_0,APB Address Sequencer Assignments 1" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_1_WCOUNT_0, Word Count Register 1" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x40+0x24)++0x03 line.long 0x00 "CHANNEL_1_WORD_TRANSFER_0,Word Transfer Register 1" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 2" group.long 0x80++0x07 line.long 0x00 "CHANNEL_2_CSR_0,Control Register 2" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x80+0x04)++0x07 line.long 0x00 "CHANNEL_2_STA_0,Status Register 2" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x80+0x04)++0x07 line.long 0x00 "CHANNEL_2_STA_0,Status Register 2" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x80+0x08)++0x03 line.long 0x00 "CHANNEL_2_DMA_BYTE_STA_0,DMA Byte Status Register 2" group.long (0x80+0x0C)++0x17 line.long 0x00 "CHANNEL_2_CSRE_0,Control-Extended Register 2" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_2_AHB_PTR_0,AHB Starting Address Pointer Register 2" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_2_AHB_SEQ_0,AHB Address Sequencer Register 2" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_2_APB_PTR_0,APB Starting Address Pointer Register 2" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_2_APB_SEQ_0,APB Address Sequencer Assignments 2" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_2_WCOUNT_0, Word Count Register 2" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x80+0x24)++0x03 line.long 0x00 "CHANNEL_2_WORD_TRANSFER_0,Word Transfer Register 2" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 3" group.long 0xC0++0x07 line.long 0x00 "CHANNEL_3_CSR_0,Control Register 3" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0xC0+0x04)++0x07 line.long 0x00 "CHANNEL_3_STA_0,Status Register 3" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0xC0+0x04)++0x07 line.long 0x00 "CHANNEL_3_STA_0,Status Register 3" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0xC0+0x08)++0x03 line.long 0x00 "CHANNEL_3_DMA_BYTE_STA_0,DMA Byte Status Register 3" group.long (0xC0+0x0C)++0x17 line.long 0x00 "CHANNEL_3_CSRE_0,Control-Extended Register 3" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_3_AHB_PTR_0,AHB Starting Address Pointer Register 3" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_3_AHB_SEQ_0,AHB Address Sequencer Register 3" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_3_APB_PTR_0,APB Starting Address Pointer Register 3" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_3_APB_SEQ_0,APB Address Sequencer Assignments 3" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_3_WCOUNT_0, Word Count Register 3" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0xC0+0x24)++0x03 line.long 0x00 "CHANNEL_3_WORD_TRANSFER_0,Word Transfer Register 3" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 4" group.long 0x100++0x07 line.long 0x00 "CHANNEL_4_CSR_0,Control Register 4" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x100+0x04)++0x07 line.long 0x00 "CHANNEL_4_STA_0,Status Register 4" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x100+0x04)++0x07 line.long 0x00 "CHANNEL_4_STA_0,Status Register 4" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x100+0x08)++0x03 line.long 0x00 "CHANNEL_4_DMA_BYTE_STA_0,DMA Byte Status Register 4" group.long (0x100+0x0C)++0x17 line.long 0x00 "CHANNEL_4_CSRE_0,Control-Extended Register 4" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_4_AHB_PTR_0,AHB Starting Address Pointer Register 4" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_4_AHB_SEQ_0,AHB Address Sequencer Register 4" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_4_APB_PTR_0,APB Starting Address Pointer Register 4" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_4_APB_SEQ_0,APB Address Sequencer Assignments 4" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_4_WCOUNT_0, Word Count Register 4" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x100+0x24)++0x03 line.long 0x00 "CHANNEL_4_WORD_TRANSFER_0,Word Transfer Register 4" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 5" group.long 0x140++0x07 line.long 0x00 "CHANNEL_5_CSR_0,Control Register 5" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x140+0x04)++0x07 line.long 0x00 "CHANNEL_5_STA_0,Status Register 5" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x140+0x04)++0x07 line.long 0x00 "CHANNEL_5_STA_0,Status Register 5" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x140+0x08)++0x03 line.long 0x00 "CHANNEL_5_DMA_BYTE_STA_0,DMA Byte Status Register 5" group.long (0x140+0x0C)++0x17 line.long 0x00 "CHANNEL_5_CSRE_0,Control-Extended Register 5" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_5_AHB_PTR_0,AHB Starting Address Pointer Register 5" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_5_AHB_SEQ_0,AHB Address Sequencer Register 5" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_5_APB_PTR_0,APB Starting Address Pointer Register 5" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_5_APB_SEQ_0,APB Address Sequencer Assignments 5" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_5_WCOUNT_0, Word Count Register 5" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x140+0x24)++0x03 line.long 0x00 "CHANNEL_5_WORD_TRANSFER_0,Word Transfer Register 5" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 6" group.long 0x180++0x07 line.long 0x00 "CHANNEL_6_CSR_0,Control Register 6" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x180+0x04)++0x07 line.long 0x00 "CHANNEL_6_STA_0,Status Register 6" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x180+0x04)++0x07 line.long 0x00 "CHANNEL_6_STA_0,Status Register 6" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x180+0x08)++0x03 line.long 0x00 "CHANNEL_6_DMA_BYTE_STA_0,DMA Byte Status Register 6" group.long (0x180+0x0C)++0x17 line.long 0x00 "CHANNEL_6_CSRE_0,Control-Extended Register 6" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_6_AHB_PTR_0,AHB Starting Address Pointer Register 6" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_6_AHB_SEQ_0,AHB Address Sequencer Register 6" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_6_APB_PTR_0,APB Starting Address Pointer Register 6" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_6_APB_SEQ_0,APB Address Sequencer Assignments 6" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_6_WCOUNT_0, Word Count Register 6" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x180+0x24)++0x03 line.long 0x00 "CHANNEL_6_WORD_TRANSFER_0,Word Transfer Register 6" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 7" group.long 0x1C0++0x07 line.long 0x00 "CHANNEL_7_CSR_0,Control Register 7" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x1C0+0x04)++0x07 line.long 0x00 "CHANNEL_7_STA_0,Status Register 7" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x1C0+0x04)++0x07 line.long 0x00 "CHANNEL_7_STA_0,Status Register 7" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x1C0+0x08)++0x03 line.long 0x00 "CHANNEL_7_DMA_BYTE_STA_0,DMA Byte Status Register 7" group.long (0x1C0+0x0C)++0x17 line.long 0x00 "CHANNEL_7_CSRE_0,Control-Extended Register 7" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_7_AHB_PTR_0,AHB Starting Address Pointer Register 7" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_7_AHB_SEQ_0,AHB Address Sequencer Register 7" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_7_APB_PTR_0,APB Starting Address Pointer Register 7" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_7_APB_SEQ_0,APB Address Sequencer Assignments 7" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_7_WCOUNT_0, Word Count Register 7" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x1C0+0x24)++0x03 line.long 0x00 "CHANNEL_7_WORD_TRANSFER_0,Word Transfer Register 7" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 8" group.long 0x200++0x07 line.long 0x00 "CHANNEL_8_CSR_0,Control Register 8" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x200+0x04)++0x07 line.long 0x00 "CHANNEL_8_STA_0,Status Register 8" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x200+0x04)++0x07 line.long 0x00 "CHANNEL_8_STA_0,Status Register 8" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x200+0x08)++0x03 line.long 0x00 "CHANNEL_8_DMA_BYTE_STA_0,DMA Byte Status Register 8" group.long (0x200+0x0C)++0x17 line.long 0x00 "CHANNEL_8_CSRE_0,Control-Extended Register 8" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_8_AHB_PTR_0,AHB Starting Address Pointer Register 8" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_8_AHB_SEQ_0,AHB Address Sequencer Register 8" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_8_APB_PTR_0,APB Starting Address Pointer Register 8" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_8_APB_SEQ_0,APB Address Sequencer Assignments 8" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_8_WCOUNT_0, Word Count Register 8" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x200+0x24)++0x03 line.long 0x00 "CHANNEL_8_WORD_TRANSFER_0,Word Transfer Register 8" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 9" group.long 0x240++0x07 line.long 0x00 "CHANNEL_9_CSR_0,Control Register 9" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x240+0x04)++0x07 line.long 0x00 "CHANNEL_9_STA_0,Status Register 9" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x240+0x04)++0x07 line.long 0x00 "CHANNEL_9_STA_0,Status Register 9" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x240+0x08)++0x03 line.long 0x00 "CHANNEL_9_DMA_BYTE_STA_0,DMA Byte Status Register 9" group.long (0x240+0x0C)++0x17 line.long 0x00 "CHANNEL_9_CSRE_0,Control-Extended Register 9" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_9_AHB_PTR_0,AHB Starting Address Pointer Register 9" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_9_AHB_SEQ_0,AHB Address Sequencer Register 9" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_9_APB_PTR_0,APB Starting Address Pointer Register 9" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_9_APB_SEQ_0,APB Address Sequencer Assignments 9" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_9_WCOUNT_0, Word Count Register 9" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x240+0x24)++0x03 line.long 0x00 "CHANNEL_9_WORD_TRANSFER_0,Word Transfer Register 9" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 10" group.long 0x280++0x07 line.long 0x00 "CHANNEL_10_CSR_0,Control Register 10" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x280+0x04)++0x07 line.long 0x00 "CHANNEL_10_STA_0,Status Register 10" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x280+0x04)++0x07 line.long 0x00 "CHANNEL_10_STA_0,Status Register 10" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x280+0x08)++0x03 line.long 0x00 "CHANNEL_10_DMA_BYTE_STA_0,DMA Byte Status Register 10" group.long (0x280+0x0C)++0x17 line.long 0x00 "CHANNEL_10_CSRE_0,Control-Extended Register 10" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_10_AHB_PTR_0,AHB Starting Address Pointer Register 10" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_10_AHB_SEQ_0,AHB Address Sequencer Register 10" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_10_APB_PTR_0,APB Starting Address Pointer Register 10" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_10_APB_SEQ_0,APB Address Sequencer Assignments 10" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_10_WCOUNT_0, Word Count Register 10" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x280+0x24)++0x03 line.long 0x00 "CHANNEL_10_WORD_TRANSFER_0,Word Transfer Register 10" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 11" group.long 0x2C0++0x07 line.long 0x00 "CHANNEL_11_CSR_0,Control Register 11" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x2C0+0x04)++0x07 line.long 0x00 "CHANNEL_11_STA_0,Status Register 11" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x2C0+0x04)++0x07 line.long 0x00 "CHANNEL_11_STA_0,Status Register 11" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x2C0+0x08)++0x03 line.long 0x00 "CHANNEL_11_DMA_BYTE_STA_0,DMA Byte Status Register 11" group.long (0x2C0+0x0C)++0x17 line.long 0x00 "CHANNEL_11_CSRE_0,Control-Extended Register 11" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_11_AHB_PTR_0,AHB Starting Address Pointer Register 11" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_11_AHB_SEQ_0,AHB Address Sequencer Register 11" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_11_APB_PTR_0,APB Starting Address Pointer Register 11" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_11_APB_SEQ_0,APB Address Sequencer Assignments 11" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_11_WCOUNT_0, Word Count Register 11" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x2C0+0x24)++0x03 line.long 0x00 "CHANNEL_11_WORD_TRANSFER_0,Word Transfer Register 11" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 12" group.long 0x300++0x07 line.long 0x00 "CHANNEL_12_CSR_0,Control Register 12" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x300+0x04)++0x07 line.long 0x00 "CHANNEL_12_STA_0,Status Register 12" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x300+0x04)++0x07 line.long 0x00 "CHANNEL_12_STA_0,Status Register 12" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x300+0x08)++0x03 line.long 0x00 "CHANNEL_12_DMA_BYTE_STA_0,DMA Byte Status Register 12" group.long (0x300+0x0C)++0x17 line.long 0x00 "CHANNEL_12_CSRE_0,Control-Extended Register 12" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_12_AHB_PTR_0,AHB Starting Address Pointer Register 12" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_12_AHB_SEQ_0,AHB Address Sequencer Register 12" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_12_APB_PTR_0,APB Starting Address Pointer Register 12" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_12_APB_SEQ_0,APB Address Sequencer Assignments 12" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_12_WCOUNT_0, Word Count Register 12" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x300+0x24)++0x03 line.long 0x00 "CHANNEL_12_WORD_TRANSFER_0,Word Transfer Register 12" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 13" group.long 0x340++0x07 line.long 0x00 "CHANNEL_13_CSR_0,Control Register 13" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x340+0x04)++0x07 line.long 0x00 "CHANNEL_13_STA_0,Status Register 13" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x340+0x04)++0x07 line.long 0x00 "CHANNEL_13_STA_0,Status Register 13" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x340+0x08)++0x03 line.long 0x00 "CHANNEL_13_DMA_BYTE_STA_0,DMA Byte Status Register 13" group.long (0x340+0x0C)++0x17 line.long 0x00 "CHANNEL_13_CSRE_0,Control-Extended Register 13" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_13_AHB_PTR_0,AHB Starting Address Pointer Register 13" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_13_AHB_SEQ_0,AHB Address Sequencer Register 13" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_13_APB_PTR_0,APB Starting Address Pointer Register 13" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_13_APB_SEQ_0,APB Address Sequencer Assignments 13" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_13_WCOUNT_0, Word Count Register 13" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x340+0x24)++0x03 line.long 0x00 "CHANNEL_13_WORD_TRANSFER_0,Word Transfer Register 13" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 14" group.long 0x380++0x07 line.long 0x00 "CHANNEL_14_CSR_0,Control Register 14" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x380+0x04)++0x07 line.long 0x00 "CHANNEL_14_STA_0,Status Register 14" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x380+0x04)++0x07 line.long 0x00 "CHANNEL_14_STA_0,Status Register 14" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x380+0x08)++0x03 line.long 0x00 "CHANNEL_14_DMA_BYTE_STA_0,DMA Byte Status Register 14" group.long (0x380+0x0C)++0x17 line.long 0x00 "CHANNEL_14_CSRE_0,Control-Extended Register 14" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_14_AHB_PTR_0,AHB Starting Address Pointer Register 14" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_14_AHB_SEQ_0,AHB Address Sequencer Register 14" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_14_APB_PTR_0,APB Starting Address Pointer Register 14" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_14_APB_SEQ_0,APB Address Sequencer Assignments 14" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_14_WCOUNT_0, Word Count Register 14" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x380+0x24)++0x03 line.long 0x00 "CHANNEL_14_WORD_TRANSFER_0,Word Transfer Register 14" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 15" group.long 0x3C0++0x07 line.long 0x00 "CHANNEL_15_CSR_0,Control Register 15" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x3C0+0x04)++0x07 line.long 0x00 "CHANNEL_15_STA_0,Status Register 15" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x3C0+0x04)++0x07 line.long 0x00 "CHANNEL_15_STA_0,Status Register 15" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x3C0+0x08)++0x03 line.long 0x00 "CHANNEL_15_DMA_BYTE_STA_0,DMA Byte Status Register 15" group.long (0x3C0+0x0C)++0x17 line.long 0x00 "CHANNEL_15_CSRE_0,Control-Extended Register 15" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_15_AHB_PTR_0,AHB Starting Address Pointer Register 15" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_15_AHB_SEQ_0,AHB Address Sequencer Register 15" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_15_APB_PTR_0,APB Starting Address Pointer Register 15" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_15_APB_SEQ_0,APB Address Sequencer Assignments 15" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_15_WCOUNT_0, Word Count Register 15" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x3C0+0x24)++0x03 line.long 0x00 "CHANNEL_15_WORD_TRANSFER_0,Word Transfer Register 15" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 16" group.long 0x400++0x07 line.long 0x00 "CHANNEL_16_CSR_0,Control Register 16" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x400+0x04)++0x07 line.long 0x00 "CHANNEL_16_STA_0,Status Register 16" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x400+0x04)++0x07 line.long 0x00 "CHANNEL_16_STA_0,Status Register 16" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x400+0x08)++0x03 line.long 0x00 "CHANNEL_16_DMA_BYTE_STA_0,DMA Byte Status Register 16" group.long (0x400+0x0C)++0x17 line.long 0x00 "CHANNEL_16_CSRE_0,Control-Extended Register 16" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_16_AHB_PTR_0,AHB Starting Address Pointer Register 16" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_16_AHB_SEQ_0,AHB Address Sequencer Register 16" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_16_APB_PTR_0,APB Starting Address Pointer Register 16" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_16_APB_SEQ_0,APB Address Sequencer Assignments 16" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_16_WCOUNT_0, Word Count Register 16" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x400+0x24)++0x03 line.long 0x00 "CHANNEL_16_WORD_TRANSFER_0,Word Transfer Register 16" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 17" group.long 0x440++0x07 line.long 0x00 "CHANNEL_17_CSR_0,Control Register 17" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x440+0x04)++0x07 line.long 0x00 "CHANNEL_17_STA_0,Status Register 17" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x440+0x04)++0x07 line.long 0x00 "CHANNEL_17_STA_0,Status Register 17" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x440+0x08)++0x03 line.long 0x00 "CHANNEL_17_DMA_BYTE_STA_0,DMA Byte Status Register 17" group.long (0x440+0x0C)++0x17 line.long 0x00 "CHANNEL_17_CSRE_0,Control-Extended Register 17" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_17_AHB_PTR_0,AHB Starting Address Pointer Register 17" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_17_AHB_SEQ_0,AHB Address Sequencer Register 17" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_17_APB_PTR_0,APB Starting Address Pointer Register 17" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_17_APB_SEQ_0,APB Address Sequencer Assignments 17" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_17_WCOUNT_0, Word Count Register 17" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x440+0x24)++0x03 line.long 0x00 "CHANNEL_17_WORD_TRANSFER_0,Word Transfer Register 17" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 18" group.long 0x480++0x07 line.long 0x00 "CHANNEL_18_CSR_0,Control Register 18" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x480+0x04)++0x07 line.long 0x00 "CHANNEL_18_STA_0,Status Register 18" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x480+0x04)++0x07 line.long 0x00 "CHANNEL_18_STA_0,Status Register 18" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x480+0x08)++0x03 line.long 0x00 "CHANNEL_18_DMA_BYTE_STA_0,DMA Byte Status Register 18" group.long (0x480+0x0C)++0x17 line.long 0x00 "CHANNEL_18_CSRE_0,Control-Extended Register 18" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_18_AHB_PTR_0,AHB Starting Address Pointer Register 18" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_18_AHB_SEQ_0,AHB Address Sequencer Register 18" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_18_APB_PTR_0,APB Starting Address Pointer Register 18" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_18_APB_SEQ_0,APB Address Sequencer Assignments 18" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_18_WCOUNT_0, Word Count Register 18" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x480+0x24)++0x03 line.long 0x00 "CHANNEL_18_WORD_TRANSFER_0,Word Transfer Register 18" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 19" group.long 0x4C0++0x07 line.long 0x00 "CHANNEL_19_CSR_0,Control Register 19" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x4C0+0x04)++0x07 line.long 0x00 "CHANNEL_19_STA_0,Status Register 19" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x4C0+0x04)++0x07 line.long 0x00 "CHANNEL_19_STA_0,Status Register 19" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x4C0+0x08)++0x03 line.long 0x00 "CHANNEL_19_DMA_BYTE_STA_0,DMA Byte Status Register 19" group.long (0x4C0+0x0C)++0x17 line.long 0x00 "CHANNEL_19_CSRE_0,Control-Extended Register 19" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_19_AHB_PTR_0,AHB Starting Address Pointer Register 19" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_19_AHB_SEQ_0,AHB Address Sequencer Register 19" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_19_APB_PTR_0,APB Starting Address Pointer Register 19" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_19_APB_SEQ_0,APB Address Sequencer Assignments 19" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_19_WCOUNT_0, Word Count Register 19" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x4C0+0x24)++0x03 line.long 0x00 "CHANNEL_19_WORD_TRANSFER_0,Word Transfer Register 19" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 20" group.long 0x500++0x07 line.long 0x00 "CHANNEL_20_CSR_0,Control Register 20" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x500+0x04)++0x07 line.long 0x00 "CHANNEL_20_STA_0,Status Register 20" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x500+0x04)++0x07 line.long 0x00 "CHANNEL_20_STA_0,Status Register 20" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x500+0x08)++0x03 line.long 0x00 "CHANNEL_20_DMA_BYTE_STA_0,DMA Byte Status Register 20" group.long (0x500+0x0C)++0x17 line.long 0x00 "CHANNEL_20_CSRE_0,Control-Extended Register 20" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_20_AHB_PTR_0,AHB Starting Address Pointer Register 20" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_20_AHB_SEQ_0,AHB Address Sequencer Register 20" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_20_APB_PTR_0,APB Starting Address Pointer Register 20" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_20_APB_SEQ_0,APB Address Sequencer Assignments 20" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_20_WCOUNT_0, Word Count Register 20" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x500+0x24)++0x03 line.long 0x00 "CHANNEL_20_WORD_TRANSFER_0,Word Transfer Register 20" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 21" group.long 0x540++0x07 line.long 0x00 "CHANNEL_21_CSR_0,Control Register 21" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x540+0x04)++0x07 line.long 0x00 "CHANNEL_21_STA_0,Status Register 21" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x540+0x04)++0x07 line.long 0x00 "CHANNEL_21_STA_0,Status Register 21" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x540+0x08)++0x03 line.long 0x00 "CHANNEL_21_DMA_BYTE_STA_0,DMA Byte Status Register 21" group.long (0x540+0x0C)++0x17 line.long 0x00 "CHANNEL_21_CSRE_0,Control-Extended Register 21" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_21_AHB_PTR_0,AHB Starting Address Pointer Register 21" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_21_AHB_SEQ_0,AHB Address Sequencer Register 21" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_21_APB_PTR_0,APB Starting Address Pointer Register 21" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_21_APB_SEQ_0,APB Address Sequencer Assignments 21" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_21_WCOUNT_0, Word Count Register 21" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x540+0x24)++0x03 line.long 0x00 "CHANNEL_21_WORD_TRANSFER_0,Word Transfer Register 21" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 22" group.long 0x580++0x07 line.long 0x00 "CHANNEL_22_CSR_0,Control Register 22" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x580+0x04)++0x07 line.long 0x00 "CHANNEL_22_STA_0,Status Register 22" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x580+0x04)++0x07 line.long 0x00 "CHANNEL_22_STA_0,Status Register 22" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x580+0x08)++0x03 line.long 0x00 "CHANNEL_22_DMA_BYTE_STA_0,DMA Byte Status Register 22" group.long (0x580+0x0C)++0x17 line.long 0x00 "CHANNEL_22_CSRE_0,Control-Extended Register 22" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_22_AHB_PTR_0,AHB Starting Address Pointer Register 22" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_22_AHB_SEQ_0,AHB Address Sequencer Register 22" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_22_APB_PTR_0,APB Starting Address Pointer Register 22" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_22_APB_SEQ_0,APB Address Sequencer Assignments 22" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_22_WCOUNT_0, Word Count Register 22" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x580+0x24)++0x03 line.long 0x00 "CHANNEL_22_WORD_TRANSFER_0,Word Transfer Register 22" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 23" group.long 0x5C0++0x07 line.long 0x00 "CHANNEL_23_CSR_0,Control Register 23" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x5C0+0x04)++0x07 line.long 0x00 "CHANNEL_23_STA_0,Status Register 23" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x5C0+0x04)++0x07 line.long 0x00 "CHANNEL_23_STA_0,Status Register 23" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x5C0+0x08)++0x03 line.long 0x00 "CHANNEL_23_DMA_BYTE_STA_0,DMA Byte Status Register 23" group.long (0x5C0+0x0C)++0x17 line.long 0x00 "CHANNEL_23_CSRE_0,Control-Extended Register 23" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_23_AHB_PTR_0,AHB Starting Address Pointer Register 23" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_23_AHB_SEQ_0,AHB Address Sequencer Register 23" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_23_APB_PTR_0,APB Starting Address Pointer Register 23" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_23_APB_SEQ_0,APB Address Sequencer Assignments 23" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_23_WCOUNT_0, Word Count Register 23" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x5C0+0x24)++0x03 line.long 0x00 "CHANNEL_23_WORD_TRANSFER_0,Word Transfer Register 23" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 24" group.long 0x600++0x07 line.long 0x00 "CHANNEL_24_CSR_0,Control Register 24" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x600+0x04)++0x07 line.long 0x00 "CHANNEL_24_STA_0,Status Register 24" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x600+0x04)++0x07 line.long 0x00 "CHANNEL_24_STA_0,Status Register 24" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x600+0x08)++0x03 line.long 0x00 "CHANNEL_24_DMA_BYTE_STA_0,DMA Byte Status Register 24" group.long (0x600+0x0C)++0x17 line.long 0x00 "CHANNEL_24_CSRE_0,Control-Extended Register 24" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_24_AHB_PTR_0,AHB Starting Address Pointer Register 24" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_24_AHB_SEQ_0,AHB Address Sequencer Register 24" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_24_APB_PTR_0,APB Starting Address Pointer Register 24" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_24_APB_SEQ_0,APB Address Sequencer Assignments 24" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_24_WCOUNT_0, Word Count Register 24" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x600+0x24)++0x03 line.long 0x00 "CHANNEL_24_WORD_TRANSFER_0,Word Transfer Register 24" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 25" group.long 0x640++0x07 line.long 0x00 "CHANNEL_25_CSR_0,Control Register 25" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x640+0x04)++0x07 line.long 0x00 "CHANNEL_25_STA_0,Status Register 25" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x640+0x04)++0x07 line.long 0x00 "CHANNEL_25_STA_0,Status Register 25" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x640+0x08)++0x03 line.long 0x00 "CHANNEL_25_DMA_BYTE_STA_0,DMA Byte Status Register 25" group.long (0x640+0x0C)++0x17 line.long 0x00 "CHANNEL_25_CSRE_0,Control-Extended Register 25" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_25_AHB_PTR_0,AHB Starting Address Pointer Register 25" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_25_AHB_SEQ_0,AHB Address Sequencer Register 25" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_25_APB_PTR_0,APB Starting Address Pointer Register 25" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_25_APB_SEQ_0,APB Address Sequencer Assignments 25" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_25_WCOUNT_0, Word Count Register 25" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x640+0x24)++0x03 line.long 0x00 "CHANNEL_25_WORD_TRANSFER_0,Word Transfer Register 25" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 26" group.long 0x680++0x07 line.long 0x00 "CHANNEL_26_CSR_0,Control Register 26" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x680+0x04)++0x07 line.long 0x00 "CHANNEL_26_STA_0,Status Register 26" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x680+0x04)++0x07 line.long 0x00 "CHANNEL_26_STA_0,Status Register 26" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x680+0x08)++0x03 line.long 0x00 "CHANNEL_26_DMA_BYTE_STA_0,DMA Byte Status Register 26" group.long (0x680+0x0C)++0x17 line.long 0x00 "CHANNEL_26_CSRE_0,Control-Extended Register 26" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_26_AHB_PTR_0,AHB Starting Address Pointer Register 26" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_26_AHB_SEQ_0,AHB Address Sequencer Register 26" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_26_APB_PTR_0,APB Starting Address Pointer Register 26" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_26_APB_SEQ_0,APB Address Sequencer Assignments 26" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_26_WCOUNT_0, Word Count Register 26" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x680+0x24)++0x03 line.long 0x00 "CHANNEL_26_WORD_TRANSFER_0,Word Transfer Register 26" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 27" group.long 0x6C0++0x07 line.long 0x00 "CHANNEL_27_CSR_0,Control Register 27" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x6C0+0x04)++0x07 line.long 0x00 "CHANNEL_27_STA_0,Status Register 27" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x6C0+0x04)++0x07 line.long 0x00 "CHANNEL_27_STA_0,Status Register 27" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x6C0+0x08)++0x03 line.long 0x00 "CHANNEL_27_DMA_BYTE_STA_0,DMA Byte Status Register 27" group.long (0x6C0+0x0C)++0x17 line.long 0x00 "CHANNEL_27_CSRE_0,Control-Extended Register 27" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_27_AHB_PTR_0,AHB Starting Address Pointer Register 27" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_27_AHB_SEQ_0,AHB Address Sequencer Register 27" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_27_APB_PTR_0,APB Starting Address Pointer Register 27" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_27_APB_SEQ_0,APB Address Sequencer Assignments 27" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_27_WCOUNT_0, Word Count Register 27" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x6C0+0x24)++0x03 line.long 0x00 "CHANNEL_27_WORD_TRANSFER_0,Word Transfer Register 27" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 28" group.long 0x700++0x07 line.long 0x00 "CHANNEL_28_CSR_0,Control Register 28" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x700+0x04)++0x07 line.long 0x00 "CHANNEL_28_STA_0,Status Register 28" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x700+0x04)++0x07 line.long 0x00 "CHANNEL_28_STA_0,Status Register 28" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x700+0x08)++0x03 line.long 0x00 "CHANNEL_28_DMA_BYTE_STA_0,DMA Byte Status Register 28" group.long (0x700+0x0C)++0x17 line.long 0x00 "CHANNEL_28_CSRE_0,Control-Extended Register 28" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_28_AHB_PTR_0,AHB Starting Address Pointer Register 28" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_28_AHB_SEQ_0,AHB Address Sequencer Register 28" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_28_APB_PTR_0,APB Starting Address Pointer Register 28" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_28_APB_SEQ_0,APB Address Sequencer Assignments 28" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_28_WCOUNT_0, Word Count Register 28" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x700+0x24)++0x03 line.long 0x00 "CHANNEL_28_WORD_TRANSFER_0,Word Transfer Register 28" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 29" group.long 0x740++0x07 line.long 0x00 "CHANNEL_29_CSR_0,Control Register 29" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x740+0x04)++0x07 line.long 0x00 "CHANNEL_29_STA_0,Status Register 29" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x740+0x04)++0x07 line.long 0x00 "CHANNEL_29_STA_0,Status Register 29" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x740+0x08)++0x03 line.long 0x00 "CHANNEL_29_DMA_BYTE_STA_0,DMA Byte Status Register 29" group.long (0x740+0x0C)++0x17 line.long 0x00 "CHANNEL_29_CSRE_0,Control-Extended Register 29" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_29_AHB_PTR_0,AHB Starting Address Pointer Register 29" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_29_AHB_SEQ_0,AHB Address Sequencer Register 29" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_29_APB_PTR_0,APB Starting Address Pointer Register 29" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_29_APB_SEQ_0,APB Address Sequencer Assignments 29" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_29_WCOUNT_0, Word Count Register 29" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x740+0x24)++0x03 line.long 0x00 "CHANNEL_29_WORD_TRANSFER_0,Word Transfer Register 29" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 30" group.long 0x780++0x07 line.long 0x00 "CHANNEL_30_CSR_0,Control Register 30" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x780+0x04)++0x07 line.long 0x00 "CHANNEL_30_STA_0,Status Register 30" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x780+0x04)++0x07 line.long 0x00 "CHANNEL_30_STA_0,Status Register 30" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x780+0x08)++0x03 line.long 0x00 "CHANNEL_30_DMA_BYTE_STA_0,DMA Byte Status Register 30" group.long (0x780+0x0C)++0x17 line.long 0x00 "CHANNEL_30_CSRE_0,Control-Extended Register 30" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_30_AHB_PTR_0,AHB Starting Address Pointer Register 30" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_30_AHB_SEQ_0,AHB Address Sequencer Register 30" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_30_APB_PTR_0,APB Starting Address Pointer Register 30" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_30_APB_SEQ_0,APB Address Sequencer Assignments 30" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_30_WCOUNT_0, Word Count Register 30" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x780+0x24)++0x03 line.long 0x00 "CHANNEL_30_WORD_TRANSFER_0,Word Transfer Register 30" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end tree "DMA Channel 31" group.long 0x7C0++0x07 line.long 0x00 "CHANNEL_31_CSR_0,Control Register 31" bitfld.long 0x00 31. " ENB ,Enable DMA channel transfer" "Disabled,Enabled" bitfld.long 0x00 30. " IE_EOC ,Interrupt when DMA block transfer completes" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " HOLD ,Hold this processor until DMA block transfer completes" "Disabled,Enabled" bitfld.long 0x00 28. " DIR ,DMA transfer direction" "AHB write,AHB read" textline " " bitfld.long 0x00 27. " ONCE ,Run once or run multiple mode" "Multiple,Single" bitfld.long 0x00 21. " FLOW ,Flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " REQ_SEL ,REQ select" "CNTR_REQ,APBIF_CH0,APBIF_CH1,APBIF_CH2,APBIF_CH3,QSPI,APBIF_CH4,APBIF_CH5,UART_A,UART_B,UART_C,DTV,APBIF_CH6,APBIF_CH7,APBIF_CH8,SL2B1,SL2B2,SL2B3,SL2B4,UART_D,,I2C,I2C2,I2C3,DVC_I2C,,I2C4,SL2B5,SL2B6,APBIF_CH9,I2C6,?..." if ((per.l(ad:0x60021000)&0x10000000)==0x10000000) group.long (0x7C0+0x04)++0x07 line.long 0x00 "CHANNEL_31_STA_0,Status Register 31" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PONG,PING" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" else group.long (0x7C0+0x04)++0x07 line.long 0x00 "CHANNEL_31_STA_0,Status Register 31" rbitfld.long 0x00 31. " BSY ,Indicates DMA channel active status" "Wait,Active" eventfld.long 0x00 30. " ISE_EOC ,Interrupt flag" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " HALT ,Holding status of processor" "No halt,Halt" rbitfld.long 0x00 28. " PING_PONG_STS ,Ping and pong buffers complete status" "PING,PONG" textline " " rbitfld.long 0x00 27. " DMA_ACTIVITY ,Indicates current DMA channel is transferring data" "Idle,Busy" rbitfld.long 0x00 26. " CHANNEL_PAUSE ,Indicates the status of channel pause" "Not paused,Paused" endif rgroup.long (0x7C0+0x08)++0x03 line.long 0x00 "CHANNEL_31_DMA_BYTE_STA_0,DMA Byte Status Register 31" group.long (0x7C0+0x0C)++0x17 line.long 0x00 "CHANNEL_31_CSRE_0,Control-Extended Register 31" bitfld.long 0x00 31. " CHANNEL_PAUSE ,Pauses data transfers on the channel" "Resumed,Paused" bitfld.long 0x00 14.--19. " TRIG_SEL ,Trigger select" "NA1,SMP24,SMP25,SMP26,SMP27,XRQ_A,XRQ_B,TMR1,TMR2,APB_0,APB_1,APB_2,APB_3,APB_4,APB_5,APB_6,APB_7,APB_8,APB_9,APB_10,APB_11,APB_12,APB_13,APB_14,APB_15,APB_16,APB_17,APB_18,APB_19,APB_20,APB_21,APB_22,APB_23,APB_24,APB_25,APB_26,APB_27,APB_28,APB_29,APB_30,APB_31,?..." line.long 0x04 "CHANNEL_31_AHB_PTR_0,AHB Starting Address Pointer Register 31" hexmask.long 0x04 2.--31. 0x04 " AHB_BASE ,Starting address for AHB bus" line.long 0x08 "CHANNEL_31_AHB_SEQ_0,AHB Address Sequencer Register 31" bitfld.long 0x08 31. " INTR_ENB ,INTR_ENB" "COP,CPU" bitfld.long 0x08 28.--30. " AHB_BUS_WIDTH ,AHB bus width" ",,32 bit,?..." textline " " bitfld.long 0x08 27. " AHB_DATA_SWAP ,Swap data going to AHB" "Disabled,Enabled" bitfld.long 0x08 24.--26. " AHB_BURST ,AHB burst size DMA burst length" ",,,,1 word,4 words,8 words,?..." textline " " bitfld.long 0x08 19. " DBL_BUF ,2X double buffering mode" "1X blocks,2X blocks" bitfld.long 0x08 16.--18. " WRAP ,AHV address wrap" "Disabled,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words" line.long 0x0C "CHANNEL_31_APB_PTR_0,APB Starting Address Pointer Register 31" hexmask.long 0x0C 2.--31. 0x04 " APB_BASE ,starting address for APB bus" line.long 0x10 "CHANNEL_31_APB_SEQ_0,APB Address Sequencer Assignments 31" bitfld.long 0x10 28.--30. " APB_BUS_WIDTH ,APB bus width" "8 bit,16 bit,32 bit,?..." bitfld.long 0x10 27. " APB_DATA_SWAP ,Swap data going to APB" "Disabled,Enabled" textline " " bitfld.long 0x10 16.--18. " APB_ADDR_WRAP ,APB address wrap" "Disabled,1 words,2 words,4 words,8 words,16 words,32 words,?..." line.long 0x14 "CHANNEL_31_WCOUNT_0, Word Count Register 31" hexmask.long 0x14 2.--29. 1. " WCOUNT ,Number of 32-bit word cycles" rgroup.long (0x7C0+0x24)++0x03 line.long 0x00 "CHANNEL_31_WORD_TRANSFER_0,Word Transfer Register 31" hexmask.long 0x00 2.--29. 1. " COUNT ,APB-Current 32-bit Word Cycles" tree.end width 0x0B tree.end tree.end tree "USB" tree "USB 1" base ad:0x7D000000 width 37. tree "USB 1 Controller" tree "Status Registers" rgroup.long 0x00++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ID_0,USB2D Identification Register" bitfld.long 0x00 29.--31. " CIVERSION ,Identifies the CI version" "0,1,2,3,4,5,6,7" bitfld.long 0x00 25.--28. " VERSION ,Identifies the version of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 21.--24. " REVISION ,Revision number of the USB controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16.--20. " TAG ,Identifies the tag of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 8.--15. 1. " NID ,Ones complement version of ID" hexmask.long.byte 0x00 0.--7. 1. " ID ,Configuration number" rgroup.long 0x08++0x0F line.long 0x00 "USB2_CONTROLLER_USB2D_HW_HOST_0,USB2D Hardware Host Register" bitfld.long 0x00 1.--3. " NPORT ,NPORT" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Support for host mode" "Disabled,Enabled" line.long 0x04 "USB2_CONTROLLER_USB2D_HW_DEVICE_0,USB2D Hardware Device Register" bitfld.long 0x04 1.--5. " DEVEP ,Number of endpoints supported by this device controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Support for device mode" "Not supported,Supported" line.long 0x08 "USB2_CONTROLLER_USB2D_HW_TXBUF_0,USB2D Hardware TX Buffer Register" hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Total number of address bits for the transmit buffer of each transmit endpoint" hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Total number of address bits for the transmit buffer" hexmask.long.byte 0x08 0.--7. 1. " TCBURST ,Maximum burst size supported by the transmit endpoints for data transfers" line.long 0x0C "USB2_CONTROLLER_USB2D_HW_RXBUF_0,USB2D RX Buffer HW Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Total number of address bits for the receive buffer" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Maximum burst size supported by the receive endpoints for data transfers" textline " " sif (cpu()=="TEGRAX1") width 40. group.long 0x80++0x0F line.long 0x00 "USB2_CONTROLLER_USB2D_GPTIMER0LD_0,USB2_CONTROLLER_USB2D_GPTIMER0LD_0" hexmask.long.tbyte 0x00 0.--23. 1. " GPTIMER0LD ,Time in microseconds minus 1 for the timer duration" line.long 0x04 "USB2_CONTROLLER_USB2D_GPTIMER0CTRL_0,USB2_CONTROLLER_USB2D_GPTIMER0CTRL_0" bitfld.long 0x04 31. " GTPRUN ,This bit enables the general-purpose timer to run" "Disabled,Enabled" bitfld.long 0x04 30. " GPTRST , Writing a one to this bit reloads the GPTCNT with the value in GPTLD" "Not reloaded,Reloaded" bitfld.long 0x04 24. " GPTMODE ,This bit selects between a single timer countdown and a looped countdown" "Single timer,Looped" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,This field has the value of the running timer" line.long 0x08 "USB2_CONTROLLER_USB2D_GPTIMER1LD_0,USB2_CONTROLLER_USB2D_GPTIMER1LD_0" hexmask.long.tbyte 0x08 0.--23. 1. " GPTIMER1LD ,Time in microseconds minus 1 for the timer duration" line.long 0x0C "USB2_CONTROLLER_USB2D_GPTIMER1CTRL_0,USB2_CONTROLLER_USB2D_GPTIMER1CTRL_0" bitfld.long 0x0C 31. " GTPRUN ,This bit enables the general-purpose timer to run" "Disabled,Enabled" bitfld.long 0x0C 30. " GPTRST , Writing a one to this bit reloads the GPTCNT with the value in GPTLD" "Not reloaded,Reloaded" bitfld.long 0x0C 24. " GPTMODE ,This bit selects between a single timer countdown and a looped countdown" "Single timer,Looped" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,This field has the value of the running timer" textline " " endif width 37. rgroup.word 0x100++0x03 line.word 0x00 "USB2_CONTROLLER_USB2D_CAPLENGTH_0,USB2D Capability Register Length Register" hexmask.word.byte 0x00 0.--7. 1. " CAPLENGTH ,Indicates which offset to add to the register base address at the beginning of the operational register" line.word 0x02 "USB2_CONTROLLER_USB2D_HCIVERSON_0,USB2D Host Interface Version Number Register" hexmask.word 0x02 0.--15. 1. " HCIVERSION ,Contains a BCD encoding of the EHCI revision number supported by this host controller" rgroup.long 0x104++0x07 line.long 0x00 "USB2_CONTROLLER_USB2D_HCSPARAMS_0,USB2D Host Control Structural Parameters Register" bitfld.long 0x00 24.--27. " N_TT ,Number of transaction translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT ,Number of ports per transaction translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " N_CC ,Number of companion controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC ,Number of ports per companion controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port power control" "Disabled,Enabled" bitfld.long 0x00 0.--3. " N_PORTS ,Number of downstream ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "USB2_CONTROLLER_USB2D_HCCPARAMS_0,USB2D Host Control Capability Parameters Register" bitfld.long 0x04 18. " PPC ,Per-port change event capability" "Not supported,Supported" bitfld.long 0x04 17. " LEN ,Link power management capability" "Not supported,Supported" hexmask.long.byte 0x04 8.--15. 1. " EECP ,EHCI extended capabilities pointer" textline " " bitfld.long 0x04 4.--7. " IST ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous schedule park capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable frame list flag configuration" "Disabled,Enabled" rgroup.long 0x120++0x07 line.long 0x00 "USB2_CONTROLLER_USB2D_DCIVERSION_0,USB2D Device Interface Version Number Register" hexmask.long.word 0x00 0.--15. 1. " DCIVERSION ,Interface version number for the two-byte BCD encoding" line.long 0x04 "USB2_CONTROLLER_USB2D_DCCPARAMS_0,USB2D Device Control Capabilities Register" bitfld.long 0x04 8. " HC ,Host capable" "Disabled,Enabled" bitfld.long 0x04 7. " DC ,Device capable" "Disabled,Enabled" bitfld.long 0x04 5. " LEN ,Link power management capability" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--4. " DEN ,Device endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree "Control Registers" if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x128++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_EXTSTS_0,USB2D EXTSTS Register" eventfld.long 0x00 4. " TI1 ,General purpose timer interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 3. " TI0 ,General purpose timer interrupt 0" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 0. " NAKI ,NAK interrupt bit" "Disabled,Enabled" else group.long 0x128++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_EXTSTS_0,USB2D EXTSTS Register" eventfld.long 0x00 4. " TI1 ,General purpose timer interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 3. " TI0 ,General purpose timer interrupt 0" "No interrupt,Interrupt" eventfld.long 0x00 2. " UPA ,USB host periodic interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " UAI ,USB host asynchronous interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 0. " NAKI ,NAK interrupt bit" "Disabled,Enabled" endif group.long 0x12C++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBEXTINTR_0,USB2D EXTINTR Register" bitfld.long 0x00 4. " TIE1 ,General purpose timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " TIE0 ,General purpose timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " UPIE ,UPIE interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UAIE ,UAIE interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " NAKE ,NAK interrupt enable" "Disabled,Enabled" if (((per.l(ad:0x7D000000+0x108))&0x04)==0x00)&&(((per.l(ad:0x7D000000+0x108))&0x02)==0x00)&&(((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwire" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" "0,1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "Clear,Set" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" rbitfld.long 0x00 2.--3. 15. " FS2_FS0 ,Frame list size (in bytes)" "4096,2048,1024,512,256,128,64,32" textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D000000+0x108))&0x04)==0x00)&&(((per.l(ad:0x7D000000+0x108))&0x02)==0x02)&&(((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwire" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" "0,1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "Clear,Set" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS2_FS0 ,Frame list size (in bytes)" "4096,2048,1024,512,256,128,64,32" textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D000000+0x108))&0x04)==0x04)&&(((per.l(ad:0x7D000000+0x108))&0x02)==0x00)&&(((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwire" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" ",1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "Clear,Set" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" rbitfld.long 0x00 2.--3. 15. " FS2_FS0 ,Frame list size (in bytes)" "4096,2048,1024,512,256,128,64,32" textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D000000+0x108))&0x04)==0x04)&&(((per.l(ad:0x7D000000+0x108))&0x02)==0x02)&&(((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwire" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" ",1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "Clear,Set" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS2_FS0 ,Frame list size (in bytes)" "4096,2048,1024,512,256,128,64,32" textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D000000+0x108))&0x04)==0x00)&&(((per.l(ad:0x7D000000+0x1F8))&0x03)!=0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwier" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" "0,1,2,3" textline " " textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D000000+0x108))&0x04)==0x04)&&(((per.l(ad:0x7D000000+0x1F8))&0x03)!=0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwier" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" ",1,2,3" textline " " textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" endif if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x134++0x07 line.long 0x00 "USB2_CONTROLLER_USB2D_USBSTS_0,USB2D USB Status Register" bitfld.long 0x00 31. " PPCI16 ,Port 16 change detect status" "Not detected,Detected" bitfld.long 0x00 30. " PPCI15 ,Port 15 change detect status" "Not detected,Detected" bitfld.long 0x00 29. " PPCI14 ,Port 14 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 28. " PPCI13 ,Port 13 change detect status" "Not detected,Detected" bitfld.long 0x00 27. " PPCI12 ,Port 12 change detect status" "Not detected,Detected" bitfld.long 0x00 26. " PPCI11 ,Port 11 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 25. " PPCI10 ,Port 10 change detect status" "Not detected,Detected" bitfld.long 0x00 24. " PPCI9 ,Port 9 change detect status" "Not detected,Detected" bitfld.long 0x00 23. " PPCI8 ,Port 8 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 22. " PPCI7 ,Port 7 change detect status" "Not detected,Detected" bitfld.long 0x00 21. " PPCI6 ,Port 6 change detect status" "Not detected,Detected" bitfld.long 0x00 20. " PPCI5 ,Port 5 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 19. " PPCI4 ,Port 4 change detect status" "Not detected,Detected" bitfld.long 0x00 18. " PPCI3 ,Port 3 change detect status" "Not detected,Detected" bitfld.long 0x00 17. " PPCI2 ,Port 2 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 16. " PPCI1 ,Port 1 change detect status" "Not detected,Detected" bitfld.long 0x00 15. " AS ,Asynchronous schedule status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic schedule status" "Disabled,Enabled" textline " " rbitfld.long 0x00 13. " RCL ,Empty asynchronous schedule detection" "Disabled,Enabled" bitfld.long 0x00 12. " HCH ,HCHalted" "Not halted,Halted" textline " " bitfld.long 0x00 11. " UALT_INT ,ULPI alt_int interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " ULPI_INT ,ULPI interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " SRI ,SOF received" "Not received,Received" bitfld.long 0x00 5. " AAI ,Interrupt and asynchronous advance" "Not advanced,Advanced" rbitfld.long 0x00 4. " SEI ,System error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame list rollover" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCI ,Port change detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB error interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" elif (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x134++0x07 line.long 0x00 "USB2_CONTROLLER_USB2D_USBSTS_0,USB2D USB Status Register" bitfld.long 0x00 31. " PPCI16 ,Port 16 change detect status" "Not detected,Detected" bitfld.long 0x00 30. " PPCI15 ,Port 15 change detect status" "Not detected,Detected" bitfld.long 0x00 29. " PPCI14 ,Port 14 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 28. " PPCI13 ,Port 13 change detect status" "Not detected,Detected" bitfld.long 0x00 27. " PPCI12 ,Port 12 change detect status" "Not detected,Detected" bitfld.long 0x00 26. " PPCI11 ,Port 11 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 25. " PPCI10 ,Port 10 change detect status" "Not detected,Detected" bitfld.long 0x00 24. " PPCI9 ,Port 9 change detect status" "Not detected,Detected" bitfld.long 0x00 23. " PPCI8 ,Port 8 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 22. " PPCI7 ,Port 7 change detect status" "Not detected,Detected" bitfld.long 0x00 21. " PPCI6 ,Port 6 change detect status" "Not detected,Detected" bitfld.long 0x00 20. " PPCI5 ,Port 5 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 19. " PPCI4 ,Port 4 change detect status" "Not detected,Detected" bitfld.long 0x00 18. " PPCI3 ,Port 3 change detect status" "Not detected,Detected" bitfld.long 0x00 17. " PPCI2 ,Port 2 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 16. " PPCI1 ,Port 1 change detect status" "Not detected,Detected" textline " " textline " " bitfld.long 0x00 11. " UALT_INT ,ULPI alt_int interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " ULPI_INT ,ULPI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " SLI ,DCSuspend" "Not suspended,Suspended" textline " " eventfld.long 0x00 7. " SRI ,SOF received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB reset received" "No reset,Reset" rbitfld.long 0x00 4. " SEI ,System error" "No error,Error" textline " " bitfld.long 0x00 2. " PCI ,Port change detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB error interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" else group.long 0x134++0x07 line.long 0x00 "USB2_CONTROLLER_USB2D_USBSTS_0,USB2D USB Status Register" bitfld.long 0x00 31. " PPCI16 ,Port 16 change detect status" "Not detected,Detected" bitfld.long 0x00 30. " PPCI15 ,Port 15 change detect status" "Not detected,Detected" bitfld.long 0x00 29. " PPCI14 ,Port 14 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 28. " PPCI13 ,Port 13 change detect status" "Not detected,Detected" bitfld.long 0x00 27. " PPCI12 ,Port 12 change detect status" "Not detected,Detected" bitfld.long 0x00 26. " PPCI11 ,Port 11 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 25. " PPCI10 ,Port 10 change detect status" "Not detected,Detected" bitfld.long 0x00 24. " PPCI9 ,Port 9 change detect status" "Not detected,Detected" bitfld.long 0x00 23. " PPCI8 ,Port 8 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 22. " PPCI7 ,Port 7 change detect status" "Not detected,Detected" bitfld.long 0x00 21. " PPCI6 ,Port 6 change detect status" "Not detected,Detected" bitfld.long 0x00 20. " PPCI5 ,Port 5 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 19. " PPCI4 ,Port 4 change detect status" "Not detected,Detected" bitfld.long 0x00 18. " PPCI3 ,Port 3 change detect status" "Not detected,Detected" bitfld.long 0x00 17. " PPCI2 ,Port 2 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 16. " PPCI1 ,Port 1 change detect status" "Not detected,Detected" textline " " textline " " bitfld.long 0x00 11. " UALT_INT ,ULPI alt_int interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " ULPI_INT ,ULPI interrupt" "No interrupt,Interrupt" textline " " textline " " eventfld.long 0x00 7. " SRI ,SOF received" "Not received,Received" rbitfld.long 0x00 4. " SEI ,System error" "No error,Error" textline " " bitfld.long 0x00 2. " PCI ,Port change detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB error interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" endif if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x138++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBINTR_0,USB2D USB Interrupt Enable Register" bitfld.long 0x00 31. " PPCE16 ,Port 16 change detect enable" "Disabled,Enabled" bitfld.long 0x00 30. " PPCE15 ,Port 15 change detect enable" "Disabled,Enabled" bitfld.long 0x00 29. " PPCE14 ,Port 14 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PPCE13 ,Port 13 change detect enable" "Disabled,Enabled" bitfld.long 0x00 27. " PPCE12 ,Port 12 change detect enable" "Disabled,Enabled" bitfld.long 0x00 26. " PPCE11 ,Port 11 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PPCE10 ,Port 10 change detect enable" "Disabled,Enabled" bitfld.long 0x00 24. " PPCE9 ,Port 9 change detect enable" "Disabled,Enabled" bitfld.long 0x00 23. " PPCE8 ,Port 8 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PPCE7 ,Port 7 change detect enable" "Disabled,Enabled" bitfld.long 0x00 21. " PPCE6 ,Port 6 change detect enable" "Disabled,Enabled" bitfld.long 0x00 20. " PPCE5 ,Port 5 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PPCE4 ,Port 4 change detect enable" "Disabled,Enabled" bitfld.long 0x00 18. " PPCE3 ,Port 3 change detect enable" "Disabled,Enabled" bitfld.long 0x00 17. " PPCE2 ,Port 2 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PPCE1 ,Port 1 change detect enable" "Disabled,Enabled" eventfld.long 0x00 11. " UALTIE ,ULPI alt_int Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" bitfld.long 0x00 5. " AAE ,Interrupt on asynchronous advance enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame list rollover enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" bitfld.long 0x00 1. " UEE ,USB error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" elif (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x138++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBINTR_0,USB2D USB Interrupt Enable Register" bitfld.long 0x00 31. " PPCE16 ,Port 16 change detect enable" "Disabled,Enabled" bitfld.long 0x00 30. " PPCE15 ,Port 15 change detect enable" "Disabled,Enabled" bitfld.long 0x00 29. " PPCE14 ,Port 14 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PPCE13 ,Port 13 change detect enable" "Disabled,Enabled" bitfld.long 0x00 27. " PPCE12 ,Port 12 change detect enable" "Disabled,Enabled" bitfld.long 0x00 26. " PPCE11 ,Port 11 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PPCE10 ,Port 10 change detect enable" "Disabled,Enabled" bitfld.long 0x00 24. " PPCE9 ,Port 9 change detect enable" "Disabled,Enabled" bitfld.long 0x00 23. " PPCE8 ,Port 8 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PPCE7 ,Port 7 change detect enable" "Disabled,Enabled" bitfld.long 0x00 21. " PPCE6 ,Port 6 change detect enable" "Disabled,Enabled" bitfld.long 0x00 20. " PPCE5 ,Port 5 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PPCE4 ,Port 4 change detect enable" "Disabled,Enabled" bitfld.long 0x00 18. " PPCE3 ,Port 3 change detect enable" "Disabled,Enabled" bitfld.long 0x00 17. " PPCE2 ,Port 2 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PPCE1 ,Port 1 change detect enable" "Disabled,Enabled" eventfld.long 0x00 11. " UALTIE ,ULPI alt_int Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " SLE ,Sleep enable" "Disabled,Enabled" eventfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" eventfld.long 0x00 6. " URE ,USB reset enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" bitfld.long 0x00 1. " UEE ,USB error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" else group.long 0x138++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBINTR_0,USB2D USB Interrupt Enable Register" bitfld.long 0x00 31. " PPCE16 ,Port 16 change detect enable" "Disabled,Enabled" bitfld.long 0x00 30. " PPCE15 ,Port 15 change detect enable" "Disabled,Enabled" bitfld.long 0x00 29. " PPCE14 ,Port 14 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PPCE13 ,Port 13 change detect enable" "Disabled,Enabled" bitfld.long 0x00 27. " PPCE12 ,Port 12 change detect enable" "Disabled,Enabled" bitfld.long 0x00 26. " PPCE11 ,Port 11 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PPCE10 ,Port 10 change detect enable" "Disabled,Enabled" bitfld.long 0x00 24. " PPCE9 ,Port 9 change detect enable" "Disabled,Enabled" bitfld.long 0x00 23. " PPCE8 ,Port 8 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PPCE7 ,Port 7 change detect enable" "Disabled,Enabled" bitfld.long 0x00 21. " PPCE6 ,Port 6 change detect enable" "Disabled,Enabled" bitfld.long 0x00 20. " PPCE5 ,Port 5 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PPCE4 ,Port 4 change detect enable" "Disabled,Enabled" bitfld.long 0x00 18. " PPCE3 ,Port 3 change detect enable" "Disabled,Enabled" bitfld.long 0x00 17. " PPCE2 ,Port 2 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PPCE1 ,Port 1 change detect enable" "Disabled,Enabled" eventfld.long 0x00 11. " UALTIE ,ULPI alt_int interrupt enable" "Disabled,Enabled" eventfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" bitfld.long 0x00 1. " UEE ,USB error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" endif rgroup.long 0x13C++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_FRINDEX_0,USB2D USB Frame Index Register" hexmask.long.word 0x00 0.--13. 1. " FRINDEX ,Frame index" textline " " width 44. if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x144++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_PERIODICLISTBASE_0,USB2D Host Controller Frame List Base Address Register" hexmask.long.byte 0x00 25.--31. 1. " USBADR ,Device address" bitfld.long 0x00 24. " USBADRA ,Device address advance" "Disabled,Enabled" elif (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x144++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_PERIODICLISTBASE_0,USB2D Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Beginning address of the periodic frame list in the system memory" else hgroup.long 0x144++0x03 hide.long 0x00 "USB2_CONTROLLER_USB2D_PERIODICLISTBASE_0,USB2D Host Controller Frame List Base Address Register" endif if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x148++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ASYNCLISTADDR_0,USB2D Next Asynchronous List Address Register" hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE ,Address of the top of the endpoint list in system memory" elif (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x148++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ASYNCLISTADDR_0,USB2D Next Asynchronous List Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE ,Address of the next asynchronous queue head to be executed by the host" else hgroup.long 0x148++0x03 hide.long 0x00 "USB2_CONTROLLER_USB2D_ASYNCLISTADDR_0,USB2D Next Asynchronous List Address Register" endif group.long 0x14C++0x0B line.long 0x00 "USB2_CONTROLLER_USB2D_ASYNCTTSTS_0,USB2D Asynchronous Buffer Status for Embedded TT Register" sif (cpu()=="TEGRAX1") hexmask.long.byte 0x00 24.--30. 0x01 " TTHA ,Internal TT Hub Address representation" textline " " endif bitfld.long 0x00 1. " TTAC ,Embedded TT async buffers clear" "No clear,Clear" rbitfld.long 0x00 0. " TTAS ,Embedded TT async buffers transactions status" "Flushed,Held" line.long 0x04 "USB2_CONTROLLER_USB2D_BURSTSIZE_0,USB2D Burst Size register" hexmask.long.byte 0x04 8.--15. 1. " TXPBURST ,Programmable TX burst length" hexmask.long.byte 0x04 0.--7. 1. " RXPBURST ,Programmable RX burst length" line.long 0x08 "USB2_CONTROLLER_USB2D_TXFILLTUNING_0,USB2D Transmit fill tuning register" bitfld.long 0x08 16.--21. " TXFIFOTHRES ,FIFO burst threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--12. " TXSCHHEALTH ,Scheduler health counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x08 0.--7. 1. " TXSCHOH ,Scheduler overhead" sif (cpu()!="TEGRAX1") group.long 0x15C++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ICUSB_CTRL_0,USB2D ICUSB control register" bitfld.long 0x00 3. " IC_ENB1 ,ICUSB transceiver" "Disabled,Enabled" bitfld.long 0x00 0.--2. " IC_VDD1 ,ICUSB voltage select" "No voltage,,,,1.8V,3.0V,," endif group.long 0x160++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ULPI_VIEWPORT_0,USB2D ULPI viewport register" bitfld.long 0x00 31. " ULPI_WAKEUP ,ULPI wakeup" "No effect,Wakeup" bitfld.long 0x00 30. " ULPI_RUN ,ULPI read/write run (begin read/write operation)" "No effect,Run" bitfld.long 0x00 29. " ULPI_RD_WR ,ULPI read/write control" "Read,Write" textline " " rbitfld.long 0x00 27. " ULPI_SYNC_STATE ,ULPI sync state" "Not normal,Normal" bitfld.long 0x00 24.--26. " ULPI_PORT ,ULPI PHY port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPI_REG_ADDR ,ULPI PHY register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " ULPI_DATA_RD ,ULPI PHY data read" hexmask.long.byte 0x00 0.--7. 1. " ULPI_DATA_WR ,ULPI PHY data write" textline " " width 41. if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) if (((per.l(ad:0x7D000000+0x174))&0x1000)==0x1000) group.long 0x174++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_PORTSC1_0,USB2D Port Status/Control 1 Register" hexmask.long.byte 0x00 25.--31. 1. " DA ,Device address" rbitfld.long 0x00 23.--24. " SSTS ,Suspend status" "L1STATE_ENTERED,NYET_PERIPH,L1STATE_NOT_SUPPORTED,PERIPH_NORESP_ERR" bitfld.long 0x00 22. " WKOC ,Wake on over-current" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " WKDS ,Wake on disconnect" "Disabled,Enabled" bitfld.long 0x00 20. " WKCN ,Wake on connect" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port test control" "NORMAL_OP,TEST_J,TEST_K,TEST_SE0_NAK,TEST_PKT,TEST_FORCE_ENABLE,?..." textline " " bitfld.long 0x00 12. " PP ,Port power" "Disabled,Enabled" rbitfld.long 0x00 10.--11. " LS ,Line state" "SE0,J_STATE,K_STATE,Undefined" textline " " bitfld.long 0x00 9. " SLP ,Suspend using L1" "L2,L1" bitfld.long 0x00 8. " PR ,Port reset" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SUSP ,Port suspend" "Disabled,Enabled" bitfld.long 0x00 6. " FPR ,Force port resume" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEC ,Port enable/disable change" "No change,Change" bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CSC ,Connect status change" "No change,Change" bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" else group.long 0x174++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_PORTSC1_0,USB2D Port Status/Control 1 Register" hexmask.long.byte 0x00 25.--31. 1. " DA ,Device address" rbitfld.long 0x00 23.--24. " SSTS ,Suspend status" "L1STATE_ENTERED,NYET_PERIPH,L1STATE_NOT_SUPPORTED,PERIPH_NORESP_ERR" bitfld.long 0x00 22. " WKOC ,Wake on over-current" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " WKDS ,Wake on disconnect" "Disabled,Enabled" bitfld.long 0x00 20. " WKCN ,Wake on connect" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port test control" "NORMAL_OP,TEST_J,TEST_K,TEST_SE0_NAK,TEST_PKT,TEST_FORCE_ENABLE,?..." textline " " bitfld.long 0x00 12. " PP ,Port power" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " SLP ,Suspend using L1" "L2,L1" bitfld.long 0x00 8. " PR ,Port reset" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SUSP ,Port suspend" "Disabled,Enabled" bitfld.long 0x00 6. " FPR ,Force port resume" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEC ,Port enable/disable change" "No change,Change" bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CSC ,Connect status change" "No change,Change" bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" endif elif (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x174++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_PORTSC1_0,USB2D Port Status/Control 1 Register" hexmask.long.byte 0x00 25.--31. 1. " DA ,Device address" textline " " bitfld.long 0x00 16.--19. " PTC ,Port test control" "NORMAL_OP,TEST_J,TEST_K,TEST_SE0_NAK,TEST_PKT,TEST_FORCE_ENABLE,?..." textline " " sif (cpu()!="TEGRAX1") rbitfld.long 0x00 14.--15. " PIC ,Port indicator control" "0,1,2,3" rbitfld.long 0x00 13. " PO ,Port owner" "0,1" textline " " endif bitfld.long 0x00 12. " PP ,Port power" "Disabled,Enabled" rbitfld.long 0x00 10.--11. " LS ,Line state" "SE0,J_STATE,K_STATE,Undefined" textline " " bitfld.long 0x00 9. " SLP ,Suspend using L1" "L2,L1" rbitfld.long 0x00 8. " PR ,Port reset" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " SUSP ,Port suspend" "Disabled,Enabled" bitfld.long 0x00 6. " FPR ,Force port resume" "Disabled,Enabled" textline " " sif (cpu()!="TEGRAX1") rbitfld.long 0x00 5. " OCC ,Over-current change" "No change,Change" rbitfld.long 0x00 4. " OCA ,Over-current active" "Not active,Active" textline " " endif bitfld.long 0x00 3. " PEC ,Port enable/disable change" "No change,Change" bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" else group.long 0x174++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_PORTSC1_0,USB2D Port Status/Control 1 Register" hexmask.long.byte 0x00 25.--31. 1. " DA ,Device address" textline " " bitfld.long 0x00 16.--19. " PTC ,Port test control" "NORMAL_OP,TEST_J,TEST_K,TEST_SE0_NAK,TEST_PKT,TEST_FORCE_ENABLE,?..." textline " " sif (cpu()!="TEGRAX1") rbitfld.long 0x00 14.--15. " PIC ,Port indicator control" "0,1,2,3" rbitfld.long 0x00 13. " PO ,Port owner" "0,1" textline " " endif bitfld.long 0x00 12. " PP ,Port power" "Disabled,Enabled" rbitfld.long 0x00 10.--11. " LS ,Line state" "SE0,J_STATE,K_STATE,Undefined" textline " " bitfld.long 0x00 9. " SLP ,Suspend using L1" "L2,L1" rbitfld.long 0x00 8. " PR ,Port reset" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " SUSP ,Port suspend" "Disabled,Enabled" bitfld.long 0x00 6. " FPR ,Force port resume" "Disabled,Enabled" textline " " sif (cpu()!="TEGRAX1") rbitfld.long 0x00 5. " OCC ,Over-current change" "No change,Change" rbitfld.long 0x00 4. " OCA ,Over-current active" "Not active,Active" textline " " endif bitfld.long 0x00 3. " PEC ,Port enable/disable change" "No change,Change" bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" endif if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x1B4++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_HOSTPC1_0,USB2D Host Mode LPM Behav and Control Register" bitfld.long 0x00 29.--31. " PTS ,Parallel transceiver select" "UTMI,,ULPI,ICUSB_SER,HSIC,?..." bitfld.long 0x00 28. " STS ,Serial transceiver" "PARALLEL_IF,SERIAL_IF" rbitfld.long 0x00 27. " PTW ,Parallel transceiver width" "8-bit," textline " " rbitfld.long 0x00 25.--26. " PSPD ,Port operating speed" "Full,Low,High," sif (cpu()=="TEGRAX1") bitfld.long 0x00 24. " ALPD ,Auto Low Power While Disconnect" "Disabled,Enabled" endif textline " " bitfld.long 0x00 23. " PFSC ,Port force full speed connect" "Disabled,Enabled" bitfld.long 0x00 22. " PHCD ,PHY low power suspend - clock disable" "No,Yes" textline " " bitfld.long 0x00 20.--21. " LPMX ,Auto LPM set" "Disabled,Set,Set without interrupt,?..." bitfld.long 0x00 16.--19. " EPLPM ,Endpoint for LPM token" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " LPMFRM ,Auto LPM SOF threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 1.--11. 1. " BA ,BmAttrubuttes" textline " " bitfld.long 0x00 0. " ASUS ,Auto low power" "Disabled,Enabled" elif (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x1B4++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_DEVLC_0,USB2D Device Mode LPM Behav and Control Register" bitfld.long 0x00 29.--31. " PTS ,Parallel transceiver select" "UTMI,,ULPI,ICUSB_SER,HSIC,?..." bitfld.long 0x00 28. " STS ,Serial transceiver" "PARALLEL_IF,SERIAL_IF" rbitfld.long 0x00 27. " PTW ,Parallel transceiver width" "8-bit,?..." textline " " rbitfld.long 0x00 25.--26. " PSPD ,Port operating speed" "Full,Low,High,?..." sif (cpu()=="TEGRAX1") bitfld.long 0x00 24. " ALPD ,Auto Low Power While Disconnect" "Disabled,Enabled" endif textline " " bitfld.long 0x00 23. " PFSC ,Port force full speed connect" "Disabled,Enabled" bitfld.long 0x00 22. " PHCD ,PHY low power suspend - clock disable" "No,Yes" textline " " bitfld.long 0x00 17. " ASUS ,Auto low power" "Disabled,Enabled" bitfld.long 0x00 16. " STL ,STALL reply to LPM token" "Disabled,Enabled" textline " " hexmask.long.word 0x00 1.--11. 1. " BA ,BmAttrubuttes" bitfld.long 0x00 0. " NYT ,NYTE reply to LPM token" "Disabled,Enabled" else group.long 0x1B4++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_HOSTPC1_DEVLC_0,USB2D Device Mode LPM Behav and Control Register" bitfld.long 0x00 29.--31. " PTS ,Parallel transceiver select" "UTMI,,ULPI,ICUSB_SER,HSIC,?..." bitfld.long 0x00 28. " STS ,Serial transceiver" "PARALLEL_IF,SERIAL_IF" rbitfld.long 0x00 27. " PTW ,Parallel transceiver width" "8-bit,?..." textline " " rbitfld.long 0x00 25.--26. " PSPD ,Port operating speed" "Full,Low,High,?..." sif (cpu()=="TEGRAX1") bitfld.long 0x00 24. " ALPD ,Auto Low Power While Disconnect" "Disabled,Enabled" endif textline " " bitfld.long 0x00 23. " PFSC ,Port force full speed connect" "Disabled,Enabled" bitfld.long 0x00 22. " PHCD ,PHY low power suspend - clock disable" "No,Yes" textline " " textline " " hexmask.long.word 0x00 1.--11. 1. " BA ,BmAttrubuttes" endif group.long 0x1F4++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_OTGSC_0,USB2D On-The-Go (OTG) Status and Control Register" bitfld.long 0x00 30. " DPIE ,Data pulse interrupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " ONEMSE ,1 millisecond timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " BSEIE ,B session end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BSVIE ,B session valid interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ASVIE ,A session valid interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " AVVIE ,A VBUS valid interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " IDIE ,USB ID interrupt enable" "Disabled,Enabled" eventfld.long 0x00 22. " DPIS ,Data pulse interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 21. " ONEMESS ,1 millisecond timer interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 20. " BSEIS ,B session end interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 19. " BSVIS ,B session valid interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " ASVIS ,A session valid interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " AVVIS ,A VBUS valid interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " IDIS ,USB ID interrupt toggle" "No interrupt,Interrupt" rbitfld.long 0x00 14. " DPS ,Data pulse status" "Not detected,Detected" textline " " rbitfld.long 0x00 13. " ONEMST ,1 millisecond timer toggle" "Low,High" rbitfld.long 0x00 12. " BSE ,B session end threshold" "No,Yes" rbitfld.long 0x00 11. " BSV ,B session valid threshold" "No,Yes" textline " " rbitfld.long 0x00 10. " ASV ,A session valid threshold" "No,Yes" rbitfld.long 0x00 9. " AVV ,A VBUS valid threshold" "No,Yes" rbitfld.long 0x00 8. " ID ,USB ID" "A-device,B-device" textline " " bitfld.long 0x00 5. " IDPU ,USB ID pullup" "Clear,Set" bitfld.long 0x00 4. " DP ,Data pulsing" "Disabled,Enabled" bitfld.long 0x00 3. " OT ,OTG termination" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " VC ,VBUS charge" "Disabled,Enabled" bitfld.long 0x00 0. " VD ,VBUS discharge" "Disabled,Enabled" if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x1F8++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBMODE_0,USB2D USB Device Mode Register" sif (cpu()=="TEGRAX1") hexmask.long.word 0x00 16.--31. 1. " ALPDD ,Auto Low Power While Disconnect Delay" textline " " endif bitfld.long 0x00 15. " SRT ,Shorten USB reset time" "No,Yes" rbitfld.long 0x00 4. " SDIS ,Stream disable" "No,Yes" textline " " rbitfld.long 0x00 2. " ES ,Endian select" "Little endian,?..." rbitfld.long 0x00 0.--1. " CM ,Controller mode" "Idle,,Device mode,Host mode" else group.long 0x1F8++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_USBMODE_0,USB2D USB Device Mode Register" sif (cpu()=="TEGRAX1") textline " " endif bitfld.long 0x00 15. " SRT ,Shorten USB reset time" "No,Yes" rbitfld.long 0x00 4. " SDIS ,Stream disable" "No,Yes" rbitfld.long 0x00 3. " SLOM ,Setup lockout mode" "On,Off" textline " " rbitfld.long 0x00 2. " ES ,Endian select" "Little endian,?..." rbitfld.long 0x00 0.--1. " CM ,Controller mode" "Idle,,Device mode,Host mode" endif tree.end tree "Endpoint Setup" width 43. group.long 0x200++0x07 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTNAK_0,USB2D Endpoint NAK register" bitfld.long 0x00 31. " EPTN[15] ,TX endpoint NAK 15" "Clear,Set" bitfld.long 0x00 30. " [14] ,TX endpoint NAK 14" "Clear,Set" bitfld.long 0x00 29. " [13] ,TX endpoint NAK 13" "Clear,Set" bitfld.long 0x00 28. " [12] ,TX endpoint NAK 12" "Clear,Set" textline " " bitfld.long 0x00 27. " [11] ,TX endpoint NAK 11" "Clear,Set" bitfld.long 0x00 26. " [10] ,TX endpoint NAK 10" "Clear,Set" bitfld.long 0x00 25. " [9] ,TX endpoint NAK 9" "Clear,Set" bitfld.long 0x00 24. " [8] ,TX endpoint NAK 8" "Clear,Set" textline " " bitfld.long 0x00 23. " [7] ,TX endpoint NAK 7" "Clear,Set" bitfld.long 0x00 22. " [6] ,TX endpoint NAK 6" "Clear,Set" bitfld.long 0x00 21. " [5] ,TX endpoint NAK 5" "Clear,Set" bitfld.long 0x00 20. " [4] ,TX endpoint NAK 4" "Clear,Set" textline " " bitfld.long 0x00 19. " [3] ,TX endpoint NAK 3" "Clear,Set" bitfld.long 0x00 18. " [2] ,TX endpoint NAK 2" "Clear,Set" bitfld.long 0x00 17. " [1] ,TX endpoint NAK 1" "Clear,Set" bitfld.long 0x00 16. " [0] ,TX endpoint NAK 0" "Clear,Set" textline " " bitfld.long 0x00 15. " EPRN[15] ,RX endpoint NAK 15" "Clear,Set" bitfld.long 0x00 14. " [14] ,RX endpoint NAK 14" "Clear,Set" bitfld.long 0x00 13. " [13] ,RX endpoint NAK 13" "Clear,Set" bitfld.long 0x00 12. " [12] ,RX endpoint NAK 12" "Clear,Set" textline " " bitfld.long 0x00 11. " [11] ,RX endpoint NAK 11" "Clear,Set" bitfld.long 0x00 10. " [10] ,RX endpoint NAK 10" "Clear,Set" bitfld.long 0x00 9. " [9] ,RX endpoint NAK 9" "Clear,Set" bitfld.long 0x00 8. " [8] ,RX endpoint NAK 8" "Clear,Set" textline " " bitfld.long 0x00 7. " [7] ,RX endpoint NAK 7" "Clear,Set" bitfld.long 0x00 6. " [6] ,RX endpoint NAK 6" "Clear,Set" bitfld.long 0x00 5. " [5] ,RX endpoint NAK 5" "Clear,Set" bitfld.long 0x00 4. " [4] ,RX endpoint NAK 4" "Clear,Set" textline " " bitfld.long 0x00 3. " [3] ,RX endpoint NAK 3" "Clear,Set" bitfld.long 0x00 2. " [2] ,RX endpoint NAK 2" "Clear,Set" bitfld.long 0x00 1. " [1] ,RX endpoint NAK 1" "Clear,Set" bitfld.long 0x00 0. " [0] ,RX endpoint NAK 0" "Clear,Set" line.long 0x04 "USB2_CONTROLLER_USB2D_ENDPTNAK_ENABLE_0,USB2D Endpoint NAK Enable register" bitfld.long 0x04 31. " EPTNE[15] ,TX endpoint NAK enable 15" "Disabled,Enabled" bitfld.long 0x04 30. " [14] ,TX endpoint NAK enable 14" "Disabled,Enabled" bitfld.long 0x04 29. " [13] ,TX endpoint NAK enable 13" "Disabled,Enabled" bitfld.long 0x04 28. " [12] ,TX endpoint NAK enable 12" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " [11] ,TX endpoint NAK enable 11" "Disabled,Enabled" bitfld.long 0x04 26. " [10] ,TX endpoint NAK enable 10" "Disabled,Enabled" bitfld.long 0x04 25. " [9] ,TX endpoint NAK enable 9" "Disabled,Enabled" bitfld.long 0x04 24. " [8] ,TX endpoint NAK enable 8" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " [7] ,TX endpoint NAK enable 7" "Disabled,Enabled" bitfld.long 0x04 22. " [6] ,TX endpoint NAK enable 6" "Disabled,Enabled" bitfld.long 0x04 21. " [5] ,TX endpoint NAK enable 5" "Disabled,Enabled" bitfld.long 0x04 20. " [4] ,TX endpoint NAK enable 4" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [3] ,TX endpoint NAK enable 3" "Disabled,Enabled" bitfld.long 0x04 18. " [2] ,TX endpoint NAK enable 2" "Disabled,Enabled" bitfld.long 0x04 17. " [1] ,TX endpoint NAK enable 1" "Disabled,Enabled" bitfld.long 0x04 16. " [0] ,TX endpoint NAK enable 0" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " EPRNE[15] ,RX endpoint NAK enable 15" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,RX endpoint NAK enable 14" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,RX endpoint NAK enable 13" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,RX endpoint NAK enable 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,RX endpoint NAK enable 11" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,RX endpoint NAK enable 10" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,RX endpoint NAK enable 9" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,RX endpoint NAK enable 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,RX endpoint NAK enable 7" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,RX endpoint NAK enable 6" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,RX endpoint NAK enable 5" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,RX endpoint NAK enable 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [3] ,RX endpoint NAK enable 3" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,RX endpoint NAK enable 2" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,RX endpoint NAK enable 1" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,RX endpoint NAK enable 0" "Disabled,Enabled" textline " " width 43. if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x208++0x0B line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTSETUPSTAT_0,USB2D Endpoint Setup Status Register" bitfld.long 0x00 15. " ENDPTSETUPSTAT[15] ,Endpoint setup status 15" "Not received,Received" bitfld.long 0x00 14. " [14] ,Endpoint setup status 14" "Not received,Received" bitfld.long 0x00 13. " [13] ,Endpoint setup status 13" "Not received,Received" textline " " bitfld.long 0x00 12. " [12] ,Endpoint setup status 12" "Not received,Received" bitfld.long 0x00 11. " [11] ,Endpoint setup status 11" "Not received,Received" bitfld.long 0x00 10. " [10] ,Endpoint setup status 10" "Not received,Received" textline " " bitfld.long 0x00 9. " [9] ,Endpoint setup status 9" "Not received,Received" bitfld.long 0x00 8. " [8] ,Endpoint setup status 8" "Not received,Received" bitfld.long 0x00 7. " [7] ,Endpoint setup status 7" "Not received,Received" textline " " bitfld.long 0x00 6. " [6] ,Endpoint setup status 6" "Not received,Received" bitfld.long 0x00 5. " [5] ,Endpoint setup status 5" "Not received,Received" bitfld.long 0x00 4. " [4] ,Endpoint setup status 4" "Not received,Received" textline " " bitfld.long 0x00 3. " [3] ,Endpoint setup status 3" "Not received,Received" bitfld.long 0x00 2. " [2] ,Endpoint setup status 2" "Not received,Received" bitfld.long 0x00 1. " [1] ,Endpoint setup status 1" "Not received,Received" textline " " bitfld.long 0x00 0. " [0] ,Endpoint setup status 0" "Not received,Received" textline " " line.long 0x04 "USB2_CONTROLLER_USB2D_ENDPTPRIME_0,USB2D Endpoint Initialization Register" bitfld.long 0x04 31. " PETB[15] ,Prime endpoint transmit buffer 15" "Don't prime,Prime" bitfld.long 0x04 30. " [14] ,Prime endpoint transmit buffer 14" "Don't prime,Prime" bitfld.long 0x04 29. " [13] ,Prime endpoint transmit buffer 13" "Don't prime,Prime" bitfld.long 0x04 28. " [12] ,Prime endpoint transmit buffer 12" "Don't prime,Prime" textline " " bitfld.long 0x04 27. " [11] ,Prime endpoint transmit buffer 11" "Don't prime,Prime" bitfld.long 0x04 26. " [10] ,Prime endpoint transmit buffer 10" "Don't prime,Prime" bitfld.long 0x04 25. " [9] ,Prime endpoint transmit buffer 9" "Don't prime,Prime" bitfld.long 0x04 24. " [8] ,Prime endpoint transmit buffer 8" "Don't prime,Prime" textline " " bitfld.long 0x04 23. " [7] ,Prime endpoint transmit buffer 7" "Don't prime,Prime" bitfld.long 0x04 22. " [6] ,Prime endpoint transmit buffer 6" "Don't prime,Prime" bitfld.long 0x04 21. " [5] ,Prime endpoint transmit buffer 5" "Don't prime,Prime" bitfld.long 0x04 20. " [4] ,Prime endpoint transmit buffer 4" "Don't prime,Prime" textline " " bitfld.long 0x04 19. " [3] ,Prime endpoint transmit buffer 3" "Don't prime,Prime" bitfld.long 0x04 18. " [2] ,Prime endpoint transmit buffer 2" "Don't prime,Prime" bitfld.long 0x04 17. " [1] ,Prime endpoint transmit buffer 1" "Don't prime,Prime" bitfld.long 0x04 16. " [0] ,Prime endpoint transmit buffer 0" "Don't prime,Prime" textline " " bitfld.long 0x04 15. " PERB[15] ,Prime endpoint receive buffer 15" "Don't prime,Prime" bitfld.long 0x04 14. " [14] ,Prime endpoint receive buffer 14" "Don't prime,Prime" bitfld.long 0x04 13. " [13] ,Prime endpoint receive buffer 13" "Don't prime,Prime" bitfld.long 0x04 12. " [12] ,Prime endpoint receive buffer 12" "Don't prime,Prime" textline " " bitfld.long 0x04 11. " [11] ,Prime endpoint receive buffer 11" "Don't prime,Prime" bitfld.long 0x04 10. " [10] ,Prime endpoint receive buffer 10" "Don't prime,Prime" bitfld.long 0x04 9. " [9] ,Prime endpoint receive buffer 9" "Don't prime,Prime" bitfld.long 0x04 8. " [8] ,Prime endpoint receive buffer 8" "Don't prime,Prime" textline " " bitfld.long 0x04 7. " [7] ,Prime endpoint receive buffer 7" "Don't prime,Prime" bitfld.long 0x04 6. " [6] ,Prime endpoint receive buffer 6" "Don't prime,Prime" bitfld.long 0x04 5. " [5] ,Prime endpoint receive buffer 5" "Don't prime,Prime" bitfld.long 0x04 4. " [4] ,Prime endpoint receive buffer 4" "Don't prime,Prime" textline " " bitfld.long 0x04 3. " [3] ,Prime endpoint receive buffer 3" "Don't prime,Prime" bitfld.long 0x04 2. " [2] ,Prime endpoint receive buffer 2" "Don't prime,Prime" bitfld.long 0x04 1. " [1] ,Prime endpoint receive buffer 1" "Don't prime,Prime" bitfld.long 0x04 0. " [0] ,Prime endpoint receive buffer 0" "Don't prime,Prime" line.long 0x08 "USB2_CONTROLLER_USB2D_ENDPTFLUSH_0,USB2D Endpoint De-Initialization Register" bitfld.long 0x08 31. " FETB[15] ,Flush endpoint transmit buffer 15" "Don't flush,Flush" bitfld.long 0x08 30. " [14] ,Flush endpoint transmit buffer 14" "Don't flush,Flush" bitfld.long 0x08 29. " [13] ,Flush endpoint transmit buffer 13" "Don't flush,Flush" bitfld.long 0x08 28. " [12] ,Flush endpoint transmit buffer 12" "Don't flush,Flush" textline " " bitfld.long 0x08 27. " [11] ,Flush endpoint transmit buffer 11" "Don't flush,Flush" bitfld.long 0x08 26. " [10] ,Flush endpoint transmit buffer 10" "Don't flush,Flush" bitfld.long 0x08 25. " [9] ,Flush endpoint transmit buffer 9" "Don't flush,Flush" bitfld.long 0x08 24. " [8] ,Flush endpoint transmit buffer 8" "Don't flush,Flush" textline " " bitfld.long 0x08 23. " [7] ,Flush endpoint transmit buffer 7" "Don't flush,Flush" bitfld.long 0x08 22. " [6] ,Flush endpoint transmit buffer 6" "Don't flush,Flush" bitfld.long 0x08 21. " [5] ,Flush endpoint transmit buffer 5" "Don't flush,Flush" bitfld.long 0x08 20. " [4] ,Flush endpoint transmit buffer 4" "Don't flush,Flush" textline " " bitfld.long 0x08 19. " [3] ,Flush endpoint transmit buffer 3" "Don't flush,Flush" bitfld.long 0x08 18. " [2] ,Flush endpoint transmit buffer 2" "Don't flush,Flush" bitfld.long 0x08 17. " [1] ,Flush endpoint transmit buffer 1" "Don't flush,Flush" bitfld.long 0x08 16. " [0] ,Flush endpoint transmit buffer 0" "Don't flush,Flush" textline " " bitfld.long 0x08 15. " FERB[15] ,Flush endpoint receive buffer 15" "Don't flush,Flush" bitfld.long 0x08 14. " [14] ,Flush endpoint receive buffer 14" "Don't flush,Flush" bitfld.long 0x08 13. " [13] ,Flush endpoint receive buffer 13" "Don't flush,Flush" bitfld.long 0x08 12. " [12] ,Flush endpoint receive buffer 12" "Don't flush,Flush" textline " " bitfld.long 0x08 11. " [11] ,Flush endpoint receive buffer 11" "Don't flush,Flush" bitfld.long 0x08 10. " [10] ,Flush endpoint receive buffer 10" "Don't flush,Flush" bitfld.long 0x08 9. " [9] ,Flush endpoint receive buffer 9" "Don't flush,Flush" bitfld.long 0x08 8. " [8] ,Flush endpoint receive buffer 8" "Don't flush,Flush" textline " " bitfld.long 0x08 7. " [7] ,Flush endpoint receive buffer 7" "Don't flush,Flush" bitfld.long 0x08 6. " [6] ,Flush endpoint receive buffer 6" "Don't flush,Flush" bitfld.long 0x08 5. " [5] ,Flush endpoint receive buffer 5" "Don't flush,Flush" bitfld.long 0x08 4. " [4] ,Flush endpoint receive buffer 4" "Don't flush,Flush" textline " " bitfld.long 0x08 3. " [3] ,Flush endpoint receive buffer 3" "Don't flush,Flush" bitfld.long 0x08 2. " [2] ,Flush endpoint receive buffer 2" "Don't flush,Flush" bitfld.long 0x08 1. " [1] ,Flush endpoint receive buffer 1" "Don't flush,Flush" bitfld.long 0x08 0. " [0] ,Flush endpoint receive buffer 0" "Don't flush,Flush" rgroup.long 0x214++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTSTATUS_0,USB2D Endpoint Status Register" bitfld.long 0x00 31. " ETBR[15] ,Endpoint transmit buffer ready 15" "Not ready,Ready" bitfld.long 0x00 30. " [14] ,Endpoint transmit buffer ready 14" "Not ready,Ready" bitfld.long 0x00 29. " [13] ,Endpoint transmit buffer ready 13" "Not ready,Ready" bitfld.long 0x00 28. " [12] ,Endpoint transmit buffer ready 12" "Not ready,Ready" textline " " bitfld.long 0x00 27. " [11] ,Endpoint transmit buffer ready 11" "Not ready,Ready" bitfld.long 0x00 26. " [10] ,Endpoint transmit buffer ready 10" "Not ready,Ready" bitfld.long 0x00 25. " [9] ,Endpoint transmit buffer ready 9" "Not ready,Ready" bitfld.long 0x00 24. " [8] ,Endpoint transmit buffer ready 8" "Not ready,Ready" textline " " bitfld.long 0x00 23. " [7] ,Endpoint transmit buffer ready 7" "Not ready,Ready" bitfld.long 0x00 22. " [6] ,Endpoint transmit buffer ready 6" "Not ready,Ready" bitfld.long 0x00 21. " [5] ,Endpoint transmit buffer ready 5" "Not ready,Ready" bitfld.long 0x00 20. " [4] ,Endpoint transmit buffer ready 4" "Not ready,Ready" textline " " bitfld.long 0x00 19. " [3] ,Endpoint transmit buffer ready 3" "Not ready,Ready" bitfld.long 0x00 18. " [2] ,Endpoint transmit buffer ready 2" "Not ready,Ready" bitfld.long 0x00 17. " [1] ,Endpoint transmit buffer ready 1" "Not ready,Ready" bitfld.long 0x00 16. " [0] ,Endpoint transmit buffer ready 0" "Not ready,Ready" textline " " bitfld.long 0x00 15. " ERBR[15] ,Endpoint receive buffer ready 15" "Not ready,Ready" bitfld.long 0x00 14. " [14] ,Endpoint receive buffer ready 14" "Not ready,Ready" bitfld.long 0x00 13. " [13] ,Endpoint receive buffer ready 13" "Not ready,Ready" bitfld.long 0x00 12. " [12] ,Endpoint receive buffer ready 12" "Not ready,Ready" textline " " bitfld.long 0x00 11. " [11] ,Endpoint receive buffer ready 11" "Not ready,Ready" bitfld.long 0x00 10. " [10] ,Endpoint receive buffer ready 10" "Not ready,Ready" bitfld.long 0x00 9. " [9] ,Endpoint receive buffer ready 9" "Not ready,Ready" bitfld.long 0x00 8. " [8] ,Endpoint receive buffer ready 8" "Not ready,Ready" textline " " bitfld.long 0x00 7. " [7] ,Endpoint receive buffer ready 7" "Not ready,Ready" bitfld.long 0x00 6. " [6] ,Endpoint receive buffer ready 6" "Not ready,Ready" bitfld.long 0x00 5. " [5] ,Endpoint receive buffer ready 5" "Not ready,Ready" bitfld.long 0x00 4. " [4] ,Endpoint receive buffer ready 4" "Not ready,Ready" textline " " bitfld.long 0x00 3. " [3] ,Endpoint receive buffer ready 3" "Not ready,Ready" bitfld.long 0x00 2. " [2] ,Endpoint receive buffer ready 2" "Not ready,Ready" bitfld.long 0x00 1. " [1] ,Endpoint receive buffer ready 1" "Not ready,Ready" bitfld.long 0x00 0. " [0] ,Endpoint receive buffer ready 0" "Not ready,Ready" group.long 0x218++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCOMPLETE_0,USB2D Endpoint Complete Register" bitfld.long 0x00 31. " ETCE[15] ,Endpoint transmit buffer complete event 15" "Not completed,Completed" bitfld.long 0x00 30. " [14] ,Endpoint transmit buffer complete event 14" "Not completed,Completed" bitfld.long 0x00 29. " [13] ,Endpoint transmit buffer complete event 13" "Not completed,Completed" bitfld.long 0x00 28. " [12] ,Endpoint transmit buffer complete event 12" "Not completed,Completed" textline " " bitfld.long 0x00 27. " [11] ,Endpoint transmit buffer complete event 11" "Not completed,Completed" bitfld.long 0x00 26. " [10] ,Endpoint transmit buffer complete event 10" "Not completed,Completed" bitfld.long 0x00 25. " [9] ,Endpoint transmit buffer complete event 9" "Not completed,Completed" bitfld.long 0x00 24. " [8] ,Endpoint transmit buffer complete event 8" "Not completed,Completed" textline " " bitfld.long 0x00 23. " [7] ,Endpoint transmit buffer complete event 7" "Not completed,Completed" bitfld.long 0x00 22. " [6] ,Endpoint transmit buffer complete event 6" "Not completed,Completed" bitfld.long 0x00 21. " [5] ,Endpoint transmit buffer complete event 5" "Not completed,Completed" bitfld.long 0x00 20. " [4] ,Endpoint transmit buffer complete event 4" "Not completed,Completed" textline " " bitfld.long 0x00 19. " [3] ,Endpoint transmit buffer complete event 3" "Not completed,Completed" bitfld.long 0x00 18. " [2] ,Endpoint transmit buffer complete event 2" "Not completed,Completed" bitfld.long 0x00 17. " [1] ,Endpoint transmit buffer complete event 1" "Not completed,Completed" bitfld.long 0x00 16. " [0] ,Endpoint transmit buffer complete event 0" "Not completed,Completed" textline " " bitfld.long 0x00 15. " ERCE[15] ,Endpoint receive buffer complete event 15" "Not completed,Completed" bitfld.long 0x00 14. " [14] ,Endpoint receive buffer complete event 14" "Not completed,Completed" bitfld.long 0x00 13. " [13] ,Endpoint receive buffer complete event 13" "Not completed,Completed" bitfld.long 0x00 12. " [12] ,Endpoint receive buffer complete event 12" "Not completed,Completed" textline " " bitfld.long 0x00 11. " [11] ,Endpoint receive buffer complete event 11" "Not completed,Completed" bitfld.long 0x00 10. " [10] ,Endpoint receive buffer complete event 10" "Not completed,Completed" bitfld.long 0x00 9. " [9] ,Endpoint receive buffer complete event 9" "Not completed,Completed" bitfld.long 0x00 8. " [8] ,Endpoint receive buffer complete event 8" "Not completed,Completed" textline " " bitfld.long 0x00 7. " [7] ,Endpoint receive buffer complete event 7" "Not completed,Completed" bitfld.long 0x00 6. " [6] ,Endpoint receive buffer complete event 6" "Not completed,Completed" bitfld.long 0x00 5. " [5] ,Endpoint receive buffer complete event 5" "Not completed,Completed" bitfld.long 0x00 4. " [4] ,Endpoint receive buffer complete event 4" "Not completed,Completed" textline " " bitfld.long 0x00 3. " [3] ,Endpoint receive buffer complete event 3" "Not completed,Completed" bitfld.long 0x00 2. " [2] ,Endpoint receive buffer complete event 2" "Not completed,Completed" bitfld.long 0x00 1. " [1] ,Endpoint receive buffer complete event 1" "Not completed,Completed" bitfld.long 0x00 0. " [0] ,Endpoint receive buffer complete event 0" "Not completed,Completed" else hgroup.long 0x208++0x13 hide.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTSETUPSTAT_0,USB2D Endpoint Setup Status Register" textline " " textline " " textline " " textline " " textline " " textline " " hide.long 0x04 "USB2_CONTROLLER_USB2D_ENDPTPRIME_0,USB2D Endpoint Initialization Register" textline " " textline " " textline " " textline " " textline " " textline " " textline " " hide.long 0x08 "USB2_CONTROLLER_USB2D_ENDPTFLUSH_0,USB2D Endpoint De-Initialization Register" textline " " textline " " textline " " textline " " textline " " textline " " textline " " hide.long 0x0C "USB2_CONTROLLER_USB2D_ENDPTSTATUS_0,USB2D Endpoint Status Register" textline " " textline " " textline " " textline " " textline " " textline " " textline " " hide.long 0x10 "USB2_CONTROLLER_USB2D_ENDPTCOMPLETE_0,USB2D Endpoint Complete Register" endif tree.end tree "Endpoint Control" width 39. rgroup.long 0x21C++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL0_0,USB2D Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" group.long 0x220++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL1_0,USB2D Endpoint Control 1 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x224++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL2_0,USB2D Endpoint Control 2 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x228++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL3_0,USB2D Endpoint Control 3 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x22C++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL4_0,USB2D Endpoint Control 4 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x230++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL5_0,USB2D Endpoint Control 5 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x234++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL6_0,USB2D Endpoint Control 6 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x238++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL7_0,USB2D Endpoint Control 7 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x23C++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL8_0,USB2D Endpoint Control 8 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x240++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL9_0,USB2D Endpoint Control 9 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x244++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL10_0,USB2D Endpoint Control 10 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x248++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL11_0,USB2D Endpoint Control 11 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x24C++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL12_0,USB2D Endpoint Control 12 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x250++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL13_0,USB2D Endpoint Control 13 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x254++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL14_0,USB2D Endpoint Control 14 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x258++0x03 line.long 0x00 "USB2_CONTROLLER_USB2D_ENDPTCTRL15_0,USB2D Endpoint Control 15 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " tree.end tree.end tree "USB 1 Controller Interface" width 28. sif (cpu()=="TEGRAX1") if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset going to UTMIP PHY" "Not reset,Reset" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Invalid,Valid" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 4. " USB_WAKE_ON_DISCON_EN_DEV ,Wake on disconnect" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " USB_WAKE_ON_CNNT_EN_DEV ,Wake on connect" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "No interrupt,Interrupt" elif (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 26. " FAST_WAKEUP_RESP ,Enable fast response from UTMIP PHY for a remote wakeup request from device" "Disabled,Enabled" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset going to UTMIP PHY" "Not reset,Reset" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Invalid,Valid" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 2. " USB_WAKE_ON_RESUME_EN ,Wake on resume" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "No interrupt,Interrupt" else group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset going to UTMIP PHY" "Not reset,Reset" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Invalid,Valid" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" textline " " textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "No interrupt,Interrupt" endif else if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x02) group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 26. " FAST_WAKEUP_RESP ,Enable fast response from UTMIP PHY for a remote wakeup request from device" "Disabled,Enabled" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset goint to UTMIP PHY" "Not reset,Reset" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Invalid,Valid" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 4. " USB_WAKE_ON_DISCON_EN_DEV ,Wake on disconnect" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " USB_WAKE_ON_CNNT_EN_DEV ,Wake on connect" "Disabled,Enabled" bitfld.long 0x00 2. " USB_WAKE_ON_RESUME_EN ,Wake on resume" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "No interrupt,Interrupt" else group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 26. " FAST_WAKEUP_RESP ,Enable fast response from UTMIP PHY for a remote wakeup request from device" "Disabled,Enabled" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset goint to UTMIP PHY" "Not reset,Reset" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Invalid,Valid" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 2. " USB_WAKE_ON_RESUME_EN ,Wake on resume" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "No interrupt,Interrupt" endif endif textline " " width 34. sif (cpu()=="TEGRAX1") group.long 0x404++0x07 line.long 0x00 "USB1_IF_USB_PHY_VBUS_SENSORS_0,USB PHY VBUS SENSORS control register" bitfld.long 0x00 30. " A_VBUS_VLD_WAKEUP_EN ,A_VBUS_VLD wakeup enable" "Disabled,Enabled" bitfld.long 0x00 29. " A_VBUS_VLD_DEB_SEL_B ,A_VBUS_VLD debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 28. " A_VBUS_VLD_SW_VALUE ,A_VBUS_VLD software value (software enabled)" "Low,High" textline " " bitfld.long 0x00 27. " A_VBUS_VLD_SW_EN ,A_VBUS_VLD software enable" "Disabled,Enabled" rbitfld.long 0x00 26. " A_VBUS_VLD_STS ,A_VBUS_VLD status" "Low,High" rbitfld.long 0x00 25. " A_VBUS_VLD_CHG_DET ,A_VBUS_VLD change detect" "Not detected,Detected" textline " " bitfld.long 0x00 24. " A_VBUS_VLD_INT_EN ,A_VBUS_VLD interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22. " A_SESS_VLD_WAKEUP_EN ,A_SESS_VLD wakeup enable" "Disabled,Enabled" bitfld.long 0x00 21. " A_SESS_VLD_DEB_SEL_B ,A_SESS_VLD debounce A/B select" "SEL_A,SEL_B" textline " " bitfld.long 0x00 20. " A_SESS_VLD_SW_VALUE ,A_SESS_VLD software value (software enabled)" "Low,High" bitfld.long 0x00 19. " A_SESS_VLD_SW_EN ,A_SESS_VLD software enable" "Disabled,Enabled" rbitfld.long 0x00 18. " A_SESS_VLD_STS ,A_SESS_VLD status" "Low,High" textline " " rbitfld.long 0x00 17. " A_SESS_VLD_CHG_DET ,A_SESS_VLD change detect" "Not detected,Detected" bitfld.long 0x00 16. " A_SESS_VLD_INT_EN ,A_SESS_VLD interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " B_SESS_VLD_WAKEUP_EN ,B_SESS_VLD wakeup enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " B_SESS_VLD_DEB_SEL_B ,B_SESS_VLD debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 12. " B_SESS_VLD_SW_VALUE ,B_SESS_VLD software value (software enabled)" "Low,High" bitfld.long 0x00 11. " B_SESS_VLD_SW_EN ,B_SESS_VLD software enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " B_SESS_VLD_STS ,B_SESS_VLD status" "Low,High" rbitfld.long 0x00 9. " B_SESS_VLD_CHG_DET ,B_SESS_VLD change detect" "Not detected,Detected" bitfld.long 0x00 8. " B_SESS_VLD_INT_EN ,B_SESS_VLD interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " B_SESS_END_WAKEUP_EN ,B_SESS_END wakeup enable" "Disabled,Enabled" bitfld.long 0x00 5. " B_SESS_END_DEB_SEL_B ,B_SESS_END debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 4. " B_SESS_END_SW_VALUE ,B_SESS_END software value (software enabled)" "Low,High" textline " " bitfld.long 0x00 3. " B_SESS_END_SW_EN ,B_SESS_END software enable" "Disabled,Enabled" rbitfld.long 0x00 2. " B_SESS_END_STS ,B_SESS_END status" "Low,High" rbitfld.long 0x00 1. " B_SESS_END_CHG_DET ,B_SESS_END change detect" "Not detected,Detected" textline " " bitfld.long 0x00 0. " B_SESS_END_INT_EN ,B_SESS_END interrupt enable" "Disabled,Enabled" line.long 0x04 "USB1_IF_USB_PHY_VBUS_WAKEUP_ID_0,USB PHY VBUS wakeup and ID control register" bitfld.long 0x04 31. " DIV_DET_EN ,Battery charger divider detection enable" "Disabled,Enabled" bitfld.long 0x04 30. " VBUS_WAKEUP_WAKEUP_EN ,VBUS_WAKEUP wakeup enable" "Disabled,Enabled" bitfld.long 0x04 29. " VDCD_DET_DEB_SEL_B ,VCDT_DET debounce A/B select" "SEL_A,SEL_B" textline " " bitfld.long 0x04 28. " VDCD_DET_SW_VALUE ,VDCD_DET software value (software enabled)" "Low,High" bitfld.long 0x04 27. " VDCD_DET_SW_EN ,VDCD_DET software enable" "Disabled,Enabled" rbitfld.long 0x04 26. " VDCD_DET_STS ,VDCD_DET status" "Low,High" textline " " rbitfld.long 0x04 25. " VDCD_DET_CHG_DET ,VDCD_DET change detect" "Not detected,Detected" bitfld.long 0x04 24. " VDCD_DET_INT_EN ,VDCD_DET interrupt enable" "Disabled,Enabled" rbitfld.long 0x04 23. " VOP_DIV2P7_DET ,VOP_DIV2P7 detect" "Not detected,Detected" textline " " rbitfld.long 0x04 22. " VOP_DIV2P0_DET ,VOP_DIV2P0 detect" "Not detected,Detected" bitfld.long 0x04 21. " VDAT_DET_DEB_SEL_B ,VDAT_DET debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 20. " VDAT_DET_SW_VALUE ,VDAT_DET software value (software enabled)" "Low,High" textline " " bitfld.long 0x04 19. " VDAT_DET_SW_EN ,VDAT_DET software enable" "Disabled,Enabled" rbitfld.long 0x04 18. " VDAT_DET_STS ,VDAT_DET status" "Low,High" rbitfld.long 0x04 17. " VDAT_DET_CHG_DET ,VDAT_DET change detect" "Not detected,Detected" textline " " bitfld.long 0x04 16. " VDAT_DET_INT_EN ,VDAT_DET interrupt enable" "Disabled,Enabled" rbitfld.long 0x04 15. " VON_DIV2P7_DET ,VON_DIV2P7 detect" "Not detected,Detected" rbitfld.long 0x04 14. " VON_DIV2P0_DET ,VON_DIV2P0 detect" "Not detected,Detected" textline " " bitfld.long 0x04 13. " VBUS_WAKEUP_DEB_SEL_B ,VBUS_WAKEUP debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 12. " VBUS_WAKEUP_SW_VALUE ,VBUS wakeup software value (software enabled)" "Low,High" bitfld.long 0x04 11. " VBUS_WAKEUP_SW_EN ,VBUS wakeup software enable" "Disabled,Enabled" textline " " rbitfld.long 0x04 10. " VBUS_WAKEUP_STS ,VBUS wakeup status" "Low,High" rbitfld.long 0x04 9. " VBUS_WAKEUP_CHG_DET ,VBUS wakeup change detect" "Not detected,Detected" bitfld.long 0x04 8. " VBUS_WAKEUP_INT_EN ,VBUS wakeup interrupt enable" "Disabled,Enabled" textline " " rbitfld.long 0x04 7. " STATIC_GPI ,Static GPI status" "Unset,Set" bitfld.long 0x04 6. " ID_PU ,ID pullup enable" "Disabled,Enabled" bitfld.long 0x04 5. " ID_DEB_SEL_B ,ID debounce A/B select" "SEL_A,SEL_B" textline " " bitfld.long 0x04 4. " ID_SW_VALUE ,ID software value (software enabled)" "Low,High" bitfld.long 0x04 3. " ID_SW_EN ,ID software enable" "Disabled,Enabled" rbitfld.long 0x04 2. " ID_STS ,ID status" "Low,High" textline " " rbitfld.long 0x04 1. " ID_CHG_DET ,ID change detect" "Not detected,Detected" bitfld.long 0x04 0. " ID_INT_EN ,ID interrupt enable" "Disabled,Enabled" rgroup.long 0x40C++0x03 line.long 0x00 "USB1_IF_USB_PHY_ALT_VBUS_STS_0,USB PHY Alternate VBUS status register" bitfld.long 0x00 14. " ID_DIG_C_ALT ,IDDIG_C alternate status" "Low,High" bitfld.long 0x00 13. " ID_DIG_C ,IDDIG_C status" "Low,High" bitfld.long 0x00 12. " ID_DIG_B_ALT ,IDDIG_B alternate status" "Low,High" textline " " bitfld.long 0x00 11. " ID_DIG_B ,ID_DIG_B status" "Low,High" bitfld.long 0x00 10. " ID_DIG_A_ALT ,IDDIG_A alternate status" "Low,High" bitfld.long 0x00 9. " ID_DIG_A ,ID_DIG_A status" "Low,High" textline " " bitfld.long 0x00 8. " VDCD_DET_ALT ,VDCD_DET alternate status" "Low,High" bitfld.long 0x00 7. " VDAT_DET_ALT ,VDAT_DET alternate status" "Low,High" bitfld.long 0x00 6. " A_SESS_VLD_ALT ,A_SESS_VLD alternate status" "Low,High" textline " " bitfld.long 0x00 5. " B_SESS_VLD_ALT ,B_SESS_VLD alternate status" "Low,High" bitfld.long 0x00 4. " ID_DIG_ALT ,ID alternate status" "Low,High" bitfld.long 0x00 3. " B_SESS_END_ALT ,B_SESS_END alternate status" "Low,High" textline " " bitfld.long 0x00 2. " STATIC_GPI_ALT ,Static GPI alternate status" "Low,High" bitfld.long 0x00 1. " A_VBUS_VLD_ALT ,A_VBUS_VLD alternate status" "Low,High" bitfld.long 0x00 0. " VBUS_WAKEUP_ALT ,Vbus wakeup alternate status" "Low,High" else group.long 0x404++0x07 line.long 0x00 "USB1_IF_USB_PHY_VBUS_SENSORS_0,USB PHY VBUS SENSORS control register" bitfld.long 0x00 30. " A_VBUS_VLD_WAKEUP_EN ,A_VBUS_VLD wakeup enable" "Disabled,Enabled" bitfld.long 0x00 29. " A_VBUS_VLD_DEB_SEL_B ,A_VBUS_VLD debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 28. " A_VBUS_VLD_SW_VALUE ,A_VBUS_VLD software value (software enabled)" "Low,High" textline " " bitfld.long 0x00 27. " A_VBUS_VLD_SW_EN ,A_VBUS_VLD software enable" "Disabled,Enabled" rbitfld.long 0x00 26. " A_VBUS_VLD_STS ,A_VBUS_VLD status" "Low,High" rbitfld.long 0x00 25. " A_VBUS_VLD_CHG_DET ,A_VBUS_VLD change detect" "Not detected,Detected" textline " " bitfld.long 0x00 24. " A_VBUS_VLD_INT_EN ,A_VBUS_VLD interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22. " A_SESS_VLD_WAKEUP_EN ,A_SESS_VLD wakeup enable" "Disabled,Enabled" bitfld.long 0x00 21. " A_SESS_VLD_DEB_SEL_B ,A_SESS_VLD debounce A/B select" "SEL_A,SEL_B" textline " " bitfld.long 0x00 20. " A_SESS_VLD_SW_VALUE ,A_SESS_VLD software value (software enabled)" "Low,High" bitfld.long 0x00 19. " A_SESS_VLD_SW_EN ,A_SESS_VLD software enable" "Disabled,Enabled" rbitfld.long 0x00 18. " A_SESS_VLD_STS ,A_SESS_VLD status" "Low,High" textline " " rbitfld.long 0x00 17. " A_SESS_VLD_CHG_DET ,A_SESS_VLD change detect" "Not detected,Detected" bitfld.long 0x00 16. " A_SESS_VLD_INT_EN ,A_SESS_VLD interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " B_SESS_VLD_WAKEUP_EN ,B_SESS_VLD wakeup enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " B_SESS_VLD_DEB_SEL_B ,B_SESS_VLD debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 12. " B_SESS_VLD_SW_VALUE ,B_SESS_VLD software value (software enabled)" "Low,High" bitfld.long 0x00 11. " B_SESS_VLD_SW_EN ,B_SESS_VLD software enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " B_SESS_VLD_STS ,B_SESS_VLD status" "Low,High" rbitfld.long 0x00 9. " B_SESS_VLD_CHG_DET ,B_SESS_VLD change detect" "Not detected,Detected" bitfld.long 0x00 8. " B_SESS_VLD_INT_EN ,B_SESS_VLD interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " B_SESS_END_WAKEUP_EN ,B_SESS_END wakeup enable" "Disabled,Enabled" bitfld.long 0x00 5. " B_SESS_END_DEB_SEL_B ,B_SESS_END debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 4. " B_SESS_END_SW_VALUE ,B_SESS_END software value (software enabled)" "Low,High" textline " " bitfld.long 0x00 3. " B_SESS_END_SW_EN ,B_SESS_END software enable" "Disabled,Enabled" rbitfld.long 0x00 2. " B_SESS_END_STS ,B_SESS_END status" "Low,High" rbitfld.long 0x00 1. " B_SESS_END_CHG_DET ,B_SESS_END change detect" "Not detected,Detected" textline " " bitfld.long 0x00 0. " B_SESS_END_INT_EN ,B_SESS_END interrupt enable" "Disabled,Enabled" line.long 0x04 "USB1_IF_USB_PHY_VBUS_WAKEUP_ID_0,USB PHY VBUS wakeup and ID control register" bitfld.long 0x04 30. " VBUS_WAKEUP_WAKEUP_EN ,VBUS_WAKEUP wakeup enable" "Disabled,Enabled" bitfld.long 0x04 29. " VDCD_DET_DEB_SEL_B ,VCDT_DET debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 28. " VDCD_DET_SW_VALUE ,VDCD_DET software value (software enabled)" "Low,High" textline " " bitfld.long 0x04 27. " VDCD_DET_SW_EN ,VDCD_DET software enable" "Disabled,Enabled" rbitfld.long 0x04 26. " VDCD_DET_STS ,VDCD_DET status" "Low,High" rbitfld.long 0x04 25. " VDCD_DET_CHG_DET ,VDCD_DET change detect" "Not detected,Detected" textline " " bitfld.long 0x04 24. " VDCD_DET_INT_EN ,VDCD_DET interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " VDAT_DET_DEB_SEL_B ,VDAT_DET debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 20. " VDAT_DET_SW_VALUE ,VDAT_DET software value (software enabled)" "Low,High" textline " " bitfld.long 0x04 19. " VDAT_DET_SW_EN ,VDAT_DET software enable" "Disabled,Enabled" rbitfld.long 0x04 18. " VDAT_DET_STS ,VDAT_DET status" "Low,High" rbitfld.long 0x04 17. " VDAT_DET_CHG_DET ,VDAT_DET change detect" "Not detected,Detected" textline " " bitfld.long 0x04 16. " VDAT_DET_INT_EN ,VDAT_DET interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " VBUS_WAKEUP_DEB_SEL_B ,VBUS_WAKEUP debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 12. " VBUS_WAKEUP_SW_VALUE ,VBUS wakeup software value (software enabled)" "Low,High" textline " " bitfld.long 0x04 11. " VBUS_WAKEUP_SW_EN ,VBUS wakeup software enable" "Disabled,Enabled" rbitfld.long 0x04 10. " VBUS_WAKEUP_STS ,VBUS wakeup status" "Low,High" rbitfld.long 0x04 9. " VBUS_WAKEUP_CHG_DET ,VBUS wakeup change detect" "Not detected,Detected" textline " " bitfld.long 0x04 8. " VBUS_WAKEUP_INT_EN ,VBUS wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x04 7. " STATIC_GPI ,Static GPI status" "Unset,Set" bitfld.long 0x04 6. " ID_PU ,ID pullup enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " ID_DEB_SEL_B ,ID debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 4. " ID_SW_VALUE ,ID software value (software enabled)" "Low,High" bitfld.long 0x04 3. " ID_SW_EN ,ID software enable" "Disabled,Enabled" textline " " rbitfld.long 0x04 2. " ID_STS ,ID status" "Low,High" rbitfld.long 0x04 1. " ID_CHG_DET ,ID change detect" "Not detected,Detected" bitfld.long 0x04 0. " ID_INT_EN ,ID interrupt enable" "Disabled,Enabled" rgroup.long 0x40C++0x03 line.long 0x00 "USB1_IF_USB_PHY_ALT_VBUS_STS_0,USB PHY Alternate VBUS status register" bitfld.long 0x00 8. " VDCD_DET_ALT ,VDCD_DET alternate status" "Low,High" bitfld.long 0x00 7. " VDAT_DET_ALT ,VDAT_DET alternate status" "Low,High" bitfld.long 0x00 6. " A_SESS_VLD_ALT ,A_SESS_VLD alternate status" "Low,High" textline " " bitfld.long 0x00 5. " B_SESS_VLD_ALT ,B_SESS_VLD alternate status" "Low,High" bitfld.long 0x00 4. " ID_DIG_ALT ,ID alternate status" "Low,High" bitfld.long 0x00 3. " B_SESS_END_ALT ,B_SESS_END alternate status" "Low,High" textline " " bitfld.long 0x00 2. " STATIC_GPI_ALT ,Static GPI alternate status" "Low,High" bitfld.long 0x00 1. " A_VBUS_VLD_ALT ,A_VBUS_VLD alternate status" "Low,High" bitfld.long 0x00 0. " VBUS_WAKEUP_ALT ,Vbus wakeup alternate status" "Low,High" endif textline " " width 28. sif (cpu()!="TEGRAX1") group.long 0x410++0x03 line.long 0x00 "USB1_IF_USB1_LEGACY_CTRL_0,USB1 Legacy control register" bitfld.long 0x00 1.--2. " USB1_VBUS_SENSE_CTL ,VBUS sensor input select to be driven to the controller" "VBUS_WAKEUP,AB_SESS_VLD_OR_VBUS_WAKEUP,AB_SESS_VLD,A_SESS_VLD" rbitfld.long 0x00 0. " USB1_NO_LEGACY_MODE ,Legacy register select" "Legacy,New" endif textline " " width 36. if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) sif (cpu()=="TEGRAX1") group.long 0x420++0x03 line.long 0x00 "USB1_IF_USB_INTER_PKT_DELAY_CTRL_0,Inter packet delay control" hexmask.long.byte 0x00 0.--6. 1. " IP_DELAY_TX2TX_HS ,HS Tx to Tx inter-packet delay" else group.long 0x420++0x03 line.long 0x00 "USB1_IF_USB_INTER_PKT_DELAY_CTRL_0,Inter packet delay control" bitfld.long 0x00 0.--5. " IP_DELAY_TX2TX_HS ,HS Tx to Tx inter-packet delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif else hgroup.long 0x420++0x03 hide.long 0x00 "USB1_IF_USB_INTER_PKT_DELAY_CTRL_0,Inter packet delay control" endif if (((per.l(ad:0x7D000000+0x1F8))&0x03)==0x03) group.long 0x490++0x03 line.long 0x00 "USB1_IF_USB_RSM_DLY_0,USB Controller Resume Signalling Delay" hexmask.long.word 0x00 0.--15. 1. " TIME_TO_RESUME ,Send the resume back in no. of 60 MHz cycles" else hgroup.long 0x490++0x03 hide.long 0x00 "USB1_IF_USB_RSM_DLY_0,USB Controller Resume Signalling Delay" endif group.long 0x498++0x03 line.long 0x00 "USB1_IF_SPARE_0,ICUSB PADCTLS Spare Register" hexmask.long.word 0x00 16.--31. 1. " SPARE_HI ,Spare register bits" hexmask.long.word 0x00 0.--15. 1. " SPARE_LO ,Spare register bits" textline " " sif (cpu()=="TEGRAX1") width 29. group.long 0x4C0++0x03 line.long 0x00 "USB1_IF_USB1_NEW_CONTROL_0,USB Coherency and Memory Alignment Controls" hexmask.long.byte 0x00 8.--15. 1. " REQUEST_EXPIRY_COUNTER ,Time to wait for coalescing the request" bitfld.long 0x00 1. " MEM_ALIGNMENT_MUX_EN ,DMA request generation mechanism mux enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " COHERENCY_EN , Enable fence mechanism" "Disabled,Enabled" endif tree.end sif (cpu()=="TEGRAX1") tree "USB 1 UTMIP Configuration" width 28. group.long 0x808++0x37 line.long 0x00 "USB1_UTMIP_XCVR_CFG0_0,UTMIP transceiver cell configuration register 0" hexmask.long.byte 0x00 25.--31. 1. " UTMIP_XCVR_HSSLEW_MSB ,Most significant bits of HS_SLEW" bitfld.long 0x00 22.--24. " UTMIP_XCVR_SETUP_MSB ,Most significant bits of SETUP" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 21. " UTMIP_XCVR_LSBIAS_SEL ,Low speed bias selection method for usb transceiver pad" "0,1" bitfld.long 0x00 20. " UTMIP_XCVR_DISCON_METHOD ,Disconnect method on the usb transceiver pad" "0,1" textline " " bitfld.long 0x00 19. " UTMIP_FORCE_PDZI_POWERUP ,Force PDZI input into power up" "Disabled,Enabled" bitfld.long 0x00 18. " UTMIP_FORCE_PDZI_POWERDOWN ,Force PDZI input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " UTMIP_FORCE_PD2_POWERUP ,Force PD2 input into power up" "Disabled,Enabled" bitfld.long 0x00 16. " UTMIP_FORCE_PD2_POWERDOWN ,Force PD2 input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " UTMIP_FORCE_PD_POWERUP ,Force PD input into power up." "Disabled,Enabled" bitfld.long 0x00 14. " UTMIP_FORCE_PD_POWERDOWN ,Force PD input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UTMIP_XCVR_TERMEN ,Enable HS termination" "Disabled,Enabled" bitfld.long 0x00 12. " UTMIP_XCVR_HSLOOPBACK ,Internal loopback inside XCVR cell" "0,1" textline " " bitfld.long 0x00 10.--11. " UTMIP_XCVR_LSFSLEW ,LS falling slew rate control" "0,1,2,3" bitfld.long 0x00 8.--9. " UTMIP_XCVR_LSRSLEW ,LS rising slew rate control" "0,1,2,3" textline " " bitfld.long 0x00 6.--7. " UTMIP_XCVR_FSSLEW ,FS slew rate control" "0,1,2,3" bitfld.long 0x00 4.--5. " UTMIP_XCVR_HSSLEW ,HS slew rate control" "0,1,2,3" textline " " bitfld.long 0x00 0.--3. " UTMIP_XCVR_SETUP ,SETUP[3:0] input of XCVR cell" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "USB1_UTMIP_BIAS_CFG0_0,UTMIP Bias cell configuration register 0" bitfld.long 0x04 30. " UTMIP_IDDIG_C_VAL ,IDDIG_C value" "0,1" bitfld.long 0x04 29. " UTMIP_IDDIG_C_SEL ,IDDIG_C select" "0,1" textline " " bitfld.long 0x04 28. " UTMIP_IDDIG_B_VAL ,IDDIG_B value" "0,1" bitfld.long 0x04 27. " UTMIP_IDDIG_B_SEL ,IDDIG_B select" "0,1" textline " " bitfld.long 0x04 26. " UTMIP_IDDIG_A_VAL ,IDDIG_A value" "0,1" bitfld.long 0x04 25. " UTMIP_IDDIG_A_SEL ,IDDIG_A select" "0,1" textline " " bitfld.long 0x04 24. " UTMIP_HSDISCON_LEVEL_MSB ,Most significant bit of UTMIP_HSDISCON_LEVEL" "0,1" bitfld.long 0x04 23. " UTMIP_IDPD_VAL ,IDPD value" "0,1" textline " " bitfld.long 0x04 21. " UTMIP_IDDIG_VAL ,IDDIG value" "0,1" bitfld.long 0x04 20. " UTMIP_IDDIG_SEL ,IDDIG select" "IdDig,IDDIG_VAL" textline " " bitfld.long 0x04 19. " UTMIP_GPI_VAL ,GPI value" "0,1" bitfld.long 0x04 18. " UTMIP_GPI_SEL ,GPI select" "IdDig,GPI_VAL" textline " " bitfld.long 0x04 15.--17. " UTMIP_ACTIVE_TERM_OFFSET ,Active termination control offset" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " UTMIP_ACTIVE_PULLUP_OFFSET ,Active 1.5K pullup control offset" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 11. " UTMIP_OTGPD ,Power down OTG circuit" "Disabled,Enabled" bitfld.long 0x04 10. " UTMIP_BIASPD ,Power down bias circuit" "Disabled,Enabled" textline " " bitfld.long 0x04 8.--9. " UTMIP_VBUS_LEVEL_LEVEL ,Vbus detector level" "0,1,2,3" bitfld.long 0x04 6.--7. " UTMIP_SESS_LEVEL_LEVEL ,SessionEnd detector level" "0,1,2,3" textline " " bitfld.long 0x04 4.--5. " UTMIP_HSCHIRP_LEVEL ,HS chirp detector level" "0,1,2,3" bitfld.long 0x04 2.--3. " UTMIP_HSDISCON_LEVEL ,HS disconnect detector level" "0,1,2,3" textline " " bitfld.long 0x04 0.--1. " UTMIP_HSSQUELCH_LEVEL ,HS squelch detector level" "0,1,2,3" line.long 0x08 "USB1_UTMIP_HSRX_CFG0_0,UTMIP High speed receive config 0" bitfld.long 0x08 30.--31. " UTMIP_KEEP_PATT_ON_ACTIVE ,Keep the stay alive pattern on active" "0,1,2,3" bitfld.long 0x08 29. " UTMIP_ALLOW_CONSEC_UPDN ,Allow consecutive ups and downs on the bits" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " UTMIP_REALIGN_ON_NEW_PKT ,Realign the inertia counters on a new packet" "Disabled,Enabled" bitfld.long 0x08 24.--27. " UTMIP_PCOUNT_UPDN_DIV ,The number of (edges-1) needed to move the sampling point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 21.--23. " UTMIP_SQUELCH_EOP_DLY ,Limit the delay of the squelch at EOP time" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20. " UTMIP_NO_STRIPPING ,Do not strip incoming data" "Disabled,Enabled" textline " " bitfld.long 0x08 15.--19. " UTMIP_IDLE_WAIT ,Number of cycles of idle to declare IDLE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 10.--14. " UTMIP_ELASTIC_LIMIT ,Depth of elastic input store" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 9. " UTMIP_ELASTIC_OVERRUN_DISABLE ,Do not declare overrun errors until overflow of FIFO" "Disabled,Enabled" bitfld.long 0x08 8. " UTMIP_ELASTIC_UNDERRUN_DISABLE ,Do not declare underrun errors" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " UTMIP_PASS_CHIRP ,When in Chirp Mode, allow chirp rx data through" "Disabled,Enabled" bitfld.long 0x08 6. " UTMIP_PASS_FEEDBACK ,Pass through the feedback, do not block it" "No,Yes" textline " " bitfld.long 0x08 4.--5. " UTMIP_PCOUNT_INERTIA ,Retime the path" "0,1,2,3" bitfld.long 0x08 2.--3. " UTMIP_PHASE_ADJUST ,Based on incoming edges and current sampling position phase adjust" "0,1,2,3" textline " " bitfld.long 0x08 1. " UTMIP_THREE_SYNCBITS ,Sync pattern detection needs 3 consecutive samples instead of 4" "No,Yes" bitfld.long 0x08 0. " UTMIP_USE4SYNC_TRAN ,Require 4 sync pattern transitions (01) instead of 3" "No,Yes" line.long 0x0C "USB1_UTMIP_HSRX_CFG1_0,UTMIP High speed receive config 1" bitfld.long 0x0C 1.--5. " UTMIP_HS_SYNC_START_DLY ,How long to wait before start of sync launches RxActive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0. " UTMIP_HS_ALLOW_KEEP_ALIVE ,Allow Keep Alive packets" "Disabled,Enabled" line.long 0x10 "USB1_UTMIP_FSLSRX_CFG0_0,UTMIP full and Low speed receive config 0" bitfld.long 0x10 31. " UTMIP_FSLS_SE1_DRIBBLE_FILTER ,Don't allow dribble" "Disabled,Enabled" bitfld.long 0x10 30. " UTMIP_FSLS_SE1_FILTER ,Filter SE1" "0,1" textline " " bitfld.long 0x10 29. " UTMIP_FSLS_SERIAL_SE0_RCV ,UTMIP_FSLS_SERIAL_SE0_RCV" "0,1" bitfld.long 0x10 26.--28. " UTMIP_FSLS_UPR_DRIBBLE_SIZE ,Do not allow <= dribble bits" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 23.--25. " UTMIP_FSLS_LWR_DRIBBLE_SIZE ,Do not allow >= dribble bits" "0,1,2,3,4,5,6,7" bitfld.long 0x10 22. " UTMIP_FSLS_EOP_ENDS_AT_SE0 ,Only look for transitioning out of EOP" "No,Yes" textline " " bitfld.long 0x10 16.--21. " UTMIP_FSLS_KCOUNT_MAX ,Number of K bits in question" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 15. " UTMIP_FSLS_KCOUNT_LIMIT ,Limit the number of bit times a K can last" "No,Yes" textline " " bitfld.long 0x10 14. " UTMIP_FSLS_ACTIVE_ON_FULL_SYNC ,Require a full sync pattern to declare the data received" "No,Yes" bitfld.long 0x10 8.--13. " UTMIP_FSLS_IDLE_WAIT_MAX ,IDLE wait max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 7. " UTMIP_FSLS_IDLE_WAIT_LIMIT ,Enable the reset of the state machine on extended SE0" "Disabled,Enabled" bitfld.long 0x10 1.--6. " UTMIP_FSLS_IDLE_COUNT_MAX ,Idle count max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 0. " UTMIP_FSLS_IDLE_COUNT_LIMIT ,Give up on packet if a long sequence of J" "No,Yes" line.long 0x14 "USB1_UTMIP_FSLSRX_CFG1_0,UTMIP full and Low speed receive config 1" bitfld.long 0x14 26. " UTMIP_EARLY_LINE_STATE_FILTER ,Assumes line state filtering table is inclusive" "No,Yes" bitfld.long 0x14 23.--25. " UTMIP_LS_BOUNCE_LENGTH ,Number of clock cycle of LS stable" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 17.--22. " UTMIP_LS_EXTRACTION_COUNT ,Phase count on which LS bits are extracted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 11.--16. " UTMIP_LS_EOP_START_COUNT ,Number of SEO clock cycles to block bit extraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 5.--10. " UTMIP_LS_SE0_COUNT ,Only for this number of 60MHz of SEO and Idle to end packet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 4. " UTMIP_LS_LENIENT_DRIBBLE ,Allow for large dribble in low speed mode" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " UTMIP_FS_LENIENT_DRIBBLE ,Allow for large dribble in full speed mode" "Disabled,Enabled" bitfld.long 0x14 2. " UTMIP_FS_WEAK_SYNC ,Only look for a KK pattern instead of KJKK" "No,Yes" textline " " bitfld.long 0x14 1. " UTMIP_FS_DEBOUNCE ,Whether full speed uses debouncing" "No,Yes" bitfld.long 0x14 0. " UTMIP_FS_EOP_LENGTH ,Whether full speed EOP is determined within 3(0) or 4(1) 60MHz cycles" "3 cycles,4 cycles" line.long 0x18 "USB1_UTMIP_TX_CFG0_0,UTMIP transmit config signals" bitfld.long 0x18 19. " UTMIP_FS_PREAMBLE_J ,Output enable sends an initial J before sync pattern" "Disabled,Enabled" bitfld.long 0x18 18. " UTMIP_FS_POSTAMBLE_OUTPUT_ENABLE ,Output enable turns off 1/2 cycle after" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " UTMIP_FS_PREAMBLE_OUTPUT_ENABLE ,Output enable turns on 1/2 cycle before" "Disabled,Enabled" bitfld.long 0x18 16. " UTMIP_FSLS_ALLOW_SOP_TX_STUFF_ERR ,Allow SOP to be source of transmit error stuffing" "Disabled,Enabled" textline " " bitfld.long 0x18 15. " UTMIP_HS_READY_WAIT_FOR_VALID ,UTMIP_HS_READY_WAIT_FOR_VALID" "0,1" bitfld.long 0x18 10.--14. " UTMIP_HS_TX_IPG_DLY ,UTMIP_HS_TX_IPG_DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 9. " UTMIP_HS_DISCON_EOP_ONLY ,Only check during EOP" "No,Yes" bitfld.long 0x18 8. " UTMIP_HS_DISCON_DISABLE ,Disable high speed disconnect" "No,Yes" textline " " bitfld.long 0x18 7. " UTMIP_HS_POSTAMBLE_OUTPUT_ENABLE ,Output enable turns off 1 cycle after" "Disabled,Enabled" bitfld.long 0x18 6. " UTMIP_HS_PREAMBLE_OUTPUT_ENABLE ,Output enable turns on 1 cycle before" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " UTMIP_SIE_RESUME_ON_LINESTATE ,SIE (not macrocell) detects LineState change to resume" "No,Yes" bitfld.long 0x18 4. " UTMIP_SOF_ON_NO_STUFF ,Sof when OpMode 3 -- perhaps, when sending controller made packets" "0,1" textline " " bitfld.long 0x18 3. " UTMIP_SOF_ON_NO_ENCODE ,Sof when OpMode 2 -- not likely, for Chirp" "0,1" bitfld.long 0x18 2. " UTMIP_NO_STUFFING ,No bit stuffing, static programming" "0,1" textline " " bitfld.long 0x18 1. " UTMIP_NO_ENCODING ,No encoding, static programming" "0,1" bitfld.long 0x18 0. " UTMIP_NO_SYNC_NO_EOP ,Do not sent SYNC or EOP" "Disabled,Enabled" line.long 0x1C "USB1_UTMIP_MISC_CFG0_0,UTMIP miscellaneous configurations" bitfld.long 0x1C 27.--30. " UTMIP_DPDM_OBSERVE_SEL ,Select DP/DM obs signals" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 26. " UTMIP_DPDM_OBSERVE ,Use DP/DM as obs bus" "0,1" textline " " bitfld.long 0x1C 25. " UTMIP_KEEP_XCVR_PD_ON_SOFT_DISCON ,UTMIP_KEEP_XCVR_PD_ON_SOFT_DISCON" "0,1" bitfld.long 0x1C 24. " UTMIP_ALLOW_LS_ON_SOFT_DISCON ,UTMIP_ALLOW_LS_ON_SOFT_DISCON" "0,1" textline " " bitfld.long 0x1C 23. " UTMIP_FORCE_FS_DISABLE_ON_DEV_CHIRP ,UTMIP_FORCE_FS_DISABLE_ON_DEV_CHIRP" "0,1" bitfld.long 0x1C 22. " UTMIP_SUSPEND_EXIT_ON_EDGE ,Suspend exit requires edge or simply a value" "0,1" textline " " bitfld.long 0x1C 21. " UTMIP_LS_TO_FS_SKIP_4MS ,Don't block changes for 4ms when going from LS to FS" "0,1" bitfld.long 0x1C 19.--20. " UTMIP_INJECT_ERROR_TYPE ,Force error insertion into RX path" "Disabled,BIT_ERR,RX_ERR,BIT_RX_ERR" textline " " bitfld.long 0x1C 18. " UTMIP_FORCE_HS_CLOCK_ON ,Force HS clock always on" "Disabled,Enabled" bitfld.long 0x1C 17. " UTMIP_DISABLE_HS_TERM ,Force HS termination inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 16. " UTMIP_FORCE_HS_TERM ,Force HS termination active" "Disabled,Enabled" bitfld.long 0x1C 15. " UTMIP_DISABLE_PULLUP_DP ,Force DP pullup inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 14. " UTMIP_DISABLE_PULLUP_DM ,Force DM pullup inactive" "Disabled,Enabled" bitfld.long 0x1C 13. " UTMIP_DISABLE_PULLDN_DP ,Force DP pulldown inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 12. " UTMIP_DISABLE_PULLDN_DM ,Force DM pulldown inactive" "Disabled,Enabled" bitfld.long 0x1C 11. " UTMIP_FORCE_PULLUP_DP ,Force DP pullup active" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " UTMIP_FORCE_PULLUP_DM ,Force DM pullup active" "Disabled,Enabled" bitfld.long 0x1C 9. " UTMIP_FORCE_PULLDN_DP ,Force DP pulldown active" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " UTMIP_FORCE_PULLDN_DM ,Force DM pulldown active" "Disabled,Enabled" bitfld.long 0x1C 5.--7. " UTMIP_STABLE_COUNT ,Number of cycles of crystal clock of signal not changing to consider stable" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 4. " UTMIP_STABLE_ALL ,Determines if all signal need to be stable to not change a config" "No,Yes" bitfld.long 0x1C 3. " UTMIP_NO_FREE_ON_SUSPEND ,Don't use free running terminations during suspend" "Disabled,Enabled" textline " " bitfld.long 0x1C 2. " UTMIP_NEVER_FREE_RUNNING_TERMS ,Ignore free running terminations, even when no clock" "Disabled,Enabled" bitfld.long 0x1C 1. " UTMIP_ALWAYS_FREE_RUNNING_TERMS ,Use free running terminations at all time" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " UTMIP_COMB_TERMS ,Use combinational terminations or synced through CLKXTAL" "Disabled,Enabled" line.long 0x20 "USB1_UTMIP_MISC_CFG1_0,UTMIP miscellaneous configurations" bitfld.long 0x20 30. " UTMIP_PHY_XTAL_CLOCKEN ,Selects whether to enable the crystal clock in the module" "Disabled,Enabled" bitfld.long 0x20 29. " UTMIP_LINESTATE_BYPASS ,Bypass LineState reclocking logic" "Disabled,Enabled" textline " " bitfld.long 0x20 28. " UTMIP_LINESTATE_NEG ,Use neg edge sync for linestate" "Disabled,Enabled" bitfld.long 0x20 27. " UTMIP_LINESTATE_XCVRSEL3 ,0 ,Use FS filtering on line state when XcvrSel=3" "Disabled,Enabled" textline " " bitfld.long 0x20 25.--26. " UTMIP_OBS_SEL ,UTMIP_OBS_SEL" "0,1,2,3" bitfld.long 0x20 24. " UTMIP_FSLS_TDM ,UTMIP_FSLS_TDM" "0,1" textline " " bitfld.long 0x20 23. " UTMIP_FORCE_IOBIST_CLK_ON ,UTMIP_FORCE_IOBIST_CLK_ON" "0,1" textline " " bitfld.long 0x20 5. " UTMIP_RX_ERROR_CNT_CLR ,UTMIP_RX_ERROR_CNT_CLR" "0,1" bitfld.long 0x20 4. " UTMIP_RX_ERROR_CNT_EN ,UTMIP_RX_ERROR_CNT_EN" "0,1" textline " " bitfld.long 0x20 3. " UTMIP_FLIP_FSLS_POLARITY ,UTMIP_FLIP_FSLS_POLARITY" "0,1" bitfld.long 0x20 2. " UTMIP_SUSPEND_TERMSEL ,UTMIP_SUSPEND_TERMSEL" "0,1" textline " " bitfld.long 0x20 1. " UTMIP_XCVRSEL3_1 ,EOP detection" "On,Off" bitfld.long 0x20 0. " UTMIP_XCVRSEL3_0 ,UTMIP_XCVRSEL3_0" "KeepAlive,Regular" line.long 0x24 "USB1_UTMIP_DEBOUNCE_CFG0_0,UTMIP Avalid and Bvalid debounce" hexmask.long.word 0x24 16.--31. 1. " UTMIP_BIAS_DEBOUNCE_B ,Simulation value -- Used for interrupts" hexmask.long.word 0x24 0.--15. 1. " UTMIP_BIAS_DEBOUNCE_A ,Simulation value -- Used for interrupts" line.long 0x28 "USB1_UTMIP_BAT_CHRG_CFG0_0,UTMIP battery charger configuration" bitfld.long 0x28 8.--13. " UTMIP_CHRG_DEBOUNCE_TIMESCALE ,Debouncer time scaling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x28 5. " UTMIP_OP_I_SRC_EN ,UTMIP_OP_I_SRC_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 4. " UTMIP_ON_SRC_EN ,UTMIP_ON_SRC_EN" "Disabled,Enabled" bitfld.long 0x28 3. " UTMIP_OP_SRC_EN ,UTMIP_OP_SRC_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 2. " UTMIP_ON_SINK_EN ,UTMIP_ON_SINK_EN" "Disabled,Enabled" bitfld.long 0x28 1. " UTMIP_OP_SINK_EN ,UTMIP_OP_SINK_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " UTMIP_PD_CHRG ,Power down charger circuit" "0,1" line.long 0x2C "USB1_UTMIP_SPARE_CFG0_0,Utmip spare configuration bits" bitfld.long 0x2C 9. " PD2_OLD_SCHEME_SEL ,Select between old and new scheme" "0,1" bitfld.long 0x2C 8. " FUSE_RPD_CTRL ,Select between regular CFG value and JTAG values" "0,1" textline " " bitfld.long 0x2C 7. " FUSE_HS_IREF_CAP_CFG ,Select between regular CFG value and JTAG values" "0,1" bitfld.long 0x2C 6. " FUSE_HS_SQUELCH_LEVEL ,Select between regular CFG value and JTAG values" "0,1" textline " " bitfld.long 0x2C 5. " FUSE_SPARE ,Select between regular CFG value and JTAG values" "0,1" bitfld.long 0x2C 4. " FUSE_TERM_RANGE_ADJ_SEL ,Select between regular CFG value and JTAG values for UX_TERM_RANGE_ADJ" "0,1" textline " " bitfld.long 0x2C 3. " FUSE_SETUP_SEL ,Select between regular CFG value and JTAG values for UX_SETUP" "0,1" bitfld.long 0x2C 2. " HS_RX_LATE_SQUELCH ,Delay Squelch by 1 CLK480 cycle" "Disabled,Enabled" textline " " bitfld.long 0x2C 1. " HS_RX_FLUSH_ALAP ,Flush as late as possible" "Disabled,Enabled" bitfld.long 0x2C 0. " HS_RX_IPG_ERROR_ENABLE ,HS_RX_IPG_ERROR_ENABLE" "Disabled,Enabled" line.long 0x30 "USB1_UTMIP_XCVR_CFG1_0,UTMIP transceiver cell configuration register 1" bitfld.long 0x30 26.--27. " UTMIP_XCVR_RPU_RANGE_ADJ ,1.5k pull-up resistor range shift" "0,1,2,3" bitfld.long 0x30 24.--25. " UTMIP_XCVR_HS_IREF_CAP ,High-speed Iref cap control for bias current stability" "0,1,2,3" textline " " bitfld.long 0x30 22.--23. " UTMIP_XCVR_SPARE ,Spare bits for USB transceiver pad" "0,1,2,3" bitfld.long 0x30 18.--21. " UTMIP_XCVR_TERM_RANGE_ADJ ,Range adjustment on terminations" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 17. " UTMIP_RCTRL_SW_SET ,Use a software override on RCTRL instead of automatic bias control" "No,Yes" bitfld.long 0x30 12.--16. " UTMIP_RCTRL_SW_VAL ,Encoded value to use on RCTRL when software override is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,,,,,,,,,,,,,,," textline " " bitfld.long 0x30 11. " UTMIP_TCTRL_SW_SET ,Use a software override on TCTRL instead of automatic bias control" "No,Yes" bitfld.long 0x30 6.--10. " UTMIP_TCTRL_SW_VAL ,Encoded value to use on TCTRL when software override is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,,,,,,,,,,,,,,," textline " " bitfld.long 0x30 5. " UTMIP_FORCE_PDDR_POWERUP ,Force PDDR input into power up" "Disabled,Enabled" bitfld.long 0x30 4. " UTMIP_FORCE_PDDR_POWERDOWN ,Force PDDR input input into power down" "Disabled,Enabled" textline " " bitfld.long 0x30 3. " UTMIP_FORCE_PDCHRP_POWERUP ,Force PDCHRP input into power up" "Disabled,Enabled" bitfld.long 0x30 2. " UTMIP_FORCE_PDCHRP_POWERDOWN ,Force PDCHRP input input into power down" "Disabled,Enabled" textline " " bitfld.long 0x30 1. " UTMIP_FORCE_PDDISC_POWERUP ,Force PDDISC input into power up" "Disabled,Enabled" bitfld.long 0x30 0. " UTMIP_FORCE_PDDISC_POWERDOWN ,Force PDDISC input into power down" "Disabled,Enabled" line.long 0x34 "USB1_UTMIP_BIAS_CFG1_0,UTMIP Bias cell configuration register 1" bitfld.long 0x34 23. " UTMIP_BIAS_TRK_DONE ,TRK cycle done status" "0,1" bitfld.long 0x34 22. " UTMIP_BIAS_TRK_START_OVERRIDE ,The Track cycle starts after removing power downs on TRK circuit" "0,1" textline " " hexmask.long.byte 0x34 14.--21. 1. " UTMIP_BIAS_TRK_START_COUNT ,The lag between PD_TRK and TRK_START" textline " " bitfld.long 0x34 8.--13. " UTMIP_BIAS_DEBOUNCE_TIMESCALE ,Debouncer time scaling - factor-1 to slow down debouncing by" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" bitfld.long 0x34 3.--7. " UTMIP_BIAS_PDTRK_COUNT ,Control the BIAS cell power down lag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 1. " UTMIP_FORCE_PDTRK_POWERUP ,Force PDTRK input into power up" "Disabled,Enabled" bitfld.long 0x34 0. " UTMIP_FORCE_PDTRK_POWERDOWN ,Force PDTRK input into power down" "Disabled,Enabled" rgroup.long 0x840++0x03 line.long 0x00 "USB1_UTMIP_BIAS_STS0_0,UTMIP Bias cell status register 0" hexmask.long.word 0x00 16.--31. 1. " UTMIP_TCTRL ,Thermal encoding output from USB bias pad" hexmask.long.word 0x00 0.--15. 1. " UTMIP_RCTRL ,Thermal encoding output from USB bias pad" group.long 0x844++0x03 line.long 0x00 "USB1_UTMIP_CHRG_DEB_CFG0_0,UTMIP VDcd_Det and VDat_Det debounce" hexmask.long.word 0x00 16.--31. 1. " UTMIP_CHRG_DEBOUNCE_PERIOD_B ,Simulation value -- Used for interrupts" hexmask.long.word 0x00 0.--15. 1. " UTMIP_CHRG_DEBOUNCE_PERIOD_A ,Simulation value -- Used for interrupts" rgroup.long 0x848++0x03 line.long 0x00 "USB1_UTMIP_PMC_WAKEUP0_0,UTMIP PMC Wakeup value" bitfld.long 0x00 21. " UTMIP_FS_DRV_EN ,Indicates when the controller is driving on the bus" "Disabled,Enabled" hexmask.long.tbyte 0x00 0.--20. 1. " UTMIP_SPARE_FUSES ,Spare Fuses value, to keep the connections preserved" group.long 0x84C++0x03 line.long 0x00 "USB1_UTMIP_PMC_WAKEUP0_0,UTMIP PMC Wakeup value" rbitfld.long 0x00 1. " UTMIP_LINE_WAKEUP_EVENT_INT_STS ,Indicates the status of the pmc wakeup event" "No wakeup,Wakeup" bitfld.long 0x00 0. " UTMIP_LINE_WAKEUP_EVENT_INT_ENB ,Interrupt mask for the pmc wakeup event" "Disabled,Enabled" group.long 0x850++0x0B line.long 0x00 "USB1_UTMIP_BIAS_CFG2_0,UTMIP Bias cell configuration register 0" bitfld.long 0x00 15.--18. " UTMIP_BIAS_SPARE ,Spare bits for bias circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--14. " UTMIP_CHG_DIV ,Apple charger divider reference control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 9.--10. " UTMIP_TEST_SELECT ,ATE test mode test tracking logic function" "0,1,2,3" bitfld.long 0x00 6.--8. " UTMIP_TEMP_COEFF ,Bandgap temp coefficient control" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 3.--5. " UTMIP_VREF_CTRL ,Bandgap voltage control" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " UTMIP_HSSQUELCH_LEVEL_NEW ,HS squelch detector level" "0,1,2,3,4,5,6,7" line.long 0x04 "USB1_UTMIP_XCVR_CFG2_0,UTMIP transceiver cell configuration register 0" bitfld.long 0x04 22.--25. " UTMIP_XCVR_FSFSLEW_NEW ,FS slew falling rate control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 18.--21. " UTMIP_XCVR_FSRSLEW_NEW ,FS slew rising rate control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 14.--17. " UTMIP_XCVR_SPARE_NEW ,Spare pins for io pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--13. " UTMIP_XCVR_VREG_DYN_DLY ,Voltage dynamic switching delay control" "0,1,2,3" textline " " bitfld.long 0x04 10.--11. " UTMIP_XCVR_VREG_LEV ,Control divided voltage level" "0,1,2,3" bitfld.long 0x04 9. " UTMIP_XCVR_VREG_FIX18 ,Internal voltage regulator control" "0,1" textline " " bitfld.long 0x04 5.--8. " UTMIP_PTERM_RANGE_ADJ ,Termination range resistor select window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2.--4. " UTMIP_XCVR_HSSLEW_NEW , HS slew rate control." "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 0.--1. " UTMIP_HS_COUP_EN ,HighSpeed Ibias coupling control" "0,1,2,3" line.long 0x08 "USB1_UTMIP_XCVR_CFG3_0,UTMIP transceiver cell configuration register 0" bitfld.long 0x08 20.--25. " UTMIP_PCTRL_SW_VAL_NEW ,UTMIP_PCTRL_SW_VAL_NEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 14.--19. " UTMIP_TCTRL_SW_VAL_NEW ,UTMIP_TCTRL_SW_VAL_NEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 9.--13. " UTMIP_XCVR_RPD_CTRL ,Active pull-down control signals" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8. " UTMIP_TERM_SEL ,Auto termination enable" "0,1" textline " " bitfld.long 0x08 4.--7. " UTMIP_XCVR_LSFSLEW_NEW ,LS slew falling rate control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " UTMIP_XCVR_LSRSLEW_NEW ,LS slew falling rate control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree "Endpoint Queue Head" width 30. group.long 0x1000++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_0_OUT_0,USB2D Queue Head for OUT endpoint 0" group.long (0x1000+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_0_IN_0,USB2D Queue Head for IN endpoint 0" group.long 0x1080++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_1_OUT_0,USB2D Queue Head for OUT endpoint 1" group.long (0x1080+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_1_IN_0,USB2D Queue Head for IN endpoint 1" group.long 0x1100++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_2_OUT_0,USB2D Queue Head for OUT endpoint 2" group.long (0x1100+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_2_IN_0,USB2D Queue Head for IN endpoint 2" group.long 0x1180++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_3_OUT_0,USB2D Queue Head for OUT endpoint 3" group.long (0x1180+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_3_IN_0,USB2D Queue Head for IN endpoint 3" group.long 0x1200++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_4_OUT_0,USB2D Queue Head for OUT endpoint 4" group.long (0x1200+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_4_IN_0,USB2D Queue Head for IN endpoint 4" group.long 0x1280++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_5_OUT_0,USB2D Queue Head for OUT endpoint 5" group.long (0x1280+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_5_IN_0,USB2D Queue Head for IN endpoint 5" group.long 0x1300++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_6_OUT_0,USB2D Queue Head for OUT endpoint 6" group.long (0x1300+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_6_IN_0,USB2D Queue Head for IN endpoint 6" group.long 0x1380++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_7_OUT_0,USB2D Queue Head for OUT endpoint 7" group.long (0x1380+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_7_IN_0,USB2D Queue Head for IN endpoint 7" group.long 0x1400++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_8_OUT_0,USB2D Queue Head for OUT endpoint 8" group.long (0x1400+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_8_IN_0,USB2D Queue Head for IN endpoint 8" group.long 0x1480++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_9_OUT_0,USB2D Queue Head for OUT endpoint 9" group.long (0x1480+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_9_IN_0,USB2D Queue Head for IN endpoint 9" group.long 0x1500++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_10_OUT_0,USB2D Queue Head for OUT endpoint 10" group.long (0x1500+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_10_IN_0,USB2D Queue Head for IN endpoint 10" group.long 0x1580++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_11_OUT_0,USB2D Queue Head for OUT endpoint 11" group.long (0x1580+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_11_IN_0,USB2D Queue Head for IN endpoint 11" group.long 0x1600++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_12_OUT_0,USB2D Queue Head for OUT endpoint 12" group.long (0x1600+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_12_IN_0,USB2D Queue Head for IN endpoint 12" group.long 0x1680++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_13_OUT_0,USB2D Queue Head for OUT endpoint 13" group.long (0x1680+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_13_IN_0,USB2D Queue Head for IN endpoint 13" group.long 0x1700++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_14_OUT_0,USB2D Queue Head for OUT endpoint 14" group.long (0x1700+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_14_IN_0,USB2D Queue Head for IN endpoint 14" group.long 0x1780++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_15_OUT_0,USB2D Queue Head for OUT endpoint 15" group.long (0x1780+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_15_IN_0,USB2D Queue Head for IN endpoint 15" tree.end tree.end else tree "USB 1 UTMIP Configuration" width 28. group.long 0x808++0x37 line.long 0x00 "USB1_UTMIP_XCVR_CFG0_0,UTMIP transceiver cell configuration register 0" hexmask.long.byte 0x00 25.--31. 1. " UTMIP_XCVR_HSSLEW_MSB ,Most significant bits of HS_SLEW" bitfld.long 0x00 22.--24. " UTMIP_XCVR_SETUP_MSB ,Most significant bits of SETUP" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 21. " UTMIP_XCVR_LSBIAS_SEL ,Low speed bias selection method for usb transceiver pad" "0,1" bitfld.long 0x00 20. " UTMIP_XCVR_DISCON_METHOD ,Disconnect method on the usb transceiver pad" "0,1" textline " " bitfld.long 0x00 19. " UTMIP_FORCE_PDZI_POWERUP ,Force PDZI input into power up" "Disabled,Enabled" bitfld.long 0x00 18. " UTMIP_FORCE_PDZI_POWERDOWN ,Force PDZI input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " UTMIP_FORCE_PD2_POWERUP ,Force PD2 input into power up" "Disabled,Enabled" bitfld.long 0x00 16. " UTMIP_FORCE_PD2_POWERDOWN ,Force PD2 input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " UTMIP_FORCE_PD_POWERUP ,Force PD input into power up." "Disabled,Enabled" bitfld.long 0x00 14. " UTMIP_FORCE_PD_POWERDOWN ,Force PD input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UTMIP_XCVR_TERMEN ,Enable HS termination" "Disabled,Enabled" bitfld.long 0x00 12. " UTMIP_XCVR_HSLOOPBACK ,Internal loopback inside XCVR cell" "0,1" textline " " bitfld.long 0x00 10.--11. " UTMIP_XCVR_LSFSLEW ,LS falling slew rate control" "0,1,2,3" bitfld.long 0x00 8.--9. " UTMIP_XCVR_LSRSLEW ,LS rising slew rate control" "0,1,2,3" textline " " bitfld.long 0x00 6.--7. " UTMIP_XCVR_FSSLEW ,FS slew rate control" "0,1,2,3" bitfld.long 0x00 4.--5. " UTMIP_XCVR_HSSLEW ,HS slew rate control" "0,1,2,3" textline " " bitfld.long 0x00 0.--3. " UTMIP_XCVR_SETUP ,SETUP[3:0] input of XCVR cell" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "USB1_UTMIP_BIAS_CFG0_0,UTMIP Bias cell configuration register 0" bitfld.long 0x04 24. " UTMIP_HSDISCON_LEVEL_MSB ,Most significant bit of UTMIP_HSDISCON_LEVEL" "0,1" bitfld.long 0x04 23. " UTMIP_IDPD_VAL ,IDPD value" "0,1" textline " " bitfld.long 0x04 21. " UTMIP_IDDIG_SEL ,IDDIG value" "0,1" bitfld.long 0x04 20. " UTMIP_IDDIG_SEL ,IDDIG select" "IdDig,IDDIG_VAL" textline " " bitfld.long 0x04 19. " UTMIP_GPI_VAL ,GPI value" "0,1" bitfld.long 0x04 18. " UTMIP_GPI_SEL ,GPI select" "IdDig,GPI_VAL" textline " " bitfld.long 0x04 15.--17. " UTMIP_ACTIVE_TERM_OFFSET ,Active termination control offset" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " UTMIP_ACTIVE_PULLUP_OFFSET ,Active 1.5K pullup control offset" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 11. " UTMIP_OTGPD ,Power down OTG circuit" "Disabled,Enabled" bitfld.long 0x04 10. " UTMIP_BIASPD ,Power down bias circuit" "Disabled,Enabled" textline " " bitfld.long 0x04 8.--9. " UTMIP_VBUS_LEVEL_LEVEL ,Vbus detector level" "0,1,2,3" bitfld.long 0x04 6.--7. " UTMIP_SESS_LEVEL_LEVEL ,SessionEnd detector level" "0,1,2,3" textline " " bitfld.long 0x04 4.--5. " UTMIP_HSCHIRP_LEVEL ,HS chirp detector level" "0,1,2,3" bitfld.long 0x04 2.--3. " UTMIP_HSDISCON_LEVEL ,HS disconnect detector level" "0,1,2,3" textline " " bitfld.long 0x04 0.--1. " UTMIP_HSSQUELCH_LEVEL ,HS squelch detector level" "0,1,2,3" line.long 0x08 "USB1_UTMIP_HSRX_CFG0_0,UTMIP High speed receive config 0" bitfld.long 0x08 30.--31. " UTMIP_KEEP_PATT_ON_ACTIVE ,Keep the stay alive pattern on active" "0,1,2,3" bitfld.long 0x08 29. " UTMIP_ALLOW_CONSEC_UPDN ,Allow consecutive ups and downs on the bits" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " UTMIP_REALIGN_ON_NEW_PKT ,Realign the inertia counters on a new packet" "Disabled,Enabled" bitfld.long 0x08 24.--27. " UTMIP_PCOUNT_UPDN_DIV ,The number of (edges-1) needed to move the sampling point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 21.--23. " UTMIP_SQUELCH_EOP_DLY ,Limit the delay of the squelch at EOP time" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20. " UTMIP_NO_STRIPPING ,Do not strip incoming data" "Disabled,Enabled" textline " " bitfld.long 0x08 15.--19. " UTMIP_IDLE_WAIT ,Number of cycles of idle to declare IDLE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 10.--14. " UTMIP_ELASTIC_LIMIT ,Depth of elastic input store" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 9. " UTMIP_ELASTIC_OVERRUN_DISABLE ,Do not declare overrun errors until overflow of FIFO" "Disabled,Enabled" bitfld.long 0x08 8. " UTMIP_ELASTIC_UNDERRUN_DISABLE ,Do not declare underrun errors" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " UTMIP_PASS_CHIRP ,When in Chirp Mode, allow chirp rx data through" "Disabled,Enabled" bitfld.long 0x08 6. " UTMIP_PASS_FEEDBACK ,Pass through the feedback, do not block it" "No,Yes" textline " " bitfld.long 0x08 4.--5. " UTMIP_PCOUNT_INERTIA ,Retime the path" "0,1,2,3" bitfld.long 0x08 2.--3. " UTMIP_PHASE_ADJUST ,Based on incoming edges and current sampling position phase adjust" "0,1,2,3" textline " " bitfld.long 0x08 1. " UTMIP_THREE_SYNCBITS ,Sync pattern detection needs 3 consecutive samples instead of 4" "No,Yes" bitfld.long 0x08 0. " UTMIP_USE4SYNC_TRAN ,Require 4 sync pattern transitions (01) instead of 3" "No,Yes" line.long 0x0C "USB1_UTMIP_HSRX_CFG1_0,UTMIP High speed receive config 1" bitfld.long 0x0C 1.--5. " UTMIP_HS_SYNC_START_DLY ,How long to wait before start of sync launches RxActive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0. " UTMIP_HS_ALLOW_KEEP_ALIVE ,Allow Keep Alive packets" "Disabled,Enabled" line.long 0x10 "USB1_UTMIP_FSLSRX_CFG0_0,UTMIP full and Low speed receive config 0" bitfld.long 0x10 31. " UTMIP_FSLS_SE1_DRIBBLE_FILTER ,Don't allow dribble" "Disabled,Enabled" bitfld.long 0x10 30. " UTMIP_FSLS_SE1_FILTER ,Filter SE1" "0,1" textline " " bitfld.long 0x10 29. " UTMIP_FSLS_SERIAL_SE0_RCV ,UTMIP_FSLS_SERIAL_SE0_RCV" "0,1" bitfld.long 0x10 26.--28. " UTMIP_FSLS_UPR_DRIBBLE_SIZE ,Do not allow <= dribble bits" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 23.--25. " UTMIP_FSLS_LWR_DRIBBLE_SIZE ,Do not allow >= dribble bits" "0,1,2,3,4,5,6,7" bitfld.long 0x10 22. " UTMIP_FSLS_EOP_ENDS_AT_SE0 ,Only look for transitioning out of EOP" "No,Yes" textline " " bitfld.long 0x10 16.--21. " UTMIP_FSLS_KCOUNT_MAX ,Number of K bits in question" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 15. " UTMIP_FSLS_KCOUNT_LIMIT ,Limit the number of bit times a K can last" "No,Yes" textline " " bitfld.long 0x10 14. " UTMIP_FSLS_ACTIVE_ON_FULL_SYNC ,Require a full sync pattern to declare the data received" "No,Yes" bitfld.long 0x10 8.--13. " UTMIP_FSLS_IDLE_WAIT_MAX ,IDLE wait max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 7. " UTMIP_FSLS_IDLE_WAIT_LIMIT ,Enable the reset of the state machine on extended SE0" "Disabled,Enabled" bitfld.long 0x10 1.--6. " UTMIP_FSLS_IDLE_COUNT_MAX ,Idle count max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 0. " UTMIP_FSLS_IDLE_COUNT_LIMIT ,Give up on packet if a long sequence of J" "No,Yes" line.long 0x14 "USB1_UTMIP_FSLSRX_CFG1_0,UTMIP full and Low speed receive config 1" bitfld.long 0x14 26. " UTMIP_EARLY_LINE_STATE_FILTER ,Assumes line state filtering table is inclusive" "No,Yes" bitfld.long 0x14 23.--25. " UTMIP_LS_BOUNCE_LENGTH ,Number of clock cycle of LS stable" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 17.--22. " UTMIP_LS_EXTRACTION_COUNT ,Phase count on which LS bits are extracted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 11.--16. " UTMIP_LS_EOP_START_COUNT ,Number of SEO clock cycles to block bit extraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 5.--10. " UTMIP_LS_SE0_COUNT ,Only for this number of 60MHz of SEO and Idle to end packet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 4. " UTMIP_LS_LENIENT_DRIBBLE ,Allow for large dribble in low speed mode" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " UTMIP_FS_LENIENT_DRIBBLE ,Allow for large dribble in full speed mode" "Disabled,Enabled" bitfld.long 0x14 2. " UTMIP_FS_WEAK_SYNC ,Only look for a KK pattern instead of KJKK" "No,Yes" textline " " bitfld.long 0x14 1. " UTMIP_FS_DEBOUNCE ,Whether full speed uses debouncing" "No,Yes" bitfld.long 0x14 0. " UTMIP_FS_EOP_LENGTH ,Whether full speed EOP is determined within 3(0) or 4(1) 60MHz cycles" "3 cycles,4 cycles" line.long 0x18 "USB1_UTMIP_TX_CFG0_0,UTMIP transmit config signals" bitfld.long 0x18 19. " UTMIP_FS_PREAMBLE_J ,Output enable sends an initial J before sync pattern" "Disabled,Enabled" bitfld.long 0x18 18. " UTMIP_FS_POSTAMBLE_OUTPUT_ENABLE ,Output enable turns off 1/2 cycle after" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " UTMIP_FS_PREAMBLE_OUTPUT_ENABLE ,Output enable turns on 1/2 cycle before" "Disabled,Enabled" bitfld.long 0x18 16. " UTMIP_FSLS_ALLOW_SOP_TX_STUFF_ERR ,Allow SOP to be source of transmit error stuffing" "Disabled,Enabled" textline " " bitfld.long 0x18 15. " UTMIP_HS_READY_WAIT_FOR_VALID ,UTMIP_HS_READY_WAIT_FOR_VALID" "0,1" bitfld.long 0x18 10.--14. " UTMIP_HS_TX_IPG_DLY ,UTMIP_HS_TX_IPG_DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 9. " UTMIP_HS_DISCON_EOP_ONLY ,Only check during EOP" "No,Yes" bitfld.long 0x18 8. " UTMIP_HS_DISCON_DISABLE ,Disable high speed disconnect" "Enabled,Disabled" textline " " bitfld.long 0x18 7. " UTMIP_HS_POSTAMBLE_OUTPUT_ENABLE ,Output enable turns off 1 cycle after" "Disabled,Enabled" bitfld.long 0x18 6. " UTMIP_HS_PREAMBLE_OUTPUT_ENABLE ,Output enable turns on 1 cycle before" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " UTMIP_SIE_RESUME_ON_LINESTATE ,SIE (not macrocell) detects LineState change to resume" "No,Yes" bitfld.long 0x18 4. " UTMIP_SOF_ON_NO_STUFF ,Sof when OpMode 3 -- perhaps, when sending controller made packets" "0,1" textline " " bitfld.long 0x18 3. " UTMIP_SOF_ON_NO_ENCODE ,Sof when OpMode 2 -- not likely, for Chirp" "0,1" bitfld.long 0x18 2. " UTMIP_NO_STUFFING ,No bit stuffing, static programming" "0,1" textline " " bitfld.long 0x18 1. " UTMIP_NO_ENCODING ,No encoding, static programming" "0,1" bitfld.long 0x18 0. " UTMIP_NO_SYNC_NO_EOP ,Do not sent SYNC or EOP" "Disabled,Enabled" line.long 0x1C "USB1_UTMIP_MISC_CFG0_0,UTMIP miscellaneous configurations" bitfld.long 0x1C 27.--30. " UTMIP_DPDM_OBSERVE_SEL ,Select DP/DM obs signals" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 26. " UTMIP_DPDM_OBSERVE ,Use DP/DM as obs bus" "0,1" textline " " bitfld.long 0x1C 25. " UTMIP_KEEP_XCVR_PD_ON_SOFT_DISCON ,UTMIP_KEEP_XCVR_PD_ON_SOFT_DISCON" "0,1" bitfld.long 0x1C 24. " UTMIP_ALLOW_LS_ON_SOFT_DISCON ,UTMIP_ALLOW_LS_ON_SOFT_DISCON" "0,1" textline " " bitfld.long 0x1C 23. " UTMIP_FORCE_FS_DISABLE_ON_DEV_CHIRP ,UTMIP_FORCE_FS_DISABLE_ON_DEV_CHIRP" "0,1" bitfld.long 0x1C 22. " UTMIP_SUSPEND_EXIT_ON_EDGE ,Suspend exit requires edge or simply a value" "0,1" textline " " bitfld.long 0x1C 21. " UTMIP_LS_TO_FS_SKIP_4MS ,Don't block changes for 4ms when going from LS to FS" "0,1" bitfld.long 0x1C 19.--20. " UTMIP_INJECT_ERROR_TYPE ,Force error insertion into RX path" "Disabled,BIT_ERR,RX_ERR,BIT_RX_ERR" textline " " bitfld.long 0x1C 18. " UTMIP_FORCE_HS_CLOCK_ON ,Force HS clock always on" "Disabled,Enabled" bitfld.long 0x1C 17. " UTMIP_DISABLE_HS_TERM ,Force HS termination inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 16. " UTMIP_FORCE_HS_TERM ,Force HS termination active" "Disabled,Enabled" bitfld.long 0x1C 15. " UTMIP_DISABLE_PULLUP_DP ,Force DP pullup inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 14. " UTMIP_DISABLE_PULLUP_DM ,Force DM pullup inactive" "Disabled,Enabled" bitfld.long 0x1C 13. " UTMIP_DISABLE_PULLDN_DP ,Force DP pulldown inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 12. " UTMIP_DISABLE_PULLDN_DM ,Force DM pulldown inactive" "Disabled,Enabled" bitfld.long 0x1C 11. " UTMIP_FORCE_PULLUP_DP ,Force DP pullup active" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " UTMIP_FORCE_PULLUP_DM ,Force DM pullup active" "Disabled,Enabled" bitfld.long 0x1C 9. " UTMIP_FORCE_PULLDN_DP ,Force DP pulldown active" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " UTMIP_FORCE_PULLDN_DM ,Force DM pulldown active" "Disabled,Enabled" bitfld.long 0x1C 5.--7. " UTMIP_STABLE_COUNT ,Number of cycles of crystal clock of signal not changing to consider stable" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 4. " UTMIP_STABLE_ALL ,Determines if all signal need to be stable to not change a config" "No,Yes" bitfld.long 0x1C 3. " UTMIP_NO_FREE_ON_SUSPEND ,Don't use free running terminations during suspend" "Disabled,Enabled" textline " " bitfld.long 0x1C 2. " UTMIP_NEVER_FREE_RUNNING_TERMS ,Ignore free running terminations, even when no clock" "Disabled,Enabled" bitfld.long 0x1C 1. " UTMIP_ALWAYS_FREE_RUNNING_TERMS ,Use free running terminations at all time" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " UTMIP_COMB_TERMS ,Use combinational terminations or synced through CLKXTAL" "Disabled,Enabled" line.long 0x20 "USB1_UTMIP_MISC_CFG1_0,UTMIP miscellaneous configurations" bitfld.long 0x20 30. " UTMIP_PHY_XTAL_CLOCKEN ,Selects whether to enable the crystal clock in the module" "Disabled,Enabled" bitfld.long 0x20 29. " UTMIP_LINESTATE_BYPASS ,Bypass LineState reclocking logic" "Disabled,Enabled" textline " " bitfld.long 0x20 28. " UTMIP_LINESTATE_NEG ,Use neg edge sync for linestate" "Disabled,Enabled" bitfld.long 0x20 27. " UTMIP_LINESTATE_XCVRSEL3 ,0 ,Use FS filtering on line state when XcvrSel=3" "Disabled,Enabled" textline " " bitfld.long 0x20 25.--26. " UTMIP_OBS_SEL ,UTMIP_OBS_SEL" "0,1,2,3" bitfld.long 0x20 24. " UTMIP_FSLS_TDM ,UTMIP_FSLS_TDM" "0,1" textline " " bitfld.long 0x20 23. " UTMIP_FORCE_IOBIST_CLK_ON ,UTMIP_FORCE_IOBIST_CLK_ON" "0,1" textline " " bitfld.long 0x20 5. " UTMIP_RX_ERROR_CNT_CLR ,UTMIP_RX_ERROR_CNT_CLR" "0,1" bitfld.long 0x20 4. " UTMIP_RX_ERROR_CNT_EN ,UTMIP_RX_ERROR_CNT_EN" "0,1" textline " " bitfld.long 0x20 3. " UTMIP_FLIP_FSLS_POLARITY ,UTMIP_FLIP_FSLS_POLARITY" "0,1" bitfld.long 0x20 2. " UTMIP_SUSPEND_TERMSEL ,UTMIP_SUSPEND_TERMSEL" "0,1" textline " " bitfld.long 0x20 1. " UTMIP_XCVRSEL3_1 ,EOP detection" "Enabled,Disabled" bitfld.long 0x20 0. " UTMIP_XCVRSEL3_0 ,UTMIP_XCVRSEL3_0" "KeepAlive,Regular" line.long 0x24 "USB1_UTMIP_DEBOUNCE_CFG0_0,UTMIP Avalid and Bvalid debounce" hexmask.long.word 0x24 16.--31. 1. " UTMIP_BIAS_DEBOUNCE_B ,Simulation value -- Used for interrupts" hexmask.long.word 0x24 0.--15. 1. " UTMIP_BIAS_DEBOUNCE_A ,Simulation value -- Used for interrupts" line.long 0x28 "USB1_UTMIP_BAT_CHRG_CFG0_0,UTMIP battery charger configuration" bitfld.long 0x28 8.--13. " UTMIP_CHRG_DEBOUNCE_TIMESCALE ,Debouncer time scaling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x28 5. " UTMIP_OP_I_SRC_EN ,UTMIP_OP_I_SRC_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 4. " UTMIP_ON_SRC_EN ,UTMIP_ON_SRC_EN" "Disabled,Enabled" bitfld.long 0x28 3. " UTMIP_OP_SRC_EN ,UTMIP_OP_SRC_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 2. " UTMIP_ON_SINK_EN ,UTMIP_ON_SINK_EN" "Disabled,Enabled" bitfld.long 0x28 1. " UTMIP_OP_SINK_EN ,UTMIP_OP_SINK_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " UTMIP_PD_CHRG ,Power down charger circuit" "0,1" line.long 0x2C "USB1_UTMIP_SPARE_CFG0_0,Utmip spare configuration bits" bitfld.long 0x2C 4. " FUSE_TERM_RANGE_ADJ_SEL ,Select between regular CFG value and JTAG values for UX_TERM_RANGE_ADJ" "0,1" bitfld.long 0x2C 3. " FUSE_SETUP_SEL ,Select between regular CFG value and JTAG values for UX_SETUP" "0,1" textline " " bitfld.long 0x2C 2. " HS_RX_LATE_SQUELCH ,Delay Squelch by 1 CLK480 cycle" "Disabled,Enabled" bitfld.long 0x2C 1. " HS_RX_FLUSH_ALAP ,Flush as late as possible" "Disabled,Enabled" textline " " bitfld.long 0x2C 0. " HS_RX_IPG_ERROR_ENABLE ,HS_RX_IPG_ERROR_ENABLE" "Disabled,Enabled" line.long 0x30 "USB1_UTMIP_XCVR_CFG1_0,UTMIP transceiver cell configuration register 1" bitfld.long 0x30 22.--23. " UTMIP_XCVR_SPARE ,Spare bits for USB transceiver pad" "0,1,2,3" bitfld.long 0x30 18.--21. " UTMIP_XCVR_TERM_RANGE_ADJ ,Range adjustment on terminations" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 17. " UTMIP_RCTRL_SW_SET ,Use a software override on RCTRL instead of automatic bias control" "No,Yes" bitfld.long 0x30 12.--16. " UTMIP_RCTRL_SW_VAL ,Encoded value to use on RCTRL when software override is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,,,,,,,,,,,,,,," textline " " bitfld.long 0x30 11. " UTMIP_TCTRL_SW_SET ,Use a software override on TCTRL instead of automatic bias control" "No,Yes" bitfld.long 0x30 6.--10. " UTMIP_TCTRL_SW_VAL ,Encoded value to use on TCTRL when software override is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,,,,,,,,,,,,,,," textline " " bitfld.long 0x30 5. " UTMIP_FORCE_PDDR_POWERUP ,Force PDDR input into power up" "Disabled,Enabled" bitfld.long 0x30 4. " UTMIP_FORCE_PDDR_POWERDOWN ,Force PDDR input input into power down" "Disabled,Enabled" textline " " bitfld.long 0x30 3. " UTMIP_FORCE_PDCHRP_POWERUP ,Force PDCHRP input into power up" "Disabled,Enabled" bitfld.long 0x30 2. " UTMIP_FORCE_PDCHRP_POWERDOWN ,Force PDCHRP input input into power down" "Disabled,Enabled" textline " " bitfld.long 0x30 1. " UTMIP_FORCE_PDDISC_POWERUP ,Force PDDISC input into power up" "Disabled,Enabled" bitfld.long 0x30 0. " UTMIP_FORCE_PDDISC_POWERDOWN ,Force PDDISC input into power down" "Disabled,Enabled" line.long 0x34 "USB1_UTMIP_BIAS_CFG1_0,UTMIP Bias cell configuration register 1" bitfld.long 0x34 8.--13. " UTMIP_BIAS_DEBOUNCE_TIMESCALE ,Debouncer time scaling - factor-1 to slow down debouncing by" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" bitfld.long 0x34 3.--7. " UTMIP_BIAS_PDTRK_COUNT ,Control the BIAS cell power down lag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 1. " UTMIP_FORCE_PDTRK_POWERUP ,Force PDTRK input into power up" "Disabled,Enabled" bitfld.long 0x34 0. " UTMIP_FORCE_PDTRK_POWERDOWN ,Force PDTRK input into power down" "Disabled,Enabled" rgroup.long 0x840++0x03 line.long 0x00 "USB1_UTMIP_BIAS_STS0_0,UTMIP Bias cell status register 0" hexmask.long.word 0x00 16.--31. 1. " UTMIP_TCTRL ,Thermal encoding output from USB bias pad" hexmask.long.word 0x00 0.--15. 1. " UTMIP_RCTRL ,Thermal encoding output from USB bias pad" group.long 0x844++0x03 line.long 0x00 "USB1_UTMIP_CHRG_DEB_CFG0_0,UTMIP VDcd_Det and VDat_Det debounce" hexmask.long.word 0x00 16.--31. 1. " UTMIP_CHRG_DEBOUNCE_PERIOD_B ,Simulation value -- Used for interrupts" hexmask.long.word 0x00 0.--15. 1. " UTMIP_CHRG_DEBOUNCE_PERIOD_A ,Simulation value -- Used for interrupts" rgroup.long 0x848++0x03 line.long 0x00 "USB1_UTMIP_PMC_WAKEUP0_0,UTMIP PMC Wakeup value" bitfld.long 0x00 21. " UTMIP_FS_DRV_EN ,Indicates when the controller is driving on the bus" "Disabled,Enabled" hexmask.long.tbyte 0x00 0.--20. 1. " UTMIP_SPARE_FUSES ,Spare Fuses value, to keep the connections preserved" group.long 0x84C++0x03 line.long 0x00 "USB1_UTMIP_PMC_WAKEUP0_0,UTMIP PMC Wakeup value" rbitfld.long 0x00 1. " UTMIP_LINE_WAKEUP_EVENT_INT_STS ,Indicates the status of the pmc wakeup event" "No wakeup,Wakeup" bitfld.long 0x00 0. " UTMIP_LINE_WAKEUP_EVENT_INT_ENB ,Interrupt mask for the pmc wakeup event" "Disabled,Enabled" tree "Endpoint Queue Head" width 30. group.long 0x1000++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_0_OUT_0,USB2D Queue Head for OUT endpoint 0" group.long (0x1000+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_0_IN_0,USB2D Queue Head for IN endpoint 0" group.long 0x1080++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_1_OUT_0,USB2D Queue Head for OUT endpoint 1" group.long (0x1080+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_1_IN_0,USB2D Queue Head for IN endpoint 1" group.long 0x1100++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_2_OUT_0,USB2D Queue Head for OUT endpoint 2" group.long (0x1100+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_2_IN_0,USB2D Queue Head for IN endpoint 2" group.long 0x1180++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_3_OUT_0,USB2D Queue Head for OUT endpoint 3" group.long (0x1180+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_3_IN_0,USB2D Queue Head for IN endpoint 3" group.long 0x1200++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_4_OUT_0,USB2D Queue Head for OUT endpoint 4" group.long (0x1200+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_4_IN_0,USB2D Queue Head for IN endpoint 4" group.long 0x1280++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_5_OUT_0,USB2D Queue Head for OUT endpoint 5" group.long (0x1280+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_5_IN_0,USB2D Queue Head for IN endpoint 5" group.long 0x1300++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_6_OUT_0,USB2D Queue Head for OUT endpoint 6" group.long (0x1300+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_6_IN_0,USB2D Queue Head for IN endpoint 6" group.long 0x1380++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_7_OUT_0,USB2D Queue Head for OUT endpoint 7" group.long (0x1380+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_7_IN_0,USB2D Queue Head for IN endpoint 7" group.long 0x1400++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_8_OUT_0,USB2D Queue Head for OUT endpoint 8" group.long (0x1400+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_8_IN_0,USB2D Queue Head for IN endpoint 8" group.long 0x1480++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_9_OUT_0,USB2D Queue Head for OUT endpoint 9" group.long (0x1480+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_9_IN_0,USB2D Queue Head for IN endpoint 9" group.long 0x1500++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_10_OUT_0,USB2D Queue Head for OUT endpoint 10" group.long (0x1500+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_10_IN_0,USB2D Queue Head for IN endpoint 10" group.long 0x1580++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_11_OUT_0,USB2D Queue Head for OUT endpoint 11" group.long (0x1580+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_11_IN_0,USB2D Queue Head for IN endpoint 11" group.long 0x1600++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_12_OUT_0,USB2D Queue Head for OUT endpoint 12" group.long (0x1600+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_12_IN_0,USB2D Queue Head for IN endpoint 12" group.long 0x1680++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_13_OUT_0,USB2D Queue Head for OUT endpoint 13" group.long (0x1680+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_13_IN_0,USB2D Queue Head for IN endpoint 13" group.long 0x1700++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_14_OUT_0,USB2D Queue Head for OUT endpoint 14" group.long (0x1700+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_14_IN_0,USB2D Queue Head for IN endpoint 14" group.long 0x1780++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_15_OUT_0,USB2D Queue Head for OUT endpoint 15" group.long (0x1780+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_15_IN_0,USB2D Queue Head for IN endpoint 15" tree.end tree.end endif width 0x0B tree.end tree "USB 2" base ad:0x7D004000 width 37. tree "USB 2 Controller" tree "Status Registers" rgroup.long 0x00++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ID_0,USB2D Identification Register" bitfld.long 0x00 29.--31. " CIVERSION ,Identifies the CI version" "0,1,2,3,4,5,6,7" bitfld.long 0x00 25.--28. " VERSION ,Identifies the version of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 21.--24. " REVISION ,Revision number of the USB controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16.--20. " TAG ,Identifies the tag of the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 8.--15. 1. " NID ,Ones complement version of ID" hexmask.long.byte 0x00 0.--7. 1. " ID ,Configuration number" rgroup.long 0x08++0x0F line.long 0x00 "USB2_CONTROLLER_1_USB2D_HW_HOST_0,USB2D Hardware Host Register" bitfld.long 0x00 1.--3. " NPORT ,NPORT" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " HC ,Support for host mode" "Disabled,Enabled" line.long 0x04 "USB2_CONTROLLER_1_USB2D_HW_DEVICE_0,USB2D Hardware Device Register" bitfld.long 0x04 1.--5. " DEVEP ,Number of endpoints supported by this device controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " DC ,Support for device mode" "Not supported,Supported" line.long 0x08 "USB2_CONTROLLER_1_USB2D_HW_TXBUF_0,USB2D Hardware TX Buffer Register" hexmask.long.byte 0x08 16.--23. 1. " TXCHANADD ,Total number of address bits for the transmit buffer of each transmit endpoint" hexmask.long.byte 0x08 8.--15. 1. " TXADD ,Total number of address bits for the transmit buffer" hexmask.long.byte 0x08 0.--7. 1. " TCBURST ,Maximum burst size supported by the transmit endpoints for data transfers" line.long 0x0C "USB2_CONTROLLER_1_USB2D_HW_RXBUF_0,USB2D RX Buffer HW Parameters Register" hexmask.long.byte 0x0C 8.--15. 1. " RXADD ,Total number of address bits for the receive buffer" hexmask.long.byte 0x0C 0.--7. 1. " RXBURST ,Maximum burst size supported by the receive endpoints for data transfers" textline " " sif (cpu()=="TEGRAX1") width 40. group.long 0x80++0x0F line.long 0x00 "USB2_CONTROLLER_1_USB2D_GPTIMER0LD_0,USB2_CONTROLLER_1_USB2D_GPTIMER0LD_0" hexmask.long.tbyte 0x00 0.--23. 1. " GPTIMER0LD ,Time in microseconds minus 1 for the timer duration" line.long 0x04 "USB2_CONTROLLER_1_USB2D_GPTIMER0CTRL_0,USB2_CONTROLLER_1_USB2D_GPTIMER0CTRL_0" bitfld.long 0x04 31. " GTPRUN ,This bit enables the general-purpose timer to run" "Disabled,Enabled" bitfld.long 0x04 30. " GPTRST , Writing a one to this bit reloads the GPTCNT with the value in GPTLD" "Not reloaded,Reloaded" bitfld.long 0x04 24. " GPTMODE ,This bit selects between a single timer countdown and a looped countdown" "Single timer,Looped" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " GPTCNT ,This field has the value of the running timer" line.long 0x08 "USB2_CONTROLLER_1_USB2D_GPTIMER1LD_0,USB2_CONTROLLER_1_USB2D_GPTIMER1LD_0" hexmask.long.tbyte 0x08 0.--23. 1. " GPTIMER1LD ,Time in microseconds minus 1 for the timer duration" line.long 0x0C "USB2_CONTROLLER_1_USB2D_GPTIMER1CTRL_0,USB2_CONTROLLER_1_USB2D_GPTIMER1CTRL_0" bitfld.long 0x0C 31. " GTPRUN ,This bit enables the general-purpose timer to run" "Disabled,Enabled" bitfld.long 0x0C 30. " GPTRST , Writing a one to this bit reloads the GPTCNT with the value in GPTLD" "Not reloaded,Reloaded" bitfld.long 0x0C 24. " GPTMODE ,This bit selects between a single timer countdown and a looped countdown" "Single timer,Looped" textline " " hexmask.long.tbyte 0x0C 0.--23. 1. " GPTCNT ,This field has the value of the running timer" textline " " endif width 37. rgroup.word 0x100++0x03 line.word 0x00 "USB2_CONTROLLER_1_USB2D_CAPLENGTH_0,USB2D Capability Register Length Register" hexmask.word.byte 0x00 0.--7. 1. " CAPLENGTH ,Indicates which offset to add to the register base address at the beginning of the operational register" line.word 0x02 "USB2_CONTROLLER_1_USB2D_HCIVERSON_0,USB2D Host Interface Version Number Register" hexmask.word 0x02 0.--15. 1. " HCIVERSION ,Contains a BCD encoding of the EHCI revision number supported by this host controller" rgroup.long 0x104++0x07 line.long 0x00 "USB2_CONTROLLER_1_USB2D_HCSPARAMS_0,USB2D Host Control Structural Parameters Register" bitfld.long 0x00 24.--27. " N_TT ,Number of transaction translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT ,Number of ports per transaction translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " N_CC ,Number of companion controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC ,Number of ports per companion controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Port power control" "Disabled,Enabled" bitfld.long 0x00 0.--3. " N_PORTS ,Number of downstream ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "USB2_CONTROLLER_1_USB2D_HCCPARAMS_0,USB2D Host Control Capability Parameters Register" bitfld.long 0x04 18. " PPC ,Per-port change event capability" "Not supported,Supported" bitfld.long 0x04 17. " LEN ,Link power management capability" "Not supported,Supported" hexmask.long.byte 0x04 8.--15. 1. " EECP ,EHCI extended capabilities pointer" textline " " bitfld.long 0x04 4.--7. " IST ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 2. " ASP ,Asynchronous schedule park capability" "Disabled,Enabled" bitfld.long 0x04 1. " PFL ,Programmable frame list flag configuration" "Disabled,Enabled" rgroup.long 0x120++0x07 line.long 0x00 "USB2_CONTROLLER_1_USB2D_DCIVERSION_0,USB2D Device Interface Version Number Register" hexmask.long.word 0x00 0.--15. 1. " DCIVERSION ,Interface version number for the two-byte BCD encoding" line.long 0x04 "USB2_CONTROLLER_1_USB2D_DCCPARAMS_0,USB2D Device Control Capabilities Register" bitfld.long 0x04 8. " HC ,Host capable" "Disabled,Enabled" bitfld.long 0x04 7. " DC ,Device capable" "Disabled,Enabled" bitfld.long 0x04 5. " LEN ,Link power management capability" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--4. " DEN ,Device endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree "Control Registers" if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x128++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_EXTSTS_0,USB2D EXTSTS Register" eventfld.long 0x00 4. " TI1 ,General purpose timer interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 3. " TI0 ,General purpose timer interrupt 0" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 0. " NAKI ,NAK interrupt bit" "Disabled,Enabled" else group.long 0x128++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_EXTSTS_0,USB2D EXTSTS Register" eventfld.long 0x00 4. " TI1 ,General purpose timer interrupt 1" "No interrupt,Interrupt" eventfld.long 0x00 3. " TI0 ,General purpose timer interrupt 0" "No interrupt,Interrupt" eventfld.long 0x00 2. " UPA ,USB host periodic interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " UAI ,USB host asynchronous interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 0. " NAKI ,NAK interrupt bit" "Disabled,Enabled" endif group.long 0x12C++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBEXTINTR_0,USB2D EXTINTR Register" bitfld.long 0x00 4. " TIE1 ,General purpose timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " TIE0 ,General purpose timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " UPIE ,UPIE interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UAIE ,UAIE interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " NAKE ,NAK interrupt enable" "Disabled,Enabled" if (((per.l(ad:0x7D004000+0x108))&0x04)==0x00)&&(((per.l(ad:0x7D004000+0x108))&0x02)==0x00)&&(((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwire" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" "0,1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "Clear,Set" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" rbitfld.long 0x00 2.--3. 15. " FS2_FS0 ,Frame list size (in bytes)" "4096,2048,1024,512,256,128,64,32" textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D004000+0x108))&0x04)==0x00)&&(((per.l(ad:0x7D004000+0x108))&0x02)==0x02)&&(((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwire" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" "0,1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "Clear,Set" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS2_FS0 ,Frame list size (in bytes)" "4096,2048,1024,512,256,128,64,32" textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D004000+0x108))&0x04)==0x04)&&(((per.l(ad:0x7D004000+0x108))&0x02)==0x00)&&(((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwire" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" ",1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "Clear,Set" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" rbitfld.long 0x00 2.--3. 15. " FS2_FS0 ,Frame list size (in bytes)" "4096,2048,1024,512,256,128,64,32" textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D004000+0x108))&0x04)==0x04)&&(((per.l(ad:0x7D004000+0x108))&0x02)==0x02)&&(((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwire" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" ",1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "Clear,Set" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. 15. " FS2_FS0 ,Frame list size (in bytes)" "4096,2048,1024,512,256,128,64,32" textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D004000+0x108))&0x04)==0x00)&&(((per.l(ad:0x7D004000+0x1F8))&0x03)!=0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwier" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" "0,1,2,3" textline " " textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" elif (((per.l(ad:0x7D004000+0x108))&0x04)==0x04)&&(((per.l(ad:0x7D004000+0x1F8))&0x03)!=0x03) group.long 0x130++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBCMD_0,USB2D USB Command Register" bitfld.long 0x00 24.--27. " HIRD ,Host initiated resume duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" textline " " bitfld.long 0x00 14. " ATDTW ,ADD DTD tripwier" "Clear,Set" bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Clear,Set" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASP1_ASP0 ,Asynchronous schedule park mode count" ",1,2,3" textline " " textline " " bitfld.long 0x00 1. " RST ,Controller reset" "Clear,Set" bitfld.long 0x00 0. " RS ,Run/stop host/device controller" "Stop,Run" endif if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x134++0x07 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBSTS_0,USB2D USB Status Register" bitfld.long 0x00 31. " PPCI16 ,Port 16 change detect status" "Not detected,Detected" bitfld.long 0x00 30. " PPCI15 ,Port 15 change detect status" "Not detected,Detected" bitfld.long 0x00 29. " PPCI14 ,Port 14 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 28. " PPCI13 ,Port 13 change detect status" "Not detected,Detected" bitfld.long 0x00 27. " PPCI12 ,Port 12 change detect status" "Not detected,Detected" bitfld.long 0x00 26. " PPCI11 ,Port 11 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 25. " PPCI10 ,Port 10 change detect status" "Not detected,Detected" bitfld.long 0x00 24. " PPCI9 ,Port 9 change detect status" "Not detected,Detected" bitfld.long 0x00 23. " PPCI8 ,Port 8 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 22. " PPCI7 ,Port 7 change detect status" "Not detected,Detected" bitfld.long 0x00 21. " PPCI6 ,Port 6 change detect status" "Not detected,Detected" bitfld.long 0x00 20. " PPCI5 ,Port 5 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 19. " PPCI4 ,Port 4 change detect status" "Not detected,Detected" bitfld.long 0x00 18. " PPCI3 ,Port 3 change detect status" "Not detected,Detected" bitfld.long 0x00 17. " PPCI2 ,Port 2 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 16. " PPCI1 ,Port 1 change detect status" "Not detected,Detected" bitfld.long 0x00 15. " AS ,Asynchronous schedule status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic schedule status" "Disabled,Enabled" textline " " rbitfld.long 0x00 13. " RCL ,Empty asynchronous schedule detection" "Disabled,Enabled" bitfld.long 0x00 12. " HCH ,HCHalted" "Not halted,Halted" textline " " bitfld.long 0x00 11. " UALT_INT ,ULPI alt_int interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " ULPI_INT ,ULPI interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " SRI ,SOF received" "Not received,Received" bitfld.long 0x00 5. " AAI ,Interrupt and asynchronous advance" "Not advanced,Advanced" rbitfld.long 0x00 4. " SEI ,System error" "No error,Error" textline " " bitfld.long 0x00 3. " FRI ,Frame list rollover" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCI ,Port change detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB error interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" elif (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x134++0x07 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBSTS_0,USB2D USB Status Register" bitfld.long 0x00 31. " PPCI16 ,Port 16 change detect status" "Not detected,Detected" bitfld.long 0x00 30. " PPCI15 ,Port 15 change detect status" "Not detected,Detected" bitfld.long 0x00 29. " PPCI14 ,Port 14 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 28. " PPCI13 ,Port 13 change detect status" "Not detected,Detected" bitfld.long 0x00 27. " PPCI12 ,Port 12 change detect status" "Not detected,Detected" bitfld.long 0x00 26. " PPCI11 ,Port 11 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 25. " PPCI10 ,Port 10 change detect status" "Not detected,Detected" bitfld.long 0x00 24. " PPCI9 ,Port 9 change detect status" "Not detected,Detected" bitfld.long 0x00 23. " PPCI8 ,Port 8 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 22. " PPCI7 ,Port 7 change detect status" "Not detected,Detected" bitfld.long 0x00 21. " PPCI6 ,Port 6 change detect status" "Not detected,Detected" bitfld.long 0x00 20. " PPCI5 ,Port 5 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 19. " PPCI4 ,Port 4 change detect status" "Not detected,Detected" bitfld.long 0x00 18. " PPCI3 ,Port 3 change detect status" "Not detected,Detected" bitfld.long 0x00 17. " PPCI2 ,Port 2 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 16. " PPCI1 ,Port 1 change detect status" "Not detected,Detected" textline " " textline " " bitfld.long 0x00 11. " UALT_INT ,ULPI alt_int interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " ULPI_INT ,ULPI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " SLI ,DCSuspend" "Not suspended,Suspended" textline " " eventfld.long 0x00 7. " SRI ,SOF received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB reset received" "No reset,Reset" rbitfld.long 0x00 4. " SEI ,System error" "No error,Error" textline " " bitfld.long 0x00 2. " PCI ,Port change detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB error interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" else group.long 0x134++0x07 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBSTS_0,USB2D USB Status Register" bitfld.long 0x00 31. " PPCI16 ,Port 16 change detect status" "Not detected,Detected" bitfld.long 0x00 30. " PPCI15 ,Port 15 change detect status" "Not detected,Detected" bitfld.long 0x00 29. " PPCI14 ,Port 14 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 28. " PPCI13 ,Port 13 change detect status" "Not detected,Detected" bitfld.long 0x00 27. " PPCI12 ,Port 12 change detect status" "Not detected,Detected" bitfld.long 0x00 26. " PPCI11 ,Port 11 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 25. " PPCI10 ,Port 10 change detect status" "Not detected,Detected" bitfld.long 0x00 24. " PPCI9 ,Port 9 change detect status" "Not detected,Detected" bitfld.long 0x00 23. " PPCI8 ,Port 8 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 22. " PPCI7 ,Port 7 change detect status" "Not detected,Detected" bitfld.long 0x00 21. " PPCI6 ,Port 6 change detect status" "Not detected,Detected" bitfld.long 0x00 20. " PPCI5 ,Port 5 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 19. " PPCI4 ,Port 4 change detect status" "Not detected,Detected" bitfld.long 0x00 18. " PPCI3 ,Port 3 change detect status" "Not detected,Detected" bitfld.long 0x00 17. " PPCI2 ,Port 2 change detect status" "Not detected,Detected" textline " " bitfld.long 0x00 16. " PPCI1 ,Port 1 change detect status" "Not detected,Detected" textline " " textline " " bitfld.long 0x00 11. " UALT_INT ,ULPI alt_int interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " ULPI_INT ,ULPI interrupt" "No interrupt,Interrupt" textline " " textline " " eventfld.long 0x00 7. " SRI ,SOF received" "Not received,Received" rbitfld.long 0x00 4. " SEI ,System error" "No error,Error" textline " " bitfld.long 0x00 2. " PCI ,Port change detect" "Not changed,Changed" bitfld.long 0x00 1. " UEI ,USB error interrupt" "No error,Error" bitfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" endif if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x138++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBINTR_0,USB2D USB Interrupt Enable Register" bitfld.long 0x00 31. " PPCE16 ,Port 16 change detect enable" "Disabled,Enabled" bitfld.long 0x00 30. " PPCE15 ,Port 15 change detect enable" "Disabled,Enabled" bitfld.long 0x00 29. " PPCE14 ,Port 14 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PPCE13 ,Port 13 change detect enable" "Disabled,Enabled" bitfld.long 0x00 27. " PPCE12 ,Port 12 change detect enable" "Disabled,Enabled" bitfld.long 0x00 26. " PPCE11 ,Port 11 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PPCE10 ,Port 10 change detect enable" "Disabled,Enabled" bitfld.long 0x00 24. " PPCE9 ,Port 9 change detect enable" "Disabled,Enabled" bitfld.long 0x00 23. " PPCE8 ,Port 8 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PPCE7 ,Port 7 change detect enable" "Disabled,Enabled" bitfld.long 0x00 21. " PPCE6 ,Port 6 change detect enable" "Disabled,Enabled" bitfld.long 0x00 20. " PPCE5 ,Port 5 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PPCE4 ,Port 4 change detect enable" "Disabled,Enabled" bitfld.long 0x00 18. " PPCE3 ,Port 3 change detect enable" "Disabled,Enabled" bitfld.long 0x00 17. " PPCE2 ,Port 2 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PPCE1 ,Port 1 change detect enable" "Disabled,Enabled" eventfld.long 0x00 11. " UALTIE ,ULPI alt_int Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" bitfld.long 0x00 5. " AAE ,Interrupt on asynchronous advance enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" bitfld.long 0x00 3. " FRE ,Frame list rollover enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" bitfld.long 0x00 1. " UEE ,USB error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" elif (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x138++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBINTR_0,USB2D USB Interrupt Enable Register" bitfld.long 0x00 31. " PPCE16 ,Port 16 change detect enable" "Disabled,Enabled" bitfld.long 0x00 30. " PPCE15 ,Port 15 change detect enable" "Disabled,Enabled" bitfld.long 0x00 29. " PPCE14 ,Port 14 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PPCE13 ,Port 13 change detect enable" "Disabled,Enabled" bitfld.long 0x00 27. " PPCE12 ,Port 12 change detect enable" "Disabled,Enabled" bitfld.long 0x00 26. " PPCE11 ,Port 11 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PPCE10 ,Port 10 change detect enable" "Disabled,Enabled" bitfld.long 0x00 24. " PPCE9 ,Port 9 change detect enable" "Disabled,Enabled" bitfld.long 0x00 23. " PPCE8 ,Port 8 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PPCE7 ,Port 7 change detect enable" "Disabled,Enabled" bitfld.long 0x00 21. " PPCE6 ,Port 6 change detect enable" "Disabled,Enabled" bitfld.long 0x00 20. " PPCE5 ,Port 5 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PPCE4 ,Port 4 change detect enable" "Disabled,Enabled" bitfld.long 0x00 18. " PPCE3 ,Port 3 change detect enable" "Disabled,Enabled" bitfld.long 0x00 17. " PPCE2 ,Port 2 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PPCE1 ,Port 1 change detect enable" "Disabled,Enabled" eventfld.long 0x00 11. " UALTIE ,ULPI alt_int Interrupt enable" "Disabled,Enabled" eventfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " SLE ,Sleep enable" "Disabled,Enabled" eventfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" eventfld.long 0x00 6. " URE ,USB reset enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" bitfld.long 0x00 1. " UEE ,USB error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" else group.long 0x138++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBINTR_0,USB2D USB Interrupt Enable Register" bitfld.long 0x00 31. " PPCE16 ,Port 16 change detect enable" "Disabled,Enabled" bitfld.long 0x00 30. " PPCE15 ,Port 15 change detect enable" "Disabled,Enabled" bitfld.long 0x00 29. " PPCE14 ,Port 14 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PPCE13 ,Port 13 change detect enable" "Disabled,Enabled" bitfld.long 0x00 27. " PPCE12 ,Port 12 change detect enable" "Disabled,Enabled" bitfld.long 0x00 26. " PPCE11 ,Port 11 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " PPCE10 ,Port 10 change detect enable" "Disabled,Enabled" bitfld.long 0x00 24. " PPCE9 ,Port 9 change detect enable" "Disabled,Enabled" bitfld.long 0x00 23. " PPCE8 ,Port 8 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " PPCE7 ,Port 7 change detect enable" "Disabled,Enabled" bitfld.long 0x00 21. " PPCE6 ,Port 6 change detect enable" "Disabled,Enabled" bitfld.long 0x00 20. " PPCE5 ,Port 5 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " PPCE4 ,Port 4 change detect enable" "Disabled,Enabled" bitfld.long 0x00 18. " PPCE3 ,Port 3 change detect enable" "Disabled,Enabled" bitfld.long 0x00 17. " PPCE2 ,Port 2 change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " PPCE1 ,Port 1 change detect enable" "Disabled,Enabled" eventfld.long 0x00 11. " UALTIE ,ULPI alt_int interrupt enable" "Disabled,Enabled" eventfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" textline " " eventfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" bitfld.long 0x00 1. " UEE ,USB error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" endif rgroup.long 0x13C++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_FRINDEX_0,USB2D USB Frame Index Register" hexmask.long.word 0x00 0.--13. 1. " FRINDEX ,Frame index" textline " " width 44. if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x144++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_PERIODICLISTBASE_0,USB2D Host Controller Frame List Base Address Register" hexmask.long.byte 0x00 25.--31. 1. " USBADR ,Device address" bitfld.long 0x00 24. " USBADRA ,Device address advance" "Disabled,Enabled" elif (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x144++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_PERIODICLISTBASE_0,USB2D Host Controller Frame List Base Address Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADR ,Beginning address of the periodic frame list in the system memory" else hgroup.long 0x144++0x03 hide.long 0x00 "USB2_CONTROLLER_1_USB2D_PERIODICLISTBASE_0,USB2D Host Controller Frame List Base Address Register" endif if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x148++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ASYNCLISTADDR_0,USB2D Next Asynchronous List Address Register" hexmask.long.tbyte 0x00 11.--31. 0x8 " EPBASE ,Address of the top of the endpoint list in system memory" elif (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x148++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ASYNCLISTADDR_0,USB2D Next Asynchronous List Address Register" hexmask.long 0x00 5.--31. 0x20 " ASYBASE ,Address of the next asynchronous queue head to be executed by the host" else hgroup.long 0x148++0x03 hide.long 0x00 "USB2_CONTROLLER_1_USB2D_ASYNCLISTADDR_0,USB2D Next Asynchronous List Address Register" endif group.long 0x14C++0x0B line.long 0x00 "USB2_CONTROLLER_1_USB2D_ASYNCTTSTS_0,USB2D Asynchronous Buffer Status for Embedded TT Register" sif (cpu()=="TEGRAX1") hexmask.long.byte 0x00 24.--30. 0x01 " TTHA ,Internal TT Hub Address representation" textline " " endif bitfld.long 0x00 1. " TTAC ,Embedded TT async buffers clear" "No clear,Clear" rbitfld.long 0x00 0. " TTAS ,Embedded TT async buffers transactions status" "Flushed,Held" line.long 0x04 "USB2_CONTROLLER_1_USB2D_BURSTSIZE_0,USB2D Burst Size register" hexmask.long.byte 0x04 8.--15. 1. " TXPBURST ,Programmable TX burst length" hexmask.long.byte 0x04 0.--7. 1. " RXPBURST ,Programmable RX burst length" line.long 0x08 "USB2_CONTROLLER_1_USB2D_TXFILLTUNING_0,USB2D Transmit fill tuning register" bitfld.long 0x08 16.--21. " TXFIFOTHRES ,FIFO burst threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--12. " TXSCHHEALTH ,Scheduler health counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x08 0.--7. 1. " TXSCHOH ,Scheduler overhead" sif (cpu()!="TEGRAX1") group.long 0x15C++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ICUSB_CTRL_0,USB2D ICUSB control register" bitfld.long 0x00 3. " IC_ENB1 ,ICUSB transceiver" "Disabled,Enabled" bitfld.long 0x00 0.--2. " IC_VDD1 ,ICUSB voltage select" "No voltage,,,,1.8V,3.0V,," endif group.long 0x160++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ULPI_VIEWPORT_0,USB2D ULPI viewport register" bitfld.long 0x00 31. " ULPI_WAKEUP ,ULPI wakeup" "No effect,Wakeup" bitfld.long 0x00 30. " ULPI_RUN ,ULPI read/write run (begin read/write operation)" "No effect,Run" bitfld.long 0x00 29. " ULPI_RD_WR ,ULPI read/write control" "Read,Write" textline " " rbitfld.long 0x00 27. " ULPI_SYNC_STATE ,ULPI sync state" "Not normal,Normal" bitfld.long 0x00 24.--26. " ULPI_PORT ,ULPI PHY port number" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 16.--23. 1. " ULPI_REG_ADDR ,ULPI PHY register address" textline " " hexmask.long.byte 0x00 8.--15. 1. " ULPI_DATA_RD ,ULPI PHY data read" hexmask.long.byte 0x00 0.--7. 1. " ULPI_DATA_WR ,ULPI PHY data write" textline " " width 41. if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) if (((per.l(ad:0x7D004000+0x174))&0x1000)==0x1000) group.long 0x174++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_PORTSC1_0,USB2D Port Status/Control 1 Register" hexmask.long.byte 0x00 25.--31. 1. " DA ,Device address" rbitfld.long 0x00 23.--24. " SSTS ,Suspend status" "L1STATE_ENTERED,NYET_PERIPH,L1STATE_NOT_SUPPORTED,PERIPH_NORESP_ERR" bitfld.long 0x00 22. " WKOC ,Wake on over-current" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " WKDS ,Wake on disconnect" "Disabled,Enabled" bitfld.long 0x00 20. " WKCN ,Wake on connect" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port test control" "NORMAL_OP,TEST_J,TEST_K,TEST_SE0_NAK,TEST_PKT,TEST_FORCE_ENABLE,?..." textline " " bitfld.long 0x00 12. " PP ,Port power" "Disabled,Enabled" rbitfld.long 0x00 10.--11. " LS ,Line state" "SE0,J_STATE,K_STATE,Undefined" textline " " bitfld.long 0x00 9. " SLP ,Suspend using L1" "L2,L1" bitfld.long 0x00 8. " PR ,Port reset" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SUSP ,Port suspend" "Disabled,Enabled" bitfld.long 0x00 6. " FPR ,Force port resume" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEC ,Port enable/disable change" "No change,Change" bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CSC ,Connect status change" "No change,Change" bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" else group.long 0x174++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_PORTSC1_0,USB2D Port Status/Control 1 Register" hexmask.long.byte 0x00 25.--31. 1. " DA ,Device address" rbitfld.long 0x00 23.--24. " SSTS ,Suspend status" "L1STATE_ENTERED,NYET_PERIPH,L1STATE_NOT_SUPPORTED,PERIPH_NORESP_ERR" bitfld.long 0x00 22. " WKOC ,Wake on over-current" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " WKDS ,Wake on disconnect" "Disabled,Enabled" bitfld.long 0x00 20. " WKCN ,Wake on connect" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port test control" "NORMAL_OP,TEST_J,TEST_K,TEST_SE0_NAK,TEST_PKT,TEST_FORCE_ENABLE,?..." textline " " bitfld.long 0x00 12. " PP ,Port power" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " SLP ,Suspend using L1" "L2,L1" bitfld.long 0x00 8. " PR ,Port reset" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SUSP ,Port suspend" "Disabled,Enabled" bitfld.long 0x00 6. " FPR ,Force port resume" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEC ,Port enable/disable change" "No change,Change" bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CSC ,Connect status change" "No change,Change" bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" endif elif (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x174++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_PORTSC1_0,USB2D Port Status/Control 1 Register" hexmask.long.byte 0x00 25.--31. 1. " DA ,Device address" textline " " bitfld.long 0x00 16.--19. " PTC ,Port test control" "NORMAL_OP,TEST_J,TEST_K,TEST_SE0_NAK,TEST_PKT,TEST_FORCE_ENABLE,?..." textline " " sif (cpu()!="TEGRAX1") rbitfld.long 0x00 14.--15. " PIC ,Port indicator control" "0,1,2,3" rbitfld.long 0x00 13. " PO ,Port owner" "0,1" textline " " endif bitfld.long 0x00 12. " PP ,Port power" "Disabled,Enabled" rbitfld.long 0x00 10.--11. " LS ,Line state" "SE0,J_STATE,K_STATE,Undefined" textline " " bitfld.long 0x00 9. " SLP ,Suspend using L1" "L2,L1" rbitfld.long 0x00 8. " PR ,Port reset" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " SUSP ,Port suspend" "Disabled,Enabled" bitfld.long 0x00 6. " FPR ,Force port resume" "Disabled,Enabled" textline " " sif (cpu()!="TEGRAX1") rbitfld.long 0x00 5. " OCC ,Over-current change" "No change,Change" rbitfld.long 0x00 4. " OCA ,Over-current active" "Not active,Active" textline " " endif bitfld.long 0x00 3. " PEC ,Port enable/disable change" "No change,Change" bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" else group.long 0x174++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_PORTSC1_0,USB2D Port Status/Control 1 Register" hexmask.long.byte 0x00 25.--31. 1. " DA ,Device address" textline " " bitfld.long 0x00 16.--19. " PTC ,Port test control" "NORMAL_OP,TEST_J,TEST_K,TEST_SE0_NAK,TEST_PKT,TEST_FORCE_ENABLE,?..." textline " " sif (cpu()!="TEGRAX1") rbitfld.long 0x00 14.--15. " PIC ,Port indicator control" "0,1,2,3" rbitfld.long 0x00 13. " PO ,Port owner" "0,1" textline " " endif bitfld.long 0x00 12. " PP ,Port power" "Disabled,Enabled" rbitfld.long 0x00 10.--11. " LS ,Line state" "SE0,J_STATE,K_STATE,Undefined" textline " " bitfld.long 0x00 9. " SLP ,Suspend using L1" "L2,L1" rbitfld.long 0x00 8. " PR ,Port reset" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " SUSP ,Port suspend" "Disabled,Enabled" bitfld.long 0x00 6. " FPR ,Force port resume" "Disabled,Enabled" textline " " sif (cpu()!="TEGRAX1") rbitfld.long 0x00 5. " OCC ,Over-current change" "No change,Change" rbitfld.long 0x00 4. " OCA ,Over-current active" "Not active,Active" textline " " endif bitfld.long 0x00 3. " PEC ,Port enable/disable change" "No change,Change" bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" endif if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x1B4++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_HOSTPC1_0,USB2D Host Mode LPM Behav and Control Register" bitfld.long 0x00 29.--31. " PTS ,Parallel transceiver select" "UTMI,,ULPI,ICUSB_SER,HSIC,?..." bitfld.long 0x00 28. " STS ,Serial transceiver" "PARALLEL_IF,SERIAL_IF" rbitfld.long 0x00 27. " PTW ,Parallel transceiver width" "8-bit," textline " " rbitfld.long 0x00 25.--26. " PSPD ,Port operating speed" "Full,Low,High," sif (cpu()=="TEGRAX1") bitfld.long 0x00 24. " ALPD ,Auto Low Power While Disconnect" "Disabled,Enabled" endif textline " " bitfld.long 0x00 23. " PFSC ,Port force full speed connect" "Disabled,Enabled" bitfld.long 0x00 22. " PHCD ,PHY low power suspend - clock disable" "No,Yes" textline " " bitfld.long 0x00 20.--21. " LPMX ,Auto LPM set" "Disabled,Set,Set without interrupt,?..." bitfld.long 0x00 16.--19. " EPLPM ,Endpoint for LPM token" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " LPMFRM ,Auto LPM SOF threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 1.--11. 1. " BA ,BmAttrubuttes" textline " " bitfld.long 0x00 0. " ASUS ,Auto low power" "Disabled,Enabled" elif (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x1B4++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_DEVLC_0,USB2D Device Mode LPM Behav and Control Register" bitfld.long 0x00 29.--31. " PTS ,Parallel transceiver select" "UTMI,,ULPI,ICUSB_SER,HSIC,?..." bitfld.long 0x00 28. " STS ,Serial transceiver" "PARALLEL_IF,SERIAL_IF" rbitfld.long 0x00 27. " PTW ,Parallel transceiver width" "8-bit,?..." textline " " rbitfld.long 0x00 25.--26. " PSPD ,Port operating speed" "Full,Low,High,?..." sif (cpu()=="TEGRAX1") bitfld.long 0x00 24. " ALPD ,Auto Low Power While Disconnect" "Disabled,Enabled" endif textline " " bitfld.long 0x00 23. " PFSC ,Port force full speed connect" "Disabled,Enabled" bitfld.long 0x00 22. " PHCD ,PHY low power suspend - clock disable" "No,Yes" textline " " bitfld.long 0x00 17. " ASUS ,Auto low power" "Disabled,Enabled" bitfld.long 0x00 16. " STL ,STALL reply to LPM token" "Disabled,Enabled" textline " " hexmask.long.word 0x00 1.--11. 1. " BA ,BmAttrubuttes" bitfld.long 0x00 0. " NYT ,NYTE reply to LPM token" "Disabled,Enabled" else group.long 0x1B4++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_HOSTPC1_DEVLC_0,USB2D Device Mode LPM Behav and Control Register" bitfld.long 0x00 29.--31. " PTS ,Parallel transceiver select" "UTMI,,ULPI,ICUSB_SER,HSIC,?..." bitfld.long 0x00 28. " STS ,Serial transceiver" "PARALLEL_IF,SERIAL_IF" rbitfld.long 0x00 27. " PTW ,Parallel transceiver width" "8-bit,?..." textline " " rbitfld.long 0x00 25.--26. " PSPD ,Port operating speed" "Full,Low,High,?..." sif (cpu()=="TEGRAX1") bitfld.long 0x00 24. " ALPD ,Auto Low Power While Disconnect" "Disabled,Enabled" endif textline " " bitfld.long 0x00 23. " PFSC ,Port force full speed connect" "Disabled,Enabled" bitfld.long 0x00 22. " PHCD ,PHY low power suspend - clock disable" "No,Yes" textline " " textline " " hexmask.long.word 0x00 1.--11. 1. " BA ,BmAttrubuttes" endif group.long 0x1F4++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_OTGSC_0,USB2D On-The-Go (OTG) Status and Control Register" bitfld.long 0x00 30. " DPIE ,Data pulse interrupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " ONEMSE ,1 millisecond timer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " BSEIE ,B session end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BSVIE ,B session valid interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ASVIE ,A session valid interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " AVVIE ,A VBUS valid interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " IDIE ,USB ID interrupt enable" "Disabled,Enabled" eventfld.long 0x00 22. " DPIS ,Data pulse interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 21. " ONEMESS ,1 millisecond timer interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 20. " BSEIS ,B session end interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 19. " BSVIS ,B session valid interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " ASVIS ,A session valid interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " AVVIS ,A VBUS valid interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " IDIS ,USB ID interrupt toggle" "No interrupt,Interrupt" rbitfld.long 0x00 14. " DPS ,Data pulse status" "Not detected,Detected" textline " " rbitfld.long 0x00 13. " ONEMST ,1 millisecond timer toggle" "Low,High" rbitfld.long 0x00 12. " BSE ,B session end threshold" "No,Yes" rbitfld.long 0x00 11. " BSV ,B session valid threshold" "No,Yes" textline " " rbitfld.long 0x00 10. " ASV ,A session valid threshold" "No,Yes" rbitfld.long 0x00 9. " AVV ,A VBUS valid threshold" "No,Yes" rbitfld.long 0x00 8. " ID ,USB ID" "A-device,B-device" textline " " bitfld.long 0x00 5. " IDPU ,USB ID pullup" "Clear,Set" bitfld.long 0x00 4. " DP ,Data pulsing" "Disabled,Enabled" bitfld.long 0x00 3. " OT ,OTG termination" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " VC ,VBUS charge" "Disabled,Enabled" bitfld.long 0x00 0. " VD ,VBUS discharge" "Disabled,Enabled" if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x1F8++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBMODE_0,USB2D USB Device Mode Register" sif (cpu()=="TEGRAX1") hexmask.long.word 0x00 16.--31. 1. " ALPDD ,Auto Low Power While Disconnect Delay" textline " " endif bitfld.long 0x00 15. " SRT ,Shorten USB reset time" "No,Yes" rbitfld.long 0x00 4. " SDIS ,Stream disable" "No,Yes" textline " " rbitfld.long 0x00 2. " ES ,Endian select" "Little endian,?..." rbitfld.long 0x00 0.--1. " CM ,Controller mode" "Idle,,Device mode,Host mode" else group.long 0x1F8++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_USBMODE_0,USB2D USB Device Mode Register" sif (cpu()=="TEGRAX1") textline " " endif bitfld.long 0x00 15. " SRT ,Shorten USB reset time" "No,Yes" rbitfld.long 0x00 4. " SDIS ,Stream disable" "No,Yes" rbitfld.long 0x00 3. " SLOM ,Setup lockout mode" "On,Off" textline " " rbitfld.long 0x00 2. " ES ,Endian select" "Little endian,?..." rbitfld.long 0x00 0.--1. " CM ,Controller mode" "Idle,,Device mode,Host mode" endif tree.end tree "Endpoint Setup" width 43. group.long 0x200++0x07 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTNAK_0,USB2D Endpoint NAK register" bitfld.long 0x00 31. " EPTN[15] ,TX endpoint NAK 15" "Clear,Set" bitfld.long 0x00 30. " [14] ,TX endpoint NAK 14" "Clear,Set" bitfld.long 0x00 29. " [13] ,TX endpoint NAK 13" "Clear,Set" bitfld.long 0x00 28. " [12] ,TX endpoint NAK 12" "Clear,Set" textline " " bitfld.long 0x00 27. " [11] ,TX endpoint NAK 11" "Clear,Set" bitfld.long 0x00 26. " [10] ,TX endpoint NAK 10" "Clear,Set" bitfld.long 0x00 25. " [9] ,TX endpoint NAK 9" "Clear,Set" bitfld.long 0x00 24. " [8] ,TX endpoint NAK 8" "Clear,Set" textline " " bitfld.long 0x00 23. " [7] ,TX endpoint NAK 7" "Clear,Set" bitfld.long 0x00 22. " [6] ,TX endpoint NAK 6" "Clear,Set" bitfld.long 0x00 21. " [5] ,TX endpoint NAK 5" "Clear,Set" bitfld.long 0x00 20. " [4] ,TX endpoint NAK 4" "Clear,Set" textline " " bitfld.long 0x00 19. " [3] ,TX endpoint NAK 3" "Clear,Set" bitfld.long 0x00 18. " [2] ,TX endpoint NAK 2" "Clear,Set" bitfld.long 0x00 17. " [1] ,TX endpoint NAK 1" "Clear,Set" bitfld.long 0x00 16. " [0] ,TX endpoint NAK 0" "Clear,Set" textline " " bitfld.long 0x00 15. " EPRN[15] ,RX endpoint NAK 15" "Clear,Set" bitfld.long 0x00 14. " [14] ,RX endpoint NAK 14" "Clear,Set" bitfld.long 0x00 13. " [13] ,RX endpoint NAK 13" "Clear,Set" bitfld.long 0x00 12. " [12] ,RX endpoint NAK 12" "Clear,Set" textline " " bitfld.long 0x00 11. " [11] ,RX endpoint NAK 11" "Clear,Set" bitfld.long 0x00 10. " [10] ,RX endpoint NAK 10" "Clear,Set" bitfld.long 0x00 9. " [9] ,RX endpoint NAK 9" "Clear,Set" bitfld.long 0x00 8. " [8] ,RX endpoint NAK 8" "Clear,Set" textline " " bitfld.long 0x00 7. " [7] ,RX endpoint NAK 7" "Clear,Set" bitfld.long 0x00 6. " [6] ,RX endpoint NAK 6" "Clear,Set" bitfld.long 0x00 5. " [5] ,RX endpoint NAK 5" "Clear,Set" bitfld.long 0x00 4. " [4] ,RX endpoint NAK 4" "Clear,Set" textline " " bitfld.long 0x00 3. " [3] ,RX endpoint NAK 3" "Clear,Set" bitfld.long 0x00 2. " [2] ,RX endpoint NAK 2" "Clear,Set" bitfld.long 0x00 1. " [1] ,RX endpoint NAK 1" "Clear,Set" bitfld.long 0x00 0. " [0] ,RX endpoint NAK 0" "Clear,Set" line.long 0x04 "USB2_CONTROLLER_1_USB2D_ENDPTNAK_ENABLE_0,USB2D Endpoint NAK Enable register" bitfld.long 0x04 31. " EPTNE[15] ,TX endpoint NAK enable 15" "Disabled,Enabled" bitfld.long 0x04 30. " [14] ,TX endpoint NAK enable 14" "Disabled,Enabled" bitfld.long 0x04 29. " [13] ,TX endpoint NAK enable 13" "Disabled,Enabled" bitfld.long 0x04 28. " [12] ,TX endpoint NAK enable 12" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " [11] ,TX endpoint NAK enable 11" "Disabled,Enabled" bitfld.long 0x04 26. " [10] ,TX endpoint NAK enable 10" "Disabled,Enabled" bitfld.long 0x04 25. " [9] ,TX endpoint NAK enable 9" "Disabled,Enabled" bitfld.long 0x04 24. " [8] ,TX endpoint NAK enable 8" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " [7] ,TX endpoint NAK enable 7" "Disabled,Enabled" bitfld.long 0x04 22. " [6] ,TX endpoint NAK enable 6" "Disabled,Enabled" bitfld.long 0x04 21. " [5] ,TX endpoint NAK enable 5" "Disabled,Enabled" bitfld.long 0x04 20. " [4] ,TX endpoint NAK enable 4" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [3] ,TX endpoint NAK enable 3" "Disabled,Enabled" bitfld.long 0x04 18. " [2] ,TX endpoint NAK enable 2" "Disabled,Enabled" bitfld.long 0x04 17. " [1] ,TX endpoint NAK enable 1" "Disabled,Enabled" bitfld.long 0x04 16. " [0] ,TX endpoint NAK enable 0" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " EPRNE[15] ,RX endpoint NAK enable 15" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,RX endpoint NAK enable 14" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,RX endpoint NAK enable 13" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,RX endpoint NAK enable 12" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,RX endpoint NAK enable 11" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,RX endpoint NAK enable 10" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,RX endpoint NAK enable 9" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,RX endpoint NAK enable 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,RX endpoint NAK enable 7" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,RX endpoint NAK enable 6" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,RX endpoint NAK enable 5" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,RX endpoint NAK enable 4" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [3] ,RX endpoint NAK enable 3" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,RX endpoint NAK enable 2" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,RX endpoint NAK enable 1" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,RX endpoint NAK enable 0" "Disabled,Enabled" textline " " width 43. if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x208++0x0B line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTSETUPSTAT_0,USB2D Endpoint Setup Status Register" bitfld.long 0x00 15. " ENDPTSETUPSTAT[15] ,Endpoint setup status 15" "Not received,Received" bitfld.long 0x00 14. " [14] ,Endpoint setup status 14" "Not received,Received" bitfld.long 0x00 13. " [13] ,Endpoint setup status 13" "Not received,Received" textline " " bitfld.long 0x00 12. " [12] ,Endpoint setup status 12" "Not received,Received" bitfld.long 0x00 11. " [11] ,Endpoint setup status 11" "Not received,Received" bitfld.long 0x00 10. " [10] ,Endpoint setup status 10" "Not received,Received" textline " " bitfld.long 0x00 9. " [9] ,Endpoint setup status 9" "Not received,Received" bitfld.long 0x00 8. " [8] ,Endpoint setup status 8" "Not received,Received" bitfld.long 0x00 7. " [7] ,Endpoint setup status 7" "Not received,Received" textline " " bitfld.long 0x00 6. " [6] ,Endpoint setup status 6" "Not received,Received" bitfld.long 0x00 5. " [5] ,Endpoint setup status 5" "Not received,Received" bitfld.long 0x00 4. " [4] ,Endpoint setup status 4" "Not received,Received" textline " " bitfld.long 0x00 3. " [3] ,Endpoint setup status 3" "Not received,Received" bitfld.long 0x00 2. " [2] ,Endpoint setup status 2" "Not received,Received" bitfld.long 0x00 1. " [1] ,Endpoint setup status 1" "Not received,Received" textline " " bitfld.long 0x00 0. " [0] ,Endpoint setup status 0" "Not received,Received" textline " " line.long 0x04 "USB2_CONTROLLER_1_USB2D_ENDPTPRIME_0,USB2D Endpoint Initialization Register" bitfld.long 0x04 31. " PETB[15] ,Prime endpoint transmit buffer 15" "Don't prime,Prime" bitfld.long 0x04 30. " [14] ,Prime endpoint transmit buffer 14" "Don't prime,Prime" bitfld.long 0x04 29. " [13] ,Prime endpoint transmit buffer 13" "Don't prime,Prime" bitfld.long 0x04 28. " [12] ,Prime endpoint transmit buffer 12" "Don't prime,Prime" textline " " bitfld.long 0x04 27. " [11] ,Prime endpoint transmit buffer 11" "Don't prime,Prime" bitfld.long 0x04 26. " [10] ,Prime endpoint transmit buffer 10" "Don't prime,Prime" bitfld.long 0x04 25. " [9] ,Prime endpoint transmit buffer 9" "Don't prime,Prime" bitfld.long 0x04 24. " [8] ,Prime endpoint transmit buffer 8" "Don't prime,Prime" textline " " bitfld.long 0x04 23. " [7] ,Prime endpoint transmit buffer 7" "Don't prime,Prime" bitfld.long 0x04 22. " [6] ,Prime endpoint transmit buffer 6" "Don't prime,Prime" bitfld.long 0x04 21. " [5] ,Prime endpoint transmit buffer 5" "Don't prime,Prime" bitfld.long 0x04 20. " [4] ,Prime endpoint transmit buffer 4" "Don't prime,Prime" textline " " bitfld.long 0x04 19. " [3] ,Prime endpoint transmit buffer 3" "Don't prime,Prime" bitfld.long 0x04 18. " [2] ,Prime endpoint transmit buffer 2" "Don't prime,Prime" bitfld.long 0x04 17. " [1] ,Prime endpoint transmit buffer 1" "Don't prime,Prime" bitfld.long 0x04 16. " [0] ,Prime endpoint transmit buffer 0" "Don't prime,Prime" textline " " bitfld.long 0x04 15. " PERB[15] ,Prime endpoint receive buffer 15" "Don't prime,Prime" bitfld.long 0x04 14. " [14] ,Prime endpoint receive buffer 14" "Don't prime,Prime" bitfld.long 0x04 13. " [13] ,Prime endpoint receive buffer 13" "Don't prime,Prime" bitfld.long 0x04 12. " [12] ,Prime endpoint receive buffer 12" "Don't prime,Prime" textline " " bitfld.long 0x04 11. " [11] ,Prime endpoint receive buffer 11" "Don't prime,Prime" bitfld.long 0x04 10. " [10] ,Prime endpoint receive buffer 10" "Don't prime,Prime" bitfld.long 0x04 9. " [9] ,Prime endpoint receive buffer 9" "Don't prime,Prime" bitfld.long 0x04 8. " [8] ,Prime endpoint receive buffer 8" "Don't prime,Prime" textline " " bitfld.long 0x04 7. " [7] ,Prime endpoint receive buffer 7" "Don't prime,Prime" bitfld.long 0x04 6. " [6] ,Prime endpoint receive buffer 6" "Don't prime,Prime" bitfld.long 0x04 5. " [5] ,Prime endpoint receive buffer 5" "Don't prime,Prime" bitfld.long 0x04 4. " [4] ,Prime endpoint receive buffer 4" "Don't prime,Prime" textline " " bitfld.long 0x04 3. " [3] ,Prime endpoint receive buffer 3" "Don't prime,Prime" bitfld.long 0x04 2. " [2] ,Prime endpoint receive buffer 2" "Don't prime,Prime" bitfld.long 0x04 1. " [1] ,Prime endpoint receive buffer 1" "Don't prime,Prime" bitfld.long 0x04 0. " [0] ,Prime endpoint receive buffer 0" "Don't prime,Prime" line.long 0x08 "USB2_CONTROLLER_1_USB2D_ENDPTFLUSH_0,USB2D Endpoint De-Initialization Register" bitfld.long 0x08 31. " FETB[15] ,Flush endpoint transmit buffer 15" "Don't flush,Flush" bitfld.long 0x08 30. " [14] ,Flush endpoint transmit buffer 14" "Don't flush,Flush" bitfld.long 0x08 29. " [13] ,Flush endpoint transmit buffer 13" "Don't flush,Flush" bitfld.long 0x08 28. " [12] ,Flush endpoint transmit buffer 12" "Don't flush,Flush" textline " " bitfld.long 0x08 27. " [11] ,Flush endpoint transmit buffer 11" "Don't flush,Flush" bitfld.long 0x08 26. " [10] ,Flush endpoint transmit buffer 10" "Don't flush,Flush" bitfld.long 0x08 25. " [9] ,Flush endpoint transmit buffer 9" "Don't flush,Flush" bitfld.long 0x08 24. " [8] ,Flush endpoint transmit buffer 8" "Don't flush,Flush" textline " " bitfld.long 0x08 23. " [7] ,Flush endpoint transmit buffer 7" "Don't flush,Flush" bitfld.long 0x08 22. " [6] ,Flush endpoint transmit buffer 6" "Don't flush,Flush" bitfld.long 0x08 21. " [5] ,Flush endpoint transmit buffer 5" "Don't flush,Flush" bitfld.long 0x08 20. " [4] ,Flush endpoint transmit buffer 4" "Don't flush,Flush" textline " " bitfld.long 0x08 19. " [3] ,Flush endpoint transmit buffer 3" "Don't flush,Flush" bitfld.long 0x08 18. " [2] ,Flush endpoint transmit buffer 2" "Don't flush,Flush" bitfld.long 0x08 17. " [1] ,Flush endpoint transmit buffer 1" "Don't flush,Flush" bitfld.long 0x08 16. " [0] ,Flush endpoint transmit buffer 0" "Don't flush,Flush" textline " " bitfld.long 0x08 15. " FERB[15] ,Flush endpoint receive buffer 15" "Don't flush,Flush" bitfld.long 0x08 14. " [14] ,Flush endpoint receive buffer 14" "Don't flush,Flush" bitfld.long 0x08 13. " [13] ,Flush endpoint receive buffer 13" "Don't flush,Flush" bitfld.long 0x08 12. " [12] ,Flush endpoint receive buffer 12" "Don't flush,Flush" textline " " bitfld.long 0x08 11. " [11] ,Flush endpoint receive buffer 11" "Don't flush,Flush" bitfld.long 0x08 10. " [10] ,Flush endpoint receive buffer 10" "Don't flush,Flush" bitfld.long 0x08 9. " [9] ,Flush endpoint receive buffer 9" "Don't flush,Flush" bitfld.long 0x08 8. " [8] ,Flush endpoint receive buffer 8" "Don't flush,Flush" textline " " bitfld.long 0x08 7. " [7] ,Flush endpoint receive buffer 7" "Don't flush,Flush" bitfld.long 0x08 6. " [6] ,Flush endpoint receive buffer 6" "Don't flush,Flush" bitfld.long 0x08 5. " [5] ,Flush endpoint receive buffer 5" "Don't flush,Flush" bitfld.long 0x08 4. " [4] ,Flush endpoint receive buffer 4" "Don't flush,Flush" textline " " bitfld.long 0x08 3. " [3] ,Flush endpoint receive buffer 3" "Don't flush,Flush" bitfld.long 0x08 2. " [2] ,Flush endpoint receive buffer 2" "Don't flush,Flush" bitfld.long 0x08 1. " [1] ,Flush endpoint receive buffer 1" "Don't flush,Flush" bitfld.long 0x08 0. " [0] ,Flush endpoint receive buffer 0" "Don't flush,Flush" rgroup.long 0x214++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTSTATUS_0,USB2D Endpoint Status Register" bitfld.long 0x00 31. " ETBR[15] ,Endpoint transmit buffer ready 15" "Not ready,Ready" bitfld.long 0x00 30. " [14] ,Endpoint transmit buffer ready 14" "Not ready,Ready" bitfld.long 0x00 29. " [13] ,Endpoint transmit buffer ready 13" "Not ready,Ready" bitfld.long 0x00 28. " [12] ,Endpoint transmit buffer ready 12" "Not ready,Ready" textline " " bitfld.long 0x00 27. " [11] ,Endpoint transmit buffer ready 11" "Not ready,Ready" bitfld.long 0x00 26. " [10] ,Endpoint transmit buffer ready 10" "Not ready,Ready" bitfld.long 0x00 25. " [9] ,Endpoint transmit buffer ready 9" "Not ready,Ready" bitfld.long 0x00 24. " [8] ,Endpoint transmit buffer ready 8" "Not ready,Ready" textline " " bitfld.long 0x00 23. " [7] ,Endpoint transmit buffer ready 7" "Not ready,Ready" bitfld.long 0x00 22. " [6] ,Endpoint transmit buffer ready 6" "Not ready,Ready" bitfld.long 0x00 21. " [5] ,Endpoint transmit buffer ready 5" "Not ready,Ready" bitfld.long 0x00 20. " [4] ,Endpoint transmit buffer ready 4" "Not ready,Ready" textline " " bitfld.long 0x00 19. " [3] ,Endpoint transmit buffer ready 3" "Not ready,Ready" bitfld.long 0x00 18. " [2] ,Endpoint transmit buffer ready 2" "Not ready,Ready" bitfld.long 0x00 17. " [1] ,Endpoint transmit buffer ready 1" "Not ready,Ready" bitfld.long 0x00 16. " [0] ,Endpoint transmit buffer ready 0" "Not ready,Ready" textline " " bitfld.long 0x00 15. " ERBR[15] ,Endpoint receive buffer ready 15" "Not ready,Ready" bitfld.long 0x00 14. " [14] ,Endpoint receive buffer ready 14" "Not ready,Ready" bitfld.long 0x00 13. " [13] ,Endpoint receive buffer ready 13" "Not ready,Ready" bitfld.long 0x00 12. " [12] ,Endpoint receive buffer ready 12" "Not ready,Ready" textline " " bitfld.long 0x00 11. " [11] ,Endpoint receive buffer ready 11" "Not ready,Ready" bitfld.long 0x00 10. " [10] ,Endpoint receive buffer ready 10" "Not ready,Ready" bitfld.long 0x00 9. " [9] ,Endpoint receive buffer ready 9" "Not ready,Ready" bitfld.long 0x00 8. " [8] ,Endpoint receive buffer ready 8" "Not ready,Ready" textline " " bitfld.long 0x00 7. " [7] ,Endpoint receive buffer ready 7" "Not ready,Ready" bitfld.long 0x00 6. " [6] ,Endpoint receive buffer ready 6" "Not ready,Ready" bitfld.long 0x00 5. " [5] ,Endpoint receive buffer ready 5" "Not ready,Ready" bitfld.long 0x00 4. " [4] ,Endpoint receive buffer ready 4" "Not ready,Ready" textline " " bitfld.long 0x00 3. " [3] ,Endpoint receive buffer ready 3" "Not ready,Ready" bitfld.long 0x00 2. " [2] ,Endpoint receive buffer ready 2" "Not ready,Ready" bitfld.long 0x00 1. " [1] ,Endpoint receive buffer ready 1" "Not ready,Ready" bitfld.long 0x00 0. " [0] ,Endpoint receive buffer ready 0" "Not ready,Ready" group.long 0x218++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCOMPLETE_0,USB2D Endpoint Complete Register" bitfld.long 0x00 31. " ETCE[15] ,Endpoint transmit buffer complete event 15" "Not completed,Completed" bitfld.long 0x00 30. " [14] ,Endpoint transmit buffer complete event 14" "Not completed,Completed" bitfld.long 0x00 29. " [13] ,Endpoint transmit buffer complete event 13" "Not completed,Completed" bitfld.long 0x00 28. " [12] ,Endpoint transmit buffer complete event 12" "Not completed,Completed" textline " " bitfld.long 0x00 27. " [11] ,Endpoint transmit buffer complete event 11" "Not completed,Completed" bitfld.long 0x00 26. " [10] ,Endpoint transmit buffer complete event 10" "Not completed,Completed" bitfld.long 0x00 25. " [9] ,Endpoint transmit buffer complete event 9" "Not completed,Completed" bitfld.long 0x00 24. " [8] ,Endpoint transmit buffer complete event 8" "Not completed,Completed" textline " " bitfld.long 0x00 23. " [7] ,Endpoint transmit buffer complete event 7" "Not completed,Completed" bitfld.long 0x00 22. " [6] ,Endpoint transmit buffer complete event 6" "Not completed,Completed" bitfld.long 0x00 21. " [5] ,Endpoint transmit buffer complete event 5" "Not completed,Completed" bitfld.long 0x00 20. " [4] ,Endpoint transmit buffer complete event 4" "Not completed,Completed" textline " " bitfld.long 0x00 19. " [3] ,Endpoint transmit buffer complete event 3" "Not completed,Completed" bitfld.long 0x00 18. " [2] ,Endpoint transmit buffer complete event 2" "Not completed,Completed" bitfld.long 0x00 17. " [1] ,Endpoint transmit buffer complete event 1" "Not completed,Completed" bitfld.long 0x00 16. " [0] ,Endpoint transmit buffer complete event 0" "Not completed,Completed" textline " " bitfld.long 0x00 15. " ERCE[15] ,Endpoint receive buffer complete event 15" "Not completed,Completed" bitfld.long 0x00 14. " [14] ,Endpoint receive buffer complete event 14" "Not completed,Completed" bitfld.long 0x00 13. " [13] ,Endpoint receive buffer complete event 13" "Not completed,Completed" bitfld.long 0x00 12. " [12] ,Endpoint receive buffer complete event 12" "Not completed,Completed" textline " " bitfld.long 0x00 11. " [11] ,Endpoint receive buffer complete event 11" "Not completed,Completed" bitfld.long 0x00 10. " [10] ,Endpoint receive buffer complete event 10" "Not completed,Completed" bitfld.long 0x00 9. " [9] ,Endpoint receive buffer complete event 9" "Not completed,Completed" bitfld.long 0x00 8. " [8] ,Endpoint receive buffer complete event 8" "Not completed,Completed" textline " " bitfld.long 0x00 7. " [7] ,Endpoint receive buffer complete event 7" "Not completed,Completed" bitfld.long 0x00 6. " [6] ,Endpoint receive buffer complete event 6" "Not completed,Completed" bitfld.long 0x00 5. " [5] ,Endpoint receive buffer complete event 5" "Not completed,Completed" bitfld.long 0x00 4. " [4] ,Endpoint receive buffer complete event 4" "Not completed,Completed" textline " " bitfld.long 0x00 3. " [3] ,Endpoint receive buffer complete event 3" "Not completed,Completed" bitfld.long 0x00 2. " [2] ,Endpoint receive buffer complete event 2" "Not completed,Completed" bitfld.long 0x00 1. " [1] ,Endpoint receive buffer complete event 1" "Not completed,Completed" bitfld.long 0x00 0. " [0] ,Endpoint receive buffer complete event 0" "Not completed,Completed" else hgroup.long 0x208++0x13 hide.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTSETUPSTAT_0,USB2D Endpoint Setup Status Register" textline " " textline " " textline " " textline " " textline " " textline " " hide.long 0x04 "USB2_CONTROLLER_1_USB2D_ENDPTPRIME_0,USB2D Endpoint Initialization Register" textline " " textline " " textline " " textline " " textline " " textline " " textline " " hide.long 0x08 "USB2_CONTROLLER_1_USB2D_ENDPTFLUSH_0,USB2D Endpoint De-Initialization Register" textline " " textline " " textline " " textline " " textline " " textline " " textline " " hide.long 0x0C "USB2_CONTROLLER_1_USB2D_ENDPTSTATUS_0,USB2D Endpoint Status Register" textline " " textline " " textline " " textline " " textline " " textline " " textline " " hide.long 0x10 "USB2_CONTROLLER_1_USB2D_ENDPTCOMPLETE_0,USB2D Endpoint Complete Register" endif tree.end tree "Endpoint Control" width 39. rgroup.long 0x21C++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL0_0,USB2D Endpoint Control 0 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" group.long 0x220++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL1_0,USB2D Endpoint Control 1 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x224++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL2_0,USB2D Endpoint Control 2 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x228++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL3_0,USB2D Endpoint Control 3 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x22C++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL4_0,USB2D Endpoint Control 4 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x230++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL5_0,USB2D Endpoint Control 5 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x234++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL6_0,USB2D Endpoint Control 6 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x238++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL7_0,USB2D Endpoint Control 7 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x23C++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL8_0,USB2D Endpoint Control 8 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x240++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL9_0,USB2D Endpoint Control 9 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x244++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL10_0,USB2D Endpoint Control 10 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x248++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL11_0,USB2D Endpoint Control 11 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x24C++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL12_0,USB2D Endpoint Control 12 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x250++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL13_0,USB2D Endpoint Control 13 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x254++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL14_0,USB2D Endpoint Control 14 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " group.long 0x258++0x03 line.long 0x00 "USB2_CONTROLLER_1_USB2D_ENDPTCTRL15_0,USB2D Endpoint Control 15 Register" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" bitfld.long 0x00 21. " TXI ,TX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "EP_OK,EP_STALL" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" bitfld.long 0x00 5. " RXI ,RX data toggle inhibit" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "CTRL,ISO,BULK,INTR" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "EP_OK,EP_STALL" textline " " tree.end tree.end tree "USB 2 Controller Interface" width 28. sif (cpu()=="TEGRAX1") if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ULPI_PADS_CLKEN_RESET ,Async reset for the synchronizers" "Disabled,Enabled" bitfld.long 0x00 23. " ULPI_PADS_RESET ,Async reset for trimmers and line state logic" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ULPIS2S_LINE_RESET ,Async reset of the line simulator logic" "Disabled,Enabled" bitfld.long 0x00 21. " ULPIS2S_SLV1_RESET ,Async reset of the SLV1 ULPI logic" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ULPIS2S_SLV0_RESET ,Async reset of the SLV0 ULPI logic" "Disabled,Enabled" bitfld.long 0x00 19. " UHSIC_PHY_ENB ,Enable UHSIC PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. " UHSIC_RESET ,Reset going to UHSIC PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ULPI_PHY_ENB ,Enable ULPI PHY mode" "Disabled,Enabled" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset going to UTMIP PHY" "Disabled,Enabled" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Unset,Set" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Unset,Set" textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 4. " USB_WAKE_ON_DISCON_EN_DEV ,Wake on disconnect" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " USB_WAKE_ON_CNNT_EN_DEV ,Wake on connect" "Disabled,Enabled" bitfld.long 0x00 2. " USB_WAKE_ON_RESUME_EN ,Wake on resume" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "Unset,Set" elif (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 26. " FAST_WAKEUP_RESP ,Enable fast response from UTMIP PHY for a remote wakeup request from device" "Disabled,Enabled" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ULPI_PADS_CLKEN_RESET ,Async reset for the synchronizers" "Disabled,Enabled" bitfld.long 0x00 23. " ULPI_PADS_RESET ,Async reset for trimmers and line state logic" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ULPIS2S_LINE_RESET ,Async reset of the line simulator logic" "Disabled,Enabled" bitfld.long 0x00 21. " ULPIS2S_SLV1_RESET ,Async reset of the SLV1 ULPI logic" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ULPIS2S_SLV0_RESET ,Async reset of the SLV0 ULPI logic" "Disabled,Enabled" bitfld.long 0x00 19. " UHSIC_PHY_ENB ,Enable UHSIC PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. " UHSIC_RESET ,Reset going to UHSIC PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ULPI_PHY_ENB ,Enable ULPI PHY mode" "Disabled,Enabled" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset going to UTMIP PHY" "Disabled,Enabled" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Unset,Set" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Unset,Set" textline " " textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 2. " USB_WAKE_ON_RESUME_EN ,Wake on resume" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "Unset,Set" else group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 26. " FAST_WAKEUP_RESP ,Enable fast response from UTMIP PHY for a remote wakeup request from device" "Disabled,Enabled" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ULPI_PADS_CLKEN_RESET ,Async reset for the synchronizers" "Disabled,Enabled" bitfld.long 0x00 23. " ULPI_PADS_RESET ,Async reset for trimmers and line state logic" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ULPIS2S_LINE_RESET ,Async reset of the line simulator logic" "Disabled,Enabled" bitfld.long 0x00 21. " ULPIS2S_SLV1_RESET ,Async reset of the SLV1 ULPI logic" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ULPIS2S_SLV0_RESET ,Async reset of the SLV0 ULPI logic" "Disabled,Enabled" bitfld.long 0x00 19. " UHSIC_PHY_ENB ,Enable UHSIC PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. " UHSIC_RESET ,Reset going to UHSIC PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ULPI_PHY_ENB ,Enable ULPI PHY mode" "Disabled,Enabled" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset going to UTMIP PHY" "Disabled,Enabled" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Unset,Set" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Unset,Set" textline " " textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 2. " USB_WAKE_ON_RESUME_EN ,Wake on resume" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "Unset,Set" endif else if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x02) group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 26. " FAST_WAKEUP_REST ,Enable fast response from UTMIP PHY for a remote wakeup request from device" "Disabled,Enabled" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ULPI_PADS_CLKEN_RESET ,Async reset for the synchronizers" "Disabled,Enabled" bitfld.long 0x00 23. " ULPI_PADS_RESET ,Async reset for trimmers and line state logic" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ULPIS2S_LINE_RESET ,Async reset of the line simulator logic" "Disabled,Enabled" bitfld.long 0x00 21. " ULPIS2S_SLV1_RESET ,Async reset of the SLV1 ULPI logic" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ULPIS2S_SLV0_RESET ,Async reset of the SLV0 ULPI logic" "Disabled,Enabled" bitfld.long 0x00 19. " UHSIC_PHY_ENB ,Enable UHSIC PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. " UHSIC_RESET ,Reset going to UHSIC PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ULPI_PHY_ENB ,Enable ULPI PHY mode" "Disabled,Enabled" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset going to UTMIP PHY" "Disabled,Enabled" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Unset,Set" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Unset,Set" textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 4. " USB_WAKE_ON_DISCON_EN_DEV ,Wake on disconnect" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " USB_WAKE_ON_CNNT_EN_DEV ,Wake on connect" "Disabled,Enabled" bitfld.long 0x00 2. " USB_WAKE_ON_RESUME_EN ,Wake on resume" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "Unset,Set" else group.long 0x400++0x03 line.long 0x00 "USB1_IF_USB_SUSP_CTRL_0,USB suspend control register" bitfld.long 0x00 26. " FAST_WAKEUP_REST ,Enable fast response from UTMIP PHY for a remote wakeup request from device" "Disabled,Enabled" bitfld.long 0x00 25. " UTMIP_SUSPL1_SET ,Enable SuspendL1 for UTMIP PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ULPI_PADS_CLKEN_RESET ,Async reset for the synchronizers" "Disabled,Enabled" bitfld.long 0x00 23. " ULPI_PADS_RESET ,Async reset for trimmers and line state logic" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ULPIS2S_LINE_RESET ,Async reset of the line simulator logic" "Disabled,Enabled" bitfld.long 0x00 21. " ULPIS2S_SLV1_RESET ,Async reset of the SLV1 ULPI logic" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " ULPIS2S_SLV0_RESET ,Async reset of the SLV0 ULPI logic" "Disabled,Enabled" bitfld.long 0x00 19. " UHSIC_PHY_ENB ,Enable UHSIC PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--18. " USB_WAKEUP_DEBOUNCE_COUNT ,USB PHY wakeup debounce counter" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. " UHSIC_RESET ,Reset going to UHSIC PHY" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ULPI_PHY_ENB ,Enable ULPI PHY mode" "Disabled,Enabled" bitfld.long 0x00 12. " UTMIP_PHY_ENB ,Enable UTMIP PHY mode" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " UTMIP_RESET ,Reset going to UTMIP PHY" "Disabled,Enabled" bitfld.long 0x00 10. " USB_SUSUP_POL ,Polarity of the suspend signal going to USB PHY" "Active low,Active high" textline " " bitfld.long 0x00 9. " USB_PHY_CLK_VALID_INT_ENB ,USB PHY clock valid interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 8. " USB_PHY_CLK_VALID_INT_STS ,USB PHY clock valid interrupt status" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " USB_PHY_CLK_VALID ,USB PHY clock valid status" "Unset,Set" rbitfld.long 0x00 6. " USB_CLKEN ,USB AHB clock enable status" "Unset,Set" textline " " bitfld.long 0x00 5. " USB_SUSP_CLR ,PHY suspend mode control" "Suspended,Not suspended" bitfld.long 0x00 2. " USB_WAKE_ON_RESUME_EN ,Wake on resume" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " USB_WAKEUP_INT_ENB ,USB wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 0. " USB_WAKEUP_INT_STS ,USB wakeup interrupt status" "Unset,Set" endif endif textline " " width 34. sif (cpu()=="TEGRAX1") else group.long 0x404++0x07 line.long 0x00 "USB1_IF_USB_PHY_VBUS_SENSORS_0,USB PHY VBUS SENSORS control register" bitfld.long 0x00 30. " A_VBUS_VLD_WAKEUP_EN ,A_VBUS_VLD wakeup enable" "Disabled,Enabled" bitfld.long 0x00 29. " A_VBUS_VLD_DEB_SEL_B ,A_VBUS_VLD debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 28. " A_VBUS_VLD_SW_VALUE ,A_VBUS_VLD software value (software enabled)" "Low,High" textline " " bitfld.long 0x00 27. " A_VBUS_VLD_SW_EN ,A_VBUS_VLD software enable" "Disabled,Enabled" rbitfld.long 0x00 26. " A_VBUS_VLD_STS ,A_VBUS_VLD status" "Low,High" rbitfld.long 0x00 25. " A_VBUS_VLD_CHG_DET ,A_VBUS_VLD change detect" "Not detected,Detected" textline " " bitfld.long 0x00 24. " A_VBUS_VLD_INT_EN ,A_VBUS_VLD interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22. " A_SESS_VLD_WAKEUP_EN ,A_SESS_VLD wakeup enable" "Disabled,Enabled" bitfld.long 0x00 21. " A_SESS_VLD_DEB_SEL_B ,A_SESS_VLD debounce A/B select" "SEL_A,SEL_B" textline " " bitfld.long 0x00 20. " A_SESS_VLD_SW_VALUE ,A_SESS_VLD software value (software enabled)" "Low,High" bitfld.long 0x00 19. " A_SESS_VLD_SW_EN ,A_SESS_VLD software enable" "Disabled,Enabled" rbitfld.long 0x00 18. " A_SESS_VLD_STS ,A_SESS_VLD status" "Low,High" textline " " rbitfld.long 0x00 17. " A_SESS_VLD_CHG_DET ,A_SESS_VLD change detect" "Not detected,Detected" bitfld.long 0x00 16. " A_SESS_VLD_INT_EN ,A_SESS_VLD interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " B_SESS_VLD_WAKEUP_EN ,B_SESS_VLD wakeup enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " B_SESS_VLD_DEB_SEL_B ,B_SESS_VLD debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 12. " B_SESS_VLD_SW_VALUE ,B_SESS_VLD software value (software enabled)" "Low,High" bitfld.long 0x00 11. " B_SESS_VLD_SW_EN ,B_SESS_VLD software enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " B_SESS_VLD_STS ,B_SESS_VLD status" "Low,High" rbitfld.long 0x00 9. " B_SESS_VLD_CHG_DET ,B_SESS_VLD change detect" "Not detected,Detected" bitfld.long 0x00 8. " B_SESS_VLD_INT_EN ,B_SESS_VLD interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " B_SESS_END_WAKEUP_EN ,B_SESS_END wakeup enable" "Disabled,Enabled" bitfld.long 0x00 5. " B_SESS_END_DEB_SEL_B ,B_SESS_END debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x00 4. " B_SESS_END_SW_VALUE ,B_SESS_END software value (software enabled)" "Low,High" textline " " bitfld.long 0x00 3. " B_SESS_END_SW_EN ,B_SESS_END software enable" "Disabled,Enabled" rbitfld.long 0x00 2. " B_SESS_END_STS ,B_SESS_END status" "Low,High" rbitfld.long 0x00 1. " B_SESS_END_CHG_DET ,B_SESS_END change detect" "Not detected,Detected" textline " " bitfld.long 0x00 0. " B_SESS_END_INT_EN ,B_SESS_END interrupt enable" "Disabled,Enabled" line.long 0x04 "USB1_IF_USB_PHY_VBUS_WAKEUP_ID_0,USB PHY VBUS wakeup and ID control register" bitfld.long 0x04 30. " VBUS_WAKEUP_WAKEUP_EN ,VBUS_WAKEUP wakeup enable" "Disabled,Enabled" bitfld.long 0x04 29. " VDCD_DET_DEB_SEL_B ,VCDT_DET debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 28. " VDCD_DET_SW_VALUE ,VDCD_DET software value (software enabled)" "Low,High" textline " " bitfld.long 0x04 27. " VDCD_DET_SW_EN ,VDCD_DET software enable" "Disabled,Enabled" rbitfld.long 0x04 26. " VDCD_DET_STS ,VDCD_DET status" "Low,High" rbitfld.long 0x04 25. " VDCD_DET_CHG_DET ,VDCD_DET change detect" "Not detected,Detected" textline " " bitfld.long 0x04 24. " VDCD_DET_INT_EN ,VDCD_DET interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " VDAT_DET_DEB_SEL_B ,VDAT_DET debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 20. " VDAT_DET_SW_VALUE ,VDAT_DET software value (software enabled)" "Low,High" textline " " bitfld.long 0x04 19. " VDAT_DET_SW_EN ,VDAT_DET software enable" "Disabled,Enabled" rbitfld.long 0x04 18. " VDAT_DET_STS ,VDAT_DET status" "Low,High" rbitfld.long 0x04 17. " VDAT_DET_CHG_DET ,VDAT_DET change detect" "Not detected,Detected" textline " " bitfld.long 0x04 16. " VDAT_DET_INT_EN ,VDAT_DET interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " VBUS_WAKEUP_DEB_SEL_B ,VBUS_WAKEUP debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 12. " VBUS_WAKEUP_SW_VALUE ,VBUS wakeup software value (software enabled)" "Low,High" textline " " bitfld.long 0x04 11. " VBUS_WAKEUP_SW_EN ,VBUS wakeup software enable" "Disabled,Enabled" rbitfld.long 0x04 10. " VBUS_WAKEUP_STS ,VBUS wakeup status" "Low,High" rbitfld.long 0x04 9. " VBUS_WAKEUP_CHG_DET ,VBUS wakeup change detect" "Not detected,Detected" textline " " bitfld.long 0x04 8. " VBUS_WAKEUP_INT_EN ,VBUS wakeup interrupt enable" "Disabled,Enabled" rbitfld.long 0x04 7. " STATIC_GPI ,Static GPI status" "Unset,Set" bitfld.long 0x04 6. " ID_PU ,ID pullup enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " ID_DEB_SEL_B ,ID debounce A/B select" "SEL_A,SEL_B" bitfld.long 0x04 4. " ID_SW_VALUE ,ID software value (software enabled)" "Low,High" bitfld.long 0x04 3. " ID_SW_EN ,ID software enable" "Disabled,Enabled" textline " " rbitfld.long 0x04 2. " ID_STS ,ID status" "Low,High" rbitfld.long 0x04 1. " ID_CHG_DET ,ID change detect" "Not detected,Detected" bitfld.long 0x04 0. " ID_INT_EN ,ID interrupt enable" "Disabled,Enabled" rgroup.long 0x40C++0x03 line.long 0x00 "USB1_IF_USB_PHY_ALT_VBUS_STS_0,USB PHY Alternate VBUS status register" bitfld.long 0x00 8. " VDCD_DET_ALT ,VDCD_DET alternate status" "Low,High" bitfld.long 0x00 7. " VDAT_DET_ALT ,VDAT_DET alternate status" "Low,High" bitfld.long 0x00 6. " A_SESS_VLD_ALT ,A_SESS_VLD alternate status" "Low,High" textline " " bitfld.long 0x00 5. " B_SESS_VLD_ALT ,B_SESS_VLD alternate status" "Low,High" bitfld.long 0x00 4. " ID_DIG_ALT ,ID alternate status" "Low,High" bitfld.long 0x00 3. " B_SESS_END_ALT ,B_SESS_END alternate status" "Low,High" textline " " bitfld.long 0x00 2. " STATIC_GPI_ALT ,Static GPI alternate status" "Low,High" bitfld.long 0x00 1. " A_VBUS_VLD_ALT ,A_VBUS_VLD alternate status" "Low,High" bitfld.long 0x00 0. " VBUS_WAKEUP_ALT ,Vbus wakeup alternate status" "Low,High" endif textline " " width 31. group.long 0x418++0x07 line.long 0x00 "USB2_IF_USB_ULPIS2S_CTRL_0,ULPI NULL PHY control register" bitfld.long 0x00 20.--23. " ULPIS2S_CLAMP_LINE_DRIVE ,The line drive value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 17. " ULPIS2S_SLV1_CLAMP_XMIT ,When set to 1, the outputs of the SLV1 xmit statemachine are clamped to 0" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ULPIS2S_SLV0_CLAMP_XMIT ,When set to 1, the outputs of the SLV0 xmit statemachine are clamped to 0" "Disabled,Enabled" bitfld.long 0x00 15. " ULPIS2S_DISABLE_STP_PU ,The pullup on the STP pin active status settings" "No,Yes" textline " " bitfld.long 0x00 14. " ULPIS2S_SUPPORT_HS_KEEP_ALIVE ,When enabled, the PHY will support HS KeepAlive packets" "Disabled,Enabled" bitfld.long 0x00 13. " ULPIS2S_DISCON_DONT_CHECK_SE0 ,Disconnect detection logic will only check that that the other side is 'driving' tri-state" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ULPIS2S_FORCE_ULPI_CLK_OUT ,The external ULPI_CLOCK pad will always carry the internal 60MHz clock" "Disabled,Enabled" bitfld.long 0x00 3. " ULPIS2S_PLLU_MASTER_BLASTER60 ,When enabled, the PLLU 60MHz clock will be forced on" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ULPIS2S_SUPPORT_DISCONNECT ,When disabled, the PHY will never detect a Disconnect" "Disabled,Enabled" bitfld.long 0x00 1. " ULPIS2S_SLV1_FORCE_DEVICE ,Slave port host or device programming" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " ULPIS2S_ENA ,The ULPI link interface coming out of the usb2 controller enters a NULL phy with two slaves" "Disabled,Enabled" line.long 0x04 "USB2_IF_USB_ULPIS2S_SLV1_ID_0,Control product and vendor ID fields" hexmask.long.word 0x04 16.--31. 1. " ULPIS2S_SLV1_VENDOR_ID ,PHY vendor_id as seen by external ULPI master" hexmask.long.word 0x04 0.--15. 1. " ULPIS2S_SLV1_PRODUCT_ID ,PHY product_id as seen by external ULPI master" textline " " width 36. if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) sif (cpu()=="TEGRAX1") group.long 0x420++0x03 line.long 0x00 "USB1_IF_USB_INTER_PKT_DELAY_CTRL_0,Inter packet delay control" hexmask.long.byte 0x00 0.--6. 1. " IP_DELAY_TX2TX_HS ,HS Tx to Tx inter-packet delay" else group.long 0x420++0x03 line.long 0x00 "USB1_IF_USB_INTER_PKT_DELAY_CTRL_0,Inter packet delay control" bitfld.long 0x00 0.--5. " IP_DELAY_TX2TX_HS ,HS Tx to Tx inter-packet delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif else hgroup.long 0x420++0x03 hide.long 0x00 "USB1_IF_USB_INTER_PKT_DELAY_CTRL_0,Inter packet delay control" endif if (((per.l(ad:0x7D004000+0x1F8))&0x03)==0x03) group.long 0x490++0x03 line.long 0x00 "USB1_IF_USB_RSM_DLY_0,USB Controller Resume Signalling Delay" hexmask.long.word 0x00 0.--15. 1. " TIME_TO_RESUME ,Send the resume back in no. of 60 MHz cycles" else hgroup.long 0x490++0x03 hide.long 0x00 "USB1_IF_USB_RSM_DLY_0,USB Controller Resume Signalling Delay" endif group.long 0x498++0x03 line.long 0x00 "USB1_IF_SPARE_0,ICUSB PADCTLS Spare Register" hexmask.long.word 0x00 16.--31. 1. " SPARE_HI ,Spare register bits" hexmask.long.word 0x00 0.--15. 1. " SPARE_LO ,Spare register bits" textline " " sif (cpu()=="TEGRAX1") width 29. group.long 0x49C++0x03 line.long 0x00 "USB2_IF_ULPI_DIR_OVERRIDE_0,ULPI Override" bitfld.long 0x00 0. " ULPI_DIR_OVERRIDE ,ULPI_DIR override" "0,1" group.long 0x4C0++0x03 line.long 0x00 "USB1_IF_USB2_NEW_CONTROL_0,USB Coherency and Memory Alignment Controls" hexmask.long.byte 0x00 8.--15. 1. " REQUEST_EXPIRY_COUNTER ,Time to wait for coalescing the request" bitfld.long 0x00 1. " MEM_ALIGNMENT_MUX_EN ,DMA request generation mechanism mux enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " COHERENCY_EN , Enable fence mechanism" "Disabled,Enabled" endif tree.end sif (cpu()=="TEGRAX1") tree "UHSIC Configuration Registers" width 30. rgroup.long 0xC30++0x03 line.long 0x00 "USB2_UHSIC_MISC_STS0_0,UHSIC SPARE Fuse Value" bitfld.long 0x00 0. " UHSIC_TX_HS_VLD ,Indicates when the controller is driving on the bus" "0,1" group.long 0xC34++0x03 line.long 0x00 "USB2_UHSIC_PMC_WAKEUP0_0,UHSIC PMC Wakeup Value" rbitfld.long 0x00 1. " UHSIC_LINE_WAKEUP_EVENT_INT_STS ,Indicates the status of the PMC wakeup event" "0,1" bitfld.long 0x00 0. " UHSIC_LINE_WAKEUP_EVENT_INT_ENB ,Interrupt mask for the PMC wakeup event" "0,1" rgroup.long 0xC38++0x03 line.long 0x00 "USB2_UHSIC_UHSIC_PAD_TERM_0,UHSIC terminations" bitfld.long 0x00 0.--4. " UHSIC_RTERM ,UHSIC_RTERM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree "Endpoint Queue Head" width 30. group.long 0x1000++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_0_OUT_0,USB2D Queue Head for OUT endpoint 0" group.long (0x1000+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_0_IN_0,USB2D Queue Head for IN endpoint 0" group.long 0x1080++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_1_OUT_0,USB2D Queue Head for OUT endpoint 1" group.long (0x1080+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_1_IN_0,USB2D Queue Head for IN endpoint 1" group.long 0x1100++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_2_OUT_0,USB2D Queue Head for OUT endpoint 2" group.long (0x1100+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_2_IN_0,USB2D Queue Head for IN endpoint 2" group.long 0x1180++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_3_OUT_0,USB2D Queue Head for OUT endpoint 3" group.long (0x1180+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_3_IN_0,USB2D Queue Head for IN endpoint 3" group.long 0x1200++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_4_OUT_0,USB2D Queue Head for OUT endpoint 4" group.long (0x1200+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_4_IN_0,USB2D Queue Head for IN endpoint 4" group.long 0x1280++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_5_OUT_0,USB2D Queue Head for OUT endpoint 5" group.long (0x1280+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_5_IN_0,USB2D Queue Head for IN endpoint 5" group.long 0x1300++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_6_OUT_0,USB2D Queue Head for OUT endpoint 6" group.long (0x1300+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_6_IN_0,USB2D Queue Head for IN endpoint 6" group.long 0x1380++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_7_OUT_0,USB2D Queue Head for OUT endpoint 7" group.long (0x1380+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_7_IN_0,USB2D Queue Head for IN endpoint 7" group.long 0x1400++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_8_OUT_0,USB2D Queue Head for OUT endpoint 8" group.long (0x1400+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_8_IN_0,USB2D Queue Head for IN endpoint 8" group.long 0x1480++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_9_OUT_0,USB2D Queue Head for OUT endpoint 9" group.long (0x1480+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_9_IN_0,USB2D Queue Head for IN endpoint 9" group.long 0x1500++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_10_OUT_0,USB2D Queue Head for OUT endpoint 10" group.long (0x1500+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_10_IN_0,USB2D Queue Head for IN endpoint 10" group.long 0x1580++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_11_OUT_0,USB2D Queue Head for OUT endpoint 11" group.long (0x1580+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_11_IN_0,USB2D Queue Head for IN endpoint 11" group.long 0x1600++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_12_OUT_0,USB2D Queue Head for OUT endpoint 12" group.long (0x1600+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_12_IN_0,USB2D Queue Head for IN endpoint 12" group.long 0x1680++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_13_OUT_0,USB2D Queue Head for OUT endpoint 13" group.long (0x1680+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_13_IN_0,USB2D Queue Head for IN endpoint 13" group.long 0x1700++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_14_OUT_0,USB2D Queue Head for OUT endpoint 14" group.long (0x1700+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_14_IN_0,USB2D Queue Head for IN endpoint 14" group.long 0x1780++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_15_OUT_0,USB2D Queue Head for OUT endpoint 15" group.long (0x1780+0x40)++0x03 line.long 0x00 "USB2_QH_USB2D_QH_EP_15_IN_0,USB2D Queue Head for IN endpoint 15" tree.end tree.end else tree "USB 2 UTMIP Configuration" width 28. group.long 0x808++0x37 line.long 0x00 "USB1_UTMIP_XCVR_CFG0_0,UTMIP transceiver cell configuration register 0" hexmask.long.byte 0x00 25.--31. 1. " UTMIP_XCVR_HSSLEW_MSB ,Most significant bits of HS_SLEW" bitfld.long 0x00 22.--24. " UTMIP_XCVR_SETUP_MSB ,Most significant bits of SETUP" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 21. " UTMIP_XCVR_LSBIAS_SEL ,Low speed bias selection method for usb transceiver pad" "0,1" bitfld.long 0x00 20. " UTMIP_XCVR_DISCON_METHOD ,Disconnect method on the usb transceiver pad" "0,1" textline " " bitfld.long 0x00 19. " UTMIP_FORCE_PDZI_POWERUP ,Force PDZI input into power up" "Disabled,Enabled" bitfld.long 0x00 18. " UTMIP_FORCE_PDZI_POWERDOWN ,Force PDZI input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " UTMIP_FORCE_PD2_POWERUP ,Force PD2 input into power up" "Disabled,Enabled" bitfld.long 0x00 16. " UTMIP_FORCE_PD2_POWERDOWN ,Force PD2 input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " UTMIP_FORCE_PD_POWERUP ,Force PD input into power up." "Disabled,Enabled" bitfld.long 0x00 14. " UTMIP_FORCE_PD_POWERDOWN ,Force PD input into power down" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UTMIP_XCVR_TERMEN ,Enable HS termination" "Disabled,Enabled" bitfld.long 0x00 12. " UTMIP_XCVR_HSLOOPBACK ,Internal loopback inside XCVR cell" "0,1" textline " " bitfld.long 0x00 10.--11. " UTMIP_XCVR_LSFSLEW ,LS falling slew rate control" "0,1,2,3" bitfld.long 0x00 8.--9. " UTMIP_XCVR_LSRSLEW ,LS rising slew rate control" "0,1,2,3" textline " " bitfld.long 0x00 6.--7. " UTMIP_XCVR_FSSLEW ,FS slew rate control" "0,1,2,3" bitfld.long 0x00 4.--5. " UTMIP_XCVR_HSSLEW ,HS slew rate control" "0,1,2,3" textline " " bitfld.long 0x00 0.--3. " UTMIP_XCVR_SETUP ,SETUP[3:0] input of XCVR cell" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "USB1_UTMIP_BIAS_CFG0_0,UTMIP Bias cell configuration register 0" bitfld.long 0x04 24. " UTMIP_HSDISCON_LEVEL_MSB ,Most significant bit of UTMIP_HSDISCON_LEVEL" "0,1" bitfld.long 0x04 23. " UTMIP_IDPD_VAL ,IDPD value" "0,1" textline " " bitfld.long 0x04 21. " UTMIP_IDDIG_SEL ,IDDIG value" "0,1" bitfld.long 0x04 20. " UTMIP_IDDIG_SEL ,IDDIG select" "IdDig,IDDIG_VAL" textline " " bitfld.long 0x04 19. " UTMIP_GPI_VAL ,GPI value" "0,1" bitfld.long 0x04 18. " UTMIP_GPI_SEL ,GPI select" "IdDig,GPI_VAL" textline " " bitfld.long 0x04 15.--17. " UTMIP_ACTIVE_TERM_OFFSET ,Active termination control offset" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " UTMIP_ACTIVE_PULLUP_OFFSET ,Active 1.5K pullup control offset" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 11. " UTMIP_OTGPD ,Power down OTG circuit" "Disabled,Enabled" bitfld.long 0x04 10. " UTMIP_BIASPD ,Power down bias circuit" "Disabled,Enabled" textline " " bitfld.long 0x04 8.--9. " UTMIP_VBUS_LEVEL_LEVEL ,Vbus detector level" "0,1,2,3" bitfld.long 0x04 6.--7. " UTMIP_SESS_LEVEL_LEVEL ,SessionEnd detector level" "0,1,2,3" textline " " bitfld.long 0x04 4.--5. " UTMIP_HSCHIRP_LEVEL ,HS chirp detector level" "0,1,2,3" bitfld.long 0x04 2.--3. " UTMIP_HSDISCON_LEVEL ,HS disconnect detector level" "0,1,2,3" textline " " bitfld.long 0x04 0.--1. " UTMIP_HSSQUELCH_LEVEL ,HS squelch detector level" "0,1,2,3" line.long 0x08 "USB1_UTMIP_HSRX_CFG0_0,UTMIP High speed receive config 0" bitfld.long 0x08 30.--31. " UTMIP_KEEP_PATT_ON_ACTIVE ,Keep the stay alive pattern on active" "0,1,2,3" bitfld.long 0x08 29. " UTMIP_ALLOW_CONSEC_UPDN ,Allow consecutive ups and downs on the bits" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " UTMIP_REALIGN_ON_NEW_PKT ,Realign the inertia counters on a new packet" "Disabled,Enabled" bitfld.long 0x08 24.--27. " UTMIP_PCOUNT_UPDN_DIV ,The number of (edges-1) needed to move the sampling point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 21.--23. " UTMIP_SQUELCH_EOP_DLY ,Limit the delay of the squelch at EOP time" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20. " UTMIP_NO_STRIPPING ,Do not strip incoming data" "Disabled,Enabled" textline " " bitfld.long 0x08 15.--19. " UTMIP_IDLE_WAIT ,Number of cycles of idle to declare IDLE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 10.--14. " UTMIP_ELASTIC_LIMIT ,Depth of elastic input store" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 9. " UTMIP_ELASTIC_OVERRUN_DISABLE ,Do not declare overrun errors until overflow of FIFO" "Disabled,Enabled" bitfld.long 0x08 8. " UTMIP_ELASTIC_UNDERRUN_DISABLE ,Do not declare underrun errors" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " UTMIP_PASS_CHIRP ,When in Chirp Mode, allow chirp rx data through" "Disabled,Enabled" bitfld.long 0x08 6. " UTMIP_PASS_FEEDBACK ,Pass through the feedback, do not block it" "No,Yes" textline " " bitfld.long 0x08 4.--5. " UTMIP_PCOUNT_INERTIA ,Retime the path" "0,1,2,3" bitfld.long 0x08 2.--3. " UTMIP_PHASE_ADJUST ,Based on incoming edges and current sampling position phase adjust" "0,1,2,3" textline " " bitfld.long 0x08 1. " UTMIP_THREE_SYNCBITS ,Sync pattern detection needs 3 consecutive samples instead of 4" "No,Yes" bitfld.long 0x08 0. " UTMIP_USE4SYNC_TRAN ,Require 4 sync pattern transitions (01) instead of 3" "No,Yes" line.long 0x0C "USB1_UTMIP_HSRX_CFG1_0,UTMIP High speed receive config 1" bitfld.long 0x0C 1.--5. " UTMIP_HS_SYNC_START_DLY ,How long to wait before start of sync launches RxActive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0. " UTMIP_HS_ALLOW_KEEP_ALIVE ,Allow Keep Alive packets" "Disabled,Enabled" line.long 0x10 "USB1_UTMIP_FSLSRX_CFG0_0,UTMIP full and Low speed receive config 0" bitfld.long 0x10 31. " UTMIP_FSLS_SE1_DRIBBLE_FILTER ,Don't allow dribble" "Disabled,Enabled" bitfld.long 0x10 30. " UTMIP_FSLS_SE1_FILTER ,Filter SE1" "0,1" textline " " bitfld.long 0x10 29. " UTMIP_FSLS_SERIAL_SE0_RCV ,UTMIP_FSLS_SERIAL_SE0_RCV" "0,1" bitfld.long 0x10 26.--28. " UTMIP_FSLS_UPR_DRIBBLE_SIZE ,Do not allow <= dribble bits" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 23.--25. " UTMIP_FSLS_LWR_DRIBBLE_SIZE ,Do not allow >= dribble bits" "0,1,2,3,4,5,6,7" bitfld.long 0x10 22. " UTMIP_FSLS_EOP_ENDS_AT_SE0 ,Only look for transitioning out of EOP" "No,Yes" textline " " bitfld.long 0x10 16.--21. " UTMIP_FSLS_KCOUNT_MAX ,Number of K bits in question" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 15. " UTMIP_FSLS_KCOUNT_LIMIT ,Limit the number of bit times a K can last" "No,Yes" textline " " bitfld.long 0x10 14. " UTMIP_FSLS_ACTIVE_ON_FULL_SYNC ,Require a full sync pattern to declare the data received" "No,Yes" bitfld.long 0x10 8.--13. " UTMIP_FSLS_IDLE_WAIT_MAX ,IDLE wait max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 7. " UTMIP_FSLS_IDLE_WAIT_LIMIT ,Enable the reset of the state machine on extended SE0" "Disabled,Enabled" bitfld.long 0x10 1.--6. " UTMIP_FSLS_IDLE_COUNT_MAX ,Idle count max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 0. " UTMIP_FSLS_IDLE_COUNT_LIMIT ,Give up on packet if a long sequence of J" "No,Yes" line.long 0x14 "USB1_UTMIP_FSLSRX_CFG1_0,UTMIP full and Low speed receive config 1" bitfld.long 0x14 26. " UTMIP_EARLY_LINE_STATE_FILTER ,Assumes line state filtering table is inclusive" "No,Yes" bitfld.long 0x14 23.--25. " UTMIP_LS_BOUNCE_LENGTH ,Number of clock cycle of LS stable" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 17.--22. " UTMIP_LS_EXTRACTION_COUNT ,Phase count on which LS bits are extracted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 11.--16. " UTMIP_LS_EOP_START_COUNT ,Number of SEO clock cycles to block bit extraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 5.--10. " UTMIP_LS_SE0_COUNT ,Only for this number of 60MHz of SEO and Idle to end packet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 4. " UTMIP_LS_LENIENT_DRIBBLE ,Allow for large dribble in low speed mode" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " UTMIP_FS_LENIENT_DRIBBLE ,Allow for large dribble in full speed mode" "Disabled,Enabled" bitfld.long 0x14 2. " UTMIP_FS_WEAK_SYNC ,Only look for a KK pattern instead of KJKK" "No,Yes" textline " " bitfld.long 0x14 1. " UTMIP_FS_DEBOUNCE ,Whether full speed uses debouncing" "No,Yes" bitfld.long 0x14 0. " UTMIP_FS_EOP_LENGTH ,Whether full speed EOP is determined within 3(0) or 4(1) 60MHz cycles" "3 cycles,4 cycles" line.long 0x18 "USB1_UTMIP_TX_CFG0_0,UTMIP transmit config signals" bitfld.long 0x18 19. " UTMIP_FS_PREAMBLE_J ,Output enable sends an initial J before sync pattern" "Disabled,Enabled" bitfld.long 0x18 18. " UTMIP_FS_POSTAMBLE_OUTPUT_ENABLE ,Output enable turns off 1/2 cycle after" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " UTMIP_FS_PREAMBLE_OUTPUT_ENABLE ,Output enable turns on 1/2 cycle before" "Disabled,Enabled" bitfld.long 0x18 16. " UTMIP_FSLS_ALLOW_SOP_TX_STUFF_ERR ,Allow SOP to be source of transmit error stuffing" "Disabled,Enabled" textline " " bitfld.long 0x18 15. " UTMIP_HS_READY_WAIT_FOR_VALID ,UTMIP_HS_READY_WAIT_FOR_VALID" "0,1" bitfld.long 0x18 10.--14. " UTMIP_HS_TX_IPG_DLY ,UTMIP_HS_TX_IPG_DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 9. " UTMIP_HS_DISCON_EOP_ONLY ,Only check during EOP" "No,Yes" bitfld.long 0x18 8. " UTMIP_HS_DISCON_DISABLE ,Disable high speed disconnect" "Enabled,Disabled" textline " " bitfld.long 0x18 7. " UTMIP_HS_POSTAMBLE_OUTPUT_ENABLE ,Output enable turns off 1 cycle after" "Disabled,Enabled" bitfld.long 0x18 6. " UTMIP_HS_PREAMBLE_OUTPUT_ENABLE ,Output enable turns on 1 cycle before" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " UTMIP_SIE_RESUME_ON_LINESTATE ,SIE (not macrocell) detects LineState change to resume" "No,Yes" bitfld.long 0x18 4. " UTMIP_SOF_ON_NO_STUFF ,Sof when OpMode 3 -- perhaps, when sending controller made packets" "0,1" textline " " bitfld.long 0x18 3. " UTMIP_SOF_ON_NO_ENCODE ,Sof when OpMode 2 -- not likely, for Chirp" "0,1" bitfld.long 0x18 2. " UTMIP_NO_STUFFING ,No bit stuffing, static programming" "0,1" textline " " bitfld.long 0x18 1. " UTMIP_NO_ENCODING ,No encoding, static programming" "0,1" bitfld.long 0x18 0. " UTMIP_NO_SYNC_NO_EOP ,Do not sent SYNC or EOP" "Disabled,Enabled" line.long 0x1C "USB1_UTMIP_MISC_CFG0_0,UTMIP miscellaneous configurations" bitfld.long 0x1C 27.--30. " UTMIP_DPDM_OBSERVE_SEL ,Select DP/DM obs signals" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 26. " UTMIP_DPDM_OBSERVE ,Use DP/DM as obs bus" "0,1" textline " " bitfld.long 0x1C 25. " UTMIP_KEEP_XCVR_PD_ON_SOFT_DISCON ,UTMIP_KEEP_XCVR_PD_ON_SOFT_DISCON" "0,1" bitfld.long 0x1C 24. " UTMIP_ALLOW_LS_ON_SOFT_DISCON ,UTMIP_ALLOW_LS_ON_SOFT_DISCON" "0,1" textline " " bitfld.long 0x1C 23. " UTMIP_FORCE_FS_DISABLE_ON_DEV_CHIRP ,UTMIP_FORCE_FS_DISABLE_ON_DEV_CHIRP" "0,1" bitfld.long 0x1C 22. " UTMIP_SUSPEND_EXIT_ON_EDGE ,Suspend exit requires edge or simply a value" "0,1" textline " " bitfld.long 0x1C 21. " UTMIP_LS_TO_FS_SKIP_4MS ,Don't block changes for 4ms when going from LS to FS" "0,1" bitfld.long 0x1C 19.--20. " UTMIP_INJECT_ERROR_TYPE ,Force error insertion into RX path" "Disabled,BIT_ERR,RX_ERR,BIT_RX_ERR" textline " " bitfld.long 0x1C 18. " UTMIP_FORCE_HS_CLOCK_ON ,Force HS clock always on" "Disabled,Enabled" bitfld.long 0x1C 17. " UTMIP_DISABLE_HS_TERM ,Force HS termination inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 16. " UTMIP_FORCE_HS_TERM ,Force HS termination active" "Disabled,Enabled" bitfld.long 0x1C 15. " UTMIP_DISABLE_PULLUP_DP ,Force DP pullup inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 14. " UTMIP_DISABLE_PULLUP_DM ,Force DM pullup inactive" "Disabled,Enabled" bitfld.long 0x1C 13. " UTMIP_DISABLE_PULLDN_DP ,Force DP pulldown inactive" "Disabled,Enabled" textline " " bitfld.long 0x1C 12. " UTMIP_DISABLE_PULLDN_DM ,Force DM pulldown inactive" "Disabled,Enabled" bitfld.long 0x1C 11. " UTMIP_FORCE_PULLUP_DP ,Force DP pullup active" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " UTMIP_FORCE_PULLUP_DM ,Force DM pullup active" "Disabled,Enabled" bitfld.long 0x1C 9. " UTMIP_FORCE_PULLDN_DP ,Force DP pulldown active" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " UTMIP_FORCE_PULLDN_DM ,Force DM pulldown active" "Disabled,Enabled" bitfld.long 0x1C 5.--7. " UTMIP_STABLE_COUNT ,Number of cycles of crystal clock of signal not changing to consider stable" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 4. " UTMIP_STABLE_ALL ,Determines if all signal need to be stable to not change a config" "No,Yes" bitfld.long 0x1C 3. " UTMIP_NO_FREE_ON_SUSPEND ,Don't use free running terminations during suspend" "Disabled,Enabled" textline " " bitfld.long 0x1C 2. " UTMIP_NEVER_FREE_RUNNING_TERMS ,Ignore free running terminations, even when no clock" "Disabled,Enabled" bitfld.long 0x1C 1. " UTMIP_ALWAYS_FREE_RUNNING_TERMS ,Use free running terminations at all time" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " UTMIP_COMB_TERMS ,Use combinational terminations or synced through CLKXTAL" "Disabled,Enabled" line.long 0x20 "USB1_UTMIP_MISC_CFG1_0,UTMIP miscellaneous configurations" bitfld.long 0x20 30. " UTMIP_PHY_XTAL_CLOCKEN ,Selects whether to enable the crystal clock in the module" "Disabled,Enabled" bitfld.long 0x20 29. " UTMIP_LINESTATE_BYPASS ,Bypass LineState reclocking logic" "Disabled,Enabled" textline " " bitfld.long 0x20 28. " UTMIP_LINESTATE_NEG ,Use neg edge sync for linestate" "Disabled,Enabled" bitfld.long 0x20 27. " UTMIP_LINESTATE_XCVRSEL3 ,0 ,Use FS filtering on line state when XcvrSel=3" "Disabled,Enabled" textline " " bitfld.long 0x20 25.--26. " UTMIP_OBS_SEL ,UTMIP_OBS_SEL" "0,1,2,3" bitfld.long 0x20 24. " UTMIP_FSLS_TDM ,UTMIP_FSLS_TDM" "0,1" textline " " bitfld.long 0x20 23. " UTMIP_FORCE_IOBIST_CLK_ON ,UTMIP_FORCE_IOBIST_CLK_ON" "0,1" textline " " bitfld.long 0x20 5. " UTMIP_RX_ERROR_CNT_CLR ,UTMIP_RX_ERROR_CNT_CLR" "0,1" bitfld.long 0x20 4. " UTMIP_RX_ERROR_CNT_EN ,UTMIP_RX_ERROR_CNT_EN" "0,1" textline " " bitfld.long 0x20 3. " UTMIP_FLIP_FSLS_POLARITY ,UTMIP_FLIP_FSLS_POLARITY" "0,1" bitfld.long 0x20 2. " UTMIP_SUSPEND_TERMSEL ,UTMIP_SUSPEND_TERMSEL" "0,1" textline " " bitfld.long 0x20 1. " UTMIP_XCVRSEL3_1 ,EOP detection" "Enabled,Disabled" bitfld.long 0x20 0. " UTMIP_XCVRSEL3_0 ,UTMIP_XCVRSEL3_0" "KeepAlive,Regular" line.long 0x24 "USB1_UTMIP_DEBOUNCE_CFG0_0,UTMIP Avalid and Bvalid debounce" hexmask.long.word 0x24 16.--31. 1. " UTMIP_BIAS_DEBOUNCE_B ,Simulation value -- Used for interrupts" hexmask.long.word 0x24 0.--15. 1. " UTMIP_BIAS_DEBOUNCE_A ,Simulation value -- Used for interrupts" line.long 0x28 "USB1_UTMIP_BAT_CHRG_CFG0_0,UTMIP battery charger configuration" bitfld.long 0x28 8.--13. " UTMIP_CHRG_DEBOUNCE_TIMESCALE ,Debouncer time scaling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x28 5. " UTMIP_OP_I_SRC_EN ,UTMIP_OP_I_SRC_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 4. " UTMIP_ON_SRC_EN ,UTMIP_ON_SRC_EN" "Disabled,Enabled" bitfld.long 0x28 3. " UTMIP_OP_SRC_EN ,UTMIP_OP_SRC_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 2. " UTMIP_ON_SINK_EN ,UTMIP_ON_SINK_EN" "Disabled,Enabled" bitfld.long 0x28 1. " UTMIP_OP_SINK_EN ,UTMIP_OP_SINK_EN" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " UTMIP_PD_CHRG ,Power down charger circuit" "0,1" line.long 0x2C "USB1_UTMIP_SPARE_CFG0_0,Utmip spare configuration bits" bitfld.long 0x2C 4. " FUSE_TERM_RANGE_ADJ_SEL ,Select between regular CFG value and JTAG values for UX_TERM_RANGE_ADJ" "0,1" bitfld.long 0x2C 3. " FUSE_SETUP_SEL ,Select between regular CFG value and JTAG values for UX_SETUP" "0,1" textline " " bitfld.long 0x2C 2. " HS_RX_LATE_SQUELCH ,Delay Squelch by 1 CLK480 cycle" "Disabled,Enabled" bitfld.long 0x2C 1. " HS_RX_FLUSH_ALAP ,Flush as late as possible" "Disabled,Enabled" textline " " bitfld.long 0x2C 0. " HS_RX_IPG_ERROR_ENABLE ,HS_RX_IPG_ERROR_ENABLE" "Disabled,Enabled" line.long 0x30 "USB1_UTMIP_XCVR_CFG1_0,UTMIP transceiver cell configuration register 1" bitfld.long 0x30 22.--23. " UTMIP_XCVR_SPARE ,Spare bits for USB transceiver pad" "0,1,2,3" bitfld.long 0x30 18.--21. " UTMIP_XCVR_TERM_RANGE_ADJ ,Range adjustment on terminations" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 17. " UTMIP_RCTRL_SW_SET ,Use a software override on RCTRL instead of automatic bias control" "No,Yes" bitfld.long 0x30 12.--16. " UTMIP_RCTRL_SW_VAL ,Encoded value to use on RCTRL when software override is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,,,,,,,,,,,,,,," textline " " bitfld.long 0x30 11. " UTMIP_TCTRL_SW_SET ,Use a software override on TCTRL instead of automatic bias control" "No,Yes" bitfld.long 0x30 6.--10. " UTMIP_TCTRL_SW_VAL ,Encoded value to use on TCTRL when software override is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,,,,,,,,,,,,,,," textline " " bitfld.long 0x30 5. " UTMIP_FORCE_PDDR_POWERUP ,Force PDDR input into power up" "Disabled,Enabled" bitfld.long 0x30 4. " UTMIP_FORCE_PDDR_POWERDOWN ,Force PDDR input input into power down" "Disabled,Enabled" textline " " bitfld.long 0x30 3. " UTMIP_FORCE_PDCHRP_POWERUP ,Force PDCHRP input into power up" "Disabled,Enabled" bitfld.long 0x30 2. " UTMIP_FORCE_PDCHRP_POWERDOWN ,Force PDCHRP input input into power down" "Disabled,Enabled" textline " " bitfld.long 0x30 1. " UTMIP_FORCE_PDDISC_POWERUP ,Force PDDISC input into power up" "Disabled,Enabled" bitfld.long 0x30 0. " UTMIP_FORCE_PDDISC_POWERDOWN ,Force PDDISC input into power down" "Disabled,Enabled" line.long 0x34 "USB1_UTMIP_BIAS_CFG1_0,UTMIP Bias cell configuration register 1" bitfld.long 0x34 8.--13. " UTMIP_BIAS_DEBOUNCE_TIMESCALE ,Debouncer time scaling - factor-1 to slow down debouncing by" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" bitfld.long 0x34 3.--7. " UTMIP_BIAS_PDTRK_COUNT ,Control the BIAS cell power down lag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 1. " UTMIP_FORCE_PDTRK_POWERUP ,Force PDTRK input into power up" "Disabled,Enabled" bitfld.long 0x34 0. " UTMIP_FORCE_PDTRK_POWERDOWN ,Force PDTRK input into power down" "Disabled,Enabled" rgroup.long 0x840++0x03 line.long 0x00 "USB1_UTMIP_BIAS_STS0_0,UTMIP Bias cell status register 0" hexmask.long.word 0x00 16.--31. 1. " UTMIP_TCTRL ,Thermal encoding output from USB bias pad" hexmask.long.word 0x00 0.--15. 1. " UTMIP_RCTRL ,Thermal encoding output from USB bias pad" group.long 0x844++0x03 line.long 0x00 "USB1_UTMIP_CHRG_DEB_CFG0_0,UTMIP VDcd_Det and VDat_Det debounce" hexmask.long.word 0x00 16.--31. 1. " UTMIP_CHRG_DEBOUNCE_PERIOD_B ,Simulation value -- Used for interrupts" hexmask.long.word 0x00 0.--15. 1. " UTMIP_CHRG_DEBOUNCE_PERIOD_A ,Simulation value -- Used for interrupts" rgroup.long 0x848++0x03 line.long 0x00 "USB1_UTMIP_PMC_WAKEUP0_0,UTMIP PMC Wakeup value" bitfld.long 0x00 21. " UTMIP_FS_DRV_EN ,Indicates when the controller is driving on the bus" "Disabled,Enabled" hexmask.long.tbyte 0x00 0.--20. 1. " UTMIP_SPARE_FUSES ,Spare Fuses value, to keep the connections preserved" group.long 0x84C++0x03 line.long 0x00 "USB1_UTMIP_PMC_WAKEUP0_0,UTMIP PMC Wakeup value" rbitfld.long 0x00 1. " UTMIP_LINE_WAKEUP_EVENT_INT_STS ,Indicates the status of the pmc wakeup event" "No wakeup,Wakeup" bitfld.long 0x00 0. " UTMIP_LINE_WAKEUP_EVENT_INT_ENB ,Interrupt mask for the pmc wakeup event" "Disabled,Enabled" tree.end endif width 0x0B tree.end tree "XUSB" tree "PADCTL Registers" base ad:0x7009F000 width 17. group.long 0x00++0x17 line.long 0x00 "BOOT_MEDIA_0,XUSB PADCTL BOOT MEDIA" bitfld.long 0x00 1.--4. " BOOT_PORT ,BOOT PORT" "OTG0,OTG1,OTG2,OTG3,OTG4,OTG5,OTG6,,,HSIC0,HSIC1,?..." bitfld.long 0x00 0. " BOOT_MEDIA_ENABLE ,BOOT MEDIA enable" "Disabled,Enabled" line.long 0x04 "USB2_PAD_MUX_0,XUSB PADCTL USB2 PAD MUX 0" bitfld.long 0x04 21. " HSIC_PORT1_CONFIG ,HSIC PORT1 CONFIG" "HSIC,HSIC_PLUS" bitfld.long 0x04 20. " HSIC_PORT0_CONFIG ,HSIC PORT0 CONFIG" "HSIC,HSIC_PLUS" textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x04 18.--19. " USB2_BIAS_PAD ,USB2 BIAS PAD" "SNPS,XUSB,UART,?..." bitfld.long 0x04 16.--17. " HSIC_PAD_TRK ,HSIC PAD TRK" "SNPS,XUSB,UART,?..." bitfld.long 0x04 15. " USB2_HSIC_PAD_PORT1 ,USB2 HSIC PAD PORT1" "SNPS,XUSB" textline " " bitfld.long 0x04 14. " USB2_HSIC_PAD_PORT0 ,USB2 HSIC PAD PORT0" "SNPS,XUSB" bitfld.long 0x04 6.--7. " USB2_OTG_PAD_PORT3 ,USB2 OTG PAD PORT3" "SNPS,XUSB,UART,?..." textline " " endif sif (cpuis("TEGRAX2")) bitfld.long 0x04 4.--5. " USB2_OTG_PAD_PORT2 ,USB2 OTG PAD PORT2" ",XUSB,UART,?..." bitfld.long 0x04 2.--3. " USB2_OTG_PAD_PORT1 ,USB2 OTG PAD PORT1" ",XUSB,UART,?..." textline " " bitfld.long 0x04 0.--1. " USB2_OTG_PAD_PORT0 ,USB2 OTG PAD PORT0" ",XUSB,UART,?..." else bitfld.long 0x04 4.--5. " USB2_OTG_PAD_PORT2 ,USB2 OTG PAD PORT2" "SNPS,XUSB,UART,?..." bitfld.long 0x04 2.--3. " USB2_OTG_PAD_PORT1 ,USB2 OTG PAD PORT1" "SNPS,XUSB,UART," textline " " bitfld.long 0x04 0.--1. " USB2_OTG_PAD_PORT0 ,USB2 OTG PAD PORT0" "SNPS,XUSB,UART,?..." endif line.long 0x08 "USB2_PORT_CAP_0,XUSB PADCTL USB2 PORT CAP 0" sif (!cpuis("TEGRAX2")) bitfld.long 0x08 15. " PORT3_REVERSE_ID ,PORT3 REVERSE ID" "No,Yes" bitfld.long 0x08 14. " PORT3_INTERNAL ,PORT3 INTERNAL" "No,Yes" bitfld.long 0x08 12.--13. " PORT3_CAP ,PORT3 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP" textline " " endif bitfld.long 0x08 11. " PORT2_REVERSE_ID ,PORT2 REVERSE ID" "No,Yes" bitfld.long 0x08 10. " PORT2_INTERNAL ,PORT2 INTERNAL" "No,Yes" bitfld.long 0x08 8.--9. " PORT2_CAP ,PORT2 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP" textline " " bitfld.long 0x08 7. " PORT1_REVERSE_ID ,PORT1 REVERSE ID" "No,Yes" bitfld.long 0x08 6. " PORT1_INTERNAL ,PORT1 INTERNAL" "No,Yes" bitfld.long 0x08 4.--5. " PORT1_CAP ,PORT1 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP" textline " " bitfld.long 0x08 3. " PORT0_REVERSE_ID ,PORT0 REVERSE ID" "No,Yes" bitfld.long 0x08 2. " PORT0_INTERNAL ,PORT0 INTERNAL" "No,Yes" bitfld.long 0x08 0.--1. " PORT0_CAP ,PORT0 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP" sif (!cpuis("TEGRAX2")) group.long 0x0C++0x03 line.long 0x00 "SNPS_OC_MAP_0,XUSB PADCTL SNPS OC MAP" bitfld.long 0x00 0.--3. " CONTROLLER1_OC_PIN ,CONTROLLER1 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" else group.long 0x0C++0x03 line.long 0x00 "SS_PORT_CAP_0,SS_PORT_CAP_0" bitfld.long 0x00 11. " PORT2_REVERSE_ID ,PORT2 REVERSE ID" "No,Yes" bitfld.long 0x00 10. " PORT2_INTERNAL ,PORT2 INTERNAL" "No,Yes" bitfld.long 0x00 8.--9. " PORT2_CAP ,PORT2 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP" textline " " bitfld.long 0x00 7. " PORT1_REVERSE_ID ,PORT1 REVERSE ID" "No,Yes" bitfld.long 0x00 6. " PORT1_INTERNAL ,PORT1 INTERNAL" "No,Yes" bitfld.long 0x00 4.--5. " PORT1_CAP ,PORT1 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP" textline " " bitfld.long 0x00 3. " PORT0_REVERSE_ID ,PORT0 REVERSE ID" "No,Yes" bitfld.long 0x00 2. " PORT0_INTERNAL ,PORT0 INTERNAL" "No,Yes" bitfld.long 0x00 0.--1. " PORT0_CAP ,PORT0 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP" endif group.long 0x10++0x03 line.long 0x00 "USB2_OC_MAP_0,USB2 OC MAP Register" sif (!cpuis("TEGRAX2")) bitfld.long 0x00 12.--15. " PORT3_OC_PIN ,PORT3 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" textline " " endif bitfld.long 0x00 8.--11. " PORT2_OC_PIN ,PORT2 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" bitfld.long 0x00 4.--7. " PORT1_OC_PIN ,PORT1 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" textline " " bitfld.long 0x00 0.--3. " PORT0_OC_PIN ,PORT0 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" sif (!cpuis("TEGRAX2")) group.long 0x14++0x03 line.long 0x00 "SS_PORT_MAP_0,XUSB PADCTL SS PORT MAP 0" bitfld.long 0x00 19. " PORT3_INTERNAL ,PORT3 INTERNAL" "No,Yes" bitfld.long 0x00 15.--18. " PORT3_MAP ,PORT3 MAP" "USB2_PORT0,USB2_PORT1,USB2_PORT2,USB2_PORT3,,,,INIT_DISABLED,?..." bitfld.long 0x00 14. " PORT2_INTERNAL ,PORT2 INTERNAL" "No,Yes" textline " " bitfld.long 0x00 10.--13. " PORT2_MAP ,PORT2 MAP" "USB2_PORT0,USB2_PORT1,USB2_PORT2,USB2_PORT3,,,,INIT_DISABLED,?..." bitfld.long 0x00 9. " PORT1_INTERNAL ,PORT1 INTERNAL" "No,Yes" bitfld.long 0x00 5.--8. " PORT1_MAP ,PORT1 MAP" "USB2_PORT0,USB2_PORT1,USB2_PORT2,USB2_PORT3,,,,INIT_DISABLED,?..." textline " " bitfld.long 0x00 4. " PORT0_INTERNAL ,PORT0 INTERNAL" "No,Yes" bitfld.long 0x00 0.--3. " PORT0_MAP ,PORT0 MAP" "USB2_PORT0,USB2_PORT1,USB2_PORT2,USB2_PORT3,,,,INIT_DISABLED,?..." else group.long 0x14++0x03 line.long 0x00 "SS_OC_MAP_0,SS OC MAP Register" bitfld.long 0x00 8.--11. " PORT2_OC_PIN ,PORT2 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" bitfld.long 0x00 4.--7. " PORT1_OC_PIN ,PORT1 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" textline " " bitfld.long 0x00 0.--3. " PORT0_OC_PIN ,PORT0 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" endif width 28. textline " " group.long 0x18++0x1F line.long 0x00 "VBUS_OC_MAP_0,VBUS OC MAP 0" bitfld.long 0x00 16.--19. " VBUS_ENABLE3_OC_MAP ,VBUS ENABLE3 OC MAP" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" bitfld.long 0x00 15. " VBUS_ENABLE3 ,VBUS ENABLE3" "No,Yes" textline " " bitfld.long 0x00 11.--14. " VBUS_ENABLE2_OC_MAP ,VBUS ENABLE2 OC MAP" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" bitfld.long 0x00 10. " VBUS_ENABLE2 ,VBUS ENABLE2" "No,Yes" textline " " bitfld.long 0x00 6.--9. " VBUS_ENABLE1_OC_MAP ,VBUS ENABLE1 OC MAP" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" bitfld.long 0x00 5. " VBUS_ENABLE1 ,VBUS ENABLE1" "No,Yes" textline " " bitfld.long 0x00 1.--4. " VBUS_ENABLE0_OC_MAP ,VBUS ENABLE0 OC MAP" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled" bitfld.long 0x00 0. " VBUS_ENABLE0 ,VBUS ENABLE0" "No,Yes" line.long 0x04 "OC_DET_0,XOC DET 0" bitfld.long 0x04 27. " OC_DETECTED_INTERRUPT_ENABLE_VBUSPAD3 ,OC DETECTED INTERRUPT ENABLE VBUSPAD3" "No,Yes" bitfld.long 0x04 26. " OC_DETECTED_INTERRUPT_ENABLE_VBUSPAD2 ,OC DETECTED INTERRUPT ENABLE VBUSPAD2" "No,Yes" textline " " bitfld.long 0x04 25. " OC_DETECTED_INTERRUPT_ENABLE_VBUSPAD1 ,OC DETECTED INTERRUPT ENABLE VBUSPAD1" "No,Yes" bitfld.long 0x04 24. " OC_DETECTED_INTERRUPT_ENABLE_VBUSPAD0 ,OC DETECTED INTERRUPT ENABLE VBUSPAD0" "No,Yes" textline " " bitfld.long 0x04 23. " OC_DETECTED_INTERRUPT_ENABLE3 ,OC DETECTED INTERRUPT ENABLE3" "No,Yes" bitfld.long 0x04 22. " OC_DETECTED_INTERRUPT_ENABLE2 ,OC DETECTED INTERRUPT ENABLE2" "No,Yes" textline " " bitfld.long 0x04 21. " OC_DETECTED_INTERRUPT_ENABLE1 ,OC DETECTED INTERRUPT ENABLE1" "No,Yes" bitfld.long 0x04 20. " OC_DETECTED_INTERRUPT_ENABLE0 ,OC DETECTED INTERRUPT ENABLE0" "No,Yes" textline " " bitfld.long 0x04 15. " OC_DETECTED_VBUS_PAD3 ,OC DETECTED VBUS PAD3" "No,Yes" bitfld.long 0x04 14. " OC_DETECTED_VBUS_PAD2 ,OC DETECTED VBUS PAD2" "No,Yes" textline " " bitfld.long 0x04 13. " OC_DETECTED_VBUS_PAD1 ,OC DETECTED VBUS PAD1" "No,Yes" bitfld.long 0x04 12. " OC_DETECTED_VBUS_PAD0 ,OC DETECTED VBUS PAD0" "No,Yes" textline " " bitfld.long 0x04 11. " OC_DETECTED3 ,OC DETECTED3" "No,Yes" bitfld.long 0x04 10. " OC_DETECTED2 ,OC DETECTED2" "No,Yes" textline " " bitfld.long 0x04 9. " OC_DETECTED1 ,OC DETECTED1" "No,Yes" bitfld.long 0x04 8. " OC_DETECTED0 ,OC DETECTED0" "No,Yes" textline " " bitfld.long 0x04 3. " SET_OC_DETECTED3 ,SET OC DETECTED3" "No,Yes" bitfld.long 0x04 2. " SET_OC_DETECTED2 ,SET OC DETECTED2" "No,Yes" textline " " bitfld.long 0x04 1. " SET_OC_DETECTED1 ,SET OC DETECTED1" "No,Yes" bitfld.long 0x04 0. " SET_OC_DETECTED0 ,SET OC DETECTED0" "No,Yes" line.long 0x08 "ELPG_PROGRAM_0_0,ELPG PROGRAM 0 0" bitfld.long 0x08 31. " USB2_HSIC_PORT1_WAKEUP_EVENT ,USB2 HSIC PORT1 WAKEUP EVENT" "No,Yes" bitfld.long 0x08 30. " USB2_HSIC_PORT0_WAKEUP_EVENT ,USB2 HSIC PORT0 WAKEUP EVENT" "No,Yes" textline " " bitfld.long 0x08 29. " USB2_HSIC_PORT1_WAKE_INTERRUPT_ENABLE ,USB2 HSIC PORT1 WAKE INTERRUPT ENABLE" "No,Yes" bitfld.long 0x08 28. " USB2_HSIC_PORT0_WAKE_INTERRUPT_ENABLE ,USB2 HSIC PORT0 WAKE INTERRUPT ENABLE" "No,Yes" textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x08 24. " SS_PORT3_WAKEUP_EVENT ,SS PORT3 WAKEUP EVENT" "No,Yes" textline " " endif bitfld.long 0x08 23. " SS_PORT2_WAKEUP_EVENT ,SS PORT2 WAKEUP EVENT" "No,Yes" textline " " bitfld.long 0x08 22. " SS_PORT1_WAKEUP_EVENT ,SS PORT1 WAKEUP EVENT" "No,Yes" bitfld.long 0x08 21. " SS_PORT0_WAKEUP_EVENT ,SS PORT0 WAKEUP EVENT" "No,Yes" textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x08 17. " SS_PORT3_WAKE_INTERRUPT_ENABLE ,SS PORT3 WAKE INTERRUPT ENABLE" "No,Yes" textline " " endif bitfld.long 0x08 16. " SS_PORT2_WAKE_INTERRUPT_ENABLE ,SS PORT2 WAKE INTERRUPT ENABLE" "No,Yes" textline " " bitfld.long 0x08 15. " SS_PORT1_WAKE_INTERRUPT_ENABLE ,SS PORT1 WAKE INTERRUPT ENABLE" "No,Yes" bitfld.long 0x08 14. " SS_PORT0_WAKE_INTERRUPT_ENABLE ,SS PORT0 WAKE INTERRUPT ENABLE" "No,Yes" textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x08 10. " USB2_PORT3_WAKEUP_EVENT ,USB2 PORT3 WAKEUP EVENT" "No,Yes" textline " " endif bitfld.long 0x08 9. " USB2_PORT2_WAKEUP_EVENT ,USB2 PORT2 WAKEUP EVENT" "No,Yes" textline " " bitfld.long 0x08 8. " USB2_PORT1_WAKEUP_EVENT ,USB2 PORT1 WAKEUP EVENT" "No,Yes" bitfld.long 0x08 7. " USB2_PORT0_WAKEUP_EVENT ,USB2 PORT0 WAKEUP EVENT" "No,Yes" textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x08 3. " USB2_PORT3_WAKE_INTERRUPT_ENABLE ,USB2 PORT3 WAKE INTERRUPT ENABLE" "No,Yes" textline " " endif bitfld.long 0x08 2. " USB2_PORT2_WAKE_INTERRUPT_ENABLE ,USB2 PORT2 WAKE INTERRUPT ENABLE" "No,Yes" textline " " bitfld.long 0x08 1. " USB2_PORT1_WAKE_INTERRUPT_ENABLE ,USB2 PORT1 WAKE INTERRUPT ENABLE" "No,Yes" bitfld.long 0x08 0. " USB2_PORT0_WAKE_INTERRUPT_ENABLE ,USB2 PORT0 WAKE INTERRUPT ENABLE" "No,Yes" line.long 0x0C "ELPG_PROGRAM_1_0,ELPG PROGRAM 1 0" sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 31. " AUX_MUX_LP0_VCORE_DOWN ,AUX MUX LP0 VCORE DOWN" "No,Yes" bitfld.long 0x0C 30. " AUX_MUX_LP0_CLAMP_EN_EARLY ,AUX MUX LP0 CLAMP EN EARLY" "No,Yes" textline " " bitfld.long 0x0C 29. " AUX_MUX_LP0_CLAMP_EN ,AUX MUX LP0 CLAMP EN" "No,Yes" textline " " endif bitfld.long 0x0C 11. " SSP3_ELPG_VCORE_DOWN ,SSP3 ELPG VCORE DOWN" "No,Yes" textline " " bitfld.long 0x0C 10. " SSP3_ELPG_CLAMP_EN_EARLY ,SSP3 ELPG CLAMP EN EARLY" "No,Yes" bitfld.long 0x0C 9. " SSP3_ELPG_CLAMP_EN ,SSP3 ELPG CLAMP EN" "No,Yes" textline " " bitfld.long 0x0C 8. " SSP2_ELPG_VCORE_DOWN ,SSP2 ELPG VCORE DOWN" "No,Yes" bitfld.long 0x0C 7. " SSP2_ELPG_CLAMP_EN_EARLY ,SSP2 ELPG CLAMP EN EARLY" "No,Yes" textline " " bitfld.long 0x0C 6. " SSP2_ELPG_CLAMP_EN ,SSP2 ELPG CLAMP EN" "No,Yes" bitfld.long 0x0C 5. " SSP1_ELPG_VCORE_DOWN ,SSP1 ELPG VCORE DOWN" "No,Yes" textline " " bitfld.long 0x0C 4. " SSP1_ELPG_CLAMP_EN_EARLY ,SSP1 ELPG CLAMP EN EARLY" "No,Yes" bitfld.long 0x0C 3. " SSP1_ELPG_CLAMP_EN ,SSP1 ELPG CLAMP EN" "No,Yes" textline " " bitfld.long 0x0C 2. " SSP0_ELPG_VCORE_DOWN ,SSP0 ELPG VCORE DOWN" "No,Yes" bitfld.long 0x0C 1. " SSP0_ELPG_CLAMP_EN_EARLY ,SSP0 ELPG CLAMP EN EARLY" "No,Yes" textline " " bitfld.long 0x0C 0. " SSP0_ELPG_CLAMP_EN ,SSP0 ELPG CLAMP EN" "No,Yes" sif (!cpuis("TEGRAX2")) group.long 0x28++0x0F line.long 0x00 "USB3_PAD_MUX_0,USB3 PAD MUX 0" bitfld.long 0x00 30.--31. " SATA_PAD_LANE0 ,SATA PAD LANE0" "PCIE_X1,USB3_SS,SATA,PCIE_X4" bitfld.long 0x00 24.--25. " PCIE_PAD_LANE6 ,PCIE PAD LANE6" "PCIE_X1,USB3_SS,SATA,PCIE_X4" textline " " bitfld.long 0x00 22.--23. " PCIE_PAD_LANE5 ,PCIE PAD LANE5" "PCIE_X1,USB3_SS,SATA,PCIE_X4" bitfld.long 0x00 20.--21. " PCIE_PAD_LANE4 ,PCIE PAD LANE4" "PCIE_X1,USB3_SS,SATA,PCIE_X4" textline " " bitfld.long 0x00 18.--19. " PCIE_PAD_LANE3 ,PCIE PAD LANE3" "PCIE_X1,USB3_SS,SATA,PCIE_X4" bitfld.long 0x00 16.--17. " PCIE_PAD_LANE2 ,PCIE PAD LANE2" "PCIE_X1,USB3_SS,SATA,PCIE_X4" textline " " bitfld.long 0x00 14.--15. " PCIE_PAD_LANE1 ,PCIE PAD LANE1" "PCIE_X1,USB3_SS,SATA,PCIE_X4" bitfld.long 0x00 12.--13. " PCIE_PAD_LANE0 ,PCIE PAD LANE0" "PCIE_X1,USB3_SS,SATA,PCIE_X4" textline " " bitfld.long 0x00 8. " FORCE_SATA_PAD_IDDQ_DISABLE_MASK0 ,FORCE SATA PAD IDDQ DISABLE MASK0" "Disabled,Enabled" bitfld.long 0x00 7. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6 ,FORCE PCIE PAD IDDQ DISABLE MASK6" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5 ,FORCE PCIE PAD IDDQ DISABLE MASK5" "Disabled,Enabled" bitfld.long 0x00 5. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4 ,FORCE PCIE PAD IDDQ DISABLE MASK4" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3 ,FORCE PCIE PAD IDDQ DISABLE MASK3" "Disabled,Enabled" bitfld.long 0x00 3. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2 ,FORCE PCIE PAD IDDQ DISABLE MASK2" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1 ,FORCE PCIE PAD IDDQ DISABLE MASK1" "Disabled,Enabled" bitfld.long 0x00 1. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0 ,FORCE PCIE PAD IDDQ DISABLE MASK0" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FORCE_PCIE_PAD_IDDQ_DISABLE ,FORCE PCIE PAD IDDQ DISABLE" "Disabled,Enabled" line.long 0x04 "WAKE_CTRL_0,Wake logic AUX RDET CLK FORCE ON" bitfld.long 0x04 7. " LANE_S0_FORCE_TX_RDET_CLK_ENABLE ,LANE S0 FORCE TX RDET CLK ENABLE" "Disabled,Enabled" bitfld.long 0x04 6. " LANE_P6_FORCE_TX_RDET_CLK_ENABLE ,LANE P6 FORCE TX RDET CLK ENABLE" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " LANE_P5_FORCE_TX_RDET_CLK_ENABLE ,LANE P5 FORCE TX RDET CLK ENABLE" "Disabled,Enabled" bitfld.long 0x04 4. " LANE_P4_FORCE_TX_RDET_CLK_ENABLE ,LANE P4 FORCE TX RDET CLK ENABLE" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " LANE_P3_FORCE_TX_RDET_CLK_ENABLE ,LANE P3 FORCE TX RDET CLK ENABLE" "Disabled,Enabled" bitfld.long 0x04 2. " LANE_P2_FORCE_TX_RDET_CLK_ENABLE ,LANE P2 FORCE TX RDET CLK ENABLE" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " LANE_P1_FORCE_TX_RDET_CLK_ENABLE ,LANE P1 FORCE TX RDET CLK ENABLE" "Disabled,Enabled" bitfld.long 0x04 0. " LANE_P0_FORCE_TX_RDET_CLK_ENABLE ,LANE P0 FORCE TX RDET CLK ENABLE" "Disabled,Enabled" line.long 0x08 "XUSB_PADCTL_PM_SPARE_0,PAD MACRO SPARE BITS" bitfld.long 0x08 11. " HSIC_PM_SPARE_BIT3 ,HSIC PM SPARE BIT3" "0,1" bitfld.long 0x08 10. " HSIC_PM_SPARE_BIT2 ,HSIC PM SPARE BIT2" "0,1" textline " " bitfld.long 0x08 9. " HSIC_PM_SPARE_BIT1 ,HSIC PM SPARE BIT1" "0,1" bitfld.long 0x08 8. " HSIC_PM_SPARE_BIT0 ,HSIC PM SPARE BIT0" "0,1" textline " " bitfld.long 0x08 3. " OTG_PM_SPARE_BIT3 ,OTG PM SPARE BIT3" "0,1" bitfld.long 0x08 2. " OTG_PM_SPARE_BIT2 ,OTG PM SPARE BIT2" "0,1" textline " " bitfld.long 0x08 1. " OTG_PM_SPARE_BIT1 ,OTG PM SPARE BIT1" "0,1" bitfld.long 0x08 0. " OTG_PM_SPARE_BIT0 ,OTG PM SPARE BIT0" "0,1" line.long 0x0C "XUSB_PADCTL_UPHY_CFG_STB_0,XUSB PADCTL UPHY CFG STB 0" bitfld.long 0x0C 6.--11. " ASSERT_DLY ,ASSERT DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--5. " PULSE_WIDTH ,PULSE WIDTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else group.long 0x28++0x03 line.long 0x00 "PM_SPARE_0,PM SPARE 0" bitfld.long 0x00 11. " HSIC_PM_SPARE_BIT3 ,HSIC PM SPARE BIT3" "0,1" bitfld.long 0x00 10. " HSIC_PM_SPARE_BIT2 ,HSIC PM SPARE BIT2" "0,1" textline " " bitfld.long 0x00 9. " HSIC_PM_SPARE_BIT1 ,HSIC PM SPARE BIT1" "0,1" bitfld.long 0x00 8. " HSIC_PM_SPARE_BIT0 ,HSIC PM SPARE BIT0" "0,1" textline " " bitfld.long 0x00 3. " OTG_PM_SPARE_BIT3 ,OTG PM SPARE BIT3" "0,1" bitfld.long 0x00 2. " OTG_PM_SPARE_BIT2 ,OTG PM SPARE BIT2" "0,1" textline " " bitfld.long 0x00 1. " OTG_PM_SPARE_BIT1 ,OTG PM SPARE BIT1" "0,1" bitfld.long 0x00 0. " OTG_PM_SPARE_BIT0 ,OTG PM SPARE BIT0" "0,1" endif width 32. tree "USB2 Registers" group.long 0x80++0x0F line.long 0x00 "BATTERY_CHRG_OTGPAD0_CTL0_0,BATTERY CHRG OTGPAD0 CTL0 0" bitfld.long 0x00 31. " GENERATE_SRP ,GENERATE SRP" "No,Yes" bitfld.long 0x00 30. " SRP_INTR_EN ,SRP INTR EN" "No,Yes" bitfld.long 0x00 29. " SRP_DETECTED ,SRP DETECTED" "No,Yes" bitfld.long 0x00 28. " SRP_DETECT_EN ,SRP DETECT EN" "No,Yes" textline " " bitfld.long 0x00 27. " DCD_INTR_EN ,DCD INTR EN" "No,Yes" bitfld.long 0x00 26. " DCD_DETECTED ,DCD DETECTED" "No,Yes" bitfld.long 0x00 25. " ZIN_FILTER_EN ,ZIN FILTER EN" "No,Yes" bitfld.long 0x00 24. " ZIN_CHNG_INTR_EN ,ZIN CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 23. " ZIN_ST_CHNG ,ZIN ST CHNG" "No,Yes" rbitfld.long 0x00 22. " ZIN ,ZIN" "No,Yes" bitfld.long 0x00 21. " ZIP_FILTER_EN ,ZIP FILTER EN" "No,Yes" bitfld.long 0x00 20. " ZIP_CHNG_INTR_EN ,ZIP CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 19. " ZIP_ST_CHNG ,ZIP ST CHNG" "No,Yes" rbitfld.long 0x00 18. " ZIP ,ZIP" "No,Yes" bitfld.long 0x00 13. " OP_I_SRC_EN ,OP I SRC EN" "No,Yes" bitfld.long 0x00 12. " ON_SRC_EN ,ON SRC EN" "No,Yes" textline " " bitfld.long 0x00 11. " ON_SINK_EN ,ON SINK EN" "No,Yes" bitfld.long 0x00 10. " OP_SRC_EN ,OP SRC EN" "No,Yes" bitfld.long 0x00 9. " OP_SINK_EN ,OP SINK EN" "No,Yes" bitfld.long 0x00 8. " VDAT_DET_FILTER_EN ,VDAT DET FILTER EN" "No,Yes" textline " " bitfld.long 0x00 7. " VDAT_DET_CHNG_INTR_EN ,VDAT DET CHNG INTR EN" "No,Yes" bitfld.long 0x00 6. " VDAT_DET_ST_CHNG ,VDAT DET ST CHNG" "No,Yes" rbitfld.long 0x00 5. " VDAT_DET ,VDAT DET" "No,Yes" bitfld.long 0x00 4. " VDCD_DET_FILTER_EN ,VDCD DET FILTER EN" "No,Yes" textline " " bitfld.long 0x00 3. " VDCD_DET_CHNG_INTR_EN ,VDCD DET CHNG INTR EN" "No,Yes" bitfld.long 0x00 2. " VDCD_DET_ST_CHNG ,VDCD DET ST CHNG" "No,Yes" rbitfld.long 0x00 1. " VDCD_DET ,VDCD DET" "No,Yes" bitfld.long 0x00 0. " PD_CHG ,PD CHG" "No,Yes" line.long 0x04 "BATTERY_CHRG_OTGPAD0_CTL1_0,BATTERY CHRG OTGPAD0 CTL1 0" bitfld.long 0x04 23. " USBON_RPU_OVRD_VAL ,USBON RPU OVRD VAL" "No,Yes" bitfld.long 0x04 22. " USBON_RPU_OVRD ,USBON RPU OVRD" "No,Yes" bitfld.long 0x04 21. " USBON_RPD_OVRD_VAL ,USBON RPD OVRD VAL" "No,Yes" bitfld.long 0x04 20. " USBON_RPD_OVRD ,USBON RPD OVRD" "No,Yes" textline " " bitfld.long 0x04 19. " USBOP_RPU_OVRD_VAL ,USBOP RPU OVRD VAL" "No,Yes" bitfld.long 0x04 18. " USBOP_RPU_OVRD ,USBOP RPU OVRD" "No,Yes" bitfld.long 0x04 17. " USBOP_RPD_OVRD_VAL ,USBOP RPD OVRD VAL" "No,Yes" bitfld.long 0x04 16. " USBOP_RPD_OVRD ,USBOP RPD OVRD" "No,Yes" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 11.--12. " VREG_DIR ,VREG DIR" "0,1,2,3" textline " " endif bitfld.long 0x04 9.--10. " VREG_DYN_DLY ,VREG DYN DLY" "0,1,2,3" bitfld.long 0x04 7.--8. " VREG_LEV ,VREG LEV" "0,1,2,3" sif (cpuis("TEGRAX2")) bitfld.long 0x04 6. " PD_VREG ,PD VREG" "0,1" else bitfld.long 0x04 6. " VREG_FIX18 ,VREG FIX18" "0,1" endif bitfld.long 0x04 4. " DIV_DET_EN ,DIV DET EN" "No,Yes" textline " " rbitfld.long 0x04 3. " VOP_DIV2P7_DET ,VOP DIV2P7 DET" "No,Yes" rbitfld.long 0x04 2. " VOP_DIV2P0_DET ,VOP DIV2P0 DET" "No,Yes" rbitfld.long 0x04 1. " VON_DIV2P7_DET ,VON DIV2P7 DET" "No,Yes" rbitfld.long 0x04 0. " VON_DIV2P0_DET ,VON DIV2P0 DET" "No,Yes" line.long 0x08 "OTG_PAD0_CTL_0_0,OTG PAD0 CTL0 Static Settings" bitfld.long 0x08 29. " PD_ZI ,PD ZI" "0,1" bitfld.long 0x08 28. " PD2_OVRD_EN ,PD2 OVRD EN" "0,1" bitfld.long 0x08 27. " PD2 ,PD2" "0,1" bitfld.long 0x08 26. " PD ,PD" "0,1" textline " " bitfld.long 0x08 25. " TERM_SEL ,TERM SEL" "0,1" bitfld.long 0x08 21.--24. " LS_FSLEW ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 17.--20. " LS_RSLEW ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 13.--16. " FS_FSLEW ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 9.--12. " FS_RSLEW ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 6.--8. " HS_SLEW ,HS SLEW" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--5. " HS_CURR_LEVEL ,HS CURR LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "OTG_PAD0_CTL_1_0,OTG PAD0 CTL1 Static Settings" bitfld.long 0x0C 26.--30. " RPD_CTRL ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x0C 25. " RPU_STATUS_HIGH ,RPU STATUS HIGH" "0,1" bitfld.long 0x0C 24. " RPU_SWITCH_LOW ,RPU SWITCH LOW" "0,1" bitfld.long 0x0C 23. " RPU_SWITCH_OVRD ,RPU SWITCH OVRD" "0,1" textline " " bitfld.long 0x0C 22. " HS_LOOPBACK_OVRD_VAL ,HS LOOPBACK OVRD VAL" "0,1" bitfld.long 0x0C 21. " HS_LOOPBACK_OVRD_EN ,HS LOOPBACK OVRD EN" "0,1" bitfld.long 0x0C 17.--20. " PTERM_RANGE_ADJ ,PTERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16. " PD_DISC_OVRD_VAL ,PD DISC OVRD VAL" "0,1" textline " " bitfld.long 0x0C 15. " PD_CHRP_OVRD_VAL ,PD CHRP OVRD VAL" "0,1" sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 13.--14. " RPU_RANGE_ADJ ,RPU RANGE ADJ" "0,1,2,3" bitfld.long 0x0C 11.--12. " HS_COUP_EN ,HS COUP EN" "0,1,2,3" bitfld.long 0x0C 7.--10. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x0C 11.--12. " HS_COUP_EN ,HS COUP EN" "0,1,2,3" bitfld.long 0x0C 7.--10. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif textline " " bitfld.long 0x0C 3.--6. " TERM_RANGE_ADJ ,TERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 2. " PD_DR ,PD DR" "0,1" bitfld.long 0x0C 1. " PD_DISC_OVRD ,PD DISC OVRD" "0,1" bitfld.long 0x0C 0. " PD_CHRP_OVRD ,PD CHRP OVRD" "0,1" sif (cpuis("TEGRAX2")) group.long (0x80+0x10)++0x07 line.long 0x00 "USB2_OTG_PAD0_CTL_2_0,USB2 OTG PAD0 CTL 2 0" bitfld.long 0x00 28.--31. " SPARE_AO ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " TCTRL_SW ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 17. " TCTRL_TRK_OVRD ,TCTRL TRK OVRD" "No override,Override" bitfld.long 0x00 16. " PCTRL_TRK_OVRD ,PCTRL TRK OVRD" "No override,Override" textline " " bitfld.long 0x00 10.--15. " TCTRL_TRK ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--9. " PCTRL_TRK ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 1. " RPU_HIGH_FIXED ,RPU HIGH FIXED" "Not fixed,Fixed" bitfld.long 0x00 0. " RPU_AUTO_SWITCH_EN ,RPU AUTO SWITCH EN" "Disabled,Enabled" line.long 0x04 "USB2_OTG_PAD0_CTL_3_0,USB2 OTG PAD0 CTL 3 0" bitfld.long 0x04 6.--8. " HS_RXEQ ,HS RXEQ" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--3. " HS_TXEQ ,HS TXEQ" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " HS_DIN_DLY_SEL ,HS DIN DLY SEL" "Not selected,Selected" endif group.long 0xC0++0x0F line.long 0x00 "BATTERY_CHRG_OTGPAD1_CTL0_0,BATTERY CHRG OTGPAD1 CTL0 0" bitfld.long 0x00 31. " GENERATE_SRP ,GENERATE SRP" "No,Yes" bitfld.long 0x00 30. " SRP_INTR_EN ,SRP INTR EN" "No,Yes" bitfld.long 0x00 29. " SRP_DETECTED ,SRP DETECTED" "No,Yes" bitfld.long 0x00 28. " SRP_DETECT_EN ,SRP DETECT EN" "No,Yes" textline " " bitfld.long 0x00 27. " DCD_INTR_EN ,DCD INTR EN" "No,Yes" bitfld.long 0x00 26. " DCD_DETECTED ,DCD DETECTED" "No,Yes" bitfld.long 0x00 25. " ZIN_FILTER_EN ,ZIN FILTER EN" "No,Yes" bitfld.long 0x00 24. " ZIN_CHNG_INTR_EN ,ZIN CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 23. " ZIN_ST_CHNG ,ZIN ST CHNG" "No,Yes" rbitfld.long 0x00 22. " ZIN ,ZIN" "No,Yes" bitfld.long 0x00 21. " ZIP_FILTER_EN ,ZIP FILTER EN" "No,Yes" bitfld.long 0x00 20. " ZIP_CHNG_INTR_EN ,ZIP CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 19. " ZIP_ST_CHNG ,ZIP ST CHNG" "No,Yes" rbitfld.long 0x00 18. " ZIP ,ZIP" "No,Yes" bitfld.long 0x00 13. " OP_I_SRC_EN ,OP I SRC EN" "No,Yes" bitfld.long 0x00 12. " ON_SRC_EN ,ON SRC EN" "No,Yes" textline " " bitfld.long 0x00 11. " ON_SINK_EN ,ON SINK EN" "No,Yes" bitfld.long 0x00 10. " OP_SRC_EN ,OP SRC EN" "No,Yes" bitfld.long 0x00 9. " OP_SINK_EN ,OP SINK EN" "No,Yes" bitfld.long 0x00 8. " VDAT_DET_FILTER_EN ,VDAT DET FILTER EN" "No,Yes" textline " " bitfld.long 0x00 7. " VDAT_DET_CHNG_INTR_EN ,VDAT DET CHNG INTR EN" "No,Yes" bitfld.long 0x00 6. " VDAT_DET_ST_CHNG ,VDAT DET ST CHNG" "No,Yes" rbitfld.long 0x00 5. " VDAT_DET ,VDAT DET" "No,Yes" bitfld.long 0x00 4. " VDCD_DET_FILTER_EN ,VDCD DET FILTER EN" "No,Yes" textline " " bitfld.long 0x00 3. " VDCD_DET_CHNG_INTR_EN ,VDCD DET CHNG INTR EN" "No,Yes" bitfld.long 0x00 2. " VDCD_DET_ST_CHNG ,VDCD DET ST CHNG" "No,Yes" rbitfld.long 0x00 1. " VDCD_DET ,VDCD DET" "No,Yes" bitfld.long 0x00 0. " PD_CHG ,PD CHG" "No,Yes" line.long 0x04 "BATTERY_CHRG_OTGPAD1_CTL1_0,BATTERY CHRG OTGPAD1 CTL1 0" bitfld.long 0x04 23. " USBON_RPU_OVRD_VAL ,USBON RPU OVRD VAL" "No,Yes" bitfld.long 0x04 22. " USBON_RPU_OVRD ,USBON RPU OVRD" "No,Yes" bitfld.long 0x04 21. " USBON_RPD_OVRD_VAL ,USBON RPD OVRD VAL" "No,Yes" bitfld.long 0x04 20. " USBON_RPD_OVRD ,USBON RPD OVRD" "No,Yes" textline " " bitfld.long 0x04 19. " USBOP_RPU_OVRD_VAL ,USBOP RPU OVRD VAL" "No,Yes" bitfld.long 0x04 18. " USBOP_RPU_OVRD ,USBOP RPU OVRD" "No,Yes" bitfld.long 0x04 17. " USBOP_RPD_OVRD_VAL ,USBOP RPD OVRD VAL" "No,Yes" bitfld.long 0x04 16. " USBOP_RPD_OVRD ,USBOP RPD OVRD" "No,Yes" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 11.--12. " VREG_DIR ,VREG DIR" "0,1,2,3" textline " " endif bitfld.long 0x04 9.--10. " VREG_DYN_DLY ,VREG DYN DLY" "0,1,2,3" bitfld.long 0x04 7.--8. " VREG_LEV ,VREG LEV" "0,1,2,3" sif (cpuis("TEGRAX2")) bitfld.long 0x04 6. " PD_VREG ,PD VREG" "0,1" else bitfld.long 0x04 6. " VREG_FIX18 ,VREG FIX18" "0,1" endif bitfld.long 0x04 4. " DIV_DET_EN ,DIV DET EN" "No,Yes" textline " " rbitfld.long 0x04 3. " VOP_DIV2P7_DET ,VOP DIV2P7 DET" "No,Yes" rbitfld.long 0x04 2. " VOP_DIV2P0_DET ,VOP DIV2P0 DET" "No,Yes" rbitfld.long 0x04 1. " VON_DIV2P7_DET ,VON DIV2P7 DET" "No,Yes" rbitfld.long 0x04 0. " VON_DIV2P0_DET ,VON DIV2P0 DET" "No,Yes" line.long 0x08 "OTG_PAD1_CTL_0_0,OTG PAD1 CTL0 Static Settings" bitfld.long 0x08 29. " PD_ZI ,PD ZI" "0,1" bitfld.long 0x08 28. " PD2_OVRD_EN ,PD2 OVRD EN" "0,1" bitfld.long 0x08 27. " PD2 ,PD2" "0,1" bitfld.long 0x08 26. " PD ,PD" "0,1" textline " " bitfld.long 0x08 25. " TERM_SEL ,TERM SEL" "0,1" bitfld.long 0x08 21.--24. " LS_FSLEW ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 17.--20. " LS_RSLEW ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 13.--16. " FS_FSLEW ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 9.--12. " FS_RSLEW ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 6.--8. " HS_SLEW ,HS SLEW" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--5. " HS_CURR_LEVEL ,HS CURR LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "OTG_PAD1_CTL_1_0,OTG PAD1 CTL1 Static Settings" bitfld.long 0x0C 26.--30. " RPD_CTRL ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x0C 25. " RPU_STATUS_HIGH ,RPU STATUS HIGH" "0,1" bitfld.long 0x0C 24. " RPU_SWITCH_LOW ,RPU SWITCH LOW" "0,1" bitfld.long 0x0C 23. " RPU_SWITCH_OVRD ,RPU SWITCH OVRD" "0,1" textline " " bitfld.long 0x0C 22. " HS_LOOPBACK_OVRD_VAL ,HS LOOPBACK OVRD VAL" "0,1" bitfld.long 0x0C 21. " HS_LOOPBACK_OVRD_EN ,HS LOOPBACK OVRD EN" "0,1" bitfld.long 0x0C 17.--20. " PTERM_RANGE_ADJ ,PTERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16. " PD_DISC_OVRD_VAL ,PD DISC OVRD VAL" "0,1" textline " " bitfld.long 0x0C 15. " PD_CHRP_OVRD_VAL ,PD CHRP OVRD VAL" "0,1" sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 13.--14. " RPU_RANGE_ADJ ,RPU RANGE ADJ" "0,1,2,3" bitfld.long 0x0C 11.--12. " HS_COUP_EN ,HS COUP EN" "0,1,2,3" bitfld.long 0x0C 7.--10. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x0C 11.--12. " HS_COUP_EN ,HS COUP EN" "0,1,2,3" bitfld.long 0x0C 7.--10. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif textline " " bitfld.long 0x0C 3.--6. " TERM_RANGE_ADJ ,TERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 2. " PD_DR ,PD DR" "0,1" bitfld.long 0x0C 1. " PD_DISC_OVRD ,PD DISC OVRD" "0,1" bitfld.long 0x0C 0. " PD_CHRP_OVRD ,PD CHRP OVRD" "0,1" sif (cpuis("TEGRAX2")) group.long (0xC0+0x10)++0x07 line.long 0x00 "USB2_OTG_PAD1_CTL_2_0,USB2 OTG PAD1 CTL 2 0" bitfld.long 0x00 28.--31. " SPARE_AO ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " TCTRL_SW ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 17. " TCTRL_TRK_OVRD ,TCTRL TRK OVRD" "No override,Override" bitfld.long 0x00 16. " PCTRL_TRK_OVRD ,PCTRL TRK OVRD" "No override,Override" textline " " bitfld.long 0x00 10.--15. " TCTRL_TRK ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--9. " PCTRL_TRK ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 1. " RPU_HIGH_FIXED ,RPU HIGH FIXED" "Not fixed,Fixed" bitfld.long 0x00 0. " RPU_AUTO_SWITCH_EN ,RPU AUTO SWITCH EN" "Disabled,Enabled" line.long 0x04 "USB2_OTG_PAD1_CTL_3_0,USB2 OTG PAD1 CTL 3 0" bitfld.long 0x04 6.--8. " HS_RXEQ ,HS RXEQ" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--3. " HS_TXEQ ,HS TXEQ" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " HS_DIN_DLY_SEL ,HS DIN DLY SEL" "Not selected,Selected" endif group.long 0x100++0x0F line.long 0x00 "BATTERY_CHRG_OTGPAD2_CTL0_0,BATTERY CHRG OTGPAD2 CTL0 0" bitfld.long 0x00 31. " GENERATE_SRP ,GENERATE SRP" "No,Yes" bitfld.long 0x00 30. " SRP_INTR_EN ,SRP INTR EN" "No,Yes" bitfld.long 0x00 29. " SRP_DETECTED ,SRP DETECTED" "No,Yes" bitfld.long 0x00 28. " SRP_DETECT_EN ,SRP DETECT EN" "No,Yes" textline " " bitfld.long 0x00 27. " DCD_INTR_EN ,DCD INTR EN" "No,Yes" bitfld.long 0x00 26. " DCD_DETECTED ,DCD DETECTED" "No,Yes" bitfld.long 0x00 25. " ZIN_FILTER_EN ,ZIN FILTER EN" "No,Yes" bitfld.long 0x00 24. " ZIN_CHNG_INTR_EN ,ZIN CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 23. " ZIN_ST_CHNG ,ZIN ST CHNG" "No,Yes" rbitfld.long 0x00 22. " ZIN ,ZIN" "No,Yes" bitfld.long 0x00 21. " ZIP_FILTER_EN ,ZIP FILTER EN" "No,Yes" bitfld.long 0x00 20. " ZIP_CHNG_INTR_EN ,ZIP CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 19. " ZIP_ST_CHNG ,ZIP ST CHNG" "No,Yes" rbitfld.long 0x00 18. " ZIP ,ZIP" "No,Yes" bitfld.long 0x00 13. " OP_I_SRC_EN ,OP I SRC EN" "No,Yes" bitfld.long 0x00 12. " ON_SRC_EN ,ON SRC EN" "No,Yes" textline " " bitfld.long 0x00 11. " ON_SINK_EN ,ON SINK EN" "No,Yes" bitfld.long 0x00 10. " OP_SRC_EN ,OP SRC EN" "No,Yes" bitfld.long 0x00 9. " OP_SINK_EN ,OP SINK EN" "No,Yes" bitfld.long 0x00 8. " VDAT_DET_FILTER_EN ,VDAT DET FILTER EN" "No,Yes" textline " " bitfld.long 0x00 7. " VDAT_DET_CHNG_INTR_EN ,VDAT DET CHNG INTR EN" "No,Yes" bitfld.long 0x00 6. " VDAT_DET_ST_CHNG ,VDAT DET ST CHNG" "No,Yes" rbitfld.long 0x00 5. " VDAT_DET ,VDAT DET" "No,Yes" bitfld.long 0x00 4. " VDCD_DET_FILTER_EN ,VDCD DET FILTER EN" "No,Yes" textline " " bitfld.long 0x00 3. " VDCD_DET_CHNG_INTR_EN ,VDCD DET CHNG INTR EN" "No,Yes" bitfld.long 0x00 2. " VDCD_DET_ST_CHNG ,VDCD DET ST CHNG" "No,Yes" rbitfld.long 0x00 1. " VDCD_DET ,VDCD DET" "No,Yes" bitfld.long 0x00 0. " PD_CHG ,PD CHG" "No,Yes" line.long 0x04 "BATTERY_CHRG_OTGPAD2_CTL1_0,BATTERY CHRG OTGPAD2 CTL1 0" bitfld.long 0x04 23. " USBON_RPU_OVRD_VAL ,USBON RPU OVRD VAL" "No,Yes" bitfld.long 0x04 22. " USBON_RPU_OVRD ,USBON RPU OVRD" "No,Yes" bitfld.long 0x04 21. " USBON_RPD_OVRD_VAL ,USBON RPD OVRD VAL" "No,Yes" bitfld.long 0x04 20. " USBON_RPD_OVRD ,USBON RPD OVRD" "No,Yes" textline " " bitfld.long 0x04 19. " USBOP_RPU_OVRD_VAL ,USBOP RPU OVRD VAL" "No,Yes" bitfld.long 0x04 18. " USBOP_RPU_OVRD ,USBOP RPU OVRD" "No,Yes" bitfld.long 0x04 17. " USBOP_RPD_OVRD_VAL ,USBOP RPD OVRD VAL" "No,Yes" bitfld.long 0x04 16. " USBOP_RPD_OVRD ,USBOP RPD OVRD" "No,Yes" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 11.--12. " VREG_DIR ,VREG DIR" "0,1,2,3" textline " " endif bitfld.long 0x04 9.--10. " VREG_DYN_DLY ,VREG DYN DLY" "0,1,2,3" bitfld.long 0x04 7.--8. " VREG_LEV ,VREG LEV" "0,1,2,3" sif (cpuis("TEGRAX2")) bitfld.long 0x04 6. " PD_VREG ,PD VREG" "0,1" else bitfld.long 0x04 6. " VREG_FIX18 ,VREG FIX18" "0,1" endif bitfld.long 0x04 4. " DIV_DET_EN ,DIV DET EN" "No,Yes" textline " " rbitfld.long 0x04 3. " VOP_DIV2P7_DET ,VOP DIV2P7 DET" "No,Yes" rbitfld.long 0x04 2. " VOP_DIV2P0_DET ,VOP DIV2P0 DET" "No,Yes" rbitfld.long 0x04 1. " VON_DIV2P7_DET ,VON DIV2P7 DET" "No,Yes" rbitfld.long 0x04 0. " VON_DIV2P0_DET ,VON DIV2P0 DET" "No,Yes" line.long 0x08 "OTG_PAD2_CTL_0_0,OTG PAD2 CTL0 Static Settings" bitfld.long 0x08 29. " PD_ZI ,PD ZI" "0,1" bitfld.long 0x08 28. " PD2_OVRD_EN ,PD2 OVRD EN" "0,1" bitfld.long 0x08 27. " PD2 ,PD2" "0,1" bitfld.long 0x08 26. " PD ,PD" "0,1" textline " " bitfld.long 0x08 25. " TERM_SEL ,TERM SEL" "0,1" bitfld.long 0x08 21.--24. " LS_FSLEW ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 17.--20. " LS_RSLEW ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 13.--16. " FS_FSLEW ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 9.--12. " FS_RSLEW ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 6.--8. " HS_SLEW ,HS SLEW" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--5. " HS_CURR_LEVEL ,HS CURR LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "OTG_PAD2_CTL_1_0,OTG PAD2 CTL1 Static Settings" bitfld.long 0x0C 26.--30. " RPD_CTRL ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x0C 25. " RPU_STATUS_HIGH ,RPU STATUS HIGH" "0,1" bitfld.long 0x0C 24. " RPU_SWITCH_LOW ,RPU SWITCH LOW" "0,1" bitfld.long 0x0C 23. " RPU_SWITCH_OVRD ,RPU SWITCH OVRD" "0,1" textline " " bitfld.long 0x0C 22. " HS_LOOPBACK_OVRD_VAL ,HS LOOPBACK OVRD VAL" "0,1" bitfld.long 0x0C 21. " HS_LOOPBACK_OVRD_EN ,HS LOOPBACK OVRD EN" "0,1" bitfld.long 0x0C 17.--20. " PTERM_RANGE_ADJ ,PTERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16. " PD_DISC_OVRD_VAL ,PD DISC OVRD VAL" "0,1" textline " " bitfld.long 0x0C 15. " PD_CHRP_OVRD_VAL ,PD CHRP OVRD VAL" "0,1" sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 13.--14. " RPU_RANGE_ADJ ,RPU RANGE ADJ" "0,1,2,3" bitfld.long 0x0C 11.--12. " HS_COUP_EN ,HS COUP EN" "0,1,2,3" bitfld.long 0x0C 7.--10. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x0C 11.--12. " HS_COUP_EN ,HS COUP EN" "0,1,2,3" bitfld.long 0x0C 7.--10. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif textline " " bitfld.long 0x0C 3.--6. " TERM_RANGE_ADJ ,TERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 2. " PD_DR ,PD DR" "0,1" bitfld.long 0x0C 1. " PD_DISC_OVRD ,PD DISC OVRD" "0,1" bitfld.long 0x0C 0. " PD_CHRP_OVRD ,PD CHRP OVRD" "0,1" sif (cpuis("TEGRAX2")) group.long (0x100+0x10)++0x07 line.long 0x00 "USB2_OTG_PAD2_CTL_2_0,USB2 OTG PAD2 CTL 2 0" bitfld.long 0x00 28.--31. " SPARE_AO ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " TCTRL_SW ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 17. " TCTRL_TRK_OVRD ,TCTRL TRK OVRD" "No override,Override" bitfld.long 0x00 16. " PCTRL_TRK_OVRD ,PCTRL TRK OVRD" "No override,Override" textline " " bitfld.long 0x00 10.--15. " TCTRL_TRK ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--9. " PCTRL_TRK ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 1. " RPU_HIGH_FIXED ,RPU HIGH FIXED" "Not fixed,Fixed" bitfld.long 0x00 0. " RPU_AUTO_SWITCH_EN ,RPU AUTO SWITCH EN" "Disabled,Enabled" line.long 0x04 "USB2_OTG_PAD2_CTL_3_0,USB2 OTG PAD2 CTL 3 0" bitfld.long 0x04 6.--8. " HS_RXEQ ,HS RXEQ" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--3. " HS_TXEQ ,HS TXEQ" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " HS_DIN_DLY_SEL ,HS DIN DLY SEL" "Not selected,Selected" endif group.long 0x140++0x0F line.long 0x00 "BATTERY_CHRG_OTGPAD3_CTL0_0,BATTERY CHRG OTGPAD3 CTL0 0" bitfld.long 0x00 31. " GENERATE_SRP ,GENERATE SRP" "No,Yes" bitfld.long 0x00 30. " SRP_INTR_EN ,SRP INTR EN" "No,Yes" bitfld.long 0x00 29. " SRP_DETECTED ,SRP DETECTED" "No,Yes" bitfld.long 0x00 28. " SRP_DETECT_EN ,SRP DETECT EN" "No,Yes" textline " " bitfld.long 0x00 27. " DCD_INTR_EN ,DCD INTR EN" "No,Yes" bitfld.long 0x00 26. " DCD_DETECTED ,DCD DETECTED" "No,Yes" bitfld.long 0x00 25. " ZIN_FILTER_EN ,ZIN FILTER EN" "No,Yes" bitfld.long 0x00 24. " ZIN_CHNG_INTR_EN ,ZIN CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 23. " ZIN_ST_CHNG ,ZIN ST CHNG" "No,Yes" rbitfld.long 0x00 22. " ZIN ,ZIN" "No,Yes" bitfld.long 0x00 21. " ZIP_FILTER_EN ,ZIP FILTER EN" "No,Yes" bitfld.long 0x00 20. " ZIP_CHNG_INTR_EN ,ZIP CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 19. " ZIP_ST_CHNG ,ZIP ST CHNG" "No,Yes" rbitfld.long 0x00 18. " ZIP ,ZIP" "No,Yes" bitfld.long 0x00 13. " OP_I_SRC_EN ,OP I SRC EN" "No,Yes" bitfld.long 0x00 12. " ON_SRC_EN ,ON SRC EN" "No,Yes" textline " " bitfld.long 0x00 11. " ON_SINK_EN ,ON SINK EN" "No,Yes" bitfld.long 0x00 10. " OP_SRC_EN ,OP SRC EN" "No,Yes" bitfld.long 0x00 9. " OP_SINK_EN ,OP SINK EN" "No,Yes" bitfld.long 0x00 8. " VDAT_DET_FILTER_EN ,VDAT DET FILTER EN" "No,Yes" textline " " bitfld.long 0x00 7. " VDAT_DET_CHNG_INTR_EN ,VDAT DET CHNG INTR EN" "No,Yes" bitfld.long 0x00 6. " VDAT_DET_ST_CHNG ,VDAT DET ST CHNG" "No,Yes" rbitfld.long 0x00 5. " VDAT_DET ,VDAT DET" "No,Yes" bitfld.long 0x00 4. " VDCD_DET_FILTER_EN ,VDCD DET FILTER EN" "No,Yes" textline " " bitfld.long 0x00 3. " VDCD_DET_CHNG_INTR_EN ,VDCD DET CHNG INTR EN" "No,Yes" bitfld.long 0x00 2. " VDCD_DET_ST_CHNG ,VDCD DET ST CHNG" "No,Yes" rbitfld.long 0x00 1. " VDCD_DET ,VDCD DET" "No,Yes" bitfld.long 0x00 0. " PD_CHG ,PD CHG" "No,Yes" line.long 0x04 "BATTERY_CHRG_OTGPAD3_CTL1_0,BATTERY CHRG OTGPAD3 CTL1 0" bitfld.long 0x04 23. " USBON_RPU_OVRD_VAL ,USBON RPU OVRD VAL" "No,Yes" bitfld.long 0x04 22. " USBON_RPU_OVRD ,USBON RPU OVRD" "No,Yes" bitfld.long 0x04 21. " USBON_RPD_OVRD_VAL ,USBON RPD OVRD VAL" "No,Yes" bitfld.long 0x04 20. " USBON_RPD_OVRD ,USBON RPD OVRD" "No,Yes" textline " " bitfld.long 0x04 19. " USBOP_RPU_OVRD_VAL ,USBOP RPU OVRD VAL" "No,Yes" bitfld.long 0x04 18. " USBOP_RPU_OVRD ,USBOP RPU OVRD" "No,Yes" bitfld.long 0x04 17. " USBOP_RPD_OVRD_VAL ,USBOP RPD OVRD VAL" "No,Yes" bitfld.long 0x04 16. " USBOP_RPD_OVRD ,USBOP RPD OVRD" "No,Yes" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 11.--12. " VREG_DIR ,VREG DIR" "0,1,2,3" textline " " endif bitfld.long 0x04 9.--10. " VREG_DYN_DLY ,VREG DYN DLY" "0,1,2,3" bitfld.long 0x04 7.--8. " VREG_LEV ,VREG LEV" "0,1,2,3" sif (cpuis("TEGRAX2")) bitfld.long 0x04 6. " PD_VREG ,PD VREG" "0,1" else bitfld.long 0x04 6. " VREG_FIX18 ,VREG FIX18" "0,1" endif bitfld.long 0x04 4. " DIV_DET_EN ,DIV DET EN" "No,Yes" textline " " rbitfld.long 0x04 3. " VOP_DIV2P7_DET ,VOP DIV2P7 DET" "No,Yes" rbitfld.long 0x04 2. " VOP_DIV2P0_DET ,VOP DIV2P0 DET" "No,Yes" rbitfld.long 0x04 1. " VON_DIV2P7_DET ,VON DIV2P7 DET" "No,Yes" rbitfld.long 0x04 0. " VON_DIV2P0_DET ,VON DIV2P0 DET" "No,Yes" line.long 0x08 "OTG_PAD3_CTL_0_0,OTG PAD3 CTL0 Static Settings" bitfld.long 0x08 29. " PD_ZI ,PD ZI" "0,1" bitfld.long 0x08 28. " PD2_OVRD_EN ,PD2 OVRD EN" "0,1" bitfld.long 0x08 27. " PD2 ,PD2" "0,1" bitfld.long 0x08 26. " PD ,PD" "0,1" textline " " bitfld.long 0x08 25. " TERM_SEL ,TERM SEL" "0,1" bitfld.long 0x08 21.--24. " LS_FSLEW ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 17.--20. " LS_RSLEW ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 13.--16. " FS_FSLEW ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 9.--12. " FS_RSLEW ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 6.--8. " HS_SLEW ,HS SLEW" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--5. " HS_CURR_LEVEL ,HS CURR LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "OTG_PAD3_CTL_1_0,OTG PAD3 CTL1 Static Settings" bitfld.long 0x0C 26.--30. " RPD_CTRL ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x0C 25. " RPU_STATUS_HIGH ,RPU STATUS HIGH" "0,1" bitfld.long 0x0C 24. " RPU_SWITCH_LOW ,RPU SWITCH LOW" "0,1" bitfld.long 0x0C 23. " RPU_SWITCH_OVRD ,RPU SWITCH OVRD" "0,1" textline " " bitfld.long 0x0C 22. " HS_LOOPBACK_OVRD_VAL ,HS LOOPBACK OVRD VAL" "0,1" bitfld.long 0x0C 21. " HS_LOOPBACK_OVRD_EN ,HS LOOPBACK OVRD EN" "0,1" bitfld.long 0x0C 17.--20. " PTERM_RANGE_ADJ ,PTERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16. " PD_DISC_OVRD_VAL ,PD DISC OVRD VAL" "0,1" textline " " bitfld.long 0x0C 15. " PD_CHRP_OVRD_VAL ,PD CHRP OVRD VAL" "0,1" sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 13.--14. " RPU_RANGE_ADJ ,RPU RANGE ADJ" "0,1,2,3" bitfld.long 0x0C 11.--12. " HS_COUP_EN ,HS COUP EN" "0,1,2,3" bitfld.long 0x0C 7.--10. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x0C 11.--12. " HS_COUP_EN ,HS COUP EN" "0,1,2,3" bitfld.long 0x0C 7.--10. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif textline " " bitfld.long 0x0C 3.--6. " TERM_RANGE_ADJ ,TERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 2. " PD_DR ,PD DR" "0,1" bitfld.long 0x0C 1. " PD_DISC_OVRD ,PD DISC OVRD" "0,1" bitfld.long 0x0C 0. " PD_CHRP_OVRD ,PD CHRP OVRD" "0,1" sif (cpuis("TEGRAX2")) group.long (0x140+0x10)++0x07 line.long 0x00 "USB2_OTG_PAD3_CTL_2_0,USB2 OTG PAD3 CTL 2 0" bitfld.long 0x00 28.--31. " SPARE_AO ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " TCTRL_SW ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 17. " TCTRL_TRK_OVRD ,TCTRL TRK OVRD" "No override,Override" bitfld.long 0x00 16. " PCTRL_TRK_OVRD ,PCTRL TRK OVRD" "No override,Override" textline " " bitfld.long 0x00 10.--15. " TCTRL_TRK ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--9. " PCTRL_TRK ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 1. " RPU_HIGH_FIXED ,RPU HIGH FIXED" "Not fixed,Fixed" bitfld.long 0x00 0. " RPU_AUTO_SWITCH_EN ,RPU AUTO SWITCH EN" "Disabled,Enabled" line.long 0x04 "USB2_OTG_PAD3_CTL_3_0,USB2 OTG PAD3 CTL 3 0" bitfld.long 0x04 6.--8. " HS_RXEQ ,HS RXEQ" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--3. " HS_TXEQ ,HS TXEQ" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " HS_DIN_DLY_SEL ,HS DIN DLY SEL" "Not selected,Selected" endif group.long 0x280++0x0B line.long 0x00 "BATTERY_CHRG_TDCD_DBNC_TIMER_0,BATTERY CHRG TDCD DBNC TIMER 0" bitfld.long 0x00 11.--16. " IDDIG_DBNC ,IDDIG DBNC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 0.--10. 1. " TDCD_DBNC ,TDCD DBNC" line.long 0x04 "BIAS_PAD_CTL_0_0,BIAS PAD CTL0 Static Settings" sif (!cpuis("TEGRAX2")) bitfld.long 0x04 29. " TRK_PWR_ENA ,TRK PWR ENA" "0,1" textline " " endif bitfld.long 0x04 25.--28. " SPARE ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 21.--24. " CHG_DIV ,CHG DIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 18.--20. " TEMP_COEF ,TEMP COEF" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15.--17. " VREF_CTRL ,VREF CTRL" "0,1,2,3,4,5,6,7" textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x04 12.--14. " ADJRPU ,ADJRPU" "0,1,2,3,4,5,6,7" textline " " endif bitfld.long 0x04 11. " PD ,PD" "0,1" textline " " bitfld.long 0x04 8.--10. " TERM_OFFSET ,TERM OFFSET" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. " HS_CHIRP_LEVEL ,HS CHIRP LEVEL" "0,1,2,3" bitfld.long 0x04 3.--5. " HS_DISCON_LEVEL ,HS DISCON LEVEL" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " HS_SQUELCH_LEVEL ,HS SQUELCH LEVEL" "0,1,2,3,4,5,6,7" line.long 0x08 "BIAS_PAD_CTL_1_0,BIASPAD CTL1 Static Settings" bitfld.long 0x08 30. " FORCE_TRK_CLK_EN ,FORCE TRK CLK EN" "0,1" bitfld.long 0x08 29. " TRK_SW_OVRD ,TRK SW OVRD" "0,1" rbitfld.long 0x08 28. " TRK_DONE ,TRK DONE" "0,1" bitfld.long 0x08 27. " TRK_START ,TRK START" "0,1" textline " " bitfld.long 0x08 26. " PD_TRK ,PD TRK" "0,1" hexmask.long.byte 0x08 19.--25. 1. " TRK_DONE_RESET_TIMER ,TRK DONE RESET TIMER" hexmask.long.byte 0x08 12.--18. 1. " TRK_START_TIMER ,TRK START TIMER" rbitfld.long 0x08 6.--11. " PCTRL ,PCTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " rbitfld.long 0x08 0.--5. " TCTRL ,TCTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end tree "HSIC Registers" group.long 0x300++0x0B line.long 0x00 "PAD0_CTL_0_0,HSIC PAD0 CTL0" bitfld.long 0x00 18. " RPU_STROBE ,RPU STROBE" "0,1" bitfld.long 0x00 17. " RPU_DATA1 ,RPU DATA1" "0,1" bitfld.long 0x00 16. " RPU_DATA0 ,RPU DATA0" "0,1" bitfld.long 0x00 15. " RPD_STROBE ,RPD STROBE" "0,1" textline " " bitfld.long 0x00 14. " RPD_DATA1 ,RPD DATA1" "0,1" bitfld.long 0x00 13. " RPD_DATA0 ,RPD DATA0" "0,1" bitfld.long 0x00 12. " LPBK_STROBE ,LPBK STROBE" "0,1" bitfld.long 0x00 11. " LPBK_DATA1 ,LPBK DATA1" "0,1" textline " " bitfld.long 0x00 10. " LPBK_DATA0 ,LPBK DATA0" "0,1" bitfld.long 0x00 9. " PD_ZI_STROBE ,PD ZI STROBE" "0,1" bitfld.long 0x00 8. " PD_ZI_DATA1 ,PD ZI DATA1" "0,1" bitfld.long 0x00 7. " PD_ZI_DATA0 ,PD ZI DATA0" "0,1" textline " " bitfld.long 0x00 6. " PD_RX_STROBE ,PD RX STROBE" "0,1" bitfld.long 0x00 5. " PD_RX_DATA1 ,PD RX DATA1" "0,1" bitfld.long 0x00 4. " PD_RX_DATA0 ,PD RX DATA0" "0,1" bitfld.long 0x00 3. " PD_TX_STROBE ,PD TX STROBE" "0,1" textline " " bitfld.long 0x00 2. " PD_TX_DATA1 ,PD TX DATA1" "0,1" bitfld.long 0x00 1. " PD_TX_DATA0 ,PD TX DATA0" "0,1" bitfld.long 0x00 0. " IDDQ ,IDDQ" "0,1" line.long 0x04 "PAD0_CTL_1_0,HSIC PAD0 CTL1" sif (cpuis("TEGRAX2")) bitfld.long 0x04 25.--26. " HSIC_AO_OPT ,HSIC AO OPT" "0,1,2,3" bitfld.long 0x04 23. " RX_REC_SEL ,RX REC SEL" "0,1" bitfld.long 0x04 20.--21. " TRACK_RES_SEL ,TRACK RES SEL" "0,1,2,3" bitfld.long 0x04 17.--18. " BUS_KEEPER_RES_SEL ,BUS KEEPER RES SEL" "0,1,2,3" textline " " endif bitfld.long 0x04 12.--16. " RTERM ,RTERM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--11. " HSIC_OPT ,HSIC OPT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " TX_SLEW ,TX SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " TX_RTUNEP ,TX RTUNEP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "PAD0_CTL_2_0,HSIC PAD0 CTL2" bitfld.long 0x08 8.--11. " RX_STROBE_TRIM ,RX STROBE TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " RX_DATA1_TRIM ,RX DATA1 TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " RX_DATA0_TRIM ,RX DATA0 TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x320++0x0B line.long 0x00 "PAD1_CTL_0_0,HSIC PAD1 CTL0" bitfld.long 0x00 18. " RPU_STROBE ,RPU STROBE" "0,1" bitfld.long 0x00 17. " RPU_DATA1 ,RPU DATA1" "0,1" bitfld.long 0x00 16. " RPU_DATA0 ,RPU DATA0" "0,1" bitfld.long 0x00 15. " RPD_STROBE ,RPD STROBE" "0,1" textline " " bitfld.long 0x00 14. " RPD_DATA1 ,RPD DATA1" "0,1" bitfld.long 0x00 13. " RPD_DATA0 ,RPD DATA0" "0,1" bitfld.long 0x00 12. " LPBK_STROBE ,LPBK STROBE" "0,1" bitfld.long 0x00 11. " LPBK_DATA1 ,LPBK DATA1" "0,1" textline " " bitfld.long 0x00 10. " LPBK_DATA0 ,LPBK DATA0" "0,1" bitfld.long 0x00 9. " PD_ZI_STROBE ,PD ZI STROBE" "0,1" bitfld.long 0x00 8. " PD_ZI_DATA1 ,PD ZI DATA1" "0,1" bitfld.long 0x00 7. " PD_ZI_DATA0 ,PD ZI DATA0" "0,1" textline " " bitfld.long 0x00 6. " PD_RX_STROBE ,PD RX STROBE" "0,1" bitfld.long 0x00 5. " PD_RX_DATA1 ,PD RX DATA1" "0,1" bitfld.long 0x00 4. " PD_RX_DATA0 ,PD RX DATA0" "0,1" bitfld.long 0x00 3. " PD_TX_STROBE ,PD TX STROBE" "0,1" textline " " bitfld.long 0x00 2. " PD_TX_DATA1 ,PD TX DATA1" "0,1" bitfld.long 0x00 1. " PD_TX_DATA0 ,PD TX DATA0" "0,1" bitfld.long 0x00 0. " IDDQ ,IDDQ" "0,1" line.long 0x04 "PAD1_CTL_1_0,HSIC PAD1 CTL1" sif (cpuis("TEGRAX2")) bitfld.long 0x04 25.--26. " HSIC_AO_OPT ,HSIC AO OPT" "0,1,2,3" bitfld.long 0x04 23. " RX_REC_SEL ,RX REC SEL" "0,1" bitfld.long 0x04 20.--21. " TRACK_RES_SEL ,TRACK RES SEL" "0,1,2,3" bitfld.long 0x04 17.--18. " BUS_KEEPER_RES_SEL ,BUS KEEPER RES SEL" "0,1,2,3" textline " " endif bitfld.long 0x04 12.--16. " RTERM ,RTERM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--11. " HSIC_OPT ,HSIC OPT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " TX_SLEW ,TX SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " TX_RTUNEP ,TX RTUNEP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "PAD1_CTL_2_0,HSIC PAD1 CTL2" bitfld.long 0x08 8.--11. " RX_STROBE_TRIM ,RX STROBE TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " RX_DATA1_TRIM ,RX DATA1 TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " RX_DATA0_TRIM ,RX DATA0 TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x340++0x07 line.long 0x00 "PAD_TRK_CTL_0,PAD TRK CTL 0" bitfld.long 0x00 24. " AUTO_RTERM_EN ,AUTO RTERM EN" "0,1" bitfld.long 0x00 23. " FORCE_TRK_CLK_EN ,FORCE TRK CLK EN" "0,1" bitfld.long 0x00 22. " TRK_SW_OVRD ,TRK SW OVRD" "0,1" rbitfld.long 0x00 21. " TRK_DONE ,TRK DONE" "0,1" textline " " bitfld.long 0x00 20. " TRK_START ,TRK START" "0,1" bitfld.long 0x00 19. " PD_TRK ,PD TRK" "0,1" hexmask.long.byte 0x00 12.--18. 1. " TRK_DONE_RESET_TIMER ,TRK DONE RESET TIMER" hexmask.long.byte 0x00 5.--11. 1. " TRK_START_TIMER ,TRK START TIMER" textline " " rbitfld.long 0x00 0.--4. " RTERM_OUT ,RTERM OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "STRB_TRIM_CONTROL_0,HSIC STROBE Trimmer Control" sif (cpuis("TEGRAX2")) hexmask.long.byte 0x04 0.--6. 1. " STRB_TRIM_VAL ,STRB TRIM VAL" else bitfld.long 0x04 0.--5. " STRB_TRIM_VAL ,STRB TRIM VAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif tree.end sif (!cpuis("TEGRAX2")) tree "UPHY_PLL registers" group.long 0x360++0x2B line.long 0x00 "P0_CTL_1_0,P0 CTL 1 0" bitfld.long 0x00 28.--29. " PLL0_FREQ_PSDIV ,PLL0 FREQ PSDIV" "0,1,2,3" hexmask.long.byte 0x00 20.--27. 1. " PLL0_FREQ_NDIV ,PLL0 FREQ NDIV" bitfld.long 0x00 16.--17. " PLL0_FREQ_MDIV ,PLL0 FREQ MDIV" "0,1,2,3" rbitfld.long 0x00 15. " PLL0_LOCKDET_STATUS ,PLL0 LOCKDET STATUS" "0,1" textline " " bitfld.long 0x00 8.--9. " PLL0_MODE ,PLL0 MODE" "0,1,2,3" bitfld.long 0x00 7. " PLL0_BYPASS_EN ,PLL0 BYPASS EN" "0,1" bitfld.long 0x00 6. " PLL0_FREERUN_EN ,PLL0 FREERUN EN" "0,1" bitfld.long 0x00 4. " PLL0_PWR_OVRD ,PLL0 PWR OVRD" "0,1" textline " " bitfld.long 0x00 3. " PLL0_ENABLE ,PLL0 ENABLE" "0,1" bitfld.long 0x00 1.--2. " PLL0_SLEEP ,PLL0 SLEEP" "0,1,2,3" bitfld.long 0x00 0. " PLL0_IDDQ ,PLL0 IDDQ" "0,1" line.long 0x04 "P0_CTL_2_0,P0 CTL 2 0" hexmask.long.tbyte 0x04 4.--27. 1. " PLL0_CAL_CTRL ,PLL0 CAL CTRL" bitfld.long 0x04 3. " PLL0_CAL_RESET ,PLL0 CAL RESET" "0,1" bitfld.long 0x04 2. " PLL0_CAL_OVRD ,PLL0 CAL OVRD" "0,1" bitfld.long 0x04 1. " PLL0_CAL_DONE ,PLL0 CAL DONE" "0,1" textline " " bitfld.long 0x04 0. " PLL0_CAL_EN ,PLL0 CAL EN" "0,1" line.long 0x08 "P0_CTL_3_0,P0 CTL 3 0" hexmask.long.tbyte 0x08 4.--27. 1. " PLL0_LOCKDET_CTRL ,PLL0 LOCKDET CTRL" bitfld.long 0x08 0. " PLL0_LOCKDET_RESET ,PLL0 LOCKDET RESET" "0,1" line.long 0x0C "P0_CTL_4_0,P0 CTL 4 0" bitfld.long 0x0C 28. " PLL0_TCLKOUT_EN ,PLL0 TCLKOUT EN" "0,1" bitfld.long 0x0C 20.--23. " PLL0_CLKDIST_CTRL ,PLL0 CLKDIST CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 19. " PLL0_XDIGCLK_EN ,PLL0 XDIGCLK EN" "0,1" bitfld.long 0x0C 16.--18. " PLL0_XDIGCLK_SEL ,PLL0 XDIGCLK SEL" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 15. " PLL0_TXCLKREF_EN ,PLL0 TXCLKREF EN" "0,1" bitfld.long 0x0C 12.--13. " PLL0_TXCLKREF_SEL ,PLL0 TXCLKREF SEL" "0,1,2,3" bitfld.long 0x0C 9. " PLL0_FBCLKBUF_EN ,PLL0 FBCLKBUF EN" "0,1" bitfld.long 0x0C 8. " PLL0_REFCLKBUF_EN ,PLL0 REFCLKBUF EN" "0,1" textline " " bitfld.long 0x0C 4.--7. " PLL0_REFCLK_SEL ,PLL0 REFCLK SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0. " PLL0_REFCLK_TERM100 ,PLL0 REFCLK TERM100" "0,1" line.long 0x10 "P0_CTL_5_0,P0 CTL 5 0" hexmask.long.byte 0x10 16.--23. 1. " PLL0_DCO_CTRL ,PLL0 DCO CTRL" hexmask.long.byte 0x10 8.--15. 1. " PLL0_LPF_CTRL ,PLL0 LPF CTRL" bitfld.long 0x10 4.--7. " PLL0_CP_CTRL ,PLL0 CP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--1. " PLL0_PFD_CTRL ,PLL0 PFD CTRL" "0,1,2,3" line.long 0x14 "P0_CTL_6_0,P0 CTL 6 0" bitfld.long 0x14 31. " PLL0_FSEL_LOAD ,PLL0 FSEL LOAD" "0,1" bitfld.long 0x14 29. " PLL0_FSEL_COARSE_OVRD ,PLL0 FSEL COARSE OVRD" "0,1" bitfld.long 0x14 28. " PLL0_FSEL_FINE_OVRD ,PLL0 FSEL FINE OVRD" "0,1" hexmask.long.byte 0x14 20.--26. 1. " PLL0_FSEL_COARSE ,PLL0 FSEL COARSE" textline " " hexmask.long.tbyte 0x14 0.--19. 1. " PLL0_FSEL_FINE ,PLL0 FSEL FINE" line.long 0x18 "P0_CTL_7_0,P0 CTL 7 0" hexmask.long.tbyte 0x18 0.--23. 1. " PLL0_VREG_CTRL ,PLL0 VREG CTRL" line.long 0x1C "P0_CTL_8_0,P0 CTL 8 0" rbitfld.long 0x1C 31. " PLL0_RCAL_DONE ,PLL0 RCAL DONE" "0,1" rbitfld.long 0x1C 24.--28. " PLL0_RCAL_VAL ,PLL0 RCAL VAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 23. " PLL0_RCAL_BYP_EN ,PLL0 RCAL BYP EN" "0,1" bitfld.long 0x1C 16.--20. " PLL0_RCAL_BYP_CODE ,PLL0 RCAL BYP CODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x1C 15. " PLL0_RCAL_OVRD ,PLL0 RCAL OVRD" "0,1" bitfld.long 0x1C 13. " PLL0_RCAL_CLK_EN ,PLL0 RCAL CLK EN" "0,1" bitfld.long 0x1C 12. " PLL0_RCAL_EN ,PLL0 RCAL EN" "0,1" hexmask.long.word 0x1C 0.--11. 1. " PLL0_BGAP_CTRL ,PLL0 BGAP CTRL" line.long 0x20 "P0_CTL_9_0,P0 CTL 9 0" hexmask.long.word 0x20 16.--31. 1. " PLL0_MISC_OUT ,PLL0 MISC OUT" hexmask.long.word 0x20 0.--15. 1. " PLL0_MISC_CTRL ,PLL0 MISC CTRL" line.long 0x24 "P0_CTL_10_0,P0 CTL 10 0" bitfld.long 0x24 27. " PLL0_CFG_RESET ,PLL0 CFG RESET" "0,1" bitfld.long 0x24 25. " PLL0_CFG_RS ,PLL0 CFG RS" "0,1" bitfld.long 0x24 24. " PLL0_CFG_WS ,PLL0 CFG WS" "0,1" hexmask.long.byte 0x24 16.--23. 0x01 " PLL0_CFG_ADDR ,PLL0 CFG ADDR" textline " " hexmask.long.word 0x24 0.--15. 1. " PLL0_CFG_WDATA ,PLL0 CFG WDATA" line.long 0x28 "P0_CTL_11_0,P0 CTL 11 0" hexmask.long.word 0x28 0.--15. 1. " PLL0_CFG_RDATA ,PLL0 CFG RDATA" tree.end tree "UPHY_MISC registers" group.long 0x460++0x23 line.long 0x00 "PAD_P0_CTL_1_0,PAD P0 CTL 1 0" rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE ,AUX RX STAT IDLE" "0,1,2,3" bitfld.long 0x00 26. " AUX_RX_IDLE_BYP ,AUX RX IDLE BYP" "0,1" bitfld.long 0x00 24.--25. " AUX_RX_IDLE_TH ,AUX RX IDLE TH" "0,1,2,3" bitfld.long 0x00 22. " AUX_RX_IDLE_EN ,AUX RX IDLE EN" "0,1" textline " " bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE ,AUX RX IDLE MODE" "0,1,2,3" bitfld.long 0x00 19. " AUX_RX_TERM_MODE ,AUX RX TERM MODE" "0,1" bitfld.long 0x00 18. " AUX_RX_TERM_EN ,AUX RX TERM EN" "0,1" bitfld.long 0x00 17. " AUX_RX_IDDQ_OVRD ,AUX RX IDDQ OVRD" "0,1" textline " " bitfld.long 0x00 16. " AUX_RX_IDDQ ,AUX RX IDDQ" "0,1" bitfld.long 0x00 13. " AUX_RX_MODE_OVRD ,AUX RX MODE OVRD" "0,1" bitfld.long 0x00 12. " AUX_TX_MODE_OVRD ,AUX TX MODE OVRD" "0,1" rbitfld.long 0x00 7. " AUX_TX_RDET_STATUS ,AUX TX RDET STATUS" "0,1" textline " " bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN ,AUX TX RDET CLK EN" "0,1" bitfld.long 0x00 5. " AUX_TX_RDET_BYP ,AUX TX RDET BYP" "0,1" bitfld.long 0x00 4. " AUX_TX_RDET_EN ,AUX TX RDET EN" "0,1" bitfld.long 0x00 2. " AUX_TX_TERM_EN ,AUX TX TERM EN" "0,1" textline " " bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD ,AUX TX IDDQ OVRD" "0,1" bitfld.long 0x00 0. " AUX_TX_IDDQ ,AUX TX IDDQ" "0,1" line.long 0x04 "PAD_P0_CTL_2_0,PAD P0 CTL 2 0" bitfld.long 0x04 31. " RX_RATE_PLL_OVRD ,RX RATE PLL OVRD" "0,1" bitfld.long 0x04 30. " TX_RATE_PLL_OVRD ,TX RATE PLL OVRD" "0,1" bitfld.long 0x04 29. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x04 28. " TX_RATE_PLL ,TX RATE PLL" "0,1" textline " " bitfld.long 0x04 25. " RX_PWR_OVRD ,RX PWR OVRD" "0,1" bitfld.long 0x04 24. " TX_PWR_OVRD ,TX PWR OVRD" "0,1" bitfld.long 0x04 22.--23. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x04 20.--21. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x04 16.--17. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x04 15. " RX_DATA_EN ,RX DATA EN" "0,1" bitfld.long 0x04 12.--13. " RX_SLEEP ,RX SLEEP" "0,1,2,3" textline " " bitfld.long 0x04 9. " RX_IDDQ_OVRD ,RX IDDQ OVRD" "0,1" bitfld.long 0x04 8. " RX_IDDQ ,RX IDDQ" "0,1" bitfld.long 0x04 7. " TX_DATA_EN ,TX DATA EN" "0,1" bitfld.long 0x04 6. " TX_DATA_READY ,TX DATA READY" "0,1" textline " " bitfld.long 0x04 4.--5. " TX_SLEEP ,TX SLEEP" "0,1,2,3" bitfld.long 0x04 1. " TX_IDDQ_OVRD ,TX IDDQ OVRD" "0,1" bitfld.long 0x04 0. " TX_IDDQ ,TX IDDQ" "0,1" line.long 0x08 "PAD_P0_CTL_3_0,PAD P0 CTL 3 0" bitfld.long 0x08 16.--19. " RX_BYP_CTRL ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 15. " RX_BYP_OVRD ,RX BYP OVRD" "0,1" bitfld.long 0x08 14. " RX_BYP_EN ,RX BYP EN" "0,1" bitfld.long 0x08 12.--13. " RX_BYP_MODE ,RX BYP MODE" "0,1,2,3" textline " " bitfld.long 0x08 11. " RX_BYP_REFCLK_EN ,RX BYP REFCLK EN" "0,1" rbitfld.long 0x08 8.--9. " RX_BYP_DATA ,RX BYP DATA" "0,1,2,3" bitfld.long 0x08 7. " TX_BYP_OVRD ,TX BYP OVRD" "0,1" bitfld.long 0x08 6. " TX_BYP_EN ,TX BYP EN" "0,1" textline " " bitfld.long 0x08 4.--5. " TX_BYP_MODE ,TX BYP MODE" "0,1,2,3" bitfld.long 0x08 0.--1. " TX_BYP_DATA ,TX BYP DATA" "0,1,2,3" line.long 0x0C "PAD_P0_CTL_4_0,PAD P0 CTL 4 0" bitfld.long 0x0C 23. " RX_TERM_OVRD ,RX TERM OVRD" "0,1" bitfld.long 0x0C 21. " RX_TERM_EN ,RX TERM EN" "0,1" bitfld.long 0x0C 20. " RX_TERM_MODE ,RX TERM MODE" "0,1" bitfld.long 0x0C 19. " TX_TERM_OVRD ,TX TERM OVRD" "0,1" textline " " bitfld.long 0x0C 16. " TX_TERM_MODE ,TX TERM MODE" "0,1" bitfld.long 0x0C 11. " RX_CDR_RESET_OVRD ,RX CDR RESET OVRD" "0,1" bitfld.long 0x0C 10. " RX_CDR_RESET ,RX CDR RESET" "0,1" bitfld.long 0x0C 9. " TX_SYNC_OVRD ,TX SYNC OVRD" "0,1" textline " " bitfld.long 0x0C 8. " TX_SYNC ,TX SYNC" "0,1" bitfld.long 0x0C 4. " TX_SYNC_MODE ,TX SYNC MODE" "0,1" bitfld.long 0x0C 0.--3. " TX_SYNC_DLY ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "PAD_P0_CTL_5_0,PAD P0 CTL 5 0" hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS ,RX EOM STATUS" bitfld.long 0x10 15. " RX_CEE_OVRD ,RX CEE OVRD" "0,1" rbitfld.long 0x10 9. " RX_EOM_DONE ,RX EOM DONE" "0,1" bitfld.long 0x10 8. " RX_EOM_EN ,RX EOM EN" "0,1" textline " " bitfld.long 0x10 7. " RX_EQ_RESET ,RX EQ RESET" "0,1" rbitfld.long 0x10 5. " RX_EQ_TRAIN_DONE ,RX EQ TRAIN DONE" "0,1" bitfld.long 0x10 4. " RX_EQ_TRAIN_EN ,RX EQ TRAIN EN" "0,1" rbitfld.long 0x10 1. " RX_CAL_DONE ,RX CAL DONE" "0,1" textline " " bitfld.long 0x10 0. " RX_CAL_EN ,RX CAL EN" "0,1" line.long 0x14 "PAD_P0_CTL_6_0,PAD P0 CTL 6 0" bitfld.long 0x14 15. " LOOP_FED_EN ,LOOP FED EN" "0,1" bitfld.long 0x14 14. " LOOP_FEA_EN ,LOOP FEA EN" "0,1" bitfld.long 0x14 13. " LOOP_NEA_EN ,LOOP NEA EN" "0,1" bitfld.long 0x14 12. " LOOP_NED_EN ,LOOP NED EN" "0,1" textline " " bitfld.long 0x14 8.--9. " LOOP_FED_MODE ,LOOP FED MODE" "0,1,2,3" bitfld.long 0x14 4.--7. " LOOP_FEA_MODE ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--1. " LOOP_NED_MODE ,LOOP NED MODE" "0,1,2,3" line.long 0x18 "PAD_P0_CTL_7_0,PAD P0 CTL 7 0" hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT ,MISC OUT" hexmask.long.byte 0x18 0.--7. 1. " MISC_CTRL ,MISC CTRL" line.long 0x1C "PAD_P0_CTL_8_0,PAD P0 CTL 8 0" bitfld.long 0x1C 27. " CFG_RESET ,CFG RESET" "0,1" bitfld.long 0x1C 25. " CFG_RS ,CFG RS" "0,1" bitfld.long 0x1C 24. " CFG_WS ,CFG WS" "0,1" hexmask.long.byte 0x1C 16.--23. 0x01 " CFG_ADDR ,CFG ADDR" textline " " hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA ,CFG WDATA" line.long 0x20 "PAD_P0_CTL_9_0,PAD P0 CTL 9 0" hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA ,CFG RDATA" group.long 0x4A0++0x23 line.long 0x00 "PAD_P1_CTL_1_0,PAD P1 CTL 1 0" rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE ,AUX RX STAT IDLE" "0,1,2,3" bitfld.long 0x00 26. " AUX_RX_IDLE_BYP ,AUX RX IDLE BYP" "0,1" bitfld.long 0x00 24.--25. " AUX_RX_IDLE_TH ,AUX RX IDLE TH" "0,1,2,3" bitfld.long 0x00 22. " AUX_RX_IDLE_EN ,AUX RX IDLE EN" "0,1" textline " " bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE ,AUX RX IDLE MODE" "0,1,2,3" bitfld.long 0x00 19. " AUX_RX_TERM_MODE ,AUX RX TERM MODE" "0,1" bitfld.long 0x00 18. " AUX_RX_TERM_EN ,AUX RX TERM EN" "0,1" bitfld.long 0x00 17. " AUX_RX_IDDQ_OVRD ,AUX RX IDDQ OVRD" "0,1" textline " " bitfld.long 0x00 16. " AUX_RX_IDDQ ,AUX RX IDDQ" "0,1" bitfld.long 0x00 13. " AUX_RX_MODE_OVRD ,AUX RX MODE OVRD" "0,1" bitfld.long 0x00 12. " AUX_TX_MODE_OVRD ,AUX TX MODE OVRD" "0,1" rbitfld.long 0x00 7. " AUX_TX_RDET_STATUS ,AUX TX RDET STATUS" "0,1" textline " " bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN ,AUX TX RDET CLK EN" "0,1" bitfld.long 0x00 5. " AUX_TX_RDET_BYP ,AUX TX RDET BYP" "0,1" bitfld.long 0x00 4. " AUX_TX_RDET_EN ,AUX TX RDET EN" "0,1" bitfld.long 0x00 2. " AUX_TX_TERM_EN ,AUX TX TERM EN" "0,1" textline " " bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD ,AUX TX IDDQ OVRD" "0,1" bitfld.long 0x00 0. " AUX_TX_IDDQ ,AUX TX IDDQ" "0,1" line.long 0x04 "PAD_P1_CTL_2_0,PAD P1 CTL 2 0" bitfld.long 0x04 31. " RX_RATE_PLL_OVRD ,RX RATE PLL OVRD" "0,1" bitfld.long 0x04 30. " TX_RATE_PLL_OVRD ,TX RATE PLL OVRD" "0,1" bitfld.long 0x04 29. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x04 28. " TX_RATE_PLL ,TX RATE PLL" "0,1" textline " " bitfld.long 0x04 25. " RX_PWR_OVRD ,RX PWR OVRD" "0,1" bitfld.long 0x04 24. " TX_PWR_OVRD ,TX PWR OVRD" "0,1" bitfld.long 0x04 22.--23. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x04 20.--21. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x04 16.--17. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x04 15. " RX_DATA_EN ,RX DATA EN" "0,1" bitfld.long 0x04 12.--13. " RX_SLEEP ,RX SLEEP" "0,1,2,3" textline " " bitfld.long 0x04 9. " RX_IDDQ_OVRD ,RX IDDQ OVRD" "0,1" bitfld.long 0x04 8. " RX_IDDQ ,RX IDDQ" "0,1" bitfld.long 0x04 7. " TX_DATA_EN ,TX DATA EN" "0,1" bitfld.long 0x04 6. " TX_DATA_READY ,TX DATA READY" "0,1" textline " " bitfld.long 0x04 4.--5. " TX_SLEEP ,TX SLEEP" "0,1,2,3" bitfld.long 0x04 1. " TX_IDDQ_OVRD ,TX IDDQ OVRD" "0,1" bitfld.long 0x04 0. " TX_IDDQ ,TX IDDQ" "0,1" line.long 0x08 "PAD_P1_CTL_3_0,PAD P1 CTL 3 0" bitfld.long 0x08 16.--19. " RX_BYP_CTRL ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 15. " RX_BYP_OVRD ,RX BYP OVRD" "0,1" bitfld.long 0x08 14. " RX_BYP_EN ,RX BYP EN" "0,1" bitfld.long 0x08 12.--13. " RX_BYP_MODE ,RX BYP MODE" "0,1,2,3" textline " " bitfld.long 0x08 11. " RX_BYP_REFCLK_EN ,RX BYP REFCLK EN" "0,1" rbitfld.long 0x08 8.--9. " RX_BYP_DATA ,RX BYP DATA" "0,1,2,3" bitfld.long 0x08 7. " TX_BYP_OVRD ,TX BYP OVRD" "0,1" bitfld.long 0x08 6. " TX_BYP_EN ,TX BYP EN" "0,1" textline " " bitfld.long 0x08 4.--5. " TX_BYP_MODE ,TX BYP MODE" "0,1,2,3" bitfld.long 0x08 0.--1. " TX_BYP_DATA ,TX BYP DATA" "0,1,2,3" line.long 0x0C "PAD_P1_CTL_4_0,PAD P1 CTL 4 0" bitfld.long 0x0C 23. " RX_TERM_OVRD ,RX TERM OVRD" "0,1" bitfld.long 0x0C 21. " RX_TERM_EN ,RX TERM EN" "0,1" bitfld.long 0x0C 20. " RX_TERM_MODE ,RX TERM MODE" "0,1" bitfld.long 0x0C 19. " TX_TERM_OVRD ,TX TERM OVRD" "0,1" textline " " bitfld.long 0x0C 16. " TX_TERM_MODE ,TX TERM MODE" "0,1" bitfld.long 0x0C 11. " RX_CDR_RESET_OVRD ,RX CDR RESET OVRD" "0,1" bitfld.long 0x0C 10. " RX_CDR_RESET ,RX CDR RESET" "0,1" bitfld.long 0x0C 9. " TX_SYNC_OVRD ,TX SYNC OVRD" "0,1" textline " " bitfld.long 0x0C 8. " TX_SYNC ,TX SYNC" "0,1" bitfld.long 0x0C 4. " TX_SYNC_MODE ,TX SYNC MODE" "0,1" bitfld.long 0x0C 0.--3. " TX_SYNC_DLY ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "PAD_P1_CTL_5_0,PAD P1 CTL 5 0" hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS ,RX EOM STATUS" bitfld.long 0x10 15. " RX_CEE_OVRD ,RX CEE OVRD" "0,1" rbitfld.long 0x10 9. " RX_EOM_DONE ,RX EOM DONE" "0,1" bitfld.long 0x10 8. " RX_EOM_EN ,RX EOM EN" "0,1" textline " " bitfld.long 0x10 7. " RX_EQ_RESET ,RX EQ RESET" "0,1" rbitfld.long 0x10 5. " RX_EQ_TRAIN_DONE ,RX EQ TRAIN DONE" "0,1" bitfld.long 0x10 4. " RX_EQ_TRAIN_EN ,RX EQ TRAIN EN" "0,1" rbitfld.long 0x10 1. " RX_CAL_DONE ,RX CAL DONE" "0,1" textline " " bitfld.long 0x10 0. " RX_CAL_EN ,RX CAL EN" "0,1" line.long 0x14 "PAD_P1_CTL_6_0,PAD P1 CTL 6 0" bitfld.long 0x14 15. " LOOP_FED_EN ,LOOP FED EN" "0,1" bitfld.long 0x14 14. " LOOP_FEA_EN ,LOOP FEA EN" "0,1" bitfld.long 0x14 13. " LOOP_NEA_EN ,LOOP NEA EN" "0,1" bitfld.long 0x14 12. " LOOP_NED_EN ,LOOP NED EN" "0,1" textline " " bitfld.long 0x14 8.--9. " LOOP_FED_MODE ,LOOP FED MODE" "0,1,2,3" bitfld.long 0x14 4.--7. " LOOP_FEA_MODE ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--1. " LOOP_NED_MODE ,LOOP NED MODE" "0,1,2,3" line.long 0x18 "PAD_P1_CTL_7_0,PAD P1 CTL 7 0" hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT ,MISC OUT" hexmask.long.byte 0x18 0.--7. 1. " MISC_CTRL ,MISC CTRL" line.long 0x1C "PAD_P1_CTL_8_0,PAD P1 CTL 8 0" bitfld.long 0x1C 27. " CFG_RESET ,CFG RESET" "0,1" bitfld.long 0x1C 25. " CFG_RS ,CFG RS" "0,1" bitfld.long 0x1C 24. " CFG_WS ,CFG WS" "0,1" hexmask.long.byte 0x1C 16.--23. 0x01 " CFG_ADDR ,CFG ADDR" textline " " hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA ,CFG WDATA" line.long 0x20 "PAD_P1_CTL_9_0,PAD P1 CTL 9 0" hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA ,CFG RDATA" group.long 0x4E0++0x23 line.long 0x00 "PAD_P2_CTL_1_0,PAD P2 CTL 1 0" rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE ,AUX RX STAT IDLE" "0,1,2,3" bitfld.long 0x00 26. " AUX_RX_IDLE_BYP ,AUX RX IDLE BYP" "0,1" bitfld.long 0x00 24.--25. " AUX_RX_IDLE_TH ,AUX RX IDLE TH" "0,1,2,3" bitfld.long 0x00 22. " AUX_RX_IDLE_EN ,AUX RX IDLE EN" "0,1" textline " " bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE ,AUX RX IDLE MODE" "0,1,2,3" bitfld.long 0x00 19. " AUX_RX_TERM_MODE ,AUX RX TERM MODE" "0,1" bitfld.long 0x00 18. " AUX_RX_TERM_EN ,AUX RX TERM EN" "0,1" bitfld.long 0x00 17. " AUX_RX_IDDQ_OVRD ,AUX RX IDDQ OVRD" "0,1" textline " " bitfld.long 0x00 16. " AUX_RX_IDDQ ,AUX RX IDDQ" "0,1" bitfld.long 0x00 13. " AUX_RX_MODE_OVRD ,AUX RX MODE OVRD" "0,1" bitfld.long 0x00 12. " AUX_TX_MODE_OVRD ,AUX TX MODE OVRD" "0,1" rbitfld.long 0x00 7. " AUX_TX_RDET_STATUS ,AUX TX RDET STATUS" "0,1" textline " " bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN ,AUX TX RDET CLK EN" "0,1" bitfld.long 0x00 5. " AUX_TX_RDET_BYP ,AUX TX RDET BYP" "0,1" bitfld.long 0x00 4. " AUX_TX_RDET_EN ,AUX TX RDET EN" "0,1" bitfld.long 0x00 2. " AUX_TX_TERM_EN ,AUX TX TERM EN" "0,1" textline " " bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD ,AUX TX IDDQ OVRD" "0,1" bitfld.long 0x00 0. " AUX_TX_IDDQ ,AUX TX IDDQ" "0,1" line.long 0x04 "PAD_P2_CTL_2_0,PAD P2 CTL 2 0" bitfld.long 0x04 31. " RX_RATE_PLL_OVRD ,RX RATE PLL OVRD" "0,1" bitfld.long 0x04 30. " TX_RATE_PLL_OVRD ,TX RATE PLL OVRD" "0,1" bitfld.long 0x04 29. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x04 28. " TX_RATE_PLL ,TX RATE PLL" "0,1" textline " " bitfld.long 0x04 25. " RX_PWR_OVRD ,RX PWR OVRD" "0,1" bitfld.long 0x04 24. " TX_PWR_OVRD ,TX PWR OVRD" "0,1" bitfld.long 0x04 22.--23. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x04 20.--21. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x04 16.--17. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x04 15. " RX_DATA_EN ,RX DATA EN" "0,1" bitfld.long 0x04 12.--13. " RX_SLEEP ,RX SLEEP" "0,1,2,3" textline " " bitfld.long 0x04 9. " RX_IDDQ_OVRD ,RX IDDQ OVRD" "0,1" bitfld.long 0x04 8. " RX_IDDQ ,RX IDDQ" "0,1" bitfld.long 0x04 7. " TX_DATA_EN ,TX DATA EN" "0,1" bitfld.long 0x04 6. " TX_DATA_READY ,TX DATA READY" "0,1" textline " " bitfld.long 0x04 4.--5. " TX_SLEEP ,TX SLEEP" "0,1,2,3" bitfld.long 0x04 1. " TX_IDDQ_OVRD ,TX IDDQ OVRD" "0,1" bitfld.long 0x04 0. " TX_IDDQ ,TX IDDQ" "0,1" line.long 0x08 "PAD_P2_CTL_3_0,PAD P2 CTL 3 0" bitfld.long 0x08 16.--19. " RX_BYP_CTRL ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 15. " RX_BYP_OVRD ,RX BYP OVRD" "0,1" bitfld.long 0x08 14. " RX_BYP_EN ,RX BYP EN" "0,1" bitfld.long 0x08 12.--13. " RX_BYP_MODE ,RX BYP MODE" "0,1,2,3" textline " " bitfld.long 0x08 11. " RX_BYP_REFCLK_EN ,RX BYP REFCLK EN" "0,1" rbitfld.long 0x08 8.--9. " RX_BYP_DATA ,RX BYP DATA" "0,1,2,3" bitfld.long 0x08 7. " TX_BYP_OVRD ,TX BYP OVRD" "0,1" bitfld.long 0x08 6. " TX_BYP_EN ,TX BYP EN" "0,1" textline " " bitfld.long 0x08 4.--5. " TX_BYP_MODE ,TX BYP MODE" "0,1,2,3" bitfld.long 0x08 0.--1. " TX_BYP_DATA ,TX BYP DATA" "0,1,2,3" line.long 0x0C "PAD_P2_CTL_4_0,PAD P2 CTL 4 0" bitfld.long 0x0C 23. " RX_TERM_OVRD ,RX TERM OVRD" "0,1" bitfld.long 0x0C 21. " RX_TERM_EN ,RX TERM EN" "0,1" bitfld.long 0x0C 20. " RX_TERM_MODE ,RX TERM MODE" "0,1" bitfld.long 0x0C 19. " TX_TERM_OVRD ,TX TERM OVRD" "0,1" textline " " bitfld.long 0x0C 16. " TX_TERM_MODE ,TX TERM MODE" "0,1" bitfld.long 0x0C 11. " RX_CDR_RESET_OVRD ,RX CDR RESET OVRD" "0,1" bitfld.long 0x0C 10. " RX_CDR_RESET ,RX CDR RESET" "0,1" bitfld.long 0x0C 9. " TX_SYNC_OVRD ,TX SYNC OVRD" "0,1" textline " " bitfld.long 0x0C 8. " TX_SYNC ,TX SYNC" "0,1" bitfld.long 0x0C 4. " TX_SYNC_MODE ,TX SYNC MODE" "0,1" bitfld.long 0x0C 0.--3. " TX_SYNC_DLY ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "PAD_P2_CTL_5_0,PAD P2 CTL 5 0" hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS ,RX EOM STATUS" bitfld.long 0x10 15. " RX_CEE_OVRD ,RX CEE OVRD" "0,1" rbitfld.long 0x10 9. " RX_EOM_DONE ,RX EOM DONE" "0,1" bitfld.long 0x10 8. " RX_EOM_EN ,RX EOM EN" "0,1" textline " " bitfld.long 0x10 7. " RX_EQ_RESET ,RX EQ RESET" "0,1" rbitfld.long 0x10 5. " RX_EQ_TRAIN_DONE ,RX EQ TRAIN DONE" "0,1" bitfld.long 0x10 4. " RX_EQ_TRAIN_EN ,RX EQ TRAIN EN" "0,1" rbitfld.long 0x10 1. " RX_CAL_DONE ,RX CAL DONE" "0,1" textline " " bitfld.long 0x10 0. " RX_CAL_EN ,RX CAL EN" "0,1" line.long 0x14 "PAD_P2_CTL_6_0,PAD P2 CTL 6 0" bitfld.long 0x14 15. " LOOP_FED_EN ,LOOP FED EN" "0,1" bitfld.long 0x14 14. " LOOP_FEA_EN ,LOOP FEA EN" "0,1" bitfld.long 0x14 13. " LOOP_NEA_EN ,LOOP NEA EN" "0,1" bitfld.long 0x14 12. " LOOP_NED_EN ,LOOP NED EN" "0,1" textline " " bitfld.long 0x14 8.--9. " LOOP_FED_MODE ,LOOP FED MODE" "0,1,2,3" bitfld.long 0x14 4.--7. " LOOP_FEA_MODE ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--1. " LOOP_NED_MODE ,LOOP NED MODE" "0,1,2,3" line.long 0x18 "PAD_P2_CTL_7_0,PAD P2 CTL 7 0" hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT ,MISC OUT" hexmask.long.byte 0x18 0.--7. 1. " MISC_CTRL ,MISC CTRL" line.long 0x1C "PAD_P2_CTL_8_0,PAD P2 CTL 8 0" bitfld.long 0x1C 27. " CFG_RESET ,CFG RESET" "0,1" bitfld.long 0x1C 25. " CFG_RS ,CFG RS" "0,1" bitfld.long 0x1C 24. " CFG_WS ,CFG WS" "0,1" hexmask.long.byte 0x1C 16.--23. 0x01 " CFG_ADDR ,CFG ADDR" textline " " hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA ,CFG WDATA" line.long 0x20 "PAD_P2_CTL_9_0,PAD P2 CTL 9 0" hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA ,CFG RDATA" group.long 0x520++0x23 line.long 0x00 "PAD_P3_CTL_1_0,PAD P3 CTL 1 0" rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE ,AUX RX STAT IDLE" "0,1,2,3" bitfld.long 0x00 26. " AUX_RX_IDLE_BYP ,AUX RX IDLE BYP" "0,1" bitfld.long 0x00 24.--25. " AUX_RX_IDLE_TH ,AUX RX IDLE TH" "0,1,2,3" bitfld.long 0x00 22. " AUX_RX_IDLE_EN ,AUX RX IDLE EN" "0,1" textline " " bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE ,AUX RX IDLE MODE" "0,1,2,3" bitfld.long 0x00 19. " AUX_RX_TERM_MODE ,AUX RX TERM MODE" "0,1" bitfld.long 0x00 18. " AUX_RX_TERM_EN ,AUX RX TERM EN" "0,1" bitfld.long 0x00 17. " AUX_RX_IDDQ_OVRD ,AUX RX IDDQ OVRD" "0,1" textline " " bitfld.long 0x00 16. " AUX_RX_IDDQ ,AUX RX IDDQ" "0,1" bitfld.long 0x00 13. " AUX_RX_MODE_OVRD ,AUX RX MODE OVRD" "0,1" bitfld.long 0x00 12. " AUX_TX_MODE_OVRD ,AUX TX MODE OVRD" "0,1" rbitfld.long 0x00 7. " AUX_TX_RDET_STATUS ,AUX TX RDET STATUS" "0,1" textline " " bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN ,AUX TX RDET CLK EN" "0,1" bitfld.long 0x00 5. " AUX_TX_RDET_BYP ,AUX TX RDET BYP" "0,1" bitfld.long 0x00 4. " AUX_TX_RDET_EN ,AUX TX RDET EN" "0,1" bitfld.long 0x00 2. " AUX_TX_TERM_EN ,AUX TX TERM EN" "0,1" textline " " bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD ,AUX TX IDDQ OVRD" "0,1" bitfld.long 0x00 0. " AUX_TX_IDDQ ,AUX TX IDDQ" "0,1" line.long 0x04 "PAD_P3_CTL_2_0,PAD P3 CTL 2 0" bitfld.long 0x04 31. " RX_RATE_PLL_OVRD ,RX RATE PLL OVRD" "0,1" bitfld.long 0x04 30. " TX_RATE_PLL_OVRD ,TX RATE PLL OVRD" "0,1" bitfld.long 0x04 29. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x04 28. " TX_RATE_PLL ,TX RATE PLL" "0,1" textline " " bitfld.long 0x04 25. " RX_PWR_OVRD ,RX PWR OVRD" "0,1" bitfld.long 0x04 24. " TX_PWR_OVRD ,TX PWR OVRD" "0,1" bitfld.long 0x04 22.--23. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x04 20.--21. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x04 16.--17. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x04 15. " RX_DATA_EN ,RX DATA EN" "0,1" bitfld.long 0x04 12.--13. " RX_SLEEP ,RX SLEEP" "0,1,2,3" textline " " bitfld.long 0x04 9. " RX_IDDQ_OVRD ,RX IDDQ OVRD" "0,1" bitfld.long 0x04 8. " RX_IDDQ ,RX IDDQ" "0,1" bitfld.long 0x04 7. " TX_DATA_EN ,TX DATA EN" "0,1" bitfld.long 0x04 6. " TX_DATA_READY ,TX DATA READY" "0,1" textline " " bitfld.long 0x04 4.--5. " TX_SLEEP ,TX SLEEP" "0,1,2,3" bitfld.long 0x04 1. " TX_IDDQ_OVRD ,TX IDDQ OVRD" "0,1" bitfld.long 0x04 0. " TX_IDDQ ,TX IDDQ" "0,1" line.long 0x08 "PAD_P3_CTL_3_0,PAD P3 CTL 3 0" bitfld.long 0x08 16.--19. " RX_BYP_CTRL ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 15. " RX_BYP_OVRD ,RX BYP OVRD" "0,1" bitfld.long 0x08 14. " RX_BYP_EN ,RX BYP EN" "0,1" bitfld.long 0x08 12.--13. " RX_BYP_MODE ,RX BYP MODE" "0,1,2,3" textline " " bitfld.long 0x08 11. " RX_BYP_REFCLK_EN ,RX BYP REFCLK EN" "0,1" rbitfld.long 0x08 8.--9. " RX_BYP_DATA ,RX BYP DATA" "0,1,2,3" bitfld.long 0x08 7. " TX_BYP_OVRD ,TX BYP OVRD" "0,1" bitfld.long 0x08 6. " TX_BYP_EN ,TX BYP EN" "0,1" textline " " bitfld.long 0x08 4.--5. " TX_BYP_MODE ,TX BYP MODE" "0,1,2,3" bitfld.long 0x08 0.--1. " TX_BYP_DATA ,TX BYP DATA" "0,1,2,3" line.long 0x0C "PAD_P3_CTL_4_0,PAD P3 CTL 4 0" bitfld.long 0x0C 23. " RX_TERM_OVRD ,RX TERM OVRD" "0,1" bitfld.long 0x0C 21. " RX_TERM_EN ,RX TERM EN" "0,1" bitfld.long 0x0C 20. " RX_TERM_MODE ,RX TERM MODE" "0,1" bitfld.long 0x0C 19. " TX_TERM_OVRD ,TX TERM OVRD" "0,1" textline " " bitfld.long 0x0C 16. " TX_TERM_MODE ,TX TERM MODE" "0,1" bitfld.long 0x0C 11. " RX_CDR_RESET_OVRD ,RX CDR RESET OVRD" "0,1" bitfld.long 0x0C 10. " RX_CDR_RESET ,RX CDR RESET" "0,1" bitfld.long 0x0C 9. " TX_SYNC_OVRD ,TX SYNC OVRD" "0,1" textline " " bitfld.long 0x0C 8. " TX_SYNC ,TX SYNC" "0,1" bitfld.long 0x0C 4. " TX_SYNC_MODE ,TX SYNC MODE" "0,1" bitfld.long 0x0C 0.--3. " TX_SYNC_DLY ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "PAD_P3_CTL_5_0,PAD P3 CTL 5 0" hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS ,RX EOM STATUS" bitfld.long 0x10 15. " RX_CEE_OVRD ,RX CEE OVRD" "0,1" rbitfld.long 0x10 9. " RX_EOM_DONE ,RX EOM DONE" "0,1" bitfld.long 0x10 8. " RX_EOM_EN ,RX EOM EN" "0,1" textline " " bitfld.long 0x10 7. " RX_EQ_RESET ,RX EQ RESET" "0,1" rbitfld.long 0x10 5. " RX_EQ_TRAIN_DONE ,RX EQ TRAIN DONE" "0,1" bitfld.long 0x10 4. " RX_EQ_TRAIN_EN ,RX EQ TRAIN EN" "0,1" rbitfld.long 0x10 1. " RX_CAL_DONE ,RX CAL DONE" "0,1" textline " " bitfld.long 0x10 0. " RX_CAL_EN ,RX CAL EN" "0,1" line.long 0x14 "PAD_P3_CTL_6_0,PAD P3 CTL 6 0" bitfld.long 0x14 15. " LOOP_FED_EN ,LOOP FED EN" "0,1" bitfld.long 0x14 14. " LOOP_FEA_EN ,LOOP FEA EN" "0,1" bitfld.long 0x14 13. " LOOP_NEA_EN ,LOOP NEA EN" "0,1" bitfld.long 0x14 12. " LOOP_NED_EN ,LOOP NED EN" "0,1" textline " " bitfld.long 0x14 8.--9. " LOOP_FED_MODE ,LOOP FED MODE" "0,1,2,3" bitfld.long 0x14 4.--7. " LOOP_FEA_MODE ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--1. " LOOP_NED_MODE ,LOOP NED MODE" "0,1,2,3" line.long 0x18 "PAD_P3_CTL_7_0,PAD P3 CTL 7 0" hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT ,MISC OUT" hexmask.long.byte 0x18 0.--7. 1. " MISC_CTRL ,MISC CTRL" line.long 0x1C "PAD_P3_CTL_8_0,PAD P3 CTL 8 0" bitfld.long 0x1C 27. " CFG_RESET ,CFG RESET" "0,1" bitfld.long 0x1C 25. " CFG_RS ,CFG RS" "0,1" bitfld.long 0x1C 24. " CFG_WS ,CFG WS" "0,1" hexmask.long.byte 0x1C 16.--23. 0x01 " CFG_ADDR ,CFG ADDR" textline " " hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA ,CFG WDATA" line.long 0x20 "PAD_P3_CTL_9_0,PAD P3 CTL 9 0" hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA ,CFG RDATA" group.long 0x560++0x23 line.long 0x00 "PAD_P4_CTL_1_0,PAD P4 CTL 1 0" rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE ,AUX RX STAT IDLE" "0,1,2,3" bitfld.long 0x00 26. " AUX_RX_IDLE_BYP ,AUX RX IDLE BYP" "0,1" bitfld.long 0x00 24.--25. " AUX_RX_IDLE_TH ,AUX RX IDLE TH" "0,1,2,3" bitfld.long 0x00 22. " AUX_RX_IDLE_EN ,AUX RX IDLE EN" "0,1" textline " " bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE ,AUX RX IDLE MODE" "0,1,2,3" bitfld.long 0x00 19. " AUX_RX_TERM_MODE ,AUX RX TERM MODE" "0,1" bitfld.long 0x00 18. " AUX_RX_TERM_EN ,AUX RX TERM EN" "0,1" bitfld.long 0x00 17. " AUX_RX_IDDQ_OVRD ,AUX RX IDDQ OVRD" "0,1" textline " " bitfld.long 0x00 16. " AUX_RX_IDDQ ,AUX RX IDDQ" "0,1" bitfld.long 0x00 13. " AUX_RX_MODE_OVRD ,AUX RX MODE OVRD" "0,1" bitfld.long 0x00 12. " AUX_TX_MODE_OVRD ,AUX TX MODE OVRD" "0,1" rbitfld.long 0x00 7. " AUX_TX_RDET_STATUS ,AUX TX RDET STATUS" "0,1" textline " " bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN ,AUX TX RDET CLK EN" "0,1" bitfld.long 0x00 5. " AUX_TX_RDET_BYP ,AUX TX RDET BYP" "0,1" bitfld.long 0x00 4. " AUX_TX_RDET_EN ,AUX TX RDET EN" "0,1" bitfld.long 0x00 2. " AUX_TX_TERM_EN ,AUX TX TERM EN" "0,1" textline " " bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD ,AUX TX IDDQ OVRD" "0,1" bitfld.long 0x00 0. " AUX_TX_IDDQ ,AUX TX IDDQ" "0,1" line.long 0x04 "PAD_P4_CTL_2_0,PAD P4 CTL 2 0" bitfld.long 0x04 31. " RX_RATE_PLL_OVRD ,RX RATE PLL OVRD" "0,1" bitfld.long 0x04 30. " TX_RATE_PLL_OVRD ,TX RATE PLL OVRD" "0,1" bitfld.long 0x04 29. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x04 28. " TX_RATE_PLL ,TX RATE PLL" "0,1" textline " " bitfld.long 0x04 25. " RX_PWR_OVRD ,RX PWR OVRD" "0,1" bitfld.long 0x04 24. " TX_PWR_OVRD ,TX PWR OVRD" "0,1" bitfld.long 0x04 22.--23. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x04 20.--21. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x04 16.--17. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x04 15. " RX_DATA_EN ,RX DATA EN" "0,1" bitfld.long 0x04 12.--13. " RX_SLEEP ,RX SLEEP" "0,1,2,3" textline " " bitfld.long 0x04 9. " RX_IDDQ_OVRD ,RX IDDQ OVRD" "0,1" bitfld.long 0x04 8. " RX_IDDQ ,RX IDDQ" "0,1" bitfld.long 0x04 7. " TX_DATA_EN ,TX DATA EN" "0,1" bitfld.long 0x04 6. " TX_DATA_READY ,TX DATA READY" "0,1" textline " " bitfld.long 0x04 4.--5. " TX_SLEEP ,TX SLEEP" "0,1,2,3" bitfld.long 0x04 1. " TX_IDDQ_OVRD ,TX IDDQ OVRD" "0,1" bitfld.long 0x04 0. " TX_IDDQ ,TX IDDQ" "0,1" line.long 0x08 "PAD_P4_CTL_3_0,PAD P4 CTL 3 0" bitfld.long 0x08 16.--19. " RX_BYP_CTRL ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 15. " RX_BYP_OVRD ,RX BYP OVRD" "0,1" bitfld.long 0x08 14. " RX_BYP_EN ,RX BYP EN" "0,1" bitfld.long 0x08 12.--13. " RX_BYP_MODE ,RX BYP MODE" "0,1,2,3" textline " " bitfld.long 0x08 11. " RX_BYP_REFCLK_EN ,RX BYP REFCLK EN" "0,1" rbitfld.long 0x08 8.--9. " RX_BYP_DATA ,RX BYP DATA" "0,1,2,3" bitfld.long 0x08 7. " TX_BYP_OVRD ,TX BYP OVRD" "0,1" bitfld.long 0x08 6. " TX_BYP_EN ,TX BYP EN" "0,1" textline " " bitfld.long 0x08 4.--5. " TX_BYP_MODE ,TX BYP MODE" "0,1,2,3" bitfld.long 0x08 0.--1. " TX_BYP_DATA ,TX BYP DATA" "0,1,2,3" line.long 0x0C "PAD_P4_CTL_4_0,PAD P4 CTL 4 0" bitfld.long 0x0C 23. " RX_TERM_OVRD ,RX TERM OVRD" "0,1" bitfld.long 0x0C 21. " RX_TERM_EN ,RX TERM EN" "0,1" bitfld.long 0x0C 20. " RX_TERM_MODE ,RX TERM MODE" "0,1" bitfld.long 0x0C 19. " TX_TERM_OVRD ,TX TERM OVRD" "0,1" textline " " bitfld.long 0x0C 16. " TX_TERM_MODE ,TX TERM MODE" "0,1" bitfld.long 0x0C 11. " RX_CDR_RESET_OVRD ,RX CDR RESET OVRD" "0,1" bitfld.long 0x0C 10. " RX_CDR_RESET ,RX CDR RESET" "0,1" bitfld.long 0x0C 9. " TX_SYNC_OVRD ,TX SYNC OVRD" "0,1" textline " " bitfld.long 0x0C 8. " TX_SYNC ,TX SYNC" "0,1" bitfld.long 0x0C 4. " TX_SYNC_MODE ,TX SYNC MODE" "0,1" bitfld.long 0x0C 0.--3. " TX_SYNC_DLY ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "PAD_P4_CTL_5_0,PAD P4 CTL 5 0" hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS ,RX EOM STATUS" bitfld.long 0x10 15. " RX_CEE_OVRD ,RX CEE OVRD" "0,1" rbitfld.long 0x10 9. " RX_EOM_DONE ,RX EOM DONE" "0,1" bitfld.long 0x10 8. " RX_EOM_EN ,RX EOM EN" "0,1" textline " " bitfld.long 0x10 7. " RX_EQ_RESET ,RX EQ RESET" "0,1" rbitfld.long 0x10 5. " RX_EQ_TRAIN_DONE ,RX EQ TRAIN DONE" "0,1" bitfld.long 0x10 4. " RX_EQ_TRAIN_EN ,RX EQ TRAIN EN" "0,1" rbitfld.long 0x10 1. " RX_CAL_DONE ,RX CAL DONE" "0,1" textline " " bitfld.long 0x10 0. " RX_CAL_EN ,RX CAL EN" "0,1" line.long 0x14 "PAD_P4_CTL_6_0,PAD P4 CTL 6 0" bitfld.long 0x14 15. " LOOP_FED_EN ,LOOP FED EN" "0,1" bitfld.long 0x14 14. " LOOP_FEA_EN ,LOOP FEA EN" "0,1" bitfld.long 0x14 13. " LOOP_NEA_EN ,LOOP NEA EN" "0,1" bitfld.long 0x14 12. " LOOP_NED_EN ,LOOP NED EN" "0,1" textline " " bitfld.long 0x14 8.--9. " LOOP_FED_MODE ,LOOP FED MODE" "0,1,2,3" bitfld.long 0x14 4.--7. " LOOP_FEA_MODE ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--1. " LOOP_NED_MODE ,LOOP NED MODE" "0,1,2,3" line.long 0x18 "PAD_P4_CTL_7_0,PAD P4 CTL 7 0" hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT ,MISC OUT" hexmask.long.byte 0x18 0.--7. 1. " MISC_CTRL ,MISC CTRL" line.long 0x1C "PAD_P4_CTL_8_0,PAD P4 CTL 8 0" bitfld.long 0x1C 27. " CFG_RESET ,CFG RESET" "0,1" bitfld.long 0x1C 25. " CFG_RS ,CFG RS" "0,1" bitfld.long 0x1C 24. " CFG_WS ,CFG WS" "0,1" hexmask.long.byte 0x1C 16.--23. 0x01 " CFG_ADDR ,CFG ADDR" textline " " hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA ,CFG WDATA" line.long 0x20 "PAD_P4_CTL_9_0,PAD P4 CTL 9 0" hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA ,CFG RDATA" group.long 0x5A0++0x23 line.long 0x00 "PAD_P5_CTL_1_0,PAD P5 CTL 1 0" rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE ,AUX RX STAT IDLE" "0,1,2,3" bitfld.long 0x00 26. " AUX_RX_IDLE_BYP ,AUX RX IDLE BYP" "0,1" bitfld.long 0x00 24.--25. " AUX_RX_IDLE_TH ,AUX RX IDLE TH" "0,1,2,3" bitfld.long 0x00 22. " AUX_RX_IDLE_EN ,AUX RX IDLE EN" "0,1" textline " " bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE ,AUX RX IDLE MODE" "0,1,2,3" bitfld.long 0x00 19. " AUX_RX_TERM_MODE ,AUX RX TERM MODE" "0,1" bitfld.long 0x00 18. " AUX_RX_TERM_EN ,AUX RX TERM EN" "0,1" bitfld.long 0x00 17. " AUX_RX_IDDQ_OVRD ,AUX RX IDDQ OVRD" "0,1" textline " " bitfld.long 0x00 16. " AUX_RX_IDDQ ,AUX RX IDDQ" "0,1" bitfld.long 0x00 13. " AUX_RX_MODE_OVRD ,AUX RX MODE OVRD" "0,1" bitfld.long 0x00 12. " AUX_TX_MODE_OVRD ,AUX TX MODE OVRD" "0,1" rbitfld.long 0x00 7. " AUX_TX_RDET_STATUS ,AUX TX RDET STATUS" "0,1" textline " " bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN ,AUX TX RDET CLK EN" "0,1" bitfld.long 0x00 5. " AUX_TX_RDET_BYP ,AUX TX RDET BYP" "0,1" bitfld.long 0x00 4. " AUX_TX_RDET_EN ,AUX TX RDET EN" "0,1" bitfld.long 0x00 2. " AUX_TX_TERM_EN ,AUX TX TERM EN" "0,1" textline " " bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD ,AUX TX IDDQ OVRD" "0,1" bitfld.long 0x00 0. " AUX_TX_IDDQ ,AUX TX IDDQ" "0,1" line.long 0x04 "PAD_P5_CTL_2_0,PAD P5 CTL 2 0" bitfld.long 0x04 31. " RX_RATE_PLL_OVRD ,RX RATE PLL OVRD" "0,1" bitfld.long 0x04 30. " TX_RATE_PLL_OVRD ,TX RATE PLL OVRD" "0,1" bitfld.long 0x04 29. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x04 28. " TX_RATE_PLL ,TX RATE PLL" "0,1" textline " " bitfld.long 0x04 25. " RX_PWR_OVRD ,RX PWR OVRD" "0,1" bitfld.long 0x04 24. " TX_PWR_OVRD ,TX PWR OVRD" "0,1" bitfld.long 0x04 22.--23. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x04 20.--21. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x04 16.--17. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x04 15. " RX_DATA_EN ,RX DATA EN" "0,1" bitfld.long 0x04 12.--13. " RX_SLEEP ,RX SLEEP" "0,1,2,3" textline " " bitfld.long 0x04 9. " RX_IDDQ_OVRD ,RX IDDQ OVRD" "0,1" bitfld.long 0x04 8. " RX_IDDQ ,RX IDDQ" "0,1" bitfld.long 0x04 7. " TX_DATA_EN ,TX DATA EN" "0,1" bitfld.long 0x04 6. " TX_DATA_READY ,TX DATA READY" "0,1" textline " " bitfld.long 0x04 4.--5. " TX_SLEEP ,TX SLEEP" "0,1,2,3" bitfld.long 0x04 1. " TX_IDDQ_OVRD ,TX IDDQ OVRD" "0,1" bitfld.long 0x04 0. " TX_IDDQ ,TX IDDQ" "0,1" line.long 0x08 "PAD_P5_CTL_3_0,PAD P5 CTL 3 0" bitfld.long 0x08 16.--19. " RX_BYP_CTRL ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 15. " RX_BYP_OVRD ,RX BYP OVRD" "0,1" bitfld.long 0x08 14. " RX_BYP_EN ,RX BYP EN" "0,1" bitfld.long 0x08 12.--13. " RX_BYP_MODE ,RX BYP MODE" "0,1,2,3" textline " " bitfld.long 0x08 11. " RX_BYP_REFCLK_EN ,RX BYP REFCLK EN" "0,1" rbitfld.long 0x08 8.--9. " RX_BYP_DATA ,RX BYP DATA" "0,1,2,3" bitfld.long 0x08 7. " TX_BYP_OVRD ,TX BYP OVRD" "0,1" bitfld.long 0x08 6. " TX_BYP_EN ,TX BYP EN" "0,1" textline " " bitfld.long 0x08 4.--5. " TX_BYP_MODE ,TX BYP MODE" "0,1,2,3" bitfld.long 0x08 0.--1. " TX_BYP_DATA ,TX BYP DATA" "0,1,2,3" line.long 0x0C "PAD_P5_CTL_4_0,PAD P5 CTL 4 0" bitfld.long 0x0C 23. " RX_TERM_OVRD ,RX TERM OVRD" "0,1" bitfld.long 0x0C 21. " RX_TERM_EN ,RX TERM EN" "0,1" bitfld.long 0x0C 20. " RX_TERM_MODE ,RX TERM MODE" "0,1" bitfld.long 0x0C 19. " TX_TERM_OVRD ,TX TERM OVRD" "0,1" textline " " bitfld.long 0x0C 16. " TX_TERM_MODE ,TX TERM MODE" "0,1" bitfld.long 0x0C 11. " RX_CDR_RESET_OVRD ,RX CDR RESET OVRD" "0,1" bitfld.long 0x0C 10. " RX_CDR_RESET ,RX CDR RESET" "0,1" bitfld.long 0x0C 9. " TX_SYNC_OVRD ,TX SYNC OVRD" "0,1" textline " " bitfld.long 0x0C 8. " TX_SYNC ,TX SYNC" "0,1" bitfld.long 0x0C 4. " TX_SYNC_MODE ,TX SYNC MODE" "0,1" bitfld.long 0x0C 0.--3. " TX_SYNC_DLY ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "PAD_P5_CTL_5_0,PAD P5 CTL 5 0" hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS ,RX EOM STATUS" bitfld.long 0x10 15. " RX_CEE_OVRD ,RX CEE OVRD" "0,1" rbitfld.long 0x10 9. " RX_EOM_DONE ,RX EOM DONE" "0,1" bitfld.long 0x10 8. " RX_EOM_EN ,RX EOM EN" "0,1" textline " " bitfld.long 0x10 7. " RX_EQ_RESET ,RX EQ RESET" "0,1" rbitfld.long 0x10 5. " RX_EQ_TRAIN_DONE ,RX EQ TRAIN DONE" "0,1" bitfld.long 0x10 4. " RX_EQ_TRAIN_EN ,RX EQ TRAIN EN" "0,1" rbitfld.long 0x10 1. " RX_CAL_DONE ,RX CAL DONE" "0,1" textline " " bitfld.long 0x10 0. " RX_CAL_EN ,RX CAL EN" "0,1" line.long 0x14 "PAD_P5_CTL_6_0,PAD P5 CTL 6 0" bitfld.long 0x14 15. " LOOP_FED_EN ,LOOP FED EN" "0,1" bitfld.long 0x14 14. " LOOP_FEA_EN ,LOOP FEA EN" "0,1" bitfld.long 0x14 13. " LOOP_NEA_EN ,LOOP NEA EN" "0,1" bitfld.long 0x14 12. " LOOP_NED_EN ,LOOP NED EN" "0,1" textline " " bitfld.long 0x14 8.--9. " LOOP_FED_MODE ,LOOP FED MODE" "0,1,2,3" bitfld.long 0x14 4.--7. " LOOP_FEA_MODE ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--1. " LOOP_NED_MODE ,LOOP NED MODE" "0,1,2,3" line.long 0x18 "PAD_P5_CTL_7_0,PAD P5 CTL 7 0" hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT ,MISC OUT" hexmask.long.byte 0x18 0.--7. 1. " MISC_CTRL ,MISC CTRL" line.long 0x1C "PAD_P5_CTL_8_0,PAD P5 CTL 8 0" bitfld.long 0x1C 27. " CFG_RESET ,CFG RESET" "0,1" bitfld.long 0x1C 25. " CFG_RS ,CFG RS" "0,1" bitfld.long 0x1C 24. " CFG_WS ,CFG WS" "0,1" hexmask.long.byte 0x1C 16.--23. 0x01 " CFG_ADDR ,CFG ADDR" textline " " hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA ,CFG WDATA" line.long 0x20 "PAD_P5_CTL_9_0,PAD P5 CTL 9 0" hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA ,CFG RDATA" group.long 0x5E0++0x23 line.long 0x00 "PAD_P6_CTL_1_0,PAD P6 CTL 1 0" rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE ,AUX RX STAT IDLE" "0,1,2,3" bitfld.long 0x00 26. " AUX_RX_IDLE_BYP ,AUX RX IDLE BYP" "0,1" bitfld.long 0x00 24.--25. " AUX_RX_IDLE_TH ,AUX RX IDLE TH" "0,1,2,3" bitfld.long 0x00 22. " AUX_RX_IDLE_EN ,AUX RX IDLE EN" "0,1" textline " " bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE ,AUX RX IDLE MODE" "0,1,2,3" bitfld.long 0x00 19. " AUX_RX_TERM_MODE ,AUX RX TERM MODE" "0,1" bitfld.long 0x00 18. " AUX_RX_TERM_EN ,AUX RX TERM EN" "0,1" bitfld.long 0x00 17. " AUX_RX_IDDQ_OVRD ,AUX RX IDDQ OVRD" "0,1" textline " " bitfld.long 0x00 16. " AUX_RX_IDDQ ,AUX RX IDDQ" "0,1" bitfld.long 0x00 13. " AUX_RX_MODE_OVRD ,AUX RX MODE OVRD" "0,1" bitfld.long 0x00 12. " AUX_TX_MODE_OVRD ,AUX TX MODE OVRD" "0,1" rbitfld.long 0x00 7. " AUX_TX_RDET_STATUS ,AUX TX RDET STATUS" "0,1" textline " " bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN ,AUX TX RDET CLK EN" "0,1" bitfld.long 0x00 5. " AUX_TX_RDET_BYP ,AUX TX RDET BYP" "0,1" bitfld.long 0x00 4. " AUX_TX_RDET_EN ,AUX TX RDET EN" "0,1" bitfld.long 0x00 2. " AUX_TX_TERM_EN ,AUX TX TERM EN" "0,1" textline " " bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD ,AUX TX IDDQ OVRD" "0,1" bitfld.long 0x00 0. " AUX_TX_IDDQ ,AUX TX IDDQ" "0,1" line.long 0x04 "PAD_P6_CTL_2_0,PAD P6 CTL 2 0" bitfld.long 0x04 31. " RX_RATE_PLL_OVRD ,RX RATE PLL OVRD" "0,1" bitfld.long 0x04 30. " TX_RATE_PLL_OVRD ,TX RATE PLL OVRD" "0,1" bitfld.long 0x04 29. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x04 28. " TX_RATE_PLL ,TX RATE PLL" "0,1" textline " " bitfld.long 0x04 25. " RX_PWR_OVRD ,RX PWR OVRD" "0,1" bitfld.long 0x04 24. " TX_PWR_OVRD ,TX PWR OVRD" "0,1" bitfld.long 0x04 22.--23. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x04 20.--21. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x04 16.--17. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x04 15. " RX_DATA_EN ,RX DATA EN" "0,1" bitfld.long 0x04 12.--13. " RX_SLEEP ,RX SLEEP" "0,1,2,3" textline " " bitfld.long 0x04 9. " RX_IDDQ_OVRD ,RX IDDQ OVRD" "0,1" bitfld.long 0x04 8. " RX_IDDQ ,RX IDDQ" "0,1" bitfld.long 0x04 7. " TX_DATA_EN ,TX DATA EN" "0,1" bitfld.long 0x04 6. " TX_DATA_READY ,TX DATA READY" "0,1" textline " " bitfld.long 0x04 4.--5. " TX_SLEEP ,TX SLEEP" "0,1,2,3" bitfld.long 0x04 1. " TX_IDDQ_OVRD ,TX IDDQ OVRD" "0,1" bitfld.long 0x04 0. " TX_IDDQ ,TX IDDQ" "0,1" line.long 0x08 "PAD_P6_CTL_3_0,PAD P6 CTL 3 0" bitfld.long 0x08 16.--19. " RX_BYP_CTRL ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 15. " RX_BYP_OVRD ,RX BYP OVRD" "0,1" bitfld.long 0x08 14. " RX_BYP_EN ,RX BYP EN" "0,1" bitfld.long 0x08 12.--13. " RX_BYP_MODE ,RX BYP MODE" "0,1,2,3" textline " " bitfld.long 0x08 11. " RX_BYP_REFCLK_EN ,RX BYP REFCLK EN" "0,1" rbitfld.long 0x08 8.--9. " RX_BYP_DATA ,RX BYP DATA" "0,1,2,3" bitfld.long 0x08 7. " TX_BYP_OVRD ,TX BYP OVRD" "0,1" bitfld.long 0x08 6. " TX_BYP_EN ,TX BYP EN" "0,1" textline " " bitfld.long 0x08 4.--5. " TX_BYP_MODE ,TX BYP MODE" "0,1,2,3" bitfld.long 0x08 0.--1. " TX_BYP_DATA ,TX BYP DATA" "0,1,2,3" line.long 0x0C "PAD_P6_CTL_4_0,PAD P6 CTL 4 0" bitfld.long 0x0C 23. " RX_TERM_OVRD ,RX TERM OVRD" "0,1" bitfld.long 0x0C 21. " RX_TERM_EN ,RX TERM EN" "0,1" bitfld.long 0x0C 20. " RX_TERM_MODE ,RX TERM MODE" "0,1" bitfld.long 0x0C 19. " TX_TERM_OVRD ,TX TERM OVRD" "0,1" textline " " bitfld.long 0x0C 16. " TX_TERM_MODE ,TX TERM MODE" "0,1" bitfld.long 0x0C 11. " RX_CDR_RESET_OVRD ,RX CDR RESET OVRD" "0,1" bitfld.long 0x0C 10. " RX_CDR_RESET ,RX CDR RESET" "0,1" bitfld.long 0x0C 9. " TX_SYNC_OVRD ,TX SYNC OVRD" "0,1" textline " " bitfld.long 0x0C 8. " TX_SYNC ,TX SYNC" "0,1" bitfld.long 0x0C 4. " TX_SYNC_MODE ,TX SYNC MODE" "0,1" bitfld.long 0x0C 0.--3. " TX_SYNC_DLY ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "PAD_P6_CTL_5_0,PAD P6 CTL 5 0" hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS ,RX EOM STATUS" bitfld.long 0x10 15. " RX_CEE_OVRD ,RX CEE OVRD" "0,1" rbitfld.long 0x10 9. " RX_EOM_DONE ,RX EOM DONE" "0,1" bitfld.long 0x10 8. " RX_EOM_EN ,RX EOM EN" "0,1" textline " " bitfld.long 0x10 7. " RX_EQ_RESET ,RX EQ RESET" "0,1" rbitfld.long 0x10 5. " RX_EQ_TRAIN_DONE ,RX EQ TRAIN DONE" "0,1" bitfld.long 0x10 4. " RX_EQ_TRAIN_EN ,RX EQ TRAIN EN" "0,1" rbitfld.long 0x10 1. " RX_CAL_DONE ,RX CAL DONE" "0,1" textline " " bitfld.long 0x10 0. " RX_CAL_EN ,RX CAL EN" "0,1" line.long 0x14 "PAD_P6_CTL_6_0,PAD P6 CTL 6 0" bitfld.long 0x14 15. " LOOP_FED_EN ,LOOP FED EN" "0,1" bitfld.long 0x14 14. " LOOP_FEA_EN ,LOOP FEA EN" "0,1" bitfld.long 0x14 13. " LOOP_NEA_EN ,LOOP NEA EN" "0,1" bitfld.long 0x14 12. " LOOP_NED_EN ,LOOP NED EN" "0,1" textline " " bitfld.long 0x14 8.--9. " LOOP_FED_MODE ,LOOP FED MODE" "0,1,2,3" bitfld.long 0x14 4.--7. " LOOP_FEA_MODE ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--1. " LOOP_NED_MODE ,LOOP NED MODE" "0,1,2,3" line.long 0x18 "PAD_P6_CTL_7_0,PAD P6 CTL 7 0" hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT ,MISC OUT" hexmask.long.byte 0x18 0.--7. 1. " MISC_CTRL ,MISC CTRL" line.long 0x1C "PAD_P6_CTL_8_0,PAD P6 CTL 8 0" bitfld.long 0x1C 27. " CFG_RESET ,CFG RESET" "0,1" bitfld.long 0x1C 25. " CFG_RS ,CFG RS" "0,1" bitfld.long 0x1C 24. " CFG_WS ,CFG WS" "0,1" hexmask.long.byte 0x1C 16.--23. 0x01 " CFG_ADDR ,CFG ADDR" textline " " hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA ,CFG WDATA" line.long 0x20 "PAD_P6_CTL_9_0,PAD P6 CTL 9 0" hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA ,CFG RDATA" tree.end tree "UPHY_PLL registers" group.long 0x860++0x2B line.long 0x00 "S0_CTL_1_0,S0 CTL 1 0" bitfld.long 0x00 28.--29. " PLL0_FREQ_PSDIV ,PLL0 FREQ PSDIV" "0,1,2,3" hexmask.long.byte 0x00 20.--27. 1. " PLL0_FREQ_NDIV ,PLL0 FREQ NDIV" bitfld.long 0x00 16.--17. " PLL0_FREQ_MDIV ,PLL0 FREQ MDIV" "0,1,2,3" rbitfld.long 0x00 15. " PLL0_LOCKDET_STATUS ,PLL0 LOCKDET STATUS" "0,1" textline " " bitfld.long 0x00 8.--9. " PLL0_MODE ,PLL0 MODE" "0,1,2,3" bitfld.long 0x00 7. " PLL0_BYPASS_EN ,PLL0 BYPASS EN" "0,1" bitfld.long 0x00 6. " PLL0_FREERUN_EN ,PLL0 FREERUN EN" "0,1" bitfld.long 0x00 4. " PLL0_PWR_OVRD ,PLL0 PWR OVRD" "0,1" textline " " bitfld.long 0x00 3. " PLL0_ENABLE ,PLL0 ENABLE" "0,1" bitfld.long 0x00 1.--2. " PLL0_SLEEP ,PLL0 SLEEP" "0,1,2,3" bitfld.long 0x00 0. " PLL0_IDDQ ,PLL0 IDDQ" "0,1" line.long 0x04 "S0_CTL_2_0,S0 CTL 2 0" hexmask.long.tbyte 0x04 4.--27. 1. " PLL0_CAL_CTRL ,PLL0 CAL CTRL" bitfld.long 0x04 3. " PLL0_CAL_RESET ,PLL0 CAL RESET" "0,1" bitfld.long 0x04 2. " PLL0_CAL_OVRD ,PLL0 CAL OVRD" "0,1" bitfld.long 0x04 1. " PLL0_CAL_DONE ,PLL0 CAL DONE" "0,1" textline " " bitfld.long 0x04 0. " PLL0_CAL_EN ,PLL0 CAL EN" "0,1" line.long 0x08 "S0_CTL_3_0,S0 CTL 3 0" hexmask.long.tbyte 0x08 4.--27. 1. " PLL0_LOCKDET_CTRL ,PLL0 LOCKDET CTRL" bitfld.long 0x08 0. " PLL0_LOCKDET_RESET ,PLL0 LOCKDET RESET" "0,1" line.long 0x0C "S0_CTL_4_0,S0 CTL 4 0" bitfld.long 0x0C 28. " PLL0_TCLKOUT_EN ,PLL0 TCLKOUT EN" "0,1" bitfld.long 0x0C 20.--23. " PLL0_CLKDIST_CTRL ,PLL0 CLKDIST CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 19. " PLL0_XDIGCLK_EN ,PLL0 XDIGCLK EN" "0,1" bitfld.long 0x0C 16.--18. " PLL0_XDIGCLK_SEL ,PLL0 XDIGCLK SEL" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 15. " PLL0_TXCLKREF_EN ,PLL0 TXCLKREF EN" "0,1" bitfld.long 0x0C 12.--13. " PLL0_TXCLKREF_SEL ,PLL0 TXCLKREF SEL" "0,1,2,3" bitfld.long 0x0C 9. " PLL0_FBCLKBUF_EN ,PLL0 FBCLKBUF EN" "0,1" bitfld.long 0x0C 8. " PLL0_REFCLKBUF_EN ,PLL0 REFCLKBUF EN" "0,1" textline " " bitfld.long 0x0C 4.--7. " PLL0_REFCLK_SEL ,PLL0 REFCLK SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0. " PLL0_REFCLK_TERM100 ,PLL0 REFCLK TERM100" "0,1" line.long 0x10 "S0_CTL_5_0,S0 CTL 5 0" hexmask.long.byte 0x10 16.--23. 1. " PLL0_DCO_CTRL ,PLL0 DCO CTRL" hexmask.long.byte 0x10 8.--15. 1. " PLL0_LPF_CTRL ,PLL0 LPF CTRL" bitfld.long 0x10 4.--7. " PLL0_CP_CTRL ,PLL0 CP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--1. " PLL0_PFD_CTRL ,PLL0 PFD CTRL" "0,1,2,3" line.long 0x14 "S0_CTL_6_0,S0 CTL 6 0" bitfld.long 0x14 31. " PLL0_FSEL_LOAD ,PLL0 FSEL LOAD" "0,1" bitfld.long 0x14 29. " PLL0_FSEL_COARSE_OVRD ,PLL0 FSEL COARSE OVRD" "0,1" bitfld.long 0x14 28. " PLL0_FSEL_FINE_OVRD ,PLL0 FSEL FINE OVRD" "0,1" hexmask.long.byte 0x14 20.--26. 1. " PLL0_FSEL_COARSE ,PLL0 FSEL COARSE" textline " " hexmask.long.tbyte 0x14 0.--19. 1. " PLL0_FSEL_FINE ,PLL0 FSEL FINE" line.long 0x18 "S0_CTL_7_0,S0 CTL 7 0" hexmask.long.tbyte 0x18 0.--23. 1. " PLL0_VREG_CTRL ,PLL0 VREG CTRL" line.long 0x1C "S0_CTL_8_0,S0 CTL 8 0" bitfld.long 0x1C 31. " PLL0_RCAL_DONE ,PLL0 RCAL DONE" "0,1" bitfld.long 0x1C 24.--28. " PLL0_RCAL_VAL ,PLL0 RCAL VAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 23. " PLL0_RCAL_BYP_EN ,PLL0 RCAL BYP EN" "0,1" bitfld.long 0x1C 16.--20. " PLL0_RCAL_BYP_CODE ,PLL0 RCAL BYP CODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x1C 15. " PLL0_RCAL_OVRD ,PLL0 RCAL OVRD" "0,1" bitfld.long 0x1C 13. " PLL0_RCAL_CLK_EN ,PLL0 RCAL CLK EN" "0,1" bitfld.long 0x1C 12. " PLL0_RCAL_EN ,PLL0 RCAL EN" "0,1" hexmask.long.word 0x1C 0.--11. 1. " PLL0_BGAP_CTRL ,PLL0 BGAP CTRL" line.long 0x20 "S0_CTL_9_0,S0 CTL 9 0" hexmask.long.word 0x20 16.--31. 1. " PLL0_MISC_OUT ,PLL0 MISC OUT" hexmask.long.word 0x20 0.--15. 1. " PLL0_MISC_CTRL ,PLL0 MISC CTRL" line.long 0x24 "S0_CTL_10_0,S0 CTL 10 0" bitfld.long 0x24 27. " PLL0_CFG_RESET ,PLL0 CFG RESET" "0,1" bitfld.long 0x24 25. " PLL0_CFG_RS ,PLL0 CFG RS" "0,1" bitfld.long 0x24 24. " PLL0_CFG_WS ,PLL0 CFG WS" "0,1" hexmask.long.byte 0x24 16.--23. 0x01 " PLL0_CFG_ADDR ,PLL0 CFG ADDR" textline " " hexmask.long.word 0x24 0.--15. 1. " PLL0_CFG_WDATA ,PLL0 CFG WDATA" line.long 0x28 "S0_CTL_11_0,S0 CTL 11 0" hexmask.long.word 0x28 0.--15. 1. " PLL0_CFG_RDATA ,PLL0 CFG RDATA" tree.end tree "UPHY_MISC registers" group.long 0x960++0x23 line.long 0x00 "PAD_S0_CTL_1_0,PAD S0 CTL 1 0" rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE ,AUX RX STAT IDLE" "0,1,2,3" bitfld.long 0x00 26. " AUX_RX_IDLE_BYP ,AUX RX IDLE BYP" "0,1" bitfld.long 0x00 24.--25. " AUX_RX_IDLE_TH ,AUX RX IDLE TH" "0,1,2,3" bitfld.long 0x00 22. " AUX_RX_IDLE_EN ,AUX RX IDLE EN" "0,1" textline " " bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE ,AUX RX IDLE MODE" "0,1,2,3" bitfld.long 0x00 19. " AUX_RX_TERM_MODE ,AUX RX TERM MODE" "0,1" bitfld.long 0x00 18. " AUX_RX_TERM_EN ,AUX RX TERM EN" "0,1" bitfld.long 0x00 17. " AUX_RX_IDDQ_OVRD ,AUX RX IDDQ OVRD" "0,1" textline " " bitfld.long 0x00 16. " AUX_RX_IDDQ ,AUX RX IDDQ" "0,1" bitfld.long 0x00 13. " AUX_RX_MODE_OVRD ,AUX RX MODE OVRD" "0,1" bitfld.long 0x00 12. " AUX_TX_MODE_OVRD ,AUX TX MODE OVRD" "0,1" rbitfld.long 0x00 7. " AUX_TX_RDET_STATUS ,AUX TX RDET STATUS" "0,1" textline " " bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN ,AUX TX RDET CLK EN" "0,1" bitfld.long 0x00 5. " AUX_TX_RDET_BYP ,AUX TX RDET BYP" "0,1" bitfld.long 0x00 4. " AUX_TX_RDET_EN ,AUX TX RDET EN" "0,1" bitfld.long 0x00 2. " AUX_TX_TERM_EN ,AUX TX TERM EN" "0,1" textline " " bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD ,AUX TX IDDQ OVRD" "0,1" bitfld.long 0x00 0. " AUX_TX_IDDQ ,AUX TX IDDQ" "0,1" line.long 0x04 "PAD_S0_CTL_2_0,PAD S0 CTL 2 0" bitfld.long 0x04 31. " RX_RATE_PLL_OVRD ,RX RATE PLL OVRD" "0,1" bitfld.long 0x04 30. " TX_RATE_PLL_OVRD ,TX RATE PLL OVRD" "0,1" bitfld.long 0x04 29. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x04 28. " TX_RATE_PLL ,TX RATE PLL" "0,1" textline " " bitfld.long 0x04 25. " RX_PWR_OVRD ,RX PWR OVRD" "0,1" bitfld.long 0x04 24. " TX_PWR_OVRD ,TX PWR OVRD" "0,1" bitfld.long 0x04 22.--23. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x04 20.--21. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x04 18.--19. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x04 16.--17. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x04 15. " RX_DATA_EN ,RX DATA EN" "0,1" bitfld.long 0x04 12.--13. " RX_SLEEP ,RX SLEEP" "0,1,2,3" textline " " bitfld.long 0x04 9. " RX_IDDQ_OVRD ,RX IDDQ OVRD" "0,1" bitfld.long 0x04 8. " RX_IDDQ ,RX IDDQ" "0,1" bitfld.long 0x04 7. " TX_DATA_EN ,TX DATA EN" "0,1" bitfld.long 0x04 6. " TX_DATA_READY ,TX DATA READY" "0,1" textline " " bitfld.long 0x04 4.--5. " TX_SLEEP ,TX SLEEP" "0,1,2,3" bitfld.long 0x04 1. " TX_IDDQ_OVRD ,TX IDDQ OVRD" "0,1" bitfld.long 0x04 0. " TX_IDDQ ,TX IDDQ" "0,1" line.long 0x08 "PAD_S0_CTL_3_0,PAD S0 CTL 3 0" bitfld.long 0x08 16.--19. " RX_BYP_CTRL ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 15. " RX_BYP_OVRD ,RX BYP OVRD" "0,1" bitfld.long 0x08 14. " RX_BYP_EN ,RX BYP EN" "0,1" bitfld.long 0x08 12.--13. " RX_BYP_MODE ,RX BYP MODE" "0,1,2,3" textline " " bitfld.long 0x08 11. " RX_BYP_REFCLK_EN ,RX BYP REFCLK EN" "0,1" rbitfld.long 0x08 8.--9. " RX_BYP_DATA ,RX BYP DATA" "0,1,2,3" bitfld.long 0x08 7. " TX_BYP_OVRD ,TX BYP OVRD" "0,1" bitfld.long 0x08 6. " TX_BYP_EN ,TX BYP EN" "0,1" textline " " bitfld.long 0x08 4.--5. " TX_BYP_MODE ,TX BYP MODE" "0,1,2,3" bitfld.long 0x08 0.--1. " TX_BYP_DATA ,TX BYP DATA" "0,1,2,3" line.long 0x0C "PAD_S0_CTL_4_0,PAD S0 CTL 4 0" bitfld.long 0x0C 23. " RX_TERM_OVRD ,RX TERM OVRD" "0,1" bitfld.long 0x0C 21. " RX_TERM_EN ,RX TERM EN" "0,1" bitfld.long 0x0C 20. " RX_TERM_MODE ,RX TERM MODE" "0,1" bitfld.long 0x0C 19. " TX_TERM_OVRD ,TX TERM OVRD" "0,1" textline " " bitfld.long 0x0C 16. " TX_TERM_MODE ,TX TERM MODE" "0,1" bitfld.long 0x0C 11. " RX_CDR_RESET_OVRD ,RX CDR RESET OVRD" "0,1" bitfld.long 0x0C 10. " RX_CDR_RESET ,RX CDR RESET" "0,1" bitfld.long 0x0C 9. " TX_SYNC_OVRD ,TX SYNC OVRD" "0,1" textline " " bitfld.long 0x0C 8. " TX_SYNC ,TX SYNC" "0,1" bitfld.long 0x0C 4. " TX_SYNC_MODE ,TX SYNC MODE" "0,1" bitfld.long 0x0C 0.--3. " TX_SYNC_DLY ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "PAD_S0_CTL_5_0,PAD S0 CTL 5 0" hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS ,RX EOM STATUS" bitfld.long 0x10 15. " RX_CEE_OVRD ,RX CEE OVRD" "0,1" rbitfld.long 0x10 9. " RX_EOM_DONE ,RX EOM DONE" "0,1" bitfld.long 0x10 8. " RX_EOM_EN ,RX EOM EN" "0,1" textline " " bitfld.long 0x10 7. " RX_EQ_RESET ,RX EQ RESET" "0,1" rbitfld.long 0x10 5. " RX_EQ_TRAIN_DONE ,RX EQ TRAIN DONE" "0,1" bitfld.long 0x10 4. " RX_EQ_TRAIN_EN ,RX EQ TRAIN EN" "0,1" rbitfld.long 0x10 1. " RX_CAL_DONE ,RX CAL DONE" "0,1" textline " " bitfld.long 0x10 0. " RX_CAL_EN ,RX CAL EN" "0,1" line.long 0x14 "PAD_S0_CTL_6_0,PAD S0 CTL 6 0" bitfld.long 0x14 15. " LOOP_FED_EN ,LOOP FED EN" "0,1" bitfld.long 0x14 14. " LOOP_FEA_EN ,LOOP FEA EN" "0,1" bitfld.long 0x14 13. " LOOP_NEA_EN ,LOOP NEA EN" "0,1" bitfld.long 0x14 12. " LOOP_NED_EN ,LOOP NED EN" "0,1" textline " " bitfld.long 0x14 8.--9. " LOOP_FED_MODE ,LOOP FED MODE" "0,1,2,3" bitfld.long 0x14 4.--7. " LOOP_FEA_MODE ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--1. " LOOP_NED_MODE ,LOOP NED MODE" "0,1,2,3" line.long 0x18 "PAD_S0_CTL_7_0,PAD S0 CTL 7 0" hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT ,MISC OUT" hexmask.long.byte 0x18 0.--7. 1. " MISC_CTRL ,MISC CTRL" line.long 0x1C "PAD_S0_CTL_8_0,PAD S0 CTL 8 0" bitfld.long 0x1C 27. " CFG_RESET ,CFG RESET" "0,1" bitfld.long 0x1C 25. " CFG_RS ,CFG RS" "0,1" bitfld.long 0x1C 24. " CFG_WS ,CFG WS" "0,1" hexmask.long.byte 0x1C 16.--23. 0x01 " CFG_ADDR ,CFG ADDR" textline " " hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA ,CFG WDATA" line.long 0x20 "PAD_S0_CTL_9_0,PAD S0 CTL 9 0" hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA ,CFG RDATA" tree.end tree "UPHY_US3 registers" group.long 0xA60++0x1B line.long 0x00 "PAD0_ECTL_1_0,PAD0 ECTL 1 0" bitfld.long 0x00 24.--27. " RX_FELS ,RX FELS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--19. " RX_TERM_CTRL ,RX TERM CTRL" "0,1,2,3" bitfld.long 0x00 16.--17. " TX_TERM_CTRL ,TX TERM CTRL" "0,1,2,3" bitfld.long 0x00 12.--15. " TX_DRV_CTRL ,TX DRV CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TX_DRV_SLEW ,TX DRV SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " TX_DRV_AMP ,TX DRV AMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "PAD0_ECTL_2_0,PAD0 ECTL 2 0" bitfld.long 0x04 16.--19. " RX_IQ_CTRL ,RX IQ CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. " RX_CTLE ,RX CTLE" line.long 0x08 "PAD0_ECTL_3_0,PAD0 ECTL 3 0" line.long 0x0C "PAD0_ECTL_4_0,PAD0 ECTL 4 0" hexmask.long.word 0x0C 16.--31. 1. " RX_CDR_CTRL ,RX CDR CTRL" hexmask.long.byte 0x0C 0.--7. 1. " RX_PI_CTRL ,RX PI CTRL" line.long 0x10 "PAD0_ECTL_5_0,PAD0 ECTL 5 0" line.long 0x14 "PAD0_ECTL_6_0,PAD0 ECTL 6 0" line.long 0x18 "PAD0_CTL_0_0,PAD0 CTL 0 0" bitfld.long 0x18 11.--12. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x18 9.--10. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x18 8. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x18 3.--4. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x18 1.--2. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x18 0. " TX_RATE_PLL ,TX RATE PLL" "0,1" group.long 0xAA0++0x1B line.long 0x00 "PAD1_ECTL_1_0,PAD1 ECTL 1 0" bitfld.long 0x00 24.--27. " RX_FELS ,RX FELS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--19. " RX_TERM_CTRL ,RX TERM CTRL" "0,1,2,3" bitfld.long 0x00 16.--17. " TX_TERM_CTRL ,TX TERM CTRL" "0,1,2,3" bitfld.long 0x00 12.--15. " TX_DRV_CTRL ,TX DRV CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TX_DRV_SLEW ,TX DRV SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " TX_DRV_AMP ,TX DRV AMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "PAD1_ECTL_2_0,PAD1 ECTL 2 0" bitfld.long 0x04 16.--19. " RX_IQ_CTRL ,RX IQ CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. " RX_CTLE ,RX CTLE" line.long 0x08 "PAD1_ECTL_3_0,PAD1 ECTL 3 0" line.long 0x0C "PAD1_ECTL_4_0,PAD1 ECTL 4 0" hexmask.long.word 0x0C 16.--31. 1. " RX_CDR_CTRL ,RX CDR CTRL" hexmask.long.byte 0x0C 0.--7. 1. " RX_PI_CTRL ,RX PI CTRL" line.long 0x10 "PAD1_ECTL_5_0,PAD1 ECTL 5 0" line.long 0x14 "PAD1_ECTL_6_0,PAD1 ECTL 6 0" line.long 0x18 "PAD1_CTL_0_0,PAD1 CTL 0 0" bitfld.long 0x18 11.--12. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x18 9.--10. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x18 8. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x18 3.--4. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x18 1.--2. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x18 0. " TX_RATE_PLL ,TX RATE PLL" "0,1" group.long 0xAE0++0x1B line.long 0x00 "PAD2_ECTL_1_0,PAD2 ECTL 1 0" bitfld.long 0x00 24.--27. " RX_FELS ,RX FELS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--19. " RX_TERM_CTRL ,RX TERM CTRL" "0,1,2,3" bitfld.long 0x00 16.--17. " TX_TERM_CTRL ,TX TERM CTRL" "0,1,2,3" bitfld.long 0x00 12.--15. " TX_DRV_CTRL ,TX DRV CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TX_DRV_SLEW ,TX DRV SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " TX_DRV_AMP ,TX DRV AMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "PAD2_ECTL_2_0,PAD2 ECTL 2 0" bitfld.long 0x04 16.--19. " RX_IQ_CTRL ,RX IQ CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. " RX_CTLE ,RX CTLE" line.long 0x08 "PAD2_ECTL_3_0,PAD2 ECTL 3 0" line.long 0x0C "PAD2_ECTL_4_0,PAD2 ECTL 4 0" hexmask.long.word 0x0C 16.--31. 1. " RX_CDR_CTRL ,RX CDR CTRL" hexmask.long.byte 0x0C 0.--7. 1. " RX_PI_CTRL ,RX PI CTRL" line.long 0x10 "PAD2_ECTL_5_0,PAD2 ECTL 5 0" line.long 0x14 "PAD2_ECTL_6_0,PAD2 ECTL 6 0" line.long 0x18 "PAD2_CTL_0_0,PAD2 CTL 0 0" bitfld.long 0x18 11.--12. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x18 9.--10. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x18 8. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x18 3.--4. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x18 1.--2. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x18 0. " TX_RATE_PLL ,TX RATE PLL" "0,1" group.long 0xB20++0x1B line.long 0x00 "PAD3_ECTL_1_0,PAD3 ECTL 1 0" bitfld.long 0x00 24.--27. " RX_FELS ,RX FELS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--19. " RX_TERM_CTRL ,RX TERM CTRL" "0,1,2,3" bitfld.long 0x00 16.--17. " TX_TERM_CTRL ,TX TERM CTRL" "0,1,2,3" bitfld.long 0x00 12.--15. " TX_DRV_CTRL ,TX DRV CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TX_DRV_SLEW ,TX DRV SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " TX_DRV_AMP ,TX DRV AMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "PAD3_ECTL_2_0,PAD3 ECTL 2 0" bitfld.long 0x04 16.--19. " RX_IQ_CTRL ,RX IQ CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. " RX_CTLE ,RX CTLE" line.long 0x08 "PAD3_ECTL_3_0,PAD3 ECTL 3 0" line.long 0x0C "PAD3_ECTL_4_0,PAD3 ECTL 4 0" hexmask.long.word 0x0C 16.--31. 1. " RX_CDR_CTRL ,RX CDR CTRL" hexmask.long.byte 0x0C 0.--7. 1. " RX_PI_CTRL ,RX PI CTRL" line.long 0x10 "PAD3_ECTL_5_0,PAD3 ECTL 5 0" line.long 0x14 "PAD3_ECTL_6_0,PAD3 ECTL 6 0" line.long 0x18 "PAD3_CTL_0_0,PAD3 CTL 0 0" bitfld.long 0x18 11.--12. " RX_RATE_PDIV ,RX RATE PDIV" "0,1,2,3" bitfld.long 0x18 9.--10. " RX_RATE_SDIV ,RX RATE SDIV" "0,1,2,3" bitfld.long 0x18 8. " RX_RATE_PLL ,RX RATE PLL" "0,1" bitfld.long 0x18 3.--4. " TX_RATE_PDIV ,TX RATE PDIV" "0,1,2,3" textline " " bitfld.long 0x18 1.--2. " TX_RATE_SDIV ,TX RATE SDIV" "0,1,2,3" bitfld.long 0x18 0. " TX_RATE_PLL ,TX RATE PLL" "0,1" tree.end else textline " " group.long 0x360++0x03 line.long 0x00 "USB2_VBUS_ID_0,USB2 VBUS ID 0" bitfld.long 0x00 24. " VBUS_WAKEUP_CHNG_INTR_EN ,VBUS WAKEUP CHNG INTR EN" "No,Yes" bitfld.long 0x00 23. " VBUS_WAKEUP_ST_CHNG ,VBUS WAKEUP ST CHNG" "No,Yes" textline " " rbitfld.long 0x00 22. " VBUS_WAKEUP ,VBUS WAKEUP" "No,Yes" bitfld.long 0x00 18.--21. " ID_OVERRIDE ,ID OVERRIDE" "ID_GND,ID_C,ID_B,,ID_A,,,,ID_FLOAT,?..." textline " " bitfld.long 0x00 16.--17. " ID_SOURCE_SELECT ,ID SOURCE SELECT" "VGPIO,ID_OVERRIDE,?..." bitfld.long 0x00 15. " VBUS_WAKEUP_OVERRIDE ,VBUS WAKEUP OVERRIDE" "No,Yes" textline " " bitfld.long 0x00 14. " VBUS_OVERRIDE ,VBUS OVERRIDE" "No,Yes" bitfld.long 0x00 12.--13. " VBUS_SOURCE_SELECT ,VBUS SOURCE SELECT" "VGPIO,VBUS_OVERRIDE,?..." textline " " bitfld.long 0x00 11. " IDDIG_CHNG_INTR_EN ,IDDIG CHNG INTR EN" "No,Yes" bitfld.long 0x00 10. " IDDIG_ST_CHNG ,IDDIG ST CHNG" "No,Yes" textline " " rbitfld.long 0x00 9. " IDDIG_C ,IDDIG C" "No,Yes" rbitfld.long 0x00 8. " IDDIG_B ,IDDIG B" "No,Yes" textline " " rbitfld.long 0x00 7. " IDDIG ,IDDIG" "No,Yes" rbitfld.long 0x00 6. " IDDIG ,IDDIG" "No,Yes" textline " " bitfld.long 0x00 5. " VBUS_VALID_CHNG_INTR_EN ,VBUS VALID CHNG INTR EN" "No,Yes" bitfld.long 0x00 4. " VBUS_VALID_ST_CHNG ,VBUS VALID ST CHNG" "No,Yes" textline " " rbitfld.long 0x00 3. " VBUS_VALID ,VBUS VALID" "No,Yes" bitfld.long 0x00 2. " OTG_VBUS_SESS_VLD_CHNG_INTR_EN ,OTG VBUS SESS VLD CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 1. " OTG_VBUS_SESS_VLD_ST_CHNG ,OTG VBUS SESS VLD ST CHNG" "No,Yes" rbitfld.long 0x00 0. " OTG_VBUS_SESS_VLD ,OTG VBUS SESS VLD" "No,Yes" group.long 0x1364++0x07 line.long 0x00 "HOST_AXI_SEC0_0,HOST AXI SEC0 0" bitfld.long 0x00 4. " AWPROT1 ,AWPROT1" "0,1" bitfld.long 0x00 0. " ARPROT1 ,ARPROT1" "0,1" line.long 0x04 "HOST_AXI_SEC2_0,HOST AXI SEC2 Register" bitfld.long 0x04 12. " AWCACHE_OVRD ,AWCACHE OVRD" "No override,Override" bitfld.long 0x04 8.--11. " AWCACHE ,AWCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 4. " ARCACHE_OVRD ,ARCACHE OVRD" "No override,Override" bitfld.long 0x04 0.--3. " ARCACHE ,ARCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x137C++0x07 line.long 0x00 "DEV_AXI_SEC0_0,DEV AXI SEC0 Register" bitfld.long 0x00 4. " AWPROT1 ,AWPROT1" "0,1" bitfld.long 0x00 0. " ARPROT1 ,ARPROT1" "0,1" line.long 0x04 "DEV_AXI_SEC2_0,DEV AXI SEC2 Register" bitfld.long 0x04 12. " AWCACHE_OVRD ,AWCACHE OVRD" "No override,Override" bitfld.long 0x04 8.--11. " AWCACHE ,AWCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 4. " ARCACHE_OVRD ,ARCACHE OVRD" "No override,Override" bitfld.long 0x04 0.--3. " ARCACHE ,ARCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif textline " " width 16. sif (!cpuis("TEGRAX2")) group.long 0xC60++0x03 line.long 0x00 "USB2_VBUS_ID_0,USB2 VBUS ID 0" bitfld.long 0x00 24. " VBUS_WAKEUP_CHNG_INTR_EN ,VBUS WAKEUP CHNG INTR EN" "No,Yes" bitfld.long 0x00 23. " VBUS_WAKEUP_ST_CHNG ,VBUS WAKEUP ST CHNG" "No,Yes" textline " " rbitfld.long 0x00 22. " VBUS_WAKEUP ,VBUS WAKEUP" "No,Yes" bitfld.long 0x00 18.--21. " ID_OVERRIDE ,ID OVERRIDE" "ID_GND,ID_C,ID_B,,ID_A,,,,ID_FLOAT,?..." textline " " bitfld.long 0x00 16.--17. " ID_SOURCE_SELECT ,ID SOURCE SELECT" "VGPIO,ID_OVERRIDE,?..." bitfld.long 0x00 15. " VBUS_WAKEUP_OVERRIDE ,VBUS WAKEUP OVERRIDE" "No,Yes" textline " " bitfld.long 0x00 14. " VBUS_OVERRIDE ,VBUS OVERRIDE" "No,Yes" bitfld.long 0x00 12.--13. " VBUS_SOURCE_SELECT ,VBUS SOURCE SELECT" "VGPIO,VBUS_OVERRIDE,?..." textline " " bitfld.long 0x00 11. " IDDIG_CHNG_INTR_EN ,IDDIG CHNG INTR EN" "No,Yes" bitfld.long 0x00 10. " IDDIG_ST_CHNG ,IDDIG ST CHNG" "No,Yes" textline " " rbitfld.long 0x00 9. " IDDIG_C ,IDDIG C" "No,Yes" rbitfld.long 0x00 8. " IDDIG_B ,IDDIG B" "No,Yes" textline " " rbitfld.long 0x00 7. " IDDIG ,IDDIG" "No,Yes" rbitfld.long 0x00 6. " IDDIG ,IDDIG" "No,Yes" textline " " bitfld.long 0x00 5. " VBUS_VALID_CHNG_INTR_EN ,VBUS VALID CHNG INTR EN" "No,Yes" bitfld.long 0x00 4. " VBUS_VALID_ST_CHNG ,VBUS VALID ST CHNG" "No,Yes" textline " " rbitfld.long 0x00 3. " VBUS_VALID ,VBUS VALID" "No,Yes" bitfld.long 0x00 2. " OTG_VBUS_SESS_VLD_CHNG_INTR_EN ,OTG VBUS SESS VLD CHNG INTR EN" "No,Yes" textline " " bitfld.long 0x00 1. " OTG_VBUS_SESS_VLD_ST_CHNG ,OTG VBUS SESS VLD ST CHNG" "No,Yes" rbitfld.long 0x00 0. " OTG_VBUS_SESS_VLD ,OTG VBUS SESS VLD" "No,Yes" endif width 0x0B tree.end tree "HOST IPFS Registers" base ad:0x70099000 width 19. tree "Vectors" group.long 0x0++0x03 line.long 0x00 "AXI_BAR0_SZ_0,The Size Of The Address Range Associated With BAR0" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR0_SIZE ,The size of the address range associated with BAR0 in 4K increments" group.long 0x4++0x03 line.long 0x00 "AXI_BAR1_SZ_0,The Size Of The Address Range Associated With BAR1" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR1_SIZE ,The size of the address range associated with BAR1 in 4K increments" group.long 0x8++0x03 line.long 0x00 "AXI_BAR2_SZ_0,The Size Of The Address Range Associated With BAR2" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR2_SIZE ,The size of the address range associated with BAR2 in 4K increments" group.long 0xC++0x03 line.long 0x00 "AXI_BAR3_SZ_0,The Size Of The Address Range Associated With BAR3" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR3_SIZE ,The size of the address range associated with BAR3 in 4K increments" group.long 0x40++0x03 line.long 0x00 "AXI_BAR0_START_0,The Start Of AXI Address Space For BAR0" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR0_START ,The start of the AXI address space for BAR0" group.long 0x44++0x03 line.long 0x00 "AXI_BAR1_START_0,The Start Of AXI Address Space For BAR1" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR1_START ,The start of the AXI address space for BAR1" group.long 0x48++0x03 line.long 0x00 "AXI_BAR2_START_0,The Start Of AXI Address Space For BAR2" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR2_START ,The start of the AXI address space for BAR2" group.long 0x4C++0x03 line.long 0x00 "AXI_BAR3_START_0,The Start Of AXI Address Space For BAR3" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR3_START ,The start of the AXI address space for BAR3" group.long 0x80++0x03 line.long 0x00 "FPCI_BAR0_0,FPCI BAR0" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR0_START ,The start of FPCI address space mapped into the BAR0 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR0_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x84++0x03 line.long 0x00 "FPCI_BAR1_0,FPCI BAR1" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR1_START ,The start of FPCI address space mapped into the BAR1 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR1_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x88++0x03 line.long 0x00 "FPCI_BAR2_0,FPCI BAR2" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR2_START ,The start of FPCI address space mapped into the BAR2 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR2_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x8C++0x03 line.long 0x00 "FPCI_BAR3_0,FPCI BAR3" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR3_START ,The start of FPCI address space mapped into the BAR3 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR3_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0xC0++0x0B line.long 0x00 "MSI_BAR_SZ_0,MSI BAR Size" hexmask.long.tbyte 0x00 0.--19. 1. " MSI_BAR_SIZE ,The size of the address range associated with MSI BAR is in 4K increments" line.long 0x04 "MSI_AXI_BAR_ST_0,MSI AXI BAR Start" hexmask.long.tbyte 0x04 12.--31. 0x10 " MSI_AXI_BAR_START ,The start of the upstream AXI address space for MSI BAR" line.long 0x08 "MSI_FPCI_BAR_ST_0,MSI FPCI BAR Start" hexmask.long 0x08 4.--31. 0x10 " MSI_FPCI_BAR_START ,The start of the upstream FPCI address space for MSI BAR" tree.end width 12. tree "MSI Vector registers" width 12. group.long 0x100++0x1F line.long 0x00 "MSI_VEC0_0,XUSB_HOST MSI Vector Register 0" eventfld.long 0x00 31. " MSI_VECTOR[31] ,MSI vector 31" "No MSI,MSI sent" eventfld.long 0x00 30. " [30] ,MSI vector 30" "No MSI,MSI sent" eventfld.long 0x00 29. " [29] ,MSI vector 29" "No MSI,MSI sent" eventfld.long 0x00 28. " [28] ,MSI vector 28" "No MSI,MSI sent" eventfld.long 0x00 27. " [27] ,MSI vector 27" "No MSI,MSI sent" eventfld.long 0x00 26. " [26] ,MSI vector 26" "No MSI,MSI sent" textline " " eventfld.long 0x00 25. " [25] ,MSI vector 25" "No MSI,MSI sent" eventfld.long 0x00 24. " [24] ,MSI vector 24" "No MSI,MSI sent" eventfld.long 0x00 23. " [23] ,MSI vector 23" "No MSI,MSI sent" eventfld.long 0x00 22. " [22] ,MSI vector 22" "No MSI,MSI sent" eventfld.long 0x00 21. " [21] ,MSI vector 21" "No MSI,MSI sent" eventfld.long 0x00 20. " [20] ,MSI vector 20" "No MSI,MSI sent" textline " " eventfld.long 0x00 19. " [19] ,MSI vector 19" "No MSI,MSI sent" eventfld.long 0x00 18. " [18] ,MSI vector 18" "No MSI,MSI sent" eventfld.long 0x00 17. " [17] ,MSI vector 17" "No MSI,MSI sent" eventfld.long 0x00 16. " [16] ,MSI vector 16" "No MSI,MSI sent" eventfld.long 0x00 15. " [15] ,MSI vector 15" "No MSI,MSI sent" eventfld.long 0x00 14. " [14] ,MSI vector 14" "No MSI,MSI sent" textline " " eventfld.long 0x00 13. " [13] ,MSI vector 13" "No MSI,MSI sent" eventfld.long 0x00 12. " [12] ,MSI vector 12" "No MSI,MSI sent" eventfld.long 0x00 11. " [11] ,MSI vector 11" "No MSI,MSI sent" eventfld.long 0x00 10. " [10] ,MSI vector 10" "No MSI,MSI sent" eventfld.long 0x00 9. " [9] ,MSI vector 9" "No MSI,MSI sent" eventfld.long 0x00 8. " [8] ,MSI vector 8" "No MSI,MSI sent" textline " " eventfld.long 0x00 7. " [7] ,MSI vector 7" "No MSI,MSI sent" eventfld.long 0x00 6. " [6] ,MSI vector 6" "No MSI,MSI sent" eventfld.long 0x00 5. " [5] ,MSI vector 5" "No MSI,MSI sent" eventfld.long 0x00 4. " [4] ,MSI vector 4" "No MSI,MSI sent" eventfld.long 0x00 3. " [3] ,MSI vector 3" "No MSI,MSI sent" eventfld.long 0x00 2. " [2] ,MSI vector 2" "No MSI,MSI sent" textline " " eventfld.long 0x00 1. " [1] ,MSI vector 1" "No MSI,MSI sent" eventfld.long 0x00 0. " [0] ,MSI vector 0" "No MSI,MSI sent" line.long 0x04 "MSI_VEC1_0,XUSB_HOST MSI Vector Register 1" eventfld.long 0x04 31. " MSI_VECTOR[63] ,MSI vector 63" "No MSI,MSI sent" eventfld.long 0x04 30. " [62] ,MSI vector 62" "No MSI,MSI sent" eventfld.long 0x04 29. " [61] ,MSI vector 61" "No MSI,MSI sent" eventfld.long 0x04 28. " [60] ,MSI vector 60" "No MSI,MSI sent" eventfld.long 0x04 27. " [59] ,MSI vector 59" "No MSI,MSI sent" eventfld.long 0x04 26. " [58] ,MSI vector 58" "No MSI,MSI sent" textline " " eventfld.long 0x04 25. " [57] ,MSI vector 57" "No MSI,MSI sent" eventfld.long 0x04 24. " [56] ,MSI vector 56" "No MSI,MSI sent" eventfld.long 0x04 23. " [55] ,MSI vector 55" "No MSI,MSI sent" eventfld.long 0x04 22. " [54] ,MSI vector 54" "No MSI,MSI sent" eventfld.long 0x04 21. " [53] ,MSI vector 53" "No MSI,MSI sent" eventfld.long 0x04 20. " [52] ,MSI vector 52" "No MSI,MSI sent" textline " " eventfld.long 0x04 19. " [51] ,MSI vector 51" "No MSI,MSI sent" eventfld.long 0x04 18. " [50] ,MSI vector 50" "No MSI,MSI sent" eventfld.long 0x04 17. " [49] ,MSI vector 49" "No MSI,MSI sent" eventfld.long 0x04 16. " [48] ,MSI vector 48" "No MSI,MSI sent" eventfld.long 0x04 15. " [47] ,MSI vector 47" "No MSI,MSI sent" eventfld.long 0x04 14. " [46] ,MSI vector 46" "No MSI,MSI sent" textline " " eventfld.long 0x04 13. " [45] ,MSI vector 45" "No MSI,MSI sent" eventfld.long 0x04 12. " [44] ,MSI vector 44" "No MSI,MSI sent" eventfld.long 0x04 11. " [43] ,MSI vector 43" "No MSI,MSI sent" eventfld.long 0x04 10. " [42] ,MSI vector 42" "No MSI,MSI sent" eventfld.long 0x04 9. " [41] ,MSI vector 41" "No MSI,MSI sent" eventfld.long 0x04 8. " [40] ,MSI vector 40" "No MSI,MSI sent" textline " " eventfld.long 0x04 7. " [39] ,MSI vector 39" "No MSI,MSI sent" eventfld.long 0x04 6. " [38] ,MSI vector 38" "No MSI,MSI sent" eventfld.long 0x04 5. " [37] ,MSI vector 37" "No MSI,MSI sent" eventfld.long 0x04 4. " [36] ,MSI vector 36" "No MSI,MSI sent" eventfld.long 0x04 3. " [35] ,MSI vector 35" "No MSI,MSI sent" eventfld.long 0x04 2. " [34] ,MSI vector 34" "No MSI,MSI sent" textline " " eventfld.long 0x04 1. " [33] ,MSI vector 33" "No MSI,MSI sent" eventfld.long 0x04 0. " [32] ,MSI vector 32" "No MSI,MSI sent" line.long 0x08 "MSI_VEC2_0,XUSB_HOST MSI Vector Register 2" eventfld.long 0x08 31. " MSI_VECTOR[95] ,MSI vector 95" "No MSI,MSI sent" eventfld.long 0x08 30. " [94] ,MSI vector 94" "No MSI,MSI sent" eventfld.long 0x08 29. " [93] ,MSI vector 93" "No MSI,MSI sent" eventfld.long 0x08 28. " [92] ,MSI vector 92" "No MSI,MSI sent" eventfld.long 0x08 27. " [91] ,MSI vector 91" "No MSI,MSI sent" eventfld.long 0x08 26. " [90] ,MSI vector 90" "No MSI,MSI sent" textline " " eventfld.long 0x08 25. " [89] ,MSI vector 89" "No MSI,MSI sent" eventfld.long 0x08 24. " [88] ,MSI vector 88" "No MSI,MSI sent" eventfld.long 0x08 23. " [87] ,MSI vector 87" "No MSI,MSI sent" eventfld.long 0x08 22. " [86] ,MSI vector 86" "No MSI,MSI sent" eventfld.long 0x08 21. " [85] ,MSI vector 85" "No MSI,MSI sent" eventfld.long 0x08 20. " [84] ,MSI vector 84" "No MSI,MSI sent" textline " " eventfld.long 0x08 19. " [83] ,MSI vector 83" "No MSI,MSI sent" eventfld.long 0x08 18. " [82] ,MSI vector 82" "No MSI,MSI sent" eventfld.long 0x08 17. " [81] ,MSI vector 81" "No MSI,MSI sent" eventfld.long 0x08 16. " [80] ,MSI vector 80" "No MSI,MSI sent" eventfld.long 0x08 15. " [79] ,MSI vector 79" "No MSI,MSI sent" eventfld.long 0x08 14. " [78] ,MSI vector 78" "No MSI,MSI sent" textline " " eventfld.long 0x08 13. " [77] ,MSI vector 77" "No MSI,MSI sent" eventfld.long 0x08 12. " [76] ,MSI vector 76" "No MSI,MSI sent" eventfld.long 0x08 11. " [75] ,MSI vector 75" "No MSI,MSI sent" eventfld.long 0x08 10. " [74] ,MSI vector 74" "No MSI,MSI sent" eventfld.long 0x08 9. " [73] ,MSI vector 73" "No MSI,MSI sent" eventfld.long 0x08 8. " [72] ,MSI vector 72" "No MSI,MSI sent" textline " " eventfld.long 0x08 7. " [71] ,MSI vector 71" "No MSI,MSI sent" eventfld.long 0x08 6. " [70] ,MSI vector 70" "No MSI,MSI sent" eventfld.long 0x08 5. " [69] ,MSI vector 69" "No MSI,MSI sent" eventfld.long 0x08 4. " [68] ,MSI vector 68" "No MSI,MSI sent" eventfld.long 0x08 3. " [67] ,MSI vector 67" "No MSI,MSI sent" eventfld.long 0x08 2. " [66] ,MSI vector 66" "No MSI,MSI sent" textline " " eventfld.long 0x08 1. " [65] ,MSI vector 65" "No MSI,MSI sent" eventfld.long 0x08 0. " [64] ,MSI vector 64" "No MSI,MSI sent" line.long 0x0C "MSI_VEC3_0,XUSB_HOST MSI Vector Register 3" eventfld.long 0x0C 31. " MSI_VECTOR[127] ,MSI vector 127" "No MSI,MSI sent" eventfld.long 0x0C 30. " [126] ,MSI vector 126" "No MSI,MSI sent" eventfld.long 0x0C 29. " [125] ,MSI vector 125" "No MSI,MSI sent" eventfld.long 0x0C 28. " [124] ,MSI vector 124" "No MSI,MSI sent" eventfld.long 0x0C 27. " [123] ,MSI vector 123" "No MSI,MSI sent" eventfld.long 0x0C 26. " [122] ,MSI vector 122" "No MSI,MSI sent" textline " " eventfld.long 0x0C 25. " [121] ,MSI vector 121" "No MSI,MSI sent" eventfld.long 0x0C 24. " [120] ,MSI vector 120" "No MSI,MSI sent" eventfld.long 0x0C 23. " [119] ,MSI vector 119" "No MSI,MSI sent" eventfld.long 0x0C 22. " [118] ,MSI vector 118" "No MSI,MSI sent" eventfld.long 0x0C 21. " [117] ,MSI vector 117" "No MSI,MSI sent" eventfld.long 0x0C 20. " [116] ,MSI vector 116" "No MSI,MSI sent" textline " " eventfld.long 0x0C 19. " [115] ,MSI vector 115" "No MSI,MSI sent" eventfld.long 0x0C 18. " [114] ,MSI vector 114" "No MSI,MSI sent" eventfld.long 0x0C 17. " [113] ,MSI vector 113" "No MSI,MSI sent" eventfld.long 0x0C 16. " [112] ,MSI vector 112" "No MSI,MSI sent" eventfld.long 0x0C 15. " [111] ,MSI vector 111" "No MSI,MSI sent" eventfld.long 0x0C 14. " [110] ,MSI vector 110" "No MSI,MSI sent" textline " " eventfld.long 0x0C 13. " [109] ,MSI vector 109" "No MSI,MSI sent" eventfld.long 0x0C 12. " [108] ,MSI vector 108" "No MSI,MSI sent" eventfld.long 0x0C 11. " [107] ,MSI vector 107" "No MSI,MSI sent" eventfld.long 0x0C 10. " [106] ,MSI vector 106" "No MSI,MSI sent" eventfld.long 0x0C 9. " [105] ,MSI vector 105" "No MSI,MSI sent" eventfld.long 0x0C 8. " [104] ,MSI vector 104" "No MSI,MSI sent" textline " " eventfld.long 0x0C 7. " [103] ,MSI vector 103" "No MSI,MSI sent" eventfld.long 0x0C 6. " [102] ,MSI vector 102" "No MSI,MSI sent" eventfld.long 0x0C 5. " [101] ,MSI vector 101" "No MSI,MSI sent" eventfld.long 0x0C 4. " [100] ,MSI vector 100" "No MSI,MSI sent" eventfld.long 0x0C 3. " [99] ,MSI vector 99" "No MSI,MSI sent" eventfld.long 0x0C 2. " [98] ,MSI vector 98" "No MSI,MSI sent" textline " " eventfld.long 0x0C 1. " [97] ,MSI vector 97" "No MSI,MSI sent" eventfld.long 0x0C 0. " [96] ,MSI vector 96" "No MSI,MSI sent" line.long 0x10 "MSI_VEC4_0,XUSB_HOST MSI Vector Register 4" eventfld.long 0x10 31. " MSI_VECTOR[159] ,MSI vector 159" "No MSI,MSI sent" eventfld.long 0x10 30. " [158] ,MSI vector 158" "No MSI,MSI sent" eventfld.long 0x10 29. " [157] ,MSI vector 157" "No MSI,MSI sent" eventfld.long 0x10 28. " [156] ,MSI vector 156" "No MSI,MSI sent" eventfld.long 0x10 27. " [155] ,MSI vector 155" "No MSI,MSI sent" eventfld.long 0x10 26. " [154] ,MSI vector 154" "No MSI,MSI sent" textline " " eventfld.long 0x10 25. " [153] ,MSI vector 153" "No MSI,MSI sent" eventfld.long 0x10 24. " [152] ,MSI vector 152" "No MSI,MSI sent" eventfld.long 0x10 23. " [151] ,MSI vector 151" "No MSI,MSI sent" eventfld.long 0x10 22. " [150] ,MSI vector 150" "No MSI,MSI sent" eventfld.long 0x10 21. " [149] ,MSI vector 149" "No MSI,MSI sent" eventfld.long 0x10 20. " [148] ,MSI vector 148" "No MSI,MSI sent" textline " " eventfld.long 0x10 19. " [147] ,MSI vector 147" "No MSI,MSI sent" eventfld.long 0x10 18. " [146] ,MSI vector 146" "No MSI,MSI sent" eventfld.long 0x10 17. " [145] ,MSI vector 145" "No MSI,MSI sent" eventfld.long 0x10 16. " [144] ,MSI vector 144" "No MSI,MSI sent" eventfld.long 0x10 15. " [143] ,MSI vector 143" "No MSI,MSI sent" eventfld.long 0x10 14. " [142] ,MSI vector 142" "No MSI,MSI sent" textline " " eventfld.long 0x10 13. " [141] ,MSI vector 141" "No MSI,MSI sent" eventfld.long 0x10 12. " [140] ,MSI vector 140" "No MSI,MSI sent" eventfld.long 0x10 11. " [139] ,MSI vector 139" "No MSI,MSI sent" eventfld.long 0x10 10. " [138] ,MSI vector 138" "No MSI,MSI sent" eventfld.long 0x10 9. " [137] ,MSI vector 137" "No MSI,MSI sent" eventfld.long 0x10 8. " [136] ,MSI vector 136" "No MSI,MSI sent" textline " " eventfld.long 0x10 7. " [135] ,MSI vector 135" "No MSI,MSI sent" eventfld.long 0x10 6. " [134] ,MSI vector 134" "No MSI,MSI sent" eventfld.long 0x10 5. " [133] ,MSI vector 133" "No MSI,MSI sent" eventfld.long 0x10 4. " [132] ,MSI vector 132" "No MSI,MSI sent" eventfld.long 0x10 3. " [131] ,MSI vector 131" "No MSI,MSI sent" eventfld.long 0x10 2. " [130] ,MSI vector 130" "No MSI,MSI sent" textline " " eventfld.long 0x10 1. " [129] ,MSI vector 129" "No MSI,MSI sent" eventfld.long 0x10 0. " [128] ,MSI vector 128" "No MSI,MSI sent" line.long 0x14 "MSI_VEC5_0,XUSB_HOST MSI Vector Register 5" eventfld.long 0x14 31. " MSI_VECTOR[191] ,MSI vector 191" "No MSI,MSI sent" eventfld.long 0x14 30. " [190] ,MSI vector 190" "No MSI,MSI sent" eventfld.long 0x14 29. " [189] ,MSI vector 189" "No MSI,MSI sent" eventfld.long 0x14 28. " [188] ,MSI vector 188" "No MSI,MSI sent" eventfld.long 0x14 27. " [187] ,MSI vector 187" "No MSI,MSI sent" eventfld.long 0x14 26. " [186] ,MSI vector 186" "No MSI,MSI sent" textline " " eventfld.long 0x14 25. " [185] ,MSI vector 185" "No MSI,MSI sent" eventfld.long 0x14 24. " [184] ,MSI vector 184" "No MSI,MSI sent" eventfld.long 0x14 23. " [183] ,MSI vector 183" "No MSI,MSI sent" eventfld.long 0x14 22. " [182] ,MSI vector 182" "No MSI,MSI sent" eventfld.long 0x14 21. " [181] ,MSI vector 181" "No MSI,MSI sent" eventfld.long 0x14 20. " [180] ,MSI vector 180" "No MSI,MSI sent" textline " " eventfld.long 0x14 19. " [179] ,MSI vector 179" "No MSI,MSI sent" eventfld.long 0x14 18. " [178] ,MSI vector 178" "No MSI,MSI sent" eventfld.long 0x14 17. " [177] ,MSI vector 177" "No MSI,MSI sent" eventfld.long 0x14 16. " [176] ,MSI vector 176" "No MSI,MSI sent" eventfld.long 0x14 15. " [175] ,MSI vector 175" "No MSI,MSI sent" eventfld.long 0x14 14. " [174] ,MSI vector 174" "No MSI,MSI sent" textline " " eventfld.long 0x14 13. " [173] ,MSI vector 173" "No MSI,MSI sent" eventfld.long 0x14 12. " [172] ,MSI vector 172" "No MSI,MSI sent" eventfld.long 0x14 11. " [171] ,MSI vector 171" "No MSI,MSI sent" eventfld.long 0x14 10. " [170] ,MSI vector 170" "No MSI,MSI sent" eventfld.long 0x14 9. " [169] ,MSI vector 169" "No MSI,MSI sent" eventfld.long 0x14 8. " [168] ,MSI vector 168" "No MSI,MSI sent" textline " " eventfld.long 0x14 7. " [167] ,MSI vector 167" "No MSI,MSI sent" eventfld.long 0x14 6. " [166] ,MSI vector 166" "No MSI,MSI sent" eventfld.long 0x14 5. " [165] ,MSI vector 165" "No MSI,MSI sent" eventfld.long 0x14 4. " [164] ,MSI vector 164" "No MSI,MSI sent" eventfld.long 0x14 3. " [163] ,MSI vector 163" "No MSI,MSI sent" eventfld.long 0x14 2. " [162] ,MSI vector 162" "No MSI,MSI sent" textline " " eventfld.long 0x14 1. " [161] ,MSI vector 161" "No MSI,MSI sent" eventfld.long 0x14 0. " [160] ,MSI vector 160" "No MSI,MSI sent" line.long 0x18 "MSI_VEC6_0,XUSB_HOST MSI Vector Register 6" eventfld.long 0x18 31. " MSI_VECTOR[223] ,MSI vector 223" "No MSI,MSI sent" eventfld.long 0x18 30. " [222] ,MSI vector 222" "No MSI,MSI sent" eventfld.long 0x18 29. " [221] ,MSI vector 221" "No MSI,MSI sent" eventfld.long 0x18 28. " [220] ,MSI vector 220" "No MSI,MSI sent" eventfld.long 0x18 27. " [219] ,MSI vector 219" "No MSI,MSI sent" eventfld.long 0x18 26. " [218] ,MSI vector 218" "No MSI,MSI sent" textline " " eventfld.long 0x18 25. " [217] ,MSI vector 217" "No MSI,MSI sent" eventfld.long 0x18 24. " [216] ,MSI vector 216" "No MSI,MSI sent" eventfld.long 0x18 23. " [215] ,MSI vector 215" "No MSI,MSI sent" eventfld.long 0x18 22. " [214] ,MSI vector 214" "No MSI,MSI sent" eventfld.long 0x18 21. " [213] ,MSI vector 213" "No MSI,MSI sent" eventfld.long 0x18 20. " [212] ,MSI vector 212" "No MSI,MSI sent" textline " " eventfld.long 0x18 19. " [211] ,MSI vector 211" "No MSI,MSI sent" eventfld.long 0x18 18. " [210] ,MSI vector 210" "No MSI,MSI sent" eventfld.long 0x18 17. " [209] ,MSI vector 209" "No MSI,MSI sent" eventfld.long 0x18 16. " [208] ,MSI vector 208" "No MSI,MSI sent" eventfld.long 0x18 15. " [207] ,MSI vector 207" "No MSI,MSI sent" eventfld.long 0x18 14. " [206] ,MSI vector 206" "No MSI,MSI sent" textline " " eventfld.long 0x18 13. " [205] ,MSI vector 205" "No MSI,MSI sent" eventfld.long 0x18 12. " [204] ,MSI vector 204" "No MSI,MSI sent" eventfld.long 0x18 11. " [203] ,MSI vector 203" "No MSI,MSI sent" eventfld.long 0x18 10. " [202] ,MSI vector 202" "No MSI,MSI sent" eventfld.long 0x18 9. " [201] ,MSI vector 201" "No MSI,MSI sent" eventfld.long 0x18 8. " [200] ,MSI vector 200" "No MSI,MSI sent" textline " " eventfld.long 0x18 7. " [199] ,MSI vector 199" "No MSI,MSI sent" eventfld.long 0x18 6. " [198] ,MSI vector 198" "No MSI,MSI sent" eventfld.long 0x18 5. " [197] ,MSI vector 197" "No MSI,MSI sent" eventfld.long 0x18 4. " [196] ,MSI vector 196" "No MSI,MSI sent" eventfld.long 0x18 3. " [195] ,MSI vector 195" "No MSI,MSI sent" eventfld.long 0x18 2. " [194] ,MSI vector 194" "No MSI,MSI sent" textline " " eventfld.long 0x18 1. " [193] ,MSI vector 193" "No MSI,MSI sent" eventfld.long 0x18 0. " [192] ,MSI vector 192" "No MSI,MSI sent" line.long 0x1C "MSI_VEC7_0,XUSB_HOST MSI Vector Register 7" eventfld.long 0x1C 31. " MSI_VECTOR[255] ,MSI vector 255" "No MSI,MSI sent" eventfld.long 0x1C 30. " [254] ,MSI vector 254" "No MSI,MSI sent" eventfld.long 0x1C 29. " [253] ,MSI vector 253" "No MSI,MSI sent" eventfld.long 0x1C 28. " [252] ,MSI vector 252" "No MSI,MSI sent" eventfld.long 0x1C 27. " [251] ,MSI vector 251" "No MSI,MSI sent" eventfld.long 0x1C 26. " [250] ,MSI vector 250" "No MSI,MSI sent" textline " " eventfld.long 0x1C 25. " [249] ,MSI vector 249" "No MSI,MSI sent" eventfld.long 0x1C 24. " [248] ,MSI vector 248" "No MSI,MSI sent" eventfld.long 0x1C 23. " [247] ,MSI vector 247" "No MSI,MSI sent" eventfld.long 0x1C 22. " [246] ,MSI vector 246" "No MSI,MSI sent" eventfld.long 0x1C 21. " [245] ,MSI vector 245" "No MSI,MSI sent" eventfld.long 0x1C 20. " [244] ,MSI vector 244" "No MSI,MSI sent" textline " " eventfld.long 0x1C 19. " [243] ,MSI vector 243" "No MSI,MSI sent" eventfld.long 0x1C 18. " [242] ,MSI vector 242" "No MSI,MSI sent" eventfld.long 0x1C 17. " [241] ,MSI vector 241" "No MSI,MSI sent" eventfld.long 0x1C 16. " [240] ,MSI vector 240" "No MSI,MSI sent" eventfld.long 0x1C 15. " [239] ,MSI vector 239" "No MSI,MSI sent" eventfld.long 0x1C 14. " [238] ,MSI vector 238" "No MSI,MSI sent" textline " " eventfld.long 0x1C 13. " [237] ,MSI vector 237" "No MSI,MSI sent" eventfld.long 0x1C 12. " [236] ,MSI vector 236" "No MSI,MSI sent" eventfld.long 0x1C 11. " [235] ,MSI vector 235" "No MSI,MSI sent" eventfld.long 0x1C 10. " [234] ,MSI vector 234" "No MSI,MSI sent" eventfld.long 0x1C 9. " [233] ,MSI vector 233" "No MSI,MSI sent" eventfld.long 0x1C 8. " [232] ,MSI vector 232" "No MSI,MSI sent" textline " " eventfld.long 0x1C 7. " [231] ,MSI vector 231" "No MSI,MSI sent" eventfld.long 0x1C 6. " [230] ,MSI vector 230" "No MSI,MSI sent" eventfld.long 0x1C 5. " [229] ,MSI vector 229" "No MSI,MSI sent" eventfld.long 0x1C 4. " [228] ,MSI vector 228" "No MSI,MSI sent" eventfld.long 0x1C 3. " [227] ,MSI vector 227" "No MSI,MSI sent" eventfld.long 0x1C 2. " [226] ,MSI vector 226" "No MSI,MSI sent" textline " " eventfld.long 0x1C 1. " [225] ,MSI vector 225" "No MSI,MSI sent" eventfld.long 0x1C 0. " [224] ,MSI vector 224" "No MSI,MSI sent" textline " " width 15. group.long 0x140++0x1F line.long 0x00 "MSI_EN_VEC0_0,XUSB_HOST MSI Vector Enable Register 0" bitfld.long 0x00 31. " MSI_ENABLE_VECTOR[31] ,MSI vector enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,MSI vector enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,MSI vector enable 29" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,MSI vector enable 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,MSI vector enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,MSI vector enable 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,MSI vector enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,MSI vector enable 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,MSI vector enable 23" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,MSI vector enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,MSI vector enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,MSI vector enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,MSI vector enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,MSI vector enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,MSI vector enable 17" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,MSI vector enable 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,MSI vector enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,MSI vector enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,MSI vector enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,MSI vector enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,MSI vector enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,MSI vector enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,MSI vector enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,MSI vector enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,MSI vector enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,MSI vector enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,MSI vector enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,MSI vector enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,MSI vector enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,MSI vector enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,MSI vector enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,MSI vector enable 0" "Disabled,Enabled" line.long 0x04 "MSI_EN_VEC1_0,XUSB_HOST MSI Vector Enable Register 1" bitfld.long 0x04 31. " MSI_ENABLE_VECTOR[63] ,MSI vector enable 63" "Disabled,Enabled" bitfld.long 0x04 30. " [62] ,MSI vector enable 62" "Disabled,Enabled" bitfld.long 0x04 29. " [61] ,MSI vector enable 61" "Disabled,Enabled" bitfld.long 0x04 28. " [60] ,MSI vector enable 60" "Disabled,Enabled" bitfld.long 0x04 27. " [59] ,MSI vector enable 59" "Disabled,Enabled" bitfld.long 0x04 26. " [58] ,MSI vector enable 58" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " [57] ,MSI vector enable 57" "Disabled,Enabled" bitfld.long 0x04 24. " [56] ,MSI vector enable 56" "Disabled,Enabled" bitfld.long 0x04 23. " [55] ,MSI vector enable 55" "Disabled,Enabled" bitfld.long 0x04 22. " [54] ,MSI vector enable 54" "Disabled,Enabled" bitfld.long 0x04 21. " [53] ,MSI vector enable 53" "Disabled,Enabled" bitfld.long 0x04 20. " [52] ,MSI vector enable 52" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [51] ,MSI vector enable 51" "Disabled,Enabled" bitfld.long 0x04 18. " [50] ,MSI vector enable 50" "Disabled,Enabled" bitfld.long 0x04 17. " [49] ,MSI vector enable 49" "Disabled,Enabled" bitfld.long 0x04 16. " [48] ,MSI vector enable 48" "Disabled,Enabled" bitfld.long 0x04 15. " [47] ,MSI vector enable 47" "Disabled,Enabled" bitfld.long 0x04 14. " [46] ,MSI vector enable 46" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [45] ,MSI vector enable 45" "Disabled,Enabled" bitfld.long 0x04 12. " [44] ,MSI vector enable 44" "Disabled,Enabled" bitfld.long 0x04 11. " [43] ,MSI vector enable 43" "Disabled,Enabled" bitfld.long 0x04 10. " [42] ,MSI vector enable 42" "Disabled,Enabled" bitfld.long 0x04 9. " [41] ,MSI vector enable 41" "Disabled,Enabled" bitfld.long 0x04 8. " [40] ,MSI vector enable 40" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [39] ,MSI vector enable 39" "Disabled,Enabled" bitfld.long 0x04 6. " [38] ,MSI vector enable 38" "Disabled,Enabled" bitfld.long 0x04 5. " [37] ,MSI vector enable 37" "Disabled,Enabled" bitfld.long 0x04 4. " [36] ,MSI vector enable 36" "Disabled,Enabled" bitfld.long 0x04 3. " [35] ,MSI vector enable 35" "Disabled,Enabled" bitfld.long 0x04 2. " [34] ,MSI vector enable 34" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [33] ,MSI vector enable 33" "Disabled,Enabled" bitfld.long 0x04 0. " [32] ,MSI vector enable 32" "Disabled,Enabled" line.long 0x08 "MSI_EN_VEC2_0,XUSB_HOST MSI Vector Enable Register 2" bitfld.long 0x08 31. " MSI_ENABLE_VECTOR[95] ,MSI vector enable 95" "Disabled,Enabled" bitfld.long 0x08 30. " [94] ,MSI vector enable 94" "Disabled,Enabled" bitfld.long 0x08 29. " [93] ,MSI vector enable 93" "Disabled,Enabled" bitfld.long 0x08 28. " [92] ,MSI vector enable 92" "Disabled,Enabled" bitfld.long 0x08 27. " [91] ,MSI vector enable 91" "Disabled,Enabled" bitfld.long 0x08 26. " [90] ,MSI vector enable 90" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " [89] ,MSI vector enable 89" "Disabled,Enabled" bitfld.long 0x08 24. " [88] ,MSI vector enable 88" "Disabled,Enabled" bitfld.long 0x08 23. " [87] ,MSI vector enable 87" "Disabled,Enabled" bitfld.long 0x08 22. " [86] ,MSI vector enable 86" "Disabled,Enabled" bitfld.long 0x08 21. " [85] ,MSI vector enable 85" "Disabled,Enabled" bitfld.long 0x08 20. " [84] ,MSI vector enable 84" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " [83] ,MSI vector enable 83" "Disabled,Enabled" bitfld.long 0x08 18. " [82] ,MSI vector enable 82" "Disabled,Enabled" bitfld.long 0x08 17. " [81] ,MSI vector enable 81" "Disabled,Enabled" bitfld.long 0x08 16. " [80] ,MSI vector enable 80" "Disabled,Enabled" bitfld.long 0x08 15. " [79] ,MSI vector enable 79" "Disabled,Enabled" bitfld.long 0x08 14. " [78] ,MSI vector enable 78" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " [77] ,MSI vector enable 77" "Disabled,Enabled" bitfld.long 0x08 12. " [76] ,MSI vector enable 76" "Disabled,Enabled" bitfld.long 0x08 11. " [75] ,MSI vector enable 75" "Disabled,Enabled" bitfld.long 0x08 10. " [74] ,MSI vector enable 74" "Disabled,Enabled" bitfld.long 0x08 9. " [73] ,MSI vector enable 73" "Disabled,Enabled" bitfld.long 0x08 8. " [72] ,MSI vector enable 72" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " [71] ,MSI vector enable 71" "Disabled,Enabled" bitfld.long 0x08 6. " [70] ,MSI vector enable 70" "Disabled,Enabled" bitfld.long 0x08 5. " [69] ,MSI vector enable 69" "Disabled,Enabled" bitfld.long 0x08 4. " [68] ,MSI vector enable 68" "Disabled,Enabled" bitfld.long 0x08 3. " [67] ,MSI vector enable 67" "Disabled,Enabled" bitfld.long 0x08 2. " [66] ,MSI vector enable 66" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " [65] ,MSI vector enable 65" "Disabled,Enabled" bitfld.long 0x08 0. " [64] ,MSI vector enable 64" "Disabled,Enabled" line.long 0x0C "MSI_EN_VEC3_0,XUSB_HOST MSI Vector Enable Register 3" bitfld.long 0x0C 31. " MSI_ENABLE_VECTOR[127] ,MSI vector enable 127" "Disabled,Enabled" bitfld.long 0x0C 30. " [126] ,MSI vector enable 126" "Disabled,Enabled" bitfld.long 0x0C 29. " [125] ,MSI vector enable 125" "Disabled,Enabled" bitfld.long 0x0C 28. " [124] ,MSI vector enable 124" "Disabled,Enabled" bitfld.long 0x0C 27. " [123] ,MSI vector enable 123" "Disabled,Enabled" bitfld.long 0x0C 26. " [122] ,MSI vector enable 122" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " [121] ,MSI vector enable 121" "Disabled,Enabled" bitfld.long 0x0C 24. " [120] ,MSI vector enable 120" "Disabled,Enabled" bitfld.long 0x0C 23. " [119] ,MSI vector enable 119" "Disabled,Enabled" bitfld.long 0x0C 22. " [118] ,MSI vector enable 118" "Disabled,Enabled" bitfld.long 0x0C 21. " [117] ,MSI vector enable 117" "Disabled,Enabled" bitfld.long 0x0C 20. " [116] ,MSI vector enable 116" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " [115] ,MSI vector enable 115" "Disabled,Enabled" bitfld.long 0x0C 18. " [114] ,MSI vector enable 114" "Disabled,Enabled" bitfld.long 0x0C 17. " [113] ,MSI vector enable 113" "Disabled,Enabled" bitfld.long 0x0C 16. " [112] ,MSI vector enable 112" "Disabled,Enabled" bitfld.long 0x0C 15. " [111] ,MSI vector enable 111" "Disabled,Enabled" bitfld.long 0x0C 14. " [110] ,MSI vector enable 110" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " [109] ,MSI vector enable 109" "Disabled,Enabled" bitfld.long 0x0C 12. " [108] ,MSI vector enable 108" "Disabled,Enabled" bitfld.long 0x0C 11. " [107] ,MSI vector enable 107" "Disabled,Enabled" bitfld.long 0x0C 10. " [106] ,MSI vector enable 106" "Disabled,Enabled" bitfld.long 0x0C 9. " [105] ,MSI vector enable 105" "Disabled,Enabled" bitfld.long 0x0C 8. " [104] ,MSI vector enable 104" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " [103] ,MSI vector enable 103" "Disabled,Enabled" bitfld.long 0x0C 6. " [102] ,MSI vector enable 102" "Disabled,Enabled" bitfld.long 0x0C 5. " [101] ,MSI vector enable 101" "Disabled,Enabled" bitfld.long 0x0C 4. " [100] ,MSI vector enable 100" "Disabled,Enabled" bitfld.long 0x0C 3. " [99] ,MSI vector enable 99" "Disabled,Enabled" bitfld.long 0x0C 2. " [98] ,MSI vector enable 98" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " [97] ,MSI vector enable 97" "Disabled,Enabled" bitfld.long 0x0C 0. " [96] ,MSI vector enable 96" "Disabled,Enabled" line.long 0x10 "MSI_EN_VEC4_0,XUSB_HOST MSI Vector Enable Register 4" bitfld.long 0x10 31. " MSI_ENABLE_VECTOR[159] ,MSI vector enable 159" "Disabled,Enabled" bitfld.long 0x10 30. " [158] ,MSI vector enable 158" "Disabled,Enabled" bitfld.long 0x10 29. " [157] ,MSI vector enable 157" "Disabled,Enabled" bitfld.long 0x10 28. " [156] ,MSI vector enable 156" "Disabled,Enabled" bitfld.long 0x10 27. " [155] ,MSI vector enable 155" "Disabled,Enabled" bitfld.long 0x10 26. " [154] ,MSI vector enable 154" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " [153] ,MSI vector enable 153" "Disabled,Enabled" bitfld.long 0x10 24. " [152] ,MSI vector enable 152" "Disabled,Enabled" bitfld.long 0x10 23. " [151] ,MSI vector enable 151" "Disabled,Enabled" bitfld.long 0x10 22. " [150] ,MSI vector enable 150" "Disabled,Enabled" bitfld.long 0x10 21. " [149] ,MSI vector enable 149" "Disabled,Enabled" bitfld.long 0x10 20. " [148] ,MSI vector enable 148" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " [147] ,MSI vector enable 147" "Disabled,Enabled" bitfld.long 0x10 18. " [146] ,MSI vector enable 146" "Disabled,Enabled" bitfld.long 0x10 17. " [145] ,MSI vector enable 145" "Disabled,Enabled" bitfld.long 0x10 16. " [144] ,MSI vector enable 144" "Disabled,Enabled" bitfld.long 0x10 15. " [143] ,MSI vector enable 143" "Disabled,Enabled" bitfld.long 0x10 14. " [142] ,MSI vector enable 142" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " [141] ,MSI vector enable 141" "Disabled,Enabled" bitfld.long 0x10 12. " [140] ,MSI vector enable 140" "Disabled,Enabled" bitfld.long 0x10 11. " [139] ,MSI vector enable 139" "Disabled,Enabled" bitfld.long 0x10 10. " [138] ,MSI vector enable 138" "Disabled,Enabled" bitfld.long 0x10 9. " [137] ,MSI vector enable 137" "Disabled,Enabled" bitfld.long 0x10 8. " [136] ,MSI vector enable 136" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " [135] ,MSI vector enable 135" "Disabled,Enabled" bitfld.long 0x10 6. " [134] ,MSI vector enable 134" "Disabled,Enabled" bitfld.long 0x10 5. " [133] ,MSI vector enable 133" "Disabled,Enabled" bitfld.long 0x10 4. " [132] ,MSI vector enable 132" "Disabled,Enabled" bitfld.long 0x10 3. " [131] ,MSI vector enable 131" "Disabled,Enabled" bitfld.long 0x10 2. " [130] ,MSI vector enable 130" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " [129] ,MSI vector enable 129" "Disabled,Enabled" bitfld.long 0x10 0. " [128] ,MSI vector enable 128" "Disabled,Enabled" line.long 0x14 "MSI_EN_VEC5_0,XUSB_HOST MSI Vector Enable Register 5" bitfld.long 0x14 31. " MSI_ENABLE_VECTOR[191] ,MSI vector enable 191" "Disabled,Enabled" bitfld.long 0x14 30. " [190] ,MSI vector enable 190" "Disabled,Enabled" bitfld.long 0x14 29. " [189] ,MSI vector enable 189" "Disabled,Enabled" bitfld.long 0x14 28. " [188] ,MSI vector enable 188" "Disabled,Enabled" bitfld.long 0x14 27. " [187] ,MSI vector enable 187" "Disabled,Enabled" bitfld.long 0x14 26. " [186] ,MSI vector enable 186" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " [185] ,MSI vector enable 185" "Disabled,Enabled" bitfld.long 0x14 24. " [184] ,MSI vector enable 184" "Disabled,Enabled" bitfld.long 0x14 23. " [183] ,MSI vector enable 183" "Disabled,Enabled" bitfld.long 0x14 22. " [182] ,MSI vector enable 182" "Disabled,Enabled" bitfld.long 0x14 21. " [181] ,MSI vector enable 181" "Disabled,Enabled" bitfld.long 0x14 20. " [180] ,MSI vector enable 180" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " [179] ,MSI vector enable 179" "Disabled,Enabled" bitfld.long 0x14 18. " [178] ,MSI vector enable 178" "Disabled,Enabled" bitfld.long 0x14 17. " [177] ,MSI vector enable 177" "Disabled,Enabled" bitfld.long 0x14 16. " [176] ,MSI vector enable 176" "Disabled,Enabled" bitfld.long 0x14 15. " [175] ,MSI vector enable 175" "Disabled,Enabled" bitfld.long 0x14 14. " [174] ,MSI vector enable 174" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " [173] ,MSI vector enable 173" "Disabled,Enabled" bitfld.long 0x14 12. " [172] ,MSI vector enable 172" "Disabled,Enabled" bitfld.long 0x14 11. " [171] ,MSI vector enable 171" "Disabled,Enabled" bitfld.long 0x14 10. " [170] ,MSI vector enable 170" "Disabled,Enabled" bitfld.long 0x14 9. " [169] ,MSI vector enable 169" "Disabled,Enabled" bitfld.long 0x14 8. " [168] ,MSI vector enable 168" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " [167] ,MSI vector enable 167" "Disabled,Enabled" bitfld.long 0x14 6. " [166] ,MSI vector enable 166" "Disabled,Enabled" bitfld.long 0x14 5. " [165] ,MSI vector enable 165" "Disabled,Enabled" bitfld.long 0x14 4. " [164] ,MSI vector enable 164" "Disabled,Enabled" bitfld.long 0x14 3. " [163] ,MSI vector enable 163" "Disabled,Enabled" bitfld.long 0x14 2. " [162] ,MSI vector enable 162" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " [161] ,MSI vector enable 161" "Disabled,Enabled" bitfld.long 0x14 0. " [160] ,MSI vector enable 160" "Disabled,Enabled" line.long 0x18 "MSI_EN_VEC6_0,XUSB_HOST MSI Vector Enable Register 6" bitfld.long 0x18 31. " MSI_ENABLE_VECTOR[223] ,MSI vector enable 223" "Disabled,Enabled" bitfld.long 0x18 30. " [222] ,MSI vector enable 222" "Disabled,Enabled" bitfld.long 0x18 29. " [221] ,MSI vector enable 221" "Disabled,Enabled" bitfld.long 0x18 28. " [220] ,MSI vector enable 220" "Disabled,Enabled" bitfld.long 0x18 27. " [219] ,MSI vector enable 219" "Disabled,Enabled" bitfld.long 0x18 26. " [218] ,MSI vector enable 218" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " [217] ,MSI vector enable 217" "Disabled,Enabled" bitfld.long 0x18 24. " [216] ,MSI vector enable 216" "Disabled,Enabled" bitfld.long 0x18 23. " [215] ,MSI vector enable 215" "Disabled,Enabled" bitfld.long 0x18 22. " [214] ,MSI vector enable 214" "Disabled,Enabled" bitfld.long 0x18 21. " [213] ,MSI vector enable 213" "Disabled,Enabled" bitfld.long 0x18 20. " [212] ,MSI vector enable 212" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " [211] ,MSI vector enable 211" "Disabled,Enabled" bitfld.long 0x18 18. " [210] ,MSI vector enable 210" "Disabled,Enabled" bitfld.long 0x18 17. " [209] ,MSI vector enable 209" "Disabled,Enabled" bitfld.long 0x18 16. " [208] ,MSI vector enable 208" "Disabled,Enabled" bitfld.long 0x18 15. " [207] ,MSI vector enable 207" "Disabled,Enabled" bitfld.long 0x18 14. " [206] ,MSI vector enable 206" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " [205] ,MSI vector enable 205" "Disabled,Enabled" bitfld.long 0x18 12. " [204] ,MSI vector enable 204" "Disabled,Enabled" bitfld.long 0x18 11. " [203] ,MSI vector enable 203" "Disabled,Enabled" bitfld.long 0x18 10. " [202] ,MSI vector enable 202" "Disabled,Enabled" bitfld.long 0x18 9. " [201] ,MSI vector enable 201" "Disabled,Enabled" bitfld.long 0x18 8. " [200] ,MSI vector enable 200" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " [199] ,MSI vector enable 199" "Disabled,Enabled" bitfld.long 0x18 6. " [198] ,MSI vector enable 198" "Disabled,Enabled" bitfld.long 0x18 5. " [197] ,MSI vector enable 197" "Disabled,Enabled" bitfld.long 0x18 4. " [196] ,MSI vector enable 196" "Disabled,Enabled" bitfld.long 0x18 3. " [195] ,MSI vector enable 195" "Disabled,Enabled" bitfld.long 0x18 2. " [194] ,MSI vector enable 194" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " [193] ,MSI vector enable 193" "Disabled,Enabled" bitfld.long 0x18 0. " [192] ,MSI vector enable 192" "Disabled,Enabled" line.long 0x1C "MSI_EN_VEC7_0,XUSB_HOST MSI Vector Enable Register 7" bitfld.long 0x1C 31. " MSI_ENABLE_VECTOR[255] ,MSI vector enable 255" "Disabled,Enabled" bitfld.long 0x1C 30. " [254] ,MSI vector enable 254" "Disabled,Enabled" bitfld.long 0x1C 29. " [253] ,MSI vector enable 253" "Disabled,Enabled" bitfld.long 0x1C 28. " [252] ,MSI vector enable 252" "Disabled,Enabled" bitfld.long 0x1C 27. " [251] ,MSI vector enable 251" "Disabled,Enabled" bitfld.long 0x1C 26. " [250] ,MSI vector enable 250" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " [249] ,MSI vector enable 249" "Disabled,Enabled" bitfld.long 0x1C 24. " [248] ,MSI vector enable 248" "Disabled,Enabled" bitfld.long 0x1C 23. " [247] ,MSI vector enable 247" "Disabled,Enabled" bitfld.long 0x1C 22. " [246] ,MSI vector enable 246" "Disabled,Enabled" bitfld.long 0x1C 21. " [245] ,MSI vector enable 245" "Disabled,Enabled" bitfld.long 0x1C 20. " [244] ,MSI vector enable 244" "Disabled,Enabled" textline " " bitfld.long 0x1C 19. " [243] ,MSI vector enable 243" "Disabled,Enabled" bitfld.long 0x1C 18. " [242] ,MSI vector enable 242" "Disabled,Enabled" bitfld.long 0x1C 17. " [241] ,MSI vector enable 241" "Disabled,Enabled" bitfld.long 0x1C 16. " [240] ,MSI vector enable 240" "Disabled,Enabled" bitfld.long 0x1C 15. " [239] ,MSI vector enable 239" "Disabled,Enabled" bitfld.long 0x1C 14. " [238] ,MSI vector enable 238" "Disabled,Enabled" textline " " bitfld.long 0x1C 13. " [237] ,MSI vector enable 237" "Disabled,Enabled" bitfld.long 0x1C 12. " [236] ,MSI vector enable 236" "Disabled,Enabled" bitfld.long 0x1C 11. " [235] ,MSI vector enable 235" "Disabled,Enabled" bitfld.long 0x1C 10. " [234] ,MSI vector enable 234" "Disabled,Enabled" bitfld.long 0x1C 9. " [233] ,MSI vector enable 233" "Disabled,Enabled" bitfld.long 0x1C 8. " [232] ,MSI vector enable 232" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " [231] ,MSI vector enable 231" "Disabled,Enabled" bitfld.long 0x1C 6. " [230] ,MSI vector enable 230" "Disabled,Enabled" bitfld.long 0x1C 5. " [229] ,MSI vector enable 229" "Disabled,Enabled" bitfld.long 0x1C 4. " [228] ,MSI vector enable 228" "Disabled,Enabled" bitfld.long 0x1C 3. " [227] ,MSI vector enable 227" "Disabled,Enabled" bitfld.long 0x1C 2. " [226] ,MSI vector enable 226" "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " [225] ,MSI vector enable 225" "Disabled,Enabled" bitfld.long 0x1C 0. " [224] ,MSI vector enable 224" "Disabled,Enabled" width 0x0B tree.end width 20. tree "Configuration registers" group.long 0x180++0x1F line.long 0x00 "CONFIGURATION_0,Configuration" bitfld.long 0x00 31. " CLKEN_OVERRIDE ,Override the clock enable in case of a malfunction" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x00 19. " PW_NO_DEVSEL_ERR_CYA ,Disable detection of DECERR due to no DEVSEL" "No,Yes" else bitfld.long 0x00 19. " PW_NO_DEVSEL_ERR_CYA ,Disable detection of DECERR due to no DEVSEL" "No,Yes" endif textline " " rbitfld.long 0x00 18. " INITIATOR_READ_IDLE ,AFI upstream read status" "Busy,Idle" rbitfld.long 0x00 17. " INITIATOR_WRITE_IDLE ,AFI upstream write status" "Busy,Idle" textline " " bitfld.long 0x00 15. " WDATA_LEAD_CYA ,Enable the handling of write data ahead of requests on IPFS AXI" "Disabled,Enabled" bitfld.long 0x00 14. " WR_INTRLV_CYA ,Disable the handling of interleaved write requests on IPFS AXI" "Disabled,Enabled" textline " " rbitfld.long 0x00 11. " TARGET_READ_IDLE ,IPFS target read status" "Busy,Idle" rbitfld.long 0x00 10. " TARGET_WRITE_IDLE ,IPFS target write status" "Busy,Idle" textline " " rbitfld.long 0x00 9. " MSI_VEC_EMPTY ,MSI Vector registers status" "No empty,Empty" bitfld.long 0x00 7. " UFPCI_MSIAW ,MSI After Write ordering rule" "Default behavior (MSIAW ordering),Interrupt whenever MSI is ready" textline " " bitfld.long 0x00 6. " UFPCI_PWPASSPW ,Send input to the upstream FPCI" "Whenever write is ready,Only when PW has retired" bitfld.long 0x00 5. " UFPCI_PASSPW ,Allows the upstream FPCI reads to pass writes" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " UFPCI_PWPASSNPW ,Allows the upstream FPCI PWs to pass NPW" "Not allowed,Allowed" bitfld.long 0x00 3. " DFPCI_PWPASSNPW ,Allows the downstream FPCI PWs to pass NPW" "Not allowed,Allowed" textline " " bitfld.long 0x00 2. " DFPCI_RSPPASSPW ,Allows the downstream FPCI responses to pass writes" "Not allowed,Allowed" bitfld.long 0x00 1. " DFPCI_PASSPW ,Allow the downstream FPCI reads to pass writes" "Not allowed,Allowed" textline " " bitfld.long 0x00 0. " EN_FPCI ,Enable FPCI" "Disabled,Enabled" line.long 0x04 "FPCI_ERROR_MASKS_0,XUSB_HOSTFPCI Error Masks" bitfld.long 0x04 2. " MASK_FPCI_MASTER_ABORT ,Allows an FPCI error response indicates a Master Abort" "Return AXI OK,Forward error" bitfld.long 0x04 1. " MASK_FPCI_DATA_ERROR ,Allows an FPCI error response indicates a Data Error" "Return AXI OK,Forward error" bitfld.long 0x04 0. " MASK_FPCI_TARGET_ABORT ,Allows an FPCI error response indicates a Target Abort" "Return AXI OK,Forward error" line.long 0x08 "INTR_MASK_0,Interrupt Masks" bitfld.long 0x08 16. " IP_INT_MASK ,IP interrupt to the CPU complex gated by the mask" "0,1" bitfld.long 0x08 8. " MSI_MASK ,MSI to the CPU complex gated by the mask" "0,1" bitfld.long 0x08 0. " INT_MASK ,Interrupt to the CPU complex gated by the mask" "0,1" line.long 0x0C "INTR_CODE_0,Interrupt Control" bitfld.long 0x0C 0.--4. " INT_CODE ,Eight interrupt codes" "CLEAR,INI_SLVERR,INI_DECERR,TGT_SLVERR,TGT_DECERR,TGT_WRERR,,DFPCI_DECERR,AXI_DECERR,TIMEOUT,,,,,,SM_FATAL_ERROR,SM_NON_FATAL_ERROR,?..." line.long 0x10 "INTR_SIGNATURE_0,Interrupt Signature" hexmask.long 0x10 2.--31. 0x4 " INT_INFO ,Interrupt info (Address bits for interrupt codes)" bitfld.long 0x10 0. " DIR ,Direction of the AXI/FPCI transaction" "Write,Read" line.long 0x14 "UPPER_FPCI_ADDR_0,Upper FPCI Address" hexmask.long.byte 0x14 0.--7. 0x01 " INT_INFO_UPPER ,Upper byte of the captured FPCI address (for interrupt code: 3, 4 or 7)" line.long 0x18 "IPFS_INTR_ENABLE_0,IPFS Interrupt Enable" bitfld.long 0x18 13. " EN_SM_NON_FATAL_ERROR ,Enable bit for interrupt code 15" "Disabled,Enabled" bitfld.long 0x18 12. " EN_SM_FATAL_ERROR ,Enable bit for interrupt code 14" "Disabled,Enabled" bitfld.long 0x18 7. " EN_FPCI_TIMEOUT ,Enable bit for interrupt code 9" "Disabled,Enabled" textline " " bitfld.long 0x18 6. " EN_AXI_DECERR ,Enable bit for interrupt code 8" "Disabled,Enabled" bitfld.long 0x18 5. " EN_DFPCI_DECERR ,Enable bit for interrupt code 7" "Disabled,Enabled" bitfld.long 0x18 4. " EN_TGT_WRERR ,Enable bit for interrupt code 5" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " EN_TGT_DECERR ,Enable bit for interrupt code 4" "Disabled,Enabled" bitfld.long 0x18 2. " EN_TGT_SLVERR ,Enable bit for interrupt code 3" "Disabled,Enabled" bitfld.long 0x18 1. " EN_INI_DECERR ,Enable bit for interrupt code 2" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " EN_INI_SLVERR ,Enable bit for interrupt code 1" "Disabled,Enabled" line.long 0x1C "UFPCI_CONFIG_0,Upstream FPCI Configuration" bitfld.long 0x1C 0.--4. " UNITID_T0C0 ,Upstream FPCI Unit ID for controller 0. HyperTransport (Upstream FPCI request)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x1A0++0x0B line.long 0x00 "CFG_REVID_0,CFG_REVID Register" rbitfld.long 0x00 19. " DEV2SM_NONISO_REQUEST_PEND ,There is a non-ISO request pending" "Not pending,Pending" rbitfld.long 0x00 18. " DEV2SM_ISO_REQUEST_PEND ,There is an ISO request pending" "Not pending,Pending" bitfld.long 0x00 12.--13. " STRAP_CPU_MODE ,MCP: Mode to send MSI" "NB_INTEL,NB_AMD,AMD,TMTA" textline " " bitfld.long 0x00 11. " CFG_REVID_WRITE_ENABLE ,Enable to override the rev ID" "Clear,Set" bitfld.long 0x00 10. " CFG_REVID_OVERRIDE ,Provides a way to override the current revision ID" "Disabled,Enabled" rbitfld.long 0x00 4. " DEV2LEG_NONCOH_REQUEST_PEND ,Tells the leg block that a non-coherent request is pending" "Not pending,Pending" textline " " rbitfld.long 0x00 3. " DEV2LEG_COH_REQUEST_PEND ,Tells the leg block that a coherent request is pending" "Not pending,Pending" bitfld.long 0x00 2. " SM2DEV_FPCI_TIMEOUT_EN ,FPCI timeout enable bit for Controller" "Disabled,Enabled" line.long 0x04 "FPCI_TIMEOUT_0,FPCI_TIMEOUT Register" hexmask.long.tbyte 0x04 0.--19. 1. " SM2ALL_FPCI_TIMEOUT_THRESH ,Timeout threshold value for the FPCI bus" line.long 0x08 "TOM_0,Top Of Memory Limit" hexmask.long.word 0x08 16.--29. 1. " LEG2ALL_TOM2 ,Top of Memory Limit 2" hexmask.long.word 0x08 0.--11. 1. " LEG2ALL_TOM1 ,Top of Memory Limit 1" textline " " width 33. rgroup.long 0x1AC++0x0B line.long 0x00 "INITIATOR_ISO_PW_RESP_PENDING_0,Initiator ISO PW Response Pending" hexmask.long.byte 0x00 0.--7. 1. " NUM_INITIATOR_ISO_PW_RESP_PEND ,Number of pending initiator ISO PW responses" line.long 0x04 "INITIATOR_NISO_PW_RESP_PENDING_0,Initiator Non-ISO PW Response Pending" hexmask.long.byte 0x04 0.--7. 1. " NUM_INITIATOR_NISO_PW_RESP_PEND ,Number of pending initiator NISO PW responses" line.long 0x08 "INTR_STATUS_0,IPFS Interrupt Status" bitfld.long 0x08 2. " IP_INTR_STATUS ,Status of IP interrupt" "No interrupt,Interrupt" bitfld.long 0x08 1. " MSI_INTR_STATUS ,Status of MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x08 0. " IPFS_INTR_STATUS ,Status of IPFS interrupt" "No interrupt,Interrupt" textline " " width 22. group.long 0x1B8++0x07 line.long 0x00 "DFPCI_BEN_0,Downstream FPCI Byte Enables" bitfld.long 0x00 31. " EN_DFPCI_BEN ,Enable bit for BEN" "Disabled,Enabled" bitfld.long 0x00 0.--3. " DFPCI_BYTE_ENABLE_N ,Active low byte enables" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CLKGATE_HYSTERESIS_0,CLKGATE HYSTERESIS 0" hexmask.long.byte 0x04 0.--7. 1. " CLK_DISABLE_CNT ,Number of IPFS clock cycles to wait after clock gating criteria is met to disable IPFS/FPCI clocks" sif !cpuis("TEGRAX2") group.long 0x1DC++0x03 line.long 0x00 "MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control Register" bitfld.long 0x00 20. " RCLK_OVR_MODE ,RCLK OVR MODE" "Legacy,On" bitfld.long 0x00 19. " WCLK_OVR_MODE ,RCLK OVR MODE" "Legacy,On" bitfld.long 0x00 18. " CCLK_OVERRIDE ,CCLK OVERRIDE" "No override,Override" textline " " bitfld.long 0x00 17. " RCLK_OVERRIDE ,RCLK OVERRIDE" "No override,Override" bitfld.long 0x00 16. " WCLK_OVERRIDE ,WCLK OVERRIDE" "No override,Override" bitfld.long 0x00 3. " MCCIF_RDCL_RDFAST ,MCCIF RDCL RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MCCIF_WRMC_CLLE2X ,MCCIF WRMC CLLE2X" "Disabled,Enabled" bitfld.long 0x00 1. " MCCIF_RDMC_RDFAST ,MCCIF RDMC RDFAST" "Disabled,Enabled" bitfld.long 0x00 0. " MCCIF_WRCL_MCLE2X ,MCCIF WRCL MCLE2X" "Disabled,Enabled" endif textline " " width 18. group.long 0x1E0++0x0B line.long 0x00 "ORDERING_RULES_0,ORDERING RULES" sif cpuis("TEGRAX1") bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Tegra X1,Tegra 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Tegra X1,Tegra 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Tegra X1,Tegra 3" elif cpuis("TEGRAX2") bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Parker,Parker 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Parker,Parker 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Parker,Parker 3" else bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Tegra K1,Tegra 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Tegra K1,Tegra 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Tegra K1,Tegra 3" endif line.long 0x04 "A2F_UFPCI_CFG0_0,A2F UFPCI CFG0" hexmask.long.byte 0x04 24.--31. 1. " STATIC_WAIT_IDLE_CNTR ,Static wait idle control" bitfld.long 0x04 16.--18. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI1 ,Static UFPCI UFA starve Control PRI1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--15. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI0 ,Static UFPCI UFA starve control PRI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 10.--11. " STATIC_UFPCI_RR_BURST_SZ_PRI1 ,Static UFPCI RR burst SZ PRI1" "0,1,2,3" bitfld.long 0x04 8.--9. " STATIC_UFPCI_RR_BURST_SZ_PRI0 ,Static UFPCI RR burst SZ PRI0" "0,1,2,3" bitfld.long 0x04 7. " STATIC_WAIT_CLAMP_EN ,Static wait clamp enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " STATIC_UFPCI_UFA_DYN_BLOCK_EN ,Static UFPCI UFA DYN block enable" "Disabled,Enabled" bitfld.long 0x04 5. " STATIC_UFPCI_UFA_BLK_COHERENT ,Static UFPCI UFA BLK coherent" "No coherent,Coherent" bitfld.long 0x04 2.--4. " STATIC_UFPCI_BLOCK_CMD_THRESHOLD ,Static UFPCI block CMD threshold" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 1. " STATIC_CYA_UFA_ARB ,Static CYA UFA ARB" "0,1" bitfld.long 0x04 0. " STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK ,Static CYA back to back upstream block" "0,1" line.long 0x08 "A2F_UFPCI_CFG1_0,A2F UFPCI CFG1" hexmask.long.byte 0x08 0.--7. 1. " STATIC_WAIT_UNCLAMP_CNTR ,Static wait unclamp control" tree.end width 0x0B tree.end tree "HOST PCI Config Registers" base ad:0x70098000 width 8. tree "XUSB PCI Config Registers" rgroup.long 0x00++0x03 line.long 0x00 "CFG_0,XUSB Configuration Register 0" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID_UNIT ,DEVICE ID UNIT" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,VENDOR ID" group.long 0x04++0x03 line.long 0x00 "CFG_1,XUSB Configuration Register 1" rbitfld.long 0x00 31. " DETECTED_PERR ,T_XUSB_CFG_1 DETECTED PERR" "Not active,Active" rbitfld.long 0x00 30. " SIGNALED_SERR ,T_XUSB_CFG_1 SIGNALED SERR" "Not active,Active" rbitfld.long 0x00 29. " RECEIVED_MASTER ,T_XUSB_CFG_1 RECEIVED MASTER" "Not aborted,Aborted" rbitfld.long 0x00 28. " RECEIVED_TARGET ,T_XUSB_CFG_1 RECEIVED TARGET" "Not aborted,Aborted" textline " " rbitfld.long 0x00 27. " SIGNALED_TARGET ,T_XUSB_CFG_1 SIGNALED TARGET" "Not aborted,Aborted" rbitfld.long 0x00 25.--26. " DEVSEL_TIMING ,T_XUSB_CFG_1 DEVSEL TIMING" "Fast,Medium,Slow,?..." rbitfld.long 0x00 24. " MASTER_DATA_PERR ,T_XUSB_CFG_1 MASTER DATA PERR" "Inactive,Active" rbitfld.long 0x00 23. " FAST_BACK2BACK ,T_XUSB_CFG_1 FAST BACK2BACK" "Incapable,Capable" textline " " rbitfld.long 0x00 21. " 66MHZ ,T_XUSB_CFG_1 66MHZ" "Incapable,Capable" rbitfld.long 0x00 20. " CAPLIST ,T_XUSB_CFG_1 CAPLIST" "Not present,Present" rbitfld.long 0x00 19. " INTR_STATUS ,T_XUSB_CFG_1 INTR STATUS" "0,1" bitfld.long 0x00 10. " INTR_DISABLE ,T_XUSB_CFG_1 INTR DISABLE" "On,Off" textline " " rbitfld.long 0x00 9. " BACK2BACK ,T_XUSB_CFG_1 BACK2BACK" "Disabled,Enabled" rbitfld.long 0x00 8. " SERR ,T_XUSB_CFG_1 SERR" "Disabled,Enabled" rbitfld.long 0x00 7. " STEP ,T_XUSB_CFG_1 STEP" "Disabled,Enabled" rbitfld.long 0x00 6. " PERR ,T_XUSB_CFG_1 PERR" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " PALETTE_SNOOP ,T_XUSB_CFG_1 PALETTE SNOOP" "Disabled,Enabled" rbitfld.long 0x00 4. " WRITE_AND_INVAL ,T_XUSB_CFG_1 WRITE AND INVAL" "Disabled,Enabled" sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") textline " " rbitfld.long 0x00 3. " SPECIAL_CYCLE ,T_XUSB_CFG_1 SPECIAL CYCLE" "Disabled,Enabled" else textline " " bitfld.long 0x00 3. " SPECIAL_CYCLE ,T_XUSB_CFG_1 SPECIAL CYCLE" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " BUS_MASTER ,T_XUSB_CFG_1 BUS MASTER" "Disabled,Enabled" bitfld.long 0x00 1. " MEMORY_SPACE ,T_XUSB_CFG_1 MEMORY SPACE" "Disabled,Enabled" bitfld.long 0x00 0. " IO_SPACE ,T_XUSB_CFG_1 IO SPACE" "Disabled,Enabled" rgroup.long 0x08++0x07 line.long 0x00 "CFG_2,PCI Revision ID And Class Code Register 2" hexmask.long.byte 0x00 24.--31. 1. " BASE_CLASS ,T_XUSB_CFG_2 BASE CLASS" hexmask.long.byte 0x00 16.--23. 1. " SUB_CLASS ,T_XUSB_CFG 2 SUB CLASS" hexmask.long.byte 0x00 8.--15. 1. " PROG_IF ,T_XUSB_CFG 2 PROG IF" hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,T_XUSB_CFG_2 REVISION ID" line.long 0x04 "CFG_3,PCI Configuration Register 3" bitfld.long 0x04 23. " HEADER_TYPE_FUNC ,Identify whenever device contains single or multiple functions" "Single,Multi" hexmask.long.byte 0x04 16.--22. 1. " HEADER_TYPE_DEVICE ,Header type - identify the layout of the bytes (0x10--0x3f) in configuration space" bitfld.long 0x04 11.--15. " LATENCY_TIMER ,The value of the latency timer for this PCI bus master (In units of PCI bus clocks)" "0 clocks,8 clocks,16 clocks,24 clocks,32 clocks,40 clocks,48 clocks,56 clocks,64 clocks,72 clocks,80 clocks,88 clocks,96 clocks,104 clocks,112 clocks,120 clocks,128 clocks,136 clocks,144 clocks,152 clocks,160 clocks,168 clocks,176 clocks,184 clocks,192 clocks,200 clocks,208 clocks,216 clocks,224 clocks,232 clocks,240 clocks,248 clocks" hexmask.long.byte 0x04 0.--7. 1. " CACHE_LINE_SIZE ,T_XUSB_CFG_3 CACHE LINE SIZE" group.long 0x10++0x07 line.long 0x00 "CFG_4,PCI Configuration Register 4" hexmask.long.tbyte 0x00 15.--31. 0x80 " BASE_ADDRESS ,Base address of the device" hexmask.long.word 0x00 4.--14. 1. " BAR_SIZE_32KB ,T_XUSB_CFG_4 BAR SIZE 32KB" rbitfld.long 0x00 3. " PREFETCHABLE ,T_XUSB_CFG_4 PREFETCHABLE" "Not prefetchable,Prefetchable" rbitfld.long 0x00 1.--2. " ADDRESS_TYPE ,The ADDRESS_TYPE bits contain the type of the base address" "32,,64,?..." textline " " rbitfld.long 0x00 0. " SPACE_TYPE ,The SPACE_TYPE bit indicates whether the register maps into memory or I/O space" "Memory,IO" line.long 0x04 "CFG_5,XUSB Configuration Register 5" rgroup.long 0x2C++0x03 line.long 0x00 "CFG_11,PCI Configuration Register 11" hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID ,T_XUSB_CFG_11 SUBSYSTEM ID" hexmask.long.word 0x00 0.--15. 1. " SUBSYSTEM_VENDOR_ID ,T_XUSB_CFG_11 SUBSYSTEM VENDOR ID" rgroup.long 0x34++0x03 line.long 0x00 "CFG_13,PCI Configuration Register 13" hexmask.long.byte 0x00 0.--7. 1. " CAP_PTR ,CAP pointer" group.long 0x3C++0x07 line.long 0x00 "CFG_15,PCI Configuration Register 15" hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT ,Maximum time the device requires to gain access to the CPI bus" hexmask.long.byte 0x00 16.--23. 1. " MIN_GNT ,Length of the burst period a device needs assuming a clock rate of 33 mhz" hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN ,Interrupt pin the device uses" hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Interrupt routing information" line.long 0x04 "CFG_16,PCI Configuration Register 16" hexmask.long.word 0x04 16.--31. 1. " SUBSYSTEM_ID ,SUBSYSTEM ID" hexmask.long.word 0x04 0.--15. 1. " SUBSYSTEM_VENDOR_ID ,SUBSYSTEM VENDOR ID" rgroup.long 0x44++0x03 line.long 0x00 "CFG_17,PCI Configuration Register 17" bitfld.long 0x00 31. " D3CPME_SUPPORT ,T_XUSB_CFG_17 D3CPME SUPPORT" "Not supported,Supported" bitfld.long 0x00 30. " D3HPME_SUPPORT ,T_XUSB_CFG_17 D3HPME SUPPORT" "Not supported,Supported" bitfld.long 0x00 29. " D2PME_SUPPORT ,T_XUSB_CFG_17 D2PME SUPPORT" "Not supported,Supported" bitfld.long 0x00 28. " D1PME_SUPPORT ,T_XUSB_CFG_17 D1PME SUPPORT" "Not supported,Supported" textline " " bitfld.long 0x00 27. " D0PME_SUPPORT ,T_XUSB_CFG_17 D0PME SUPPORT" "Not supported,Supported" bitfld.long 0x00 26. " D2_SUPPORT ,T_XUSB_CFG_17 D2 SUPPORT" "Not supported,Supported" bitfld.long 0x00 25. " D1_SUPPORT ,T_XUSB_CFG_17 D1 SUPPORT" "Not supported,Supported" bitfld.long 0x00 22.--24. " AUXCUR ,T_XUSB_CFG_17 AUXCUR" "Self,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA" textline " " bitfld.long 0x00 21. " DSI ,T_XUSB_CFG_17 DSI" "Not needed,Needed" bitfld.long 0x00 19. " PMECLK ,T_XUSB_CFG_17 PMECLK" "Not required,Required" bitfld.long 0x00 16.--18. " VER ,T_XUSB_CFG_17 VER" ",,,VER_1P2,?..." hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,T_XUSB_CFG_17 NEXT PTR" textline " " hexmask.long.byte 0x00 0.--7. 1. " CAP ,T_XUSB_CFG_17 CAP" group.long 0x48++0x03 line.long 0x00 "CFG_18,T_XUSB_CFG_18 PMCSR" eventfld.long 0x00 15. " PMCSR_PMESTATUS ,T_XUSB_CFG_18 PMCSR PMESTATUS" "Not pending,Pending" rbitfld.long 0x00 13.--14. " PMCSR_DSCALE ,T_XUSB_CFG_18 PMCSR DSCALE" "DSCALE_INIT,?..." rbitfld.long 0x00 9.--12. " PMCSR_DSEL ,T_XUSB_CFG_18 PMCSR DSEL" "DSEL_INIT,?..." bitfld.long 0x00 8. " PMCSR_PME ,T_XUSB_CFG_18 PMCSR PME" "Enabled,Disabled" textline " " rbitfld.long 0x00 3. " PMCSR_NSR ,T_XUSB_CFG_18 PMCSR NSR" "No reset,Reset" bitfld.long 0x00 0.--1. " PMCSR_PWRSTATE ,PMCSR_PWRSTATE" "D0,D1,D2,D3H" sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") group.long 0x60++0x03 line.long 0x00 "CFG_24,XUSB XHCI Configuration Control" bitfld.long 0x00 8.--13. " FLADJ ,Frame length adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--7. 1. " SBRN ,Serial bus release number register" else group.long 0x4C++0x03 line.long 0x00 "CFG_24,XUSB XHCI Configuration Control" bitfld.long 0x00 8.--13. " FLADJ ,Frame length adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--7. 1. " SBRN ,Serial bus release number register" endif textline " " width 11. group.long 0xC0++0x0F line.long 0x00 "MSI_CTRL,MSI Message Control And Capability Register" rbitfld.long 0x00 24. " VECTOR_MASK_CAP ,MSI-per-vector masking support" "Not supported,Supported" rbitfld.long 0x00 23. " 64_ADDR_CAP ,Generating a 64-bit message address capability" "Not capable,Capable" bitfld.long 0x00 20.--22. " MULT_MSG_ENABLE ,System software writes to this field to indicate the number of allocated vectors" "1,2,4,8,16,32,?..." rbitfld.long 0x00 17.--19. " MULT_MSG_CAP ,Number of requested vectors" "1,2,4,8,16,32,?..." textline " " bitfld.long 0x00 16. " MSI_ENABLE ,Enables the MSI capability" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Next item in the capabilities list" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Capability block as the MSI capability block" line.long 0x04 "MSI_ADDR1,MSI Message Address Register" hexmask.long 0x04 2.--31. 0x04 " MSG_ADDR ,System-specified message address" line.long 0x08 "MSI_ADDR2,MSI Message Upper Address Register" line.long 0x0C "MSI_DATA,MSI Message Data Register" hexmask.long.word 0x0C 0.--15. 1. " MSG_DATA ,System-specified message data" sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") group.long 0xD0++0x07 line.long 0x00 "MSI_MASK,MSI Message Data Register" bitfld.long 0x00 0. " BIT ,T_XUSB_MSI_MASK_BIT" "0,1" line.long 0x04 "MSI_PEND,MSI Pending Bits Register" hexmask.long.word 0x04 0.--15. 1. " BIT ,T_XUSB_MSI_PEND_BIT" endif tree.end width 18. tree "XUSB Mailbox" group.long 0xE0++0x13 line.long 0x00 "MAILBOX_CAP,CFG ARU MAILBOX CAP" hexmask.long.byte 0x00 16.--23. 1. " LENGTH ,CFG ARU MAILBOX CAP LENGTH" hexmask.long.byte 0x00 8.--15. 1. " NEXTPTR ,CFG ARU MAILBOX CAP NEXTPTR" hexmask.long.byte 0x00 0.--7. 1. " ID ,CFG ARU MAILBOX CAP ID" line.long 0x04 "MAILBOX_CMD,CFG ARU MAILBOX CMD" bitfld.long 0x04 31. " INT_EN ,CFG ARU MAILBOX CMD INT EN" "Disabled,Enabled" bitfld.long 0x04 30. " DEST_XHCI ,CFG ARU MAILBOX CMD DEST XHCI" "Initialized,Completed" bitfld.long 0x04 29. " DEST_SMI ,CFG ARU MAILBOX CMD DEST SMI" "Initialized,Completed" bitfld.long 0x04 28. " DEST_PME ,CFG ARU MAILBOX CMD DEST PME" "Initialized,Completed" bitfld.long 0x04 27. " DEST_FALCON ,CFG ARU MAILBOX CMD DEST FALCON" "Initialized,Completed" line.long 0x08 "MAILBOX_DATA_IN,CFG ARU MAILBOX DATA IN" line.long 0x0C "MAILBOX_DATA_OUT,CFG ARU MAILBOX DATA OUT" line.long 0x10 "MAILBOX_OWNER,CFG ARU MAILBOX OWNER" hexmask.long.byte 0x10 0.--7. 1. " ID ,CFG ARU MAILBOX OWNER ID" tree.end sif (cpu()=="TEGRAX1") base ad:0x70090000 width 21. tree "XUSB XHCI Registers" rgroup.long 0x00++0x1B line.long 0x00 "CAP_REG0,CAP REG0" sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION" textline " " else hexmask.long.tbyte 0x00 15.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION" textline " " endif hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH ,CAP REG0 CAPLENGTH" line.long 0x04 "CAP_HCSPARAMS1,CAP HCSPARAMS1" hexmask.long.byte 0x04 24.--31. 1. " MAXPORTS ,CAP HCSPARAMS1 MAXPORTS" hexmask.long.word 0x04 8.--18. 1. " MAXINTRS ,CAP HCSPARAMS1 MAXINTRS" hexmask.long.byte 0x04 0.--7. 1. " MAXSLOTS ,CAP HCSPARAMS1 MAXSLOTS" line.long 0x08 "CAP_HCSPARAMS2,CAP HCSPARAMS2" bitfld.long 0x08 27.--31. " MAXSPBLO ,CAP HCSPARAMS2 MAXSPBLO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 26. " SPR ,CAP HCSPARAMS2 SPR" "False,True" bitfld.long 0x08 21.--25. " MAXSPBHI ,CAP HCSPARAMS2 MAXSPBHI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 4.--7. " ERST_MAX ,CAP HCSPARAMS2 ERST MAX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 0.--3. " IST ,CAP HCSPARAMS2 IST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CAP_HCSPARAMS3,CAP HCSPARAMS3" hexmask.long.word 0x0C 16.--31. 1. " U2LAT ,CAP HCSPARAMS3 U2LAT" hexmask.long.byte 0x0C 0.--7. 1. " U1LAT ,CAP HCSPARAMS3 U1LAT" line.long 0x10 "CAP_HCCPARAMS,CAP HCCPARAMS" hexmask.long.word 0x10 16.--31. 1. " XECP ,CAP HCCPARAMS XECP" bitfld.long 0x10 12.--15. " MAXPSASIZE ,CAP HCCPARAMS MAXPSASIZE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8. " PAE ,CAP HCCPARAMS PAE" "False,True" bitfld.long 0x10 7. " NSS ,CAP HCCPARAMS NSS" "False,True" textline " " bitfld.long 0x10 6. " LTC ,CAP HCCPARAMS LTC" "False,True" bitfld.long 0x10 5. " LHRC ,CAP HCCPARAMS LHRC" "False,True" bitfld.long 0x10 4. " PIND ,CAP HCCPARAMS PIND" "False,True" bitfld.long 0x10 3. " PPC ,CAP HCCPARAMS PPC" "False,True" textline " " bitfld.long 0x10 2. " CSZ ,CAP HCCPARAMS CSZ" "32B,64B" bitfld.long 0x10 1. " BNC ,CAP HCCPARAMS BNC" "False,True" bitfld.long 0x10 0. " AC64 ,CAP HCCPARAMS AC64" "False,True" line.long 0x14 "CAP_DBOFF,CAP DBOFF" hexmask.long 0x14 2.--31. 0x04 " OFFSET ,CAP DBOFF OFFSET" line.long 0x18 "CAP_RTSOFF,CAP RTSOFF" hexmask.long 0x18 5.--31. 0x20 " OFFSET ,CAP RTSOFF OFFSET" group.long 0x20++0x07 line.long 0x00 "OP_USBCMD,OP USBCMD" bitfld.long 0x00 11. " EU3S ,OP USBCMD EU3S" "Disabled,Enabled" bitfld.long 0x00 10. " EWE ,OP USBCMD EWE" "Disabled,Enabled" eventfld.long 0x00 9. " CRS ,OP USBCMD CRS" "Initialized,Start" eventfld.long 0x00 8. " CSS ,OP USBCMD CSS" "Initialized,Start" textline " " bitfld.long 0x00 7. " LHCRST ,OP USBCMD LHCRST" "Not pending,Pending" bitfld.long 0x00 3. " HSEE ,OP USBCMD HSEE" "Disabled,Enabled" bitfld.long 0x00 2. " INTE ,OP USBCMD INTE" "Disabled,Enabled" bitfld.long 0x00 1. " HCRST ,OP USBCMD HCRST" "Not pending,Pending" textline " " bitfld.long 0x00 0. " RS ,OP USBCMD RS" "Stopped,Running" line.long 0x04 "OP_USBSTS,OP USBSTS" rbitfld.long 0x04 12. " HCE ,OP USBSTS HCE" "No error,Error" rbitfld.long 0x04 11. " CNR ,OP USBSTS CNR" "Not ready,Ready" eventfld.long 0x04 10. " SRE ,OP USBSTS SRE" "Not pending,Pending" rbitfld.long 0x04 9. " RSS ,OP USBSTS RSS" "Not pending,Pending" textline " " rbitfld.long 0x04 8. " SSS ,OP USBSTS SSS" "Not pending,Pending" eventfld.long 0x04 4. " PCD ,OP USBSTS PCD" "Not pending,Pending" eventfld.long 0x04 3. " EINT ,OP USBSTS EINT" "Not pending,Pending" eventfld.long 0x04 2. " HSE ,OP USBSTS HSE" "Not pending,Pending" textline " " rbitfld.long 0x04 0. " HCH ,HCH" "Halted,Running" rgroup.long 0x28++0x03 line.long 0x00 "OP_PGSZ,OP PGSZ" hexmask.long.word 0x00 0.--15. 1. " PAGESIZE ,OP PGSZ PAGESIZE" group.long 0x34++0x0B line.long 0x00 "OP_DNCTRL,OP DNCTRL" bitfld.long 0x00 15. " N15 ,OP DNCTRL N15" "Disabled,Enabled" bitfld.long 0x00 14. " N14 ,OP DNCTRL N14" "Disabled,Enabled" bitfld.long 0x00 13. " N13 ,OP DNCTRL N13" "Disabled,Enabled" bitfld.long 0x00 12. " N12 ,OP DNCTRL N12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " N11 ,OP DNCTRL N11" "Disabled,Enabled" bitfld.long 0x00 10. " N10 ,OP DNCTRL N10" "Disabled,Enabled" bitfld.long 0x00 9. " N9 ,OP DNCTRL N9" "Disabled,Enabled" bitfld.long 0x00 8. " N8 ,OP DNCTRL N8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " N7 ,OP DNCTRL N7" "Disabled,Enabled" bitfld.long 0x00 6. " N6 ,OP DNCTRL N6" "Disabled,Enabled" bitfld.long 0x00 5. " N5 ,OP DNCTRL N5" "Disabled,Enabled" bitfld.long 0x00 4. " N4 ,OP DNCTRL N4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " N3 ,OP DNCTRL N3" "Disabled,Enabled" bitfld.long 0x00 2. " N2 ,OP DNCTRL N2" "Disabled,Enabled" bitfld.long 0x00 1. " N1 ,OP DNCTRL N1" "Disabled,Enabled" bitfld.long 0x00 0. " N0 ,OP DNCTRL N0" "Disabled,Enabled" line.long 0x04 "OP_CRCR0,OP CRCR0" hexmask.long 0x04 6.--31. 1. " CRPLO ,OP CRCR0 CRPLO" textline " " rbitfld.long 0x04 3. " CRR ,OP CRCR0 CRR" "Stopped,Running" eventfld.long 0x04 2. " CA ,OP CRCR0 CA" "Initialized,Aborted" textline " " eventfld.long 0x04 1. " CS ,OP CRCR0 CS" "Initialized,Stop" eventfld.long 0x04 0. " RCS ,OP CRCR0 RCS" "0,1" line.long 0x08 "OP_CRCR1,OP CRCR1" group.long 0x50++0x0B line.long 0x00 "OP_DCBAAP0,OP DCBAAP0" hexmask.long 0x00 6.--31. 1. " DCBAAPLO ,OP DCBAAP0 DCBAAPLO" line.long 0x04 "OP_DCBAAP1,OP DCBAAP1" line.long 0x08 "OP_CONFIG,OP CONFIG" hexmask.long.byte 0x08 0.--7. 1. " MAXSLOTSEN ,OP CONFIG MAXSLOTSEN" textline " " sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") width 23. group.long 0x420++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x420+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x420+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x420+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x420+0x08)++0x03 line.long 0x00 "OP_PORTLISC,OP PORTLISC" hexmask.long.word 0x00 0.--15. 1. " LEC ,T XUSB OP PORTLISC LEC" rgroup.long (0x420+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x430++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x430+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x430+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x430+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x430+0x08)++0x03 line.long 0x00 "OP_PORTLISC,OP PORTLISC" hexmask.long.word 0x00 0.--15. 1. " LEC ,T XUSB OP PORTLISC LEC" rgroup.long (0x430+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x440++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x440+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x440+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x440+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x440+0x08)++0x03 line.long 0x00 "OP_PORTLISC,OP PORTLISC" hexmask.long.word 0x00 0.--15. 1. " LEC ,T XUSB OP PORTLISC LEC" rgroup.long (0x440+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x450++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x450+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x450+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x450+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x450+0x08)++0x03 line.long 0x00 "OP_PORTLISC,OP PORTLISC" hexmask.long.word 0x00 0.--15. 1. " LEC ,T XUSB OP PORTLISC LEC" rgroup.long (0x450+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x460++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x460+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x460+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x460+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x460+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x470++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x470+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x470+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x470+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x470+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x480++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x480+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x480+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x480+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x480+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x490++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x490+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x490+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x490+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x490+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4A0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4A0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4A0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4A0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4A0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4B0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4B0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4B0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4B0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4B0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4C0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4C0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4C0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4C0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4C0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4D0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4D0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4D0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4D0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4D0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4E0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4E0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4E0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4E0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4E0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4F0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4F0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4F0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4F0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4F0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x500++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x500+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x500+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x500+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x500+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x510++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x510+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x510+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x510+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x510+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." endif textline " " width 24. group.long 0x600++0x07 line.long 0x00 "EC_USBLEGSUP,EC USBLEGSUP" bitfld.long 0x00 24. " OSSEM ,EC USBLEGSUP OSSEM" "0,1" bitfld.long 0x00 16. " BIOSSEM ,T XUSB EC USBLEGSUP BIOSSEM" "0,1" hexmask.long.byte 0x00 8.--15. 1. " NEXT ,EC USBLEGSUP NEXT" hexmask.long.byte 0x00 0.--7. 1. " CAPID ,EC USBLEGSUP CAPID" line.long 0x04 "HCI_EC_USBLEGCTLSTS,HCI_EC_USBLEGCTLSTS" eventfld.long 0x04 31. " BAR ,EC USBLEGCTLSTS BAR" "Not pending,Pending" eventfld.long 0x04 30. " PCIC ,EC USBLEGCTLSTS PCIC" "Not pending,Pending" eventfld.long 0x04 29. " OSOC ,EC USBLEGCTLSTS OSOC" "Not pending,Pending" rbitfld.long 0x04 20. " HSE ,EC USBLEGCTLSTS HSE" "Not pending,Pending" textline " " rbitfld.long 0x04 16. " EVI ,EC USBLEGCTLSTS EVI" "Not pending,Pending" bitfld.long 0x04 15. " BAREN ,EC USBLEGCTLSTS BAR enable" "Disabled,Enabled" bitfld.long 0x04 14. " PCIEN ,EC USBLEGCTLSTS PCI enable" "Disabled,Enabled" bitfld.long 0x04 13. " OSOEN ,EC USBLEGCTLSTS OSO enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " HSEEN ,EC USBLEGCTLSTS HSE enable" "Disabled,Enabled" bitfld.long 0x04 0. " SMIEN ,EC USBLEGCTLSTS SMI enable" "Disabled,Enabled" rgroup.long 0x610++0x23 line.long 0x00 "EC_SUPPROT_USB3_0,EC SUPPROT USB3 0" hexmask.long.byte 0x00 24.--31. 1. " MAJORREV ,EC SUPPROT USB3 0 MAJORREV" hexmask.long.byte 0x00 16.--23. 1. " MINORREV ,EC SUPPROT USB3 0 MINORREV" hexmask.long.byte 0x00 8.--15. 1. " NEXT ,EC SUPPROT USB3 0 NEXT" hexmask.long.byte 0x00 0.--7. 1. " CAPID ,EC SUPPROT USB3 0 CAPID" line.long 0x04 "EC_SUPPROT_USB3_1,EC SUPPROT USB3 1" line.long 0x08 "EC_SUPPROT_USB3_2,EC SUPPROT USB3 2" hexmask.long.byte 0x08 8.--15. 1. " PORTCNT ,EC SUPPROT USB3 2 PORTCNT" hexmask.long.byte 0x08 0.--7. 1. " PORTOFS ,EC SUPPROT USB3 2 PORTOFS" line.long 0x0C "EC_SUPPROT_USB3_3,EC SUPPROT USB3 3" line.long 0x10 "EC_SUPPROT_USB2_0,EC SUPPROT USB2 0" hexmask.long.byte 0x10 24.--31. 1. " MAJORREV ,EC SUPPROT USB2 0 MAJORREV" hexmask.long.byte 0x10 16.--23. 1. " MINORREV ,EC SUPPROT USB2 0 MINORREV" hexmask.long.byte 0x10 8.--15. 1. " XNEXT ,EC SUPPROT USB2 0 NEXT" hexmask.long.byte 0x10 0.--7. 1. " CAPID ,EC SUPPROT USB2 0 CAPID" line.long 0x14 "EC_SUPPROT_USB2_1,EC SUPPROT USB2 1" line.long 0x18 "EC_SUPPROT_USB2_2,EC SUPPROT USB2 2" bitfld.long 0x18 25.--27. " MHD ,EC SUPPROT USB2 2 MHD" "MHD,?..." bitfld.long 0x18 20. " BLC ,EC_SUPPROT_USB2_2_BLC" "False,True" bitfld.long 0x18 19. " HLC ,EC_SUPPROT_USB2_2_HLC" "False,True" bitfld.long 0x18 18. " IHI ,EC_SUPPROT_USB2_2_IHI" "True,False" textline " " bitfld.long 0x18 17. " HSO ,EC_SUPPROT_USB2_2_HSO" "True,False" hexmask.long.byte 0x18 8.--15. 1. " PORTCNT ,EC SUPPROT USB2 2 PORTCNT" hexmask.long.byte 0x18 0.--7. 1. " PORTOFS ,EC SUPPROT USB2 2 PORTOFS" line.long 0x1C "EC_SUPPROT_USB2_3,EC SUPPROT USB2 3" line.long 0x20 "EC_DBCAP_DCID,EC_DBCAP_DCID" bitfld.long 0x20 16.--20. " DCERSTM ,EC_DBCAP_DCID_DCERSTM" ",DCERSTM_VALUE,?..." hexmask.long.byte 0x20 8.--15. 1. " NEXT ,EC DBCAP DCID NEXT" hexmask.long.byte 0x20 0.--7. 1. " CAPID ,EC DBCAP DCID CAPID" wgroup.long 0x634++0x03 line.long 0x00 "EC_DBCAP_DCDB,EC DBCAP DCDB" hexmask.long.byte 0x00 8.--15. 1. " DBTARGET ,EC DBCAP DCDB DBTARGET" group.long 0x638++0x03 line.long 0x00 "EC_DBCAP_DCERSTSZ,EC DBCAP DCERSTSZ" hexmask.long.word 0x00 0.--15. 1. " ERSTSZ ,EC DBCAP DCERSTSZ ERSTSZ" textline " " width 26. group.long 0x640++0x13 line.long 0x00 "EC_DBCAP_DCERSTBALO,EC DBCAP DCERSTBALO" hexmask.long 0x00 4.--31. 1. " ADDRLO ,EC DBCAP DCERSTBALO" line.long 0x04 "EC_DBCAP_DCERSTBAHI,EC DBCAP DCERSTBAHI" line.long 0x08 "EC_DBCAP_DCERDPLO,EC DBCAP DCERDPLO" hexmask.long 0x08 4.--31. 1. " ADDRLO ,EC DBCAP DCERDPLO ADDRLO" bitfld.long 0x08 0.--2. " DESI ,EC DBCAP DCERDPLO DESI" "Initialized,?..." line.long 0x0C "EC_DBCAP_DCERDPHI,EC DBCAP DCERDPHI ADDRHI" line.long 0x10 "EC_DBCAP_DCCTRL,EC DBCAP DCCTRL" bitfld.long 0x10 31. " DCE ,EC DBCAP DCCTRL DCE" "Disabled,Enabled" hexmask.long.byte 0x10 24.--30. 1. " DEVADR ,EC DBCAP DCCTRL DEVADR" hexmask.long.byte 0x10 16.--23. 1. " MAXBURST ,EC DBCAP DCCTRL MAXBURST" eventfld.long 0x10 4. " DRC ,EC DBCAP DCCTRL DRC" "Initialized,Clear" textline " " bitfld.long 0x10 3. " HIT ,EC DBCAP DCCTRL HIT" "False,True" bitfld.long 0x10 2. " HOT ,EC DBCAP DCCTRL HOT" "False,True" bitfld.long 0x10 1. " LSE ,EC DBCAP DCCTRL LSE" "Disabled,Enabled" rbitfld.long 0x10 0. " DCR ,EC DBCAP DCCTRL DCR" "Stop,Run" rgroup.long 0x654++0x03 line.long 0x00 "EC_DBCAP_DCST,EC DBCAP DCST" hexmask.long.byte 0x00 24.--31. 1. " DPN ,EC DBCAP DCST DPN" bitfld.long 0x00 0. " ER ,EC DBCAP DCST ER" "Empty,Not empty" group.long 0x658++0x03 line.long 0x00 "EC_DBCAP_DCPORTSC,EC DBCAP DCPORTSC" eventfld.long 0x00 23. " CEC ,EC DBCAP DCPORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,EC DBCAP DCPORTSC PLC" "Not pending,Pending" eventfld.long 0x00 21. " PRC ,EC DBCAP DCPORTSC PRC" "Not pending,Pending" eventfld.long 0x00 17. " CSC ,EC DBCAP DCPORTSC CSC" "Not pending,Pending" textline " " rbitfld.long 0x00 10.--13. " PS ,EC DBCAP DCPORTSC PS" "Undefined,,,,SS,?..." rbitfld.long 0x00 5.--8. " PLS ,EC DBCAP DCPORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detect,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" rbitfld.long 0x00 4. " PR ,EC DBCAP DCPORTSC PR" "No reset,Reset" bitfld.long 0x00 1. " PED ,HCI EC DBCAP DCPORTSC PED" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,EC DBCAP DCPORTSC CCS" "No CON,CON" group.long 0x660++0x0F line.long 0x00 "EC_DBCAP_DCECPLO,EC DBCAP DCECPLO" hexmask.long 0x00 4.--31. 1. " ADDRLO ,EC DBCAP DCECPLO ADDRLO" line.long 0x04 "EC_DBCAP_DCECPHI,EC DBCAP DCECPHI ADDRHI" line.long 0x08 "EC_DBCAP_INFO0,EC DBCAP INFO0" hexmask.long.word 0x08 16.--31. 1. " VENDORID ,EC DBCAP INFO0 VENDORID" hexmask.long.byte 0x08 0.--7. 1. " PROTOCOL ,EC DBCAP INFO0 PROTOCOL" line.long 0x0C "EC_DBCAP_INFO1,EC_DBCAP_INFO1" hexmask.long.word 0x0C 16.--31. 1. " DEV_REV ,EC DBCAP INFO1 DEV REV" hexmask.long.word 0x0C 0.--15. 1. " PRODUCTID ,EC DBCAP INFO1 PRODUCTID" rgroup.long 0x800++0x03 line.long 0x00 "RT_MFINDEX,RT MFINDEX" hexmask.long.word 0x00 0.--13. 1. " MFINDEX ,RT MFINDEX MFINDEX" group.long 0x820++0x03 line.long 0x00 "RT_IMAN,RT IMAN" bitfld.long 0x00 1. " IE ,RT IMAN IE" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,RT IMAN IP" "Not pending,Pending" group.long 0x824++0x07 line.long 0x00 "RT_IMOD,RT IMOD" hexmask.long.word 0x00 16.--31. 1. " IMODC ,RT IMOD IMODC" hexmask.long.word 0x00 0.--15. 1. " IMODI ,RT IMOD IMODI" line.long 0x04 "RT_ERSTSZ,RT ERSTSZ" hexmask.long.word 0x04 0.--15. 1. " SZ ,RT ERSTSZ SZ" group.long 0x830++0x0F line.long 0x00 "RT_ERSTBA0,RT ERSTBA0" hexmask.long 0x00 4.--31. 1. " ERSTBLO ,RT ERSTBA0 ERSTBLO" line.long 0x04 "RT_ERSTBA1,RT ERSTBA1" line.long 0x08 "RT_ERDP0,RT ERDP0" hexmask.long 0x08 4.--31. 1. " DQPTRLO ,RT ERDP0 DQPTRLO" bitfld.long 0x08 0.--2. " DESI ,RT ERDP0 DESI" "Initialized,?..." line.long 0x0C "RT_ERDP1,RT ERDP1" wgroup.long 0xC00++0x03 line.long 0x00 "DB,DB" button "BGR" "d (0xC00)--(0xFFC) /long" tree.end width 0x0B elif (cpu()=="TEGRAX2") base ad:0x03530000 width 21. tree "XUSB XHCI Registers" rgroup.long 0x00++0x1B line.long 0x00 "CAP_REG0,CAP REG0" sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION" textline " " else hexmask.long.tbyte 0x00 15.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION" textline " " endif hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH ,CAP REG0 CAPLENGTH" line.long 0x04 "CAP_HCSPARAMS1,CAP HCSPARAMS1" hexmask.long.byte 0x04 24.--31. 1. " MAXPORTS ,CAP HCSPARAMS1 MAXPORTS" hexmask.long.word 0x04 8.--18. 1. " MAXINTRS ,CAP HCSPARAMS1 MAXINTRS" hexmask.long.byte 0x04 0.--7. 1. " MAXSLOTS ,CAP HCSPARAMS1 MAXSLOTS" line.long 0x08 "CAP_HCSPARAMS2,CAP HCSPARAMS2" bitfld.long 0x08 27.--31. " MAXSPBLO ,CAP HCSPARAMS2 MAXSPBLO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 26. " SPR ,CAP HCSPARAMS2 SPR" "False,True" bitfld.long 0x08 21.--25. " MAXSPBHI ,CAP HCSPARAMS2 MAXSPBHI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 4.--7. " ERST_MAX ,CAP HCSPARAMS2 ERST MAX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 0.--3. " IST ,CAP HCSPARAMS2 IST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CAP_HCSPARAMS3,CAP HCSPARAMS3" hexmask.long.word 0x0C 16.--31. 1. " U2LAT ,CAP HCSPARAMS3 U2LAT" hexmask.long.byte 0x0C 0.--7. 1. " U1LAT ,CAP HCSPARAMS3 U1LAT" line.long 0x10 "CAP_HCCPARAMS,CAP HCCPARAMS" hexmask.long.word 0x10 16.--31. 1. " XECP ,CAP HCCPARAMS XECP" bitfld.long 0x10 12.--15. " MAXPSASIZE ,CAP HCCPARAMS MAXPSASIZE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8. " PAE ,CAP HCCPARAMS PAE" "False,True" bitfld.long 0x10 7. " NSS ,CAP HCCPARAMS NSS" "False,True" textline " " bitfld.long 0x10 6. " LTC ,CAP HCCPARAMS LTC" "False,True" bitfld.long 0x10 5. " LHRC ,CAP HCCPARAMS LHRC" "False,True" bitfld.long 0x10 4. " PIND ,CAP HCCPARAMS PIND" "False,True" bitfld.long 0x10 3. " PPC ,CAP HCCPARAMS PPC" "False,True" textline " " bitfld.long 0x10 2. " CSZ ,CAP HCCPARAMS CSZ" "32B,64B" bitfld.long 0x10 1. " BNC ,CAP HCCPARAMS BNC" "False,True" bitfld.long 0x10 0. " AC64 ,CAP HCCPARAMS AC64" "False,True" line.long 0x14 "CAP_DBOFF,CAP DBOFF" hexmask.long 0x14 2.--31. 0x04 " OFFSET ,CAP DBOFF OFFSET" line.long 0x18 "CAP_RTSOFF,CAP RTSOFF" hexmask.long 0x18 5.--31. 0x20 " OFFSET ,CAP RTSOFF OFFSET" group.long 0x20++0x07 line.long 0x00 "OP_USBCMD,OP USBCMD" bitfld.long 0x00 11. " EU3S ,OP USBCMD EU3S" "Disabled,Enabled" bitfld.long 0x00 10. " EWE ,OP USBCMD EWE" "Disabled,Enabled" eventfld.long 0x00 9. " CRS ,OP USBCMD CRS" "Initialized,Start" eventfld.long 0x00 8. " CSS ,OP USBCMD CSS" "Initialized,Start" textline " " bitfld.long 0x00 7. " LHCRST ,OP USBCMD LHCRST" "Not pending,Pending" bitfld.long 0x00 3. " HSEE ,OP USBCMD HSEE" "Disabled,Enabled" bitfld.long 0x00 2. " INTE ,OP USBCMD INTE" "Disabled,Enabled" bitfld.long 0x00 1. " HCRST ,OP USBCMD HCRST" "Not pending,Pending" textline " " bitfld.long 0x00 0. " RS ,OP USBCMD RS" "Stopped,Running" line.long 0x04 "OP_USBSTS,OP USBSTS" rbitfld.long 0x04 12. " HCE ,OP USBSTS HCE" "No error,Error" rbitfld.long 0x04 11. " CNR ,OP USBSTS CNR" "Not ready,Ready" eventfld.long 0x04 10. " SRE ,OP USBSTS SRE" "Not pending,Pending" rbitfld.long 0x04 9. " RSS ,OP USBSTS RSS" "Not pending,Pending" textline " " rbitfld.long 0x04 8. " SSS ,OP USBSTS SSS" "Not pending,Pending" eventfld.long 0x04 4. " PCD ,OP USBSTS PCD" "Not pending,Pending" eventfld.long 0x04 3. " EINT ,OP USBSTS EINT" "Not pending,Pending" eventfld.long 0x04 2. " HSE ,OP USBSTS HSE" "Not pending,Pending" textline " " rbitfld.long 0x04 0. " HCH ,HCH" "Halted,Running" rgroup.long 0x28++0x03 line.long 0x00 "OP_PGSZ,OP PGSZ" hexmask.long.word 0x00 0.--15. 1. " PAGESIZE ,OP PGSZ PAGESIZE" group.long 0x34++0x0B line.long 0x00 "OP_DNCTRL,OP DNCTRL" bitfld.long 0x00 15. " N15 ,OP DNCTRL N15" "Disabled,Enabled" bitfld.long 0x00 14. " N14 ,OP DNCTRL N14" "Disabled,Enabled" bitfld.long 0x00 13. " N13 ,OP DNCTRL N13" "Disabled,Enabled" bitfld.long 0x00 12. " N12 ,OP DNCTRL N12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " N11 ,OP DNCTRL N11" "Disabled,Enabled" bitfld.long 0x00 10. " N10 ,OP DNCTRL N10" "Disabled,Enabled" bitfld.long 0x00 9. " N9 ,OP DNCTRL N9" "Disabled,Enabled" bitfld.long 0x00 8. " N8 ,OP DNCTRL N8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " N7 ,OP DNCTRL N7" "Disabled,Enabled" bitfld.long 0x00 6. " N6 ,OP DNCTRL N6" "Disabled,Enabled" bitfld.long 0x00 5. " N5 ,OP DNCTRL N5" "Disabled,Enabled" bitfld.long 0x00 4. " N4 ,OP DNCTRL N4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " N3 ,OP DNCTRL N3" "Disabled,Enabled" bitfld.long 0x00 2. " N2 ,OP DNCTRL N2" "Disabled,Enabled" bitfld.long 0x00 1. " N1 ,OP DNCTRL N1" "Disabled,Enabled" bitfld.long 0x00 0. " N0 ,OP DNCTRL N0" "Disabled,Enabled" line.long 0x04 "OP_CRCR0,OP CRCR0" hexmask.long 0x04 6.--31. 1. " CRPLO ,OP CRCR0 CRPLO" textline " " rbitfld.long 0x04 3. " CRR ,OP CRCR0 CRR" "Stopped,Running" eventfld.long 0x04 2. " CA ,OP CRCR0 CA" "Initialized,Aborted" textline " " eventfld.long 0x04 1. " CS ,OP CRCR0 CS" "Initialized,Stop" eventfld.long 0x04 0. " RCS ,OP CRCR0 RCS" "0,1" line.long 0x08 "OP_CRCR1,OP CRCR1" group.long 0x50++0x0B line.long 0x00 "OP_DCBAAP0,OP DCBAAP0" hexmask.long 0x00 6.--31. 1. " DCBAAPLO ,OP DCBAAP0 DCBAAPLO" line.long 0x04 "OP_DCBAAP1,OP DCBAAP1" line.long 0x08 "OP_CONFIG,OP CONFIG" hexmask.long.byte 0x08 0.--7. 1. " MAXSLOTSEN ,OP CONFIG MAXSLOTSEN" textline " " sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") width 23. group.long 0x420++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x420+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x420+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x420+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x420+0x08)++0x03 line.long 0x00 "OP_PORTLISC,OP PORTLISC" hexmask.long.word 0x00 0.--15. 1. " LEC ,T XUSB OP PORTLISC LEC" rgroup.long (0x420+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x430++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x430+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x430+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x430+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x430+0x08)++0x03 line.long 0x00 "OP_PORTLISC,OP PORTLISC" hexmask.long.word 0x00 0.--15. 1. " LEC ,T XUSB OP PORTLISC LEC" rgroup.long (0x430+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x440++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x440+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x440+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x440+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x440+0x08)++0x03 line.long 0x00 "OP_PORTLISC,OP PORTLISC" hexmask.long.word 0x00 0.--15. 1. " LEC ,T XUSB OP PORTLISC LEC" rgroup.long (0x440+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x450++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x450+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x450+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x450+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x450+0x08)++0x03 line.long 0x00 "OP_PORTLISC,OP PORTLISC" hexmask.long.word 0x00 0.--15. 1. " LEC ,T XUSB OP PORTLISC LEC" rgroup.long (0x450+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x460++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x460+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x460+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x460+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x460+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x470++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x470+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x470+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x470+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x470+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x480++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x480+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x480+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x480+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x480+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x490++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x490+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x490+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x490+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x490+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4A0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4A0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4A0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4A0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4A0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4B0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4B0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4B0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4B0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4B0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4C0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4C0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4C0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4C0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4C0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4D0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4D0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4D0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4D0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4D0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4E0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4E0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4E0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4E0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4E0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x4F0++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x4F0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x4F0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x4F0+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x4F0+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x500++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x500+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x500+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x500+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x500+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." group.long 0x510++0x07 line.long 0x00 "OP PORTSC,OP PORTSC" rbitfld.long 0x00 31. " WPR ,OP PORTSC WPR" "Not pending,Pending" rbitfld.long 0x00 30. " DR ,T XUSB OP PORTSC DR" "False,True" bitfld.long 0x00 27. " WOE ,T XUSB OP PORTSC WOE" "Disabled,Enabled" bitfld.long 0x00 26. " WDE ,T XUSB OP PORTSC WDE" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " WCE ,T XUSB OP PORTSC WCE" "Disabled,Enabled" rbitfld.long 0x00 24. " CAS ,T XUSB OP PORTSC CAS" "Initialized,?..." eventfld.long 0x00 23. " CEC ,T XUSB OP PORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,T XUSB OP PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x00 21. " PRC ,T XUSB OP PORTSC PRC" "Not pending,Pending" eventfld.long 0x00 20. " OCC ,T XUSB OP PORTSC OCC" "Not pending,Pending" eventfld.long 0x00 19. " WRC ,T XUSB OP PORTSC WRC" "Not pending,Pending" eventfld.long 0x00 18. " PEC ,T XUSB OP PORTSC PEC" "Not pending,Pending" textline " " eventfld.long 0x00 17. " CSC ,T XUSB OP PORTSC CSC" "Not pending,Pending" eventfld.long 0x00 16. " LWS ,T XUSB OP PORTSC LWS" "Disabled,Enabled" bitfld.long 0x00 14.--15. " PIC ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined" rbitfld.long 0x00 10.--13. " PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown" textline " " bitfld.long 0x00 9. " PP ,T XUSB OP PORTSC PP" "Off,On" bitfld.long 0x00 5.--8. " PLS ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" bitfld.long 0x00 4. " PR ,T XUSB OP PORTSC PR" "Not pending,Pending" rbitfld.long 0x00 3. " OCA ,T XUSB OP PORTSC OCA" "False,True" textline " " eventfld.long 0x00 1. " PED ,T XUSB OP PORTSC PED" "Disabled,Enabled" rbitfld.long 0x00 0. " CCS ,T XUSB OP PORTSC CCS" "No dev,Dev" sif (cpu()=="TEGRAX2") group.long (0x510+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" elif (cpu()=="TEGRAX1") group.long (0x510+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS" bitfld.long 0x00 16. " FLA ,OP PORTPMSCSS FLA" "0,1" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,OP PORTPMSCSS U2TIMEOUT" hexmask.long.byte 0x00 0.--7. 1. " U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT" else group.long (0x510+0x04)++0x07 line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS" endif rgroup.long (0x510+0x0C)++0x03 line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC" bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..." hexmask.long.byte 0x00 2.--9. 1. " L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT" bitfld.long 0x00 0.--1. " HIRDM ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..." endif textline " " width 24. group.long 0x600++0x07 line.long 0x00 "EC_USBLEGSUP,EC USBLEGSUP" bitfld.long 0x00 24. " OSSEM ,EC USBLEGSUP OSSEM" "0,1" bitfld.long 0x00 16. " BIOSSEM ,T XUSB EC USBLEGSUP BIOSSEM" "0,1" hexmask.long.byte 0x00 8.--15. 1. " NEXT ,EC USBLEGSUP NEXT" hexmask.long.byte 0x00 0.--7. 1. " CAPID ,EC USBLEGSUP CAPID" line.long 0x04 "HCI_EC_USBLEGCTLSTS,HCI_EC_USBLEGCTLSTS" eventfld.long 0x04 31. " BAR ,EC USBLEGCTLSTS BAR" "Not pending,Pending" eventfld.long 0x04 30. " PCIC ,EC USBLEGCTLSTS PCIC" "Not pending,Pending" eventfld.long 0x04 29. " OSOC ,EC USBLEGCTLSTS OSOC" "Not pending,Pending" rbitfld.long 0x04 20. " HSE ,EC USBLEGCTLSTS HSE" "Not pending,Pending" textline " " rbitfld.long 0x04 16. " EVI ,EC USBLEGCTLSTS EVI" "Not pending,Pending" bitfld.long 0x04 15. " BAREN ,EC USBLEGCTLSTS BAR enable" "Disabled,Enabled" bitfld.long 0x04 14. " PCIEN ,EC USBLEGCTLSTS PCI enable" "Disabled,Enabled" bitfld.long 0x04 13. " OSOEN ,EC USBLEGCTLSTS OSO enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " HSEEN ,EC USBLEGCTLSTS HSE enable" "Disabled,Enabled" bitfld.long 0x04 0. " SMIEN ,EC USBLEGCTLSTS SMI enable" "Disabled,Enabled" rgroup.long 0x610++0x23 line.long 0x00 "EC_SUPPROT_USB3_0,EC SUPPROT USB3 0" hexmask.long.byte 0x00 24.--31. 1. " MAJORREV ,EC SUPPROT USB3 0 MAJORREV" hexmask.long.byte 0x00 16.--23. 1. " MINORREV ,EC SUPPROT USB3 0 MINORREV" hexmask.long.byte 0x00 8.--15. 1. " NEXT ,EC SUPPROT USB3 0 NEXT" hexmask.long.byte 0x00 0.--7. 1. " CAPID ,EC SUPPROT USB3 0 CAPID" line.long 0x04 "EC_SUPPROT_USB3_1,EC SUPPROT USB3 1" line.long 0x08 "EC_SUPPROT_USB3_2,EC SUPPROT USB3 2" hexmask.long.byte 0x08 8.--15. 1. " PORTCNT ,EC SUPPROT USB3 2 PORTCNT" hexmask.long.byte 0x08 0.--7. 1. " PORTOFS ,EC SUPPROT USB3 2 PORTOFS" line.long 0x0C "EC_SUPPROT_USB3_3,EC SUPPROT USB3 3" line.long 0x10 "EC_SUPPROT_USB2_0,EC SUPPROT USB2 0" hexmask.long.byte 0x10 24.--31. 1. " MAJORREV ,EC SUPPROT USB2 0 MAJORREV" hexmask.long.byte 0x10 16.--23. 1. " MINORREV ,EC SUPPROT USB2 0 MINORREV" hexmask.long.byte 0x10 8.--15. 1. " XNEXT ,EC SUPPROT USB2 0 NEXT" hexmask.long.byte 0x10 0.--7. 1. " CAPID ,EC SUPPROT USB2 0 CAPID" line.long 0x14 "EC_SUPPROT_USB2_1,EC SUPPROT USB2 1" line.long 0x18 "EC_SUPPROT_USB2_2,EC SUPPROT USB2 2" bitfld.long 0x18 25.--27. " MHD ,EC SUPPROT USB2 2 MHD" "MHD,?..." bitfld.long 0x18 20. " BLC ,EC_SUPPROT_USB2_2_BLC" "False,True" bitfld.long 0x18 19. " HLC ,EC_SUPPROT_USB2_2_HLC" "False,True" bitfld.long 0x18 18. " IHI ,EC_SUPPROT_USB2_2_IHI" "True,False" textline " " bitfld.long 0x18 17. " HSO ,EC_SUPPROT_USB2_2_HSO" "True,False" hexmask.long.byte 0x18 8.--15. 1. " PORTCNT ,EC SUPPROT USB2 2 PORTCNT" hexmask.long.byte 0x18 0.--7. 1. " PORTOFS ,EC SUPPROT USB2 2 PORTOFS" line.long 0x1C "EC_SUPPROT_USB2_3,EC SUPPROT USB2 3" line.long 0x20 "EC_DBCAP_DCID,EC_DBCAP_DCID" bitfld.long 0x20 16.--20. " DCERSTM ,EC_DBCAP_DCID_DCERSTM" ",DCERSTM_VALUE,?..." hexmask.long.byte 0x20 8.--15. 1. " NEXT ,EC DBCAP DCID NEXT" hexmask.long.byte 0x20 0.--7. 1. " CAPID ,EC DBCAP DCID CAPID" wgroup.long 0x634++0x03 line.long 0x00 "EC_DBCAP_DCDB,EC DBCAP DCDB" hexmask.long.byte 0x00 8.--15. 1. " DBTARGET ,EC DBCAP DCDB DBTARGET" group.long 0x638++0x03 line.long 0x00 "EC_DBCAP_DCERSTSZ,EC DBCAP DCERSTSZ" hexmask.long.word 0x00 0.--15. 1. " ERSTSZ ,EC DBCAP DCERSTSZ ERSTSZ" textline " " width 26. group.long 0x640++0x13 line.long 0x00 "EC_DBCAP_DCERSTBALO,EC DBCAP DCERSTBALO" hexmask.long 0x00 4.--31. 1. " ADDRLO ,EC DBCAP DCERSTBALO" line.long 0x04 "EC_DBCAP_DCERSTBAHI,EC DBCAP DCERSTBAHI" line.long 0x08 "EC_DBCAP_DCERDPLO,EC DBCAP DCERDPLO" hexmask.long 0x08 4.--31. 1. " ADDRLO ,EC DBCAP DCERDPLO ADDRLO" bitfld.long 0x08 0.--2. " DESI ,EC DBCAP DCERDPLO DESI" "Initialized,?..." line.long 0x0C "EC_DBCAP_DCERDPHI,EC DBCAP DCERDPHI ADDRHI" line.long 0x10 "EC_DBCAP_DCCTRL,EC DBCAP DCCTRL" bitfld.long 0x10 31. " DCE ,EC DBCAP DCCTRL DCE" "Disabled,Enabled" hexmask.long.byte 0x10 24.--30. 1. " DEVADR ,EC DBCAP DCCTRL DEVADR" hexmask.long.byte 0x10 16.--23. 1. " MAXBURST ,EC DBCAP DCCTRL MAXBURST" eventfld.long 0x10 4. " DRC ,EC DBCAP DCCTRL DRC" "Initialized,Clear" textline " " bitfld.long 0x10 3. " HIT ,EC DBCAP DCCTRL HIT" "False,True" bitfld.long 0x10 2. " HOT ,EC DBCAP DCCTRL HOT" "False,True" bitfld.long 0x10 1. " LSE ,EC DBCAP DCCTRL LSE" "Disabled,Enabled" rbitfld.long 0x10 0. " DCR ,EC DBCAP DCCTRL DCR" "Stop,Run" rgroup.long 0x654++0x03 line.long 0x00 "EC_DBCAP_DCST,EC DBCAP DCST" hexmask.long.byte 0x00 24.--31. 1. " DPN ,EC DBCAP DCST DPN" bitfld.long 0x00 0. " ER ,EC DBCAP DCST ER" "Empty,Not empty" group.long 0x658++0x03 line.long 0x00 "EC_DBCAP_DCPORTSC,EC DBCAP DCPORTSC" eventfld.long 0x00 23. " CEC ,EC DBCAP DCPORTSC CEC" "Not pending,Pending" eventfld.long 0x00 22. " PLC ,EC DBCAP DCPORTSC PLC" "Not pending,Pending" eventfld.long 0x00 21. " PRC ,EC DBCAP DCPORTSC PRC" "Not pending,Pending" eventfld.long 0x00 17. " CSC ,EC DBCAP DCPORTSC CSC" "Not pending,Pending" textline " " rbitfld.long 0x00 10.--13. " PS ,EC DBCAP DCPORTSC PS" "Undefined,,,,SS,?..." rbitfld.long 0x00 5.--8. " PLS ,EC DBCAP DCPORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detect,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed" rbitfld.long 0x00 4. " PR ,EC DBCAP DCPORTSC PR" "No reset,Reset" bitfld.long 0x00 1. " PED ,HCI EC DBCAP DCPORTSC PED" "Disabled,Enabled" textline " " rbitfld.long 0x00 0. " CCS ,EC DBCAP DCPORTSC CCS" "No CON,CON" group.long 0x660++0x0F line.long 0x00 "EC_DBCAP_DCECPLO,EC DBCAP DCECPLO" hexmask.long 0x00 4.--31. 1. " ADDRLO ,EC DBCAP DCECPLO ADDRLO" line.long 0x04 "EC_DBCAP_DCECPHI,EC DBCAP DCECPHI ADDRHI" line.long 0x08 "EC_DBCAP_INFO0,EC DBCAP INFO0" hexmask.long.word 0x08 16.--31. 1. " VENDORID ,EC DBCAP INFO0 VENDORID" hexmask.long.byte 0x08 0.--7. 1. " PROTOCOL ,EC DBCAP INFO0 PROTOCOL" line.long 0x0C "EC_DBCAP_INFO1,EC_DBCAP_INFO1" hexmask.long.word 0x0C 16.--31. 1. " DEV_REV ,EC DBCAP INFO1 DEV REV" hexmask.long.word 0x0C 0.--15. 1. " PRODUCTID ,EC DBCAP INFO1 PRODUCTID" rgroup.long 0x800++0x03 line.long 0x00 "RT_MFINDEX,RT MFINDEX" hexmask.long.word 0x00 0.--13. 1. " MFINDEX ,RT MFINDEX MFINDEX" group.long 0x820++0x03 line.long 0x00 "RT_IMAN,RT IMAN" bitfld.long 0x00 1. " IE ,RT IMAN IE" "Disabled,Enabled" eventfld.long 0x00 0. " IP ,RT IMAN IP" "Not pending,Pending" group.long 0x824++0x07 line.long 0x00 "RT_IMOD,RT IMOD" hexmask.long.word 0x00 16.--31. 1. " IMODC ,RT IMOD IMODC" hexmask.long.word 0x00 0.--15. 1. " IMODI ,RT IMOD IMODI" line.long 0x04 "RT_ERSTSZ,RT ERSTSZ" hexmask.long.word 0x04 0.--15. 1. " SZ ,RT ERSTSZ SZ" group.long 0x830++0x0F line.long 0x00 "RT_ERSTBA0,RT ERSTBA0" hexmask.long 0x00 4.--31. 1. " ERSTBLO ,RT ERSTBA0 ERSTBLO" line.long 0x04 "RT_ERSTBA1,RT ERSTBA1" line.long 0x08 "RT_ERDP0,RT ERDP0" hexmask.long 0x08 4.--31. 1. " DQPTRLO ,RT ERDP0 DQPTRLO" bitfld.long 0x08 0.--2. " DESI ,RT ERDP0 DESI" "Initialized,?..." line.long 0x0C "RT_ERDP1,RT ERDP1" wgroup.long 0xC00++0x03 line.long 0x00 "DB,DB" button "BGR" "d (0xC00)--(0xFFC) /long" tree.end width 0x0B endif width 25. tree "XUSB CSB Registers" group.long 0x101A00++0x03 line.long 0x00 "MEMPOOL_ILOAD_ATTR_0,L2IMEMOP Static Configuration Register" bitfld.long 0x00 31. " TC ,TC" "0,1" bitfld.long 0x00 30. " NS ,NS" "0,1" bitfld.long 0x00 29. " RO ,RO" "0,1" textline " " sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") bitfld.long 0x00 28. " RDPASSPW ,RDPASSPW" "0,1" textline " " endif hexmask.long.word 0x00 8.--19. 1. " SIZE ,SIZE" rgroup.long 0x101A04++0x03 line.long 0x00 "MEMPOOL_ILOAD_BASE_LO_0,L2IMEMOP Static Configuration Register" hexmask.long.byte 0x00 0.--7. 1. " SRC_ADDR ,SRC_ADDR" group.long 0x101A08++0x03 line.long 0x00 "MEMPOOL_ILOAD_BASE_HI_0,L2IMEMOP Static Configuration Register" hexmask.long.byte 0x00 0.--7. 1. " SRC_ADDR ,SRC_ADDR" group.long 0x101A10++0x07 line.long 0x00 "MEMPOOL_L2IMEMOP_SIZE_0,MEMPOOL L2IMEMOP SIZE 0 - Operational Register" hexmask.long.byte 0x00 24.--31. 1. " SRC_COUNT ,SRC_COUNT" hexmask.long.word 0x00 8.--19. 1. " SRC_OFFSET ,SRC_OFFSET" line.long 0x04 "MEMPOOL_L2IMEMOP_TRIG_0,L2IMEMOP Operational Register" hexmask.long.byte 0x04 24.--31. 1. " ACTION ,ACTION" hexmask.long.word 0x04 8.--17. 1. " DEST_INDEX ,DEST_INDEX" group.long 0x10181C++0x03 line.long 0x00 "MEMPOOL_APMAP_0,Aperture Programming Register" bitfld.long 0x00 31. " BOOTPATH ,BOOTPATH" "0,1" bitfld.long 0x00 24. " XREQ_READ ,XREQ_READ" "0,1" bitfld.long 0x00 8.--9. " XMAP ,XMAP" "A,B,C,?..." bitfld.long 0x00 0.--2. " FDDMA ,FDDMA" "A,B,C,D,E,?..." tree.end width 14. tree "XUSB Falcon Register" group.long 0x100++0x07 line.long 0x00 "CPUCTL_0,FALCON CPUCTL 0" rbitfld.long 0x00 5. " STOPPED ,Indicates whether the CPU is currently in the stopped state" "Not stopped,Stopped" rbitfld.long 0x00 4. " HALTED ,Indicates whether the CPU is currently in the halted state" "Not halted,Halted" bitfld.long 0x00 3. " HRESET ,Apply a hard reset" "No reset,Reset" bitfld.long 0x00 2. " SRESET ,Apply a soft reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " STARTCPU ,Request to start CPU execution while in a HALTED state" "Not requested,Requested" bitfld.long 0x00 0. " IINVAL ,Mark all blocks in IMEM except block 0 as INVALID" "No effect,Invalidate" line.long 0x04 "BOOTVEC_0,FALCON BOOTVEC 0" group.long 0x10C++0x03 line.long 0x00 "DMACTL_0,FALCON DMACTL 0" sif (cpu()!="TEGRAX1"&&cpu()!="TEGRAX2") rbitfld.long 0x00 7. " SECURE_STAT ,SECURE STAT" "0,1" textline " " endif rbitfld.long 0x00 3.--6. " DMAQ_NUM ,Valid request number at the DMA request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 2. " IMEM_SCRUBBING ,IMEM scrubbing state" "Done,Pending" rbitfld.long 0x00 1. " DMEM_SCRUBBING ,DMEM scrubbing state" "Done,Pending" sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") textline " " bitfld.long 0x00 0. " REQUIRE_CTX ,Valid context must be loaded before any DMA request can be serviced" "False,True" else textline " " rbitfld.long 0x00 0. " REQUIRE_CTX ,Valid context must be loaded before any DMA request can be serviced" "False,True" endif group.long 0x154++0x07 line.long 0x00 "IMFILLRNG1_0,IMFILLRNG1 Indicates Tag Values For The Low And High End Of The PC Range To Be auto-filled" hexmask.long.word 0x00 16.--31. 1. " TAG_HI ,TAG HI" hexmask.long.word 0x00 0.--15. 1. " TAG_LO ,TAG LO" line.long 0x04 "IMFILLCTL_0,FALCON IMFILLCTL 0" hexmask.long.byte 0x04 0.--7. 1. " NBLOCKS ,NBLOCKS" tree.end width 0x0B tree.end tree "Device Registers" base ad:0x700D9000 width 19. tree "Vectors" group.long 0x0++0x03 line.long 0x00 "AXI_BAR0_SZ_0,The Size Of The Address Range Associated With BAR0" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR0_SIZE ,The size of the address range associated with BAR0 in 4K increments" group.long 0x4++0x03 line.long 0x00 "AXI_BAR1_SZ_0,The Size Of The Address Range Associated With BAR1" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR1_SIZE ,The size of the address range associated with BAR1 in 4K increments" group.long 0x8++0x03 line.long 0x00 "AXI_BAR2_SZ_0,The Size Of The Address Range Associated With BAR2" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR2_SIZE ,The size of the address range associated with BAR2 in 4K increments" group.long 0xC++0x03 line.long 0x00 "AXI_BAR3_SZ_0,The Size Of The Address Range Associated With BAR3" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR3_SIZE ,The size of the address range associated with BAR3 in 4K increments" group.long 0x40++0x03 line.long 0x00 "AXI_BAR0_START_0,The Start Of AXI Address Space For BAR0" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR0_START ,The start of the AXI address space for BAR0" group.long 0x44++0x03 line.long 0x00 "AXI_BAR1_START_0,The Start Of AXI Address Space For BAR1" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR1_START ,The start of the AXI address space for BAR1" group.long 0x48++0x03 line.long 0x00 "AXI_BAR2_START_0,The Start Of AXI Address Space For BAR2" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR2_START ,The start of the AXI address space for BAR2" group.long 0x4C++0x03 line.long 0x00 "AXI_BAR3_START_0,The Start Of AXI Address Space For BAR3" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR3_START ,The start of the AXI address space for BAR3" group.long 0x80++0x03 line.long 0x00 "FPCI_BAR0_0,FPCI BAR0" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR0_START ,The start of FPCI address space mapped into the BAR0 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR0_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x84++0x03 line.long 0x00 "FPCI_BAR1_0,FPCI BAR1" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR1_START ,The start of FPCI address space mapped into the BAR1 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR1_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x88++0x03 line.long 0x00 "FPCI_BAR2_0,FPCI BAR2" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR2_START ,The start of FPCI address space mapped into the BAR2 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR2_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x8C++0x03 line.long 0x00 "FPCI_BAR3_0,FPCI BAR3" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR3_START ,The start of FPCI address space mapped into the BAR3 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR3_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0xC0++0x0B line.long 0x00 "MSI_BAR_SZ_0,MSI BAR Size" hexmask.long.tbyte 0x00 0.--19. 1. " MSI_BAR_SIZE ,The size of the address range associated with MSI BAR is in 4K increments" line.long 0x04 "MSI_AXI_BAR_ST_0,MSI AXI BAR Start" hexmask.long.tbyte 0x04 12.--31. 0x10 " MSI_AXI_BAR_START ,The start of the upstream AXI address space for MSI BAR" line.long 0x08 "MSI_FPCI_BAR_ST_0,MSI FPCI BAR Start" hexmask.long 0x08 4.--31. 0x10 " MSI_FPCI_BAR_START ,The start of the upstream FPCI address space for MSI BAR" tree.end width 12. tree "MSI Vector registers" width 12. group.long 0x100++0x1F line.long 0x00 "MSI_VEC0_0,XUSB_DEV MSI Vector Register 0" eventfld.long 0x00 31. " MSI_VECTOR[31] ,MSI vector 31" "No MSI,MSI sent" eventfld.long 0x00 30. " [30] ,MSI vector 30" "No MSI,MSI sent" eventfld.long 0x00 29. " [29] ,MSI vector 29" "No MSI,MSI sent" eventfld.long 0x00 28. " [28] ,MSI vector 28" "No MSI,MSI sent" eventfld.long 0x00 27. " [27] ,MSI vector 27" "No MSI,MSI sent" eventfld.long 0x00 26. " [26] ,MSI vector 26" "No MSI,MSI sent" textline " " eventfld.long 0x00 25. " [25] ,MSI vector 25" "No MSI,MSI sent" eventfld.long 0x00 24. " [24] ,MSI vector 24" "No MSI,MSI sent" eventfld.long 0x00 23. " [23] ,MSI vector 23" "No MSI,MSI sent" eventfld.long 0x00 22. " [22] ,MSI vector 22" "No MSI,MSI sent" eventfld.long 0x00 21. " [21] ,MSI vector 21" "No MSI,MSI sent" eventfld.long 0x00 20. " [20] ,MSI vector 20" "No MSI,MSI sent" textline " " eventfld.long 0x00 19. " [19] ,MSI vector 19" "No MSI,MSI sent" eventfld.long 0x00 18. " [18] ,MSI vector 18" "No MSI,MSI sent" eventfld.long 0x00 17. " [17] ,MSI vector 17" "No MSI,MSI sent" eventfld.long 0x00 16. " [16] ,MSI vector 16" "No MSI,MSI sent" eventfld.long 0x00 15. " [15] ,MSI vector 15" "No MSI,MSI sent" eventfld.long 0x00 14. " [14] ,MSI vector 14" "No MSI,MSI sent" textline " " eventfld.long 0x00 13. " [13] ,MSI vector 13" "No MSI,MSI sent" eventfld.long 0x00 12. " [12] ,MSI vector 12" "No MSI,MSI sent" eventfld.long 0x00 11. " [11] ,MSI vector 11" "No MSI,MSI sent" eventfld.long 0x00 10. " [10] ,MSI vector 10" "No MSI,MSI sent" eventfld.long 0x00 9. " [9] ,MSI vector 9" "No MSI,MSI sent" eventfld.long 0x00 8. " [8] ,MSI vector 8" "No MSI,MSI sent" textline " " eventfld.long 0x00 7. " [7] ,MSI vector 7" "No MSI,MSI sent" eventfld.long 0x00 6. " [6] ,MSI vector 6" "No MSI,MSI sent" eventfld.long 0x00 5. " [5] ,MSI vector 5" "No MSI,MSI sent" eventfld.long 0x00 4. " [4] ,MSI vector 4" "No MSI,MSI sent" eventfld.long 0x00 3. " [3] ,MSI vector 3" "No MSI,MSI sent" eventfld.long 0x00 2. " [2] ,MSI vector 2" "No MSI,MSI sent" textline " " eventfld.long 0x00 1. " [1] ,MSI vector 1" "No MSI,MSI sent" eventfld.long 0x00 0. " [0] ,MSI vector 0" "No MSI,MSI sent" line.long 0x04 "MSI_VEC1_0,XUSB_DEV MSI Vector Register 1" eventfld.long 0x04 31. " MSI_VECTOR[63] ,MSI vector 63" "No MSI,MSI sent" eventfld.long 0x04 30. " [62] ,MSI vector 62" "No MSI,MSI sent" eventfld.long 0x04 29. " [61] ,MSI vector 61" "No MSI,MSI sent" eventfld.long 0x04 28. " [60] ,MSI vector 60" "No MSI,MSI sent" eventfld.long 0x04 27. " [59] ,MSI vector 59" "No MSI,MSI sent" eventfld.long 0x04 26. " [58] ,MSI vector 58" "No MSI,MSI sent" textline " " eventfld.long 0x04 25. " [57] ,MSI vector 57" "No MSI,MSI sent" eventfld.long 0x04 24. " [56] ,MSI vector 56" "No MSI,MSI sent" eventfld.long 0x04 23. " [55] ,MSI vector 55" "No MSI,MSI sent" eventfld.long 0x04 22. " [54] ,MSI vector 54" "No MSI,MSI sent" eventfld.long 0x04 21. " [53] ,MSI vector 53" "No MSI,MSI sent" eventfld.long 0x04 20. " [52] ,MSI vector 52" "No MSI,MSI sent" textline " " eventfld.long 0x04 19. " [51] ,MSI vector 51" "No MSI,MSI sent" eventfld.long 0x04 18. " [50] ,MSI vector 50" "No MSI,MSI sent" eventfld.long 0x04 17. " [49] ,MSI vector 49" "No MSI,MSI sent" eventfld.long 0x04 16. " [48] ,MSI vector 48" "No MSI,MSI sent" eventfld.long 0x04 15. " [47] ,MSI vector 47" "No MSI,MSI sent" eventfld.long 0x04 14. " [46] ,MSI vector 46" "No MSI,MSI sent" textline " " eventfld.long 0x04 13. " [45] ,MSI vector 45" "No MSI,MSI sent" eventfld.long 0x04 12. " [44] ,MSI vector 44" "No MSI,MSI sent" eventfld.long 0x04 11. " [43] ,MSI vector 43" "No MSI,MSI sent" eventfld.long 0x04 10. " [42] ,MSI vector 42" "No MSI,MSI sent" eventfld.long 0x04 9. " [41] ,MSI vector 41" "No MSI,MSI sent" eventfld.long 0x04 8. " [40] ,MSI vector 40" "No MSI,MSI sent" textline " " eventfld.long 0x04 7. " [39] ,MSI vector 39" "No MSI,MSI sent" eventfld.long 0x04 6. " [38] ,MSI vector 38" "No MSI,MSI sent" eventfld.long 0x04 5. " [37] ,MSI vector 37" "No MSI,MSI sent" eventfld.long 0x04 4. " [36] ,MSI vector 36" "No MSI,MSI sent" eventfld.long 0x04 3. " [35] ,MSI vector 35" "No MSI,MSI sent" eventfld.long 0x04 2. " [34] ,MSI vector 34" "No MSI,MSI sent" textline " " eventfld.long 0x04 1. " [33] ,MSI vector 33" "No MSI,MSI sent" eventfld.long 0x04 0. " [32] ,MSI vector 32" "No MSI,MSI sent" line.long 0x08 "MSI_VEC2_0,XUSB_DEV MSI Vector Register 2" eventfld.long 0x08 31. " MSI_VECTOR[95] ,MSI vector 95" "No MSI,MSI sent" eventfld.long 0x08 30. " [94] ,MSI vector 94" "No MSI,MSI sent" eventfld.long 0x08 29. " [93] ,MSI vector 93" "No MSI,MSI sent" eventfld.long 0x08 28. " [92] ,MSI vector 92" "No MSI,MSI sent" eventfld.long 0x08 27. " [91] ,MSI vector 91" "No MSI,MSI sent" eventfld.long 0x08 26. " [90] ,MSI vector 90" "No MSI,MSI sent" textline " " eventfld.long 0x08 25. " [89] ,MSI vector 89" "No MSI,MSI sent" eventfld.long 0x08 24. " [88] ,MSI vector 88" "No MSI,MSI sent" eventfld.long 0x08 23. " [87] ,MSI vector 87" "No MSI,MSI sent" eventfld.long 0x08 22. " [86] ,MSI vector 86" "No MSI,MSI sent" eventfld.long 0x08 21. " [85] ,MSI vector 85" "No MSI,MSI sent" eventfld.long 0x08 20. " [84] ,MSI vector 84" "No MSI,MSI sent" textline " " eventfld.long 0x08 19. " [83] ,MSI vector 83" "No MSI,MSI sent" eventfld.long 0x08 18. " [82] ,MSI vector 82" "No MSI,MSI sent" eventfld.long 0x08 17. " [81] ,MSI vector 81" "No MSI,MSI sent" eventfld.long 0x08 16. " [80] ,MSI vector 80" "No MSI,MSI sent" eventfld.long 0x08 15. " [79] ,MSI vector 79" "No MSI,MSI sent" eventfld.long 0x08 14. " [78] ,MSI vector 78" "No MSI,MSI sent" textline " " eventfld.long 0x08 13. " [77] ,MSI vector 77" "No MSI,MSI sent" eventfld.long 0x08 12. " [76] ,MSI vector 76" "No MSI,MSI sent" eventfld.long 0x08 11. " [75] ,MSI vector 75" "No MSI,MSI sent" eventfld.long 0x08 10. " [74] ,MSI vector 74" "No MSI,MSI sent" eventfld.long 0x08 9. " [73] ,MSI vector 73" "No MSI,MSI sent" eventfld.long 0x08 8. " [72] ,MSI vector 72" "No MSI,MSI sent" textline " " eventfld.long 0x08 7. " [71] ,MSI vector 71" "No MSI,MSI sent" eventfld.long 0x08 6. " [70] ,MSI vector 70" "No MSI,MSI sent" eventfld.long 0x08 5. " [69] ,MSI vector 69" "No MSI,MSI sent" eventfld.long 0x08 4. " [68] ,MSI vector 68" "No MSI,MSI sent" eventfld.long 0x08 3. " [67] ,MSI vector 67" "No MSI,MSI sent" eventfld.long 0x08 2. " [66] ,MSI vector 66" "No MSI,MSI sent" textline " " eventfld.long 0x08 1. " [65] ,MSI vector 65" "No MSI,MSI sent" eventfld.long 0x08 0. " [64] ,MSI vector 64" "No MSI,MSI sent" line.long 0x0C "MSI_VEC3_0,XUSB_DEV MSI Vector Register 3" eventfld.long 0x0C 31. " MSI_VECTOR[127] ,MSI vector 127" "No MSI,MSI sent" eventfld.long 0x0C 30. " [126] ,MSI vector 126" "No MSI,MSI sent" eventfld.long 0x0C 29. " [125] ,MSI vector 125" "No MSI,MSI sent" eventfld.long 0x0C 28. " [124] ,MSI vector 124" "No MSI,MSI sent" eventfld.long 0x0C 27. " [123] ,MSI vector 123" "No MSI,MSI sent" eventfld.long 0x0C 26. " [122] ,MSI vector 122" "No MSI,MSI sent" textline " " eventfld.long 0x0C 25. " [121] ,MSI vector 121" "No MSI,MSI sent" eventfld.long 0x0C 24. " [120] ,MSI vector 120" "No MSI,MSI sent" eventfld.long 0x0C 23. " [119] ,MSI vector 119" "No MSI,MSI sent" eventfld.long 0x0C 22. " [118] ,MSI vector 118" "No MSI,MSI sent" eventfld.long 0x0C 21. " [117] ,MSI vector 117" "No MSI,MSI sent" eventfld.long 0x0C 20. " [116] ,MSI vector 116" "No MSI,MSI sent" textline " " eventfld.long 0x0C 19. " [115] ,MSI vector 115" "No MSI,MSI sent" eventfld.long 0x0C 18. " [114] ,MSI vector 114" "No MSI,MSI sent" eventfld.long 0x0C 17. " [113] ,MSI vector 113" "No MSI,MSI sent" eventfld.long 0x0C 16. " [112] ,MSI vector 112" "No MSI,MSI sent" eventfld.long 0x0C 15. " [111] ,MSI vector 111" "No MSI,MSI sent" eventfld.long 0x0C 14. " [110] ,MSI vector 110" "No MSI,MSI sent" textline " " eventfld.long 0x0C 13. " [109] ,MSI vector 109" "No MSI,MSI sent" eventfld.long 0x0C 12. " [108] ,MSI vector 108" "No MSI,MSI sent" eventfld.long 0x0C 11. " [107] ,MSI vector 107" "No MSI,MSI sent" eventfld.long 0x0C 10. " [106] ,MSI vector 106" "No MSI,MSI sent" eventfld.long 0x0C 9. " [105] ,MSI vector 105" "No MSI,MSI sent" eventfld.long 0x0C 8. " [104] ,MSI vector 104" "No MSI,MSI sent" textline " " eventfld.long 0x0C 7. " [103] ,MSI vector 103" "No MSI,MSI sent" eventfld.long 0x0C 6. " [102] ,MSI vector 102" "No MSI,MSI sent" eventfld.long 0x0C 5. " [101] ,MSI vector 101" "No MSI,MSI sent" eventfld.long 0x0C 4. " [100] ,MSI vector 100" "No MSI,MSI sent" eventfld.long 0x0C 3. " [99] ,MSI vector 99" "No MSI,MSI sent" eventfld.long 0x0C 2. " [98] ,MSI vector 98" "No MSI,MSI sent" textline " " eventfld.long 0x0C 1. " [97] ,MSI vector 97" "No MSI,MSI sent" eventfld.long 0x0C 0. " [96] ,MSI vector 96" "No MSI,MSI sent" line.long 0x10 "MSI_VEC4_0,XUSB_DEV MSI Vector Register 4" eventfld.long 0x10 31. " MSI_VECTOR[159] ,MSI vector 159" "No MSI,MSI sent" eventfld.long 0x10 30. " [158] ,MSI vector 158" "No MSI,MSI sent" eventfld.long 0x10 29. " [157] ,MSI vector 157" "No MSI,MSI sent" eventfld.long 0x10 28. " [156] ,MSI vector 156" "No MSI,MSI sent" eventfld.long 0x10 27. " [155] ,MSI vector 155" "No MSI,MSI sent" eventfld.long 0x10 26. " [154] ,MSI vector 154" "No MSI,MSI sent" textline " " eventfld.long 0x10 25. " [153] ,MSI vector 153" "No MSI,MSI sent" eventfld.long 0x10 24. " [152] ,MSI vector 152" "No MSI,MSI sent" eventfld.long 0x10 23. " [151] ,MSI vector 151" "No MSI,MSI sent" eventfld.long 0x10 22. " [150] ,MSI vector 150" "No MSI,MSI sent" eventfld.long 0x10 21. " [149] ,MSI vector 149" "No MSI,MSI sent" eventfld.long 0x10 20. " [148] ,MSI vector 148" "No MSI,MSI sent" textline " " eventfld.long 0x10 19. " [147] ,MSI vector 147" "No MSI,MSI sent" eventfld.long 0x10 18. " [146] ,MSI vector 146" "No MSI,MSI sent" eventfld.long 0x10 17. " [145] ,MSI vector 145" "No MSI,MSI sent" eventfld.long 0x10 16. " [144] ,MSI vector 144" "No MSI,MSI sent" eventfld.long 0x10 15. " [143] ,MSI vector 143" "No MSI,MSI sent" eventfld.long 0x10 14. " [142] ,MSI vector 142" "No MSI,MSI sent" textline " " eventfld.long 0x10 13. " [141] ,MSI vector 141" "No MSI,MSI sent" eventfld.long 0x10 12. " [140] ,MSI vector 140" "No MSI,MSI sent" eventfld.long 0x10 11. " [139] ,MSI vector 139" "No MSI,MSI sent" eventfld.long 0x10 10. " [138] ,MSI vector 138" "No MSI,MSI sent" eventfld.long 0x10 9. " [137] ,MSI vector 137" "No MSI,MSI sent" eventfld.long 0x10 8. " [136] ,MSI vector 136" "No MSI,MSI sent" textline " " eventfld.long 0x10 7. " [135] ,MSI vector 135" "No MSI,MSI sent" eventfld.long 0x10 6. " [134] ,MSI vector 134" "No MSI,MSI sent" eventfld.long 0x10 5. " [133] ,MSI vector 133" "No MSI,MSI sent" eventfld.long 0x10 4. " [132] ,MSI vector 132" "No MSI,MSI sent" eventfld.long 0x10 3. " [131] ,MSI vector 131" "No MSI,MSI sent" eventfld.long 0x10 2. " [130] ,MSI vector 130" "No MSI,MSI sent" textline " " eventfld.long 0x10 1. " [129] ,MSI vector 129" "No MSI,MSI sent" eventfld.long 0x10 0. " [128] ,MSI vector 128" "No MSI,MSI sent" line.long 0x14 "MSI_VEC5_0,XUSB_DEV MSI Vector Register 5" eventfld.long 0x14 31. " MSI_VECTOR[191] ,MSI vector 191" "No MSI,MSI sent" eventfld.long 0x14 30. " [190] ,MSI vector 190" "No MSI,MSI sent" eventfld.long 0x14 29. " [189] ,MSI vector 189" "No MSI,MSI sent" eventfld.long 0x14 28. " [188] ,MSI vector 188" "No MSI,MSI sent" eventfld.long 0x14 27. " [187] ,MSI vector 187" "No MSI,MSI sent" eventfld.long 0x14 26. " [186] ,MSI vector 186" "No MSI,MSI sent" textline " " eventfld.long 0x14 25. " [185] ,MSI vector 185" "No MSI,MSI sent" eventfld.long 0x14 24. " [184] ,MSI vector 184" "No MSI,MSI sent" eventfld.long 0x14 23. " [183] ,MSI vector 183" "No MSI,MSI sent" eventfld.long 0x14 22. " [182] ,MSI vector 182" "No MSI,MSI sent" eventfld.long 0x14 21. " [181] ,MSI vector 181" "No MSI,MSI sent" eventfld.long 0x14 20. " [180] ,MSI vector 180" "No MSI,MSI sent" textline " " eventfld.long 0x14 19. " [179] ,MSI vector 179" "No MSI,MSI sent" eventfld.long 0x14 18. " [178] ,MSI vector 178" "No MSI,MSI sent" eventfld.long 0x14 17. " [177] ,MSI vector 177" "No MSI,MSI sent" eventfld.long 0x14 16. " [176] ,MSI vector 176" "No MSI,MSI sent" eventfld.long 0x14 15. " [175] ,MSI vector 175" "No MSI,MSI sent" eventfld.long 0x14 14. " [174] ,MSI vector 174" "No MSI,MSI sent" textline " " eventfld.long 0x14 13. " [173] ,MSI vector 173" "No MSI,MSI sent" eventfld.long 0x14 12. " [172] ,MSI vector 172" "No MSI,MSI sent" eventfld.long 0x14 11. " [171] ,MSI vector 171" "No MSI,MSI sent" eventfld.long 0x14 10. " [170] ,MSI vector 170" "No MSI,MSI sent" eventfld.long 0x14 9. " [169] ,MSI vector 169" "No MSI,MSI sent" eventfld.long 0x14 8. " [168] ,MSI vector 168" "No MSI,MSI sent" textline " " eventfld.long 0x14 7. " [167] ,MSI vector 167" "No MSI,MSI sent" eventfld.long 0x14 6. " [166] ,MSI vector 166" "No MSI,MSI sent" eventfld.long 0x14 5. " [165] ,MSI vector 165" "No MSI,MSI sent" eventfld.long 0x14 4. " [164] ,MSI vector 164" "No MSI,MSI sent" eventfld.long 0x14 3. " [163] ,MSI vector 163" "No MSI,MSI sent" eventfld.long 0x14 2. " [162] ,MSI vector 162" "No MSI,MSI sent" textline " " eventfld.long 0x14 1. " [161] ,MSI vector 161" "No MSI,MSI sent" eventfld.long 0x14 0. " [160] ,MSI vector 160" "No MSI,MSI sent" line.long 0x18 "MSI_VEC6_0,XUSB_DEV MSI Vector Register 6" eventfld.long 0x18 31. " MSI_VECTOR[223] ,MSI vector 223" "No MSI,MSI sent" eventfld.long 0x18 30. " [222] ,MSI vector 222" "No MSI,MSI sent" eventfld.long 0x18 29. " [221] ,MSI vector 221" "No MSI,MSI sent" eventfld.long 0x18 28. " [220] ,MSI vector 220" "No MSI,MSI sent" eventfld.long 0x18 27. " [219] ,MSI vector 219" "No MSI,MSI sent" eventfld.long 0x18 26. " [218] ,MSI vector 218" "No MSI,MSI sent" textline " " eventfld.long 0x18 25. " [217] ,MSI vector 217" "No MSI,MSI sent" eventfld.long 0x18 24. " [216] ,MSI vector 216" "No MSI,MSI sent" eventfld.long 0x18 23. " [215] ,MSI vector 215" "No MSI,MSI sent" eventfld.long 0x18 22. " [214] ,MSI vector 214" "No MSI,MSI sent" eventfld.long 0x18 21. " [213] ,MSI vector 213" "No MSI,MSI sent" eventfld.long 0x18 20. " [212] ,MSI vector 212" "No MSI,MSI sent" textline " " eventfld.long 0x18 19. " [211] ,MSI vector 211" "No MSI,MSI sent" eventfld.long 0x18 18. " [210] ,MSI vector 210" "No MSI,MSI sent" eventfld.long 0x18 17. " [209] ,MSI vector 209" "No MSI,MSI sent" eventfld.long 0x18 16. " [208] ,MSI vector 208" "No MSI,MSI sent" eventfld.long 0x18 15. " [207] ,MSI vector 207" "No MSI,MSI sent" eventfld.long 0x18 14. " [206] ,MSI vector 206" "No MSI,MSI sent" textline " " eventfld.long 0x18 13. " [205] ,MSI vector 205" "No MSI,MSI sent" eventfld.long 0x18 12. " [204] ,MSI vector 204" "No MSI,MSI sent" eventfld.long 0x18 11. " [203] ,MSI vector 203" "No MSI,MSI sent" eventfld.long 0x18 10. " [202] ,MSI vector 202" "No MSI,MSI sent" eventfld.long 0x18 9. " [201] ,MSI vector 201" "No MSI,MSI sent" eventfld.long 0x18 8. " [200] ,MSI vector 200" "No MSI,MSI sent" textline " " eventfld.long 0x18 7. " [199] ,MSI vector 199" "No MSI,MSI sent" eventfld.long 0x18 6. " [198] ,MSI vector 198" "No MSI,MSI sent" eventfld.long 0x18 5. " [197] ,MSI vector 197" "No MSI,MSI sent" eventfld.long 0x18 4. " [196] ,MSI vector 196" "No MSI,MSI sent" eventfld.long 0x18 3. " [195] ,MSI vector 195" "No MSI,MSI sent" eventfld.long 0x18 2. " [194] ,MSI vector 194" "No MSI,MSI sent" textline " " eventfld.long 0x18 1. " [193] ,MSI vector 193" "No MSI,MSI sent" eventfld.long 0x18 0. " [192] ,MSI vector 192" "No MSI,MSI sent" line.long 0x1C "MSI_VEC7_0,XUSB_DEV MSI Vector Register 7" eventfld.long 0x1C 31. " MSI_VECTOR[255] ,MSI vector 255" "No MSI,MSI sent" eventfld.long 0x1C 30. " [254] ,MSI vector 254" "No MSI,MSI sent" eventfld.long 0x1C 29. " [253] ,MSI vector 253" "No MSI,MSI sent" eventfld.long 0x1C 28. " [252] ,MSI vector 252" "No MSI,MSI sent" eventfld.long 0x1C 27. " [251] ,MSI vector 251" "No MSI,MSI sent" eventfld.long 0x1C 26. " [250] ,MSI vector 250" "No MSI,MSI sent" textline " " eventfld.long 0x1C 25. " [249] ,MSI vector 249" "No MSI,MSI sent" eventfld.long 0x1C 24. " [248] ,MSI vector 248" "No MSI,MSI sent" eventfld.long 0x1C 23. " [247] ,MSI vector 247" "No MSI,MSI sent" eventfld.long 0x1C 22. " [246] ,MSI vector 246" "No MSI,MSI sent" eventfld.long 0x1C 21. " [245] ,MSI vector 245" "No MSI,MSI sent" eventfld.long 0x1C 20. " [244] ,MSI vector 244" "No MSI,MSI sent" textline " " eventfld.long 0x1C 19. " [243] ,MSI vector 243" "No MSI,MSI sent" eventfld.long 0x1C 18. " [242] ,MSI vector 242" "No MSI,MSI sent" eventfld.long 0x1C 17. " [241] ,MSI vector 241" "No MSI,MSI sent" eventfld.long 0x1C 16. " [240] ,MSI vector 240" "No MSI,MSI sent" eventfld.long 0x1C 15. " [239] ,MSI vector 239" "No MSI,MSI sent" eventfld.long 0x1C 14. " [238] ,MSI vector 238" "No MSI,MSI sent" textline " " eventfld.long 0x1C 13. " [237] ,MSI vector 237" "No MSI,MSI sent" eventfld.long 0x1C 12. " [236] ,MSI vector 236" "No MSI,MSI sent" eventfld.long 0x1C 11. " [235] ,MSI vector 235" "No MSI,MSI sent" eventfld.long 0x1C 10. " [234] ,MSI vector 234" "No MSI,MSI sent" eventfld.long 0x1C 9. " [233] ,MSI vector 233" "No MSI,MSI sent" eventfld.long 0x1C 8. " [232] ,MSI vector 232" "No MSI,MSI sent" textline " " eventfld.long 0x1C 7. " [231] ,MSI vector 231" "No MSI,MSI sent" eventfld.long 0x1C 6. " [230] ,MSI vector 230" "No MSI,MSI sent" eventfld.long 0x1C 5. " [229] ,MSI vector 229" "No MSI,MSI sent" eventfld.long 0x1C 4. " [228] ,MSI vector 228" "No MSI,MSI sent" eventfld.long 0x1C 3. " [227] ,MSI vector 227" "No MSI,MSI sent" eventfld.long 0x1C 2. " [226] ,MSI vector 226" "No MSI,MSI sent" textline " " eventfld.long 0x1C 1. " [225] ,MSI vector 225" "No MSI,MSI sent" eventfld.long 0x1C 0. " [224] ,MSI vector 224" "No MSI,MSI sent" textline " " width 15. group.long 0x140++0x1F line.long 0x00 "MSI_EN_VEC0_0,XUSB_DEV MSI Vector Enable Register 0" bitfld.long 0x00 31. " MSI_ENABLE_VECTOR[31] ,MSI vector enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,MSI vector enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,MSI vector enable 29" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,MSI vector enable 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,MSI vector enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,MSI vector enable 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,MSI vector enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,MSI vector enable 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,MSI vector enable 23" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,MSI vector enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,MSI vector enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,MSI vector enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,MSI vector enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,MSI vector enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,MSI vector enable 17" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,MSI vector enable 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,MSI vector enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,MSI vector enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,MSI vector enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,MSI vector enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,MSI vector enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,MSI vector enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,MSI vector enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,MSI vector enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,MSI vector enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,MSI vector enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,MSI vector enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,MSI vector enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,MSI vector enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,MSI vector enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,MSI vector enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,MSI vector enable 0" "Disabled,Enabled" line.long 0x04 "MSI_EN_VEC1_0,XUSB_DEV MSI Vector Enable Register 1" bitfld.long 0x04 31. " MSI_ENABLE_VECTOR[63] ,MSI vector enable 63" "Disabled,Enabled" bitfld.long 0x04 30. " [62] ,MSI vector enable 62" "Disabled,Enabled" bitfld.long 0x04 29. " [61] ,MSI vector enable 61" "Disabled,Enabled" bitfld.long 0x04 28. " [60] ,MSI vector enable 60" "Disabled,Enabled" bitfld.long 0x04 27. " [59] ,MSI vector enable 59" "Disabled,Enabled" bitfld.long 0x04 26. " [58] ,MSI vector enable 58" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " [57] ,MSI vector enable 57" "Disabled,Enabled" bitfld.long 0x04 24. " [56] ,MSI vector enable 56" "Disabled,Enabled" bitfld.long 0x04 23. " [55] ,MSI vector enable 55" "Disabled,Enabled" bitfld.long 0x04 22. " [54] ,MSI vector enable 54" "Disabled,Enabled" bitfld.long 0x04 21. " [53] ,MSI vector enable 53" "Disabled,Enabled" bitfld.long 0x04 20. " [52] ,MSI vector enable 52" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [51] ,MSI vector enable 51" "Disabled,Enabled" bitfld.long 0x04 18. " [50] ,MSI vector enable 50" "Disabled,Enabled" bitfld.long 0x04 17. " [49] ,MSI vector enable 49" "Disabled,Enabled" bitfld.long 0x04 16. " [48] ,MSI vector enable 48" "Disabled,Enabled" bitfld.long 0x04 15. " [47] ,MSI vector enable 47" "Disabled,Enabled" bitfld.long 0x04 14. " [46] ,MSI vector enable 46" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [45] ,MSI vector enable 45" "Disabled,Enabled" bitfld.long 0x04 12. " [44] ,MSI vector enable 44" "Disabled,Enabled" bitfld.long 0x04 11. " [43] ,MSI vector enable 43" "Disabled,Enabled" bitfld.long 0x04 10. " [42] ,MSI vector enable 42" "Disabled,Enabled" bitfld.long 0x04 9. " [41] ,MSI vector enable 41" "Disabled,Enabled" bitfld.long 0x04 8. " [40] ,MSI vector enable 40" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [39] ,MSI vector enable 39" "Disabled,Enabled" bitfld.long 0x04 6. " [38] ,MSI vector enable 38" "Disabled,Enabled" bitfld.long 0x04 5. " [37] ,MSI vector enable 37" "Disabled,Enabled" bitfld.long 0x04 4. " [36] ,MSI vector enable 36" "Disabled,Enabled" bitfld.long 0x04 3. " [35] ,MSI vector enable 35" "Disabled,Enabled" bitfld.long 0x04 2. " [34] ,MSI vector enable 34" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [33] ,MSI vector enable 33" "Disabled,Enabled" bitfld.long 0x04 0. " [32] ,MSI vector enable 32" "Disabled,Enabled" line.long 0x08 "MSI_EN_VEC2_0,XUSB_DEV MSI Vector Enable Register 2" bitfld.long 0x08 31. " MSI_ENABLE_VECTOR[95] ,MSI vector enable 95" "Disabled,Enabled" bitfld.long 0x08 30. " [94] ,MSI vector enable 94" "Disabled,Enabled" bitfld.long 0x08 29. " [93] ,MSI vector enable 93" "Disabled,Enabled" bitfld.long 0x08 28. " [92] ,MSI vector enable 92" "Disabled,Enabled" bitfld.long 0x08 27. " [91] ,MSI vector enable 91" "Disabled,Enabled" bitfld.long 0x08 26. " [90] ,MSI vector enable 90" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " [89] ,MSI vector enable 89" "Disabled,Enabled" bitfld.long 0x08 24. " [88] ,MSI vector enable 88" "Disabled,Enabled" bitfld.long 0x08 23. " [87] ,MSI vector enable 87" "Disabled,Enabled" bitfld.long 0x08 22. " [86] ,MSI vector enable 86" "Disabled,Enabled" bitfld.long 0x08 21. " [85] ,MSI vector enable 85" "Disabled,Enabled" bitfld.long 0x08 20. " [84] ,MSI vector enable 84" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " [83] ,MSI vector enable 83" "Disabled,Enabled" bitfld.long 0x08 18. " [82] ,MSI vector enable 82" "Disabled,Enabled" bitfld.long 0x08 17. " [81] ,MSI vector enable 81" "Disabled,Enabled" bitfld.long 0x08 16. " [80] ,MSI vector enable 80" "Disabled,Enabled" bitfld.long 0x08 15. " [79] ,MSI vector enable 79" "Disabled,Enabled" bitfld.long 0x08 14. " [78] ,MSI vector enable 78" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " [77] ,MSI vector enable 77" "Disabled,Enabled" bitfld.long 0x08 12. " [76] ,MSI vector enable 76" "Disabled,Enabled" bitfld.long 0x08 11. " [75] ,MSI vector enable 75" "Disabled,Enabled" bitfld.long 0x08 10. " [74] ,MSI vector enable 74" "Disabled,Enabled" bitfld.long 0x08 9. " [73] ,MSI vector enable 73" "Disabled,Enabled" bitfld.long 0x08 8. " [72] ,MSI vector enable 72" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " [71] ,MSI vector enable 71" "Disabled,Enabled" bitfld.long 0x08 6. " [70] ,MSI vector enable 70" "Disabled,Enabled" bitfld.long 0x08 5. " [69] ,MSI vector enable 69" "Disabled,Enabled" bitfld.long 0x08 4. " [68] ,MSI vector enable 68" "Disabled,Enabled" bitfld.long 0x08 3. " [67] ,MSI vector enable 67" "Disabled,Enabled" bitfld.long 0x08 2. " [66] ,MSI vector enable 66" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " [65] ,MSI vector enable 65" "Disabled,Enabled" bitfld.long 0x08 0. " [64] ,MSI vector enable 64" "Disabled,Enabled" line.long 0x0C "MSI_EN_VEC3_0,XUSB_DEV MSI Vector Enable Register 3" bitfld.long 0x0C 31. " MSI_ENABLE_VECTOR[127] ,MSI vector enable 127" "Disabled,Enabled" bitfld.long 0x0C 30. " [126] ,MSI vector enable 126" "Disabled,Enabled" bitfld.long 0x0C 29. " [125] ,MSI vector enable 125" "Disabled,Enabled" bitfld.long 0x0C 28. " [124] ,MSI vector enable 124" "Disabled,Enabled" bitfld.long 0x0C 27. " [123] ,MSI vector enable 123" "Disabled,Enabled" bitfld.long 0x0C 26. " [122] ,MSI vector enable 122" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " [121] ,MSI vector enable 121" "Disabled,Enabled" bitfld.long 0x0C 24. " [120] ,MSI vector enable 120" "Disabled,Enabled" bitfld.long 0x0C 23. " [119] ,MSI vector enable 119" "Disabled,Enabled" bitfld.long 0x0C 22. " [118] ,MSI vector enable 118" "Disabled,Enabled" bitfld.long 0x0C 21. " [117] ,MSI vector enable 117" "Disabled,Enabled" bitfld.long 0x0C 20. " [116] ,MSI vector enable 116" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " [115] ,MSI vector enable 115" "Disabled,Enabled" bitfld.long 0x0C 18. " [114] ,MSI vector enable 114" "Disabled,Enabled" bitfld.long 0x0C 17. " [113] ,MSI vector enable 113" "Disabled,Enabled" bitfld.long 0x0C 16. " [112] ,MSI vector enable 112" "Disabled,Enabled" bitfld.long 0x0C 15. " [111] ,MSI vector enable 111" "Disabled,Enabled" bitfld.long 0x0C 14. " [110] ,MSI vector enable 110" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " [109] ,MSI vector enable 109" "Disabled,Enabled" bitfld.long 0x0C 12. " [108] ,MSI vector enable 108" "Disabled,Enabled" bitfld.long 0x0C 11. " [107] ,MSI vector enable 107" "Disabled,Enabled" bitfld.long 0x0C 10. " [106] ,MSI vector enable 106" "Disabled,Enabled" bitfld.long 0x0C 9. " [105] ,MSI vector enable 105" "Disabled,Enabled" bitfld.long 0x0C 8. " [104] ,MSI vector enable 104" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " [103] ,MSI vector enable 103" "Disabled,Enabled" bitfld.long 0x0C 6. " [102] ,MSI vector enable 102" "Disabled,Enabled" bitfld.long 0x0C 5. " [101] ,MSI vector enable 101" "Disabled,Enabled" bitfld.long 0x0C 4. " [100] ,MSI vector enable 100" "Disabled,Enabled" bitfld.long 0x0C 3. " [99] ,MSI vector enable 99" "Disabled,Enabled" bitfld.long 0x0C 2. " [98] ,MSI vector enable 98" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " [97] ,MSI vector enable 97" "Disabled,Enabled" bitfld.long 0x0C 0. " [96] ,MSI vector enable 96" "Disabled,Enabled" line.long 0x10 "MSI_EN_VEC4_0,XUSB_DEV MSI Vector Enable Register 4" bitfld.long 0x10 31. " MSI_ENABLE_VECTOR[159] ,MSI vector enable 159" "Disabled,Enabled" bitfld.long 0x10 30. " [158] ,MSI vector enable 158" "Disabled,Enabled" bitfld.long 0x10 29. " [157] ,MSI vector enable 157" "Disabled,Enabled" bitfld.long 0x10 28. " [156] ,MSI vector enable 156" "Disabled,Enabled" bitfld.long 0x10 27. " [155] ,MSI vector enable 155" "Disabled,Enabled" bitfld.long 0x10 26. " [154] ,MSI vector enable 154" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " [153] ,MSI vector enable 153" "Disabled,Enabled" bitfld.long 0x10 24. " [152] ,MSI vector enable 152" "Disabled,Enabled" bitfld.long 0x10 23. " [151] ,MSI vector enable 151" "Disabled,Enabled" bitfld.long 0x10 22. " [150] ,MSI vector enable 150" "Disabled,Enabled" bitfld.long 0x10 21. " [149] ,MSI vector enable 149" "Disabled,Enabled" bitfld.long 0x10 20. " [148] ,MSI vector enable 148" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " [147] ,MSI vector enable 147" "Disabled,Enabled" bitfld.long 0x10 18. " [146] ,MSI vector enable 146" "Disabled,Enabled" bitfld.long 0x10 17. " [145] ,MSI vector enable 145" "Disabled,Enabled" bitfld.long 0x10 16. " [144] ,MSI vector enable 144" "Disabled,Enabled" bitfld.long 0x10 15. " [143] ,MSI vector enable 143" "Disabled,Enabled" bitfld.long 0x10 14. " [142] ,MSI vector enable 142" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " [141] ,MSI vector enable 141" "Disabled,Enabled" bitfld.long 0x10 12. " [140] ,MSI vector enable 140" "Disabled,Enabled" bitfld.long 0x10 11. " [139] ,MSI vector enable 139" "Disabled,Enabled" bitfld.long 0x10 10. " [138] ,MSI vector enable 138" "Disabled,Enabled" bitfld.long 0x10 9. " [137] ,MSI vector enable 137" "Disabled,Enabled" bitfld.long 0x10 8. " [136] ,MSI vector enable 136" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " [135] ,MSI vector enable 135" "Disabled,Enabled" bitfld.long 0x10 6. " [134] ,MSI vector enable 134" "Disabled,Enabled" bitfld.long 0x10 5. " [133] ,MSI vector enable 133" "Disabled,Enabled" bitfld.long 0x10 4. " [132] ,MSI vector enable 132" "Disabled,Enabled" bitfld.long 0x10 3. " [131] ,MSI vector enable 131" "Disabled,Enabled" bitfld.long 0x10 2. " [130] ,MSI vector enable 130" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " [129] ,MSI vector enable 129" "Disabled,Enabled" bitfld.long 0x10 0. " [128] ,MSI vector enable 128" "Disabled,Enabled" line.long 0x14 "MSI_EN_VEC5_0,XUSB_DEV MSI Vector Enable Register 5" bitfld.long 0x14 31. " MSI_ENABLE_VECTOR[191] ,MSI vector enable 191" "Disabled,Enabled" bitfld.long 0x14 30. " [190] ,MSI vector enable 190" "Disabled,Enabled" bitfld.long 0x14 29. " [189] ,MSI vector enable 189" "Disabled,Enabled" bitfld.long 0x14 28. " [188] ,MSI vector enable 188" "Disabled,Enabled" bitfld.long 0x14 27. " [187] ,MSI vector enable 187" "Disabled,Enabled" bitfld.long 0x14 26. " [186] ,MSI vector enable 186" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " [185] ,MSI vector enable 185" "Disabled,Enabled" bitfld.long 0x14 24. " [184] ,MSI vector enable 184" "Disabled,Enabled" bitfld.long 0x14 23. " [183] ,MSI vector enable 183" "Disabled,Enabled" bitfld.long 0x14 22. " [182] ,MSI vector enable 182" "Disabled,Enabled" bitfld.long 0x14 21. " [181] ,MSI vector enable 181" "Disabled,Enabled" bitfld.long 0x14 20. " [180] ,MSI vector enable 180" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " [179] ,MSI vector enable 179" "Disabled,Enabled" bitfld.long 0x14 18. " [178] ,MSI vector enable 178" "Disabled,Enabled" bitfld.long 0x14 17. " [177] ,MSI vector enable 177" "Disabled,Enabled" bitfld.long 0x14 16. " [176] ,MSI vector enable 176" "Disabled,Enabled" bitfld.long 0x14 15. " [175] ,MSI vector enable 175" "Disabled,Enabled" bitfld.long 0x14 14. " [174] ,MSI vector enable 174" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " [173] ,MSI vector enable 173" "Disabled,Enabled" bitfld.long 0x14 12. " [172] ,MSI vector enable 172" "Disabled,Enabled" bitfld.long 0x14 11. " [171] ,MSI vector enable 171" "Disabled,Enabled" bitfld.long 0x14 10. " [170] ,MSI vector enable 170" "Disabled,Enabled" bitfld.long 0x14 9. " [169] ,MSI vector enable 169" "Disabled,Enabled" bitfld.long 0x14 8. " [168] ,MSI vector enable 168" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " [167] ,MSI vector enable 167" "Disabled,Enabled" bitfld.long 0x14 6. " [166] ,MSI vector enable 166" "Disabled,Enabled" bitfld.long 0x14 5. " [165] ,MSI vector enable 165" "Disabled,Enabled" bitfld.long 0x14 4. " [164] ,MSI vector enable 164" "Disabled,Enabled" bitfld.long 0x14 3. " [163] ,MSI vector enable 163" "Disabled,Enabled" bitfld.long 0x14 2. " [162] ,MSI vector enable 162" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " [161] ,MSI vector enable 161" "Disabled,Enabled" bitfld.long 0x14 0. " [160] ,MSI vector enable 160" "Disabled,Enabled" line.long 0x18 "MSI_EN_VEC6_0,XUSB_DEV MSI Vector Enable Register 6" bitfld.long 0x18 31. " MSI_ENABLE_VECTOR[223] ,MSI vector enable 223" "Disabled,Enabled" bitfld.long 0x18 30. " [222] ,MSI vector enable 222" "Disabled,Enabled" bitfld.long 0x18 29. " [221] ,MSI vector enable 221" "Disabled,Enabled" bitfld.long 0x18 28. " [220] ,MSI vector enable 220" "Disabled,Enabled" bitfld.long 0x18 27. " [219] ,MSI vector enable 219" "Disabled,Enabled" bitfld.long 0x18 26. " [218] ,MSI vector enable 218" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " [217] ,MSI vector enable 217" "Disabled,Enabled" bitfld.long 0x18 24. " [216] ,MSI vector enable 216" "Disabled,Enabled" bitfld.long 0x18 23. " [215] ,MSI vector enable 215" "Disabled,Enabled" bitfld.long 0x18 22. " [214] ,MSI vector enable 214" "Disabled,Enabled" bitfld.long 0x18 21. " [213] ,MSI vector enable 213" "Disabled,Enabled" bitfld.long 0x18 20. " [212] ,MSI vector enable 212" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " [211] ,MSI vector enable 211" "Disabled,Enabled" bitfld.long 0x18 18. " [210] ,MSI vector enable 210" "Disabled,Enabled" bitfld.long 0x18 17. " [209] ,MSI vector enable 209" "Disabled,Enabled" bitfld.long 0x18 16. " [208] ,MSI vector enable 208" "Disabled,Enabled" bitfld.long 0x18 15. " [207] ,MSI vector enable 207" "Disabled,Enabled" bitfld.long 0x18 14. " [206] ,MSI vector enable 206" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " [205] ,MSI vector enable 205" "Disabled,Enabled" bitfld.long 0x18 12. " [204] ,MSI vector enable 204" "Disabled,Enabled" bitfld.long 0x18 11. " [203] ,MSI vector enable 203" "Disabled,Enabled" bitfld.long 0x18 10. " [202] ,MSI vector enable 202" "Disabled,Enabled" bitfld.long 0x18 9. " [201] ,MSI vector enable 201" "Disabled,Enabled" bitfld.long 0x18 8. " [200] ,MSI vector enable 200" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " [199] ,MSI vector enable 199" "Disabled,Enabled" bitfld.long 0x18 6. " [198] ,MSI vector enable 198" "Disabled,Enabled" bitfld.long 0x18 5. " [197] ,MSI vector enable 197" "Disabled,Enabled" bitfld.long 0x18 4. " [196] ,MSI vector enable 196" "Disabled,Enabled" bitfld.long 0x18 3. " [195] ,MSI vector enable 195" "Disabled,Enabled" bitfld.long 0x18 2. " [194] ,MSI vector enable 194" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " [193] ,MSI vector enable 193" "Disabled,Enabled" bitfld.long 0x18 0. " [192] ,MSI vector enable 192" "Disabled,Enabled" line.long 0x1C "MSI_EN_VEC7_0,XUSB_DEV MSI Vector Enable Register 7" bitfld.long 0x1C 31. " MSI_ENABLE_VECTOR[255] ,MSI vector enable 255" "Disabled,Enabled" bitfld.long 0x1C 30. " [254] ,MSI vector enable 254" "Disabled,Enabled" bitfld.long 0x1C 29. " [253] ,MSI vector enable 253" "Disabled,Enabled" bitfld.long 0x1C 28. " [252] ,MSI vector enable 252" "Disabled,Enabled" bitfld.long 0x1C 27. " [251] ,MSI vector enable 251" "Disabled,Enabled" bitfld.long 0x1C 26. " [250] ,MSI vector enable 250" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " [249] ,MSI vector enable 249" "Disabled,Enabled" bitfld.long 0x1C 24. " [248] ,MSI vector enable 248" "Disabled,Enabled" bitfld.long 0x1C 23. " [247] ,MSI vector enable 247" "Disabled,Enabled" bitfld.long 0x1C 22. " [246] ,MSI vector enable 246" "Disabled,Enabled" bitfld.long 0x1C 21. " [245] ,MSI vector enable 245" "Disabled,Enabled" bitfld.long 0x1C 20. " [244] ,MSI vector enable 244" "Disabled,Enabled" textline " " bitfld.long 0x1C 19. " [243] ,MSI vector enable 243" "Disabled,Enabled" bitfld.long 0x1C 18. " [242] ,MSI vector enable 242" "Disabled,Enabled" bitfld.long 0x1C 17. " [241] ,MSI vector enable 241" "Disabled,Enabled" bitfld.long 0x1C 16. " [240] ,MSI vector enable 240" "Disabled,Enabled" bitfld.long 0x1C 15. " [239] ,MSI vector enable 239" "Disabled,Enabled" bitfld.long 0x1C 14. " [238] ,MSI vector enable 238" "Disabled,Enabled" textline " " bitfld.long 0x1C 13. " [237] ,MSI vector enable 237" "Disabled,Enabled" bitfld.long 0x1C 12. " [236] ,MSI vector enable 236" "Disabled,Enabled" bitfld.long 0x1C 11. " [235] ,MSI vector enable 235" "Disabled,Enabled" bitfld.long 0x1C 10. " [234] ,MSI vector enable 234" "Disabled,Enabled" bitfld.long 0x1C 9. " [233] ,MSI vector enable 233" "Disabled,Enabled" bitfld.long 0x1C 8. " [232] ,MSI vector enable 232" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " [231] ,MSI vector enable 231" "Disabled,Enabled" bitfld.long 0x1C 6. " [230] ,MSI vector enable 230" "Disabled,Enabled" bitfld.long 0x1C 5. " [229] ,MSI vector enable 229" "Disabled,Enabled" bitfld.long 0x1C 4. " [228] ,MSI vector enable 228" "Disabled,Enabled" bitfld.long 0x1C 3. " [227] ,MSI vector enable 227" "Disabled,Enabled" bitfld.long 0x1C 2. " [226] ,MSI vector enable 226" "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " [225] ,MSI vector enable 225" "Disabled,Enabled" bitfld.long 0x1C 0. " [224] ,MSI vector enable 224" "Disabled,Enabled" width 0x0B tree.end width 20. tree "Configuration registers" group.long 0x180++0x1F line.long 0x00 "CONFIGURATION_0,Configuration" bitfld.long 0x00 31. " CLKEN_OVERRIDE ,Override the clock enable in case of a malfunction" "Disabled,Enabled" sif cpuis("TEGRAX1") bitfld.long 0x00 19. " PW_NO_DEVSEL_ERR_CYA ,Disable detection of DECERR due to no DEVSEL" "No,Yes" else bitfld.long 0x00 19. " PW_NO_DEVSEL_ERR_CYA ,Disable detection of DECERR due to no DEVSEL" "No,Yes" endif textline " " rbitfld.long 0x00 18. " INITIATOR_READ_IDLE ,AFI upstream read status" "Busy,Idle" rbitfld.long 0x00 17. " INITIATOR_WRITE_IDLE ,AFI upstream write status" "Busy,Idle" textline " " bitfld.long 0x00 15. " WDATA_LEAD_CYA ,Enable the handling of write data ahead of requests on IPFS AXI" "Disabled,Enabled" bitfld.long 0x00 14. " WR_INTRLV_CYA ,Disable the handling of interleaved write requests on IPFS AXI" "Disabled,Enabled" textline " " rbitfld.long 0x00 11. " TARGET_READ_IDLE ,IPFS target read status" "Busy,Idle" rbitfld.long 0x00 10. " TARGET_WRITE_IDLE ,IPFS target write status" "Busy,Idle" textline " " rbitfld.long 0x00 9. " MSI_VEC_EMPTY ,MSI Vector registers status" "No empty,Empty" bitfld.long 0x00 7. " UFPCI_MSIAW ,MSI After Write ordering rule" "Default behavior (MSIAW ordering),Interrupt whenever MSI is ready" textline " " bitfld.long 0x00 6. " UFPCI_PWPASSPW ,Send input to the upstream FPCI" "Whenever write is ready,Only when PW has retired" bitfld.long 0x00 5. " UFPCI_PASSPW ,Allows the upstream FPCI reads to pass writes" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " UFPCI_PWPASSNPW ,Allows the upstream FPCI PWs to pass NPW" "Not allowed,Allowed" bitfld.long 0x00 3. " DFPCI_PWPASSNPW ,Allows the downstream FPCI PWs to pass NPW" "Not allowed,Allowed" textline " " bitfld.long 0x00 2. " DFPCI_RSPPASSPW ,Allows the downstream FPCI responses to pass writes" "Not allowed,Allowed" bitfld.long 0x00 1. " DFPCI_PASSPW ,Allow the downstream FPCI reads to pass writes" "Not allowed,Allowed" textline " " bitfld.long 0x00 0. " EN_FPCI ,Enable FPCI" "Disabled,Enabled" line.long 0x04 "FPCI_ERROR_MASKS_0,XUSB_DEVFPCI Error Masks" bitfld.long 0x04 2. " MASK_FPCI_MASTER_ABORT ,Allows an FPCI error response indicates a Master Abort" "Return AXI OK,Forward error" bitfld.long 0x04 1. " MASK_FPCI_DATA_ERROR ,Allows an FPCI error response indicates a Data Error" "Return AXI OK,Forward error" bitfld.long 0x04 0. " MASK_FPCI_TARGET_ABORT ,Allows an FPCI error response indicates a Target Abort" "Return AXI OK,Forward error" line.long 0x08 "INTR_MASK_0,Interrupt Masks" bitfld.long 0x08 16. " IP_INT_MASK ,IP interrupt to the CPU complex gated by the mask" "0,1" bitfld.long 0x08 8. " MSI_MASK ,MSI to the CPU complex gated by the mask" "0,1" bitfld.long 0x08 0. " INT_MASK ,Interrupt to the CPU complex gated by the mask" "0,1" line.long 0x0C "INTR_CODE_0,Interrupt Control" bitfld.long 0x0C 0.--4. " INT_CODE ,Eight interrupt codes" "CLEAR,INI_SLVERR,INI_DECERR,TGT_SLVERR,TGT_DECERR,TGT_WRERR,,DFPCI_DECERR,AXI_DECERR,TIMEOUT,,,,,,SM_FATAL_ERROR,SM_NON_FATAL_ERROR,?..." line.long 0x10 "INTR_SIGNATURE_0,Interrupt Signature" hexmask.long 0x10 2.--31. 0x4 " INT_INFO ,Interrupt info (Address bits for interrupt codes)" bitfld.long 0x10 0. " DIR ,Direction of the AXI/FPCI transaction" "Write,Read" line.long 0x14 "UPPER_FPCI_ADDR_0,Upper FPCI Address" hexmask.long.byte 0x14 0.--7. 0x01 " INT_INFO_UPPER ,Upper byte of the captured FPCI address (for interrupt code: 3, 4 or 7)" line.long 0x18 "IPFS_INTR_ENABLE_0,IPFS Interrupt Enable" bitfld.long 0x18 13. " EN_SM_NON_FATAL_ERROR ,Enable bit for interrupt code 15" "Disabled,Enabled" bitfld.long 0x18 12. " EN_SM_FATAL_ERROR ,Enable bit for interrupt code 14" "Disabled,Enabled" bitfld.long 0x18 7. " EN_FPCI_TIMEOUT ,Enable bit for interrupt code 9" "Disabled,Enabled" textline " " bitfld.long 0x18 6. " EN_AXI_DECERR ,Enable bit for interrupt code 8" "Disabled,Enabled" bitfld.long 0x18 5. " EN_DFPCI_DECERR ,Enable bit for interrupt code 7" "Disabled,Enabled" bitfld.long 0x18 4. " EN_TGT_WRERR ,Enable bit for interrupt code 5" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " EN_TGT_DECERR ,Enable bit for interrupt code 4" "Disabled,Enabled" bitfld.long 0x18 2. " EN_TGT_SLVERR ,Enable bit for interrupt code 3" "Disabled,Enabled" bitfld.long 0x18 1. " EN_INI_DECERR ,Enable bit for interrupt code 2" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " EN_INI_SLVERR ,Enable bit for interrupt code 1" "Disabled,Enabled" line.long 0x1C "UFPCI_CONFIG_0,Upstream FPCI Configuration" bitfld.long 0x1C 0.--4. " UNITID_T0C0 ,Upstream FPCI Unit ID for controller 0. HyperTransport (Upstream FPCI request)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x1A0++0x0B line.long 0x00 "CFG_REVID_0,CFG_REVID Register" rbitfld.long 0x00 19. " DEV2SM_NONISO_REQUEST_PEND ,There is a non-ISO request pending" "Not pending,Pending" rbitfld.long 0x00 18. " DEV2SM_ISO_REQUEST_PEND ,There is an ISO request pending" "Not pending,Pending" bitfld.long 0x00 12.--13. " STRAP_CPU_MODE ,MCP: Mode to send MSI" "NB_INTEL,NB_AMD,AMD,TMTA" textline " " bitfld.long 0x00 11. " CFG_REVID_WRITE_ENABLE ,Enable to override the rev ID" "Clear,Set" bitfld.long 0x00 10. " CFG_REVID_OVERRIDE ,Provides a way to override the current revision ID" "Disabled,Enabled" rbitfld.long 0x00 4. " DEV2LEG_NONCOH_REQUEST_PEND ,Tells the leg block that a non-coherent request is pending" "Not pending,Pending" textline " " rbitfld.long 0x00 3. " DEV2LEG_COH_REQUEST_PEND ,Tells the leg block that a coherent request is pending" "Not pending,Pending" bitfld.long 0x00 2. " SM2DEV_FPCI_TIMEOUT_EN ,FPCI timeout enable bit for Controller" "Disabled,Enabled" line.long 0x04 "FPCI_TIMEOUT_0,FPCI_TIMEOUT Register" hexmask.long.tbyte 0x04 0.--19. 1. " SM2ALL_FPCI_TIMEOUT_THRESH ,Timeout threshold value for the FPCI bus" line.long 0x08 "TOM_0,Top Of Memory Limit" hexmask.long.word 0x08 16.--29. 1. " LEG2ALL_TOM2 ,Top of Memory Limit 2" hexmask.long.word 0x08 0.--11. 1. " LEG2ALL_TOM1 ,Top of Memory Limit 1" textline " " width 33. rgroup.long 0x1AC++0x0B line.long 0x00 "INITIATOR_ISO_PW_RESP_PENDING_0,Initiator ISO PW Response Pending" hexmask.long.byte 0x00 0.--7. 1. " NUM_INITIATOR_ISO_PW_RESP_PEND ,Number of pending initiator ISO PW responses" line.long 0x04 "INITIATOR_NISO_PW_RESP_PENDING_0,Initiator Non-ISO PW Response Pending" hexmask.long.byte 0x04 0.--7. 1. " NUM_INITIATOR_NISO_PW_RESP_PEND ,Number of pending initiator NISO PW responses" line.long 0x08 "INTR_STATUS_0,IPFS Interrupt Status" bitfld.long 0x08 2. " IP_INTR_STATUS ,Status of IP interrupt" "No interrupt,Interrupt" bitfld.long 0x08 1. " MSI_INTR_STATUS ,Status of MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x08 0. " IPFS_INTR_STATUS ,Status of IPFS interrupt" "No interrupt,Interrupt" textline " " width 22. group.long 0x1B8++0x07 line.long 0x00 "DFPCI_BEN_0,Downstream FPCI Byte Enables" bitfld.long 0x00 31. " EN_DFPCI_BEN ,Enable bit for BEN" "Disabled,Enabled" bitfld.long 0x00 0.--3. " DFPCI_BYTE_ENABLE_N ,Active low byte enables" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CLKGATE_HYSTERESIS_0,CLKGATE HYSTERESIS 0" hexmask.long.byte 0x04 0.--7. 1. " CLK_DISABLE_CNT ,Number of IPFS clock cycles to wait after clock gating criteria is met to disable IPFS/FPCI clocks" sif !cpuis("TEGRAX2") group.long 0x1DC++0x03 line.long 0x00 "MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control Register" bitfld.long 0x00 20. " RCLK_OVR_MODE ,RCLK OVR MODE" "Legacy,On" bitfld.long 0x00 19. " WCLK_OVR_MODE ,RCLK OVR MODE" "Legacy,On" bitfld.long 0x00 18. " CCLK_OVERRIDE ,CCLK OVERRIDE" "No override,Override" textline " " bitfld.long 0x00 17. " RCLK_OVERRIDE ,RCLK OVERRIDE" "No override,Override" bitfld.long 0x00 16. " WCLK_OVERRIDE ,WCLK OVERRIDE" "No override,Override" bitfld.long 0x00 3. " MCCIF_RDCL_RDFAST ,MCCIF RDCL RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MCCIF_WRMC_CLLE2X ,MCCIF WRMC CLLE2X" "Disabled,Enabled" bitfld.long 0x00 1. " MCCIF_RDMC_RDFAST ,MCCIF RDMC RDFAST" "Disabled,Enabled" bitfld.long 0x00 0. " MCCIF_WRCL_MCLE2X ,MCCIF WRCL MCLE2X" "Disabled,Enabled" endif textline " " width 18. group.long 0x1E0++0x0B line.long 0x00 "ORDERING_RULES_0,ORDERING RULES" sif cpuis("TEGRAX1") bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Tegra X1,Tegra 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Tegra X1,Tegra 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Tegra X1,Tegra 3" elif cpuis("TEGRAX2") bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Parker,Parker 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Parker,Parker 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Parker,Parker 3" else bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Tegra K1,Tegra 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Tegra K1,Tegra 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Tegra K1,Tegra 3" endif line.long 0x04 "A2F_UFPCI_CFG0_0,A2F UFPCI CFG0" hexmask.long.byte 0x04 24.--31. 1. " STATIC_WAIT_IDLE_CNTR ,Static wait idle control" bitfld.long 0x04 16.--18. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI1 ,Static UFPCI UFA starve Control PRI1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--15. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI0 ,Static UFPCI UFA starve control PRI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 10.--11. " STATIC_UFPCI_RR_BURST_SZ_PRI1 ,Static UFPCI RR burst SZ PRI1" "0,1,2,3" bitfld.long 0x04 8.--9. " STATIC_UFPCI_RR_BURST_SZ_PRI0 ,Static UFPCI RR burst SZ PRI0" "0,1,2,3" bitfld.long 0x04 7. " STATIC_WAIT_CLAMP_EN ,Static wait clamp enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " STATIC_UFPCI_UFA_DYN_BLOCK_EN ,Static UFPCI UFA DYN block enable" "Disabled,Enabled" bitfld.long 0x04 5. " STATIC_UFPCI_UFA_BLK_COHERENT ,Static UFPCI UFA BLK coherent" "No coherent,Coherent" bitfld.long 0x04 2.--4. " STATIC_UFPCI_BLOCK_CMD_THRESHOLD ,Static UFPCI block CMD threshold" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 1. " STATIC_CYA_UFA_ARB ,Static CYA UFA ARB" "0,1" bitfld.long 0x04 0. " STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK ,Static CYA back to back upstream block" "0,1" line.long 0x08 "A2F_UFPCI_CFG1_0,A2F UFPCI CFG1" hexmask.long.byte 0x08 0.--7. 1. " STATIC_WAIT_UNCLAMP_CNTR ,Static wait unclamp control" tree.end width 0x0B tree.end tree "Device PCI Config Registers" base ad:0x700D8000 width 8. tree "XUSB PCI Config Registers" rgroup.long 0x00++0x03 line.long 0x00 "CFG_0,XUSB Configuration Register 0" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID_UNIT ,DEVICE ID UNIT" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,VENDOR ID" group.long 0x04++0x03 line.long 0x00 "CFG_1,XUSB Configuration Register 1" rbitfld.long 0x00 31. " DETECTED_PERR ,T_XUSB_CFG_1 DETECTED PERR" "Not active,Active" rbitfld.long 0x00 30. " SIGNALED_SERR ,T_XUSB_CFG_1 SIGNALED SERR" "Not active,Active" rbitfld.long 0x00 29. " RECEIVED_MASTER ,T_XUSB_CFG_1 RECEIVED MASTER" "Not aborted,Aborted" rbitfld.long 0x00 28. " RECEIVED_TARGET ,T_XUSB_CFG_1 RECEIVED TARGET" "Not aborted,Aborted" textline " " rbitfld.long 0x00 27. " SIGNALED_TARGET ,T_XUSB_CFG_1 SIGNALED TARGET" "Not aborted,Aborted" rbitfld.long 0x00 25.--26. " DEVSEL_TIMING ,T_XUSB_CFG_1 DEVSEL TIMING" "Fast,Medium,Slow,?..." rbitfld.long 0x00 24. " MASTER_DATA_PERR ,T_XUSB_CFG_1 MASTER DATA PERR" "Inactive,Active" rbitfld.long 0x00 23. " FAST_BACK2BACK ,T_XUSB_CFG_1 FAST BACK2BACK" "Incapable,Capable" textline " " rbitfld.long 0x00 21. " 66MHZ ,T_XUSB_CFG_1 66MHZ" "Incapable,Capable" rbitfld.long 0x00 20. " CAPLIST ,T_XUSB_CFG_1 CAPLIST" "Not present,Present" rbitfld.long 0x00 19. " INTR_STATUS ,T_XUSB_CFG_1 INTR STATUS" "0,1" bitfld.long 0x00 10. " INTR_DISABLE ,T_XUSB_CFG_1 INTR DISABLE" "On,Off" textline " " rbitfld.long 0x00 9. " BACK2BACK ,T_XUSB_CFG_1 BACK2BACK" "Disabled,Enabled" rbitfld.long 0x00 8. " SERR ,T_XUSB_CFG_1 SERR" "Disabled,Enabled" rbitfld.long 0x00 7. " STEP ,T_XUSB_CFG_1 STEP" "Disabled,Enabled" rbitfld.long 0x00 6. " PERR ,T_XUSB_CFG_1 PERR" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " PALETTE_SNOOP ,T_XUSB_CFG_1 PALETTE SNOOP" "Disabled,Enabled" rbitfld.long 0x00 4. " WRITE_AND_INVAL ,T_XUSB_CFG_1 WRITE AND INVAL" "Disabled,Enabled" sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") textline " " rbitfld.long 0x00 3. " SPECIAL_CYCLE ,T_XUSB_CFG_1 SPECIAL CYCLE" "Disabled,Enabled" else textline " " bitfld.long 0x00 3. " SPECIAL_CYCLE ,T_XUSB_CFG_1 SPECIAL CYCLE" "Disabled,Enabled" endif textline " " bitfld.long 0x00 2. " BUS_MASTER ,T_XUSB_CFG_1 BUS MASTER" "Disabled,Enabled" bitfld.long 0x00 1. " MEMORY_SPACE ,T_XUSB_CFG_1 MEMORY SPACE" "Disabled,Enabled" bitfld.long 0x00 0. " IO_SPACE ,T_XUSB_CFG_1 IO SPACE" "Disabled,Enabled" rgroup.long 0x08++0x07 line.long 0x00 "CFG_2,PCI Revision ID And Class Code Register 2" hexmask.long.byte 0x00 24.--31. 1. " BASE_CLASS ,T_XUSB_CFG_2 BASE CLASS" hexmask.long.byte 0x00 16.--23. 1. " SUB_CLASS ,T_XUSB_CFG 2 SUB CLASS" hexmask.long.byte 0x00 8.--15. 1. " PROG_IF ,T_XUSB_CFG 2 PROG IF" hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,T_XUSB_CFG_2 REVISION ID" line.long 0x04 "CFG_3,PCI Configuration Register 3" bitfld.long 0x04 23. " HEADER_TYPE_FUNC ,Identify whenever device contains single or multiple functions" "Single,Multi" hexmask.long.byte 0x04 16.--22. 1. " HEADER_TYPE_DEVICE ,Header type - identify the layout of the bytes (0x10--0x3f) in configuration space" bitfld.long 0x04 11.--15. " LATENCY_TIMER ,The value of the latency timer for this PCI bus master (In units of PCI bus clocks)" "0 clocks,8 clocks,16 clocks,24 clocks,32 clocks,40 clocks,48 clocks,56 clocks,64 clocks,72 clocks,80 clocks,88 clocks,96 clocks,104 clocks,112 clocks,120 clocks,128 clocks,136 clocks,144 clocks,152 clocks,160 clocks,168 clocks,176 clocks,184 clocks,192 clocks,200 clocks,208 clocks,216 clocks,224 clocks,232 clocks,240 clocks,248 clocks" hexmask.long.byte 0x04 0.--7. 1. " CACHE_LINE_SIZE ,T_XUSB_CFG_3 CACHE LINE SIZE" group.long 0x10++0x07 line.long 0x00 "CFG_4,PCI Configuration Register 4" hexmask.long.tbyte 0x00 15.--31. 0x80 " BASE_ADDRESS ,Base address of the device" hexmask.long.word 0x00 4.--14. 1. " BAR_SIZE_32KB ,T_XUSB_CFG_4 BAR SIZE 32KB" rbitfld.long 0x00 3. " PREFETCHABLE ,T_XUSB_CFG_4 PREFETCHABLE" "Not prefetchable,Prefetchable" rbitfld.long 0x00 1.--2. " ADDRESS_TYPE ,The ADDRESS_TYPE bits contain the type of the base address" "32,,64,?..." textline " " rbitfld.long 0x00 0. " SPACE_TYPE ,The SPACE_TYPE bit indicates whether the register maps into memory or I/O space" "Memory,IO" line.long 0x04 "CFG_5,XUSB Configuration Register 5" rgroup.long 0x2C++0x03 line.long 0x00 "CFG_11,PCI Configuration Register 11" hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID ,T_XUSB_CFG_11 SUBSYSTEM ID" hexmask.long.word 0x00 0.--15. 1. " SUBSYSTEM_VENDOR_ID ,T_XUSB_CFG_11 SUBSYSTEM VENDOR ID" rgroup.long 0x34++0x03 line.long 0x00 "CFG_13,PCI Configuration Register 13" hexmask.long.byte 0x00 0.--7. 1. " CAP_PTR ,CAP pointer" group.long 0x3C++0x07 line.long 0x00 "CFG_15,PCI Configuration Register 15" hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT ,Maximum time the device requires to gain access to the CPI bus" hexmask.long.byte 0x00 16.--23. 1. " MIN_GNT ,Length of the burst period a device needs assuming a clock rate of 33 mhz" hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN ,Interrupt pin the device uses" hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Interrupt routing information" line.long 0x04 "CFG_16,PCI Configuration Register 16" hexmask.long.word 0x04 16.--31. 1. " SUBSYSTEM_ID ,SUBSYSTEM ID" hexmask.long.word 0x04 0.--15. 1. " SUBSYSTEM_VENDOR_ID ,SUBSYSTEM VENDOR ID" rgroup.long 0x44++0x03 line.long 0x00 "CFG_17,PCI Configuration Register 17" bitfld.long 0x00 31. " D3CPME_SUPPORT ,T_XUSB_CFG_17 D3CPME SUPPORT" "Not supported,Supported" bitfld.long 0x00 30. " D3HPME_SUPPORT ,T_XUSB_CFG_17 D3HPME SUPPORT" "Not supported,Supported" bitfld.long 0x00 29. " D2PME_SUPPORT ,T_XUSB_CFG_17 D2PME SUPPORT" "Not supported,Supported" bitfld.long 0x00 28. " D1PME_SUPPORT ,T_XUSB_CFG_17 D1PME SUPPORT" "Not supported,Supported" textline " " bitfld.long 0x00 27. " D0PME_SUPPORT ,T_XUSB_CFG_17 D0PME SUPPORT" "Not supported,Supported" bitfld.long 0x00 26. " D2_SUPPORT ,T_XUSB_CFG_17 D2 SUPPORT" "Not supported,Supported" bitfld.long 0x00 25. " D1_SUPPORT ,T_XUSB_CFG_17 D1 SUPPORT" "Not supported,Supported" bitfld.long 0x00 22.--24. " AUXCUR ,T_XUSB_CFG_17 AUXCUR" "Self,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA" textline " " bitfld.long 0x00 21. " DSI ,T_XUSB_CFG_17 DSI" "Not needed,Needed" bitfld.long 0x00 19. " PMECLK ,T_XUSB_CFG_17 PMECLK" "Not required,Required" bitfld.long 0x00 16.--18. " VER ,T_XUSB_CFG_17 VER" ",,,VER_1P2,?..." hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,T_XUSB_CFG_17 NEXT PTR" textline " " hexmask.long.byte 0x00 0.--7. 1. " CAP ,T_XUSB_CFG_17 CAP" group.long 0x48++0x03 line.long 0x00 "CFG_18,T_XUSB_CFG_18 PMCSR" eventfld.long 0x00 15. " PMCSR_PMESTATUS ,T_XUSB_CFG_18 PMCSR PMESTATUS" "Not pending,Pending" rbitfld.long 0x00 13.--14. " PMCSR_DSCALE ,T_XUSB_CFG_18 PMCSR DSCALE" "DSCALE_INIT,?..." rbitfld.long 0x00 9.--12. " PMCSR_DSEL ,T_XUSB_CFG_18 PMCSR DSEL" "DSEL_INIT,?..." bitfld.long 0x00 8. " PMCSR_PME ,T_XUSB_CFG_18 PMCSR PME" "Enabled,Disabled" textline " " rbitfld.long 0x00 3. " PMCSR_NSR ,T_XUSB_CFG_18 PMCSR NSR" "No reset,Reset" bitfld.long 0x00 0.--1. " PMCSR_PWRSTATE ,PMCSR_PWRSTATE" "D0,D1,D2,D3H" textline " " width 11. group.long 0xC0++0x0F line.long 0x00 "MSI_CTRL,MSI Message Control And Capability Register" rbitfld.long 0x00 24. " VECTOR_MASK_CAP ,MSI-per-vector masking support" "Not supported,Supported" rbitfld.long 0x00 23. " 64_ADDR_CAP ,Generating a 64-bit message address capability" "Not capable,Capable" bitfld.long 0x00 20.--22. " MULT_MSG_ENABLE ,System software writes to this field to indicate the number of allocated vectors" "1,2,4,8,16,32,?..." rbitfld.long 0x00 17.--19. " MULT_MSG_CAP ,Number of requested vectors" "1,2,4,8,16,32,?..." textline " " bitfld.long 0x00 16. " MSI_ENABLE ,Enables the MSI capability" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Next item in the capabilities list" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Capability block as the MSI capability block" line.long 0x04 "MSI_ADDR1,MSI Message Address Register" hexmask.long 0x04 2.--31. 0x04 " MSG_ADDR ,System-specified message address" line.long 0x08 "MSI_ADDR2,MSI Message Upper Address Register" line.long 0x0C "MSI_DATA,MSI Message Data Register" hexmask.long.word 0x0C 0.--15. 1. " MSG_DATA ,System-specified message data" sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2") group.long 0xD0++0x07 line.long 0x00 "MSI_MASK,MSI Message Data Register" bitfld.long 0x00 0. " BIT ,T_XUSB_MSI_MASK_BIT" "0,1" line.long 0x04 "MSI_PEND,MSI Pending Bits Register" hexmask.long.word 0x04 0.--15. 1. " BIT ,T_XUSB_MSI_PEND_BIT" endif tree.end width 0x0B tree.end tree "Device Controller Registers" base ad:0x700D0000 width 18. rgroup.long 0x00++0x03 line.long 0x00 "SPARAM,ID Register" bitfld.long 0x00 16.--20. " ERSTMAX ,Event ring segment table max" ",,SPARAM_ERSTMAX_VALUE,?..." wgroup.long 0x04++0x03 line.long 0x00 "DB,Doorbell Register" hexmask.long.word 0x00 16.--31. 1. " STREAMID ,Stream ID" hexmask.long.byte 0x00 8.--15. 1. " TARGET ,The target field represents the Endpoint ID to which the doorbell is targeted" group.long 0x08++0x03 line.long 0x00 "ERSTSZ,Event Ring Segment Table Size Register" hexmask.long.word 0x00 16.--31. 1. " ERST1SZ ,Event ring segment table 1 size" hexmask.long.word 0x00 0.--15. 1. " ERST0SZ ,Event ring segment table 0 size" group.long 0x10++0x37 line.long 0x00 "ERST0BALO,Event Ring Segment 0 Base Low Address Register" hexmask.long 0x00 4.--31. 0x10 " ADDRLO ,Low Address" line.long 0x04 "ERST0BAHI,Event Ring Segment 0 Base High Address Register" line.long 0x08 "ERST1BALO,Event Ring Segment 1 Base Low Address Register" hexmask.long 0x08 4.--31. 0x10 " ADDRLO ,Low Address" line.long 0x0C "ERST1BAHI,Event Ring Segment 1 Base High Address Register" line.long 0x10 "ERDPLO,Event Ring Dequeue Pointer Register" hexmask.long 0x10 4.--31. 0x10 " ADDRLO ,Low Address" eventfld.long 0x10 3. " EHB ,Event Ring Dequeue Pointer EHB" "Init,Clear" line.long 0x14 "ERDPHI,Event Ring Dequeue Pointer Register" line.long 0x18 "EREPLO,Event Ring Enqueue Pointer" hexmask.long 0x18 4.--31. 0x10 " ADDRLO ,Low Address" bitfld.long 0x18 1. " SEGI ,SEGI" "Init,Max" bitfld.long 0x18 0. " ECS ,ECS" "Init,?..." line.long 0x1C "EREPHI,Event Ring Enqueue Pointer" line.long 0x20 "CTRL,Control Register" bitfld.long 0x20 31. " ENABLE ,Enable Device Mode operation" "Disabled,Enabled" hexmask.long.byte 0x20 24.--30. 1. " DEVADR ,Address assigned to the device DUT" bitfld.long 0x20 7. " EWE ,Enable event for MFINDEX rollover from 3FFF to 0" "False,True" bitfld.long 0x20 6. " SMI_DSE ,Enable SMI interrupt for device system errors" "False,True" textline " " bitfld.long 0x20 5. " SMI_EVT ,Control SMI event" "False,True" bitfld.long 0x20 4. " IE ,Enable legacy/smi interrupt for pending events" "False,True" bitfld.long 0x20 1. " LSE ,Generate Event on PORTSC change" "Disabled,Enabled" bitfld.long 0x20 0. " RUN ,Device mode run/stop bit" "Stop,Run" line.long 0x24 "ST,Status Register" eventfld.long 0x24 5. " ST_DSE ,DSE interrupt status" "Pending,Clear" eventfld.long 0x24 4. " ST_IP ,IP interrupt status" "Pending,Clear" eventfld.long 0x24 0. " ST_RC ,RC interrupt status" "Pending,Clear" line.long 0x28 "RT_IMOD,T XUSB DEV XHCI RT IMOD" hexmask.long.word 0x28 16.--31. 1. " IMODC ,T XUSB DEV XHCI RT IMOD IMODC" hexmask.long.word 0x28 0.--15. 1. " IMODI ,T XUSB DEV XHCI RT IMOD IMODI" line.long 0x2C "PORTSC,T XUSB DEV XHCI PORTSC" rbitfld.long 0x2C 30. " WPR ,T XUSB DEV XHCI PORTSC WPR" "Not reset,Reset" eventfld.long 0x2C 23. " CEC ,T XUSB DEV XHCI PORTSC CEC" "Not pending,Pending" eventfld.long 0x2C 22. " PLC ,T XUSB DEV XHCI PORTSC PLC" "Not pending,Pending" textline " " eventfld.long 0x2C 21. " PRC ,T XUSB DEV XHCI PORTSC PRC" "Not pending,Pending" eventfld.long 0x2C 19. " WRC ,T XUSB DEV XHCI PORTSC WRC" "Not pending,Pending" eventfld.long 0x2C 17. " CSC ,T XUSB DEV XHCI PORTSC CSC" "Not pending,Pending" bitfld.long 0x2C 16. " LWS ,T XUSB DEV XHCI PORTSC LWS" "Init,Set" textline " " rbitfld.long 0x2C 10.--13. " PS ,T XUSB DEV XHCI PORTSC PS" "UNDEFINED,FS,LS,HS,SS,?..." rbitfld.long 0x2C 9. " LANE_POLARITY_VALUE ,Lane polarity value" "0,1" bitfld.long 0x2C 5.--8. " PLS ,T XUSB DEV XHCI PORTSC PLS" "U0,U1,U2,U3,DISABLED,RXDETECT,INACTIVE,POLLING,RECOVERY,HOTRESET,COMPLIANCE,LOOPBACK,,,,RESUME" rbitfld.long 0x2C 4. " PR ,T XUSB DEV XHCI PORTSC PR" "Not reset,Reset" textline " " bitfld.long 0x2C 3. " LANE_POLARITY_OVRD_VALUE ,T USB DEV XHCI PORTSC LANE POLARITY OVRD VALUE" "Init,?..." bitfld.long 0x2C 2. " LANE_POLARITY_OVRD ,T XUSB DEV XHCI PORTSC LANE POLARITY OVRD" "Init,?..." bitfld.long 0x2C 1. " PED ,T XUSB DEV XHCI PORTSC PED" "Disabled,Enabled" bitfld.long 0x2C 0. " CCS ,T XUSB DEV XHCI PORTSC CCS" "CS_NOCON,CCS_CON" line.long 0x30 "ECPLO,T XUSB DEV XHCI ECPLO" hexmask.long 0x30 6.--31. 0x40 " ADDRLO ,T XUSB DEV XHCI ECPLO ADDRLO" line.long 0x34 "ECPHI,T XUSB DEV XHCI ECPHI" rgroup.long 0x48++0x03 line.long 0x00 "MFINDEX,T XUSB DEV XHCI MFINDEX" hexmask.long.word 0x00 3.--13. 1. " FRAME ,T XUSB DEV XHCI MFINDEX FRAME" bitfld.long 0x00 0.--2. " UFRAME ,T XUSB DEV XHCI MFINDEX UFRAME" "0,1,2,3,4,5,6,7" group.long 0x4C++0x03 line.long 0x00 "PORTPM,Port PM Status And Control Register" bitfld.long 0x00 31. " PNG_CYA ,T XUSB DEV XHCI PORTPM PNG CYA" "Init,?..." bitfld.long 0x00 30. " FRWE ,T XUSB DEV XHCI PORTPM FRWE" "Init,?..." bitfld.long 0x00 29. " U2E ,T XUSB DEV XHCI PORTPM U2E" "Init,?..." bitfld.long 0x00 28. " U1E ,T XUSB DEV XHCI PORTPM U1E" "Init,?..." textline " " bitfld.long 0x00 27. " WOD ,T XUSB DEV XHCI PORTPM WOD" "Init,?..." bitfld.long 0x00 26. " WOC ,T XUSB DEV XHCI PORTPM WOC" "Init,?..." rbitfld.long 0x00 25. " VBA ,T XUSB DEV XHCI PORTPM VBA" "Init,?..." bitfld.long 0x00 24. " FLA ,T XUSB DEV XHCI PORTPM FLA" "Init,?..." textline " " hexmask.long.byte 0x00 16.--23. 1. " U1TIMEOUT ,T XUSB DEV XHCI PORTPM U1TIMEOUT" hexmask.long.byte 0x00 8.--15. 1. " U2TIMEOUT ,T XUSB DEV XHCI PORTPM U2TIMEOUT" bitfld.long 0x00 4.--7. " HIRD ,T XUSB DEV XHCI PORTPM HIRD" "Init,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " RWE ,T XUSB DEV XHCI PORTPM RWE" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " L1S ,T XUSB DEV XHCI PORTPM L1S" "DROP,ACCEPT,NYET,STALL" rgroup.long 0x50++0x0B line.long 0x00 "EP_HALT,T XUSB DEV XHCI EP HALT" bitfld.long 0x00 31. " EP_HALT_DCI[31] ,T XUSB DEV XHCI EP HALT DCI 31" "No,Yes" bitfld.long 0x00 30. " [30] ,T XUSB DEV XHCI EP HALT DCI 30" "No,Yes" bitfld.long 0x00 29. " [29] ,T XUSB DEV XHCI EP HALT DCI 29" "No,Yes" bitfld.long 0x00 28. " [28] ,T XUSB DEV XHCI EP HALT DCI 28" "No,Yes" textline " " bitfld.long 0x00 27. " [27] ,T XUSB DEV XHCI EP HALT DCI 27" "No,Yes" bitfld.long 0x00 26. " [26] ,T XUSB DEV XHCI EP HALT DCI 26" "No,Yes" bitfld.long 0x00 25. " [25] ,T XUSB DEV XHCI EP HALT DCI 25" "No,Yes" bitfld.long 0x00 24. " [24] ,T XUSB DEV XHCI EP HALT DCI 24" "No,Yes" textline " " bitfld.long 0x00 23. " [23] ,T XUSB DEV XHCI EP HALT DCI 23" "No,Yes" bitfld.long 0x00 22. " [22] ,T XUSB DEV XHCI EP HALT DCI 22" "No,Yes" bitfld.long 0x00 21. " [21] ,T XUSB DEV XHCI EP HALT DCI 21" "No,Yes" bitfld.long 0x00 20. " [20] ,T XUSB DEV XHCI EP HALT DCI 20" "No,Yes" textline " " bitfld.long 0x00 19. " [19] ,T XUSB DEV XHCI EP HALT DCI 19" "No,Yes" bitfld.long 0x00 18. " [18] ,T XUSB DEV XHCI EP HALT DCI 18" "No,Yes" bitfld.long 0x00 17. " [17] ,T XUSB DEV XHCI EP HALT DCI 17" "No,Yes" bitfld.long 0x00 16. " [16] ,T XUSB DEV XHCI EP HALT DCI 16" "No,Yes" textline " " bitfld.long 0x00 15. " [15] ,T XUSB DEV XHCI EP HALT DCI 15" "No,Yes" bitfld.long 0x00 14. " [14] ,T XUSB DEV XHCI EP HALT DCI 14" "No,Yes" bitfld.long 0x00 13. " [13] ,T XUSB DEV XHCI EP HALT DCI 13" "No,Yes" bitfld.long 0x00 12. " [12] ,T XUSB DEV XHCI EP HALT DCI 12" "No,Yes" textline " " bitfld.long 0x00 11. " [11] ,T XUSB DEV XHCI EP HALT DCI 11" "No,Yes" bitfld.long 0x00 10. " [10] ,T XUSB DEV XHCI EP HALT DCI 10" "No,Yes" bitfld.long 0x00 9. " [9] ,T XUSB DEV XHCI EP HALT DCI 9" "No,Yes" bitfld.long 0x00 8. " [8] ,T XUSB DEV XHCI EP HALT DCI 8" "No,Yes" textline " " bitfld.long 0x00 7. " [7] ,T XUSB DEV XHCI EP HALT DCI 7" "No,Yes" bitfld.long 0x00 6. " [6] ,T XUSB DEV XHCI EP HALT DCI 6" "No,Yes" bitfld.long 0x00 5. " [5] ,T XUSB DEV XHCI EP HALT DCI 5" "No,Yes" bitfld.long 0x00 4. " [4] ,T XUSB DEV XHCI EP HALT DCI 4" "No,Yes" textline " " bitfld.long 0x00 3. " [3] ,T XUSB DEV XHCI EP HALT DCI 3" "No,Yes" bitfld.long 0x00 2. " [2] ,T XUSB DEV XHCI EP HALT DCI 2" "No,Yes" bitfld.long 0x00 1. " [1] ,T XUSB DEV XHCI EP HALT DCI 1" "No,Yes" bitfld.long 0x00 0. " [0] ,T XUSB DEV XHCI EP HALT DCI 0" "No,Yes" line.long 0x04 "EP_PAUSE,T XUSB DEV XHCI EP PAUSE" bitfld.long 0x04 31. " EP_PAUSE_DCI[31] ,T XUSB DEV XHCI EP PAUSE DCI 31" "No,Yes" bitfld.long 0x04 30. " [30] ,T XUSB DEV XHCI EP PAUSE DCI 30" "No,Yes" bitfld.long 0x04 29. " [29] ,T XUSB DEV XHCI EP PAUSE DCI 29" "No,Yes" bitfld.long 0x04 28. " [28] ,T XUSB DEV XHCI EP PAUSE DCI 28" "No,Yes" textline " " bitfld.long 0x04 27. " [27] ,T XUSB DEV XHCI EP PAUSE DCI 27" "No,Yes" bitfld.long 0x04 26. " [26] ,T XUSB DEV XHCI EP PAUSE DCI 26" "No,Yes" bitfld.long 0x04 25. " [25] ,T XUSB DEV XHCI EP PAUSE DCI 25" "No,Yes" bitfld.long 0x04 24. " [24] ,T XUSB DEV XHCI EP PAUSE DCI 24" "No,Yes" textline " " bitfld.long 0x04 23. " [23] ,T XUSB DEV XHCI EP PAUSE DCI 23" "No,Yes" bitfld.long 0x04 22. " [22] ,T XUSB DEV XHCI EP PAUSE DCI 22" "No,Yes" bitfld.long 0x04 21. " [21] ,T XUSB DEV XHCI EP PAUSE DCI 21" "No,Yes" bitfld.long 0x04 20. " [20] ,T XUSB DEV XHCI EP PAUSE DCI 20" "No,Yes" textline " " bitfld.long 0x04 19. " [19] ,T XUSB DEV XHCI EP PAUSE DCI 19" "No,Yes" bitfld.long 0x04 18. " [18] ,T XUSB DEV XHCI EP PAUSE DCI 18" "No,Yes" bitfld.long 0x04 17. " [17] ,T XUSB DEV XHCI EP PAUSE DCI 17" "No,Yes" bitfld.long 0x04 16. " [16] ,T XUSB DEV XHCI EP PAUSE DCI 16" "No,Yes" textline " " bitfld.long 0x04 15. " [15] ,T XUSB DEV XHCI EP PAUSE DCI 15" "No,Yes" bitfld.long 0x04 14. " [14] ,T XUSB DEV XHCI EP PAUSE DCI 14" "No,Yes" bitfld.long 0x04 13. " [13] ,T XUSB DEV XHCI EP PAUSE DCI 13" "No,Yes" bitfld.long 0x04 12. " [12] ,T XUSB DEV XHCI EP PAUSE DCI 12" "No,Yes" textline " " bitfld.long 0x04 11. " [11] ,T XUSB DEV XHCI EP PAUSE DCI 11" "No,Yes" bitfld.long 0x04 10. " [10] ,T XUSB DEV XHCI EP PAUSE DCI 10" "No,Yes" bitfld.long 0x04 9. " [9] ,T XUSB DEV XHCI EP PAUSE DCI 9" "No,Yes" bitfld.long 0x04 8. " [8] ,T XUSB DEV XHCI EP PAUSE DCI 8" "No,Yes" textline " " bitfld.long 0x04 7. " [7] ,T XUSB DEV XHCI EP PAUSE DCI 7" "No,Yes" bitfld.long 0x04 6. " [6] ,T XUSB DEV XHCI EP PAUSE DCI 6" "No,Yes" bitfld.long 0x04 5. " [5] ,T XUSB DEV XHCI EP PAUSE DCI 5" "No,Yes" bitfld.long 0x04 4. " [4] ,T XUSB DEV XHCI EP PAUSE DCI 4" "No,Yes" textline " " bitfld.long 0x04 3. " [3] ,T XUSB DEV XHCI EP PAUSE DCI 3" "No,Yes" bitfld.long 0x04 2. " [2] ,T XUSB DEV XHCI EP PAUSE DCI 2" "No,Yes" bitfld.long 0x04 1. " [1] ,T XUSB DEV XHCI EP PAUSE DCI 1" "No,Yes" bitfld.long 0x04 0. " [0] ,T XUSB DEV XHCI EP PAUSE DCI 0" "No,Yes" line.long 0x08 "EP_RELOAD,T XUSB DEV XHCI EP RELOAD" bitfld.long 0x08 31. " EP_RELOAD[31] ,T XUSB DEV XHCI EP RELOAD 31" "No,Yes" bitfld.long 0x08 30. " [30] ,T XUSB DEV XHCI EP RELOAD 30" "No,Yes" bitfld.long 0x08 29. " [29] ,T XUSB DEV XHCI EP RELOAD 29" "No,Yes" bitfld.long 0x08 28. " [28] ,T XUSB DEV XHCI EP RELOAD 28" "No,Yes" textline " " bitfld.long 0x08 27. " [27] ,T XUSB DEV XHCI EP RELOAD 27" "No,Yes" bitfld.long 0x08 26. " [26] ,T XUSB DEV XHCI EP RELOAD 26" "No,Yes" bitfld.long 0x08 25. " [25] ,T XUSB DEV XHCI EP RELOAD 25" "No,Yes" bitfld.long 0x08 24. " [24] ,T XUSB DEV XHCI EP RELOAD 24" "No,Yes" textline " " bitfld.long 0x08 23. " [23] ,T XUSB DEV XHCI EP RELOAD 23" "No,Yes" bitfld.long 0x08 22. " [22] ,T XUSB DEV XHCI EP RELOAD 22" "No,Yes" bitfld.long 0x08 21. " [21] ,T XUSB DEV XHCI EP RELOAD 21" "No,Yes" bitfld.long 0x08 20. " [20] ,T XUSB DEV XHCI EP RELOAD 20" "No,Yes" textline " " bitfld.long 0x08 19. " [19] ,T XUSB DEV XHCI EP RELOAD 19" "No,Yes" bitfld.long 0x08 18. " [18] ,T XUSB DEV XHCI EP RELOAD 18" "No,Yes" bitfld.long 0x08 17. " [17] ,T XUSB DEV XHCI EP RELOAD 17" "No,Yes" bitfld.long 0x08 16. " [16] ,T XUSB DEV XHCI EP RELOAD 16" "No,Yes" textline " " bitfld.long 0x08 15. " [15] ,T XUSB DEV XHCI EP RELOAD 15" "No,Yes" bitfld.long 0x08 14. " [14] ,T XUSB DEV XHCI EP RELOAD 14" "No,Yes" bitfld.long 0x08 13. " [13] ,T XUSB DEV XHCI EP RELOAD 13" "No,Yes" bitfld.long 0x08 12. " [12] ,T XUSB DEV XHCI EP RELOAD 12" "No,Yes" textline " " bitfld.long 0x08 11. " [11] ,T XUSB DEV XHCI EP RELOAD 11" "No,Yes" bitfld.long 0x08 10. " [10] ,T XUSB DEV XHCI EP RELOAD 10" "No,Yes" bitfld.long 0x08 9. " [9] ,T XUSB DEV XHCI EP RELOAD 9" "No,Yes" bitfld.long 0x08 8. " [8] ,T XUSB DEV XHCI EP RELOAD 8" "No,Yes" textline " " bitfld.long 0x08 7. " [7] ,T XUSB DEV XHCI EP RELOAD 7" "No,Yes" bitfld.long 0x08 6. " [6] ,T XUSB DEV XHCI EP RELOAD 6" "No,Yes" bitfld.long 0x08 5. " [5] ,T XUSB DEV XHCI EP RELOAD 5" "No,Yes" bitfld.long 0x08 4. " [4] ,T XUSB DEV XHCI EP RELOAD 4" "No,Yes" textline " " bitfld.long 0x08 3. " [3] ,T XUSB DEV XHCI EP RELOAD 3" "No,Yes" bitfld.long 0x08 2. " [2] ,T XUSB DEV XHCI EP RELOAD 2" "No,Yes" bitfld.long 0x08 1. " [1] ,T XUSB DEV XHCI EP RELOAD 1" "No,Yes" bitfld.long 0x08 0. " [0] ,T XUSB DEV XHCI EP RELOAD 0" "No,Yes" group.long 0x5C++0x17 line.long 0x00 "EP_STCHG,T XUSB DEV XHCI EP STCHG" eventfld.long 0x00 31. " IN15 ,T XUSB DEV XHCI EP STCHG IN15" "No,Yes" eventfld.long 0x00 30. " OUT15 ,T XUSB DEV XHCI EP STCHG OUT15" "No,Yes" eventfld.long 0x00 29. " IN14 ,T XUSB DEV XHCI EP STCHG IN14" "No,Yes" eventfld.long 0x00 28. " OUT14 ,T XUSB DEV XHCI EP STCHG OUT14" "No,Yes" textline " " eventfld.long 0x00 27. " IN13 ,T XUSB DEV XHCI EP STCHG IN13" "No,Yes" eventfld.long 0x00 26. " OUT13 ,T XUSB DEV XHCI EP STCHG OUT13" "No,Yes" eventfld.long 0x00 25. " IN12 ,T XUSB DEV XHCI EP STCHG IN12" "No,Yes" eventfld.long 0x00 24. " OUT12 ,T XUSB DEV XHCI EP STCHG OUT12" "No,Yes" textline " " eventfld.long 0x00 23. " IN11 ,T XUSB DEV XHCI EP STCHG IN11" "No,Yes" eventfld.long 0x00 22. " OUT11 ,T XUSB DEV XHCI EP STCHG OUT11" "No,Yes" eventfld.long 0x00 21. " IN10 ,T XUSB DEV XHCI EP STCHG IN10" "No,Yes" eventfld.long 0x00 20. " OUT10 ,T XUSB DEV XHCI EP STCHG OUT10" "No,Yes" textline " " eventfld.long 0x00 19. " IN9 ,T XUSB DEV XHCI EP STCHG IN9" "No,Yes" eventfld.long 0x00 18. " OUT9 ,T XUSB DEV XHCI EP STCHG OUT9" "No,Yes" eventfld.long 0x00 17. " IN8 ,T XUSB DEV XHCI EP STCHG IN8" "No,Yes" eventfld.long 0x00 16. " OUT8 ,T XUSB DEV XHCI EP STCHG OUT8" "No,Yes" textline " " eventfld.long 0x00 15. " IN7 ,T XUSB DEV XHCI EP STCHG IN7" "No,Yes" eventfld.long 0x00 14. " OUT7 ,T XUSB DEV XHCI EP STCHG OUT7" "No,Yes" eventfld.long 0x00 13. " IN6 ,T XUSB DEV XHCI EP STCHG IN6" "No,Yes" eventfld.long 0x00 12. " OUT6 ,T XUSB DEV XHCI EP STCHG OUT6" "No,Yes" textline " " eventfld.long 0x00 11. " IN5 ,T XUSB DEV XHCI EP STCHG IN5" "No,Yes" eventfld.long 0x00 10. " OUT5 ,T XUSB DEV XHCI EP STCHG OUT5" "No,Yes" eventfld.long 0x00 9. " IN4 ,T XUSB DEV XHCI EP STCHG IN4" "No,Yes" eventfld.long 0x00 8. " OUT4 ,T XUSB DEV XHCI EP STCHG OUT4" "No,Yes" textline " " eventfld.long 0x00 7. " IN3 ,T XUSB DEV XHCI EP STCHG IN3" "No,Yes" eventfld.long 0x00 6. " OUT3 ,T XUSB DEV XHCI EP STCHG OUT3" "No,Yes" eventfld.long 0x00 5. " IN2 ,T XUSB DEV XHCI EP STCHG IN2" "No,Yes" eventfld.long 0x00 4. " OUT2 ,T XUSB DEV XHCI EP STCHG OUT2" "No,Yes" textline " " eventfld.long 0x00 3. " IN1 ,T XUSB DEV XHCI EP STCHG IN1" "No,Yes" eventfld.long 0x00 2. " OUT1 ,T XUSB DEV XHCI EP STCHG OUT1" "No,Yes" eventfld.long 0x00 1. " IN0 ,T XUSB DEV XHCI EP STCHG IN0" "No,Yes" eventfld.long 0x00 0. " OUT0 ,T XUSB DEV XHCI EP STCHG OUT0" "No,Yes" line.long 0x04 "FLOWCNTRL,Flow Control Threshold Values For HSFS NAK" hexmask.long.byte 0x04 16.--23. 1. " IDLE_MITS ,T XUSB DEV XHCI FLOWCNTRL IDLE MITS" bitfld.long 0x04 15. " OUT_EN ,XUSB DEV XHCI FLOWCNTRL OUT EN" "Init,?..." hexmask.long.byte 0x04 8.--14. 1. " OUT_THRESH ,XUSB DEV XHCI FLOWCNTRL OUT THRESH" bitfld.long 0x04 7. " IN_EN ,XUSB DEV XHCI FLOWCNTRL IN EN" "Init,?..." textline " " hexmask.long.byte 0x04 0.--6. 1. " IN_THRESH ,T XUSB DEV XHCI FLOWCNTRL IN THRESH" line.long 0x08 "DEVNOTIF_LO,Device Notification Register" hexmask.long.tbyte 0x08 8.--31. 1. " LO_DATA ,T XUSB DEV XHCI DEVNOTIF LO DATA" bitfld.long 0x08 4.--7. " LO_TYPE ,T XUSB DEV XHCI DEVNOTIF LO TYPE" "Init,?..." bitfld.long 0x08 0. " LO ,T XUSB DEV XHCI DEVNOTIF LO" "Init,Set" line.long 0x0C "DEVNOTIF_HI,Device Notification Register" line.long 0x10 "PORTHALT,T XUSB DEV XHCI PORTHALT" bitfld.long 0x10 26. " STCHG_REQ ,T XUSB DEV XHCI PORTHALT STCHG REQ" "Init,?..." bitfld.long 0x10 25. " STCHG_PME_EN ,T XUSB DEV XHCI PORTHALT STCHG PME EN" "Init,?..." bitfld.long 0x10 24. " STCHG_INTR_EN ,T XUSB DEV XHCI PORTHALT STCHG INTR EN" "Init,?..." eventfld.long 0x10 20. " STCHG_REQ ,T XUSB DEV XHCI PORTHALT STCHG REQ" "Not pending,Pending" textline " " rbitfld.long 0x10 16.--19. " STCHG_STATE ,T XUSB DEV XHCI PORTHALT STCHG STATE" "STATE_U0,?..." eventfld.long 0x10 1. " HALT_REJECT ,T XUSB DEV XHCI PORTHALT HALT REJECT" "False,True" bitfld.long 0x10 0. " HALT_LTSSM ,T XUSB DEV XHCI PORTHALT HALT LTSSM" "Init,?..." line.long 0x14 "PORT_TM,T XUSB DEV XHCI PORT TM" bitfld.long 0x14 0.--3. " CTRL ,T XUSB DEV XHCI PORT TM CTRL" "Disabled,TESTJ,TESTK,SE0_NAK,TEST_PKT,TEST_FORCEEN,?..." rgroup.long 0x74++0x03 line.long 0x00 "EP_THREAD_ACTIVE,Per EP Bit To Indicate Whether EP Is Loaded/Active In BI" bitfld.long 0x00 31. " EP_THREAD_ACTIVE[31] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [31]" "No,Yes" bitfld.long 0x00 30. " [30] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [30]" "No,Yes" bitfld.long 0x00 29. " [29] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [29]" "No,Yes" bitfld.long 0x00 28. " [28] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [28]" "No,Yes" textline " " bitfld.long 0x00 27. " [27] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [27]" "No,Yes" bitfld.long 0x00 26. " [26] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [26]" "No,Yes" bitfld.long 0x00 25. " [25] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [25]" "No,Yes" bitfld.long 0x00 24. " [24] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [24]" "No,Yes" textline " " bitfld.long 0x00 23. " [23] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [23]" "No,Yes" bitfld.long 0x00 22. " [22] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [22]" "No,Yes" bitfld.long 0x00 21. " [21] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [21]" "No,Yes" bitfld.long 0x00 20. " [20] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [20]" "No,Yes" textline " " bitfld.long 0x00 19. " [19] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [19]" "No,Yes" bitfld.long 0x00 18. " [18] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [18]" "No,Yes" bitfld.long 0x00 17. " [17] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [17]" "No,Yes" bitfld.long 0x00 16. " [16] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [16]" "No,Yes" textline " " bitfld.long 0x00 15. " [15] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [15]" "No,Yes" bitfld.long 0x00 14. " [14] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [14]" "No,Yes" bitfld.long 0x00 13. " [13] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [13]" "No,Yes" bitfld.long 0x00 12. " [12] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [12]" "No,Yes" textline " " bitfld.long 0x00 11. " [11] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [11]" "No,Yes" bitfld.long 0x00 10. " [10] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [10]" "No,Yes" bitfld.long 0x00 9. " [9] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [9]" "No,Yes" bitfld.long 0x00 8. " [8] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [8]" "No,Yes" textline " " bitfld.long 0x00 7. " [7] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [7]" "No,Yes" bitfld.long 0x00 6. " [6] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [6]" "No,Yes" bitfld.long 0x00 5. " [5] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [5]" "No,Yes" bitfld.long 0x00 4. " [4] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [4]" "No,Yes" textline " " bitfld.long 0x00 3. " [3] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [3]" "No,Yes" bitfld.long 0x00 2. " [2] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [2]" "No,Yes" bitfld.long 0x00 1. " [1] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [1]" "No,Yes" bitfld.long 0x00 0. " [0] ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [0]" "No,Yes" group.long 0x78++0x07 line.long 0x00 "EP_STOPPED,EP_STOPPED Register" eventfld.long 0x00 31. " IN15 ,T XUSB DEV XHCI EP STOPPED IN15" "No,Yes" eventfld.long 0x00 30. " OUT15 ,T XUSB DEV XHCI EP STOPPED OUT15" "No,Yes" eventfld.long 0x00 29. " IN14 ,T XUSB DEV XHCI EP STOPPED IN14" "No,Yes" eventfld.long 0x00 28. " OUT14 ,T XUSB DEV XHCI EP STOPPED OUT14" "No,Yes" textline " " eventfld.long 0x00 27. " IN13 ,T XUSB DEV XHCI EP STOPPED IN13" "No,Yes" eventfld.long 0x00 26. " OUT13 ,T XUSB DEV XHCI EP STOPPED OUT13" "No,Yes" eventfld.long 0x00 25. " IN12 ,T XUSB DEV XHCI EP STOPPED IN12" "No,Yes" eventfld.long 0x00 24. " OUT12 ,T XUSB DEV XHCI EP STOPPED OUT12" "No,Yes" textline " " eventfld.long 0x00 23. " IN11 ,T XUSB DEV XHCI EP STOPPED IN11" "No,Yes" eventfld.long 0x00 22. " OUT11 ,T XUSB DEV XHCI EP TOPPED OUT11" "No,Yes" eventfld.long 0x00 21. " IN10 ,T XUSB DEV XHCI EP STOPPED IN10" "No,Yes" eventfld.long 0x00 20. " OUT10 ,T XUSB DEV XHCI EP STOPPED OUT10" "No,Yes" textline " " eventfld.long 0x00 19. " IN9 ,T XUSB DEV XHCI EP STOPPED IN9" "No,Yes" eventfld.long 0x00 18. " OUT9 ,T XUSB DEV XHCI EP STOPPED OUT9" "No,Yes" eventfld.long 0x00 17. " IN8 ,T XUSB DEV XHCI EP STOPPED IN8" "No,Yes" eventfld.long 0x00 16. " OUT8 ,T XUSB DEV XHCI EP STOPPED OUT8" "No,Yes" textline " " eventfld.long 0x00 15. " IN7 ,T XUSB DEV XHCI EP STOPPED IN7" "No,Yes" eventfld.long 0x00 14. " OUT7 ,T XUSB DEV XHCI EP STOPPED OUT7" "No,Yes" eventfld.long 0x00 13. " IN6 ,T XUSB DEV XHCI EP STOPPED IN6" "No,Yes" eventfld.long 0x00 12. " OUT6 ,T XUSB DEV XHCI EP STOPPED OUT6" "No,Yes" textline " " eventfld.long 0x00 11. " IN5 ,T XUSB DEV XHCI EP STOPPED IN5" "No,Yes" eventfld.long 0x00 10. " OUT5 ,T XUSB DEV XHCI EP STOPPED OUT5" "No,Yes" eventfld.long 0x00 9. " IN4 ,T XUSB DEV XHCI EP STOPPED IN4" "No,Yes" eventfld.long 0x00 8. " OUT4 ,T XUSB DEV XHCI EP STOPPED OUT4" "No,Yes" textline " " eventfld.long 0x00 7. " IN3 ,T XUSB DEV XHCI EP STOPPED IN3" "No,Yes" eventfld.long 0x00 6. " OUT3 ,T XUSB DEV XHCI EP STOPPED OUT3" "No,Yes" eventfld.long 0x00 5. " IN2 ,T XUSB DEV XHCI EP STOPPED IN2" "No,Yes" eventfld.long 0x00 4. " OUT2 ,T XUSB DEV XHCI EP STOPPED OUT2" "No,Yes" textline " " eventfld.long 0x00 3. " IN1 ,T XUSB DEV XHCI EP STOPPED IN1" "No,Yes" eventfld.long 0x00 2. " OUT1 ,T XUSB DEV XHCI EP STOPPED OUT1" "No,Yes" eventfld.long 0x00 1. " IN0 ,T XUSB DEV XHCI EP STOPPED IN0" "No,Yes" eventfld.long 0x00 0. " OUT0 ,T XUSB DEV XHCI EP STOPPED OUT0" "No,Yes" line.long 0x04 "STREAMID_CFG,T XUSB DEV XHCI STREAMID CFG" hexmask.long.word 0x04 16.--31. 1. " STREAMID ,T XUSB DEV XHCI STREAMID CFG STREAMID" bitfld.long 0x04 8.--12. " DCI ,T XUSB DEV XHCI STREAMID CFG DCI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0. " TRIGGER ,T XUSB DEV XHCI STREAMID CFG TRIGGER" "Not pending,Pending" group.long 0x84++0x03 line.long 0x00 "DEV_SOFTRST,SOFTRST Signal For Device Mode" hexmask.long.byte 0x00 8.--15. 1. " RSTCNT ,T XUSB DEV XHCI DEV SOFTRST RSTCNT" bitfld.long 0x00 1. " CYA_DMAIDLE ,T XUSB DEV XHCI DEV SOFTRST CYA DMAIDLE" "Init,?..." bitfld.long 0x00 0. " RESET ,T XUSB DEV XHCI DEV SOFTRST RESET" "Not pending,Pending" tree "HSFSPI registers" width 20. group.long 0x100++0x3F line.long 0x00 "COUNT0,T XUSB DEV XHCI HSFSPI COUNT0" hexmask.long 0x00 0.--29. 1. " FS_RESET_MIN ,T XUSB DEV XHCI HSFSPI COUNT0 FS RESET MIN" line.long 0x04 "COUNT1,T XUSB DEV XHCI HSFSPI COUNT1" hexmask.long 0x04 0.--29. 1. " HS_RESET_MIN ,XHCI HSFSPI COUNT0 HS RESET MIN" line.long 0x08 "COUNT2,T XUSB DEV XHCI HSFSPI COUNT2" hexmask.long 0x08 0.--29. 1. " HS_RESET_ST_RESET_MIN ,T XUSB DEV XHCI HSFSPI COUNT2 HS RESET ST RESET MIN" line.long 0x0C "COUNT3,T_XUSB_DEV_XHCI_HSFSPI_COUNT3" hexmask.long 0x0C 0.--29. 1. " TX_CHIRP_MID ,T XUSB DEV XHCI HSFSPI COUNT3 TX CHIRP MID" line.long 0x10 "COUNT4,T XUSB DEV XHCI HSFSPI COUNT4" hexmask.long 0x10 0.--29. 1. " CHIRP_MIN ,T XUSB DEV XHCI HSFSPI COUNT4 CHIRP MIN" line.long 0x14 "COUNT5,T XUSB DEV XHCI HSFSPI COUNT5" hexmask.long 0x14 0.--29. 1. " CHIRP_MAX ,T XUSB DEV XHCI HSFSPI COUNT5 CHIRP MAX" line.long 0x18 "COUNT6,T XUSB DEV XHCI HSFSPI COUNT6" hexmask.long 0x18 0.--29. 1. " INACTIVITY_TIMEOUT ,T XUSB DEV XHCI HSFSPI COUNT6 INACTIVITY TIMEOUT" line.long 0x1C "COUNT7,T XUSB DEV XHCI HSFSPI COUNT7" hexmask.long 0x1C 0.--29. 1. " HS_FSM_TIMEOUT ,T XUSB DEV XHCI HSFSPI COUNT7 HS FSM TIMEOUT" line.long 0x20 "COUNT8,T XUSB DEV XHCI HSFSPI COUNT8" hexmask.long 0x20 0.--29. 1. " FS_FSM_TIMEOUT ,T XUSB DEV XHCI HSFSPI COUNT8 FS FSM TIMEOUT" line.long 0x24 "COUNT9,T XUSB DEV XHCI HSFSPI COUNT9" hexmask.long 0x24 0.--29. 1. " U3_RESUME_K_DURATION ,T XUSB DEV XHCI HSFSPI COUNT9 U3 RESUME K DURATION" line.long 0x28 "COUNT10,T XUSB DEV XHCI HSFSPI COUNT10" hexmask.long 0x28 0.--29. 1. " U3_ENTRY_DELAY ,T XUSB DEV XHCI HSFSPI COUNT10 U3 ENTRY DELAY" line.long 0x2C "COUNT11,T XUSB DEV XHCI HSFSPI COUNT11" hexmask.long 0x2C 0.--29. 1. " FS_RESET_ST_RESET_MIN ,T XUSB DEV XHCI HSFSPI COUNT11 FS RESET ST RESET MIN" line.long 0x30 "COUNT12,T XUSB DEV XHCI HSFSPI COUNT12" hexmask.long 0x30 0.--29. 1. " U2_ENTRY_DELAY ,T XUSB DEV XHCI HSFSPI COUNT12 U2 ENTRY DELAY" line.long 0x34 "COUNT13,T XUSB DEV XHCI HSFSPI COUNT13" hexmask.long 0x34 0.--29. 1. " U2_RESUME_K_DURATION ,T XUSB DEV XHCI HSFSPI COUNT13 U2 RESUME K DURATION" line.long 0x38 "CTRL,T XUSB DEV XHCI HSFSPI CTRL" bitfld.long 0x38 26.--30. " HS_IDLE_BIT_TIME ,T XUSB DEV XHCI HSFSPI CTRL HS IDLE BIT TIME" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,Init" bitfld.long 0x38 22.--25. " FS_SE0_WIDTH ,T XUSB DEV XHCI HSFSPI CTRL FS SE0 WIDTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 21. " BITSTUFF_DISABLE ,T XUSB DEV XHCI HSFSPI CTRL BITSTUFF DISABLE" "Init,?..." textline " " bitfld.long 0x38 20. " NRZI_DISABLE ,T XUSB DEV XHCI HSFSPI CTRL NRZI DISABLE" "Init,?..." hexmask.long.word 0x38 10.--19. 1. " FS_INTERPKT_DELAY ,T XUSB DEV XHCI HSFSPI CTRL FS INTERPKT DELAY" hexmask.long.word 0x38 0.--9. 1. " HS_INTERPKT_DELAY ,T XUSB DEV XHCI HSFSPI CTRL HS INTERPKT DELAY" line.long 0x3C "TESTMODE_CTRL,T XUSB DEV XHCI HSFSPI TESTMODE CTRL" bitfld.long 0x3C 1. " CYA_ADDR_MATCH ,T XUSB DEV XHCI HSFSPI TESTMODE CTRL CYA ADDR MATCH" "Init,?..." bitfld.long 0x3C 0. " PATTERN_SELECT ,T XUSB DEV XHCI HSFSPI TESTMODE CTRL PATTERN SELECT" "Init,?..." group.long 0x140++0x03 line.long 0x00 "TESTMODE_PATTERN0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN0 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN0 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN0 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN0 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0 BYTE0" group.long 0x144++0x03 line.long 0x00 "TESTMODE_PATTERN1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN1 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN1 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN1 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN1 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1 BYTE0" group.long 0x148++0x03 line.long 0x00 "TESTMODE_PATTERN2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN2 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN2 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN2 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN2 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2 BYTE0" group.long 0x14C++0x03 line.long 0x00 "TESTMODE_PATTERN3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN3 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN3 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN3 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN3 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3 BYTE0" group.long 0x150++0x03 line.long 0x00 "TESTMODE_PATTERN4 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN4 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN4 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN4 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN4 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4 BYTE0" group.long 0x154++0x03 line.long 0x00 "TESTMODE_PATTERN5 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN5 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN5 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN5 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN5 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5 BYTE0" group.long 0x158++0x03 line.long 0x00 "TESTMODE_PATTERN6 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN6 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN6 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN6 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN6 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6 BYTE0" group.long 0x15C++0x03 line.long 0x00 "TESTMODE_PATTERN7 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN7 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN7 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN7 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN7 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7 BYTE0" group.long 0x160++0x03 line.long 0x00 "TESTMODE_PATTERN8 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN8 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN8 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN8 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN8 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8 BYTE0" group.long 0x164++0x03 line.long 0x00 "TESTMODE_PATTERN9 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9 " hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN9 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN9 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN9 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN9 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9 BYTE0" group.long 0x168++0x03 line.long 0x00 "TESTMODE_PATTERN10,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10" hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN10_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN10_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN10_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN10_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10 BYTE0" group.long 0x16C++0x03 line.long 0x00 "TESTMODE_PATTERN11,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11" hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN11_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN11_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN11_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN11_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11 BYTE0" group.long 0x170++0x03 line.long 0x00 "TESTMODE_PATTERN12,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12" hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN12_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN12_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN12_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN12_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12 BYTE0" group.long 0x174++0x03 line.long 0x00 "TESTMODE_PATTERN13,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13" hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN13_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN13_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN13_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN13_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13 BYTE0" group.long 0x178++0x03 line.long 0x00 "TESTMODE_PATTERN14,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14" hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN14_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN14_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN14_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN14_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14 BYTE0" group.long 0x17C++0x03 line.long 0x00 "TESTMODE_PATTERN15,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15" hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN15_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15 BYTE3" hexmask.long.byte 0x00 16.--23. 1. " TESTMODE_PATTERN15_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15 BYTE2" hexmask.long.byte 0x00 8.--15. 1. " TESTMODE_PATTERN15_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15 BYTE1" textline " " hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN15_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15 BYTE0" group.long 0x180++0x03 line.long 0x00 "PVTPORTDBG_CTRL,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL" bitfld.long 0x00 20.--23. " END_MINOR ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL END MINOR" "Init,?..." bitfld.long 0x00 16.--19. " END_MAJOR ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL END MAJOR" "Init,?..." bitfld.long 0x00 12.--15. " START_MINOR ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL START MINOR" "Init,?..." textline " " bitfld.long 0x00 8.--11. " START_MAJOR ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL START MAJOR" "Init,?..." bitfld.long 0x00 1. " CLEAR ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL CLEAR" "Not pending,Pending" bitfld.long 0x00 0. " RUN ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL RUN" "Stop,Run" rgroup.long 0x184++0x03 line.long 0x00 "PVTPORTDBG_STS,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS" bitfld.long 0x00 19. " TESTMODE_HS_PKT ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS TESTMODE HS PKT" "0,1" bitfld.long 0x00 18. " TESTMODE_HS_NAK ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS TESTMODE HS NAK" "0,1" bitfld.long 0x00 17. " TESTMODE_HS_KSTATE ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS TESTMODE HS KSTATE" "0,1" textline " " bitfld.long 0x00 16. " TESTMODE_HS_JSTATE ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS TESTMODE HSJSTATE" "0,1" bitfld.long 0x00 15. " ENABLED_FS_RESUME ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED FS RESUME" "0,1" bitfld.long 0x00 14. " ENABLED_FS_U3 ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED FS U3" "0,1" textline " " bitfld.long 0x00 13. " ENABLED_FS_U2 ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED FS U2" "0,1" bitfld.long 0x00 12. " ENABLED_FS_U0 ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED FS U0" "0,1" bitfld.long 0x00 11. " ENABLED_HS_RESUME ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED HS RESUME" "0,1" textline " " bitfld.long 0x00 10. " ENABLED_HS_U3 ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED HS U3" "0,1" bitfld.long 0x00 9. " ENABLED_HS_U2 ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED HS U2" "0,1" bitfld.long 0x00 8. " ENABLED_HS_U0 ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED HS U0" "0,1" textline " " bitfld.long 0x00 7. " RESET_HS_PROLOG ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET HS PROLOG" "0,1" bitfld.long 0x00 6. " RESET_FS ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET FS" "0,1" bitfld.long 0x00 5. " RESET_HS_RXCHIRPJ ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET HS RXCHIRPJ" "0,1" textline " " bitfld.long 0x00 4. " RESET_HS_RXCHIRPK ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET HS RXCHIRPK" "0,1" bitfld.long 0x00 3. " RESET_HS_TXCHIRPK ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET HS TXCHIRPK" "0,1" bitfld.long 0x00 2. " DISABLED_NONE ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS DISABLED NONE" "0,1" textline " " bitfld.long 0x00 1. " DISCONNECTED_NONE ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS DISCONNECTED NONE" "0,1" bitfld.long 0x00 0. " START_NONE ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS START NONE" "0,1" tree.end textline " " width 30. group.long 0x600++0x03 line.long 0x00 "SSPI_HOSTCFG_START,T XUSB DEV XHCI SSPI HOSTCFG START" group.long 0x7FC++0x03 line.long 0x00 "SSPI_HOSTCFG_END,T XUSB DEV XHCI SSPI HOSTCFG END" tree "PERFMON registers" group.long 0x800++0x2F line.long 0x00 "READ_CUMLATENCY_REG0,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG0" bitfld.long 0x00 31. " EN ,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG0 EN" "Init," hexmask.long.word 0x00 16.--30. 1. " PKTS ,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG0 PKTS" hexmask.long.word 0x00 0.--15. 1. " CYCLESHI ,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG0 CYCLESHI" line.long 0x04 "READ_CUMLATENCY_REG1,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG1" line.long 0x08 "READ_LATENCY,T XUSB DEV XHCI PERFMON READ LATENCY" hexmask.long.word 0x08 16.--31. 1. " READ_LATENCY_MINCYCLES ,T XUSB DEV XHCI PERFMON READ LATENCY MINCYCLES" hexmask.long.word 0x08 0.--15. 1. " READ_LATENCY_MAXCYCLES ,T XUSB DEV XHCI PERFMON READ LATENCY MAXCYCLES" line.long 0x0C "READ_HISTOGRAM_BOUNDARY_REG0,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG0" hexmask.long.word 0x0C 16.--31. 1. " B ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG0 B" hexmask.long.word 0x0C 0.--15. 1. " A ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG0 A" line.long 0x10 "READ_HISTOGRAM_BOUNDARY_REG1,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG1" hexmask.long.word 0x10 16.--31. 1. " D ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG1 D" hexmask.long.word 0x10 0.--15. 1. " C ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG1 C" line.long 0x14 "READ_HISTOGRAM_BUCKET_REG0,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG0" hexmask.long.word 0x14 16.--31. 1. " 1 ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG0 1" hexmask.long.word 0x14 0.--15. 1. " 0 ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG0 0" line.long 0x18 "READ_HISTOGRAM_BUCKET_REG1,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG1" hexmask.long.word 0x18 16.--31. 1. " 3 ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG1 3" hexmask.long.word 0x18 0.--15. 1. " 2 ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG1 2" line.long 0x1C "READ_HISTOGRAM_BUCKET_REG2,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG2" hexmask.long.word 0x1C 0.--15. 1. " 4 ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG2 4" line.long 0x20 "BI_CTRL,T XUSB DEV XHCI PERFMON BI CTRL" bitfld.long 0x20 31. " EN ,T XUSB DEV XHCI PERFMON BI CTRL EN" "Init,?..." line.long 0x24 "BI_EPTRB,T XUSB DEV XHCI PERFMON BI EPTRB" hexmask.long.word 0x24 16.--24. 1. " TRB ,T XUSB DEV XHCI PERFMON BI EPTRB TRB" hexmask.long.byte 0x24 8.--15. 1. " EPSYSMEM ,T XUSB DEV XHCI PERFMON BI EPTRB EPSYSMEM" line.long 0x28 "BI_DATA_OUT,T XUSB DEV XHCI PERFMON BI DATA OUT" hexmask.long.byte 0x28 24.--31. 1. " REQCOUNT ,T XUSB DEV XHCI PERFMON BI DATA OUT REQCOUNT" hexmask.long.tbyte 0x28 0.--23. 1. " SIZE ,T XUSB DEV XHCI PERFMON BI DATA OUT SIZE" line.long 0x2C "BI_DATA_IN,T XUSB DEV XHCI PERFMON BI DATA IN" hexmask.long.byte 0x2C 24.--31. 1. " REQCOUNT ,T XUSB DEV XHCI PERFMON BI DATA IN REQCOUNT" hexmask.long.tbyte 0x2C 0.--23. 1. " SIZE ,T XUSB DEV XHCI PERFMON BI DATA IN SIZE" tree.end textline " " group.long 0x840++0x03 line.long 0x00 "BLCG,T XUSB DEV XHCI BLCG" bitfld.long 0x00 30. " OVRD_SS_PI_500M ,T XUSB DEV XHCI BLCG OVRD SS PI 500M" "Disabled,Enabled" bitfld.long 0x00 29. " OVRD_SS_PI ,T XUSB DEV XHCI BLCG OVRD SS PI" "Disabled,Enabled" bitfld.long 0x00 28. " OVRD_IOPLL_3_PWRDN ,T XUSB DEV XHCI BLCG OVRD IOPLL 3 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " OVRD_IOPLL_2_PWRDN ,T XUSB DEV XHCI BLCG OVRD IOPLL 2 PWRDN" "Disabled,Enabled" bitfld.long 0x00 26. " OVRD_IOPLL_1_PWRDN ,T XUSB DEV XHCI BLCG OVRD IOPLL 1 PWRDN" "Disabled,Enabled" bitfld.long 0x00 25. " OVRD_IOPLL_0_PWRDN ,T XUSB DEV XHCI BLCG OVRD IOPLL 0 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " OVRD_COREPLL_PWRDN ,T XUSB DEV XHCI BLCG OVRD COREPLL PWRDN" "Disabled,Enabled" bitfld.long 0x00 23. " OVRD_NVWRAP_48M ,T XUSB DEV XHCI BLCG OVRD NVWRAP 48M" "Disabled,Enabled" bitfld.long 0x00 22. " OVRD_NVWRAP_480M ,T XUSB DEV XHCI BLCG OVRD NVWRAP 480M" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " OVRD_HSFS_PI ,T XUSB DEV XHCI BLCG OVRD HSFS PI" "Disabled,Enabled" bitfld.long 0x00 20. " OVRD_PICLK_BI ,T XUSB DEV XHCI BLCG OVRD PICLK BI" "Disabled,Enabled" bitfld.long 0x00 19. " OVRD_CORE_BI ,T XUSB DEV XHCI BLCG OVRD CORE BI" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " OVRD_FE ,T XUSB DEV XHCI BLCG OVRD FE" "Disabled,Enabled" bitfld.long 0x00 17. " OVRD_UFPCI ,T XUSB DEV XHCI BLCG OVRD UFPCI" "Disabled,Enabled" bitfld.long 0x00 16. " OVRD_DFPCI ,T XUSB DEV XHCI BLCG OVRD DFPCI" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SS_PI_500M ,T XUSB DEV XHCI BLCG SS PI 500M" "Disabled,Enabled" bitfld.long 0x00 13. " SS_PI ,T XUSB DEV XHCI BLCG SS PI" "Disabled,Enabled" bitfld.long 0x00 12. " IOPLL_3_PWRDN ,T XUSB DEV XHCI BLCG IOPLL 3 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " IOPLL_2_PWRDN ,T XUSB DEV XHCI BLCG IOPLL 2 PWRDN" "Disabled,Enabled" bitfld.long 0x00 10. " IOPLL_1_PWRDN ,T XUSB DEV XHCI BLCG IOPLL 1 PWRDN" "Disabled,Enabled" bitfld.long 0x00 9. " IOPLL_0_PWRDN ,T XUSB DEV XHCI BLCG IOPLL 0 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " COREPLL_PWRDN ,T XUSB DEV XHCI BLCG COREPLL PWRDN" "Disabled,Enabled" bitfld.long 0x00 7. " NVWRAP_48M ,T XUSB DEV XHCI BLCG NVWRAP 48M" "Disabled,Enabled" bitfld.long 0x00 6. " NVWRAP_480M ,T XUSB DEV XHCI BLCG NVWRAP 480M" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HSFS_PI ,T XUSB DEV XHCI BLCG HSFS PI" "Disabled,Enabled" bitfld.long 0x00 4. " PICLK_BI ,T XUSB DEV XHCI BLCG PICLK BI" "Disabled,Enabled" bitfld.long 0x00 3. " CORE_BI ,T XUSB DEV XHCI BLCG CORE BI" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FE ,T XUSB DEV XHCI BLCG FE" "Disabled,Enabled" bitfld.long 0x00 1. " UFPCI ,T XUSB DEV XHCI BLCG UFPCI" "Disabled,Enabled" bitfld.long 0x00 0. " DFPCI ,T XUSB DEV XHCI BLCG DFPCI" "Disabled,Enabled" rgroup.long 0x844++0x03 line.long 0x00 "BLCG_STS,T XUSB DEV XHCI BLCG STS" bitfld.long 0x00 14. " SS_PI_500M ,T XUSB DEV XHCI BLCG STS SS PI 500M" "Disabled,Enabled" bitfld.long 0x00 13. " SS_PI ,T XUSB DEV XHCI BLCG STS SS PI" "Disabled,Enabled" bitfld.long 0x00 12. " IOPLL_3_PWRDN ,T XUSB DEV XHCI BLCG STS IOPLL 3 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " IOPLL_2_PWRDN ,T XUSB DEV XHCI BLCG STS IOPLL 2 PWRDN" "Disabled,Enabled" bitfld.long 0x00 10. " IOPLL_1_PWRDN ,T XUSB DEV XHCI BLCG STS IOPLL 1 PWRDN" "Disabled,Enabled" bitfld.long 0x00 9. " IOPLL_0_PWRDN ,T XUSB DEV XHCI BLCG STS IOPLL 0 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " COREPLL_PWRDN ,T XUSB DEV XHCI BLCG STS COREPLL PWRDN" "Disabled,Enabled" bitfld.long 0x00 7. " NVWRAP_48M ,T XUSB DEV XHCI BLCG STS NVWRAP 48M" "Disabled,Enabled" bitfld.long 0x00 6. " NVWRAP_480M ,T XUSB DEV XHCI BLCG STS NVWRAP 480M" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " HSFS_PI ,T XUSB DEV XHCI BLCG STS HSFS PI" "Disabled,Enabled" bitfld.long 0x00 4. " PICLK_BI ,T XUSB DEV XHCI BLCG STS PICLK BI" "Disabled,Enabled" bitfld.long 0x00 3. " CORE_BI ,T XUSB DEV XHCI BLCG STS CORE BI" "Disabled,Enabled" group.long 0x848++0x03 line.long 0x00 "BLCG_INTR,T XUSB DEV XHCI BLCG INTR" bitfld.long 0x00 28. " IOPLL_3_PWRDN ,T XUSB DEV XHCI BLCG INTR STS IOPLL 3 PWRDN" "Disabled,Enabled" bitfld.long 0x00 27. " IOPLL_2_PWRDN ,T XUSB DEV XHCI BLCG INTR STS IOPLL 2 PWRDN" "Disabled,Enabled" bitfld.long 0x00 26. " IOPLL_1_PWRDN ,T XUSB DEV XHCI BLCG INTR STS IOPLL 1 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IOPLL_0_PWRDN ,T XUSB DEV XHCI BLCG INTR STS IOPLL 0 PWRDN" "Disabled,Enabled" bitfld.long 0x00 24. " COREPLL_PWRDN ,T XUSB DEV XHCI BLCG INTR STS COREPLL PWRDN" "Disabled,Enabled" bitfld.long 0x00 12. " IOPLL_3_PWRDN ,T XUSB DEV XHCI BLCG INTR IOPLL 3 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " IOPLL_2_PWRDN ,T XUSB DEV XHCI BLCG INTR IOPLL 2 PWRDN" "Disabled,Enabled" bitfld.long 0x00 10. " IOPLL_1_PWRDN ,T XUSB DEV XHCI BLCG INTR IOPLL 1 PWRDN" "Disabled,Enabled" bitfld.long 0x00 9. " IOPLL_0_PWRDN ,T XUSB DEV XHCI BLCG INTR IOPLL 0 PWRDN" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " COREPLL_PWRDN ,T XUSB DEV XHCI BLCG INTR COREPLL PWRDN" "Disabled,Enabled" bitfld.long 0x00 0. " TGT ,T XUSB DEV XHCI BLCG INTR TGT" "SMI,PME" group.long 0x850++0x0F line.long 0x00 "CFG_DEVBI,T XUSB DEV XHCI CFG DEVBI" bitfld.long 0x00 29. " ISOCH_SKIP_SIA ,T XUSB DEV XHCI CFG DEVBI ISOCH SKIP SIA" ",Init" bitfld.long 0x00 24.--28. " DMA_RD_MAX_ALOM ,T XUSB DEV XHCI CFG DEVBI DMA RD MAX ALOM" ",,,,,,,,,,Init,?..." hexmask.long.byte 0x00 16.--23. 1. " CNT_250NS ,T XUSB DEV XHCI CFG DEVBI CNT 250NS" textline " " bitfld.long 0x00 14. " TRBFETCH_RDPASSPW ,T XUSB DEV XHCI CFG DEVBI TRBFETCH RDPASSPW" "Init,?..." bitfld.long 0x00 13. " ASYNC_EP_IDLE ,T XUSB DEV XHCI CFG DEVBI ASYNC EP IDLE" ",Init" bitfld.long 0x00 12. " LOCAL_ROTATE ,T XUSB DEV XHCI CFG DEVBI LOCAL ROTATE" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TRBFETCH_RINGEND_CHK ,T XUSB DEV XHCI CFG DEVBI TRBFETCH RINGEND CHK" ",Enabled" bitfld.long 0x00 9.--10. " TRBFETCH_NUMSKIP ,T XUSB DEV XHCI CFG DEVBI TRBFETCH NUMSKIP" ",Init,?..." bitfld.long 0x00 8. " TRBFETCH_IDT_IN ,T XUSB DEV XHCI CFG DEVBI TRBFETCH IDT IN" "Init,?..." textline " " bitfld.long 0x00 7. " DMA_WR_UPSTREAM_RO ,T XUSB DEV XHCI CFG DEVBI DMA WR UPSTREAM RO" ",Init" bitfld.long 0x00 6. " DMA_RD_UPSTREAM_RO ,T XUSB DEV XHCI CFG DEVBI DMA RD UPSTREAM RO" ",Init" bitfld.long 0x00 5. " DMA_RD_UPSTREAM_RDPASSPW ,T XUSB DEV XHCI CFG DEVBI DMA RD UPSTREAM RDPASSPW" "Init,?..." textline " " bitfld.long 0x00 0.--4. " DMA_WR_MAX_ALOM ,T XUSB DEV XHCI CFG DEVBI DMA WR MAX ALOM" ",,,Init,?..." line.long 0x04 "CFG_DEVBI_UPSTREAM,T XUSB DEV XHCI CFG DEVBI UPSTREAM" hexmask.long.byte 0x04 16.--23. 1. " DMA_RD_LIMIT ,T XUSB DEV XHCI CFG DEVBI UPSTREAM DMA RD LIMIT" bitfld.long 0x04 11. " EPLOGIC_RDPASSPW ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EPLOGIC RDPASSPW" "Init,?..." bitfld.long 0x04 10. " EPLOGIC_RO ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EPLOGIC RO" "Init,?..." textline " " bitfld.long 0x04 9. " EPLOGIC_NS ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EPLOGIC NS" "Init,?..." bitfld.long 0x04 8. " EPLOGIC_TC ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EPLOGIC TC" "Init,?..." bitfld.long 0x04 2. " EVENTQ_RO ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EVENTQ RO" "Init,?..." textline " " bitfld.long 0x04 1. " EVENTQ_NS ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EVENTQ NS" "Init,?..." bitfld.long 0x04 0. " EVENTQ_TC ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EVENTQ TC" "Init,?..." line.long 0x08 "CFG_DEV_SSPI_XFER,T XUSB DEV XHCI CFG DEV SSPI XFER" line.long 0x0C "CFG_DEV_FE,T XUSB DEV XHCI CFG DEV FE" bitfld.long 0x0C 29. " INFINITE_SS_RETRY ,T XUSB DEV XHCI CFG DEV FE INFINITE SS RETRY" "Disabled,Enabled" bitfld.long 0x0C 28. " EN_PRIME_EVENT ,T XUSB DEV XHCI CFG DEV FE EN PRIME EVENT" ",Init" bitfld.long 0x0C 27. " FEATURE_LPM ,T XUSB DEV XHCI CFG DEV FE FEATURE LPM" "Disabled,Enabled" textline " " bitfld.long 0x0C 26. " EN_STALL_EVENT ,T XUSB DEV XHCI CFG DEV FE EN STALL EVENT" "Init,?..." bitfld.long 0x0C 25. " PORTDISCON_RST_HW ,T XUSB DEV XHCI CFG DEV FE PORTDISCON RST HW" ",Init" bitfld.long 0x0C 24. " CTX_RESTORE ,T XUSB DEV XHCI CFG DEV FE CTX RESTORE" "Init,?..." textline " " hexmask.long.tbyte 0x0C 4.--23. 1. " MFCOUNT_MIN ,T XUSB DEV XHCI CFG DEV FE MFCOUNT MIN" bitfld.long 0x0C 3. " PORTRST_HW ,T XUSB DEV XHCI CFG DEV FE PORTRST HW" ",Init" bitfld.long 0x0C 2. " SEQNUM_INIT ,T XUSB DEV XHCI CFG DEV FE SEQNUM INIT" ",Init" textline " " bitfld.long 0x0C 0.--1. " PORTREGSEL ,T XUSB DEV XHCI CFG DEV FE PORTREGSEL" "Init,SS,HSFS,?..." rgroup.long 0x860++0x03 line.long 0x00 "CFG_IDLE,T XUSB DEV XHCI CFG IDLE" bitfld.long 0x00 4. " DEV_SS_PI ,T XUSB DEV XHCI CFG IDLE DEV SS PI" "0,1" bitfld.long 0x00 3. " DEV_FS_NVWRAP ,T XUSB DEV XHCI CFG IDLE DEV FS NVWRAP" "0,1" bitfld.long 0x00 2. " DEV_HS_NVWRAP ,T XUSB DEV XHCI CFG IDLE DEV HS NVWRAP" "0,1" textline " " bitfld.long 0x00 1. " DEV_HSFS_PI ,T XUSB DEV XHCI CFG IDLE DEV HSFS PI" "0,1" bitfld.long 0x00 0. " DEV_BI ,T XUSB DEV XHCI CFG IDLE DEV BI" "0,1" group.long 0x864++0x0F line.long 0x00 "CFG_SSXFER,T XUSB DEV XHCI CFG SSXFER" line.long 0x04 "CFG_SSXFER1,T XUSB DEV XHCI CFG SSXFER1" hexmask.long.word 0x04 0.--15. 1. " PINGTIMER ,T XUSB DEV XHCI CFG SSXFER1 PINGTIMER" line.long 0x08 "CFG_SPARE0,T XUSB DEV XHCI CFG SPARE0" line.long 0x0C "CFG_SPARE1,T XUSB DEV XHCI CFG SPARE1" width 0x0B tree.end tree.end tree.end tree "Audio Processing Engine" tree "AXBAR" tree "PART_0" base ad:0x702D0800 width 15. tree "ADMAIF" group.long 0x0++0x03 line.long 0x00 "ADMAIF_RX1_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x4++0x03 line.long 0x00 "ADMAIF_RX2_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x8++0x03 line.long 0x00 "ADMAIF_RX3_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xC++0x03 line.long 0x00 "ADMAIF_RX4_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "ADMAIF_RX5_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "ADMAIF_RX6_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "ADMAIF_RX7_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x1C++0x03 line.long 0x00 "ADMAIF_RX8_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "ADMAIF_RX9_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "ADMAIF_RX10_0,ADMAIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "I2S" group.long 0x40++0x03 line.long 0x00 "I2S1_RX1_0,I2S_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x44++0x03 line.long 0x00 "I2S2_RX1_0,I2S_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x48++0x03 line.long 0x00 "I2S3_RX1_0,I2S_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x4C++0x03 line.long 0x00 "I2S4_RX1_0,I2S_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x50++0x03 line.long 0x00 "I2S5_RX1_0,I2S_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "SFC" group.long 0x60++0x03 line.long 0x00 "SFC1_RX1_0,SFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x64++0x03 line.long 0x00 "SFC2_RX1_0,SFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "SFC3_RX1_0,SFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x6C++0x03 line.long 0x00 "SFC4_RX1_0,SFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "MIXER1" group.long 0x80++0x03 line.long 0x00 "MIXER1_RX1_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "MIXER1_RX2_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x88++0x03 line.long 0x00 "MIXER1_RX3_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x8C++0x03 line.long 0x00 "MIXER1_RX4_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "MIXER1_RX5_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x94++0x03 line.long 0x00 "MIXER1_RX6_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x00 "MIXER1_RX7_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x9C++0x03 line.long 0x00 "MIXER1_RX8_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xA0++0x03 line.long 0x00 "MIXER1_RX9_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xA4++0x03 line.long 0x00 "MIXER1_RX10_0,MIXER_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "SPDIF1" group.long 0xC0++0x03 line.long 0x00 "SPDIF1_RX1_0,SPDIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xC4++0x03 line.long 0x00 "SPDIF1_RX2_0,SPDIF_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "AFC" group.long 0xD0++0x03 line.long 0x00 "AFC1_RX1_0,AFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xD4++0x03 line.long 0x00 "AFC2_RX1_0,AFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xD8++0x03 line.long 0x00 "AFC3_RX1_0,AFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xDC++0x03 line.long 0x00 "AFC4_RX1_0,AFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xE0++0x03 line.long 0x00 "AFC5_RX1_0,AFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0xE4++0x03 line.long 0x00 "AFC6_RX1_0,AFC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "OPE" group.long 0x100++0x03 line.long 0x00 "OPE1_RX1_0,OPE_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x104++0x03 line.long 0x00 "OPE2_RX1_0,OPE_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "MVC" group.long 0x120++0x03 line.long 0x00 "MVC1_RX1_0,MVC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x124++0x03 line.long 0x00 "MVC2_RX1_0,MVC_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "AMX1" group.long 0x140++0x03 line.long 0x00 "AMX1_RX1_0,AMX1_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x144++0x03 line.long 0x00 "AMX1_RX2_0,AMX1_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x148++0x03 line.long 0x00 "AMX1_RX3_0,AMX1_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x14C++0x03 line.long 0x00 "AMX1_RX4_0,AMX1_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "AMX2" group.long 0x150++0x03 line.long 0x00 "AMX2_RX1_0,AMX1_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x154++0x03 line.long 0x00 "AMX2_RX2_0,AMX1_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x158++0x03 line.long 0x00 "AMX2_RX3_0,AMX1_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x15C++0x03 line.long 0x00 "AMX2_RX4_0,AMX1_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end tree "ADX" group.long 0x160++0x03 line.long 0x00 "ADX1_RX1_0,ADX_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" group.long 0x164++0x03 line.long 0x00 "ADX2_RX1_0,ADX_RX Register" bitfld.long 0x00 27. " SFC4_TX1 ,SFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " SFC3_TX1 ,SFC3_TX1" "Disabled,Enabled" bitfld.long 0x00 25. " SFC2_TX1 ,SFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " SFC1_TX1 ,SFC1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " I2S5_TX1 ,I2S5_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " I2S4_TX1 ,I2S4_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " I2S3_TX1 ,I2S3_TX1" "Disabled,Enabled" bitfld.long 0x00 17. " I2S2_TX1 ,I2S2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " I2S1_TX1 ,I2S1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " ADMAIF_TX10 ,ADMAIF_TX10" "Disabled,Enabled" bitfld.long 0x00 8. " ADMAIF_TX9 ,ADMAIF_TX9" "Disabled,Enabled" bitfld.long 0x00 7. " ADMAIF_TX8 ,ADMAIF_TX8" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ADMAIF_TX7 ,ADMAIF_TX7" "Disabled,Enabled" bitfld.long 0x00 5. " ADMAIF_TX6 ,ADMAIF_TX6" "Disabled,Enabled" bitfld.long 0x00 4. " ADMAIF_TX5 ,ADMAIF_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " ADMAIF_TX4 ,ADMAIF_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ADMAIF_TX3 ,ADMAIF_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " ADMAIF_TX2 ,ADMAIF_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " ADMAIF_TX1 ,ADMAIF_TX1" "Disabled,Enabled" tree.end width 0x0B tree.end tree "PART_1" base ad:0x702D0A00 width 15. tree "ADMAIF" group.long 0x0++0x03 line.long 0x00 "ADMAIF_RX1_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x4++0x03 line.long 0x00 "ADMAIF_RX2_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x8++0x03 line.long 0x00 "ADMAIF_RX3_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xC++0x03 line.long 0x00 "ADMAIF_RX4_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "ADMAIF_RX5_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "ADMAIF_RX6_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "ADMAIF_RX7_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x1C++0x03 line.long 0x00 "ADMAIF_RX8_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "ADMAIF_RX9_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "ADMAIF_RX10_0,ADMAIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "I2S" group.long 0x40++0x03 line.long 0x00 "I2S1_RX1_0,I2S_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x44++0x03 line.long 0x00 "I2S2_RX1_0,I2S_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x48++0x03 line.long 0x00 "I2S3_RX1_0,I2S_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x4C++0x03 line.long 0x00 "I2S4_RX1_0,I2S_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x50++0x03 line.long 0x00 "I2S5_RX1_0,I2S_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "SFC" group.long 0x60++0x03 line.long 0x00 "SFC1_RX1_0,SFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x64++0x03 line.long 0x00 "SFC2_RX1_0,SFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "SFC3_RX1_0,SFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x6C++0x03 line.long 0x00 "SFC4_RX1_0,SFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "MIXER1" group.long 0x80++0x03 line.long 0x00 "MIXER1_RX1_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "MIXER1_RX2_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x88++0x03 line.long 0x00 "MIXER1_RX3_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x8C++0x03 line.long 0x00 "MIXER1_RX4_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "MIXER1_RX5_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x94++0x03 line.long 0x00 "MIXER1_RX6_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x00 "MIXER1_RX7_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x9C++0x03 line.long 0x00 "MIXER1_RX8_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xA0++0x03 line.long 0x00 "MIXER1_RX9_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xA4++0x03 line.long 0x00 "MIXER1_RX10_0,MIXER_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "SPDIF1" group.long 0xC0++0x03 line.long 0x00 "SPDIF1_RX1_0,SPDIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xC4++0x03 line.long 0x00 "SPDIF1_RX2_0,SPDIF_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "AFC" group.long 0xD0++0x03 line.long 0x00 "AFC1_RX1_0,AFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xD4++0x03 line.long 0x00 "AFC2_RX1_0,AFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xD8++0x03 line.long 0x00 "AFC3_RX1_0,AFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xDC++0x03 line.long 0x00 "AFC4_RX1_0,AFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xE0++0x03 line.long 0x00 "AFC5_RX1_0,AFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0xE4++0x03 line.long 0x00 "AFC6_RX1_0,AFC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "OPE" group.long 0x100++0x03 line.long 0x00 "OPE1_RX1_0,OPE_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x104++0x03 line.long 0x00 "OPE2_RX1_0,OPE_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "MVC" group.long 0x120++0x03 line.long 0x00 "MVC1_RX1_0,MVC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x124++0x03 line.long 0x00 "MVC2_RX1_0,MVC_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "AMX1" group.long 0x140++0x03 line.long 0x00 "AMX1_RX1_0,AMX1_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x144++0x03 line.long 0x00 "AMX1_RX2_0,AMX1_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x148++0x03 line.long 0x00 "AMX1_RX3_0,AMX1_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x14C++0x03 line.long 0x00 "AMX1_RX4_0,AMX1_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "AMX2" group.long 0x150++0x03 line.long 0x00 "AMX1_RX1_0,AMX1_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x154++0x03 line.long 0x00 "AMX1_RX2_0,AMX1_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x158++0x03 line.long 0x00 "AMX1_RX3_0,AMX1_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x15C++0x03 line.long 0x00 "AMX1_RX4_0,AMX1_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end tree "ADX" group.long 0x160++0x03 line.long 0x00 "ADX1_RX1_0,ADX_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" group.long 0x164++0x03 line.long 0x00 "ADX2_RX1_0,ADX_RX Register" bitfld.long 0x00 29. " AFC6_TX1 ,AFC6_TX1" "Disabled,Enabled" bitfld.long 0x00 28. " AFC5_TX1 ,AFC5_TX1" "Disabled,Enabled" bitfld.long 0x00 27. " AFC4_TX1 ,AFC4_TX1" "Disabled,Enabled" bitfld.long 0x00 26. " AFC3_TX1 ,AFC3_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " AFC2_TX1 ,AFC2_TX1" "Disabled,Enabled" bitfld.long 0x00 24. " AFC1_TX1 ,AFC1_TX1" "Disabled,Enabled" bitfld.long 0x00 21. " SPDIF1_TX2 ,SPDIF1_TX2" "Disabled,Enabled" bitfld.long 0x00 20. " SPDIF1_TX1 ,SPDIF1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " AMX2_TX1 ,AMX2_TX1" "Disabled,Enabled" bitfld.long 0x00 8. " AMX1_TX1 ,AMX1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " MIXER1_TX5 ,MIXER1_TX5" "Disabled,Enabled" bitfld.long 0x00 3. " MIXER1_TX4 ,MIXER1_TX4" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIXER1_TX3 ,MIXER1_TX3" "Disabled,Enabled" bitfld.long 0x00 1. " MIXER1_TX2 ,MIXER1_TX2" "Disabled,Enabled" bitfld.long 0x00 0. " MIXER1_TX1 ,MIXER1_TX1" "Disabled,Enabled" tree.end width 0x0B tree.end tree "PART_2" base ad:0x702D0C00 width 15. tree "ADMAIF" group.long 0x0++0x03 line.long 0x00 "ADMAIF_RX1_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x4++0x03 line.long 0x00 "ADMAIF_RX2_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x8++0x03 line.long 0x00 "ADMAIF_RX3_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xC++0x03 line.long 0x00 "ADMAIF_RX4_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "ADMAIF_RX5_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "ADMAIF_RX6_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "ADMAIF_RX7_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x1C++0x03 line.long 0x00 "ADMAIF_RX8_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "ADMAIF_RX9_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "ADMAIF_RX10_0,ADMAIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "I2S" group.long 0x40++0x03 line.long 0x00 "I2S1_RX1_0,I2S_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x44++0x03 line.long 0x00 "I2S2_RX1_0,I2S_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x48++0x03 line.long 0x00 "I2S3_RX1_0,I2S_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x4C++0x03 line.long 0x00 "I2S4_RX1_0,I2S_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x50++0x03 line.long 0x00 "I2S5_RX1_0,I2S_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "SFC" group.long 0x60++0x03 line.long 0x00 "SFC1_RX1_0,SFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x64++0x03 line.long 0x00 "SFC2_RX1_0,SFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "SFC3_RX1_0,SFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x6C++0x03 line.long 0x00 "SFC4_RX1_0,SFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "MIXER1" group.long 0x80++0x03 line.long 0x00 "MIXER1_RX1_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "MIXER1_RX2_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x88++0x03 line.long 0x00 "MIXER1_RX3_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x8C++0x03 line.long 0x00 "MIXER1_RX4_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x90++0x03 line.long 0x00 "MIXER1_RX5_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x94++0x03 line.long 0x00 "MIXER1_RX6_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x00 "MIXER1_RX7_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x9C++0x03 line.long 0x00 "MIXER1_RX8_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xA0++0x03 line.long 0x00 "MIXER1_RX9_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xA4++0x03 line.long 0x00 "MIXER1_RX10_0,MIXER_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "SPDIF1" group.long 0xC0++0x03 line.long 0x00 "SPDIF1_RX1_0,SPDIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xC4++0x03 line.long 0x00 "SPDIF1_RX2_0,SPDIF_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "AFC" group.long 0xD0++0x03 line.long 0x00 "AFC1_RX1_0,AFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xD4++0x03 line.long 0x00 "AFC2_RX1_0,AFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xD8++0x03 line.long 0x00 "AFC3_RX1_0,AFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xDC++0x03 line.long 0x00 "AFC4_RX1_0,AFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xE0++0x03 line.long 0x00 "AFC5_RX1_0,AFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0xE4++0x03 line.long 0x00 "AFC6_RX1_0,AFC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "OPE" group.long 0x100++0x03 line.long 0x00 "OPE1_RX1_0,OPE_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x104++0x03 line.long 0x00 "OPE2_RX1_0,OPE_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "MVC" group.long 0x120++0x03 line.long 0x00 "MVC1_RX1_0,MVC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x124++0x03 line.long 0x00 "MVC2_RX1_0,MVC_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "AMX1" group.long 0x140++0x03 line.long 0x00 "AMX1_RX1_0,AMX1_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x144++0x03 line.long 0x00 "AMX1_RX2_0,AMX1_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x148++0x03 line.long 0x00 "AMX1_RX3_0,AMX1_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x14C++0x03 line.long 0x00 "AMX1_RX4_0,AMX1_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "AMX2" group.long 0x150++0x03 line.long 0x00 "AMX1_RX1_0,AMX1_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x154++0x03 line.long 0x00 "AMX1_RX2_0,AMX1_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x158++0x03 line.long 0x00 "AMX1_RX3_0,AMX1_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x15C++0x03 line.long 0x00 "AMX1_RX4_0,AMX1_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end tree "ADX" group.long 0x160++0x03 line.long 0x00 "ADX1_RX1_0,ADX_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" group.long 0x164++0x03 line.long 0x00 "ADX2_RX1_0,ADX_RX Register" bitfld.long 0x00 31. " ADX2_TX4 ,ADX2_TX4" "Disabled,Enabled" bitfld.long 0x00 30. " ADX2_TX3 ,ADX2_TX3" "Disabled,Enabled" bitfld.long 0x00 29. " ADX2_TX2 ,ADX2_TX2" "Disabled,Enabled" bitfld.long 0x00 28. " ADX2_TX1 ,ADX2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " ADX1_TX4 ,ADX1_TX4" "Disabled,Enabled" bitfld.long 0x00 26. " ADX1_TX3 ,ADX1_TX3" "Disabled,Enabled" bitfld.long 0x00 25. " ADX1_TX2 ,ADX1_TX2" "Disabled,Enabled" bitfld.long 0x00 24. " ADX1_TX1 ,ADX1_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DMIC3_TX1 ,DMIC3_TX1" "Disabled,Enabled" bitfld.long 0x00 19. " DMIC2_TX1 ,DMIC2_TX1" "Disabled,Enabled" bitfld.long 0x00 18. " DMIC1_TX1 ,DMIC1_TX1" "Disabled,Enabled" bitfld.long 0x00 9. " MVC2_TX1 ,MVC2_TX1" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MVC1_TX1 ,MVC1_TX1" "Disabled,Enabled" bitfld.long 0x00 4. " SPKPROT1_TX1 ,SPKPROT1_TX1" "Disabled,Enabled" bitfld.long 0x00 1. " OPE2_TX1 ,OPE2_TX1" "Disabled,Enabled" bitfld.long 0x00 0. " OPE1_TX1 ,OPE1_TX1" "Disabled,Enabled" tree.end width 0x0B tree.end tree.end tree "SFC" tree "SFC1" base ad:0x702D2000 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x07 line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND , Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV , Stereo CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE , REPLICATE" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE , Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV , Mono CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_FREQ_0,AXBAR RX Frequency Register" bitfld.long 0x04 0.--3. " FS_IN ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..." rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x07 line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND , EXPAND" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV , Stereo CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE , REPLICATE" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE , Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV , Mono CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_FREQ_0, AXBAR_TX_FREQ_0 Register" bitfld.long 0x04 0.--3. " FS_IN ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..." group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 8. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 1. " TX_DONE ,TX done" "False,True" bitfld.long 0x04 0. " RX_DONE ,RX done" "False,True" width 0x0B tree.end tree "SFC2" base ad:0x702D2200 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x07 line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND , Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV , Stereo CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE , REPLICATE" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE , Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV , Mono CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_FREQ_0,AXBAR RX Frequency Register" bitfld.long 0x04 0.--3. " FS_IN ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..." rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x07 line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND , EXPAND" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV , Stereo CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE , REPLICATE" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE , Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV , Mono CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_FREQ_0, AXBAR_TX_FREQ_0 Register" bitfld.long 0x04 0.--3. " FS_IN ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..." group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 8. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 1. " TX_DONE ,TX done" "False,True" bitfld.long 0x04 0. " RX_DONE ,RX done" "False,True" width 0x0B tree.end tree "SFC3" base ad:0x702D2400 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x07 line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND , Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV , Stereo CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE , REPLICATE" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE , Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV , Mono CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_FREQ_0,AXBAR RX Frequency Register" bitfld.long 0x04 0.--3. " FS_IN ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..." rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x07 line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND , EXPAND" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV , Stereo CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE , REPLICATE" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE , Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV , Mono CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_FREQ_0, AXBAR_TX_FREQ_0 Register" bitfld.long 0x04 0.--3. " FS_IN ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..." group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 8. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 1. " TX_DONE ,TX done" "False,True" bitfld.long 0x04 0. " RX_DONE ,RX done" "False,True" width 0x0B tree.end tree "SFC4" base ad:0x702D2600 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x07 line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND , Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV , Stereo CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE , REPLICATE" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE , Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV , Mono CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_FREQ_0,AXBAR RX Frequency Register" bitfld.long 0x04 0.--3. " FS_IN ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..." rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x07 line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND , EXPAND" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV , Stereo CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE , REPLICATE" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE , Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV , Mono CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_FREQ_0, AXBAR_TX_FREQ_0 Register" bitfld.long 0x04 0.--3. " FS_IN ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..." group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 8. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 1. " TX_DONE ,TX done" "False,True" bitfld.long 0x04 0. " RX_DONE ,RX done" "False,True" width 0x0B tree.end tree.end tree "I2S" tree "I2S1" base ad:0x702D1000 width 31. group.long 0x00++0x07 line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 2. " RXCIF_FIFO_FULL ,RXCIF FIFO full" "False,True" bitfld.long 0x00 1. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " RX_ENABLED ,RX enabled" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 3. " RX_LOWER_WATERMARK ,RX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x0F line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,RX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--2. " HIGHZ_CTR ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..." textline " " bitfld.long 0x04 0. " BIT_ORDER ,BIT order" "MSB first,LSB first" line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register" bitfld.long 0x0C 0.--4. " TRIM_SEL ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x40++0x07 line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK ,TX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 3. " TX_LOWER_WATERMARK ,TX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x0F line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "ZERO,ONE,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,TX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " BIT_ORDER ,Bit order" "MSB first,LSB first" line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register" bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " TRIM_SEL_SLAVE ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_ENABLE ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 12. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 10. " RXCIF_FIFO_FULL ,RXCI FIFO full" "False,True" bitfld.long 0x00 9. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 8. " RX_ENABLED ,RX enabled" "False,True" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x04 11. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" bitfld.long 0x04 10. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" textline " " endif bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" bitfld.long 0x04 8. " RX_DONE ,RX done" "False,True" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 3. " TX_UPPER_WATERMARK ,TX upper watermark" "False,True" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" textline " " endif bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" bitfld.long 0x04 0. " TX_DONE ,TX done" "False,True" group.long 0xA0++0x0F line.long 0x00 "CTRL_0,Control Register" hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH ,Number of bit clocks" bitfld.long 0x00 20. " EDGE_CTR ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" else bitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" endif textline " " bitfld.long 0x00 12.--14. " FRAME_FORMAT ,Frame format" "LRCK mode,FSYNC mode,?..." bitfld.long 0x00 10. " MASTER ,Controller Master/Slave mode selection" "Disabled,Enabled" bitfld.long 0x00 9. " LRCK_POLARITY ,Left/Right control polarity" "Low,High" textline " " bitfld.long 0x00 8. " LPBK ,Tx->Rx loop back enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " BIT_SIZE ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32" line.long 0x04 "TIMING_0,Timing Register" bitfld.long 0x04 12. " NON_SYM_EN ,Enables non-symmetry mode" "Disabled,Enabled" hexmask.long.word 0x04 0.--10. 1. " CHANNEL_BIT_CNT ,Number of bit clocks" line.long 0x08 "SLOT_CTRL_0,Slot Control" bitfld.long 0x08 0.--3. " TOTAL_SLOTS ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CLK_TRIM_0,Clock Trimmer" bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " CORE_TRIM_SEL ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" width 0x0B tree.end tree "I2S2" base ad:0x702D1100 width 31. group.long 0x00++0x07 line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 2. " RXCIF_FIFO_FULL ,RXCIF FIFO full" "False,True" bitfld.long 0x00 1. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " RX_ENABLED ,RX enabled" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 3. " RX_LOWER_WATERMARK ,RX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x0F line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,RX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--2. " HIGHZ_CTR ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..." textline " " bitfld.long 0x04 0. " BIT_ORDER ,BIT order" "MSB first,LSB first" line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register" bitfld.long 0x0C 0.--4. " TRIM_SEL ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x40++0x07 line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK ,TX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 3. " TX_LOWER_WATERMARK ,TX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x0F line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "ZERO,ONE,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,TX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " BIT_ORDER ,Bit order" "MSB first,LSB first" line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register" bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " TRIM_SEL_SLAVE ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_ENABLE ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 12. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 10. " RXCIF_FIFO_FULL ,RXCI FIFO full" "False,True" bitfld.long 0x00 9. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 8. " RX_ENABLED ,RX enabled" "False,True" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x04 11. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" bitfld.long 0x04 10. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" textline " " endif bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" bitfld.long 0x04 8. " RX_DONE ,RX done" "False,True" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 3. " TX_UPPER_WATERMARK ,TX upper watermark" "False,True" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" textline " " endif bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" bitfld.long 0x04 0. " TX_DONE ,TX done" "False,True" group.long 0xA0++0x0F line.long 0x00 "CTRL_0,Control Register" hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH ,Number of bit clocks" bitfld.long 0x00 20. " EDGE_CTR ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" else bitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" endif textline " " bitfld.long 0x00 12.--14. " FRAME_FORMAT ,Frame format" "LRCK mode,FSYNC mode,?..." bitfld.long 0x00 10. " MASTER ,Controller Master/Slave mode selection" "Disabled,Enabled" bitfld.long 0x00 9. " LRCK_POLARITY ,Left/Right control polarity" "Low,High" textline " " bitfld.long 0x00 8. " LPBK ,Tx->Rx loop back enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " BIT_SIZE ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32" line.long 0x04 "TIMING_0,Timing Register" bitfld.long 0x04 12. " NON_SYM_EN ,Enables non-symmetry mode" "Disabled,Enabled" hexmask.long.word 0x04 0.--10. 1. " CHANNEL_BIT_CNT ,Number of bit clocks" line.long 0x08 "SLOT_CTRL_0,Slot Control" bitfld.long 0x08 0.--3. " TOTAL_SLOTS ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CLK_TRIM_0,Clock Trimmer" bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " CORE_TRIM_SEL ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" width 0x0B tree.end tree "I2S3" base ad:0x702D1200 width 31. group.long 0x00++0x07 line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 2. " RXCIF_FIFO_FULL ,RXCIF FIFO full" "False,True" bitfld.long 0x00 1. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " RX_ENABLED ,RX enabled" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 3. " RX_LOWER_WATERMARK ,RX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x0F line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,RX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--2. " HIGHZ_CTR ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..." textline " " bitfld.long 0x04 0. " BIT_ORDER ,BIT order" "MSB first,LSB first" line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register" bitfld.long 0x0C 0.--4. " TRIM_SEL ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x40++0x07 line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK ,TX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 3. " TX_LOWER_WATERMARK ,TX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x0F line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "ZERO,ONE,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,TX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " BIT_ORDER ,Bit order" "MSB first,LSB first" line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register" bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " TRIM_SEL_SLAVE ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_ENABLE ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 12. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 10. " RXCIF_FIFO_FULL ,RXCI FIFO full" "False,True" bitfld.long 0x00 9. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 8. " RX_ENABLED ,RX enabled" "False,True" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x04 11. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" bitfld.long 0x04 10. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" textline " " endif bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" bitfld.long 0x04 8. " RX_DONE ,RX done" "False,True" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 3. " TX_UPPER_WATERMARK ,TX upper watermark" "False,True" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" textline " " endif bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" bitfld.long 0x04 0. " TX_DONE ,TX done" "False,True" group.long 0xA0++0x0F line.long 0x00 "CTRL_0,Control Register" hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH ,Number of bit clocks" bitfld.long 0x00 20. " EDGE_CTR ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" else bitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" endif textline " " bitfld.long 0x00 12.--14. " FRAME_FORMAT ,Frame format" "LRCK mode,FSYNC mode,?..." bitfld.long 0x00 10. " MASTER ,Controller Master/Slave mode selection" "Disabled,Enabled" bitfld.long 0x00 9. " LRCK_POLARITY ,Left/Right control polarity" "Low,High" textline " " bitfld.long 0x00 8. " LPBK ,Tx->Rx loop back enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " BIT_SIZE ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32" line.long 0x04 "TIMING_0,Timing Register" bitfld.long 0x04 12. " NON_SYM_EN ,Enables non-symmetry mode" "Disabled,Enabled" hexmask.long.word 0x04 0.--10. 1. " CHANNEL_BIT_CNT ,Number of bit clocks" line.long 0x08 "SLOT_CTRL_0,Slot Control" bitfld.long 0x08 0.--3. " TOTAL_SLOTS ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CLK_TRIM_0,Clock Trimmer" bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " CORE_TRIM_SEL ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" width 0x0B tree.end tree "I2S4" base ad:0x702D1300 width 31. group.long 0x00++0x07 line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 2. " RXCIF_FIFO_FULL ,RXCIF FIFO full" "False,True" bitfld.long 0x00 1. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " RX_ENABLED ,RX enabled" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 3. " RX_LOWER_WATERMARK ,RX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x0F line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,RX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--2. " HIGHZ_CTR ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..." textline " " bitfld.long 0x04 0. " BIT_ORDER ,BIT order" "MSB first,LSB first" line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register" bitfld.long 0x0C 0.--4. " TRIM_SEL ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x40++0x07 line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK ,TX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 3. " TX_LOWER_WATERMARK ,TX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x0F line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "ZERO,ONE,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,TX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " BIT_ORDER ,Bit order" "MSB first,LSB first" line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register" bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " TRIM_SEL_SLAVE ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_ENABLE ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 12. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 10. " RXCIF_FIFO_FULL ,RXCI FIFO full" "False,True" bitfld.long 0x00 9. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 8. " RX_ENABLED ,RX enabled" "False,True" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x04 11. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" bitfld.long 0x04 10. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" textline " " endif bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" bitfld.long 0x04 8. " RX_DONE ,RX done" "False,True" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 3. " TX_UPPER_WATERMARK ,TX upper watermark" "False,True" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" textline " " endif bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" bitfld.long 0x04 0. " TX_DONE ,TX done" "False,True" group.long 0xA0++0x0F line.long 0x00 "CTRL_0,Control Register" hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH ,Number of bit clocks" bitfld.long 0x00 20. " EDGE_CTR ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" else bitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" endif textline " " bitfld.long 0x00 12.--14. " FRAME_FORMAT ,Frame format" "LRCK mode,FSYNC mode,?..." bitfld.long 0x00 10. " MASTER ,Controller Master/Slave mode selection" "Disabled,Enabled" bitfld.long 0x00 9. " LRCK_POLARITY ,Left/Right control polarity" "Low,High" textline " " bitfld.long 0x00 8. " LPBK ,Tx->Rx loop back enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " BIT_SIZE ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32" line.long 0x04 "TIMING_0,Timing Register" bitfld.long 0x04 12. " NON_SYM_EN ,Enables non-symmetry mode" "Disabled,Enabled" hexmask.long.word 0x04 0.--10. 1. " CHANNEL_BIT_CNT ,Number of bit clocks" line.long 0x08 "SLOT_CTRL_0,Slot Control" bitfld.long 0x08 0.--3. " TOTAL_SLOTS ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CLK_TRIM_0,Clock Trimmer" bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " CORE_TRIM_SEL ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" width 0x0B tree.end tree "I2S5" base ad:0x702D1400 width 31. group.long 0x00++0x07 line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 2. " RXCIF_FIFO_FULL ,RXCIF FIFO full" "False,True" bitfld.long 0x00 1. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " RX_ENABLED ,RX enabled" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "False,True" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 3. " RX_LOWER_WATERMARK ,RX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " RX_NORMAL_WATERMARK ,RX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x0F line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,RX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1.--2. " HIGHZ_CTR ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..." textline " " bitfld.long 0x04 0. " BIT_ORDER ,BIT order" "MSB first,LSB first" line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register" bitfld.long 0x0C 0.--4. " TRIM_SEL ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x40++0x07 line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK ,TX lower watermark" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "False,True" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 3. " TX_LOWER_WATERMARK ,TX lower watermark" "Unmasked,Masked" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "Unmasked,Masked" bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x0F line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" textline " " bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "ZERO,ONE,LFSR,?..." textline " " bitfld.long 0x00 4.--5. " STEREO_MONO_CONV ,Stereo mono CONV" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2.--3. " FIFO_SIZE_DOWNSHIFT ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3" endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " bitfld.long 0x00 0. " MONO_STEREO_CONV ,Mono stereo CONV" "Zero,Copy" line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register" hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET ,TX data offset to FSYNC" bitfld.long 0x04 4.--6. " MASK_BITS ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " BIT_ORDER ,Bit order" "MSB first,LSB first" line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register" hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES ,Used in TDM mode to indicate which of the TDM slots contain data" line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register" bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " TRIM_SEL_SLAVE ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Disabled,Enabled" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_ENABLE ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 12. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 10. " RXCIF_FIFO_FULL ,RXCI FIFO full" "False,True" bitfld.long 0x00 9. " RXCIF_FIFO_EMPTY ,RXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 8. " RX_ENABLED ,RX enabled" "False,True" bitfld.long 0x00 2. " TXCIF_FIFO_FULL ,TXCIF FIFO full" "False,True" bitfld.long 0x00 1. " TXCIF_FIFO_EMPTY ,TXCIF FIFO empty" "False,True" textline " " bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x04 11. " RX_LOWER_WATERMARK ,RX lower watermark" "False,True" bitfld.long 0x04 10. " RX_NORMAL_WATERMARK ,RX normal watermark" "False,True" textline " " endif bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN ,RXCIF FIFO underrun" "False,True" bitfld.long 0x04 8. " RX_DONE ,RX done" "False,True" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 3. " TX_UPPER_WATERMARK ,TX upper watermark" "False,True" bitfld.long 0x04 2. " TX_NORMAL_WATERMARK ,TX normal watermark" "False,True" textline " " endif bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN ,TXCIF FIFO overrun" "False,True" bitfld.long 0x04 0. " TX_DONE ,TX done" "False,True" group.long 0xA0++0x0F line.long 0x00 "CTRL_0,Control Register" hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH ,Number of bit clocks" bitfld.long 0x00 20. " EDGE_CTR ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" else bitfld.long 0x00 19. " PIPE_MACRO_EN ,Enable pipe macro stage" "Disabled,Enabled" endif textline " " bitfld.long 0x00 12.--14. " FRAME_FORMAT ,Frame format" "LRCK mode,FSYNC mode,?..." bitfld.long 0x00 10. " MASTER ,Controller Master/Slave mode selection" "Disabled,Enabled" bitfld.long 0x00 9. " LRCK_POLARITY ,Left/Right control polarity" "Low,High" textline " " bitfld.long 0x00 8. " LPBK ,Tx->Rx loop back enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " BIT_SIZE ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32" line.long 0x04 "TIMING_0,Timing Register" bitfld.long 0x04 12. " NON_SYM_EN ,Enables non-symmetry mode" "Disabled,Enabled" hexmask.long.word 0x04 0.--10. 1. " CHANNEL_BIT_CNT ,Number of bit clocks" line.long 0x08 "SLOT_CTRL_0,Slot Control" bitfld.long 0x08 0.--3. " TOTAL_SLOTS ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CLK_TRIM_0,Clock Trimmer" bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " CORE_TRIM_SEL ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" width 0x0B tree.end tree.end tree "SPDIF" base ad:0x702D6000 width 30. if (((d.l(ad:0x702D6000+0x00))&0x20000000)==0x20000000)||(((d.l(ad:0x702D6000+0x00))&0x10000000)==0x10000000) group.long 0x00++0x17 line.long 0x00 "SPDIF_CTRL_0,SPDIF Control Register" bitfld.long 0x00 31. " FLOWCTL_EN ,Enable flow control" "Disabled,Enabled" bitfld.long 0x00 30. " CAP_LC ,Start capturing from left/right channel" "Right_Ch,Left_Ch" bitfld.long 0x00 29. " RX_EN ,SPDIF receiver enable" "Disabled,Enabled" bitfld.long 0x00 28. " TX_EN ,SPDIF transmitter enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 27. " TC_EN ,Transmit channel status" "Disabled,Enabled" rbitfld.long 0x00 26. " TU_EN ,Transmit user data" "Disabled,Enabled" rbitfld.long 0x00 15. " LBK_EN ,Loopback test mode" "Disabled,Enabled" rbitfld.long 0x00 14. " PACK ,Pack data mode (Single data/Packeted left or right ch# data into a single word)" "Single,Packeted" textline " " rbitfld.long 0x00 12.--13. " BIT_MODE ,Bit mode" "16bit,20bit,24bit,Raw" bitfld.long 0x00 11. " CG_EN ,Second level clock gating enable" "Disabled,Enabled" bitfld.long 0x00 7. " SOFT_RESET ,Resets I2s logic including CIFs and flow control" "No reset,Reset" else group.long 0x00++0x17 line.long 0x00 "SPDIF_CTRL_0,SPDIF Control Register" bitfld.long 0x00 31. " FLOWCTL_EN ,Enable flow control" "Disabled,Enabled" bitfld.long 0x00 30. " CAP_LC ,Start capturing from left/right channel" "Right_Ch,Left_Ch" bitfld.long 0x00 29. " RX_EN ,SPDIF receiver enable" "Disabled,Enabled" bitfld.long 0x00 28. " TX_EN ,SPDIF transmitter enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " TC_EN ,Transmit Channel status" "Disabled,Enabled" bitfld.long 0x00 26. " TU_EN ,Transmit user Data" "Disabled,Enabled" bitfld.long 0x00 15. " LBK_EN ,Loopback test mode" "Disabled,Enabled" bitfld.long 0x00 14. " PACK ,Pack data mode (Single data/Packeted left or right ch# data into a single word)" "Single,Packeted" textline " " bitfld.long 0x00 12.--13. " BIT_MODE ,Bit mode" "16bit,20bit,24bit,Raw" bitfld.long 0x00 11. " CG_EN ,Second level clock gating" "Disabled,Enabled" bitfld.long 0x00 7. " SOFT_RESET ,Resets I2s logic including CIFs and flow control" "No reset,Reset" endif textline " " group.long 0x04++0x13 line.long 0x00 "SPDIF_STROBE_CTRL_0,SPDIF Data Strobe Control Register" hexmask.long.byte 0x00 16.--23. 1. " PERIOD ,Indicates the approximate number of detected SPDIFIN clocks within a biphase period" bitfld.long 0x00 15. " STROBE ,SPDIFIN Data Strobe Mode" "Auto,Manual" bitfld.long 0x00 8.--12. " DATA_STROBES ,Manual data strobe time within the biphase clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--5. " CLOCK_PERIOD ,Manual SPDIFIN biphase clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x8++0x03 line.long 0x00 "SPDIF_AUDIOCIF_TXDATA_CTRL_0,SPDIF AUDIOCIF TXDATA Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AUDIO_CHANNELS ,Audio channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16" bitfld.long 0x00 12.--14. " AUDIO_BITS ,Audio bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "Ch0,Ch1,AVG,?..." bitfld.long 0x00 3. " REPLICATE ,Replicate" "Disabled,Enabled" textline " " rbitfld.long 0x00 2. " DIRCETION ,Direction" "TXCIF,RXCIF" bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0xC++0x03 line.long 0x00 "SPDIF_AUDIOCIF_RXDATA_CTRL_0,SPDIF AUDIOCIF RXDATA Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AUDIO_CHANNELS ,Audio channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16" bitfld.long 0x00 12.--14. " AUDIO_BITS ,Audio bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "Ch0,Ch1,AVG,?..." bitfld.long 0x00 3. " REPLICATE ,Replicate" "Disabled,Enabled" textline " " rbitfld.long 0x00 2. " DIRCETION ,Direction" "TXCIF,RXCIF" bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x10++0x03 line.long 0x00 "SPDIF_AUDIOCIF_TXUSER_CTRL_0,SPDIF AUDIOCIF TXUSER Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AUDIO_CHANNELS ,Audio channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16" bitfld.long 0x00 12.--14. " AUDIO_BITS ,Audio bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "Ch0,Ch1,AVG,?..." bitfld.long 0x00 3. " REPLICATE ,Replicate" "Disabled,Enabled" textline " " rbitfld.long 0x00 2. " DIRCETION ,Direction" "TXCIF,RXCIF" bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x14++0x03 line.long 0x00 "SPDIF_AUDIOCIF_RXUSER_CTRL_0,SPDIF AUDIOCIF RXUSER Control Register" bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--23. " AUDIO_CHANNELS ,Audio channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16" bitfld.long 0x00 12.--14. " AUDIO_BITS ,Audio bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "Ch0,Ch1,AVG,?..." bitfld.long 0x00 3. " REPLICATE ,Replicate" "Disabled,Enabled" textline " " rbitfld.long 0x00 2. " DIRCETION ,Direction" "TXCIF,RXCIF" bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x18++0x17 line.long 0x00 "SPDIF_CH_STA_RX_A_0,SPDIF Channel Status Rx Page Buffer Register A" line.long 0x04 "SPDIF_CH_STA_RX_B_0,SPDIF Channel Status Rx Page Buffer Register B" line.long 0x08 "SPDIF_CH_STA_RX_C_0,SPDIF Channel Status Rx Page Buffer Register C" line.long 0x0C "SPDIF_CH_STA_RX_D_0,SPDIF Channel Status Rx Page Buffer Register D" line.long 0x10 "SPDIF_CH_STA_RX_E_0,SPDIF Channel Status Rx Page Buffer Register E" line.long 0x14 "SPDIF_CH_STA_RX_F_0,SPDIF Channel Status Rx Page Buffer Register F" group.long 0x30++0x17 line.long 0x00 "SPDIF_CH_STA_TX_A_0,SPDIF Channel Status Tx Page Buffer Register A" line.long 0x04 "SPDIF_CH_STA_TX_B_0,SPDIF Channel Status Tx Page Buffer Register B" line.long 0x08 "SPDIF_CH_STA_TX_C_0,SPDIF Channel Status Tx Page Buffer Register C" line.long 0x0C "SPDIF_CH_STA_TX_D_0,SPDIF Channel Status Tx Page Buffer Register D" line.long 0x10 "SPDIF_CH_STA_TX_E_0,SPDIF Channel Status Tx Page Buffer Register E" line.long 0x14 "SPDIF_CH_STA_TX_F_0,SPDIF Channel Status Tx Page Buffer Register F" group.long 0x70++0x0B line.long 0x00 "SPDIF_FLOWCTL_CTRL_0,SPDIF Flowctl Ctrl 0" sif cpuis("TEGRAX2") rbitfld.long 0x00 31. " FILTER ,Quadric filter" "Linear,Quad" elif cpuis("TEGRAX1") bitfld.long 0x00 31. " FILTER ,Quadric filter" "Linear,Quad" else bitfld.long 0x00 31. " FILTER ,Quadric filter" ",Quad" endif bitfld.long 0x00 30. " DUMMY_WR_EN ,Insert a dummy frame when enabled" "Disabled,Enabled" bitfld.long 0x00 8.--11. " START_THRESHOLD ,Flow control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 4.--7. " HIGH_THRESHOLD ,High-threshold for HIGH state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x00 0.--3. " LOW_THRESHOLD ,Low-threshold for LOW state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "SPDIF_TX_STEP_0,SPDIF TX Step" hexmask.long.word 0x04 0.--15. 1. " STEP_SIZE ,Step size" line.long 0x08 "SPDIF_FLOW_STATUS_0,Flow Controller Monitor/Counter" bitfld.long 0x08 31. " FLOW_UNDERFLOW ,FIFO depth is less than threshold" "Normal,Under" bitfld.long 0x08 30. " FLOW_OVERFLOW ,FIFO depth is greater than threshold" "Normal,Over" bitfld.long 0x08 4. " MONITOR_INT_EN ,Enable monitor interrupt to APBIF" "Disabled,Enabled" bitfld.long 0x08 3. " COUNTER_CLR ,Clear counter" "0,1" textline " " bitfld.long 0x08 2. " MONITOR_CLR ,Clear monitor" "0,1" bitfld.long 0x08 1. " COUNTER_EN ,Enable counter" "Disabled,Enabled" bitfld.long 0x08 0. " MONITOR_EN ,Enable monitor" "Disabled,Enabled" rgroup.long 0x7C++0x0B line.long 0x00 "SPDIF_FLOW_TOTAL_0,Spdif Flow Total" line.long 0x04 "SPDIF_FLOW_OVER_0,Spdif Flow Over" line.long 0x08 "SPDIF_FLOW_UNDER_0,Spdif Flow Under" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) group.long 0xAC++0x07 line.long 0x00 "SPDIF_INT_STATUS_0_SET/CLR,SPDIF Interrupt Status Register" setclrfld.long 0x00 15. 0x08 15. 0x0C 15. " USER_TX_DONE ,User TX done" "False,True" setclrfld.long 0x00 14. 0x08 14. 0x0C 14. " USER_RX_DONE ,User RX done" "False,True" setclrfld.long 0x00 13. 0x08 13. 0x0C 13. " DATA_TX_DONE ,Data TX done" "False,True" textline " " setclrfld.long 0x00 12. 0x08 12. 0x0C 12. " DATA_RX_DONE ,Data RX done" "False,True" setclrfld.long 0x00 11. 0x08 11. 0x0C 11. " USER_TXCIF_OVERRUN ,User TXCIF overrun" "False,True" setclrfld.long 0x00 10. 0x08 10. 0x0C 10. " DATA_TXCIF_OVERRUN ,Data TXCIF overrun" "False,True" textline " " setclrfld.long 0x00 9. 0x08 9. 0x0C 9. " USER_RXCIF_UNDERRUN ,User RXCIF underrun" "False,True" setclrfld.long 0x00 8. 0x08 8. 0x0C 8. " DATA_RXCIF_UNDERRUN ,Data RXCIF underrun" "False,True" setclrfld.long 0x00 4. 0x08 4. 0x0C 4. " RX_IU ,RX IU" "False,True" textline " " setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_CHANNEL ,RX channel" "False,True" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " FLOW_CTL_INT ,Flow CTL INT" "False,True" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " BAD_PREAMBLE ,Bad preamble" "False,True" textline " " setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " BSYNC ,BSYNC" "False,True" line.long 0x04 "SPDIF_INT_MASK_0,SPDIF Interrupt Mask Register" bitfld.long 0x04 15. " USER_TX_DONE ,User TX done" "Unmasked,Masked" bitfld.long 0x04 14. " USER_RX_DONE ,User RX done" "Unmasked,Masked" bitfld.long 0x04 13. " DATA_TX_DONE ,Data TX done" "Unmasked,Masked" textline " " bitfld.long 0x04 12. " DATA_RX_DONE ,Data RX done" "Unmasked,Masked" bitfld.long 0x04 11. " USER_TXCIF_OVERRUN ,User TXCIF overrun" "Unmasked,Masked" bitfld.long 0x04 10. " DATA_TXCIF_OVERRUN ,Data TXCIF overrun" "Unmasked,Masked" textline " " bitfld.long 0x04 9. " USER_RXCIF_UNDERRUN ,User RXCIF underrun" "Unmasked,Masked" bitfld.long 0x04 8. " DATA_RXCIF_UNDERRUN ,Data RXCIF underrun" "Unmasked,Masked" bitfld.long 0x04 4. " RX_IU ,RX IU" "Unmasked,Masked" textline " " bitfld.long 0x04 3. " RX_CHANNEL ,RX channel" "Unmasked,Masked" bitfld.long 0x04 2. " FLOW_CTL_INT ,Flow CTL INT" "Unmasked,Masked" bitfld.long 0x04 1. " BAD_PREAMBLE ,Bad preamble" "Unmasked,Masked" textline " " bitfld.long 0x04 0. " BSYNC ,BSYNC" "Unmasked,Masked" rgroup.long 0xBC++0x03 line.long 0x00 "SPDIF_LIVE_STATUS_0,SPDIF Live Status Register" bitfld.long 0x00 24. " TXC_BSY ,TXC BSY" "0,1" bitfld.long 0x00 19. " USER_TX_FIFO_FULL ,User TX FIFO full" "False,True" bitfld.long 0x00 18. " USER_TX_FIFO_EMPTY ,User TX FIFO empty" "False,True" textline " " bitfld.long 0x00 17. " DATA_TX_FIFO_FULL ,Data TX FIFO full" "False,True" bitfld.long 0x00 16. " DATA_TX_FIFO_EMPTY ,Data TX FIFO empty" "False,True" bitfld.long 0x00 11. " USER_RX_FIFO_FULL ,User RX FIFO full" "False,True" textline " " bitfld.long 0x00 10. " USER_RX_FIFO_EMPTY ,User RX FIFO empty" "False,True" bitfld.long 0x00 9. " DATA_RX_FIFO_FULL ,Data RX FIFO full" "False,True" bitfld.long 0x00 8. " DATA_RX_FIFO_EMPTY ,Data RX FIFO empty" "False,True" textline " " bitfld.long 0x00 3. " USER_TX_ENABLED ,User TX enabled" "False,True" bitfld.long 0x00 2. " USER_RX_ENABLED ,User RX enabled" "False,True" bitfld.long 0x00 1. " DATA_TX_ENABLED ,Data TX enabled" "False,True" textline " " bitfld.long 0x00 0. " DATA_RX_ENABLED ,Data RX enabled" "False,True" endif width 0x0B tree.end tree "AMX" tree "AMX1" base ad:0x702D3000 width 35. rgroup.long 0x0C++0x03 line.long 0x00 "AMX_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 7. " ACIF_FIFO4_FULL ,ACIF FIFO4 full" "False,True" bitfld.long 0x00 6. " ACIF_FIFO4_EMPTY ,ACIF FIFO4 empty" "False,True" bitfld.long 0x00 5. " ACIF_FIFO3_FULL ,ACIF FIFO3 full" "False,True" bitfld.long 0x00 4. " ACIF_FIFO3_EMPTY ,ACIF FIFO3 empty" "False,True" textline " " bitfld.long 0x00 3. " ACIF_FIFO2_FULL ,ACIF FIFO2 full" "False,True" bitfld.long 0x00 2. " ACIF_FIFO2_EMPTY ,ACIF FIFO2 empty" "False,True" bitfld.long 0x00 1. " ACIF_FIFO1_FULL ,ACIF FIFO1 full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO1_EMPTY ,ACIF FIFO1 empty" "False,True" group.long 0x10++0x07 line.long 0x00 "AMX_AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX4_DONE ,RX4 done" "Clear,Set" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " RX3_DONE ,RX3 done" "Clear,Set" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RX2_DONE ,RX2 done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX1_DONE ,RX1 done" "Clear,Set" line.long 0x04 "AMX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 3. " RX4_DONE ,RX4 done" "Unmasked,Masked" bitfld.long 0x04 2. " RX3_DONE ,RX3 done" "Unmasked,Masked" bitfld.long 0x04 1. " RX2_DONE ,RX2 done" "Unmasked,Masked" bitfld.long 0x04 0. " RX1_DONE ,RX1 done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "AMX_AXBAR_RX1_CIF_CTRL_0,AXBAR RX1 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x24++0x03 line.long 0x00 "AMX_AXBAR_RX2_CIF_CTRL_0,AXBAR RX2 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x28++0x03 line.long 0x00 "AMX_AXBAR_RX3_CIF_CTRL_0,AXBAR RX3 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x2C++0x03 line.long 0x00 "AMX_AXBAR_RX4_CIF_CTRL_0,AXBAR RX4 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif rgroup.long 0x4C++0x03 line.long 0x00 "AMX_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x50++0x07 line.long 0x00 "AMX_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "Clear,Set" line.long 0x04 "AMX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AMX_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x80++0x0B line.long 0x00 "AMX_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AMX_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "AMX_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "AMX_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "False,True" bitfld.long 0x00 8. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "AMX_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 4. " TX_DONE ,TX done" "Clear,Set" bitfld.long 0x04 3. " RX4_DONE ,RX4 done" "Clear,Set" bitfld.long 0x04 2. " RX3_DONE ,RX3 done" "Clear,Set" bitfld.long 0x04 1. " RX2_DONE ,RX2 done" "Clear,Set" textline " " bitfld.long 0x04 0. " RX1_DONE ,RX1 done" "Clear,Set" group.long 0xA4++0x0B line.long 0x00 "AMX_CTRL_0,AMX Control Register" bitfld.long 0x00 14.--15. " MSTR_RX_NUM ,MSTR_RX_NUM" "RX1,RX2,RX3,RX4" bitfld.long 0x00 12.--13. " RX_DEP ,RX_DEP" "WT_ON_ALL,WT_ON_ANY,?..." bitfld.long 0x00 11. " RX4_FORCE_DISABLE ,RX4 force disable" "Disabled,Enabled" bitfld.long 0x00 10. " RX3_FORCE_DISABLE ,RX3 force disable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RX2_FORCE_DISABLE ,RX2 force disable" "Disabled,Enabled" bitfld.long 0x00 8. " RX1_FORCE_DISABLE ,RX1 force disable" "Disabled,Enabled" bitfld.long 0x00 3. " RX4_EN ,RX4 enable" "Disabled,Enabled" bitfld.long 0x00 2. " RX3_EN ,RX3 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RX2_EN ,RX2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " RX1_EN ,RX1 enable" "Disabled,Enabled" line.long 0x04 "AMX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register" line.long 0x08 "AMX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register" width 0x0B tree.end tree "AMX2" base ad:0x702D3100 width 35. rgroup.long 0x0C++0x03 line.long 0x00 "AMX_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 7. " ACIF_FIFO4_FULL ,ACIF FIFO4 full" "False,True" bitfld.long 0x00 6. " ACIF_FIFO4_EMPTY ,ACIF FIFO4 empty" "False,True" bitfld.long 0x00 5. " ACIF_FIFO3_FULL ,ACIF FIFO3 full" "False,True" bitfld.long 0x00 4. " ACIF_FIFO3_EMPTY ,ACIF FIFO3 empty" "False,True" textline " " bitfld.long 0x00 3. " ACIF_FIFO2_FULL ,ACIF FIFO2 full" "False,True" bitfld.long 0x00 2. " ACIF_FIFO2_EMPTY ,ACIF FIFO2 empty" "False,True" bitfld.long 0x00 1. " ACIF_FIFO1_FULL ,ACIF FIFO1 full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO1_EMPTY ,ACIF FIFO1 empty" "False,True" group.long 0x10++0x07 line.long 0x00 "AMX_AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX4_DONE ,RX4 done" "Clear,Set" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " RX3_DONE ,RX3 done" "Clear,Set" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RX2_DONE ,RX2 done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX1_DONE ,RX1 done" "Clear,Set" line.long 0x04 "AMX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 3. " RX4_DONE ,RX4 done" "Unmasked,Masked" bitfld.long 0x04 2. " RX3_DONE ,RX3 done" "Unmasked,Masked" bitfld.long 0x04 1. " RX2_DONE ,RX2 done" "Unmasked,Masked" bitfld.long 0x04 0. " RX1_DONE ,RX1 done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "AMX_AXBAR_RX1_CIF_CTRL_0,AXBAR RX1 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x24++0x03 line.long 0x00 "AMX_AXBAR_RX2_CIF_CTRL_0,AXBAR RX2 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x28++0x03 line.long 0x00 "AMX_AXBAR_RX3_CIF_CTRL_0,AXBAR RX3 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x2C++0x03 line.long 0x00 "AMX_AXBAR_RX4_CIF_CTRL_0,AXBAR RX4 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif rgroup.long 0x4C++0x03 line.long 0x00 "AMX_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x50++0x07 line.long 0x00 "AMX_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "Clear,Set" line.long 0x04 "AMX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AMX_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x80++0x0B line.long 0x00 "AMX_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AMX_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "AMX_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "AMX_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "False,True" bitfld.long 0x00 8. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "AMX_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 4. " TX_DONE ,TX done" "Clear,Set" bitfld.long 0x04 3. " RX4_DONE ,RX4 done" "Clear,Set" bitfld.long 0x04 2. " RX3_DONE ,RX3 done" "Clear,Set" bitfld.long 0x04 1. " RX2_DONE ,RX2 done" "Clear,Set" textline " " bitfld.long 0x04 0. " RX1_DONE ,RX1 done" "Clear,Set" group.long 0xA4++0x0B line.long 0x00 "AMX_CTRL_0,AMX Control Register" bitfld.long 0x00 14.--15. " MSTR_RX_NUM ,MSTR_RX_NUM" "RX1,RX2,RX3,RX4" bitfld.long 0x00 12.--13. " RX_DEP ,RX_DEP" "WT_ON_ALL,WT_ON_ANY,?..." bitfld.long 0x00 11. " RX4_FORCE_DISABLE ,RX4 force disable" "Disabled,Enabled" bitfld.long 0x00 10. " RX3_FORCE_DISABLE ,RX3 force disable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RX2_FORCE_DISABLE ,RX2 force disable" "Disabled,Enabled" bitfld.long 0x00 8. " RX1_FORCE_DISABLE ,RX1 force disable" "Disabled,Enabled" bitfld.long 0x00 3. " RX4_EN ,RX4 enable" "Disabled,Enabled" bitfld.long 0x00 2. " RX3_EN ,RX3 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RX2_EN ,RX2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " RX1_EN ,RX1 enable" "Disabled,Enabled" line.long 0x04 "AMX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register" line.long 0x08 "AMX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register" width 0x0B tree.end tree.end tree "ADX" tree "ADX1" base ad:0x702D3800 width 27. rgroup.long 0x0C++0x03 line.long 0x00 "ADX_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "ADX_AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR ,RX done" "Clear,Set" line.long 0x04 "ADX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "ADX_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif rgroup.long 0x4C++0x03 line.long 0x00 "ADX_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 7. " ACIF_FIFO4_FULL ,ACIF FIFO4 full" "False,True" bitfld.long 0x00 6. " ACIF_FIFO4_EMPTY ,ACIF FIFO4 empty" "False,True" bitfld.long 0x00 5. " ACIF_FIFO3_FULL ,ACIF FIFO3 full" "False,True" bitfld.long 0x00 4. " ACIF_FIFO3_EMPTY ,ACIF FIFO3 empty" "False,True" textline " " bitfld.long 0x00 3. " ACIF_FIFO2_FULL ,ACIF FIFO2 full" "False,True" bitfld.long 0x00 2. " ACIF_FIFO2_EMPTY ,ACIF FIFO2 empty" "False,True" bitfld.long 0x00 1. " ACIF_FIFO1_FULL ,ACIF FIFO1 full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO1_EMPTY ,ACIF FIFO1 empty" "False,True" group.long 0x50++0x07 line.long 0x00 "ADX_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX4_DONE_SET/CLR ,TX4 done" "Clear,Set" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX3_DONE_SET/CLR ,TX3 done" "Clear,Set" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TX2_DONE_SET/CLR ,TX2 done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX1_DONE_SET/CLR ,TX1 done" "Clear,Set" line.long 0x04 "ADX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 3. " TX4_DONE ,TX4 done" "Unmasked,Masked" bitfld.long 0x04 2. " TX3_DONE ,TX3 done" "Unmasked,Masked" bitfld.long 0x04 1. " TX2_DONE ,TX2 done" "Unmasked,Masked" bitfld.long 0x04 0. " TX1_DONE ,TX1 done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "ADX_AXBAR_TX1_CIF_CTRL_0,AXBAR TX1 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x64++0x03 line.long 0x00 "ADX_AXBAR_TX2_CIF_CTRL_0,AXBAR TX2 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x68++0x03 line.long 0x00 "ADX_AXBAR_TX3_CIF_CTRL_0,AXBAR TX3 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x6C++0x03 line.long 0x00 "ADX_AXBAR_TX4_CIF_CTRL_0,AXBAR TX4 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x80++0x0B line.long 0x00 "ADX_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "ADX_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "ADX_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "ADX_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "False,True" bitfld.long 0x00 8. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "ADX_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 4. " RX_DONE ,RX done" "Clear,Set" bitfld.long 0x04 3. " TX4_DONE ,TX4 done" "Clear,Set" bitfld.long 0x04 2. " TX3_DONE ,TX3 done" "Clear,Set" bitfld.long 0x04 1. " TX2_DONE ,TX2 done" "Clear,Set" textline " " bitfld.long 0x04 0. " TX1_DONE ,TX1 done" "Clear,Set" group.long 0xA4++0x0B line.long 0x00 "ADX_CTRL_0,ADX Control Register" bitfld.long 0x00 11. " TX4_FORCE_DISABLE ,TX4 force disable" "Disabled,Enabled" bitfld.long 0x00 10. " TX3_FORCE_DISABLE ,TX3 force disable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TX2_FORCE_DISABLE ,TX2 force disable" "Disabled,Enabled" bitfld.long 0x00 8. " TX1_FORCE_DISABLE ,TX1 force disable" "Disabled,Enabled" bitfld.long 0x00 3. " TX4_EN ,TX4 enable" "Disabled,Enabled" bitfld.long 0x00 2. " TX3_EN ,TX3 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TX2_EN ,TX2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " TX1_EN ,TX1 enable" "Disabled,Enabled" line.long 0x04 "ADX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register" line.long 0x08 "ADX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register" width 0x0B tree.end tree "ADX2" base ad:0x702D3900 width 27. rgroup.long 0x0C++0x03 line.long 0x00 "ADX_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "ADX_AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR ,RX done" "Clear,Set" line.long 0x04 "ADX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "ADX_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif rgroup.long 0x4C++0x03 line.long 0x00 "ADX_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 7. " ACIF_FIFO4_FULL ,ACIF FIFO4 full" "False,True" bitfld.long 0x00 6. " ACIF_FIFO4_EMPTY ,ACIF FIFO4 empty" "False,True" bitfld.long 0x00 5. " ACIF_FIFO3_FULL ,ACIF FIFO3 full" "False,True" bitfld.long 0x00 4. " ACIF_FIFO3_EMPTY ,ACIF FIFO3 empty" "False,True" textline " " bitfld.long 0x00 3. " ACIF_FIFO2_FULL ,ACIF FIFO2 full" "False,True" bitfld.long 0x00 2. " ACIF_FIFO2_EMPTY ,ACIF FIFO2 empty" "False,True" bitfld.long 0x00 1. " ACIF_FIFO1_FULL ,ACIF FIFO1 full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO1_EMPTY ,ACIF FIFO1 empty" "False,True" group.long 0x50++0x07 line.long 0x00 "ADX_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX4_DONE_SET/CLR ,TX4 done" "Clear,Set" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX3_DONE_SET/CLR ,TX3 done" "Clear,Set" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TX2_DONE_SET/CLR ,TX2 done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX1_DONE_SET/CLR ,TX1 done" "Clear,Set" line.long 0x04 "ADX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 3. " TX4_DONE ,TX4 done" "Unmasked,Masked" bitfld.long 0x04 2. " TX3_DONE ,TX3 done" "Unmasked,Masked" bitfld.long 0x04 1. " TX2_DONE ,TX2 done" "Unmasked,Masked" bitfld.long 0x04 0. " TX1_DONE ,TX1 done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "ADX_AXBAR_TX1_CIF_CTRL_0,AXBAR TX1 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x64++0x03 line.long 0x00 "ADX_AXBAR_TX2_CIF_CTRL_0,AXBAR TX2 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x68++0x03 line.long 0x00 "ADX_AXBAR_TX3_CIF_CTRL_0,AXBAR TX3 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x6C++0x03 line.long 0x00 "ADX_AXBAR_TX4_CIF_CTRL_0,AXBAR TX4 CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x80++0x0B line.long 0x00 "ADX_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "ADX_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "ADX_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "ADX_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "False,True" bitfld.long 0x00 8. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "ADX_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 4. " RX_DONE ,RX done" "Clear,Set" bitfld.long 0x04 3. " TX4_DONE ,TX4 done" "Clear,Set" bitfld.long 0x04 2. " TX3_DONE ,TX3 done" "Clear,Set" bitfld.long 0x04 1. " TX2_DONE ,TX2 done" "Clear,Set" textline " " bitfld.long 0x04 0. " TX1_DONE ,TX1 done" "Clear,Set" group.long 0xA4++0x0B line.long 0x00 "ADX_CTRL_0,ADX Control Register" bitfld.long 0x00 11. " TX4_FORCE_DISABLE ,TX4 force disable" "Disabled,Enabled" bitfld.long 0x00 10. " TX3_FORCE_DISABLE ,TX3 force disable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TX2_FORCE_DISABLE ,TX2 force disable" "Disabled,Enabled" bitfld.long 0x00 8. " TX1_FORCE_DISABLE ,TX1 force disable" "Disabled,Enabled" bitfld.long 0x00 3. " TX4_EN ,TX4 enable" "Disabled,Enabled" bitfld.long 0x00 2. " TX3_EN ,TX3 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TX2_EN ,TX2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " TX1_EN ,TX1 enable" "Disabled,Enabled" line.long 0x04 "ADX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register" line.long 0x08 "ADX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register" width 0x0B tree.end tree.end tree "Audio Bridge" base ad:0x702EE000 width 30. group.long 0x00++0x03 line.long 0x00 "ABRIDGE_IDLE_0,IDLE Register" bitfld.long 0x00 0. " IDLE_EN ,IDLE enable" "Disabled,Enabled" rgroup.long 0x04++0x0F line.long 0x00 "ABRIDGE_STATS_READ_0_0,STATS_READ Register" line.long 0x04 "ABRIDGE_STATS_READ_0_1,ASTATS_READ Register" line.long 0x08 "ABRIDGE_STATS_WRITE_0_0,STATS_WRITE Register" line.long 0x0C "ABRIDGE_STATS_WRITE_0_1,STATS_WRITE Register" group.long 0x14++0x0B line.long 0x00 "ABRIDGE_STATS_CLEAR_0_0,STATS_CLEAR Register" bitfld.long 0x00 1. " CLEAR_WRITE_COUNT ,Clear write count" "0,1" bitfld.long 0x00 0. " CLEAR_READ_COUNT ,Clear read count" "0,1" line.long 0x04 "ABRIDGE_STATS_CLEAR_0_1,STATS_CLEAR Register" bitfld.long 0x04 1. " CLEAR_WRITE_COUNT ,Clear write count" "0,1" bitfld.long 0x04 0. " CLEAR_READ_COUNT ,Clear read count" "0,1" line.long 0x08 "ABRIDGE_SPARE_0,SPARE Register" group.long 0x70++0x03 line.long 0x00 "ABRIDGE_APE_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control and Clock Gating Control Register" bitfld.long 0x00 20. " APE_RCLK_OVR_MODE ,APE_RCLK_OVR mode" "Legacy,On" bitfld.long 0x00 19. " APE_WCLK_OVR_MODE ,APE_WCLK_OVR mode" "Legacy,On" bitfld.long 0x00 18. " APE_CCLK_OVERRIDE ,APE_CCLK override" "0,1" textline " " bitfld.long 0x00 17. " APE_RCLK_OVERRIDE ,APE_RCLK override" "0,1" bitfld.long 0x00 16. " APE_WCLK_OVERRIDE ,APE_WCLK override" "0,1" bitfld.long 0x00 3. " APE_MCCIF_RDCL_RDFAST ,APE_MCCIF_RDCL_RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " APE_MCCIF_WRMC_CLLE2X ,APE_MCCIF_WRMC_CLLE2X" "Disabled,Enabled" bitfld.long 0x00 1. " APE_MCCIF_RDMC_RDFAST ,APE_MCCIF_RDMC_RDFAST" "Disabled,Enabled" bitfld.long 0x00 0. " APE_MCCIF_WRCL_MCLE2X ,APE_MCCIF_WRCL_MCLE2X" "Disabled,Enabled" width 0x0B tree.end tree "OPE" tree "OPE1" base ad:0x702D8000 width 23. rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR ,RX done" "Clear,Set" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR ,TX done" "Clear,Set" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 8. " CLKEN ,CLKEN" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 1. " TX_DONE ,TX done" "Clear,Set" textline " " bitfld.long 0x04 0. " RX_DONE ,RX done" "Clear,Set" group.long 0x94++0x03 line.long 0x00 "DIRECTION_0,Direction Register" bitfld.long 0x00 0. " DIR ,Data flow direction" "MBDRC to PEQ,PEQ to MBDRC" width 0x0B tree.end tree "OPE2" base ad:0x702D8400 width 23. rgroup.long 0x0C++0x03 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR ,RX done" "Clear,Set" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif rgroup.long 0x4C++0x03 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR ,TX done" "Clear,Set" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif (cpuis("TEGRAX2")) rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." endif sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " sif (cpuis("TEGRAX2")) rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" else bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" endif group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "False,True" rgroup.long 0x8C++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 8. " CLKEN ,CLKEN" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 1. " TX_DONE ,TX done" "Clear,Set" textline " " bitfld.long 0x04 0. " RX_DONE ,RX done" "Clear,Set" group.long 0x94++0x03 line.long 0x00 "DIRECTION_0,Direction Register" bitfld.long 0x00 0. " DIR ,Data flow direction" "MBDRC to PEQ,PEQ to MBDRC" width 0x0B tree.end tree.end tree "PEQ" tree "PEQ1" base ad:0x702D8100 width 29. group.long 0x00++0x07 line.long 0x00 "PEQ_SOFT_RST_0,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Resets PEQ logic" "No reset,Reset" line.long 0x04 "PEQ_CG_0,CG Register" bitfld.long 0x04 0. " SLCG_EN ,Enables second level clock gating" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "PEQ_STATUS_0,Status Register" bitfld.long 0x00 0. " SLCG_CLKEN ,Idle detect enable" "False,True" group.long 0x0C++0x13 line.long 0x00 "PEQ_CONFIG_0,Config Register" bitfld.long 0x00 2.--5. " BIQUAD_STAGES ,Number of BiQuad stages in PEQ chain" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0x00 1. " BIAS_UNBIAS ,Rounding option across all rounding operations of MBDRC" "Bias,Unbias" bitfld.long 0x00 0. " MODE ,Select mode" "Bypass,Active" line.long 0x04 "PEQ_AHUBRAMCTL_PEQ_CTRL_0,AHUBRAMCTL PEQ Control Register" rbitfld.long 0x04 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x04 16.--23. 1. " SEQ_READ_COUNT ,Sequence read count" bitfld.long 0x04 14. " RW ,RW" "Read,Write" bitfld.long 0x04 13. " ADDR_INIT_EN ,Address init enable" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " SEQ_ACCESS_EN ,SEQ access enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--8. 0x01 " RAM_ADDR ,RAM address" line.long 0x08 "PEQ_AHUBRAMCTL_PEQ_DATA_0,AHUBRAMCTL PEQ Data Register" line.long 0x0C "PEQ_AHUBRAMCTL_SHIFT_CTRL_0,AHUBRAMCTL Shift Control Register" rbitfld.long 0x0C 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x0C 16.--23. 1. " ,SEQ_READ_COUNT,Sequence read count" bitfld.long 0x0C 14. " RW ,RW" "Read,Write" bitfld.long 0x0C 13. " ADDR_INIT_EN ,Address init enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " SEQ_ACCESS_EN ,Sequence access enable" "Disabled,Enabled" hexmask.long.word 0x0C 0.--8. 0x01 " RAM_ADDR ,RAM address" line.long 0x10 "PEQ_AHUBRAMCTL_SHIFT_DATA_0,AHUBRAMCTL Shift Data Register" width 0x0B tree.end tree "PEQ2" base ad:0x702D8500 width 29. group.long 0x00++0x07 line.long 0x00 "PEQ_SOFT_RST_0,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Resets PEQ logic" "No reset,Reset" line.long 0x04 "PEQ_CG_0,CG Register" bitfld.long 0x04 0. " SLCG_EN ,Enables second level clock gating" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "PEQ_STATUS_0,Status Register" bitfld.long 0x00 0. " SLCG_CLKEN ,Idle detect enable" "False,True" group.long 0x0C++0x13 line.long 0x00 "PEQ_CONFIG_0,Config Register" bitfld.long 0x00 2.--5. " BIQUAD_STAGES ,Number of BiQuad stages in PEQ chain" "1,2,3,4,5,6,7,8,9,10,11,12,?..." bitfld.long 0x00 1. " BIAS_UNBIAS ,Rounding option across all rounding operations of MBDRC" "Bias,Unbias" bitfld.long 0x00 0. " MODE ,Select mode" "Bypass,Active" line.long 0x04 "PEQ_AHUBRAMCTL_PEQ_CTRL_0,AHUBRAMCTL PEQ Control Register" rbitfld.long 0x04 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x04 16.--23. 1. " SEQ_READ_COUNT ,Sequence read count" bitfld.long 0x04 14. " RW ,RW" "Read,Write" bitfld.long 0x04 13. " ADDR_INIT_EN ,Address init enable" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " SEQ_ACCESS_EN ,SEQ access enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--8. 0x01 " RAM_ADDR ,RAM address" line.long 0x08 "PEQ_AHUBRAMCTL_PEQ_DATA_0,AHUBRAMCTL PEQ Data Register" line.long 0x0C "PEQ_AHUBRAMCTL_SHIFT_CTRL_0,AHUBRAMCTL Shift Control Register" rbitfld.long 0x0C 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x0C 16.--23. 1. " ,SEQ_READ_COUNT,Sequence read count" bitfld.long 0x0C 14. " RW ,RW" "Read,Write" bitfld.long 0x0C 13. " ADDR_INIT_EN ,Address init enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 12. " SEQ_ACCESS_EN ,Sequence access enable" "Disabled,Enabled" hexmask.long.word 0x0C 0.--8. 0x01 " RAM_ADDR ,RAM address" line.long 0x10 "PEQ_AHUBRAMCTL_SHIFT_DATA_0,AHUBRAMCTL Shift Data Register" width 0x0B tree.end tree.end tree "DMIC" tree "DMIC1" base ad:0x702D4000 width 36. rgroup.long 0x0C++0x03 line.long 0x00 "DMIC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "DMIC_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" sif cpuis("TEGRAX2") setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_UPPER_WATERMARK ,TX upper watermark" "Clear,Set" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Clear,Set" textline " " endif setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "Clear,Set" line.long 0x04 "DMIC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" sif cpuis("TEGRAX2") bitfld.long 0x04 2. " TX_UPPER_WATERMARK ,TX upper waterwark" "Unmasked,Masked" bitfld.long 0x04 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Unmasked,Masked" textline " " endif bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "DMIC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x40++0x0B line.long 0x00 "DMIC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "DMIC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "DMIC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN , Second level clock gating enable" "False,True" rgroup.long 0x4C++0x07 line.long 0x00 "DMIC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "False,True" bitfld.long 0x00 8. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "DMIC_INT_STATUS_0,Interrupt Status Register" sif cpuis("TEGRAX2") bitfld.long 0x04 2. " TX_UPPER_WATERMARK ,TX upper waterwark" "Clear,Set" bitfld.long 0x04 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Clear,Set" textline " " endif bitfld.long 0x04 0. " TX_DONE ,TX done" "Clear,Set" group.long 0x64++0x03 line.long 0x00 "DMIC_CTRL_0,Control Register" bitfld.long 0x00 12.--16. " TRIMMER_SEL ,Trimmer select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--9. " CHANNEL_SELECT ,Channel select" "None,Left,Right,Stereo" bitfld.long 0x00 4. " LRSEL_POLARITY ,LRSEL polarity" "Left,Right" bitfld.long 0x00 0.--1. " OSR ,OSR" "OSR64,OSR128,OSR256,?..." width 0x0B tree.end tree "DMIC2" base ad:0x702D4100 width 36. rgroup.long 0x0C++0x03 line.long 0x00 "DMIC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "DMIC_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" sif cpuis("TEGRAX2") setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_UPPER_WATERMARK ,TX upper watermark" "Clear,Set" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Clear,Set" textline " " endif setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "Clear,Set" line.long 0x04 "DMIC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" sif cpuis("TEGRAX2") bitfld.long 0x04 2. " TX_UPPER_WATERMARK ,TX upper waterwark" "Unmasked,Masked" bitfld.long 0x04 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Unmasked,Masked" textline " " endif bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "DMIC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x40++0x0B line.long 0x00 "DMIC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "DMIC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "DMIC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN , Second level clock gating enable" "False,True" rgroup.long 0x4C++0x07 line.long 0x00 "DMIC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "False,True" bitfld.long 0x00 8. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "DMIC_INT_STATUS_0,Interrupt Status Register" sif cpuis("TEGRAX2") bitfld.long 0x04 2. " TX_UPPER_WATERMARK ,TX upper waterwark" "Clear,Set" bitfld.long 0x04 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Clear,Set" textline " " endif bitfld.long 0x04 0. " TX_DONE ,TX done" "Clear,Set" group.long 0x64++0x03 line.long 0x00 "DMIC_CTRL_0,Control Register" bitfld.long 0x00 12.--16. " TRIMMER_SEL ,Trimmer select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--9. " CHANNEL_SELECT ,Channel select" "None,Left,Right,Stereo" bitfld.long 0x00 4. " LRSEL_POLARITY ,LRSEL polarity" "Left,Right" bitfld.long 0x00 0.--1. " OSR ,OSR" "OSR64,OSR128,OSR256,?..." width 0x0B tree.end tree "DMIC3" base ad:0x702D4200 width 36. rgroup.long 0x0C++0x03 line.long 0x00 "DMIC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "False,True" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True" group.long 0x10++0x07 line.long 0x00 "DMIC_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" sif cpuis("TEGRAX2") setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_UPPER_WATERMARK ,TX upper watermark" "Clear,Set" setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Clear,Set" textline " " endif setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "Clear,Set" line.long 0x04 "DMIC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" sif cpuis("TEGRAX2") bitfld.long 0x04 2. " TX_UPPER_WATERMARK ,TX upper waterwark" "Unmasked,Masked" bitfld.long 0x04 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Unmasked,Masked" textline " " endif bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "DMIC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x40++0x0B line.long 0x00 "DMIC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "DMIC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "False,True" line.long 0x08 "DMIC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN , Second level clock gating enable" "False,True" rgroup.long 0x4C++0x07 line.long 0x00 "DMIC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "False,True" bitfld.long 0x00 8. " SLCG_CLKEN ,SLCG clock enable" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "False,True" line.long 0x04 "DMIC_INT_STATUS_0,Interrupt Status Register" sif cpuis("TEGRAX2") bitfld.long 0x04 2. " TX_UPPER_WATERMARK ,TX upper waterwark" "Clear,Set" bitfld.long 0x04 1. " TX_NORMAL_WATERMARK ,TX normal watermark" "Clear,Set" textline " " endif bitfld.long 0x04 0. " TX_DONE ,TX done" "Clear,Set" group.long 0x64++0x03 line.long 0x00 "DMIC_CTRL_0,Control Register" bitfld.long 0x00 12.--16. " TRIMMER_SEL ,Trimmer select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--9. " CHANNEL_SELECT ,Channel select" "None,Left,Right,Stereo" bitfld.long 0x00 4. " LRSEL_POLARITY ,LRSEL polarity" "Left,Right" bitfld.long 0x00 0.--1. " OSR ,OSR" "OSR64,OSR128,OSR256,?..." width 0x0B tree.end tree.end tree "AHC" base ad:0x702DB900 width 28. group.long 0x04++0x07 line.long 0x00 "AHC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x04 "AHC_CG_0,CG Register" bitfld.long 0x04 8. " SLAVE_SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" bitfld.long 0x04 0. " MASTER_SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "AHC_STATUS_0,Status Register" hexmask.long.word 0x00 16.--27. 1. " REQUEST_TIMEOUT_COUNTER ,Config access timeout value" bitfld.long 0x00 12.--13. " LIVE_STATUS ,Live status" "False,True,?..." bitfld.long 0x00 9. " MASTER_CLKEN ,Master clock enable" "False,True" bitfld.long 0x00 8. " SLAVE_CLKEN ,Slave clock enable" "False,True" textline " " bitfld.long 0x00 5. " HRD_FIFO_FULL ,HRD FIFO full" "Empty,Full" bitfld.long 0x00 4. " HRD_FIFO_EMPTY ,HRD FIFO empty" "Full,Empty" bitfld.long 0x00 1. " HWR_FIFO_FULL ,HWR FIFO full" "Empty,Full" bitfld.long 0x00 0. " HWR_FIFO_EMPTY ,HWR FIFO empty" "Full,Empty" group.long 0x10++0x07 line.long 0x00 "AHC_INT_STATUS_0_SET/CLR,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " CONFIG_REQUEST_TIMEOUT ,Config request timeout,time out status indication bit" "Clear,Set" line.long 0x04 "AHC_INT_MASK_0,Interrupt Mask Register" bitfld.long 0x04 0. " CONFIG_REQUEST_TIMEOUT ,Config request timeout" "Unmasked,Masked" group.long 0x24++0x03 line.long 0x00 "AHC_CTRL_0,Control Register" hexmask.long.word 0x00 0.--11. 1. " REQUEST_TIMEOUT_COUNT ,Timeout value in terms of AHUB clock cycles" rgroup.long 0x28++0x0F line.long 0x00 "AHC_AHUB_INTR_STATUS_0_0,AHUB Interrupt Register Status 0" sif (cpuis("TEGRAX2")) bitfld.long 0x00 30. " ARAD1 ,ARAD1" "Clear,Set" textline " " endif bitfld.long 0x00 29. " AFC6 ,AFC6" "Clear,Set" bitfld.long 0x00 28. " AFC5 ,AFC5" "Clear,Set" bitfld.long 0x00 27. " AFC4 ,AFC4" "Clear,Set" textline " " bitfld.long 0x00 26. " AFC3 ,AFC3" "Clear,Set" bitfld.long 0x00 25. " AFC2 ,AFC2" "Clear,Set" bitfld.long 0x00 24. " AFC1 ,AFC1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 23. " DMIC4 ,DMIC4" "Clear,Set" textline " " endif bitfld.long 0x00 22. " DMIC3 ,DMIC3" "Clear,Set" bitfld.long 0x00 21. " DMIC2 ,DMIC2" "Clear,Set" bitfld.long 0x00 20. " DMIC1 ,DMIC1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 19. " ADX4 ,ADX4" "Clear,Set" bitfld.long 0x00 18. " ADX3 ,ADX3" "Clear,Set" textline " " endif bitfld.long 0x00 17. " ADX2 ,ADX2" "Clear,Set" bitfld.long 0x00 16. " ADX1 ,ADX1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 15. " AMX4 ,AMX4" "Clear,Set" bitfld.long 0x00 14. " AMX3 ,AMX3" "Clear,Set" textline " " endif bitfld.long 0x00 13. " AMX2 ,AMX2" "Clear,Set" bitfld.long 0x00 12. " AMX1 ,AMX1" "Clear,Set" bitfld.long 0x00 11. " SFC4 ,SFC4" "Clear,Set" textline " " bitfld.long 0x00 10. " SFC3 ,SFC3" "Clear,Set" bitfld.long 0x00 9. " SFC2 ,SFC2" "Clear,Set" bitfld.long 0x00 8. " SFC1 ,SFC1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 5. " I2S6 ,I2S6" "Clear,Set" textline " " endif bitfld.long 0x00 4. " I2S5 ,I2S5" "Clear,Set" bitfld.long 0x00 3. " I2S4 ,I2S4" "Clear,Set" bitfld.long 0x00 2. " I2S3 ,I2S3" "Clear,Set" textline " " bitfld.long 0x00 1. " I2S2 ,I2S2" "Clear,Set" bitfld.long 0x00 0. " I2S1 ,I2S1" "Clear,Set" line.long 0x04 "AHC_AHUB_INTR_STATUS_1_0,AHUB Interrupt Register Status 1" bitfld.long 0x04 31. " AHC ,AHC" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 29. " ASRC1 ,ASRC1" "Clear,Set" textline " " endif bitfld.long 0x04 28. " XBAR ,XBAR" "Clear,Set" bitfld.long 0x04 24. " ADMAIF ,ADMAIF" "Clear,Set" bitfld.long 0x04 20. " MIXER1 ,MIXER1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x04 19. " DSPK2 ,DSPK2" "Clear,Set" bitfld.long 0x04 18. " DSPK1 ,DSPK1" "Clear,Set" textline " " endif bitfld.long 0x04 16. " SPDIF1 ,SPDIF1" "Clear,Set" bitfld.long 0x04 13. " MDMIF1 ,MDMIF1" "Clear,Set" bitfld.long 0x04 12. " MDMIF0 ,MDMIF0" "Clear,Set" textline " " bitfld.long 0x04 9. " MVC2 ,MVC2" "Clear,Set" bitfld.long 0x04 8. " MVC1 ,MVC1" "Clear,Set" bitfld.long 0x04 4. " SPKPROT1 ,SPKPROT1" "Clear,Set" textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x04 1. " OPE2 ,OPE2" "Clear,Set" textline " " endif bitfld.long 0x04 0. " OPE1 ,OPE1" "Clear,Set" line.long 0x08 "AHC_AHUB_ENABLE_STATUS_0_0,AHUB Enable Status 0" sif (cpuis("TEGRAX2")) bitfld.long 0x08 30. " ARAD1 ,ARAD1" "Clear,Set" textline " " endif bitfld.long 0x08 29. " AFC6 ,AFC6" "Clear,Set" bitfld.long 0x08 28. " AFC5 ,AFC5" "Clear,Set" bitfld.long 0x08 27. " AFC4 ,AFC4" "Clear,Set" textline " " bitfld.long 0x08 26. " AFC3 ,AFC3" "Clear,Set" bitfld.long 0x08 25. " AFC2 ,AFC2" "Clear,Set" bitfld.long 0x08 24. " AFC1 ,AFC1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x08 23. " DMIC4 ,DMIC4" "Clear,Set" textline " " endif bitfld.long 0x08 22. " DMIC3 ,DMIC3" "Clear,Set" bitfld.long 0x08 21. " DMIC2 ,DMIC2" "Clear,Set" bitfld.long 0x08 20. " DMIC1 ,DMIC1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x08 19. " ADX4 ,ADX2" "Clear,Set" bitfld.long 0x08 18. " ADX3 ,ADX2" "Clear,Set" textline " " endif bitfld.long 0x08 17. " ADX2 ,ADX2" "Clear,Set" bitfld.long 0x08 16. " ADX1 ,ADX1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x08 15. " AMX4 ,AMX4" "Clear,Set" bitfld.long 0x08 14. " AMX3 ,AMX3" "Clear,Set" textline " " endif bitfld.long 0x08 13. " AMX2 ,AMX2" "Clear,Set" bitfld.long 0x08 12. " AMX1 ,AMX1" "Clear,Set" bitfld.long 0x08 11. " SFC4 ,SFC4" "Clear,Set" textline " " bitfld.long 0x08 10. " SFC3 ,SFC3" "Clear,Set" bitfld.long 0x08 9. " SFC2 ,SFC2" "Clear,Set" bitfld.long 0x08 8. " SFC1 ,SFC1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x08 5. " I2S6 ,I2S6" "Clear,Set" textline " " endif bitfld.long 0x08 4. " I2S5 ,I2S5" "Clear,Set" bitfld.long 0x08 3. " I2S4 ,I2S4" "Clear,Set" bitfld.long 0x08 2. " I2S3 ,I2S3" "Clear,Set" textline " " bitfld.long 0x08 1. " I2S2 ,I2S2" "Clear,Set" bitfld.long 0x08 0. " I2S1 ,I2S1" "Clear,Set" line.long 0x0C "AHC_AHUB_ENABLE_STATUS_1_0,AHUB Enable Status 1" bitfld.long 0x0C 31. " AHC ,AHC" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x0C 29. " ASRC1 ,ASRC1" "Clear,Set" textline " " endif bitfld.long 0x0C 28. " XBAR ,XBAR" "Clear,Set" bitfld.long 0x0C 24. " ADMAIF ,ADMAIF" "Clear,Set" bitfld.long 0x0C 20. " MIXER1 ,MIXER1" "Clear,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x0C 19. " DSPK2 ,DSPK2" "Clear,Set" bitfld.long 0x0C 18. " DSPK1 ,DSPK1" "Clear,Set" textline " " endif bitfld.long 0x0C 16. " SPDIF1 ,SPDIF1" "Clear,Set" bitfld.long 0x0C 13. " MDMIF1 ,MDMIF1" "Clear,Set" bitfld.long 0x0C 12. " MDMIF0 ,MDMIF0" "Clear,Set" textline " " bitfld.long 0x0C 9. " MVC2 ,MVC2" "Clear,Set" bitfld.long 0x0C 8. " MVC1 ,MVC1" "Clear,Set" bitfld.long 0x0C 4. " SPKPROT1 ,SPKPROT1" "Clear,Set" textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x0C 1. " OPE2 ,OPE2" "Clear,Set" textline " " endif bitfld.long 0x0C 0. " OPE1 ,OPE1" "Clear,Set" width 0x0B tree.end tree "AMC" base ad:0x702EF000 width 31. group.long 0x00++0x03 line.long 0x00 "AMC_CONFIG_0,Config Register" sif cpuis("TEGRAX2") bitfld.long 0x00 6. " APERTURE_NS_DIS ,Aperture NS disable" "No,Yes" bitfld.long 0x00 5. " APR_NS_DIS ,APR NS disable" "No,Yes" textline " " bitfld.long 0x00 4. " CO_NS_DIS ,CO NS disable" "No,Yes" bitfld.long 0x00 3. " EVP_LOCK ,EVP lock" "Not locked,Locked" textline " " endif bitfld.long 0x00 2. " ERR_RESPONSE_DISABLE ,Error response disable" "No,Yes" sif !cpuis("TEGRAX2") bitfld.long 0x00 1. " CARVE_OUT_ENABLE ,Carve out enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 0. " ARAM_ADDR_ALIAS_ENABLE ,ARAM address alias enable" "Disabled,Enabled" group.long 0x04++0x07 line.long 0x00 "AMC_INT_STATUS_0_SET/CLR,Interrupt Ststus Register" sif cpuis("TEGRAX2") setclrfld.long 0x00 5. 0x08 5. 0x0C 5. " INVALID_APR_ACCESS ,Invalid APR access" "Valid,Invalid" setclrfld.long 0x00 4. 0x08 4. 0x0C 4. " INVALID_CO_ACCESS ,Invalid CO access" "Valid,Invalid" textline " " endif setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " INVALID_CONFIG_ADDR ,Invalid config address" "Valid,Invalid" setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " INVALID_BURST_TYPE ,Invalid burst type" "Valid,Invalid" textline " " setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " INVALID_REQUEST_TYPE ,Invalid request type" "Valid,Invalid" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " INVALID_AMEM_ACCESS ,Invalid AMEM access" "Valid,Invalid" line.long 0x04 "AMC_INT_MASK_0,Interrupt Mask Register" sif cpuis("TEGRAX2") bitfld.long 0x04 5. " INVALID_APR_ACCESS ,Invalid APR access" "Unmasked,Masked" bitfld.long 0x04 4. " INVALID_CO_ACCESS ,Invalid CO access" "Unmasked,Masked" textline " " endif bitfld.long 0x04 3. " INVALID_CONFIG_ADDR ,Invalid config address" "Unmasked,Masked" bitfld.long 0x04 2. " INVALID_BURST_TYPE ,Invalid burst type" "Unmasked,Masked" textline " " bitfld.long 0x04 1. " INVALID_REQUEST_TYPE ,Invalid request type" "Unmasked,Masked" bitfld.long 0x04 0. " INVALID_AMEM_ACCESS ,Invalid AMEM access" "Unmasked,Masked" rgroup.long 0x14++0x03 line.long 0x00 "AMC_ERROR_ADDR_0,Error Address Register" sif cpuis("TEGRAX2") group.long 0x18++0x1B line.long 0x00 "AMC_APR_CONFIG_0,APR Config Register" bitfld.long 0x00 0. " ENABLE ,Enable" "False,True" line.long 0x04 "AMC_APR_START_ADDR_0,APR Start Address Register" line.long 0x08 "AMC_APR_SIZE_0,APR Size Register" hexmask.long 0x08 0.--27. 1. " APR_SIZE ,APR size" line.long 0x0C "AMC_CO_CONFIG_0,CO Config Register" bitfld.long 0x0C 0. " ENABLE ,Enable" "False,True" line.long 0x10 "AMC_CO_START_ADDR_0,CO Start Address Register" line.long 0x14 "AMC_CO_SIZE_0,CO Size Register" hexmask.long.tbyte 0x14 0.--16. 1. " CO_SIZE ,CO size" line.long 0x18 "AMC_APERTURE_BASE_0,Aperture Base Register" hexmask.long.word 0x18 11.--20. 1. " APERTURE_BASE ,Aperture base" else group.long 0x28++0x03 line.long 0x00 "AMC_APERTURE_BASE_0,Aperture Base Register" hexmask.long.word 0x00 11.--20. 1. " APERTURE_BASE ,Aperture base" endif group.long 0x700++0x13 line.long 0x00 "AMC_EVP_RESET_VEC_0,EVP Reset Vector Register" line.long 0x04 "AMC_EVP_UNDEF_VEC_0,EVP UNDEF Vector Register" line.long 0x08 "AMC_EVP_SWI_VEC_0,EVP SWI Vector Register" line.long 0x0C "AMC_EVP_PREFETCH_ABORT_VEC_0,EVP Prefetch Abort Vector Register" line.long 0x10 "AMC_EVP_DATA_ABORT_VEC_0,EVP Data Abort Vector Register" group.long 0x718++0x27 line.long 0x00 "AMC_EVP_IRQ_VEC_0,EVP IRQ Vector Register" line.long 0x04 "AMC_EVP_FIQ_VEC_0,EVP FIQ Vector Register" line.long 0x08 "AMC_EVP_RESET_ADDR_0, EVP Reset Address Register" line.long 0x0C "AMC_EVP_UNDEF_ADDR_0,EVP UNDEF Address Register" line.long 0x10 "AMC_EVP_SWI_ADDR_0,EVP SWI Address Register" line.long 0x14 "AMC_EVP_PREFETCH_ABORT_ADDR_0,EVP Prefetch Abort Address Register" line.long 0x18 "AMC_EVP_DATA_ABORT_ADDR_0,EVP Data Abort Address Register" group.long 0x738++0x07 line.long 0x00 "AMC_EVP_IRQ_ADDR_0,EVP IRQ Address Register" line.long 0x04 "AMC_EVP_FIQ_ADDR_0,EVP FIQ Address Register" group.long 0x800++0x03 line.long 0x00 "AMC_APERTURE_DATA_0,Aperture Data" button "APERTURE_DATA_0" "d (0x702EF000+0x800)--(0x702EF000+0xFFF) /long" width 0x0B tree.end tree "AFC" tree "AFC1" base ad:0x702D7000 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x20++0x03 line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif !cpuis("TEGRAX2") bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x4C++0x03 line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x50++0x07 line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr ,TX done" "Clear,Set" line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " endif group.long 0x80++0x0B line.long 0x00 "AFC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "AFC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x8C++0x03 line.long 0x00 "AFC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "No error,Error" bitfld.long 0x00 5. " INTERP_RATE_SLOW ,INTERP rate slow" "False,True" bitfld.long 0x00 4. " DECIM_RATE_SLOW ,DECIM rate slow" "False,True" textline " " bitfld.long 0x00 2. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x90++0x07 line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 1. " TX_DONE ,TX done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set" line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register" bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR ,CLK_PPM_DIFF error" "Unmasked,Masked" group.long 0xA4++0x0B line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register" sif cpuis("TEGRAX2") bitfld.long 0x00 27.--28. " MODULE_SELECT ,Module select" "I2S,DSPK,?..." bitfld.long 0x00 24.--26. " MODULE_ID ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..." textline " " else bitfld.long 0x00 24.--26. " I2S_ID ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..." textline " " endif hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register" hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register" hexmask.long.word 0x08 0.--15. 1. " VALUE ,Value" width 0x0B tree.end tree "AFC2" base ad:0x702D7100 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x20++0x03 line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif !cpuis("TEGRAX2") bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x4C++0x03 line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x50++0x07 line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr ,TX done" "Clear,Set" line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " endif group.long 0x80++0x0B line.long 0x00 "AFC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "AFC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x8C++0x03 line.long 0x00 "AFC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "No error,Error" bitfld.long 0x00 5. " INTERP_RATE_SLOW ,INTERP rate slow" "False,True" bitfld.long 0x00 4. " DECIM_RATE_SLOW ,DECIM rate slow" "False,True" textline " " bitfld.long 0x00 2. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x90++0x07 line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 1. " TX_DONE ,TX done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set" line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register" bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR ,CLK_PPM_DIFF error" "Unmasked,Masked" group.long 0xA4++0x0B line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register" sif cpuis("TEGRAX2") bitfld.long 0x00 27.--28. " MODULE_SELECT ,Module select" "I2S,DSPK,?..." bitfld.long 0x00 24.--26. " MODULE_ID ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..." textline " " else bitfld.long 0x00 24.--26. " I2S_ID ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..." textline " " endif hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register" hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register" hexmask.long.word 0x08 0.--15. 1. " VALUE ,Value" width 0x0B tree.end tree "AFC3" base ad:0x702D7200 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x20++0x03 line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif !cpuis("TEGRAX2") bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x4C++0x03 line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x50++0x07 line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr ,TX done" "Clear,Set" line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " endif group.long 0x80++0x0B line.long 0x00 "AFC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "AFC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x8C++0x03 line.long 0x00 "AFC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "No error,Error" bitfld.long 0x00 5. " INTERP_RATE_SLOW ,INTERP rate slow" "False,True" bitfld.long 0x00 4. " DECIM_RATE_SLOW ,DECIM rate slow" "False,True" textline " " bitfld.long 0x00 2. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x90++0x07 line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 1. " TX_DONE ,TX done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set" line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register" bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR ,CLK_PPM_DIFF error" "Unmasked,Masked" group.long 0xA4++0x0B line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register" sif cpuis("TEGRAX2") bitfld.long 0x00 27.--28. " MODULE_SELECT ,Module select" "I2S,DSPK,?..." bitfld.long 0x00 24.--26. " MODULE_ID ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..." textline " " else bitfld.long 0x00 24.--26. " I2S_ID ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..." textline " " endif hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register" hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register" hexmask.long.word 0x08 0.--15. 1. " VALUE ,Value" width 0x0B tree.end tree "AFC4" base ad:0x702D7300 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x20++0x03 line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif !cpuis("TEGRAX2") bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x4C++0x03 line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x50++0x07 line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr ,TX done" "Clear,Set" line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " endif group.long 0x80++0x0B line.long 0x00 "AFC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "AFC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x8C++0x03 line.long 0x00 "AFC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "No error,Error" bitfld.long 0x00 5. " INTERP_RATE_SLOW ,INTERP rate slow" "False,True" bitfld.long 0x00 4. " DECIM_RATE_SLOW ,DECIM rate slow" "False,True" textline " " bitfld.long 0x00 2. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x90++0x07 line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 1. " TX_DONE ,TX done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set" line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register" bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR ,CLK_PPM_DIFF error" "Unmasked,Masked" group.long 0xA4++0x0B line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register" sif cpuis("TEGRAX2") bitfld.long 0x00 27.--28. " MODULE_SELECT ,Module select" "I2S,DSPK,?..." bitfld.long 0x00 24.--26. " MODULE_ID ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..." textline " " else bitfld.long 0x00 24.--26. " I2S_ID ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..." textline " " endif hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register" hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register" hexmask.long.word 0x08 0.--15. 1. " VALUE ,Value" width 0x0B tree.end tree "AFC5" base ad:0x702D7400 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x20++0x03 line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif !cpuis("TEGRAX2") bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x4C++0x03 line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x50++0x07 line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr ,TX done" "Clear,Set" line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " endif group.long 0x80++0x0B line.long 0x00 "AFC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "AFC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x8C++0x03 line.long 0x00 "AFC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "No error,Error" bitfld.long 0x00 5. " INTERP_RATE_SLOW ,INTERP rate slow" "False,True" bitfld.long 0x00 4. " DECIM_RATE_SLOW ,DECIM rate slow" "False,True" textline " " bitfld.long 0x00 2. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x90++0x07 line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 1. " TX_DONE ,TX done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set" line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register" bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR ,CLK_PPM_DIFF error" "Unmasked,Masked" group.long 0xA4++0x0B line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register" sif cpuis("TEGRAX2") bitfld.long 0x00 27.--28. " MODULE_SELECT ,Module select" "I2S,DSPK,?..." bitfld.long 0x00 24.--26. " MODULE_ID ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..." textline " " else bitfld.long 0x00 24.--26. " I2S_ID ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..." textline " " endif hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register" hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register" hexmask.long.word 0x08 0.--15. 1. " VALUE ,Value" width 0x0B tree.end tree "AFC6" base ad:0x702D7500 width 31. rgroup.long 0x0C++0x03 line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x20++0x03 line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif !cpuis("TEGRAX2") bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x4C++0x03 line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x50++0x07 line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr ,TX done" "Clear,Set" line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." rbitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." rbitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" textline " " rbitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " else bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" textline " " endif group.long 0x80++0x0B line.long 0x00 "AFC_ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "AFC_CG_0,CG Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x8C++0x03 line.long 0x00 "AFC_STATUS_0,Status Register" bitfld.long 0x00 31. " CNFG_ERR ,CNFG error" "No error,Error" bitfld.long 0x00 5. " INTERP_RATE_SLOW ,INTERP rate slow" "False,True" bitfld.long 0x00 4. " DECIM_RATE_SLOW ,DECIM rate slow" "False,True" textline " " bitfld.long 0x00 2. " CLKEN ,Clock enable" "False,True" bitfld.long 0x00 0. " TX_ENABLED ,TX enabled" "Disabled,Enabled" group.long 0x90++0x07 line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 1. " TX_DONE ,TX done" "Clear,Set" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set" line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register" bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR ,CLK_PPM_DIFF error" "Unmasked,Masked" group.long 0xA4++0x0B line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register" sif cpuis("TEGRAX2") bitfld.long 0x00 27.--28. " MODULE_SELECT ,Module select" "I2S,DSPK,?..." bitfld.long 0x00 24.--26. " MODULE_ID ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..." textline " " else bitfld.long 0x00 24.--26. " I2S_ID ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..." textline " " endif hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x00 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register" hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 8.--14. 1. " FIFO_START_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" hexmask.long.byte 0x04 0.--6. 1. " FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S" line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register" hexmask.long.word 0x08 0.--15. 1. " VALUE ,Value" width 0x0B tree.end tree.end tree "MVC" tree "MVC1" base ad:0x702DA000 width 31. rgroup.long 0x0C++0x07 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "Clear,Set" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x4C++0x07 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "Clear,Set" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "CG_0,Clock Gating Register" bitfld.long 0x08 0. " SLCG_EN , Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x90++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 8. " SLCG_CLKEN , Status of SLCG" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Status of MVC enabling" "Disabled,Enabled" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 1. " TX_DONE ,TX done" "Clear,Set" bitfld.long 0x04 0. " RX_DONE ,RX done" "Clear,Set" group.long 0xA8++0x07 line.long 0x00 "CTRL_0,Control Register" hexmask.long.byte 0x00 8.--15. 1. " MUTE_UNMUTE ,Mute/UnMute control bit. 8 bits for 8 channels [CH0-CH7]" bitfld.long 0x00 1. " CURVE_TYPE ,Curve type" "POLYNOMIAL,LINEAR_RAMP" bitfld.long 0x00 0. " UNBIASED ,Rounding option" "BIASED,UNBIASED" line.long 0x04 "SWITCH_0,Switch Register" bitfld.long 0x04 2. " VOLUME_SWITCH ,Start using a new volume set for the volume related parameters (TARGET_VOL AND MUTE_UNMUTE)" "Set,Clear" bitfld.long 0x04 1. " COEFF_SWITCH ,Start using a new configuration set for the polynomial coefficients." "Set,Clear" bitfld.long 0x04 0. " DURATION_SWITCH ,Start using a new configuration set for the duration related parameters (DURATION, DURATION_INV, POLY_N1 AND POLY_N2)" "Set,Clear" if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xB0++0x03 line.long 0x00 "INIT_VOL_0,Volume Initialization 0 Register" else group.long 0xB0++0x03 line.long 0x00 "INIT_VOL_0,Volume Initialization 0 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_0[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xB4++0x03 line.long 0x00 "INIT_VOL_1,Volume Initialization 1 Register" else group.long 0xB4++0x03 line.long 0x00 "INIT_VOL_1,Volume Initialization 1 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_1[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xB8++0x03 line.long 0x00 "INIT_VOL_2,Volume Initialization 2 Register" else group.long 0xB8++0x03 line.long 0x00 "INIT_VOL_2,Volume Initialization 2 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_2[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xBC++0x03 line.long 0x00 "INIT_VOL_3,Volume Initialization 3 Register" else group.long 0xBC++0x03 line.long 0x00 "INIT_VOL_3,Volume Initialization 3 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_3[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xC0++0x03 line.long 0x00 "INIT_VOL_4,Volume Initialization 4 Register" else group.long 0xC0++0x03 line.long 0x00 "INIT_VOL_4,Volume Initialization 4 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_4[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xC4++0x03 line.long 0x00 "INIT_VOL_5,Volume Initialization 5 Register" else group.long 0xC4++0x03 line.long 0x00 "INIT_VOL_5,Volume Initialization 5 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_5[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xC8++0x03 line.long 0x00 "INIT_VOL_6,Volume Initialization 6 Register" else group.long 0xC8++0x03 line.long 0x00 "INIT_VOL_6,Volume Initialization 6 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_6[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xCC++0x03 line.long 0x00 "INIT_VOL_7,Volume Initialization 7 Register" else group.long 0xCC++0x03 line.long 0x00 "INIT_VOL_7,Volume Initialization 7 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_7[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xD0++0x03 line.long 0x00 "TARGET_VOL_0,Target Volume 0 Register" else group.long 0xD0++0x03 line.long 0x00 "TARGET_VOL_0,Target Volume 0 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_0[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xD4++0x03 line.long 0x00 "TARGET_VOL_1,Target Volume 1 Register" else group.long 0xD4++0x03 line.long 0x00 "TARGET_VOL_1,Target Volume 1 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_1[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xD8++0x03 line.long 0x00 "TARGET_VOL_2,Target Volume 2 Register" else group.long 0xD8++0x03 line.long 0x00 "TARGET_VOL_2,Target Volume 2 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_2[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xDC++0x03 line.long 0x00 "TARGET_VOL_3,Target Volume 3 Register" else group.long 0xDC++0x03 line.long 0x00 "TARGET_VOL_3,Target Volume 3 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_3[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xE0++0x03 line.long 0x00 "TARGET_VOL_4,Target Volume 4 Register" else group.long 0xE0++0x03 line.long 0x00 "TARGET_VOL_4,Target Volume 4 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_4[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xE4++0x03 line.long 0x00 "TARGET_VOL_5,Target Volume 5 Register" else group.long 0xE4++0x03 line.long 0x00 "TARGET_VOL_5,Target Volume 5 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_5[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xE8++0x03 line.long 0x00 "TARGET_VOL_6,Target Volume 6 Register" else group.long 0xE8++0x03 line.long 0x00 "TARGET_VOL_6,Target Volume 6 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_6[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA000+0xA8)&0x02))==0x00) group.long 0xEC++0x03 line.long 0x00 "TARGET_VOL_7,Target Volume 7 Register" else group.long 0xEC++0x03 line.long 0x00 "TARGET_VOL_7,Target Volume 7 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_7[15:0] ,Target volume linear ramp curve" endif group.long 0xF0++0x0F line.long 0x00 "DURATION_0,Duration Register" hexmask.long.tbyte 0x00 0.--23. 1. " DURATION ,Number of samples to reach the target volume" line.long 0x04 "DURATION_INV_0,Duration Inverse Register" line.long 0x08 "POLY_N1_0,POLY N1 Register" hexmask.long.tbyte 0x08 0.--23. 1. " POLY_N1 , The first splitting points" line.long 0x0C "POLY_N2_0,POLY N2 Register" hexmask.long.tbyte 0x0C 0.--23. 1. " POLY_N2 ,The second splitting points" if (((per.l(ad:0x702DA000+0x100)&0x80000000))==0x00) group.long 0x100++0x03 line.long 0x00 "PEAK_CTRL_0,Peak Control Register" bitfld.long 0x00 31. " PEAK_TYPE ,Peak metering type" "WINPEAK,RORPEAK" hexmask.long.tbyte 0x00 0.--23. 1. " POLY_N2 ,The second splitting points" else group.long 0x100++0x03 line.long 0x00 "PEAK_CTRL_0,Peak Control Register" bitfld.long 0x00 31. " PEAK_TYPE ,Peak metering type" "WINPEAK,RORPEAK" endif group.long 0x104++0x07 line.long 0x00 "AHUBRAMCTL_CONFIG_RAM_CTRL_0,AHUB RAM CTL Config RAM Control Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" line.long 0x04 "AHUBRAMCTL_CONFIG_RAM_DATA_0,AHUB RAM CTL Config RAM Data Register" rgroup.long 0x10C++0x03 line.long 0x00 "PEAK_VALUE_0,Peak Value Register" rgroup.long 0x110++0x03 line.long 0x00 "PEAK_VALUE_1,Peak Value Register" rgroup.long 0x114++0x03 line.long 0x00 "PEAK_VALUE_2,Peak Value Register" rgroup.long 0x118++0x03 line.long 0x00 "PEAK_VALUE_3,Peak Value Register" rgroup.long 0x11C++0x03 line.long 0x00 "PEAK_VALUE_4,Peak Value Register" rgroup.long 0x120++0x03 line.long 0x00 "PEAK_VALUE_5,Peak Value Register" rgroup.long 0x124++0x03 line.long 0x00 "PEAK_VALUE_6,Peak Value Register" rgroup.long 0x128++0x03 line.long 0x00 "PEAK_VALUE_7,Peak Value Register" rgroup.long 0x12C++0x03 line.long 0x00 "CONFIG_ERR_TYPE_0,Config Error Type Register" bitfld.long 0x00 2. " VOLUME_CONFIG_ERROR ,Volume config error" "No error,Error" bitfld.long 0x00 1. " COEFF_CONFIG_ERROR ,Coefficient config error" "No error,Error" bitfld.long 0x00 0. " DURATION_CONFIG_ERROR ,Duration config error" "No error,Error" width 0x0B tree.end tree "MVC1" base ad:0x702DA200 width 31. rgroup.long 0x0C++0x07 line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x10++0x07 line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE ,RX done" "Clear,Set" line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register" bitfld.long 0x04 0. " RX_DONE ,RX done" "Unmasked,Masked" group.long 0x20++0x03 line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" rgroup.long 0x4C++0x07 line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Empty,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Full,Empty" group.long 0x50++0x07 line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE ,TX done" "Clear,Set" line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long 0x60++0x03 line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." rbitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..." bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" endif textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long 0x80++0x0B line.long 0x00 "ENABLE_0,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "CG_0,Clock Gating Register" bitfld.long 0x08 0. " SLCG_EN , Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x90++0x07 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 8. " SLCG_CLKEN , Status of SLCG" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Status of MVC enabling" "Disabled,Enabled" line.long 0x04 "INT_STATUS_0,Interrupt Status Register" bitfld.long 0x04 1. " TX_DONE ,TX done" "Clear,Set" bitfld.long 0x04 0. " RX_DONE ,RX done" "Clear,Set" group.long 0xA8++0x07 line.long 0x00 "CTRL_0,Control Register" hexmask.long.byte 0x00 8.--15. 1. " MUTE_UNMUTE ,Mute/UnMute control bit. 8 bits for 8 channels [CH0-CH7]" bitfld.long 0x00 1. " CURVE_TYPE ,Curve type" "POLYNOMIAL,LINEAR_RAMP" bitfld.long 0x00 0. " UNBIASED ,Rounding option" "BIASED,UNBIASED" line.long 0x04 "SWITCH_0,Switch Register" bitfld.long 0x04 2. " VOLUME_SWITCH ,Start using a new volume set for the volume related parameters (TARGET_VOL AND MUTE_UNMUTE)" "Set,Clear" bitfld.long 0x04 1. " COEFF_SWITCH ,Start using a new configuration set for the polynomial coefficients." "Set,Clear" bitfld.long 0x04 0. " DURATION_SWITCH ,Start using a new configuration set for the duration related parameters (DURATION, DURATION_INV, POLY_N1 AND POLY_N2)" "Set,Clear" if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xB0++0x03 line.long 0x00 "INIT_VOL_0,Volume Initialization 0 Register" else group.long 0xB0++0x03 line.long 0x00 "INIT_VOL_0,Volume Initialization 0 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_0[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xB4++0x03 line.long 0x00 "INIT_VOL_1,Volume Initialization 1 Register" else group.long 0xB4++0x03 line.long 0x00 "INIT_VOL_1,Volume Initialization 1 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_1[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xB8++0x03 line.long 0x00 "INIT_VOL_2,Volume Initialization 2 Register" else group.long 0xB8++0x03 line.long 0x00 "INIT_VOL_2,Volume Initialization 2 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_2[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xBC++0x03 line.long 0x00 "INIT_VOL_3,Volume Initialization 3 Register" else group.long 0xBC++0x03 line.long 0x00 "INIT_VOL_3,Volume Initialization 3 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_3[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xC0++0x03 line.long 0x00 "INIT_VOL_4,Volume Initialization 4 Register" else group.long 0xC0++0x03 line.long 0x00 "INIT_VOL_4,Volume Initialization 4 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_4[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xC4++0x03 line.long 0x00 "INIT_VOL_5,Volume Initialization 5 Register" else group.long 0xC4++0x03 line.long 0x00 "INIT_VOL_5,Volume Initialization 5 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_5[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xC8++0x03 line.long 0x00 "INIT_VOL_6,Volume Initialization 6 Register" else group.long 0xC8++0x03 line.long 0x00 "INIT_VOL_6,Volume Initialization 6 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_6[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xCC++0x03 line.long 0x00 "INIT_VOL_7,Volume Initialization 7 Register" else group.long 0xCC++0x03 line.long 0x00 "INIT_VOL_7,Volume Initialization 7 Register" hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_7[15:0] ,Volume initialization linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xD0++0x03 line.long 0x00 "TARGET_VOL_0,Target Volume 0 Register" else group.long 0xD0++0x03 line.long 0x00 "TARGET_VOL_0,Target Volume 0 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_0[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xD4++0x03 line.long 0x00 "TARGET_VOL_1,Target Volume 1 Register" else group.long 0xD4++0x03 line.long 0x00 "TARGET_VOL_1,Target Volume 1 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_1[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xD8++0x03 line.long 0x00 "TARGET_VOL_2,Target Volume 2 Register" else group.long 0xD8++0x03 line.long 0x00 "TARGET_VOL_2,Target Volume 2 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_2[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xDC++0x03 line.long 0x00 "TARGET_VOL_3,Target Volume 3 Register" else group.long 0xDC++0x03 line.long 0x00 "TARGET_VOL_3,Target Volume 3 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_3[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xE0++0x03 line.long 0x00 "TARGET_VOL_4,Target Volume 4 Register" else group.long 0xE0++0x03 line.long 0x00 "TARGET_VOL_4,Target Volume 4 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_4[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xE4++0x03 line.long 0x00 "TARGET_VOL_5,Target Volume 5 Register" else group.long 0xE4++0x03 line.long 0x00 "TARGET_VOL_5,Target Volume 5 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_5[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xE8++0x03 line.long 0x00 "TARGET_VOL_6,Target Volume 6 Register" else group.long 0xE8++0x03 line.long 0x00 "TARGET_VOL_6,Target Volume 6 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_6[15:0] ,Target volume linear ramp curve" endif if (((per.l(ad:0x702DA200+0xA8)&0x02))==0x00) group.long 0xEC++0x03 line.long 0x00 "TARGET_VOL_7,Target Volume 7 Register" else group.long 0xEC++0x03 line.long 0x00 "TARGET_VOL_7,Target Volume 7 Register" hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_7[15:0] ,Target volume linear ramp curve" endif group.long 0xF0++0x0F line.long 0x00 "DURATION_0,Duration Register" hexmask.long.tbyte 0x00 0.--23. 1. " DURATION ,Number of samples to reach the target volume" line.long 0x04 "DURATION_INV_0,Duration Inverse Register" line.long 0x08 "POLY_N1_0,POLY N1 Register" hexmask.long.tbyte 0x08 0.--23. 1. " POLY_N1 , The first splitting points" line.long 0x0C "POLY_N2_0,POLY N2 Register" hexmask.long.tbyte 0x0C 0.--23. 1. " POLY_N2 ,The second splitting points" if (((per.l(ad:0x702DA200+0x100)&0x80000000))==0x00) group.long 0x100++0x03 line.long 0x00 "PEAK_CTRL_0,Peak Control Register" bitfld.long 0x00 31. " PEAK_TYPE ,Peak metering type" "WINPEAK,RORPEAK" hexmask.long.tbyte 0x00 0.--23. 1. " POLY_N2 ,The second splitting points" else group.long 0x100++0x03 line.long 0x00 "PEAK_CTRL_0,Peak Control Register" bitfld.long 0x00 31. " PEAK_TYPE ,Peak metering type" "WINPEAK,RORPEAK" endif group.long 0x104++0x07 line.long 0x00 "AHUBRAMCTL_CONFIG_RAM_CTRL_0,AHUB RAM CTL Config RAM Control Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" line.long 0x04 "AHUBRAMCTL_CONFIG_RAM_DATA_0,AHUB RAM CTL Config RAM Data Register" rgroup.long 0x10C++0x03 line.long 0x00 "PEAK_VALUE_0,Peak Value Register" rgroup.long 0x110++0x03 line.long 0x00 "PEAK_VALUE_1,Peak Value Register" rgroup.long 0x114++0x03 line.long 0x00 "PEAK_VALUE_2,Peak Value Register" rgroup.long 0x118++0x03 line.long 0x00 "PEAK_VALUE_3,Peak Value Register" rgroup.long 0x11C++0x03 line.long 0x00 "PEAK_VALUE_4,Peak Value Register" rgroup.long 0x120++0x03 line.long 0x00 "PEAK_VALUE_5,Peak Value Register" rgroup.long 0x124++0x03 line.long 0x00 "PEAK_VALUE_6,Peak Value Register" rgroup.long 0x128++0x03 line.long 0x00 "PEAK_VALUE_7,Peak Value Register" rgroup.long 0x12C++0x03 line.long 0x00 "CONFIG_ERR_TYPE_0,Config Error Type Register" bitfld.long 0x00 2. " VOLUME_CONFIG_ERROR ,Volume config error" "No error,Error" bitfld.long 0x00 1. " COEFF_CONFIG_ERROR ,Coefficient config error" "No error,Error" bitfld.long 0x00 0. " DURATION_CONFIG_ERROR ,Duration config error" "No error,Error" width 0x0B tree.end tree.end tree "ADMA" base ad:0x702E2000 width 22. tree "Channel 1" group.long 0x0++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x0+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x0+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x0+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x0+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x0+0x24))&0xF002)==0x4002))) group.long (0x0+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x0+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x0+0x24))&0xF002)==0x2002))) group.long (0x0+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x0+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x0+0x24))&0xF002)==0x8002))) group.long (0x0+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x0+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x0+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x0+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x0+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x0+0x24))&0xF002)==0x4002))) group.long (0x0+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x0+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x0+0x24))&0xF002)==0x2002))) group.long (0x0+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x0+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x0+0x24))&0xF002)==0x8002))) group.long (0x0+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x0+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x0+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x0+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x0+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x0+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x0+0x24))&0x700)==0x400) group.long (0x0+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x0+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x0+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 2" group.long 0x80++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x80+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x80+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x80+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x80+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x80+0x24))&0xF002)==0x4002))) group.long (0x80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x80+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x80+0x24))&0xF002)==0x2002))) group.long (0x80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x80+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x80+0x24))&0xF002)==0x8002))) group.long (0x80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x80+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x80+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x80+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x80+0x24))&0xF002)==0x4002))) group.long (0x80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x80+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x80+0x24))&0xF002)==0x2002))) group.long (0x80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x80+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x80+0x24))&0xF002)==0x8002))) group.long (0x80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x80+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x80+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x80+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x80+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x80+0x24))&0x700)==0x400) group.long (0x80+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x80+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x80+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 3" group.long 0x100++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x100+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x100+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x100+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x100+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x100+0x24))&0xF002)==0x4002))) group.long (0x100+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x100+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x100+0x24))&0xF002)==0x2002))) group.long (0x100+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x100+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x100+0x24))&0xF002)==0x8002))) group.long (0x100+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x100+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x100+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x100+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x100+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x100+0x24))&0xF002)==0x4002))) group.long (0x100+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x100+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x100+0x24))&0xF002)==0x2002))) group.long (0x100+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x100+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x100+0x24))&0xF002)==0x8002))) group.long (0x100+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x100+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x100+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x100+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x100+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x100+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x100+0x24))&0x700)==0x400) group.long (0x100+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x100+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x100+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 4" group.long 0x180++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x180+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x180+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x180+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x180+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x180+0x24))&0xF002)==0x4002))) group.long (0x180+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x180+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x180+0x24))&0xF002)==0x2002))) group.long (0x180+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x180+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x180+0x24))&0xF002)==0x8002))) group.long (0x180+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x180+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x180+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x180+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x180+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x180+0x24))&0xF002)==0x4002))) group.long (0x180+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x180+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x180+0x24))&0xF002)==0x2002))) group.long (0x180+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x180+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x180+0x24))&0xF002)==0x8002))) group.long (0x180+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x180+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x180+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x180+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x180+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x180+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x180+0x24))&0x700)==0x400) group.long (0x180+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x180+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x180+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 5" group.long 0x200++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x200+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x200+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x200+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x200+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x200+0x24))&0xF002)==0x4002))) group.long (0x200+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x200+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x200+0x24))&0xF002)==0x2002))) group.long (0x200+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x200+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x200+0x24))&0xF002)==0x8002))) group.long (0x200+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x200+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x200+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x200+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x200+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x200+0x24))&0xF002)==0x4002))) group.long (0x200+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x200+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x200+0x24))&0xF002)==0x2002))) group.long (0x200+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x200+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x200+0x24))&0xF002)==0x8002))) group.long (0x200+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x200+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x200+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x200+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x200+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x200+0x24))&0x700)==0x400) group.long (0x200+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x200+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x200+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 6" group.long 0x280++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x280+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x280+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x280+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x280+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x280+0x24))&0xF002)==0x4002))) group.long (0x280+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x280+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x280+0x24))&0xF002)==0x2002))) group.long (0x280+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x280+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x280+0x24))&0xF002)==0x8002))) group.long (0x280+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x280+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x280+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x280+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x280+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x280+0x24))&0xF002)==0x4002))) group.long (0x280+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x280+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x280+0x24))&0xF002)==0x2002))) group.long (0x280+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x280+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x280+0x24))&0xF002)==0x8002))) group.long (0x280+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x280+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x280+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x280+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x280+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x280+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x280+0x24))&0x700)==0x400) group.long (0x280+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x280+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x280+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 7" group.long 0x300++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x300+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x300+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x300+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x300+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x300+0x24))&0xF002)==0x4002))) group.long (0x300+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x300+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x300+0x24))&0xF002)==0x2002))) group.long (0x300+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x300+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x300+0x24))&0xF002)==0x8002))) group.long (0x300+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x300+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x300+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x300+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x300+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x300+0x24))&0xF002)==0x4002))) group.long (0x300+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x300+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x300+0x24))&0xF002)==0x2002))) group.long (0x300+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x300+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x300+0x24))&0xF002)==0x8002))) group.long (0x300+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x300+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x300+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x300+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x300+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x300+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x300+0x24))&0x700)==0x400) group.long (0x300+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x300+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x300+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 8" group.long 0x380++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x380+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x380+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x380+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x380+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x380+0x24))&0xF002)==0x4002))) group.long (0x380+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x380+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x380+0x24))&0xF002)==0x2002))) group.long (0x380+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x380+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x380+0x24))&0xF002)==0x8002))) group.long (0x380+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x380+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x380+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x380+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x380+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x380+0x24))&0xF002)==0x4002))) group.long (0x380+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x380+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x380+0x24))&0xF002)==0x2002))) group.long (0x380+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x380+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x380+0x24))&0xF002)==0x8002))) group.long (0x380+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x380+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x380+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x380+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x380+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x380+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x380+0x24))&0x700)==0x400) group.long (0x380+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x380+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x380+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 9" group.long 0x400++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x400+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x400+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x400+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x400+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x400+0x24))&0xF002)==0x4002))) group.long (0x400+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x400+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x400+0x24))&0xF002)==0x2002))) group.long (0x400+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x400+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x400+0x24))&0xF002)==0x8002))) group.long (0x400+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x400+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x400+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x400+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x400+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x400+0x24))&0xF002)==0x4002))) group.long (0x400+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x400+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x400+0x24))&0xF002)==0x2002))) group.long (0x400+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x400+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x400+0x24))&0xF002)==0x8002))) group.long (0x400+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x400+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x400+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x400+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x400+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x400+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x400+0x24))&0x700)==0x400) group.long (0x400+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x400+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x400+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 10" group.long 0x480++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x480+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x480+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x480+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x480+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x480+0x24))&0xF002)==0x4002))) group.long (0x480+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x480+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x480+0x24))&0xF002)==0x2002))) group.long (0x480+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x480+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x480+0x24))&0xF002)==0x8002))) group.long (0x480+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x480+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x480+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x480+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x480+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x480+0x24))&0xF002)==0x4002))) group.long (0x480+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x480+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x480+0x24))&0xF002)==0x2002))) group.long (0x480+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x480+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x480+0x24))&0xF002)==0x8002))) group.long (0x480+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x480+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x480+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x480+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x480+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x480+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x480+0x24))&0x700)==0x400) group.long (0x480+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x480+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x480+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 11" group.long 0x500++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x500+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x500+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x500+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x500+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x500+0x24))&0xF002)==0x4002))) group.long (0x500+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x500+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x500+0x24))&0xF002)==0x2002))) group.long (0x500+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x500+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x500+0x24))&0xF002)==0x8002))) group.long (0x500+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x500+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x500+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x500+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x500+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x500+0x24))&0xF002)==0x4002))) group.long (0x500+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x500+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x500+0x24))&0xF002)==0x2002))) group.long (0x500+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x500+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x500+0x24))&0xF002)==0x8002))) group.long (0x500+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x500+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x500+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x500+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x500+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x500+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x500+0x24))&0x700)==0x400) group.long (0x500+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x500+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x500+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 12" group.long 0x580++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x580+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x580+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x580+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x580+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x580+0x24))&0xF002)==0x4002))) group.long (0x580+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x580+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x580+0x24))&0xF002)==0x2002))) group.long (0x580+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x580+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x580+0x24))&0xF002)==0x8002))) group.long (0x580+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x580+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x580+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x580+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x580+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x580+0x24))&0xF002)==0x4002))) group.long (0x580+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x580+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x580+0x24))&0xF002)==0x2002))) group.long (0x580+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x580+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x580+0x24))&0xF002)==0x8002))) group.long (0x580+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x580+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x580+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x580+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x580+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x580+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x580+0x24))&0x700)==0x400) group.long (0x580+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x580+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x580+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 13" group.long 0x600++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x600+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x600+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x600+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x600+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x600+0x24))&0xF002)==0x4002))) group.long (0x600+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x600+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x600+0x24))&0xF002)==0x2002))) group.long (0x600+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x600+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x600+0x24))&0xF002)==0x8002))) group.long (0x600+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x600+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x600+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x600+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x600+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x600+0x24))&0xF002)==0x4002))) group.long (0x600+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x600+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x600+0x24))&0xF002)==0x2002))) group.long (0x600+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x600+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x600+0x24))&0xF002)==0x8002))) group.long (0x600+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x600+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x600+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x600+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x600+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x600+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x600+0x24))&0x700)==0x400) group.long (0x600+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x600+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x600+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 14" group.long 0x680++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x680+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x680+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x680+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x680+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x680+0x24))&0xF002)==0x4002))) group.long (0x680+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x680+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x680+0x24))&0xF002)==0x2002))) group.long (0x680+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x680+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x680+0x24))&0xF002)==0x8002))) group.long (0x680+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x680+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x680+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x680+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x680+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x680+0x24))&0xF002)==0x4002))) group.long (0x680+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x680+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x680+0x24))&0xF002)==0x2002))) group.long (0x680+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x680+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x680+0x24))&0xF002)==0x8002))) group.long (0x680+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x680+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x680+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x680+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x680+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x680+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x680+0x24))&0x700)==0x400) group.long (0x680+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x680+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x680+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 15" group.long 0x700++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x700+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x700+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x700+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x700+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x700+0x24))&0xF002)==0x4002))) group.long (0x700+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x700+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x700+0x24))&0xF002)==0x2002))) group.long (0x700+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x700+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x700+0x24))&0xF002)==0x8002))) group.long (0x700+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x700+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x700+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x700+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x700+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x700+0x24))&0xF002)==0x4002))) group.long (0x700+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x700+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x700+0x24))&0xF002)==0x2002))) group.long (0x700+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x700+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x700+0x24))&0xF002)==0x8002))) group.long (0x700+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x700+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x700+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x700+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x700+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x700+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x700+0x24))&0x700)==0x400) group.long (0x700+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x700+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x700+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 16" group.long 0x780++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x780+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x780+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x780+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x780+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x780+0x24))&0xF002)==0x4002))) group.long (0x780+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x780+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x780+0x24))&0xF002)==0x2002))) group.long (0x780+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x780+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x780+0x24))&0xF002)==0x8002))) group.long (0x780+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x780+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x780+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x780+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x780+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x780+0x24))&0xF002)==0x4002))) group.long (0x780+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x780+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x780+0x24))&0xF002)==0x2002))) group.long (0x780+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x780+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x780+0x24))&0xF002)==0x8002))) group.long (0x780+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x780+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x780+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x780+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x780+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x780+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x780+0x24))&0x700)==0x400) group.long (0x780+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x780+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x780+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 17" group.long 0x800++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x800+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x800+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x800+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x800+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x800+0x24))&0xF002)==0x4002))) group.long (0x800+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x800+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x800+0x24))&0xF002)==0x2002))) group.long (0x800+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x800+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x800+0x24))&0xF002)==0x8002))) group.long (0x800+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x800+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x800+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x800+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x800+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x800+0x24))&0xF002)==0x4002))) group.long (0x800+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x800+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x800+0x24))&0xF002)==0x2002))) group.long (0x800+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x800+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x800+0x24))&0xF002)==0x8002))) group.long (0x800+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x800+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x800+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x800+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x800+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x800+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x800+0x24))&0x700)==0x400) group.long (0x800+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x800+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x800+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 18" group.long 0x880++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x880+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x880+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x880+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x880+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x880+0x24))&0xF002)==0x4002))) group.long (0x880+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x880+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x880+0x24))&0xF002)==0x2002))) group.long (0x880+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x880+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x880+0x24))&0xF002)==0x8002))) group.long (0x880+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x880+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x880+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x880+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x880+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x880+0x24))&0xF002)==0x4002))) group.long (0x880+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x880+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x880+0x24))&0xF002)==0x2002))) group.long (0x880+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x880+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x880+0x24))&0xF002)==0x8002))) group.long (0x880+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x880+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x880+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x880+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x880+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x880+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x880+0x24))&0x700)==0x400) group.long (0x880+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x880+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x880+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 19" group.long 0x900++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x900+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x900+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x900+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x900+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x900+0x24))&0xF002)==0x4002))) group.long (0x900+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x900+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x900+0x24))&0xF002)==0x2002))) group.long (0x900+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x900+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x900+0x24))&0xF002)==0x8002))) group.long (0x900+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x900+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x900+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x900+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x900+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x900+0x24))&0xF002)==0x4002))) group.long (0x900+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x900+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x900+0x24))&0xF002)==0x2002))) group.long (0x900+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x900+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x900+0x24))&0xF002)==0x8002))) group.long (0x900+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x900+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x900+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x900+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x900+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x900+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x900+0x24))&0x700)==0x400) group.long (0x900+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x900+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x900+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 20" group.long 0x980++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0x980+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0x980+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0x980+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0x980+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x980+0x24))&0xF002)==0x4002))) group.long (0x980+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x980+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x980+0x24))&0xF002)==0x2002))) group.long (0x980+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x980+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x980+0x24))&0xF002)==0x8002))) group.long (0x980+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x980+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0x980+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0x980+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x980+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x980+0x24))&0xF002)==0x4002))) group.long (0x980+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x980+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x980+0x24))&0xF002)==0x2002))) group.long (0x980+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0x980+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0x980+0x24))&0xF002)==0x8002))) group.long (0x980+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x980+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0x980+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0x980+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0x980+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0x980+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0x980+0x24))&0x700)==0x400) group.long (0x980+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0x980+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0x980+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 21" group.long 0xA00++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0xA00+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0xA00+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0xA00+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0xA00+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0xA00+0x24))&0xF002)==0x4002))) group.long (0xA00+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA00+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0xA00+0x24))&0xF002)==0x2002))) group.long (0xA00+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA00+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0xA00+0x24))&0xF002)==0x8002))) group.long (0xA00+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA00+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0xA00+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0xA00+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA00+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0xA00+0x24))&0xF002)==0x4002))) group.long (0xA00+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA00+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0xA00+0x24))&0xF002)==0x2002))) group.long (0xA00+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA00+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0xA00+0x24))&0xF002)==0x8002))) group.long (0xA00+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0xA00+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0xA00+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0xA00+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0xA00+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0xA00+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0xA00+0x24))&0x700)==0x400) group.long (0xA00+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0xA00+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0xA00+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end tree "Channel 22" group.long 0xA80++0x07 line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " TRANSFER_ENABLE ,Enables DMA transfer" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing software initiated reset" "Disabled,Enabled" rgroup.long (0xA80+0x0C)++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Indicates source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" bitfld.long 0x00 16.--18. " CURRENT_TARGET_MEMORY_BUFFER ,Indicates target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8" textline " " bitfld.long 0x00 2. " OUTSTANDING_TRANSFERS ,Indicates if there is any DMA request pending to be completed" "Not pending,Pending" bitfld.long 0x00 1. " TRANSFER_PAUSED ,Transfer paused" "Not paused,Paused" textline " " bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enable" "Disabled,Enabled" group.long (0xA80+0x10)++0x03 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE_set/clr ,Transfer done" "Not done,Done" group.long (0xA80+0x24)++0x07 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 28.--31. " TX_REQUEST_SELECT ,One of the AHUB transmit channels mapped as a target for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." bitfld.long 0x00 24.--27. " RX_REQUEST_SELECT ,One of the AHUB receive channels mapped as a source for DMA transfer" ",AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,?..." textline " " bitfld.long 0x00 16.--20. " TRIGGER_SELECT ,One of the TRANSFER_DONE interrupts of other active channels to trigger the DMA transfer from this channel" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,?..." bitfld.long 0x00 12.--15. " TRANSFER_DIRECTION ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..." textline " " bitfld.long 0x00 8.--10. " TRANSFER_MODE ,Transfer mode" ",ONCE,CONTINUOUS,,LINKED_LIST,?..." bitfld.long 0x00 2. " TRIGGER_ENABLE ,Enables wait on one of the DMA channels interrupts listed in TRIGGER_SELECT field to occur for starting the data transfer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLOWCTRL_ENABLE ,Enables flow controlled transfers to and/or from the FIFO(s) of AHUB channels specified in TX_REQUEST_SELECT and RX_REQUEST_SELECT" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Stops issuing the new requests and waits for all previously issued DMA requests are completed normally for moving into paused state" "Not paused,Paused" line.long 0x04 "CONFIG_0,Config Register" bitfld.long 0x04 28.--30. " SOURCE_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" bitfld.long 0x04 24.--26. " TARGET_MEMORY_BUFFERS ,Up to 8 logically partitioned and consecutively located buffers/chunks of ARAM/DRAM of size equal to TRANSFER_COUNT" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8" textline " " bitfld.long 0x04 20.--22. " BURST_SIZE ,Burst size" ",WORD_1,WORDS_2,WORDS_4,WORDS_8,WORDS_16,?..." bitfld.long 0x04 16.--19. " SOURCE_ADDR_WRAP ,Address wrap around window for source client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." textline " " bitfld.long 0x04 12.--15. " TARGET_ADDR_WRAP ,Address wrap around window for destination client" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..." bitfld.long 0x04 0.--3. " WEIGHT_FOR_WRR ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((((per.l(ad:0x702E2000+0xA80+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0xA80+0x24))&0xF002)==0x4002))) group.long (0xA80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA80+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0xA80+0x24))&0xF002)==0x2002))) group.long (0xA80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA80+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0xA80+0x24))&0xF002)==0x8002))) group.long (0xA80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA80+0x2C))&0x80000000)==0x80000000)&&((((per.l(ad:0x702E2000+0xA80+0x24))&0xF002)!=(0x2002||0x4002||0x8002)))) group.long (0xA80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" bitfld.long 0x00 24.--28. " OVERFLOW_THRESHOLD ,Burst of Transfers starts when FIFO status reaches this threshold and continues until it becomes empty" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--20. " STARVATION_THRESHOLD , Burst of Transfers starts when FIFO count goes below this threshold and continues until it becomes full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA80+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0xA80+0x24))&0xF002)==0x4002))) group.long (0xA80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA80+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0xA80+0x24))&0xF002)==0x2002))) group.long (0xA80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" elif ((((per.l(ad:0x702E2000+0xA80+0x2C))&0x80000000)==0x00000000)&&((((per.l(ad:0x702E2000+0xA80+0x24))&0xF002)==0x8002))) group.long (0xA80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" textline " " bitfld.long 0x00 8.--12. " TX_FIFO_SIZE ,TX FIFO size of AHUB channel indicated by the TX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RX_FIFO_SIZE ,RX FIFO size of AHUB channel indicated by the RX_REQUEST_SELECT field in multiples of 16 words/64 bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0xA80+0x2C)++0x03 line.long 0x00 "AHUB_FIFO_CTRL_0,AHUB FIFO Control Register" bitfld.long 0x00 31. " FETCHING_POLICY ,Fetching policy" "BURST_BASED,THRESHOLD_BASED" endif rgroup.long (0xA80+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Count Status Register" hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT ,Remaining number of words to be transferred" group.long (0xA80+0x34)++0x03 line.long 0x00 "LOWER_SOURCE_ADDR_0,Lower Source Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of source address" group.long (0xA80+0x3C)++0x03 line.long 0x00 "LOWER_TARGET_ADDR_0,Lower Target Address Register" hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR ,Word aligned lower 32 bits of target address" group.long (0xA80+0x44)++0x03 line.long 0x00 "TC,Transfer Count Register" hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT ,Word aligned transfer size" if (((per.l(ad:0x702E2000+0xA80+0x24))&0x700)==0x400) group.long (0xA80+0x48)++0x03 line.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" hexmask.long 0x00 2.--31. 1. " TRANSFER_COUNT ,Word aligned transfer size" else hgroup.long (0xA80+0x48)++0x03 hide.long 0x00 "LOWER_DESC_ADDR_0,Lower Descriptor Address Register" endif rgroup.long (0xA80+0x30)++0x03 line.long 0x00 "TC_STATUS_0,Transfer Status Register" hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT ,Indicates the number of block/buffer transfers completed since the channel was enabled" tree.end textline " " group.long 0xC00++0x0B "GLOBAL" line.long 0x00 "CMD_0,Command Register" bitfld.long 0x00 0. " GLOBAL_ENABLE ,Set bit to enable the DMA transfers from channels" "Disabled,Enabled" line.long 0x04 "SOFT_RESET_0,Soft Reset Register" bitfld.long 0x04 0. " ENABLE ,Self clearing soft reset" "No reset,Reset" line.long 0x08 "CG_0,Clock Gating Register" bitfld.long 0x08 2. " CFG_SLCG_ENABLE ,Second level clock gating enable for the clock driving the registers" "Disabled,Enabled" bitfld.long 0x08 1. " CHANNEL_SLCG_ENABLE ,Second level clock gating enable for the clock driving the channel controllers except of first 4 channels" "Disabled,Enabled" bitfld.long 0x08 0. " GLOBAL_SLCG_ENABLE ,Second level clock gating enable for the clock driving first 4 channel controllers and remaining modules" "Disabled,Enabled" rgroup.long 0xC10++0x03 line.long 0x00 "STATUS_0,Status Register" bitfld.long 0x00 4. " TRANSFER_PAUSED ,Paused transfer from all channels" "Resumed,Paused" bitfld.long 0x00 3. " CFG_CLK_ENABLED , Indicates whether Registers clock is enabled or disable" "Disabled,Enabled" bitfld.long 0x00 2. " CHANNEL_CLK_ENABLED , Indicates whether the clock driving channel controllers is enabled or disabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " GLOBAL_CLK_ENABLED , Indicates whether the clock driving common modules is enabled or disabled" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Asserts when any of the channels is enabled for DMA transfer" "Disabled,Enabled" group.long 0xC14++0x07 line.long 0x00 "INT_STATUS_0,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " GLOBAL_TRANSFER_ERROR_set/clr ,Global transfer error" "No error,Error" line.long 0x04 "INT_MASK_0,Interrupt Mask Register" bitfld.long 0x04 0. " GLOBAL_TRANSFER_ERROR ,Mask for hardware or software triggered error interrupt" "Not masked,Masked" group.long 0xC24++0x03 line.long 0x00 "CTRL_0,Control Register" bitfld.long 0x00 16.--19. " OUTSTANDING_MEM_WRITES ,Supports a max of 8 outstanding memory reads to ARAM/DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " OUTSTANDING_MEM_READS ,Supports a max of 8 outstanding memory writes to ARAM/DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " TRANSFER_PAUSE ,Software may choose to PASUE Transfers from all channels by setting this bit" "Disabled,Enabled" rgroup.long 0xC28++0x17 line.long 0x00 "CH_INT_STATUS_0,Channel Interrupt Status Register" bitfld.long 0x00 21. " CH22_TRANSFER_DONE ,CH22 transfer done" "Not done,Done" bitfld.long 0x00 20. " CH21_TRANSFER_DONE ,CH21 transfer done" "Not done,Done" bitfld.long 0x00 19. " CH20_TRANSFER_DONE ,CH20 transfer done" "Not done,Done" textline " " bitfld.long 0x00 18. " CH19_TRANSFER_DONE ,CH19 transfer done" "Not done,Done" bitfld.long 0x00 17. " CH18_TRANSFER_DONE ,CH18 transfer done" "Not done,Done" bitfld.long 0x00 16. " CH17_TRANSFER_DONE ,CH17 transfer done" "Not done,Done" textline " " bitfld.long 0x00 15. " CH16_TRANSFER_DONE ,CH16 transfer done" "Not done,Done" bitfld.long 0x00 14. " CH15_TRANSFER_DONE ,CH15 transfer done" "Not done,Done" bitfld.long 0x00 13. " CH14_TRANSFER_DONE ,CH14 transfer done" "Not done,Done" textline " " bitfld.long 0x00 12. " CH13_TRANSFER_DONE ,CH13 transfer done" "Not done,Done" bitfld.long 0x00 11. " CH12_TRANSFER_DONE ,CH12 transfer done" "Not done,Done" bitfld.long 0x00 10. " CH11_TRANSFER_DONE ,CH11 transfer done" "Not done,Done" textline " " bitfld.long 0x00 9. " CH10_TRANSFER_DONE ,CH10 transfer done" "Not done,Done" bitfld.long 0x00 8. " CH9_TRANSFER_DONE ,CH9 transfer done" "Not done,Done" bitfld.long 0x00 7. " CH8_TRANSFER_DONE ,CH8 transfer done" "Not done,Done" textline " " bitfld.long 0x00 6. " CH7_TRANSFER_DONE ,CH7 transfer done" "Not done,Done" bitfld.long 0x00 5. " CH6_TRANSFER_DONE ,CH6 transfer done" "Not done,Done" bitfld.long 0x00 4. " CH5_TRANSFER_DONE ,CH5 transfer done" "Not done,Done" textline " " bitfld.long 0x00 3. " CH4_TRANSFER_DONE ,CH4 transfer done" "Not done,Done" bitfld.long 0x00 2. " CH3_TRANSFER_DONE ,CH3 transfer done" "Not done,Done" bitfld.long 0x00 1. " CH2_TRANSFER_DONE ,CH2 transfer done" "Not done,Done" textline " " bitfld.long 0x00 0. " CH1_TRANSFER_DONE ,CH1 transfer done" "Not done,Done" line.long 0x04 "CH_ENABLE_STATUS_0,Channel Enable Status Register" bitfld.long 0x04 21. " CH22_TRANSFER_ENABLED ,CH22 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 20. " CH21_TRANSFER_ENABLED ,CH21 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 19. " CH20_TRANSFER_ENABLED ,CH20 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " CH19_TRANSFER_ENABLED ,CH19 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 17. " CH18_TRANSFER_ENABLED ,CH18 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 16. " CH17_TRANSFER_ENABLED ,CH17 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " CH16_TRANSFER_ENABLED ,CH16 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 14. " CH15_TRANSFER_ENABLED ,CH15 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 13. " CH14_TRANSFER_ENABLED ,CH14 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " CH13_TRANSFER_ENABLED ,CH13 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 11. " CH12_TRANSFER_ENABLED ,CH12 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 10. " CH11_TRANSFER_ENABLED ,CH11 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " CH10_TRANSFER_ENABLED ,CH10 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 8. " CH9_TRANSFER_ENABLED ,CH9 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 7. " CH8_TRANSFER_ENABLED ,CH8 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " CH7_TRANSFER_ENABLED ,CH7 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 5. " CH6_TRANSFER_ENABLED ,CH6 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 4. " CH5_TRANSFER_ENABLED ,CH5 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " CH4_TRANSFER_ENABLED ,CH4 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 2. " CH3_TRANSFER_ENABLED ,CH3 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 1. " CH2_TRANSFER_ENABLED ,CH2 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CH1_TRANSFER_ENABLED ,CH1 transfer enabled" "Disabled,Enabled" line.long 0x08 "TX_REQUESTORS_0,TX Requestors Register" bitfld.long 0x08 9. " AHUB_CH10_ENABLED ,AHUB CH10 enabled" "Disabled,Enabled" bitfld.long 0x08 8. " AHUB_CH9_ENABLED ,AHUB CH9 enabled" "Disabled,Enabled" bitfld.long 0x08 7. " AHUB_CH8_ENABLED ,AHUB CH8 enabled" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " AHUB_CH7_ENABLED ,AHUB CH7 enabled" "Disabled,Enabled" bitfld.long 0x08 5. " AHUB_CH6_ENABLED ,AHUB CH6 enabled" "Disabled,Enabled" bitfld.long 0x08 4. " AHUB_CH5_ENABLED ,AHUB CH5 enabled" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " AHUB_CH4_ENABLED ,AHUB CH4 enabled" "Disabled,Enabled" bitfld.long 0x08 2. " AHUB_CH3_ENABLED ,AHUB CH3 enabled" "Disabled,Enabled" bitfld.long 0x08 1. " AHUB_CH2_ENABLED ,AHUB CH2 enabled" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " AHUB_CH1_ENABLED ,AHUB CH1 enabled" "Disabled,Enabled" line.long 0x0C "RX_REQUESTORS_0,RX Requestors Register" bitfld.long 0x0C 9. " AHUB_CH10_ENABLED ,AHUB CH10 enabled" "Disabled,Enabled" bitfld.long 0x0C 8. " AHUB_CH9_ENABLED ,AHUB CH9 enabled" "Disabled,Enabled" bitfld.long 0x0C 7. " AHUB_CH8_ENABLED ,AHUB CH8 enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " AHUB_CH7_ENABLED ,AHUB CH7 enabled" "Disabled,Enabled" bitfld.long 0x0C 5. " AHUB_CH6_ENABLED ,AHUB CH6 enabled" "Disabled,Enabled" bitfld.long 0x0C 4. " AHUB_CH5_ENABLED ,AHUB CH5 enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " AHUB_CH4_ENABLED ,AHUB CH4 enabled" "Disabled,Enabled" bitfld.long 0x0C 2. " AHUB_CH3_ENABLED ,AHUB CH3 enabled" "Disabled,Enabled" bitfld.long 0x0C 1. " AHUB_CH2_ENABLED ,AHUB CH2 enabled" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " AHUB_CH1_ENABLED ,AHUB CH1 enabled" "Disabled,Enabled" line.long 0x10 "TRIGGERS_0,Triggers Register" bitfld.long 0x10 21. " CH22_TRIGGER_ASSERTED ,CH22 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 20. " CH21_TRIGGER_ASSERTED ,CH21 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 19. " CH20_TRIGGER_ASSERTED ,CH20 trigger asserted" "Not asserted,Asserted" textline " " bitfld.long 0x10 18. " CH19_TRIGGER_ASSERTED ,CH19 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 17. " CH18_TRIGGER_ASSERTED ,CH18 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 16. " CH17_TRIGGER_ASSERTED ,CH17 trigger asserted" "Not asserted,Asserted" textline " " bitfld.long 0x10 15. " CH16_TRIGGER_ASSERTED ,CH16 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 14. " CH15_TRIGGER_ASSERTED ,CH15 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 13. " CH14_TRIGGER_ASSERTED ,CH14 trigger asserted" "Not asserted,Asserted" textline " " bitfld.long 0x10 12. " CH13_TRIGGER_ASSERTED ,CH13 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 11. " CH12_TRIGGER_ASSERTED ,CH12 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 10. " CH11_TRIGGER_ASSERTED ,CH11 trigger asserted" "Not asserted,Asserted" textline " " bitfld.long 0x10 9. " CH10_TRIGGER_ASSERTED ,CH10 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 8. " CH9_TRIGGER_ASSERTED ,CH9 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 7. " CH8_TRIGGER_ASSERTED ,CH8 trigger asserted" "Not asserted,Asserted" textline " " bitfld.long 0x10 6. " CH7_TRIGGER_ASSERTED ,CH7 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 5. " CH6_TRIGGER_ASSERTED ,CH6 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 4. " CH5_TRIGGER_ASSERTED ,CH5 trigger asserted" "Not asserted,Asserted" textline " " bitfld.long 0x10 3. " CH4_TRIGGER_ASSERTED ,CH4 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 2. " CH3_TRIGGER_ASSERTED ,CH3 trigger asserted" "Not asserted,Asserted" bitfld.long 0x10 1. " CH2_TRIGGER_ASSERTED ,CH2 trigger asserted" "Not asserted,Asserted" textline " " bitfld.long 0x10 0. " CH1_TRIGGER_ASSERTED ,CH1 trigger asserted" "Not asserted,Asserted" line.long 0x14 "TRANSFER_ERROR_LOG_0,Transfer Error Log Register" bitfld.long 0x14 16.--21. " RID ,RID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 12.--13. " RRESP ,RRESP" "OKAY,EXOKAY,SLVERR,DECERR" bitfld.long 0x14 4.--9. " BID ,BID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 0.--1. " BRESP ,BRESP" "OKAY,EXOKAY,SLVERR,DECERR" width 0x0B tree.end tree "ADMAIF" base ad:0x702D0000 width 44. ; 0x10 - channels count ; 0x300 - registers offset tree "Channel 1" group.long (0x0+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX1_ENABLE_0,AXBAR_RX1_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX1_SOFT_RESET_0,AXBAR_RX1_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x0+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX1_STATUS_0,AXBAR RX1 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x0+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX1_INT_STATUS_0,AXBAR RX1 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX1_INT_MASK_0,AXBAR_RX1_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x0+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX1_CIF_CTRL_0,AXBAR_RX1_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x0+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX1_FIFO_CTRL_0,AXBAR RX1 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX1_FIFO_READ_0,AXBAR RX1 FIFO READ Register" group.long (0x0+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX1_ENABLE_0,AXBAR_TX1_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX1_SOFT_RESET_0,AXBAR TX1 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x0+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX1_STATUS_0,AXBAR TX1 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x0+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX1_INT_STATUS_0,AXBAR TX1 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX1_INT_MASK_0,AXBAR TX1 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x0+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX1_CIF_CTRL_0,AXBAR TX1 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x0+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX1_FIFO_CTRL_0,AXBAR TX1 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX1_FIFO_WRITE_0,AXBAR TX1 FIFO WRITE Register" tree.end tree "Channel 2" group.long (0x40+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX2_ENABLE_0,AXBAR_RX2_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX2_SOFT_RESET_0,AXBAR_RX2_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x40+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX2_STATUS_0,AXBAR RX2 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x40+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX2_INT_STATUS_0,AXBAR RX2 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX2_INT_MASK_0,AXBAR_RX2_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x40+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX2_CIF_CTRL_0,AXBAR_RX2_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x40+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX2_FIFO_CTRL_0,AXBAR RX2 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX2_FIFO_READ_0,AXBAR RX2 FIFO READ Register" group.long (0x40+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX2_ENABLE_0,AXBAR_TX2_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX2_SOFT_RESET_0,AXBAR TX2 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x40+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX2_STATUS_0,AXBAR TX2 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x40+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX2_INT_STATUS_0,AXBAR TX2 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX2_INT_MASK_0,AXBAR TX2 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x40+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX2_CIF_CTRL_0,AXBAR TX2 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x40+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX2_FIFO_CTRL_0,AXBAR TX2 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX2_FIFO_WRITE_0,AXBAR TX2 FIFO WRITE Register" tree.end tree "Channel 3" group.long (0x80+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX3_ENABLE_0,AXBAR_RX3_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX3_SOFT_RESET_0,AXBAR_RX3_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x80+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX3_STATUS_0,AXBAR RX3 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x80+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX3_INT_STATUS_0,AXBAR RX3 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX3_INT_MASK_0,AXBAR_RX3_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x80+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX3_CIF_CTRL_0,AXBAR_RX3_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x80+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX3_FIFO_CTRL_0,AXBAR RX3 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX3_FIFO_READ_0,AXBAR RX3 FIFO READ Register" group.long (0x80+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX3_ENABLE_0,AXBAR_TX3_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX3_SOFT_RESET_0,AXBAR TX3 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x80+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX3_STATUS_0,AXBAR TX3 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x80+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX3_INT_STATUS_0,AXBAR TX3 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX3_INT_MASK_0,AXBAR TX3 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x80+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX3_CIF_CTRL_0,AXBAR TX3 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x80+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX3_FIFO_CTRL_0,AXBAR TX3 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX3_FIFO_WRITE_0,AXBAR TX3 FIFO WRITE Register" tree.end tree "Channel 4" group.long (0xC0+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX4_ENABLE_0,AXBAR_RX4_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX4_SOFT_RESET_0,AXBAR_RX4_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0xC0+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX4_STATUS_0,AXBAR RX4 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0xC0+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX4_INT_STATUS_0,AXBAR RX4 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX4_INT_MASK_0,AXBAR_RX4_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0xC0+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX4_CIF_CTRL_0,AXBAR_RX4_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0xC0+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX4_FIFO_CTRL_0,AXBAR RX4 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX4_FIFO_READ_0,AXBAR RX4 FIFO READ Register" group.long (0xC0+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX4_ENABLE_0,AXBAR_TX4_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX4_SOFT_RESET_0,AXBAR TX4 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0xC0+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX4_STATUS_0,AXBAR TX4 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0xC0+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX4_INT_STATUS_0,AXBAR TX4 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX4_INT_MASK_0,AXBAR TX4 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0xC0+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX4_CIF_CTRL_0,AXBAR TX4 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0xC0+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX4_FIFO_CTRL_0,AXBAR TX4 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX4_FIFO_WRITE_0,AXBAR TX4 FIFO WRITE Register" tree.end tree "Channel 5" group.long (0x100+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX5_ENABLE_0,AXBAR_RX5_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX5_SOFT_RESET_0,AXBAR_RX5_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x100+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX5_STATUS_0,AXBAR RX5 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x100+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX5_INT_STATUS_0,AXBAR RX5 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX5_INT_MASK_0,AXBAR_RX5_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x100+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX5_CIF_CTRL_0,AXBAR_RX5_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x100+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX5_FIFO_CTRL_0,AXBAR RX5 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX5_FIFO_READ_0,AXBAR RX5 FIFO READ Register" group.long (0x100+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX5_ENABLE_0,AXBAR_TX5_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX5_SOFT_RESET_0,AXBAR TX5 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x100+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX5_STATUS_0,AXBAR TX5 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x100+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX5_INT_STATUS_0,AXBAR TX5 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX5_INT_MASK_0,AXBAR TX5 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x100+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX5_CIF_CTRL_0,AXBAR TX5 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x100+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX5_FIFO_CTRL_0,AXBAR TX5 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX5_FIFO_WRITE_0,AXBAR TX5 FIFO WRITE Register" tree.end tree "Channel 6" group.long (0x140+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX6_ENABLE_0,AXBAR_RX6_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX6_SOFT_RESET_0,AXBAR_RX6_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x140+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX6_STATUS_0,AXBAR RX6 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x140+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX6_INT_STATUS_0,AXBAR RX6 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX6_INT_MASK_0,AXBAR_RX6_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x140+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX6_CIF_CTRL_0,AXBAR_RX6_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x140+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX6_FIFO_CTRL_0,AXBAR RX6 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX6_FIFO_READ_0,AXBAR RX6 FIFO READ Register" group.long (0x140+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX6_ENABLE_0,AXBAR_TX6_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX6_SOFT_RESET_0,AXBAR TX6 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x140+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX6_STATUS_0,AXBAR TX6 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x140+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX6_INT_STATUS_0,AXBAR TX6 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX6_INT_MASK_0,AXBAR TX6 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x140+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX6_CIF_CTRL_0,AXBAR TX6 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x140+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX6_FIFO_CTRL_0,AXBAR TX6 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX6_FIFO_WRITE_0,AXBAR TX6 FIFO WRITE Register" tree.end tree "Channel 7" group.long (0x180+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX7_ENABLE_0,AXBAR_RX7_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX7_SOFT_RESET_0,AXBAR_RX7_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x180+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX7_STATUS_0,AXBAR RX7 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x180+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX7_INT_STATUS_0,AXBAR RX7 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX7_INT_MASK_0,AXBAR_RX7_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x180+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX7_CIF_CTRL_0,AXBAR_RX7_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x180+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX7_FIFO_CTRL_0,AXBAR RX7 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX7_FIFO_READ_0,AXBAR RX7 FIFO READ Register" group.long (0x180+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX7_ENABLE_0,AXBAR_TX7_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX7_SOFT_RESET_0,AXBAR TX7 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x180+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX7_STATUS_0,AXBAR TX7 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x180+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX7_INT_STATUS_0,AXBAR TX7 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX7_INT_MASK_0,AXBAR TX7 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x180+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX7_CIF_CTRL_0,AXBAR TX7 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x180+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX7_FIFO_CTRL_0,AXBAR TX7 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX7_FIFO_WRITE_0,AXBAR TX7 FIFO WRITE Register" tree.end tree "Channel 8" group.long (0x1C0+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX8_ENABLE_0,AXBAR_RX8_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX8_SOFT_RESET_0,AXBAR_RX8_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x1C0+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX8_STATUS_0,AXBAR RX8 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x1C0+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX8_INT_STATUS_0,AXBAR RX8 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX8_INT_MASK_0,AXBAR_RX8_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x1C0+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX8_CIF_CTRL_0,AXBAR_RX8_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x1C0+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX8_FIFO_CTRL_0,AXBAR RX8 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX8_FIFO_READ_0,AXBAR RX8 FIFO READ Register" group.long (0x1C0+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX8_ENABLE_0,AXBAR_TX8_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX8_SOFT_RESET_0,AXBAR TX8 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x1C0+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX8_STATUS_0,AXBAR TX8 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x1C0+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX8_INT_STATUS_0,AXBAR TX8 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX8_INT_MASK_0,AXBAR TX8 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x1C0+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX8_CIF_CTRL_0,AXBAR TX8 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x1C0+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX8_FIFO_CTRL_0,AXBAR TX8 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX8_FIFO_WRITE_0,AXBAR TX8 FIFO WRITE Register" tree.end tree "Channel 9" group.long (0x200+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX9_ENABLE_0,AXBAR_RX9_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX9_SOFT_RESET_0,AXBAR_RX9_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x200+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX9_STATUS_0,AXBAR RX9 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x200+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX9_INT_STATUS_0,AXBAR RX9 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX9_INT_MASK_0,AXBAR_RX9_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x200+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX9_CIF_CTRL_0,AXBAR_RX9_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x200+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX9_FIFO_CTRL_0,AXBAR RX9 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX9_FIFO_READ_0,AXBAR RX9 FIFO READ Register" group.long (0x200+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX9_ENABLE_0,AXBAR_TX9_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX9_SOFT_RESET_0,AXBAR TX9 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x200+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX9_STATUS_0,AXBAR TX9 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x200+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX9_INT_STATUS_0,AXBAR TX9 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX9_INT_MASK_0,AXBAR TX9 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x200+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX9_CIF_CTRL_0,AXBAR TX9 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x200+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX9_FIFO_CTRL_0,AXBAR TX9 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX9_FIFO_WRITE_0,AXBAR TX9 FIFO WRITE Register" tree.end tree "Channel 10" group.long (0x240+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX10_ENABLE_0,AXBAR_RX10_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX10_SOFT_RESET_0,AXBAR_RX10_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x240+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX10_STATUS_0,AXBAR RX10 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x240+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX10_INT_STATUS_0,AXBAR RX10 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX10_INT_MASK_0,AXBAR_RX10_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x240+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX10_CIF_CTRL_0,AXBAR_RX10_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x240+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX10_FIFO_CTRL_0,AXBAR RX10 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX10_FIFO_READ_0,AXBAR RX10 FIFO READ Register" group.long (0x240+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX10_ENABLE_0,AXBAR_TX10_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX10_SOFT_RESET_0,AXBAR TX10 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x240+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX10_STATUS_0,AXBAR TX10 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x240+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX10_INT_STATUS_0,AXBAR TX10 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX10_INT_MASK_0,AXBAR TX10 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x240+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX10_CIF_CTRL_0,AXBAR TX10 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x240+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX10_FIFO_CTRL_0,AXBAR TX10 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX10_FIFO_WRITE_0,AXBAR TX10 FIFO WRITE Register" tree.end tree "Channel 11" group.long (0x280+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX11_ENABLE_0,AXBAR_RX11_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX11_SOFT_RESET_0,AXBAR_RX11_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x280+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX11_STATUS_0,AXBAR RX11 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x280+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX11_INT_STATUS_0,AXBAR RX11 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX11_INT_MASK_0,AXBAR_RX11_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x280+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX11_CIF_CTRL_0,AXBAR_RX11_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x280+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX11_FIFO_CTRL_0,AXBAR RX11 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX11_FIFO_READ_0,AXBAR RX11 FIFO READ Register" group.long (0x280+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX11_ENABLE_0,AXBAR_TX11_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX11_SOFT_RESET_0,AXBAR TX11 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x280+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX11_STATUS_0,AXBAR TX11 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x280+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX11_INT_STATUS_0,AXBAR TX11 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX11_INT_MASK_0,AXBAR TX11 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x280+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX11_CIF_CTRL_0,AXBAR TX11 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x280+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX11_FIFO_CTRL_0,AXBAR TX11 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX11_FIFO_WRITE_0,AXBAR TX11 FIFO WRITE Register" tree.end tree "Channel 12" group.long (0x2C0+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX12_ENABLE_0,AXBAR_RX12_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX12_SOFT_RESET_0,AXBAR_RX12_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x2C0+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX12_STATUS_0,AXBAR RX12 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x2C0+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX12_INT_STATUS_0,AXBAR RX12 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX12_INT_MASK_0,AXBAR_RX12_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x2C0+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX12_CIF_CTRL_0,AXBAR_RX12_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x2C0+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX12_FIFO_CTRL_0,AXBAR RX12 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX12_FIFO_READ_0,AXBAR RX12 FIFO READ Register" group.long (0x2C0+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX12_ENABLE_0,AXBAR_TX12_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX12_SOFT_RESET_0,AXBAR TX12 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x2C0+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX12_STATUS_0,AXBAR TX12 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x2C0+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX12_INT_STATUS_0,AXBAR TX12 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX12_INT_MASK_0,AXBAR TX12 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x2C0+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX12_CIF_CTRL_0,AXBAR TX12 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x2C0+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX12_FIFO_CTRL_0,AXBAR TX12 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX12_FIFO_WRITE_0,AXBAR TX12 FIFO WRITE Register" tree.end tree "Channel 13" group.long (0x300+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX13_ENABLE_0,AXBAR_RX13_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX13_SOFT_RESET_0,AXBAR_RX13_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x300+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX13_STATUS_0,AXBAR RX13 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX13_INT_STATUS_0,AXBAR RX13 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX13_INT_MASK_0,AXBAR_RX13_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX13_CIF_CTRL_0,AXBAR_RX13_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX13_FIFO_CTRL_0,AXBAR RX13 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX13_FIFO_READ_0,AXBAR RX13 FIFO READ Register" group.long (0x300+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX13_ENABLE_0,AXBAR_TX13_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX13_SOFT_RESET_0,AXBAR TX13 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x300+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX13_STATUS_0,AXBAR TX13 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x300+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX13_INT_STATUS_0,AXBAR TX13 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX13_INT_MASK_0,AXBAR TX13 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x300+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX13_CIF_CTRL_0,AXBAR TX13 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x300+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX13_FIFO_CTRL_0,AXBAR TX13 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX13_FIFO_WRITE_0,AXBAR TX13 FIFO WRITE Register" tree.end tree "Channel 14" group.long (0x340+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX14_ENABLE_0,AXBAR_RX14_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX14_SOFT_RESET_0,AXBAR_RX14_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x340+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX14_STATUS_0,AXBAR RX14 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x340+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX14_INT_STATUS_0,AXBAR RX14 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX14_INT_MASK_0,AXBAR_RX14_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x340+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX14_CIF_CTRL_0,AXBAR_RX14_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x340+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX14_FIFO_CTRL_0,AXBAR RX14 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX14_FIFO_READ_0,AXBAR RX14 FIFO READ Register" group.long (0x340+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX14_ENABLE_0,AXBAR_TX14_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX14_SOFT_RESET_0,AXBAR TX14 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x340+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX14_STATUS_0,AXBAR TX14 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x340+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX14_INT_STATUS_0,AXBAR TX14 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX14_INT_MASK_0,AXBAR TX14 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x340+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX14_CIF_CTRL_0,AXBAR TX14 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x340+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX14_FIFO_CTRL_0,AXBAR TX14 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX14_FIFO_WRITE_0,AXBAR TX14 FIFO WRITE Register" tree.end tree "Channel 15" group.long (0x380+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX15_ENABLE_0,AXBAR_RX15_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX15_SOFT_RESET_0,AXBAR_RX15_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x380+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX15_STATUS_0,AXBAR RX15 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x380+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX15_INT_STATUS_0,AXBAR RX15 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX15_INT_MASK_0,AXBAR_RX15_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x380+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX15_CIF_CTRL_0,AXBAR_RX15_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x380+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX15_FIFO_CTRL_0,AXBAR RX15 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX15_FIFO_READ_0,AXBAR RX15 FIFO READ Register" group.long (0x380+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX15_ENABLE_0,AXBAR_TX15_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX15_SOFT_RESET_0,AXBAR TX15 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x380+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX15_STATUS_0,AXBAR TX15 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x380+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX15_INT_STATUS_0,AXBAR TX15 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX15_INT_MASK_0,AXBAR TX15 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x380+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX15_CIF_CTRL_0,AXBAR TX15 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x380+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX15_FIFO_CTRL_0,AXBAR TX15 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX15_FIFO_WRITE_0,AXBAR TX15 FIFO WRITE Register" tree.end tree "Channel 16" group.long (0x3C0+0x00)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX16_ENABLE_0,AXBAR_RX16_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_RX16_SOFT_RESET_0,AXBAR_RX16_SOFT_RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x3C0+0x0C)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX16_STATUS_0,AXBAR RX16 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x3C0+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX16_INT_STATUS_0,AXBAR RX16 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr ,DMA overrun" "No overrun,Overrun" line.long 0x04 "ADMAIF_AXBAR_RX16_INT_MASK_0,AXBAR_RX16_INT_MASK Register" bitfld.long 0x04 0. " DMA_OVERRUN ,DMA overrun" "Not masked,Masked" group.long (0x3C0+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_RX16_CIF_CTRL_0,AXBAR_RX16_CIF_CTRL Register" bitfld.long 0x00 31. " PACK8_ENABLE ,PACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " PACK16_ENABLE ,PACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x3C0+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_RX16_FIFO_CTRL_0,AXBAR RX16 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_RX16_FIFO_READ_0,AXBAR RX16 FIFO READ Register" group.long (0x3C0+0x300)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX16_ENABLE_0,AXBAR_TX16_ENABLE Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_AXBAR_TX16_SOFT_RESET_0,AXBAR TX16 SOFT RESET Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" group.long (0x3C0+0x300+0x0C)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX16_STATUS_0,AXBAR TX16 STATUS Register" hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS ,Available credits" bitfld.long 0x00 7. " DMA_FIFO_FULL ,DMA FIFO full" "Not full,Full" bitfld.long 0x00 6. " DMA_FIFO_EMPTY ,DMA FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 5. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 4. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Transfer enabled" "Disabled,Enabled" group.long (0x3C0+0x300+0x10)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX16_INT_STATUS_0,AXBAR TX16 INT STATUS Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt" line.long 0x04 "ADMAIF_AXBAR_TX16_INT_MASK_0,AXBAR TX16 INT MASK Register" bitfld.long 0x04 0. " DMA_UNDERRUN ,DMA underrun" "Not masked,Masked" group.long (0x3C0+0x300+0x20)++0x03 line.long 0x00 "ADMAIF_AXBAR_TX16_CIF_CTRL_0,AXBAR TX16 CIF CTRL Register" bitfld.long 0x00 31. " UNPACK8_ENABLE ,UNPACK8 enable" "Disabled,Enabled" bitfld.long 0x00 30. " UNPACK16_ENABLE ,UNPACK16 enable" "Disabled,Enabled" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" textline " " bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32" bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" group.long (0x3C0+0x300+0x28)++0x07 line.long 0x00 "ADMAIF_AXBAR_TX16_FIFO_CTRL_0,AXBAR TX16 FIFO CTRL Register" bitfld.long 0x00 31. " TRANSFER_MODE ,Transfer mode" "DMA,PIO" sif cpuis("TEGRAX2") hexmask.long.word 0x00 20.--30. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--13. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR ,DMA FIFO start address" else hexmask.long.word 0x00 20.--29. 1. " DMA_FIFO_THRESHOLD , DMA FIFO threshold" bitfld.long 0x00 8.--12. " DMA_FIFO_SIZE ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif line.long 0x04 "ADMAIF_AXBAR_TX16_FIFO_WRITE_0,AXBAR TX16 FIFO WRITE Register" tree.end textline " " group.long (0x10*0x40+0x300)++0x0B line.long 0x00 "ADMAIF_GLOBAL_ENABLE_0,GLobal Enable Register" bitfld.long 0x00 0. " ENABLE , Enable" "Disabled,Enabled" line.long 0x04 "ADMAIF_GLOBAL_SOFT_RESET_0,Global Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET , Soft reset" "No reset,Reset" line.long 0x08 "ADMAIF_GLOBAL_CG_0,Global CG Register" bitfld.long 0x08 1. " CHANNEL_SLCG_ENABLE ,Second level clock gating enable, for remaining channels specific logic portions" "Disabled,Enabled" bitfld.long 0x08 0. " GLOBAL_SLCG_ENABLE ,Second level clock gating enable for first 2 channels and global/common logic" "Disabled,Enabled" rgroup.long (0x10*0x40+0x300+0x10)++0x03 line.long 0x00 "ADMAIF_GLOBAL_STATUS_0,Global Status Register" bitfld.long 0x00 9. " CHANNEL_CLK_ENABLE ,Channel clock enable" "Disabled,Enabled" bitfld.long 0x00 8. " GLOBAL_CLK_ENABLE , Global clock enable" "Disabled,Enabled" bitfld.long 0x00 0. " TRANSFER_ENABLED ,Set when at least one of the channels is enabled by software" "Disabled,Enabled" rgroup.long (0x10*0x40+0x300+0x20)++0x2F line.long 0x00 "ADMAIF_GLOBAL_RX_ENABLE_STATUS_0,Global RX Enable Status Register" sif cpuis("TEGRAX2") bitfld.long 0x00 19. " CH20_TRANSFER_ENABLED ,CH20 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 18. " CH19_TRANSFER_ENABLED ,CH19 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 17. " CH18_TRANSFER_ENABLED ,CH18 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CH17_TRANSFER_ENABLED ,CH17 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 15. " CH16_TRANSFER_ENABLED ,CH16 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 14. " CH15_TRANSFER_ENABLED ,CH15 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " CH14_TRANSFER_ENABLED ,CH14 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 12. " CH13_TRANSFER_ENABLED ,CH13 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 11. " CH12_TRANSFER_ENABLED ,CH12 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " CH11_TRANSFER_ENABLED ,CH11 transfer enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 9. " CH10_TRANSFER_ENABLED ,CH10 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 8. " CH9_TRANSFER_ENABLED ,CH9 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 7. " CH8_TRANSFER_ENABLED ,CH8 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CH7_TRANSFER_ENABLED ,CH7 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 5. " CH6_TRANSFER_ENABLED ,CH6 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 4. " CH5_TRANSFER_ENABLED ,CH5 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CH4_TRANSFER_ENABLED ,CH4 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 2. " CH3_TRANSFER_ENABLED ,CH3 transfer enabled" "Disabled,Enabled" bitfld.long 0x00 1. " CH2_TRANSFER_ENABLED ,CH2 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CH1_TRANSFER_ENABLED ,CH1 transfer enabled" "Disabled,Enabled" line.long 0x04 "ADMAIF_GLOBAL_TX_ENABLE_STATUS_0,Global TX Enable Status Register" sif cpuis("TEGRAX2") bitfld.long 0x04 19. " CH20_TRANSFER_ENABLED ,CH20 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 18. " CH19_TRANSFER_ENABLED ,CH19 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 17. " CH18_TRANSFER_ENABLED ,CH18 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " CH17_TRANSFER_ENABLED ,CH17 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 15. " CH16_TRANSFER_ENABLED ,CH16 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 14. " CH15_TRANSFER_ENABLED ,CH15 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " CH14_TRANSFER_ENABLED ,CH14 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 12. " CH13_TRANSFER_ENABLED ,CH13 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 11. " CH12_TRANSFER_ENABLED ,CH12 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " CH11_TRANSFER_ENABLED ,CH11 transfer enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x04 9. " CH10_TRANSFER_ENABLED ,CH10 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 8. " CH9_TRANSFER_ENABLED ,CH9 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 7. " CH8_TRANSFER_ENABLED ,CH8 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " CH7_TRANSFER_ENABLED ,CH7 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 5. " CH6_TRANSFER_ENABLED ,CH6 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 4. " CH5_TRANSFER_ENABLED ,CH5 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " CH4_TRANSFER_ENABLED ,CH4 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 2. " CH3_TRANSFER_ENABLED ,CH3 transfer enabled" "Disabled,Enabled" bitfld.long 0x04 1. " CH2_TRANSFER_ENABLED ,CH2 transfer enabled" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CH1_TRANSFER_ENABLED ,CH1 transfer enabled" "Disabled,Enabled" line.long 0x08 "ADMAIF_GLOBAL_RX_DMA_FIFO_EMPTY_STATUS_0,Global RX DMA FIFO Empty Status Register" sif cpuis("TEGRAX2") bitfld.long 0x08 19. " CH20_FIFO_EMPTY ,CH20 FIFO empty" "Not empty,Empty" bitfld.long 0x08 18. " CH19_FIFO_EMPTY ,CH19 FIFO empty" "Not empty,Empty" bitfld.long 0x08 17. " CH18_FIFO_EMPTY ,CH18 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x08 16. " CH17_FIFO_EMPTY ,CH17 FIFO empty" "Not empty,Empty" bitfld.long 0x08 15. " CH16_FIFO_EMPTY ,CH16 FIFO empty" "Not empty,Empty" bitfld.long 0x08 14. " CH15_FIFO_EMPTY ,CH15 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x08 13. " CH14_FIFO_EMPTY ,CH14 FIFO empty" "Not empty,Empty" bitfld.long 0x08 12. " CH13_FIFO_EMPTY ,CH13 FIFO empty" "Not empty,Empty" bitfld.long 0x08 11. " CH12_FIFO_EMPTY ,CH12 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x08 10. " CH11_FIFO_EMPTY ,CH11 FIFO empty" "Not empty,Empty" textline " " endif bitfld.long 0x08 9. " CH10_FIFO_EMPTY ,CH10 FIFO empty" "Not empty,Empty" bitfld.long 0x08 8. " CH9_FIFO_EMPTY ,CH9 FIFO empty" "Not empty,Empty" bitfld.long 0x08 7. " CH8_FIFO_EMPTY ,CH8 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x08 6. " CH7_FIFO_EMPTY ,CH7 FIFO empty" "Not empty,Empty" bitfld.long 0x08 5. " CH6_FIFO_EMPTY ,CH6 FIFO empty" "Not empty,Empty" bitfld.long 0x08 4. " CH5_FIFO_EMPTY ,CH5 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x08 3. " CH4_FIFO_EMPTY ,CH4 FIFO empty" "Not empty,Empty" bitfld.long 0x08 2. " CH3_FIFO_EMPTY ,CH3 FIFO empty" "Not empty,Empty" bitfld.long 0x08 1. " CH2_FIFO_EMPTY ,CH2 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x08 0. " CH1_FIFO_EMPTY ,CH1 FIFO empty" "Not empty,Empty" line.long 0x0C "ADMAIF_GLOBAL_RX_DMA_FIFO_FULL_STATUS_0,Global RX DMA FIFO Full Status Register" sif cpuis("TEGRAX2") bitfld.long 0x0C 19. " CH20_FIFO_FULL ,CH20 FIFO FULL" "Not full,Full" bitfld.long 0x0C 18. " CH19_FIFO_FULL ,CH19 FIFO FULL" "Not full,Full" bitfld.long 0x0C 17. " CH18_FIFO_FULL ,CH18 FIFO FULL" "Not full,Full" textline " " bitfld.long 0x0C 16. " CH17_FIFO_FULL ,CH17 FIFO FULL" "Not full,Full" bitfld.long 0x0C 15. " CH16_FIFO_FULL ,CH16 FIFO FULL" "Not full,Full" bitfld.long 0x0C 14. " CH15_FIFO_FULL ,CH15 FIFO FULL" "Not full,Full" textline " " bitfld.long 0x0C 13. " CH14_FIFO_FULL ,CH14 FIFO FULL" "Not full,Full" bitfld.long 0x0C 12. " CH13_FIFO_FULL ,CH13 FIFO FULL" "Not full,Full" bitfld.long 0x0C 11. " CH12_FIFO_FULL ,CH12 FIFO FULL" "Not full,Full" textline " " bitfld.long 0x0C 10. " CH11_FIFO_FULL ,CH11 FIFO FULL" "Not full,Full" textline " " endif bitfld.long 0x0C 9. " CH10_FIFO_FULL ,CH10 FIFO full" "Not full,Full" bitfld.long 0x0C 8. " CH9_FIFO_FULL ,CH9 FIFO full" "Not full,Full" bitfld.long 0x0C 7. " CH8_FIFO_FULL ,CH8 FIFO full" "Not full,Full" textline " " bitfld.long 0x0C 6. " CH7_FIFO_FULL ,CH7 FIFO full" "Not full,Full" bitfld.long 0x0C 5. " CH6_FIFO_FULL ,CH6 FIFO full" "Not full,Full" bitfld.long 0x0C 4. " CH5_FIFO_FULL ,CH5 FIFO full" "Not full,Full" textline " " bitfld.long 0x0C 3. " CH4_FIFO_FULL ,CH4 FIFO full" "Not full,Full" bitfld.long 0x0C 2. " CH3_FIFO_FULL ,CH3 FIFO full" "Not full,Full" bitfld.long 0x0C 1. " CH2_FIFO_FULL ,CH2 FIFO full" "Not full,Full" textline " " bitfld.long 0x0C 0. " CH1_FIFO_FULL ,CH1 FIFO full" "Not full,Full" line.long 0x10 "ADMAIF_GLOBAL_TX_DMA_FIFO_EMPTY_STATUS_0,Global TX DMA FIFO Empty Status Register" sif cpuis("TEGRAX2") bitfld.long 0x10 19. " CH20_FIFO_EMPTY ,CH20 FIFO empty" "Not empty,Empty" bitfld.long 0x10 18. " CH19_FIFO_EMPTY ,CH19 FIFO empty" "Not empty,Empty" bitfld.long 0x10 17. " CH18_FIFO_EMPTY ,CH18 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x10 16. " CH17_FIFO_EMPTY ,CH17 FIFO empty" "Not empty,Empty" bitfld.long 0x10 15. " CH16_FIFO_EMPTY ,CH16 FIFO empty" "Not empty,Empty" bitfld.long 0x10 14. " CH15_FIFO_EMPTY ,CH15 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x10 13. " CH14_FIFO_EMPTY ,CH14 FIFO empty" "Not empty,Empty" bitfld.long 0x10 12. " CH13_FIFO_EMPTY ,CH13 FIFO empty" "Not empty,Empty" bitfld.long 0x10 11. " CH12_FIFO_EMPTY ,CH12 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x10 10. " CH11_FIFO_EMPTY ,CH11 FIFO empty" "Not empty,Empty" textline " " endif bitfld.long 0x10 9. " CH10_FIFO_EMPTY ,CH10 FIFO empty" "Not empty,Empty" bitfld.long 0x10 8. " CH9_FIFO_EMPTY ,CH9 FIFO empty" "Not empty,Empty" bitfld.long 0x10 7. " CH8_FIFO_EMPTY ,CH8 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x10 6. " CH7_FIFO_EMPTY ,CH7 FIFO empty" "Not empty,Empty" bitfld.long 0x10 5. " CH6_FIFO_EMPTY ,CH6 FIFO empty" "Not empty,Empty" bitfld.long 0x10 4. " CH5_FIFO_EMPTY ,CH5 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x10 3. " CH4_FIFO_EMPTY ,CH4 FIFO empty" "Not empty,Empty" bitfld.long 0x10 2. " CH3_FIFO_EMPTY ,CH3 FIFO empty" "Not empty,Empty" bitfld.long 0x10 1. " CH2_FIFO_EMPTY ,CH2 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x10 0. " CH1_FIFO_EMPTY ,CH1 FIFO empty" "Not empty,Empty" line.long 0x14 "ADMAIF_GLOBAL_TX_DMA_FIFO_FULL_STATUS_0,Global TX DMA FIFO Full Status Register" sif cpuis("TEGRAX2") bitfld.long 0x14 19. " CH20_FIFO_FULL ,CH20 FIFO FULL" "Not full,Full" bitfld.long 0x14 18. " CH19_FIFO_FULL ,CH19 FIFO FULL" "Not full,Full" bitfld.long 0x14 17. " CH18_FIFO_FULL ,CH18 FIFO FULL" "Not full,Full" textline " " bitfld.long 0x14 16. " CH17_FIFO_FULL ,CH17 FIFO FULL" "Not full,Full" bitfld.long 0x14 15. " CH16_FIFO_FULL ,CH16 FIFO FULL" "Not full,Full" bitfld.long 0x14 14. " CH15_FIFO_FULL ,CH15 FIFO FULL" "Not full,Full" textline " " bitfld.long 0x14 13. " CH14_FIFO_FULL ,CH14 FIFO FULL" "Not full,Full" bitfld.long 0x14 12. " CH13_FIFO_FULL ,CH13 FIFO FULL" "Not full,Full" bitfld.long 0x14 11. " CH12_FIFO_FULL ,CH12 FIFO FULL" "Not full,Full" textline " " bitfld.long 0x14 10. " CH11_FIFO_FULL ,CH11 FIFO FULL" "Not full,Full" textline " " endif bitfld.long 0x14 9. " CH10_FIFO_FULL ,CH10 FIFO full" "Not full,Full" bitfld.long 0x14 8. " CH9_FIFO_FULL ,CH9 FIFO full" "Not full,Full" bitfld.long 0x14 7. " CH8_FIFO_FULL ,CH8 FIFO full" "Not full,Full" textline " " bitfld.long 0x14 6. " CH7_FIFO_FULL ,CH7 FIFO full" "Not full,Full" bitfld.long 0x14 5. " CH6_FIFO_FULL ,CH6 FIFO full" "Not full,Full" bitfld.long 0x14 4. " CH5_FIFO_FULL ,CH5 FIFO full" "Not full,Full" textline " " bitfld.long 0x14 3. " CH4_FIFO_FULL ,CH4 FIFO full" "Not full,Full" bitfld.long 0x14 2. " CH3_FIFO_FULL ,CH3 FIFO full" "Not full,Full" bitfld.long 0x14 1. " CH2_FIFO_FULL ,CH2 FIFO full" "Not full,Full" textline " " bitfld.long 0x14 0. " CH1_FIFO_FULL ,CH1 FIFO full" "Not full,Full" line.long 0x18 "ADMAIF_GLOBAL_RX_ACIF_FIFO_EMPTY_STATUS_0,Global RX ACIF FIFO Empty Status Register" sif cpuis("TEGRAX2") bitfld.long 0x18 19. " CH20_FIFO_EMPTY ,CH20 FIFO empty" "Not empty,Empty" bitfld.long 0x18 18. " CH19_FIFO_EMPTY ,CH19 FIFO empty" "Not empty,Empty" bitfld.long 0x18 17. " CH18_FIFO_EMPTY ,CH18 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x18 16. " CH17_FIFO_EMPTY ,CH17 FIFO empty" "Not empty,Empty" bitfld.long 0x18 15. " CH16_FIFO_EMPTY ,CH16 FIFO empty" "Not empty,Empty" bitfld.long 0x18 14. " CH15_FIFO_EMPTY ,CH15 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x18 13. " CH14_FIFO_EMPTY ,CH14 FIFO empty" "Not empty,Empty" bitfld.long 0x18 12. " CH13_FIFO_EMPTY ,CH13 FIFO empty" "Not empty,Empty" bitfld.long 0x18 11. " CH12_FIFO_EMPTY ,CH12 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x18 10. " CH11_FIFO_EMPTY ,CH11 FIFO empty" "Not empty,Empty" textline " " endif bitfld.long 0x18 9. " CH10_FIFO_EMPTY ,CH10 FIFO empty" "Not empty,Empty" bitfld.long 0x18 8. " CH9_FIFO_EMPTY ,CH9 FIFO empty" "Not empty,Empty" bitfld.long 0x18 7. " CH8_FIFO_EMPTY ,CH8 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x18 6. " CH7_FIFO_EMPTY ,CH7 FIFO empty" "Not empty,Empty" bitfld.long 0x18 5. " CH6_FIFO_EMPTY ,CH6 FIFO empty" "Not empty,Empty" bitfld.long 0x18 4. " CH5_FIFO_EMPTY ,CH5 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x18 3. " CH4_FIFO_EMPTY ,CH4 FIFO empty" "Not empty,Empty" bitfld.long 0x18 2. " CH3_FIFO_EMPTY ,CH3 FIFO empty" "Not empty,Empty" bitfld.long 0x18 1. " CH2_FIFO_EMPTY ,CH2 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x18 0. " CH1_FIFO_EMPTY ,CH1 FIFO empty" "Not empty,Empty" line.long 0x1C "ADMAIF_GLOBAL_RX_ACIF_FIFO_FULL_STATUS_0,Global RX ACIF FIFO Full Status Register" sif cpuis("TEGRAX2") bitfld.long 0x1C 19. " CH20_FIFO_FULL ,CH20 FIFO full" "Not full,Full" bitfld.long 0x1C 18. " CH19_FIFO_FULL ,CH19 FIFO full" "Not full,Full" bitfld.long 0x1C 17. " CH18_FIFO_FULL ,CH18 FIFO full" "Not full,Full" textline " " bitfld.long 0x1C 16. " CH17_FIFO_FULL ,CH17 FIFO full" "Not full,Full" bitfld.long 0x1C 15. " CH16_FIFO_FULL ,CH16 FIFO full" "Not full,Full" bitfld.long 0x1C 14. " CH15_FIFO_FULL ,CH15 FIFO full" "Not full,Full" textline " " bitfld.long 0x1C 13. " CH14_FIFO_FULL ,CH14 FIFO full" "Not full,Full" bitfld.long 0x1C 12. " CH13_FIFO_FULL ,CH13 FIFO full" "Not full,Full" bitfld.long 0x1C 11. " CH12_FIFO_FULL ,CH12 FIFO full" "Not full,Full" textline " " bitfld.long 0x1C 10. " CH11_FIFO_FULL ,CH11 FIFO full" "Not full,Full" textline " " endif bitfld.long 0x1C 9. " CH10_FIFO_FULL ,CH10 FIFO full" "Not full,Full" bitfld.long 0x1C 8. " CH9_FIFO_FULL ,CH9 FIFO full" "Not full,Full" bitfld.long 0x1C 7. " CH8_FIFO_FULL ,CH8 FIFO full" "Not full,Full" textline " " bitfld.long 0x1C 6. " CH7_FIFO_FULL ,CH7 FIFO full" "Not full,Full" bitfld.long 0x1C 5. " CH6_FIFO_FULL ,CH6 FIFO full" "Not full,Full" bitfld.long 0x1C 4. " CH5_FIFO_FULL ,CH5 FIFO full" "Not full,Full" textline " " bitfld.long 0x1C 3. " CH4_FIFO_FULL ,CH4 FIFO full" "Not full,Full" bitfld.long 0x1C 2. " CH3_FIFO_FULL ,CH3 FIFO full" "Not full,Full" bitfld.long 0x1C 1. " CH2_FIFO_FULL ,CH2 FIFO full" "Not full,Full" textline " " bitfld.long 0x1C 0. " CH1_FIFO_FULL ,CH1 FIFO full" "Not full,Full" line.long 0x20 "ADMAIF_GLOBAL_TX_ACIF_FIFO_EMPTY_STATUS_0,Global TX ACIF FIFO Empty Status Register" sif cpuis("TEGRAX2") bitfld.long 0x20 19. " CH20_FIFO_EMPTY ,CH20 FIFO empty" "Not empty,Empty" bitfld.long 0x20 18. " CH19_FIFO_EMPTY ,CH19 FIFO empty" "Not empty,Empty" bitfld.long 0x20 17. " CH18_FIFO_EMPTY ,CH18 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x20 16. " CH17_FIFO_EMPTY ,CH17 FIFO empty" "Not empty,Empty" bitfld.long 0x20 15. " CH16_FIFO_EMPTY ,CH16 FIFO empty" "Not empty,Empty" bitfld.long 0x20 14. " CH15_FIFO_EMPTY ,CH15 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x20 13. " CH14_FIFO_EMPTY ,CH14 FIFO empty" "Not empty,Empty" bitfld.long 0x20 12. " CH13_FIFO_EMPTY ,CH13 FIFO empty" "Not empty,Empty" bitfld.long 0x20 11. " CH12_FIFO_EMPTY ,CH12 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x20 10. " CH11_FIFO_EMPTY ,CH11 FIFO empty" "Not empty,Empty" textline " " endif bitfld.long 0x20 9. " CH10_FIFO_EMPTY ,CH10 FIFO empty" "Not empty,Empty" bitfld.long 0x20 8. " CH9_FIFO_EMPTY ,CH9 FIFO empty" "Not empty,Empty" bitfld.long 0x20 7. " CH8_FIFO_EMPTY ,CH8 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x20 6. " CH7_FIFO_EMPTY ,CH7 FIFO empty" "Not empty,Empty" bitfld.long 0x20 5. " CH6_FIFO_EMPTY ,CH6 FIFO empty" "Not empty,Empty" bitfld.long 0x20 4. " CH5_FIFO_EMPTY ,CH5 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x20 3. " CH4_FIFO_EMPTY ,CH4 FIFO empty" "Not empty,Empty" bitfld.long 0x20 2. " CH3_FIFO_EMPTY ,CH3 FIFO empty" "Not empty,Empty" bitfld.long 0x20 1. " CH2_FIFO_EMPTY ,CH2 FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x20 0. " CH1_FIFO_EMPTY ,CH1 FIFO empty" "Not empty,Empty" line.long 0x24 "ADMAIF_GLOBAL_TX_ACIF_FIFO_FULL_STATUS_0,Global TX ACIF FIFO Full Status Register" sif cpuis("TEGRAX2") bitfld.long 0x24 19. " CH20_FIFO_FULL ,CH20 FIFO full" "Not full,Full" bitfld.long 0x24 18. " CH19_FIFO_FULL ,CH19 FIFO full" "Not full,Full" bitfld.long 0x24 17. " CH18_FIFO_FULL ,CH18 FIFO full" "Not full,Full" textline " " bitfld.long 0x24 16. " CH17_FIFO_FULL ,CH17 FIFO full" "Not full,Full" bitfld.long 0x24 15. " CH16_FIFO_FULL ,CH16 FIFO full" "Not full,Full" bitfld.long 0x24 14. " CH15_FIFO_FULL ,CH15 FIFO full" "Not full,Full" textline " " bitfld.long 0x24 13. " CH14_FIFO_FULL ,CH14 FIFO full" "Not full,Full" bitfld.long 0x24 12. " CH13_FIFO_FULL ,CH13 FIFO full" "Not full,Full" bitfld.long 0x24 11. " CH12_FIFO_FULL ,CH12 FIFO full" "Not full,Full" textline " " bitfld.long 0x24 10. " CH11_FIFO_FULL ,CH11 FIFO full" "Not full,Full" textline " " endif bitfld.long 0x24 9. " CH10_FIFO_FULL ,CH10 FIFO full" "Not full,Full" bitfld.long 0x24 8. " CH9_FIFO_FULL ,CH9 FIFO full" "Not full,Full" bitfld.long 0x24 7. " CH8_FIFO_FULL ,CH8 FIFO full" "Not full,Full" textline " " bitfld.long 0x24 6. " CH7_FIFO_FULL ,CH7 FIFO full" "Not full,Full" bitfld.long 0x24 5. " CH6_FIFO_FULL ,CH6 FIFO full" "Not full,Full" bitfld.long 0x24 4. " CH5_FIFO_FULL ,CH5 FIFO full" "Not full,Full" textline " " bitfld.long 0x24 3. " CH4_FIFO_FULL ,CH4 FIFO full" "Not full,Full" bitfld.long 0x24 2. " CH3_FIFO_FULL ,CH3 FIFO full" "Not full,Full" bitfld.long 0x24 1. " CH2_FIFO_FULL ,CH2 FIFO full" "Not full,Full" textline " " bitfld.long 0x24 0. " CH1_FIFO_FULL ,CH1 FIFO full" "Not full,Full" line.long 0x28 "ADMAIF_GLOBAL_RX_DMA_OVERRUN_INT_STATUS_0,Global RX DMA Overrun Int Status Register" sif cpuis("TEGRAX2") bitfld.long 0x28 19. " CH20_DMA_OVERRUN ,CH20 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 18. " CH19_DMA_OVERRUN ,CH19 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 17. " CH18_DMA_OVERRUN ,CH18 DMA overrun" "No overrun,Overrun" textline " " bitfld.long 0x28 16. " CH17_DMA_OVERRUN ,CH17 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 15. " CH16_DMA_OVERRUN ,CH16 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 14. " CH15_DMA_OVERRUN ,CH15 DMA overrun" "No overrun,Overrun" textline " " bitfld.long 0x28 13. " CH14_DMA_OVERRUN ,CH14 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 12. " CH13_DMA_OVERRUN ,CH13 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 11. " CH12_DMA_OVERRUN ,CH12 DMA overrun" "No overrun,Overrun" textline " " bitfld.long 0x28 10. " CH11_DMA_OVERRUN ,CH11 DMA overrun" "No overrun,Overrun" textline " " endif bitfld.long 0x28 9. " CH10_DMA_OVERRUN ,CH10 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 8. " CH9_DMA_OVERRUN ,CH9 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 7. " CH8_DMA_OVERRUN ,CH8 DMA overrun" "No overrun,Overrun" textline " " bitfld.long 0x28 6. " CH7_DMA_OVERRUN ,CH7 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 5. " CH6_DMA_OVERRUN ,CH6 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 4. " CH5_DMA_OVERRUN ,CH5 DMA overrun" "No overrun,Overrun" textline " " bitfld.long 0x28 3. " CH4_DMA_OVERRUN ,CH4 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 2. " CH3_DMA_OVERRUN ,CH3 DMA overrun" "No overrun,Overrun" bitfld.long 0x28 1. " CH2_DMA_OVERRUN ,CH2 DMA overrun" "No overrun,Overrun" textline " " bitfld.long 0x28 0. " CH1_DMA_OVERRUN ,CH1 DMA overrun" "No overrun,Overrun" line.long 0x2C "ADMAIF_GLOBAL_TX_DMA_UNDERRUN_INT_STATUS_0,Global TX DMA Underrun Int Status Register" sif cpuis("TEGRAX2") bitfld.long 0x2C 19. " CH20_DMA_UNDERRUN ,CH20 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 18. " CH19_DMA_UNDERRUN ,CH19 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 17. " CH18_DMA_UNDERRUN ,CH18 DMA underrun" "No underrun,Underrun" textline " " bitfld.long 0x2C 16. " CH17_DMA_UNDERRUN ,CH17 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 15. " CH16_DMA_UNDERRUN ,CH16 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 14. " CH15_DMA_UNDERRUN ,CH15 DMA underrun" "No underrun,Underrun" textline " " bitfld.long 0x2C 13. " CH14_DMA_UNDERRUN ,CH14 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 12. " CH13_DMA_UNDERRUN ,CH13 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 11. " CH12_DMA_UNDERRUN ,CH12 DMA underrun" "No underrun,Underrun" textline " " bitfld.long 0x2C 10. " CH11_DMA_UNDERRUN ,CH11 DMA underrun" "No underrun,Underrun" textline " " endif bitfld.long 0x2C 9. " CH10_DMA_UNDERRUN ,CH10 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 8. " CH9_DMA_UNDERRUN ,CH9 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 7. " CH8_DMA_UNDERRUN ,CH8 DMA underrun" "No underrun,Underrun" textline " " bitfld.long 0x2C 6. " CH7_DMA_UNDERRUN ,CH7 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 5. " CH6_DMA_UNDERRUN ,CH6 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 4. " CH5_DMA_UNDERRUN ,CH5 DMA underrun" "No underrun,Underrun" textline " " bitfld.long 0x2C 3. " CH4_DMA_UNDERRUN ,CH4 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 2. " CH3_DMA_UNDERRUN ,CH3 DMA underrun" "No underrun,Underrun" bitfld.long 0x2C 1. " CH2_DMA_UNDERRUN ,CH2 DMA underrun" "No underrun,Underrun" textline " " bitfld.long 0x2C 0. " CH1_DMA_UNDERRUN ,CH1 DMA underrun" "No underrun,Underrun" sif !(cpuis("TEGRAX2")) group.long (0x10*0x40+0x300+0x50)++0x07 line.long 0x00 "ADMAIF_GLOBAL_CYA_0,GLOBAL_CYA Register" line.long 0x04 "ADMAIF_GLOBAL_CYA_0,GLOBAL_CYA Register" endif group.long (0x10*0x40+0x300+0x58)++0x07 line.long 0x00 "ADMAIF_GLOBAL_DBG_0,GLOBAL_DBG Register" line.long 0x04 "ADMAIF_GLOBAL_DBG_0,GLOBAL_DBG Register" width 0x0B tree.end tree "AGIC" base ad:0x702F8000 width 15. group.long 0x1000++0x03 line.long 0x00 "CTLR,Distributor Control Register" rgroup.long 0x1004++0x07 line.long 0x00 "TYPER,Interrupt Controller Type Register" line.long 0x04 "IIDR,Distributor Implementer Identification Register" group.long 0x1080++0x03 line.long 0x00 "IGROUPR0,Interrupt Group 0 Register" group.long 0x1084++0x03 line.long 0x00 "IGROUPR1,Interrupt Group 1 Register" group.long 0x1088++0x03 line.long 0x00 "IGROUPR2,Interrupt Group 2 Register" group.long 0x108C++0x03 line.long 0x00 "IGROUPR3,Interrupt Group 3 Register" group.long 0x1090++0x03 line.long 0x00 "IGROUPR4,Interrupt Group 4 Register" group.long 0x1094++0x03 line.long 0x00 "IGROUPR5,Interrupt Group 5 Register" group.long 0x1098++0x03 line.long 0x00 "IGROUPR6,Interrupt Group 6 Register" group.long 0x109C++0x03 line.long 0x00 "IGROUPR7,Interrupt Group 7 Register" group.long 0x10A0++0x03 line.long 0x00 "IGROUPR8,Interrupt Group 8 Register" group.long 0x10A4++0x03 line.long 0x00 "IGROUPR9,Interrupt Group 9 Register" group.long 0x10A8++0x03 line.long 0x00 "IGROUPR10,Interrupt Group 10 Register" group.long 0x10AC++0x03 line.long 0x00 "IGROUPR11,Interrupt Group 11 Register" group.long 0x10B0++0x03 line.long 0x00 "IGROUPR12,Interrupt Group 12 Register" group.long 0x10B4++0x03 line.long 0x00 "IGROUPR13,Interrupt Group 13 Register" group.long 0x10B8++0x03 line.long 0x00 "IGROUPR14,Interrupt Group 14 Register" group.long 0x10BC++0x03 line.long 0x00 "IGROUPR15,Interrupt Group 15 Register" group.long 0x1100++0x03 line.long 0x00 "ISENABLER0,Interrupt Set-Enable 0 Register" group.long 0x1104++0x03 line.long 0x00 "ISENABLER1,Interrupt Set-Enable 1 Register" group.long 0x1108++0x03 line.long 0x00 "ISENABLER2,Interrupt Set-Enable 2 Register" group.long 0x110C++0x03 line.long 0x00 "ISENABLER3,Interrupt Set-Enable 3 Register" group.long 0x1110++0x03 line.long 0x00 "ISENABLER4,Interrupt Set-Enable 4 Register" group.long 0x1114++0x03 line.long 0x00 "ISENABLER5,Interrupt Set-Enable 5 Register" group.long 0x1118++0x03 line.long 0x00 "ISENABLER6,Interrupt Set-Enable 6 Register" group.long 0x111C++0x03 line.long 0x00 "ISENABLER7,Interrupt Set-Enable 7 Register" group.long 0x1120++0x03 line.long 0x00 "ISENABLER8,Interrupt Set-Enable 8 Register" group.long 0x1124++0x03 line.long 0x00 "ISENABLER9,Interrupt Set-Enable 9 Register" group.long 0x1128++0x03 line.long 0x00 "ISENABLER10,Interrupt Set-Enable 10 Register" group.long 0x112C++0x03 line.long 0x00 "ISENABLER11,Interrupt Set-Enable 11 Register" group.long 0x1130++0x03 line.long 0x00 "ISENABLER12,Interrupt Set-Enable 12 Register" group.long 0x1134++0x03 line.long 0x00 "ISENABLER13,Interrupt Set-Enable 13 Register" group.long 0x1138++0x03 line.long 0x00 "ISENABLER14,Interrupt Set-Enable 14 Register" group.long 0x113C++0x03 line.long 0x00 "ISENABLER15,Interrupt Set-Enable 15 Register" group.long 0x1180++0x03 line.long 0x00 "ICENABLER0,Interrupt Clear-Enable 0 Register" group.long 0x1184++0x03 line.long 0x00 "ICENABLER1,Interrupt Clear-Enable 1 Register" group.long 0x1188++0x03 line.long 0x00 "ICENABLER2,Interrupt Clear-Enable 2 Register" group.long 0x118C++0x03 line.long 0x00 "ICENABLER3,Interrupt Clear-Enable 3 Register" group.long 0x1190++0x03 line.long 0x00 "ICENABLER4,Interrupt Clear-Enable 4 Register" group.long 0x1194++0x03 line.long 0x00 "ICENABLER5,Interrupt Clear-Enable 5 Register" group.long 0x1198++0x03 line.long 0x00 "ICENABLER6,Interrupt Clear-Enable 6 Register" group.long 0x119C++0x03 line.long 0x00 "ICENABLER7,Interrupt Clear-Enable 7 Register" group.long 0x11A0++0x03 line.long 0x00 "ICENABLER8,Interrupt Clear-Enable 8 Register" group.long 0x11A4++0x03 line.long 0x00 "ICENABLER9,Interrupt Clear-Enable 9 Register" group.long 0x11A8++0x03 line.long 0x00 "ICENABLER10,Interrupt Clear-Enable 10 Register" group.long 0x11AC++0x03 line.long 0x00 "ICENABLER11,Interrupt Clear-Enable 11 Register" group.long 0x11B0++0x03 line.long 0x00 "ICENABLER12,Interrupt Clear-Enable 12 Register" group.long 0x11B4++0x03 line.long 0x00 "ICENABLER13,Interrupt Clear-Enable 13 Register" group.long 0x11B8++0x03 line.long 0x00 "ICENABLER14,Interrupt Clear-Enable 14 Register" group.long 0x11BC++0x03 line.long 0x00 "ICENABLER15,Interrupt Clear-Enable 15 Register" group.long 0x1200++0x03 line.long 0x00 "ISPENDR0,Interrupt Set-Pending 0 Register" group.long 0x1204++0x03 line.long 0x00 "ISPENDR1,Interrupt Set-Pending 1 Register" group.long 0x1208++0x03 line.long 0x00 "ISPENDR2,Interrupt Set-Pending 2 Register" group.long 0x120C++0x03 line.long 0x00 "ISPENDR3,Interrupt Set-Pending 3 Register" group.long 0x1210++0x03 line.long 0x00 "ISPENDR4,Interrupt Set-Pending 4 Register" group.long 0x1214++0x03 line.long 0x00 "ISPENDR5,Interrupt Set-Pending 5 Register" group.long 0x1218++0x03 line.long 0x00 "ISPENDR6,Interrupt Set-Pending 6 Register" group.long 0x121C++0x03 line.long 0x00 "ISPENDR7,Interrupt Set-Pending 7 Register" group.long 0x1220++0x03 line.long 0x00 "ISPENDR8,Interrupt Set-Pending 8 Register" group.long 0x1224++0x03 line.long 0x00 "ISPENDR9,Interrupt Set-Pending 9 Register" group.long 0x1228++0x03 line.long 0x00 "ISPENDR10,Interrupt Set-Pending 10 Register" group.long 0x122C++0x03 line.long 0x00 "ISPENDR11,Interrupt Set-Pending 11 Register" group.long 0x1230++0x03 line.long 0x00 "ISPENDR12,Interrupt Set-Pending 12 Register" group.long 0x1234++0x03 line.long 0x00 "ISPENDR13,Interrupt Set-Pending 13 Register" group.long 0x1238++0x03 line.long 0x00 "ISPENDR14,Interrupt Set-Pending 14 Register" group.long 0x123C++0x03 line.long 0x00 "ISPENDR15,Interrupt Set-Pending 15 Register" group.long 0x1280++0x03 line.long 0x00 "ICPENDR0,Interrupt Clear-Pending 0 Register" group.long 0x1284++0x03 line.long 0x00 "ICPENDR1,Interrupt Clear-Pending 1 Register" group.long 0x1288++0x03 line.long 0x00 "ICPENDR2,Interrupt Clear-Pending 2 Register" group.long 0x128C++0x03 line.long 0x00 "ICPENDR3,Interrupt Clear-Pending 3 Register" group.long 0x1290++0x03 line.long 0x00 "ICPENDR4,Interrupt Clear-Pending 4 Register" group.long 0x1294++0x03 line.long 0x00 "ICPENDR5,Interrupt Clear-Pending 5 Register" group.long 0x1298++0x03 line.long 0x00 "ICPENDR6,Interrupt Clear-Pending 6 Register" group.long 0x129C++0x03 line.long 0x00 "ICPENDR7,Interrupt Clear-Pending 7 Register" group.long 0x12A0++0x03 line.long 0x00 "ICPENDR8,Interrupt Clear-Pending 8 Register" group.long 0x12A4++0x03 line.long 0x00 "ICPENDR9,Interrupt Clear-Pending 9 Register" group.long 0x12A8++0x03 line.long 0x00 "ICPENDR10,Interrupt Clear-Pending 10 Register" group.long 0x12AC++0x03 line.long 0x00 "ICPENDR11,Interrupt Clear-Pending 11 Register" group.long 0x12B0++0x03 line.long 0x00 "ICPENDR12,Interrupt Clear-Pending 12 Register" group.long 0x12B4++0x03 line.long 0x00 "ICPENDR13,Interrupt Clear-Pending 13 Register" group.long 0x12B8++0x03 line.long 0x00 "ICPENDR14,Interrupt Clear-Pending 14 Register" group.long 0x12BC++0x03 line.long 0x00 "ICPENDR15,Interrupt Clear-Pending 15 Register" group.long 0x1300++0x03 line.long 0x00 "ISACTIVER0,Interrupt Set-Active 0 Register" group.long 0x1304++0x03 line.long 0x00 "ISACTIVER1,Interrupt Set-Active 1 Register" group.long 0x1308++0x03 line.long 0x00 "ISACTIVER2,Interrupt Set-Active 2 Register" group.long 0x130C++0x03 line.long 0x00 "ISACTIVER3,Interrupt Set-Active 3 Register" group.long 0x1310++0x03 line.long 0x00 "ISACTIVER4,Interrupt Set-Active 4 Register" group.long 0x1314++0x03 line.long 0x00 "ISACTIVER5,Interrupt Set-Active 5 Register" group.long 0x1318++0x03 line.long 0x00 "ISACTIVER6,Interrupt Set-Active 6 Register" group.long 0x131C++0x03 line.long 0x00 "ISACTIVER7,Interrupt Set-Active 7 Register" group.long 0x1320++0x03 line.long 0x00 "ISACTIVER8,Interrupt Set-Active 8 Register" group.long 0x1324++0x03 line.long 0x00 "ISACTIVER9,Interrupt Set-Active 9 Register" group.long 0x1328++0x03 line.long 0x00 "ISACTIVER10,Interrupt Set-Active 10 Register" group.long 0x132C++0x03 line.long 0x00 "ISACTIVER11,Interrupt Set-Active 11 Register" group.long 0x1330++0x03 line.long 0x00 "ISACTIVER12,Interrupt Set-Active 12 Register" group.long 0x1334++0x03 line.long 0x00 "ISACTIVER13,Interrupt Set-Active 13 Register" group.long 0x1338++0x03 line.long 0x00 "ISACTIVER14,Interrupt Set-Active 14 Register" group.long 0x133C++0x03 line.long 0x00 "ISACTIVER15,Interrupt Set-Active 15 Register" group.long 0x1380++0x03 line.long 0x00 "ICACTIVER0,Interrupt Clear-Active 0 Register" group.long 0x1384++0x03 line.long 0x00 "ICACTIVER1,Interrupt Clear-Active 1 Register" group.long 0x1388++0x03 line.long 0x00 "ICACTIVER2,Interrupt Clear-Active 2 Register" group.long 0x138C++0x03 line.long 0x00 "ICACTIVER3,Interrupt Clear-Active 3 Register" group.long 0x1390++0x03 line.long 0x00 "ICACTIVER4,Interrupt Clear-Active 4 Register" group.long 0x1394++0x03 line.long 0x00 "ICACTIVER5,Interrupt Clear-Active 5 Register" group.long 0x1398++0x03 line.long 0x00 "ICACTIVER6,Interrupt Clear-Active 6 Register" group.long 0x139C++0x03 line.long 0x00 "ICACTIVER7,Interrupt Clear-Active 7 Register" group.long 0x13A0++0x03 line.long 0x00 "ICACTIVER8,Interrupt Clear-Active 8 Register" group.long 0x13A4++0x03 line.long 0x00 "ICACTIVER9,Interrupt Clear-Active 9 Register" group.long 0x13A8++0x03 line.long 0x00 "ICACTIVER10,Interrupt Clear-Active 10 Register" group.long 0x13AC++0x03 line.long 0x00 "ICACTIVER11,Interrupt Clear-Active 11 Register" group.long 0x13B0++0x03 line.long 0x00 "ICACTIVER12,Interrupt Clear-Active 12 Register" group.long 0x13B4++0x03 line.long 0x00 "ICACTIVER13,Interrupt Clear-Active 13 Register" group.long 0x13B8++0x03 line.long 0x00 "ICACTIVER14,Interrupt Clear-Active 14 Register" group.long 0x13BC++0x03 line.long 0x00 "ICACTIVER15,Interrupt Clear-Active 15 Register" group.long 0x1400++0x03 line.long 0x00 "IPRIORITYR0,Interrupt Priority 0 Register" group.long 0x1404++0x03 line.long 0x00 "IPRIORITYR1,Interrupt Priority 1 Register" group.long 0x1408++0x03 line.long 0x00 "IPRIORITYR2,Interrupt Priority 2 Register" group.long 0x140C++0x03 line.long 0x00 "IPRIORITYR3,Interrupt Priority 3 Register" group.long 0x1410++0x03 line.long 0x00 "IPRIORITYR4,Interrupt Priority 4 Register" group.long 0x1414++0x03 line.long 0x00 "IPRIORITYR5,Interrupt Priority 5 Register" group.long 0x1418++0x03 line.long 0x00 "IPRIORITYR6,Interrupt Priority 6 Register" group.long 0x141C++0x03 line.long 0x00 "IPRIORITYR7,Interrupt Priority 7 Register" group.long 0x1420++0x03 line.long 0x00 "IPRIORITYR8,Interrupt Priority 8 Register" group.long 0x1424++0x03 line.long 0x00 "IPRIORITYR9,Interrupt Priority 9 Register" group.long 0x1428++0x03 line.long 0x00 "IPRIORITYR10,Interrupt Priority 10 Register" group.long 0x142C++0x03 line.long 0x00 "IPRIORITYR11,Interrupt Priority 11 Register" group.long 0x1430++0x03 line.long 0x00 "IPRIORITYR12,Interrupt Priority 12 Register" group.long 0x1434++0x03 line.long 0x00 "IPRIORITYR13,Interrupt Priority 13 Register" group.long 0x1438++0x03 line.long 0x00 "IPRIORITYR14,Interrupt Priority 14 Register" group.long 0x143C++0x03 line.long 0x00 "IPRIORITYR15,Interrupt Priority 15 Register" group.long 0x1440++0x03 line.long 0x00 "IPRIORITYR16,Interrupt Priority 16 Register" group.long 0x1444++0x03 line.long 0x00 "IPRIORITYR17,Interrupt Priority 17 Register" group.long 0x1448++0x03 line.long 0x00 "IPRIORITYR18,Interrupt Priority 18 Register" group.long 0x144C++0x03 line.long 0x00 "IPRIORITYR19,Interrupt Priority 19 Register" group.long 0x1450++0x03 line.long 0x00 "IPRIORITYR20,Interrupt Priority 20 Register" group.long 0x1454++0x03 line.long 0x00 "IPRIORITYR21,Interrupt Priority 21 Register" group.long 0x1458++0x03 line.long 0x00 "IPRIORITYR22,Interrupt Priority 22 Register" group.long 0x145C++0x03 line.long 0x00 "IPRIORITYR23,Interrupt Priority 23 Register" group.long 0x1460++0x03 line.long 0x00 "IPRIORITYR24,Interrupt Priority 24 Register" group.long 0x1464++0x03 line.long 0x00 "IPRIORITYR25,Interrupt Priority 25 Register" group.long 0x1468++0x03 line.long 0x00 "IPRIORITYR26,Interrupt Priority 26 Register" group.long 0x146C++0x03 line.long 0x00 "IPRIORITYR27,Interrupt Priority 27 Register" group.long 0x1470++0x03 line.long 0x00 "IPRIORITYR28,Interrupt Priority 28 Register" group.long 0x1474++0x03 line.long 0x00 "IPRIORITYR29,Interrupt Priority 29 Register" group.long 0x1478++0x03 line.long 0x00 "IPRIORITYR30,Interrupt Priority 30 Register" group.long 0x147C++0x03 line.long 0x00 "IPRIORITYR31,Interrupt Priority 31 Register" group.long 0x1480++0x03 line.long 0x00 "IPRIORITYR32,Interrupt Priority 32 Register" group.long 0x1484++0x03 line.long 0x00 "IPRIORITYR33,Interrupt Priority 33 Register" group.long 0x1488++0x03 line.long 0x00 "IPRIORITYR34,Interrupt Priority 34 Register" group.long 0x148C++0x03 line.long 0x00 "IPRIORITYR35,Interrupt Priority 35 Register" group.long 0x1490++0x03 line.long 0x00 "IPRIORITYR36,Interrupt Priority 36 Register" group.long 0x1494++0x03 line.long 0x00 "IPRIORITYR37,Interrupt Priority 37 Register" group.long 0x1498++0x03 line.long 0x00 "IPRIORITYR38,Interrupt Priority 38 Register" group.long 0x149C++0x03 line.long 0x00 "IPRIORITYR39,Interrupt Priority 39 Register" group.long 0x14A0++0x03 line.long 0x00 "IPRIORITYR40,Interrupt Priority 40 Register" group.long 0x14A4++0x03 line.long 0x00 "IPRIORITYR41,Interrupt Priority 41 Register" group.long 0x14A8++0x03 line.long 0x00 "IPRIORITYR42,Interrupt Priority 42 Register" group.long 0x14AC++0x03 line.long 0x00 "IPRIORITYR43,Interrupt Priority 43 Register" group.long 0x14B0++0x03 line.long 0x00 "IPRIORITYR44,Interrupt Priority 44 Register" group.long 0x14B4++0x03 line.long 0x00 "IPRIORITYR45,Interrupt Priority 45 Register" group.long 0x14B8++0x03 line.long 0x00 "IPRIORITYR46,Interrupt Priority 46 Register" group.long 0x14BC++0x03 line.long 0x00 "IPRIORITYR47,Interrupt Priority 47 Register" group.long 0x14C0++0x03 line.long 0x00 "IPRIORITYR48,Interrupt Priority 48 Register" group.long 0x14C4++0x03 line.long 0x00 "IPRIORITYR49,Interrupt Priority 49 Register" group.long 0x14C8++0x03 line.long 0x00 "IPRIORITYR50,Interrupt Priority 50 Register" group.long 0x14CC++0x03 line.long 0x00 "IPRIORITYR51,Interrupt Priority 51 Register" group.long 0x14D0++0x03 line.long 0x00 "IPRIORITYR52,Interrupt Priority 52 Register" group.long 0x14D4++0x03 line.long 0x00 "IPRIORITYR53,Interrupt Priority 53 Register" group.long 0x14D8++0x03 line.long 0x00 "IPRIORITYR54,Interrupt Priority 54 Register" group.long 0x14DC++0x03 line.long 0x00 "IPRIORITYR55,Interrupt Priority 55 Register" group.long 0x14E0++0x03 line.long 0x00 "IPRIORITYR56,Interrupt Priority 56 Register" group.long 0x14E4++0x03 line.long 0x00 "IPRIORITYR57,Interrupt Priority 57 Register" group.long 0x14E8++0x03 line.long 0x00 "IPRIORITYR58,Interrupt Priority 58 Register" group.long 0x14EC++0x03 line.long 0x00 "IPRIORITYR59,Interrupt Priority 59 Register" group.long 0x14F0++0x03 line.long 0x00 "IPRIORITYR60,Interrupt Priority 60 Register" group.long 0x14F4++0x03 line.long 0x00 "IPRIORITYR61,Interrupt Priority 61 Register" group.long 0x14F8++0x03 line.long 0x00 "IPRIORITYR62,Interrupt Priority 62 Register" group.long 0x14FC++0x03 line.long 0x00 "IPRIORITYR63,Interrupt Priority 63 Register" group.long 0x1500++0x03 line.long 0x00 "IPRIORITYR64,Interrupt Priority 64 Register" group.long 0x1504++0x03 line.long 0x00 "IPRIORITYR65,Interrupt Priority 65 Register" group.long 0x1508++0x03 line.long 0x00 "IPRIORITYR66,Interrupt Priority 66 Register" group.long 0x150C++0x03 line.long 0x00 "IPRIORITYR67,Interrupt Priority 67 Register" group.long 0x1510++0x03 line.long 0x00 "IPRIORITYR68,Interrupt Priority 68 Register" group.long 0x1514++0x03 line.long 0x00 "IPRIORITYR69,Interrupt Priority 69 Register" group.long 0x1518++0x03 line.long 0x00 "IPRIORITYR70,Interrupt Priority 70 Register" group.long 0x151C++0x03 line.long 0x00 "IPRIORITYR71,Interrupt Priority 71 Register" group.long 0x1520++0x03 line.long 0x00 "IPRIORITYR72,Interrupt Priority 72 Register" group.long 0x1524++0x03 line.long 0x00 "IPRIORITYR73,Interrupt Priority 73 Register" group.long 0x1528++0x03 line.long 0x00 "IPRIORITYR74,Interrupt Priority 74 Register" group.long 0x152C++0x03 line.long 0x00 "IPRIORITYR75,Interrupt Priority 75 Register" group.long 0x1530++0x03 line.long 0x00 "IPRIORITYR76,Interrupt Priority 76 Register" group.long 0x1534++0x03 line.long 0x00 "IPRIORITYR77,Interrupt Priority 77 Register" group.long 0x1538++0x03 line.long 0x00 "IPRIORITYR78,Interrupt Priority 78 Register" group.long 0x153C++0x03 line.long 0x00 "IPRIORITYR79,Interrupt Priority 79 Register" group.long 0x1540++0x03 line.long 0x00 "IPRIORITYR80,Interrupt Priority 80 Register" group.long 0x1544++0x03 line.long 0x00 "IPRIORITYR81,Interrupt Priority 81 Register" group.long 0x1548++0x03 line.long 0x00 "IPRIORITYR82,Interrupt Priority 82 Register" group.long 0x154C++0x03 line.long 0x00 "IPRIORITYR83,Interrupt Priority 83 Register" group.long 0x1550++0x03 line.long 0x00 "IPRIORITYR84,Interrupt Priority 84 Register" group.long 0x1554++0x03 line.long 0x00 "IPRIORITYR85,Interrupt Priority 85 Register" group.long 0x1558++0x03 line.long 0x00 "IPRIORITYR86,Interrupt Priority 86 Register" group.long 0x155C++0x03 line.long 0x00 "IPRIORITYR87,Interrupt Priority 87 Register" group.long 0x1560++0x03 line.long 0x00 "IPRIORITYR88,Interrupt Priority 88 Register" group.long 0x1564++0x03 line.long 0x00 "IPRIORITYR89,Interrupt Priority 89 Register" group.long 0x1568++0x03 line.long 0x00 "IPRIORITYR90,Interrupt Priority 90 Register" group.long 0x156C++0x03 line.long 0x00 "IPRIORITYR91,Interrupt Priority 91 Register" group.long 0x1570++0x03 line.long 0x00 "IPRIORITYR92,Interrupt Priority 92 Register" group.long 0x1574++0x03 line.long 0x00 "IPRIORITYR93,Interrupt Priority 93 Register" group.long 0x1578++0x03 line.long 0x00 "IPRIORITYR94,Interrupt Priority 94 Register" group.long 0x157C++0x03 line.long 0x00 "IPRIORITYR95,Interrupt Priority 95 Register" group.long 0x1580++0x03 line.long 0x00 "IPRIORITYR96,Interrupt Priority 96 Register" group.long 0x1584++0x03 line.long 0x00 "IPRIORITYR97,Interrupt Priority 97 Register" group.long 0x1588++0x03 line.long 0x00 "IPRIORITYR98,Interrupt Priority 98 Register" group.long 0x158C++0x03 line.long 0x00 "IPRIORITYR99,Interrupt Priority 99 Register" group.long 0x1590++0x03 line.long 0x00 "IPRIORITYR100,Interrupt Priority 100 Register" group.long 0x1594++0x03 line.long 0x00 "IPRIORITYR101,Interrupt Priority 101 Register" group.long 0x1598++0x03 line.long 0x00 "IPRIORITYR102,Interrupt Priority 102 Register" group.long 0x159C++0x03 line.long 0x00 "IPRIORITYR103,Interrupt Priority 103 Register" group.long 0x15A0++0x03 line.long 0x00 "IPRIORITYR104,Interrupt Priority 104 Register" group.long 0x15A4++0x03 line.long 0x00 "IPRIORITYR105,Interrupt Priority 105 Register" group.long 0x15A8++0x03 line.long 0x00 "IPRIORITYR106,Interrupt Priority 106 Register" group.long 0x15AC++0x03 line.long 0x00 "IPRIORITYR107,Interrupt Priority 107 Register" group.long 0x15B0++0x03 line.long 0x00 "IPRIORITYR108,Interrupt Priority 108 Register" group.long 0x15B4++0x03 line.long 0x00 "IPRIORITYR109,Interrupt Priority 109 Register" group.long 0x15B8++0x03 line.long 0x00 "IPRIORITYR110,Interrupt Priority 110 Register" group.long 0x15BC++0x03 line.long 0x00 "IPRIORITYR111,Interrupt Priority 111 Register" group.long 0x15C0++0x03 line.long 0x00 "IPRIORITYR112,Interrupt Priority 112 Register" group.long 0x15C4++0x03 line.long 0x00 "IPRIORITYR113,Interrupt Priority 113 Register" group.long 0x15C8++0x03 line.long 0x00 "IPRIORITYR114,Interrupt Priority 114 Register" group.long 0x15CC++0x03 line.long 0x00 "IPRIORITYR115,Interrupt Priority 115 Register" group.long 0x15D0++0x03 line.long 0x00 "IPRIORITYR116,Interrupt Priority 116 Register" group.long 0x15D4++0x03 line.long 0x00 "IPRIORITYR117,Interrupt Priority 117 Register" group.long 0x15D8++0x03 line.long 0x00 "IPRIORITYR118,Interrupt Priority 118 Register" group.long 0x15DC++0x03 line.long 0x00 "IPRIORITYR119,Interrupt Priority 119 Register" group.long 0x15E0++0x03 line.long 0x00 "IPRIORITYR120,Interrupt Priority 120 Register" group.long 0x15E4++0x03 line.long 0x00 "IPRIORITYR121,Interrupt Priority 121 Register" group.long 0x15E8++0x03 line.long 0x00 "IPRIORITYR122,Interrupt Priority 122 Register" group.long 0x15EC++0x03 line.long 0x00 "IPRIORITYR123,Interrupt Priority 123 Register" group.long 0x15F0++0x03 line.long 0x00 "IPRIORITYR124,Interrupt Priority 124 Register" group.long 0x15F4++0x03 line.long 0x00 "IPRIORITYR125,Interrupt Priority 125 Register" group.long 0x15F8++0x03 line.long 0x00 "IPRIORITYR126,Interrupt Priority 126 Register" group.long 0x15FC++0x03 line.long 0x00 "IPRIORITYR127,Interrupt Priority 127 Register" rgroup.long 0x1800++0x03 line.long 0x00 "ITARGETSR0,Interrupt Processor Targets 0 Register" rgroup.long 0x1804++0x03 line.long 0x00 "ITARGETSR1,Interrupt Processor Targets 1 Register" rgroup.long 0x1808++0x03 line.long 0x00 "ITARGETSR2,Interrupt Processor Targets 2 Register" rgroup.long 0x180C++0x03 line.long 0x00 "ITARGETSR3,Interrupt Processor Targets 3 Register" rgroup.long 0x1810++0x03 line.long 0x00 "ITARGETSR4,Interrupt Processor Targets 4 Register" rgroup.long 0x1814++0x03 line.long 0x00 "ITARGETSR5,Interrupt Processor Targets 5 Register" rgroup.long 0x1818++0x03 line.long 0x00 "ITARGETSR6,Interrupt Processor Targets 6 Register" rgroup.long 0x181C++0x03 line.long 0x00 "ITARGETSR7,Interrupt Processor Targets 7 Register" rgroup.long 0x1820++0x03 line.long 0x00 "ITARGETSR8,Interrupt Processor Targets 8 Register" rgroup.long 0x1824++0x03 line.long 0x00 "ITARGETSR9,Interrupt Processor Targets 9 Register" rgroup.long 0x1828++0x03 line.long 0x00 "ITARGETSR10,Interrupt Processor Targets 10 Register" rgroup.long 0x182C++0x03 line.long 0x00 "ITARGETSR11,Interrupt Processor Targets 11 Register" rgroup.long 0x1830++0x03 line.long 0x00 "ITARGETSR12,Interrupt Processor Targets 12 Register" rgroup.long 0x1834++0x03 line.long 0x00 "ITARGETSR13,Interrupt Processor Targets 13 Register" rgroup.long 0x1838++0x03 line.long 0x00 "ITARGETSR14,Interrupt Processor Targets 14 Register" rgroup.long 0x183C++0x03 line.long 0x00 "ITARGETSR15,Interrupt Processor Targets 15 Register" rgroup.long 0x1840++0x03 line.long 0x00 "ITARGETSR16,Interrupt Processor Targets 16 Register" rgroup.long 0x1844++0x03 line.long 0x00 "ITARGETSR17,Interrupt Processor Targets 17 Register" rgroup.long 0x1848++0x03 line.long 0x00 "ITARGETSR18,Interrupt Processor Targets 18 Register" rgroup.long 0x184C++0x03 line.long 0x00 "ITARGETSR19,Interrupt Processor Targets 19 Register" rgroup.long 0x1850++0x03 line.long 0x00 "ITARGETSR20,Interrupt Processor Targets 20 Register" rgroup.long 0x1854++0x03 line.long 0x00 "ITARGETSR21,Interrupt Processor Targets 21 Register" rgroup.long 0x1858++0x03 line.long 0x00 "ITARGETSR22,Interrupt Processor Targets 22 Register" rgroup.long 0x185C++0x03 line.long 0x00 "ITARGETSR23,Interrupt Processor Targets 23 Register" rgroup.long 0x1860++0x03 line.long 0x00 "ITARGETSR24,Interrupt Processor Targets 24 Register" rgroup.long 0x1864++0x03 line.long 0x00 "ITARGETSR25,Interrupt Processor Targets 25 Register" rgroup.long 0x1868++0x03 line.long 0x00 "ITARGETSR26,Interrupt Processor Targets 26 Register" rgroup.long 0x186C++0x03 line.long 0x00 "ITARGETSR27,Interrupt Processor Targets 27 Register" rgroup.long 0x1870++0x03 line.long 0x00 "ITARGETSR28,Interrupt Processor Targets 28 Register" rgroup.long 0x1874++0x03 line.long 0x00 "ITARGETSR29,Interrupt Processor Targets 29 Register" rgroup.long 0x1878++0x03 line.long 0x00 "ITARGETSR30,Interrupt Processor Targets 30 Register" rgroup.long 0x187C++0x03 line.long 0x00 "ITARGETSR31,Interrupt Processor Targets 31 Register" rgroup.long 0x1880++0x03 line.long 0x00 "ITARGETSR32,Interrupt Processor Targets 32 Register" rgroup.long 0x1884++0x03 line.long 0x00 "ITARGETSR33,Interrupt Processor Targets 33 Register" rgroup.long 0x1888++0x03 line.long 0x00 "ITARGETSR34,Interrupt Processor Targets 34 Register" rgroup.long 0x188C++0x03 line.long 0x00 "ITARGETSR35,Interrupt Processor Targets 35 Register" rgroup.long 0x1890++0x03 line.long 0x00 "ITARGETSR36,Interrupt Processor Targets 36 Register" rgroup.long 0x1894++0x03 line.long 0x00 "ITARGETSR37,Interrupt Processor Targets 37 Register" rgroup.long 0x1898++0x03 line.long 0x00 "ITARGETSR38,Interrupt Processor Targets 38 Register" rgroup.long 0x189C++0x03 line.long 0x00 "ITARGETSR39,Interrupt Processor Targets 39 Register" rgroup.long 0x18A0++0x03 line.long 0x00 "ITARGETSR40,Interrupt Processor Targets 40 Register" rgroup.long 0x18A4++0x03 line.long 0x00 "ITARGETSR41,Interrupt Processor Targets 41 Register" rgroup.long 0x18A8++0x03 line.long 0x00 "ITARGETSR42,Interrupt Processor Targets 42 Register" rgroup.long 0x18AC++0x03 line.long 0x00 "ITARGETSR43,Interrupt Processor Targets 43 Register" rgroup.long 0x18B0++0x03 line.long 0x00 "ITARGETSR44,Interrupt Processor Targets 44 Register" rgroup.long 0x18B4++0x03 line.long 0x00 "ITARGETSR45,Interrupt Processor Targets 45 Register" rgroup.long 0x18B8++0x03 line.long 0x00 "ITARGETSR46,Interrupt Processor Targets 46 Register" rgroup.long 0x18BC++0x03 line.long 0x00 "ITARGETSR47,Interrupt Processor Targets 47 Register" rgroup.long 0x18C0++0x03 line.long 0x00 "ITARGETSR48,Interrupt Processor Targets 48 Register" rgroup.long 0x18C4++0x03 line.long 0x00 "ITARGETSR49,Interrupt Processor Targets 49 Register" rgroup.long 0x18C8++0x03 line.long 0x00 "ITARGETSR50,Interrupt Processor Targets 50 Register" rgroup.long 0x18CC++0x03 line.long 0x00 "ITARGETSR51,Interrupt Processor Targets 51 Register" rgroup.long 0x18D0++0x03 line.long 0x00 "ITARGETSR52,Interrupt Processor Targets 52 Register" rgroup.long 0x18D4++0x03 line.long 0x00 "ITARGETSR53,Interrupt Processor Targets 53 Register" rgroup.long 0x18D8++0x03 line.long 0x00 "ITARGETSR54,Interrupt Processor Targets 54 Register" rgroup.long 0x18DC++0x03 line.long 0x00 "ITARGETSR55,Interrupt Processor Targets 55 Register" rgroup.long 0x18E0++0x03 line.long 0x00 "ITARGETSR56,Interrupt Processor Targets 56 Register" rgroup.long 0x18E4++0x03 line.long 0x00 "ITARGETSR57,Interrupt Processor Targets 57 Register" rgroup.long 0x18E8++0x03 line.long 0x00 "ITARGETSR58,Interrupt Processor Targets 58 Register" rgroup.long 0x18EC++0x03 line.long 0x00 "ITARGETSR59,Interrupt Processor Targets 59 Register" rgroup.long 0x18F0++0x03 line.long 0x00 "ITARGETSR60,Interrupt Processor Targets 60 Register" rgroup.long 0x18F4++0x03 line.long 0x00 "ITARGETSR61,Interrupt Processor Targets 61 Register" rgroup.long 0x18F8++0x03 line.long 0x00 "ITARGETSR62,Interrupt Processor Targets 62 Register" rgroup.long 0x18FC++0x03 line.long 0x00 "ITARGETSR63,Interrupt Processor Targets 63 Register" rgroup.long 0x1900++0x03 line.long 0x00 "ITARGETSR64,Interrupt Processor Targets 64 Register" rgroup.long 0x1904++0x03 line.long 0x00 "ITARGETSR65,Interrupt Processor Targets 65 Register" rgroup.long 0x1908++0x03 line.long 0x00 "ITARGETSR66,Interrupt Processor Targets 66 Register" rgroup.long 0x190C++0x03 line.long 0x00 "ITARGETSR67,Interrupt Processor Targets 67 Register" rgroup.long 0x1910++0x03 line.long 0x00 "ITARGETSR68,Interrupt Processor Targets 68 Register" rgroup.long 0x1914++0x03 line.long 0x00 "ITARGETSR69,Interrupt Processor Targets 69 Register" rgroup.long 0x1918++0x03 line.long 0x00 "ITARGETSR70,Interrupt Processor Targets 70 Register" rgroup.long 0x191C++0x03 line.long 0x00 "ITARGETSR71,Interrupt Processor Targets 71 Register" rgroup.long 0x1920++0x03 line.long 0x00 "ITARGETSR72,Interrupt Processor Targets 72 Register" rgroup.long 0x1924++0x03 line.long 0x00 "ITARGETSR73,Interrupt Processor Targets 73 Register" rgroup.long 0x1928++0x03 line.long 0x00 "ITARGETSR74,Interrupt Processor Targets 74 Register" rgroup.long 0x192C++0x03 line.long 0x00 "ITARGETSR75,Interrupt Processor Targets 75 Register" rgroup.long 0x1930++0x03 line.long 0x00 "ITARGETSR76,Interrupt Processor Targets 76 Register" rgroup.long 0x1934++0x03 line.long 0x00 "ITARGETSR77,Interrupt Processor Targets 77 Register" rgroup.long 0x1938++0x03 line.long 0x00 "ITARGETSR78,Interrupt Processor Targets 78 Register" rgroup.long 0x193C++0x03 line.long 0x00 "ITARGETSR79,Interrupt Processor Targets 79 Register" rgroup.long 0x1940++0x03 line.long 0x00 "ITARGETSR80,Interrupt Processor Targets 80 Register" rgroup.long 0x1944++0x03 line.long 0x00 "ITARGETSR81,Interrupt Processor Targets 81 Register" rgroup.long 0x1948++0x03 line.long 0x00 "ITARGETSR82,Interrupt Processor Targets 82 Register" rgroup.long 0x194C++0x03 line.long 0x00 "ITARGETSR83,Interrupt Processor Targets 83 Register" rgroup.long 0x1950++0x03 line.long 0x00 "ITARGETSR84,Interrupt Processor Targets 84 Register" rgroup.long 0x1954++0x03 line.long 0x00 "ITARGETSR85,Interrupt Processor Targets 85 Register" rgroup.long 0x1958++0x03 line.long 0x00 "ITARGETSR86,Interrupt Processor Targets 86 Register" rgroup.long 0x195C++0x03 line.long 0x00 "ITARGETSR87,Interrupt Processor Targets 87 Register" rgroup.long 0x1960++0x03 line.long 0x00 "ITARGETSR88,Interrupt Processor Targets 88 Register" rgroup.long 0x1964++0x03 line.long 0x00 "ITARGETSR89,Interrupt Processor Targets 89 Register" rgroup.long 0x1968++0x03 line.long 0x00 "ITARGETSR90,Interrupt Processor Targets 90 Register" rgroup.long 0x196C++0x03 line.long 0x00 "ITARGETSR91,Interrupt Processor Targets 91 Register" rgroup.long 0x1970++0x03 line.long 0x00 "ITARGETSR92,Interrupt Processor Targets 92 Register" rgroup.long 0x1974++0x03 line.long 0x00 "ITARGETSR93,Interrupt Processor Targets 93 Register" rgroup.long 0x1978++0x03 line.long 0x00 "ITARGETSR94,Interrupt Processor Targets 94 Register" rgroup.long 0x197C++0x03 line.long 0x00 "ITARGETSR95,Interrupt Processor Targets 95 Register" rgroup.long 0x1980++0x03 line.long 0x00 "ITARGETSR96,Interrupt Processor Targets 96 Register" rgroup.long 0x1984++0x03 line.long 0x00 "ITARGETSR97,Interrupt Processor Targets 97 Register" rgroup.long 0x1988++0x03 line.long 0x00 "ITARGETSR98,Interrupt Processor Targets 98 Register" rgroup.long 0x198C++0x03 line.long 0x00 "ITARGETSR99,Interrupt Processor Targets 99 Register" rgroup.long 0x1990++0x03 line.long 0x00 "ITARGETSR100,Interrupt Processor Targets 100 Register" rgroup.long 0x1994++0x03 line.long 0x00 "ITARGETSR101,Interrupt Processor Targets 101 Register" rgroup.long 0x1998++0x03 line.long 0x00 "ITARGETSR102,Interrupt Processor Targets 102 Register" rgroup.long 0x199C++0x03 line.long 0x00 "ITARGETSR103,Interrupt Processor Targets 103 Register" rgroup.long 0x19A0++0x03 line.long 0x00 "ITARGETSR104,Interrupt Processor Targets 104 Register" rgroup.long 0x19A4++0x03 line.long 0x00 "ITARGETSR105,Interrupt Processor Targets 105 Register" rgroup.long 0x19A8++0x03 line.long 0x00 "ITARGETSR106,Interrupt Processor Targets 106 Register" rgroup.long 0x19AC++0x03 line.long 0x00 "ITARGETSR107,Interrupt Processor Targets 107 Register" rgroup.long 0x19B0++0x03 line.long 0x00 "ITARGETSR108,Interrupt Processor Targets 108 Register" rgroup.long 0x19B4++0x03 line.long 0x00 "ITARGETSR109,Interrupt Processor Targets 109 Register" rgroup.long 0x19B8++0x03 line.long 0x00 "ITARGETSR110,Interrupt Processor Targets 110 Register" rgroup.long 0x19BC++0x03 line.long 0x00 "ITARGETSR111,Interrupt Processor Targets 111 Register" rgroup.long 0x19C0++0x03 line.long 0x00 "ITARGETSR112,Interrupt Processor Targets 112 Register" rgroup.long 0x19C4++0x03 line.long 0x00 "ITARGETSR113,Interrupt Processor Targets 113 Register" rgroup.long 0x19C8++0x03 line.long 0x00 "ITARGETSR114,Interrupt Processor Targets 114 Register" rgroup.long 0x19CC++0x03 line.long 0x00 "ITARGETSR115,Interrupt Processor Targets 115 Register" rgroup.long 0x19D0++0x03 line.long 0x00 "ITARGETSR116,Interrupt Processor Targets 116 Register" rgroup.long 0x19D4++0x03 line.long 0x00 "ITARGETSR117,Interrupt Processor Targets 117 Register" rgroup.long 0x19D8++0x03 line.long 0x00 "ITARGETSR118,Interrupt Processor Targets 118 Register" rgroup.long 0x19DC++0x03 line.long 0x00 "ITARGETSR119,Interrupt Processor Targets 119 Register" rgroup.long 0x19E0++0x03 line.long 0x00 "ITARGETSR120,Interrupt Processor Targets 120 Register" rgroup.long 0x19E4++0x03 line.long 0x00 "ITARGETSR121,Interrupt Processor Targets 121 Register" rgroup.long 0x19E8++0x03 line.long 0x00 "ITARGETSR122,Interrupt Processor Targets 122 Register" rgroup.long 0x19EC++0x03 line.long 0x00 "ITARGETSR123,Interrupt Processor Targets 123 Register" rgroup.long 0x19F0++0x03 line.long 0x00 "ITARGETSR124,Interrupt Processor Targets 124 Register" rgroup.long 0x19F4++0x03 line.long 0x00 "ITARGETSR125,Interrupt Processor Targets 125 Register" rgroup.long 0x19F8++0x03 line.long 0x00 "ITARGETSR126,Interrupt Processor Targets 126 Register" rgroup.long 0x19FC++0x03 line.long 0x00 "ITARGETSR127,Interrupt Processor Targets 127 Register" rgroup.long 0x1C00++0x03 line.long 0x00 "ICFGR0,Interrupt Configuration 0 Register" rgroup.long 0x1C04++0x03 line.long 0x00 "ICFGR1,Interrupt Configuration 1 Register" rgroup.long 0x1C08++0x03 line.long 0x00 "ICFGR2,Interrupt Configuration 2 Register" rgroup.long 0x1C0C++0x03 line.long 0x00 "ICFGR3,Interrupt Configuration 3 Register" rgroup.long 0x1C10++0x03 line.long 0x00 "ICFGR4,Interrupt Configuration 4 Register" rgroup.long 0x1C14++0x03 line.long 0x00 "ICFGR5,Interrupt Configuration 5 Register" rgroup.long 0x1C18++0x03 line.long 0x00 "ICFGR6,Interrupt Configuration 6 Register" rgroup.long 0x1C1C++0x03 line.long 0x00 "ICFGR7,Interrupt Configuration 7 Register" rgroup.long 0x1C20++0x03 line.long 0x00 "ICFGR8,Interrupt Configuration 8 Register" rgroup.long 0x1C24++0x03 line.long 0x00 "ICFGR9,Interrupt Configuration 9 Register" rgroup.long 0x1C28++0x03 line.long 0x00 "ICFGR10,Interrupt Configuration 10 Register" rgroup.long 0x1C2C++0x03 line.long 0x00 "ICFGR11,Interrupt Configuration 11 Register" rgroup.long 0x1C30++0x03 line.long 0x00 "ICFGR12,Interrupt Configuration 12 Register" rgroup.long 0x1C34++0x03 line.long 0x00 "ICFGR13,Interrupt Configuration 13 Register" rgroup.long 0x1C38++0x03 line.long 0x00 "ICFGR14,Interrupt Configuration 14 Register" rgroup.long 0x1C3C++0x03 line.long 0x00 "ICFGR15,Interrupt Configuration 15 Register" rgroup.long 0x1C40++0x03 line.long 0x00 "ICFGR16,Interrupt Configuration 16 Register" rgroup.long 0x1C44++0x03 line.long 0x00 "ICFGR17,Interrupt Configuration 17 Register" rgroup.long 0x1C48++0x03 line.long 0x00 "ICFGR18,Interrupt Configuration 18 Register" rgroup.long 0x1C4C++0x03 line.long 0x00 "ICFGR19,Interrupt Configuration 19 Register" rgroup.long 0x1C50++0x03 line.long 0x00 "ICFGR20,Interrupt Configuration 20 Register" rgroup.long 0x1C54++0x03 line.long 0x00 "ICFGR21,Interrupt Configuration 21 Register" rgroup.long 0x1C58++0x03 line.long 0x00 "ICFGR22,Interrupt Configuration 22 Register" rgroup.long 0x1C5C++0x03 line.long 0x00 "ICFGR23,Interrupt Configuration 23 Register" rgroup.long 0x1C60++0x03 line.long 0x00 "ICFGR24,Interrupt Configuration 24 Register" rgroup.long 0x1C64++0x03 line.long 0x00 "ICFGR25,Interrupt Configuration 25 Register" rgroup.long 0x1C68++0x03 line.long 0x00 "ICFGR26,Interrupt Configuration 26 Register" rgroup.long 0x1C6C++0x03 line.long 0x00 "ICFGR27,Interrupt Configuration 27 Register" rgroup.long 0x1C70++0x03 line.long 0x00 "ICFGR28,Interrupt Configuration 28 Register" rgroup.long 0x1C74++0x03 line.long 0x00 "ICFGR29,Interrupt Configuration 29 Register" rgroup.long 0x1C78++0x03 line.long 0x00 "ICFGR30,Interrupt Configuration 30 Register" rgroup.long 0x1C7C++0x03 line.long 0x00 "ICFGR31,Interrupt Configuration 31 Register" rgroup.long 0x1D00++0x03 line.long 0x00 "PPISR,Private Peripheral Interrupt Status Register" rgroup.long 0x1D04++0x03 line.long 0x00 "SPISR0,Private Peripheral Interrupt Status 0 Register" rgroup.long 0x1D08++0x03 line.long 0x00 "SPISR1,Private Peripheral Interrupt Status 1 Register" rgroup.long 0x1D0C++0x03 line.long 0x00 "SPISR2,Private Peripheral Interrupt Status 2 Register" rgroup.long 0x1D10++0x03 line.long 0x00 "SPISR3,Private Peripheral Interrupt Status 3 Register" rgroup.long 0x1D14++0x03 line.long 0x00 "SPISR4,Private Peripheral Interrupt Status 4 Register" rgroup.long 0x1D18++0x03 line.long 0x00 "SPISR5,Private Peripheral Interrupt Status 5 Register" rgroup.long 0x1D1C++0x03 line.long 0x00 "SPISR6,Private Peripheral Interrupt Status 6 Register" rgroup.long 0x1D20++0x03 line.long 0x00 "SPISR7,Private Peripheral Interrupt Status 7 Register" rgroup.long 0x1D24++0x03 line.long 0x00 "SPISR8,Private Peripheral Interrupt Status 8 Register" rgroup.long 0x1D28++0x03 line.long 0x00 "SPISR9,Private Peripheral Interrupt Status 9 Register" rgroup.long 0x1D2C++0x03 line.long 0x00 "SPISR10,Private Peripheral Interrupt Status 10 Register" rgroup.long 0x1D30++0x03 line.long 0x00 "SPISR11,Private Peripheral Interrupt Status 11 Register" rgroup.long 0x1D34++0x03 line.long 0x00 "SPISR12,Private Peripheral Interrupt Status 12 Register" rgroup.long 0x1D38++0x03 line.long 0x00 "SPISR13,Private Peripheral Interrupt Status 13 Register" rgroup.long 0x1D3C++0x03 line.long 0x00 "SPISR14,Private Peripheral Interrupt Status 14 Register" group.long 0x1F00++0x03 line.long 0x00 "SGIR,Software Generated Interrupt Register" group.long 0x1F10++0x03 line.long 0x00 "CPENDSGIR0,SGI Clear-Pending 0 Register" group.long 0x1F14++0x03 line.long 0x00 "CPENDSGIR1,SGI Clear-Pending 1 Register" group.long 0x1F18++0x03 line.long 0x00 "CPENDSGIR2,SGI Clear-Pending 2 Register" group.long 0x1F1C++0x03 line.long 0x00 "CPENDSGIR3,SGI Clear-Pending 3 Register" group.long 0x1F20++0x03 line.long 0x00 "SPENDSGIR0,SGI Set-Pending 0 Register" group.long 0x1F24++0x03 line.long 0x00 "SPENDSGIR1,SGI Set-Pending 1 Register" group.long 0x1F28++0x03 line.long 0x00 "SPENDSGIR2,SGI Set-Pending 2 Register" group.long 0x1F2C++0x03 line.long 0x00 "SPENDSGIR3,SGI Set-Pending 3 Register" rgroup.long 0x1FE0++0x03 line.long 0x00 "PIDR0,Peripheral ID0 Register" rgroup.long 0x1FE4++0x03 line.long 0x00 "PIDR1,Peripheral ID1 Register" rgroup.long 0x1FE8++0x03 line.long 0x00 "PIDR2,Peripheral ID2 Register" rgroup.long 0x1FEC++0x03 line.long 0x00 "PIDR3,Peripheral ID3 Register" rgroup.long 0x1FF0++0x03 line.long 0x00 "PIDR4,Peripheral ID4 Register" rgroup.long 0x1FD0++0x03 line.long 0x00 "PIDR5,Peripheral ID5 Register" rgroup.long 0x1FD4++0x03 line.long 0x00 "PIDR6,Peripheral ID6 Register" rgroup.long 0x1FD8++0x03 line.long 0x00 "PIDR7,Peripheral ID7 Register" rgroup.long 0x1FF0++0x03 line.long 0x00 "CIDR0,Component ID0 Register" rgroup.long 0x1FF4++0x03 line.long 0x00 "CIDR1,Component ID1 Register" rgroup.long 0x1FF8++0x03 line.long 0x00 "CIDR2,Component ID2 Register" rgroup.long 0x1FFC++0x03 line.long 0x00 "CIDR3,Component ID3 Register" textline " " group.long 0x2000++0x0B line.long 0x00 "CTLR,Interface Control Register" line.long 0x04 "PMR,Interrupt Priority Mask Register" line.long 0x08 "BPR,Binary Point Register" rgroup.long 0x200C++0x03 line.long 0x00 "IAR,Interrupt Acknowledge Register" group.long 0x2010++0x03 line.long 0x00 "EOIR,End Of Interrupt Register" rgroup.long 0x2014++0x07 line.long 0x00 "RPR,Running Priority Register" line.long 0x04 "HPPIR,Highest Priority Pending Interrupt Register" group.long 0x201C++0x03 line.long 0x00 "ABPR,Aliased Binary Point Register" rgroup.long 0x2020++0x03 line.long 0x00 "AIAR,Aliased Interrupt Acknowledge Register" group.long 0x2024++0x03 line.long 0x00 "AEOIR,Aliased End of Interrupt Register" rgroup.long 0x2028++0x03 line.long 0x00 "AHPPIR,Aliased Highest Priority Pending Interrupt Register" group.long 0x20D0++0x03 line.long 0x00 "APR0,Active Priority Register" group.long 0x20E0++0x03 line.long 0x00 "NSAPR0,Non-Secure Active Priority Register" rgroup.long 0x20FC++0x03 line.long 0x00 "IIDR,CPU Interface Identification Register" group.long 0x3000++0x03 line.long 0x00 "DIR,Deactivate Interrupt Register" width 0x0B tree.end tree "MIXER" base ad:0x702DBB00 width 16. tree "AXBAR" tree "RX1" group.long (0x0+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x0+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x0+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x0+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX2" group.long (0x40+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x40+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x40+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x40+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX3" group.long (0x80+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x80+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x80+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x80+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX4" group.long (0xC0+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0xC0+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0xC0+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0xC0+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX5" group.long (0x100+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x100+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x100+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x100+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX6" group.long (0x140+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x140+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x140+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x140+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX7" group.long (0x180+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x180+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x180+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x180+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX8" group.long (0x1C0+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x1C0+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x1C0+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x1C0+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX9" group.long (0x200+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x200+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x200+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x200+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "RX10" group.long (0x240+0x04)++0x03 line.long 0x00 "SOFT_RESET,Soft Reset Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x240+0x10)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 8. " CONFIG_BUSY ,Config busy" "Not busy,Busy" bitfld.long 0x00 1. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 0. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" group.long (0x240+0x24)++0x0B line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "CTRL,Control Register" bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset" bitfld.long 0x04 16.--20. " ACT_THRESHOLD ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. " DEACT_THRESHOLD ,DEACT threshold" line.long 0x08 "PEAK_CTRL,Peak Control Register" bitfld.long 0x08 31. " PEAK_TYPE ,Peak type" "Window based,Reset on read" hexmask.long 0x08 0.--30. 1. " PEAK_WIN ,Peak win" rgroup.long (0x240+0x30)++0x03 line.long 0x00 "SAMPLE_COUNT,Sample Count Register" tree.end tree "TX1" group.long (0x0+0x280)++0x07 line.long 0x00 "ENABLE,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "SOFT_RESET,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x0+0x290)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "Disabled,Enabled" group.long (0x0+0x294)++0x07 line.long 0x00 "INT_STATUS,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR ,TX done" "Clear,Set" line.long 0x04 "INT_MASK,Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long (0x0+0x2A4)++0x07 line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "ADDER_CONFIG,Adder Configuration Register" bitfld.long 0x04 9. " RX10_INPUT_ENABLE ,RX10 input enable" "Disabled,Enabled" bitfld.long 0x04 8. " RX9_INPUT_ENABLE ,RX9 input enable" "Disabled,Enabled" bitfld.long 0x04 7. " RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " RX7_INPUT_ENABLE ,RX7 input enable" "Disabled,Enabled" bitfld.long 0x04 5. " RX6_INPUT_ENABLE ,RX6 input enable" "Disabled,Enabled" bitfld.long 0x04 4. " RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " RX4_INPUT_ENABLE ,RX4 input enable" "Disabled,Enabled" bitfld.long 0x04 2. " RX3_INPUT_ENABLE ,RX3 input enable" "Disabled,Enabled" bitfld.long 0x04 1. " RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " RX1_INPUT_ENABLE ,RX1 input enable" "Disabled,Enabled" tree.end tree "TX2" group.long (0x40+0x280)++0x07 line.long 0x00 "ENABLE,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "SOFT_RESET,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x40+0x290)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "Disabled,Enabled" group.long (0x40+0x294)++0x07 line.long 0x00 "INT_STATUS,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR ,TX done" "Clear,Set" line.long 0x04 "INT_MASK,Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long (0x40+0x2A4)++0x07 line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "ADDER_CONFIG,Adder Configuration Register" bitfld.long 0x04 9. " RX10_INPUT_ENABLE ,RX10 input enable" "Disabled,Enabled" bitfld.long 0x04 8. " RX9_INPUT_ENABLE ,RX9 input enable" "Disabled,Enabled" bitfld.long 0x04 7. " RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " RX7_INPUT_ENABLE ,RX7 input enable" "Disabled,Enabled" bitfld.long 0x04 5. " RX6_INPUT_ENABLE ,RX6 input enable" "Disabled,Enabled" bitfld.long 0x04 4. " RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " RX4_INPUT_ENABLE ,RX4 input enable" "Disabled,Enabled" bitfld.long 0x04 2. " RX3_INPUT_ENABLE ,RX3 input enable" "Disabled,Enabled" bitfld.long 0x04 1. " RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " RX1_INPUT_ENABLE ,RX1 input enable" "Disabled,Enabled" tree.end tree "TX3" group.long (0x80+0x280)++0x07 line.long 0x00 "ENABLE,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "SOFT_RESET,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x80+0x290)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "Disabled,Enabled" group.long (0x80+0x294)++0x07 line.long 0x00 "INT_STATUS,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR ,TX done" "Clear,Set" line.long 0x04 "INT_MASK,Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long (0x80+0x2A4)++0x07 line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "ADDER_CONFIG,Adder Configuration Register" bitfld.long 0x04 9. " RX10_INPUT_ENABLE ,RX10 input enable" "Disabled,Enabled" bitfld.long 0x04 8. " RX9_INPUT_ENABLE ,RX9 input enable" "Disabled,Enabled" bitfld.long 0x04 7. " RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " RX7_INPUT_ENABLE ,RX7 input enable" "Disabled,Enabled" bitfld.long 0x04 5. " RX6_INPUT_ENABLE ,RX6 input enable" "Disabled,Enabled" bitfld.long 0x04 4. " RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " RX4_INPUT_ENABLE ,RX4 input enable" "Disabled,Enabled" bitfld.long 0x04 2. " RX3_INPUT_ENABLE ,RX3 input enable" "Disabled,Enabled" bitfld.long 0x04 1. " RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " RX1_INPUT_ENABLE ,RX1 input enable" "Disabled,Enabled" tree.end tree "TX4" group.long (0xC0+0x280)++0x07 line.long 0x00 "ENABLE,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "SOFT_RESET,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0xC0+0x290)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "Disabled,Enabled" group.long (0xC0+0x294)++0x07 line.long 0x00 "INT_STATUS,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR ,TX done" "Clear,Set" line.long 0x04 "INT_MASK,Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long (0xC0+0x2A4)++0x07 line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "ADDER_CONFIG,Adder Configuration Register" bitfld.long 0x04 9. " RX10_INPUT_ENABLE ,RX10 input enable" "Disabled,Enabled" bitfld.long 0x04 8. " RX9_INPUT_ENABLE ,RX9 input enable" "Disabled,Enabled" bitfld.long 0x04 7. " RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " RX7_INPUT_ENABLE ,RX7 input enable" "Disabled,Enabled" bitfld.long 0x04 5. " RX6_INPUT_ENABLE ,RX6 input enable" "Disabled,Enabled" bitfld.long 0x04 4. " RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " RX4_INPUT_ENABLE ,RX4 input enable" "Disabled,Enabled" bitfld.long 0x04 2. " RX3_INPUT_ENABLE ,RX3 input enable" "Disabled,Enabled" bitfld.long 0x04 1. " RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " RX1_INPUT_ENABLE ,RX1 input enable" "Disabled,Enabled" tree.end tree "TX5" group.long (0x100+0x280)++0x07 line.long 0x00 "ENABLE,Enable Register" bitfld.long 0x00 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x04 "SOFT_RESET,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" rgroup.long (0x100+0x290)++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 2. " ACIF_FIFO_FULL ,ACIF FIFO full" "Not full,Full" bitfld.long 0x00 1. " ACIF_FIFO_EMPTY ,ACIF FIFO empty" "Not empty,Empty" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "Disabled,Enabled" group.long (0x100+0x294)++0x07 line.long 0x00 "INT_STATUS,Interrupt Status Register" setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR ,TX done" "Clear,Set" line.long 0x04 "INT_MASK,Interrupt Mask Register" bitfld.long 0x04 0. " TX_DONE ,TX done" "Unmasked,Masked" group.long (0x100+0x2A4)++0x07 line.long 0x00 "CIF_CTRL,CIF Control Register" sif cpuis("TEGRAX2") rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " else bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif bitfld.long 0x00 20.--23. " AXBAR_CHANNELS ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 16.--19. " CLIENT_CHANNELS ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 12.--14. " AXBAR_BITS ,AXBAR bits" ",8,12,16,20,24,28,32" textline " " sif cpuis("TEGRAX2") rbitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " else bitfld.long 0x00 8.--10. " CLIENT_BITS ,Client bits" ",8,12,16,20,24,28,32" textline " " endif bitfld.long 0x00 6.--7. " EXPAND ,Expand" "Zero,One,LFSR,?..." bitfld.long 0x00 4.--5. " STEREO_CONV ,Stereo conv" "CH0,CH1,AVG,?..." textline " " sif (!cpuis("TEGRAX2")) bitfld.long 0x00 2. " REPLICATE ,Replicate" "False,True" textline " " endif bitfld.long 0x00 1. " TRUNCATE ,Truncate" "Round,Chop" bitfld.long 0x00 0. " MONO_CONV ,Mono conv" "Zero,Copy" line.long 0x04 "ADDER_CONFIG,Adder Configuration Register" bitfld.long 0x04 9. " RX10_INPUT_ENABLE ,RX10 input enable" "Disabled,Enabled" bitfld.long 0x04 8. " RX9_INPUT_ENABLE ,RX9 input enable" "Disabled,Enabled" bitfld.long 0x04 7. " RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " RX7_INPUT_ENABLE ,RX7 input enable" "Disabled,Enabled" bitfld.long 0x04 5. " RX6_INPUT_ENABLE ,RX6 input enable" "Disabled,Enabled" bitfld.long 0x04 4. " RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " RX4_INPUT_ENABLE ,RX4 input enable" "Disabled,Enabled" bitfld.long 0x04 2. " RX3_INPUT_ENABLE ,RX3 input enable" "Disabled,Enabled" bitfld.long 0x04 1. " RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " RX1_INPUT_ENABLE ,RX1 input enable" "Disabled,Enabled" tree.end tree.end textline " " group.long 0x400++0x0B line.long 0x00 "ENABLE,Enable Register" bitfld.long 0x00 0. " ENABLE ,MIXER global enable bit" "Disabled,Enabled" line.long 0x04 "SOFT_RESET,Soft Reset Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x08 "CG,Clock Gating Register" bitfld.long 0x08 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x410++0x07 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 1. " SLCG_CLKEN ,SLCG_CLKEN" "False,True" bitfld.long 0x00 0. " ENABLE_STATUS ,Enable status" "Disabled,Enabled" line.long 0x04 "INT_STATUS,Interrupt Status Register" bitfld.long 0x04 20. " TX5_DONE ,TX5 done" "Cleared,Set" bitfld.long 0x04 19. " TX4_DONE ,TX4 done" "Cleared,Set" bitfld.long 0x04 18. " TX3_DONE ,TX3 done" "Cleared,Set" textline " " bitfld.long 0x04 17. " TX2_DONE ,TX2 done" "Cleared,Set" bitfld.long 0x04 16. " TX1_DONE ,TX1 done" "Cleared,Set" bitfld.long 0x04 0. " MIXER_TX_DONE ,Mixer TX done" "Cleared,Set" textline " " width 35. group.long 0x42C++0x0F line.long 0x00 "AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL,AHUB RAM CTL Gain Config RAM Control Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" textline " " bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enabled" "Disabled,Enabled" bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" line.long 0x04 "AHUBRAMCTL_GAIN_CONFIG_RAM_DATA,AHUB RAM CTL Gain Config RAM Data Register" line.long 0x08 "AHUBRAMCTL_PEAKM_RAM_CTRL,AHUB RAM CTL Peak Metering RAM Control Register" rbitfld.long 0x08 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x08 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x08 14. " RW ,Read/write" "Read,Write" textline " " bitfld.long 0x08 13. " ADDR_INIT_EN ,Address initial enabled" "Disabled,Enabled" bitfld.long 0x08 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x08 0.--8. 0x01 " RAM_ADDR ,RAM address" line.long 0x0C "AHUBRAMCTL_PEAKM_RAM_DATA,AHUB RAM CTL Peak Metering RAM DATA Register" width 0x0B tree.end tree "MBDRC" tree "MBDRC1" base ad:0x702D8200 width 25. group.long 0x08++0x03 line.long 0x00 "CG,CG Register" bitfld.long 0x00 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 0. " SLCG_CLKEN ,Second level clock gating clock enable" "Disabled,Enabled" group.long 0x28++0x0F line.long 0x00 "CONFIG,Config Register" hexmask.long.word 0x00 16.--24. 0x01 " RMS_OFFSET ,RMS offset" bitfld.long 0x00 15. " BIAS_UNBIAS ,Round to plus infinity" "Bias,Unbias" bitfld.long 0x00 14. " PEAK_RMS ,Mode select for peak detection in SideChain" "RMS,PEAK" textline " " bitfld.long 0x00 13. " FILTER_STRUC ,Structure for BiQuad stages" "ALL pass tree,Flex" bitfld.long 0x00 8.--12. " SHIFT_CTRL ,Shift control for each BiQuad stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. " FRAME_SIZE ,Number of samples per frame" "1,2,4,8,16,32,64,?..." textline " " bitfld.long 0x00 0.--1. " MBDRC_MODE ,MBDRC mode of operation filtering" "Bypass,Fullband,Dualband,Multiband" line.long 0x04 "CHAN_MASK,Channel Mask Register" bitfld.long 0x04 7. " CHAN_MASK_EN[7] ,Perform DRC on that channel 7" "Not masked,Masked" bitfld.long 0x04 6. " [6] ,Perform DRC on channel 6" "Not masked,Masked" bitfld.long 0x04 5. " [5] ,Perform DRC on channel 5" "Not masked,Masked" bitfld.long 0x04 4. " [4] ,Perform DRC on channel 4" "Not masked,Masked" textline " " bitfld.long 0x04 3. " [3] ,Perform DRC on channel 3" "Not masked,Masked" bitfld.long 0x04 2. " [2] ,Perform DRC on channel 2" "Not masked,Masked" bitfld.long 0x04 1. " [1] ,Perform DRC on channel 1" "Not masked,Masked" bitfld.long 0x04 0. " [0] ,Perform DRC on channel 0" "Not masked,Masked" line.long 0x08 "MASTER_VOLUME,Feedback Of Volume Control To MBDRC" line.long 0x0C "FAST_FACTOR,Fast Factor Register" hexmask.long.word 0x0C 16.--31. 1. " FR_FACTOR ,Fast release gain smoothing" hexmask.long.word 0x0C 0.--15. 1. " FA_FACTOR ,Fast attack gain smoothing" group.long 0x38++0x03 line.long 0x00 "IIR_CONFIG_1,IIR CONFIG 1 Register" bitfld.long 0x00 0.--3. " NUM_STAGES ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3C++0x03 line.long 0x00 "IIR_CONFIG_2,IIR CONFIG 2 Register" bitfld.long 0x00 0.--3. " NUM_STAGES ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x40++0x03 line.long 0x00 "IIR_CONFIG_3,IIR CONFIG 3 Register" bitfld.long 0x00 0.--3. " NUM_STAGES ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x44++0x03 line.long 0x00 "INATTACK_1,Attack Time Constant Register" group.long 0x48++0x03 line.long 0x00 "INATTACK_2,Attack Time Constant Register" group.long 0x4C++0x03 line.long 0x00 "INATTACK_3,Attack Time Constant Register" group.long 0x50++0x03 line.long 0x00 "INRELEASE_1,Release Time Constant Register" group.long 0x54++0x03 line.long 0x00 "INRELEASE_2,Release Time Constant Register" group.long 0x58++0x03 line.long 0x00 "INRELEASE_3,Release Time Constant Register" group.long 0x5C++0x03 line.long 0x00 "FASTATTACK_1,Fast Attack Time Constant Register" group.long 0x60++0x03 line.long 0x00 "FASTATTACK_2,Fast Attack Time Constant Register" group.long 0x64++0x03 line.long 0x00 "FASTATTACK_3,Fast Attack Time Constant Register" group.long 0x68++0x03 line.long 0x00 "IN_THRESH_1,IN Threshold 1 Register" hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH ,Fourth Knee for the 5 gain segments which is close to 0 dB" hexmask.long.byte 0x00 16.--23. 1. " IN_THRESH_3RD ,Third knee for the 5 gain segments" hexmask.long.byte 0x00 8.--15. 1. " IN_THRESH_2ND ,Second knee for the 5 gain segments" textline " " hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST ,First Knee for the 5 gain segments which is close to -127.5 dB" group.long 0x6C++0x03 line.long 0x00 "IN_THRESH_2,IN Threshold 2 Register" hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH ,Fourth Knee for the 5 gain segments which is close to 0 dB" hexmask.long.byte 0x00 16.--23. 1. " IN_THRESH_3RD ,Third knee for the 5 gain segments" hexmask.long.byte 0x00 8.--15. 1. " IN_THRESH_2ND ,Second knee for the 5 gain segments" textline " " hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST ,First Knee for the 5 gain segments which is close to -127.5 dB" group.long 0x70++0x03 line.long 0x00 "IN_THRESH_3,IN Threshold 3 Register" hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH ,Fourth Knee for the 5 gain segments which is close to 0 dB" hexmask.long.byte 0x00 16.--23. 1. " IN_THRESH_3RD ,Third knee for the 5 gain segments" hexmask.long.byte 0x00 8.--15. 1. " IN_THRESH_2ND ,Second knee for the 5 gain segments" textline " " hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST ,First Knee for the 5 gain segments which is close to -127.5 dB" group.long 0x74++0x03 line.long 0x00 "OUT_THRESH_1,OUT Threshold 1 Register" hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH ,Fourth output point corresponding to IN_THRESH_4TH" hexmask.long.byte 0x00 16.--23. 1. " OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD" hexmask.long.byte 0x00 8.--15. 1. " OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND" textline " " hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST ,First output point corresponding to IN_THRESH_1ST" group.long 0x78++0x03 line.long 0x00 "OUT_THRESH_2,OUT Threshold 2 Register" hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH ,Fourth output point corresponding to IN_THRESH_4TH" hexmask.long.byte 0x00 16.--23. 1. " OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD" hexmask.long.byte 0x00 8.--15. 1. " OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND" textline " " hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST ,First output point corresponding to IN_THRESH_1ST" group.long 0x7C++0x03 line.long 0x00 "OUT_THRESH_3,OUT Threshold 3 Register" hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH ,Fourth output point corresponding to IN_THRESH_4TH" hexmask.long.byte 0x00 16.--23. 1. " OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD" hexmask.long.byte 0x00 8.--15. 1. " OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND" textline " " hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST ,First output point corresponding to IN_THRESH_1ST" group.long 0x80++0x03 line.long 0x00 "RATIO_1ST_1,Ratio First 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST ,Output to input ratio for first gain segment which is close to -127.5 dB" group.long 0x84++0x03 line.long 0x00 "RATIO_1ST_2,Ratio First 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST ,Output to input ratio for first gain segment which is close to -127.5 dB" group.long 0x88++0x03 line.long 0x00 "RATIO_1ST_3,Ratio First 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST ,Output to input ratio for first gain segment which is close to -127.5 dB" group.long 0x8C++0x03 line.long 0x00 "RATIO_2ND_1,Ratio Second 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND ,Output to input ratio for second gain segment" group.long 0x90++0x03 line.long 0x00 "RATIO_2ND_2,Ratio Second 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND ,Output to input ratio for second gain segment" group.long 0x94++0x03 line.long 0x00 "RATIO_2ND_3,Ratio Second 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND ,Output to input ratio for second gain segment" group.long 0x98++0x03 line.long 0x00 "RATIO_3RD_1,Ratio Third 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD ,Output to input ratio for third gain segment" group.long 0x9C++0x03 line.long 0x00 "RATIO_3RD_2,Ratio Third 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD ,Output to input ratio for third gain segment" group.long 0xA0++0x03 line.long 0x00 "RATIO_3RD_3,Ratio Third 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD ,Output to input ratio for third gain segment" group.long 0xA4++0x03 line.long 0x00 "RATIO_4TH_1,Ratio Fourth 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH ,Output to input ratio for fourth gain segment" group.long 0xA8++0x03 line.long 0x00 "RATIO_4TH_2,Ratio Fourth 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH ,Output to input ratio for fourth gain segment" group.long 0xAC++0x03 line.long 0x00 "RATIO_4TH_3,Ratio Fourth 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH ,Output to input ratio for fourth gain segment" group.long 0xB0++0x03 line.long 0x00 "RATIO_5TH_1,Ratio Fifth 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH ,Output to input ratio for fifth gain segment which is close to 0 dB" group.long 0xB4++0x03 line.long 0x00 "RATIO_5TH_2,Ratio Fifth 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH ,Output to input ratio for fifth gain segment which is close to 0 dB" group.long 0xB8++0x03 line.long 0x00 "RATIO_5TH_3,Ratio Fifth 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH ,Output to input ratio for fifth gain segment which is close to 0 dB" group.long 0xBC++0x03 line.long 0x00 "MAKEUP_GAIN_1,Makeup Gain 1 Register" bitfld.long 0x00 0.--5. " MAKEUP_GAIN ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xC0++0x03 line.long 0x00 "MAKEUP_GAIN_2,Makeup Gain 2 Register" bitfld.long 0x00 0.--5. " MAKEUP_GAIN ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xC4++0x03 line.long 0x00 "MAKEUP_GAIN_3,Makeup Gain 3 Register" bitfld.long 0x00 0.--5. " MAKEUP_GAIN ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xC8++0x03 line.long 0x00 "INITGAIN_1,Initial Gain Register" group.long 0xCC++0x03 line.long 0x00 "INITGAIN_2,Initial Gain Register" group.long 0xD0++0x03 line.long 0x00 "INITGAIN_3,Initial Gain Register" group.long 0xD4++0x03 line.long 0x00 "GAINATTACK_1,Attack Time Constant 1 Register" group.long 0xD8++0x03 line.long 0x00 "GAINATTACK_2,Attack Time Constant 2 Register" group.long 0xDC++0x03 line.long 0x00 "GAINATTACK_3,Attack Time Constant 3 Register" group.long 0xE0++0x03 line.long 0x00 "GAINRELEASE_1,Release Time Constant 1 Register" group.long 0xE4++0x03 line.long 0x00 "GAINRELEASE_2,Release Time Constant 2 Register" group.long 0xE8++0x03 line.long 0x00 "GAINRELEASE_3,Release Time Constant 3 Register" group.long 0xEC++0x03 line.long 0x00 "FASTRELEASE_1,Fast Release Time Constant 1 Register" group.long 0xF0++0x03 line.long 0x00 "FASTRELEASE_2,Fast Release Time Constant 2 Register" group.long 0xF4++0x03 line.long 0x00 "FASTRELEASE_3,Fast Release Time Constant 3 Register" group.long 0xF8++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_1,AHUB RAM CTL MBDRC Control 1 Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" textline " " bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enabled" "Disabled,Enabled" bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" group.long 0xFC++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_2,AHUB RAM CTL MBDRC Control 2 Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" textline " " bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enabled" "Disabled,Enabled" bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" group.long 0x100++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_3,AHUB RAM CTL MBDRC Control 3 Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" textline " " bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enabled" "Disabled,Enabled" bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" group.long 0x104++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_1,AHUB RAM CTL MBDRC Data 1 Register" group.long 0x108++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_2,AHUB RAM CTL MBDRC Data 2 Register" group.long 0x10C++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_3,AHUB RAM CTL MBDRC Data 3 Register" width 0x0B tree.end tree "MBDRC1" base ad:0x702D8600 width 25. group.long 0x08++0x03 line.long 0x00 "CG,CG Register" bitfld.long 0x00 0. " SLCG_EN ,Second level clock gating enable" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "STATUS,Status Register" bitfld.long 0x00 0. " SLCG_CLKEN ,Second level clock gating clock enable" "Disabled,Enabled" group.long 0x28++0x0F line.long 0x00 "CONFIG,Config Register" hexmask.long.word 0x00 16.--24. 0x01 " RMS_OFFSET ,RMS offset" bitfld.long 0x00 15. " BIAS_UNBIAS ,Round to plus infinity" "Bias,Unbias" bitfld.long 0x00 14. " PEAK_RMS ,Mode select for peak detection in SideChain" "RMS,PEAK" textline " " bitfld.long 0x00 13. " FILTER_STRUC ,Structure for BiQuad stages" "ALL pass tree,Flex" bitfld.long 0x00 8.--12. " SHIFT_CTRL ,Shift control for each BiQuad stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. " FRAME_SIZE ,Number of samples per frame" "1,2,4,8,16,32,64,?..." textline " " bitfld.long 0x00 0.--1. " MBDRC_MODE ,MBDRC mode of operation filtering" "Bypass,Fullband,Dualband,Multiband" line.long 0x04 "CHAN_MASK,Channel Mask Register" bitfld.long 0x04 7. " CHAN_MASK_EN[7] ,Perform DRC on that channel 7" "Not masked,Masked" bitfld.long 0x04 6. " [6] ,Perform DRC on channel 6" "Not masked,Masked" bitfld.long 0x04 5. " [5] ,Perform DRC on channel 5" "Not masked,Masked" bitfld.long 0x04 4. " [4] ,Perform DRC on channel 4" "Not masked,Masked" textline " " bitfld.long 0x04 3. " [3] ,Perform DRC on channel 3" "Not masked,Masked" bitfld.long 0x04 2. " [2] ,Perform DRC on channel 2" "Not masked,Masked" bitfld.long 0x04 1. " [1] ,Perform DRC on channel 1" "Not masked,Masked" bitfld.long 0x04 0. " [0] ,Perform DRC on channel 0" "Not masked,Masked" line.long 0x08 "MASTER_VOLUME,Feedback Of Volume Control To MBDRC" line.long 0x0C "FAST_FACTOR,Fast Factor Register" hexmask.long.word 0x0C 16.--31. 1. " FR_FACTOR ,Fast release gain smoothing" hexmask.long.word 0x0C 0.--15. 1. " FA_FACTOR ,Fast attack gain smoothing" group.long 0x38++0x03 line.long 0x00 "IIR_CONFIG_1,IIR CONFIG 1 Register" bitfld.long 0x00 0.--3. " NUM_STAGES ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3C++0x03 line.long 0x00 "IIR_CONFIG_2,IIR CONFIG 2 Register" bitfld.long 0x00 0.--3. " NUM_STAGES ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x40++0x03 line.long 0x00 "IIR_CONFIG_3,IIR CONFIG 3 Register" bitfld.long 0x00 0.--3. " NUM_STAGES ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x44++0x03 line.long 0x00 "INATTACK_1,Attack Time Constant Register" group.long 0x48++0x03 line.long 0x00 "INATTACK_2,Attack Time Constant Register" group.long 0x4C++0x03 line.long 0x00 "INATTACK_3,Attack Time Constant Register" group.long 0x50++0x03 line.long 0x00 "INRELEASE_1,Release Time Constant Register" group.long 0x54++0x03 line.long 0x00 "INRELEASE_2,Release Time Constant Register" group.long 0x58++0x03 line.long 0x00 "INRELEASE_3,Release Time Constant Register" group.long 0x5C++0x03 line.long 0x00 "FASTATTACK_1,Fast Attack Time Constant Register" group.long 0x60++0x03 line.long 0x00 "FASTATTACK_2,Fast Attack Time Constant Register" group.long 0x64++0x03 line.long 0x00 "FASTATTACK_3,Fast Attack Time Constant Register" group.long 0x68++0x03 line.long 0x00 "IN_THRESH_1,IN Threshold 1 Register" hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH ,Fourth Knee for the 5 gain segments which is close to 0 dB" hexmask.long.byte 0x00 16.--23. 1. " IN_THRESH_3RD ,Third knee for the 5 gain segments" hexmask.long.byte 0x00 8.--15. 1. " IN_THRESH_2ND ,Second knee for the 5 gain segments" textline " " hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST ,First Knee for the 5 gain segments which is close to -127.5 dB" group.long 0x6C++0x03 line.long 0x00 "IN_THRESH_2,IN Threshold 2 Register" hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH ,Fourth Knee for the 5 gain segments which is close to 0 dB" hexmask.long.byte 0x00 16.--23. 1. " IN_THRESH_3RD ,Third knee for the 5 gain segments" hexmask.long.byte 0x00 8.--15. 1. " IN_THRESH_2ND ,Second knee for the 5 gain segments" textline " " hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST ,First Knee for the 5 gain segments which is close to -127.5 dB" group.long 0x70++0x03 line.long 0x00 "IN_THRESH_3,IN Threshold 3 Register" hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH ,Fourth Knee for the 5 gain segments which is close to 0 dB" hexmask.long.byte 0x00 16.--23. 1. " IN_THRESH_3RD ,Third knee for the 5 gain segments" hexmask.long.byte 0x00 8.--15. 1. " IN_THRESH_2ND ,Second knee for the 5 gain segments" textline " " hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST ,First Knee for the 5 gain segments which is close to -127.5 dB" group.long 0x74++0x03 line.long 0x00 "OUT_THRESH_1,OUT Threshold 1 Register" hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH ,Fourth output point corresponding to IN_THRESH_4TH" hexmask.long.byte 0x00 16.--23. 1. " OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD" hexmask.long.byte 0x00 8.--15. 1. " OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND" textline " " hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST ,First output point corresponding to IN_THRESH_1ST" group.long 0x78++0x03 line.long 0x00 "OUT_THRESH_2,OUT Threshold 2 Register" hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH ,Fourth output point corresponding to IN_THRESH_4TH" hexmask.long.byte 0x00 16.--23. 1. " OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD" hexmask.long.byte 0x00 8.--15. 1. " OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND" textline " " hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST ,First output point corresponding to IN_THRESH_1ST" group.long 0x7C++0x03 line.long 0x00 "OUT_THRESH_3,OUT Threshold 3 Register" hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH ,Fourth output point corresponding to IN_THRESH_4TH" hexmask.long.byte 0x00 16.--23. 1. " OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD" hexmask.long.byte 0x00 8.--15. 1. " OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND" textline " " hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST ,First output point corresponding to IN_THRESH_1ST" group.long 0x80++0x03 line.long 0x00 "RATIO_1ST_1,Ratio First 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST ,Output to input ratio for first gain segment which is close to -127.5 dB" group.long 0x84++0x03 line.long 0x00 "RATIO_1ST_2,Ratio First 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST ,Output to input ratio for first gain segment which is close to -127.5 dB" group.long 0x88++0x03 line.long 0x00 "RATIO_1ST_3,Ratio First 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST ,Output to input ratio for first gain segment which is close to -127.5 dB" group.long 0x8C++0x03 line.long 0x00 "RATIO_2ND_1,Ratio Second 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND ,Output to input ratio for second gain segment" group.long 0x90++0x03 line.long 0x00 "RATIO_2ND_2,Ratio Second 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND ,Output to input ratio for second gain segment" group.long 0x94++0x03 line.long 0x00 "RATIO_2ND_3,Ratio Second 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND ,Output to input ratio for second gain segment" group.long 0x98++0x03 line.long 0x00 "RATIO_3RD_1,Ratio Third 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD ,Output to input ratio for third gain segment" group.long 0x9C++0x03 line.long 0x00 "RATIO_3RD_2,Ratio Third 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD ,Output to input ratio for third gain segment" group.long 0xA0++0x03 line.long 0x00 "RATIO_3RD_3,Ratio Third 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD ,Output to input ratio for third gain segment" group.long 0xA4++0x03 line.long 0x00 "RATIO_4TH_1,Ratio Fourth 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH ,Output to input ratio for fourth gain segment" group.long 0xA8++0x03 line.long 0x00 "RATIO_4TH_2,Ratio Fourth 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH ,Output to input ratio for fourth gain segment" group.long 0xAC++0x03 line.long 0x00 "RATIO_4TH_3,Ratio Fourth 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH ,Output to input ratio for fourth gain segment" group.long 0xB0++0x03 line.long 0x00 "RATIO_5TH_1,Ratio Fifth 1 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH ,Output to input ratio for fifth gain segment which is close to 0 dB" group.long 0xB4++0x03 line.long 0x00 "RATIO_5TH_2,Ratio Fifth 2 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH ,Output to input ratio for fifth gain segment which is close to 0 dB" group.long 0xB8++0x03 line.long 0x00 "RATIO_5TH_3,Ratio Fifth 3 Register" hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH ,Output to input ratio for fifth gain segment which is close to 0 dB" group.long 0xBC++0x03 line.long 0x00 "MAKEUP_GAIN_1,Makeup Gain 1 Register" bitfld.long 0x00 0.--5. " MAKEUP_GAIN ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xC0++0x03 line.long 0x00 "MAKEUP_GAIN_2,Makeup Gain 2 Register" bitfld.long 0x00 0.--5. " MAKEUP_GAIN ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xC4++0x03 line.long 0x00 "MAKEUP_GAIN_3,Makeup Gain 3 Register" bitfld.long 0x00 0.--5. " MAKEUP_GAIN ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xC8++0x03 line.long 0x00 "INITGAIN_1,Initial Gain Register" group.long 0xCC++0x03 line.long 0x00 "INITGAIN_2,Initial Gain Register" group.long 0xD0++0x03 line.long 0x00 "INITGAIN_3,Initial Gain Register" group.long 0xD4++0x03 line.long 0x00 "GAINATTACK_1,Attack Time Constant 1 Register" group.long 0xD8++0x03 line.long 0x00 "GAINATTACK_2,Attack Time Constant 2 Register" group.long 0xDC++0x03 line.long 0x00 "GAINATTACK_3,Attack Time Constant 3 Register" group.long 0xE0++0x03 line.long 0x00 "GAINRELEASE_1,Release Time Constant 1 Register" group.long 0xE4++0x03 line.long 0x00 "GAINRELEASE_2,Release Time Constant 2 Register" group.long 0xE8++0x03 line.long 0x00 "GAINRELEASE_3,Release Time Constant 3 Register" group.long 0xEC++0x03 line.long 0x00 "FASTRELEASE_1,Fast Release Time Constant 1 Register" group.long 0xF0++0x03 line.long 0x00 "FASTRELEASE_2,Fast Release Time Constant 2 Register" group.long 0xF4++0x03 line.long 0x00 "FASTRELEASE_3,Fast Release Time Constant 3 Register" group.long 0xF8++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_1,AHUB RAM CTL MBDRC Control 1 Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" textline " " bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enabled" "Disabled,Enabled" bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" group.long 0xFC++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_2,AHUB RAM CTL MBDRC Control 2 Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" textline " " bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enabled" "Disabled,Enabled" bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" group.long 0x100++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_3,AHUB RAM CTL MBDRC Control 3 Register" rbitfld.long 0x00 31. " READ_BUSY ,Read busy" "Done,Busy" hexmask.long.byte 0x00 16.--23. 1. " SEQ_READ_COUNT ,Sequential read count" bitfld.long 0x00 14. " RW ,Read/write" "Read,Write" textline " " bitfld.long 0x00 13. " ADDR_INIT_EN ,Address initial enabled" "Disabled,Enabled" bitfld.long 0x00 12. " SEQ_ACCESS_EN ,Sequential access enabled" "Disabled,Enabled" hexmask.long.word 0x00 0.--8. 0x01 " RAM_ADDR ,RAM address" group.long 0x104++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_1,AHUB RAM CTL MBDRC Data 1 Register" group.long 0x108++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_2,AHUB RAM CTL MBDRC Data 2 Register" group.long 0x10C++0x03 line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_3,AHUB RAM CTL MBDRC Data 3 Register" width 0x0B tree.end tree.end tree "ADSP Peripheral" base ad:0x00C00000 width 13. group.long 0x100++0x0B line.long 0x00 "ICCICR,CPU Interface Control Register" line.long 0x04 "ICCPMR,Interrupt Priority Mask Register" line.long 0x08 "ICCBPR,Binary Point Register" rgroup.long 0x10C++0x03 line.long 0x00 "ICCIAR,Interrupt Acknowledge Register" group.long 0x110++0x03 line.long 0x00 "ICCEOIR,End Of Interrupt Register" rgroup.long 0x114++0x07 line.long 0x00 "ICCRPR,Running Priority Register" line.long 0x04 "ICCHPPIR,Highest Priority Pending Interrupt Register" group.long 0x11C++0x03 line.long 0x00 "ICCABPR,Aliased Binary Point Register" rgroup.long 0x1FC++0x03 line.long 0x00 "ICCIDR,CPU Interface Implementer Identification Register" group.long 0x1000++0x03 "DISTRIBUTOR" line.long 0x00 "ICDDCR,Distributor Control Register" rgroup.long 0x1004++0x07 line.long 0x00 "ICDICTR,Interrupt Controller Type Register" line.long 0x04 "ICDIIDR,Distributor Implementer Identification Register" group.long 0x1080++0x03 line.long 0x00 "ICDISR0,Interrupt Group 0 Register" group.long 0x1084++0x03 line.long 0x00 "ICDISR1,Interrupt Group 1 Register" group.long 0x1088++0x03 line.long 0x00 "ICDISR2,Interrupt Group 2 Register" group.long 0x108C++0x03 line.long 0x00 "ICDISR3,Interrupt Group 3 Register" group.long 0x1090++0x03 line.long 0x00 "ICDISR4,Interrupt Group 4 Register" group.long 0x1094++0x03 line.long 0x00 "ICDISR5,Interrupt Group 5 Register" group.long 0x1098++0x03 line.long 0x00 "ICDISR6,Interrupt Group 6 Register" group.long 0x109C++0x03 line.long 0x00 "ICDISR7,Interrupt Group 7 Register" group.long 0x1100++0x03 line.long 0x00 "ICDISER0,Interrupt Set-Enable 0 Register" group.long 0x1104++0x03 line.long 0x00 "ICDISER1,Interrupt Set-Enable 1 Register" group.long 0x1108++0x03 line.long 0x00 "ICDISER2,Interrupt Set-Enable 2 Register" group.long 0x110C++0x03 line.long 0x00 "ICDISER3,Interrupt Set-Enable 3 Register" group.long 0x1110++0x03 line.long 0x00 "ICDISER4,Interrupt Set-Enable 4 Register" group.long 0x1114++0x03 line.long 0x00 "ICDISER5,Interrupt Set-Enable 5 Register" group.long 0x1118++0x03 line.long 0x00 "ICDISER6,Interrupt Set-Enable 6 Register" group.long 0x111C++0x03 line.long 0x00 "ICDISER7,Interrupt Set-Enable 7 Register" group.long 0x1180++0x03 line.long 0x00 "ICDICER0,Interrupt Clear-Enable 0 Register" group.long 0x1184++0x03 line.long 0x00 "ICDICER1,Interrupt Clear-Enable 1 Register" group.long 0x1188++0x03 line.long 0x00 "ICDICER2,Interrupt Clear-Enable 2 Register" group.long 0x118C++0x03 line.long 0x00 "ICDICER3,Interrupt Clear-Enable 3 Register" group.long 0x1190++0x03 line.long 0x00 "ICDICER4,Interrupt Clear-Enable 4 Register" group.long 0x1194++0x03 line.long 0x00 "ICDICER5,Interrupt Clear-Enable 5 Register" group.long 0x1198++0x03 line.long 0x00 "ICDICER6,Interrupt Clear-Enable 6 Register" group.long 0x119C++0x03 line.long 0x00 "ICDICER7,Interrupt Clear-Enable 7 Register" group.long 0x1200++0x03 line.long 0x00 "ICDISPR0,Interrupt Set-Pending 0 Register" group.long 0x1204++0x03 line.long 0x00 "ICDISPR1,Interrupt Set-Pending 1 Register" group.long 0x1208++0x03 line.long 0x00 "ICDISPR2,Interrupt Set-Pending 2 Register" group.long 0x120C++0x03 line.long 0x00 "ICDISPR3,Interrupt Set-Pending 3 Register" group.long 0x1210++0x03 line.long 0x00 "ICDISPR4,Interrupt Set-Pending 4 Register" group.long 0x1214++0x03 line.long 0x00 "ICDISPR5,Interrupt Set-Pending 5 Register" group.long 0x1218++0x03 line.long 0x00 "ICDISPR6,Interrupt Set-Pending 6 Register" group.long 0x121C++0x03 line.long 0x00 "ICDISPR7,Interrupt Set-Pending 7 Register" group.long 0x1280++0x03 line.long 0x00 "ICDICPR0,Interrupt Clear-Pending 0 Register" group.long 0x1284++0x03 line.long 0x00 "ICDICPR1,Interrupt Clear-Pending 1 Register" group.long 0x1288++0x03 line.long 0x00 "ICDICPR2,Interrupt Clear-Pending 2 Register" group.long 0x128C++0x03 line.long 0x00 "ICDICPR3,Interrupt Clear-Pending 3 Register" group.long 0x1290++0x03 line.long 0x00 "ICDICPR4,Interrupt Clear-Pending 4 Register" group.long 0x1294++0x03 line.long 0x00 "ICDICPR5,Interrupt Clear-Pending 5 Register" group.long 0x1298++0x03 line.long 0x00 "ICDICPR6,Interrupt Clear-Pending 6 Register" group.long 0x129C++0x03 line.long 0x00 "ICDICPR7,Interrupt Clear-Pending 7 Register" group.long 0x1300++0x03 line.long 0x00 "ICDABR0,Interrupt Active Bit 0 Register" group.long 0x1304++0x03 line.long 0x00 "ICDABR1,Interrupt Active Bit 1 Register" group.long 0x1308++0x03 line.long 0x00 "ICDABR2,Interrupt Active Bit 2 Register" group.long 0x130C++0x03 line.long 0x00 "ICDABR3,Interrupt Active Bit 3 Register" group.long 0x1310++0x03 line.long 0x00 "ICDABR4,Interrupt Active Bit 4 Register" group.long 0x1314++0x03 line.long 0x00 "ICDABR5,Interrupt Active Bit 5 Register" group.long 0x1318++0x03 line.long 0x00 "ICDABR6,Interrupt Active Bit 6 Register" group.long 0x131C++0x03 line.long 0x00 "ICDABR7,Interrupt Active Bit 7 Register" group.long 0x1400++0x03 line.long 0x00 "ICDIPR0,Interrupt Priority 0 Register" group.long 0x1404++0x03 line.long 0x00 "ICDIPR1,Interrupt Priority 1 Register" group.long 0x1408++0x03 line.long 0x00 "ICDIPR2,Interrupt Priority 2 Register" group.long 0x140C++0x03 line.long 0x00 "ICDIPR3,Interrupt Priority 3 Register" group.long 0x1410++0x03 line.long 0x00 "ICDIPR4,Interrupt Priority 4 Register" group.long 0x1414++0x03 line.long 0x00 "ICDIPR5,Interrupt Priority 5 Register" group.long 0x1418++0x03 line.long 0x00 "ICDIPR6,Interrupt Priority 6 Register" group.long 0x141C++0x03 line.long 0x00 "ICDIPR7,Interrupt Priority 7 Register" group.long 0x1420++0x03 line.long 0x00 "ICDIPR8,Interrupt Priority 8 Register" group.long 0x1424++0x03 line.long 0x00 "ICDIPR9,Interrupt Priority 9 Register" group.long 0x1428++0x03 line.long 0x00 "ICDIPR10,Interrupt Priority 10 Register" group.long 0x142C++0x03 line.long 0x00 "ICDIPR11,Interrupt Priority 11 Register" group.long 0x1430++0x03 line.long 0x00 "ICDIPR12,Interrupt Priority 12 Register" group.long 0x1434++0x03 line.long 0x00 "ICDIPR13,Interrupt Priority 13 Register" group.long 0x1438++0x03 line.long 0x00 "ICDIPR14,Interrupt Priority 14 Register" group.long 0x143C++0x03 line.long 0x00 "ICDIPR15,Interrupt Priority 15 Register" group.long 0x1440++0x03 line.long 0x00 "ICDIPR16,Interrupt Priority 16 Register" group.long 0x1444++0x03 line.long 0x00 "ICDIPR17,Interrupt Priority 17 Register" group.long 0x1448++0x03 line.long 0x00 "ICDIPR18,Interrupt Priority 18 Register" group.long 0x144C++0x03 line.long 0x00 "ICDIPR19,Interrupt Priority 19 Register" group.long 0x1450++0x03 line.long 0x00 "ICDIPR20,Interrupt Priority 20 Register" group.long 0x1454++0x03 line.long 0x00 "ICDIPR21,Interrupt Priority 21 Register" group.long 0x1458++0x03 line.long 0x00 "ICDIPR22,Interrupt Priority 22 Register" group.long 0x145C++0x03 line.long 0x00 "ICDIPR23,Interrupt Priority 23 Register" group.long 0x1460++0x03 line.long 0x00 "ICDIPR24,Interrupt Priority 24 Register" group.long 0x1464++0x03 line.long 0x00 "ICDIPR25,Interrupt Priority 25 Register" group.long 0x1468++0x03 line.long 0x00 "ICDIPR26,Interrupt Priority 26 Register" group.long 0x146C++0x03 line.long 0x00 "ICDIPR27,Interrupt Priority 27 Register" group.long 0x1470++0x03 line.long 0x00 "ICDIPR28,Interrupt Priority 28 Register" group.long 0x1474++0x03 line.long 0x00 "ICDIPR29,Interrupt Priority 29 Register" group.long 0x1478++0x03 line.long 0x00 "ICDIPR30,Interrupt Priority 30 Register" group.long 0x147C++0x03 line.long 0x00 "ICDIPR31,Interrupt Priority 31 Register" group.long 0x1480++0x03 line.long 0x00 "ICDIPR32,Interrupt Priority 32 Register" group.long 0x1484++0x03 line.long 0x00 "ICDIPR33,Interrupt Priority 33 Register" group.long 0x1488++0x03 line.long 0x00 "ICDIPR34,Interrupt Priority 34 Register" group.long 0x148C++0x03 line.long 0x00 "ICDIPR35,Interrupt Priority 35 Register" group.long 0x1490++0x03 line.long 0x00 "ICDIPR36,Interrupt Priority 36 Register" group.long 0x1494++0x03 line.long 0x00 "ICDIPR37,Interrupt Priority 37 Register" group.long 0x1498++0x03 line.long 0x00 "ICDIPR38,Interrupt Priority 38 Register" group.long 0x149C++0x03 line.long 0x00 "ICDIPR39,Interrupt Priority 39 Register" group.long 0x14A0++0x03 line.long 0x00 "ICDIPR40,Interrupt Priority 40 Register" group.long 0x14A4++0x03 line.long 0x00 "ICDIPR41,Interrupt Priority 41 Register" group.long 0x14A8++0x03 line.long 0x00 "ICDIPR42,Interrupt Priority 42 Register" group.long 0x14AC++0x03 line.long 0x00 "ICDIPR43,Interrupt Priority 43 Register" group.long 0x14B0++0x03 line.long 0x00 "ICDIPR44,Interrupt Priority 44 Register" group.long 0x14B4++0x03 line.long 0x00 "ICDIPR45,Interrupt Priority 45 Register" group.long 0x14B8++0x03 line.long 0x00 "ICDIPR46,Interrupt Priority 46 Register" group.long 0x14BC++0x03 line.long 0x00 "ICDIPR47,Interrupt Priority 47 Register" group.long 0x14C0++0x03 line.long 0x00 "ICDIPR48,Interrupt Priority 48 Register" group.long 0x14C4++0x03 line.long 0x00 "ICDIPR49,Interrupt Priority 49 Register" group.long 0x14C8++0x03 line.long 0x00 "ICDIPR50,Interrupt Priority 50 Register" group.long 0x14CC++0x03 line.long 0x00 "ICDIPR51,Interrupt Priority 51 Register" group.long 0x14D0++0x03 line.long 0x00 "ICDIPR52,Interrupt Priority 52 Register" group.long 0x14D4++0x03 line.long 0x00 "ICDIPR53,Interrupt Priority 53 Register" group.long 0x14D8++0x03 line.long 0x00 "ICDIPR54,Interrupt Priority 54 Register" group.long 0x14DC++0x03 line.long 0x00 "ICDIPR55,Interrupt Priority 55 Register" group.long 0x14E0++0x03 line.long 0x00 "ICDIPR56,Interrupt Priority 56 Register" group.long 0x14E4++0x03 line.long 0x00 "ICDIPR57,Interrupt Priority 57 Register" group.long 0x14E8++0x03 line.long 0x00 "ICDIPR58,Interrupt Priority 58 Register" group.long 0x14EC++0x03 line.long 0x00 "ICDIPR59,Interrupt Priority 59 Register" group.long 0x14F0++0x03 line.long 0x00 "ICDIPR60,Interrupt Priority 60 Register" group.long 0x14F4++0x03 line.long 0x00 "ICDIPR61,Interrupt Priority 61 Register" group.long 0x14F8++0x03 line.long 0x00 "ICDIPR62,Interrupt Priority 62 Register" group.long 0x14FC++0x03 line.long 0x00 "ICDIPR63,Interrupt Priority 63 Register" rgroup.long 0x1800++0x03 line.long 0x00 "ICDIPTR0,Interrupt Processor Targets 0 Register" rgroup.long 0x1804++0x03 line.long 0x00 "ICDIPTR1,Interrupt Processor Targets 1 Register" rgroup.long 0x1808++0x03 line.long 0x00 "ICDIPTR2,Interrupt Processor Targets 2 Register" rgroup.long 0x180C++0x03 line.long 0x00 "ICDIPTR3,Interrupt Processor Targets 3 Register" rgroup.long 0x1810++0x03 line.long 0x00 "ICDIPTR4,Interrupt Processor Targets 4 Register" rgroup.long 0x1814++0x03 line.long 0x00 "ICDIPTR5,Interrupt Processor Targets 5 Register" rgroup.long 0x1818++0x03 line.long 0x00 "ICDIPTR6,Interrupt Processor Targets 6 Register" rgroup.long 0x181C++0x03 line.long 0x00 "ICDIPTR7,Interrupt Processor Targets 7 Register" rgroup.long 0x1820++0x03 line.long 0x00 "ICDIPTR8,Interrupt Processor Targets 8 Register" rgroup.long 0x1824++0x03 line.long 0x00 "ICDIPTR9,Interrupt Processor Targets 9 Register" rgroup.long 0x1828++0x03 line.long 0x00 "ICDIPTR10,Interrupt Processor Targets 10 Register" rgroup.long 0x182C++0x03 line.long 0x00 "ICDIPTR11,Interrupt Processor Targets 11 Register" rgroup.long 0x1830++0x03 line.long 0x00 "ICDIPTR12,Interrupt Processor Targets 12 Register" rgroup.long 0x1834++0x03 line.long 0x00 "ICDIPTR13,Interrupt Processor Targets 13 Register" rgroup.long 0x1838++0x03 line.long 0x00 "ICDIPTR14,Interrupt Processor Targets 14 Register" rgroup.long 0x183C++0x03 line.long 0x00 "ICDIPTR15,Interrupt Processor Targets 15 Register" rgroup.long 0x1840++0x03 line.long 0x00 "ICDIPTR16,Interrupt Processor Targets 16 Register" rgroup.long 0x1844++0x03 line.long 0x00 "ICDIPTR17,Interrupt Processor Targets 17 Register" rgroup.long 0x1848++0x03 line.long 0x00 "ICDIPTR18,Interrupt Processor Targets 18 Register" rgroup.long 0x184C++0x03 line.long 0x00 "ICDIPTR19,Interrupt Processor Targets 19 Register" rgroup.long 0x1850++0x03 line.long 0x00 "ICDIPTR20,Interrupt Processor Targets 20 Register" rgroup.long 0x1854++0x03 line.long 0x00 "ICDIPTR21,Interrupt Processor Targets 21 Register" rgroup.long 0x1858++0x03 line.long 0x00 "ICDIPTR22,Interrupt Processor Targets 22 Register" rgroup.long 0x185C++0x03 line.long 0x00 "ICDIPTR23,Interrupt Processor Targets 23 Register" rgroup.long 0x1860++0x03 line.long 0x00 "ICDIPTR24,Interrupt Processor Targets 24 Register" rgroup.long 0x1864++0x03 line.long 0x00 "ICDIPTR25,Interrupt Processor Targets 25 Register" rgroup.long 0x1868++0x03 line.long 0x00 "ICDIPTR26,Interrupt Processor Targets 26 Register" rgroup.long 0x186C++0x03 line.long 0x00 "ICDIPTR27,Interrupt Processor Targets 27 Register" rgroup.long 0x1870++0x03 line.long 0x00 "ICDIPTR28,Interrupt Processor Targets 28 Register" rgroup.long 0x1874++0x03 line.long 0x00 "ICDIPTR29,Interrupt Processor Targets 29 Register" rgroup.long 0x1878++0x03 line.long 0x00 "ICDIPTR30,Interrupt Processor Targets 30 Register" rgroup.long 0x187C++0x03 line.long 0x00 "ICDIPTR31,Interrupt Processor Targets 31 Register" rgroup.long 0x1880++0x03 line.long 0x00 "ICDIPTR32,Interrupt Processor Targets 32 Register" rgroup.long 0x1884++0x03 line.long 0x00 "ICDIPTR33,Interrupt Processor Targets 33 Register" rgroup.long 0x1888++0x03 line.long 0x00 "ICDIPTR34,Interrupt Processor Targets 34 Register" rgroup.long 0x188C++0x03 line.long 0x00 "ICDIPTR35,Interrupt Processor Targets 35 Register" rgroup.long 0x1890++0x03 line.long 0x00 "ICDIPTR36,Interrupt Processor Targets 36 Register" rgroup.long 0x1894++0x03 line.long 0x00 "ICDIPTR37,Interrupt Processor Targets 37 Register" rgroup.long 0x1898++0x03 line.long 0x00 "ICDIPTR38,Interrupt Processor Targets 38 Register" rgroup.long 0x189C++0x03 line.long 0x00 "ICDIPTR39,Interrupt Processor Targets 39 Register" rgroup.long 0x18A0++0x03 line.long 0x00 "ICDIPTR40,Interrupt Processor Targets 40 Register" rgroup.long 0x18A4++0x03 line.long 0x00 "ICDIPTR41,Interrupt Processor Targets 41 Register" rgroup.long 0x18A8++0x03 line.long 0x00 "ICDIPTR42,Interrupt Processor Targets 42 Register" rgroup.long 0x18AC++0x03 line.long 0x00 "ICDIPTR43,Interrupt Processor Targets 43 Register" rgroup.long 0x18B0++0x03 line.long 0x00 "ICDIPTR44,Interrupt Processor Targets 44 Register" rgroup.long 0x18B4++0x03 line.long 0x00 "ICDIPTR45,Interrupt Processor Targets 45 Register" rgroup.long 0x18B8++0x03 line.long 0x00 "ICDIPTR46,Interrupt Processor Targets 46 Register" rgroup.long 0x18BC++0x03 line.long 0x00 "ICDIPTR47,Interrupt Processor Targets 47 Register" rgroup.long 0x18C0++0x03 line.long 0x00 "ICDIPTR48,Interrupt Processor Targets 48 Register" rgroup.long 0x18C4++0x03 line.long 0x00 "ICDIPTR49,Interrupt Processor Targets 49 Register" rgroup.long 0x18C8++0x03 line.long 0x00 "ICDIPTR50,Interrupt Processor Targets 50 Register" rgroup.long 0x18CC++0x03 line.long 0x00 "ICDIPTR51,Interrupt Processor Targets 51 Register" rgroup.long 0x18D0++0x03 line.long 0x00 "ICDIPTR52,Interrupt Processor Targets 52 Register" rgroup.long 0x18D4++0x03 line.long 0x00 "ICDIPTR53,Interrupt Processor Targets 53 Register" rgroup.long 0x18D8++0x03 line.long 0x00 "ICDIPTR54,Interrupt Processor Targets 54 Register" rgroup.long 0x18DC++0x03 line.long 0x00 "ICDIPTR55,Interrupt Processor Targets 55 Register" rgroup.long 0x18E0++0x03 line.long 0x00 "ICDIPTR56,Interrupt Processor Targets 56 Register" rgroup.long 0x18E4++0x03 line.long 0x00 "ICDIPTR57,Interrupt Processor Targets 57 Register" rgroup.long 0x18E8++0x03 line.long 0x00 "ICDIPTR58,Interrupt Processor Targets 58 Register" rgroup.long 0x18EC++0x03 line.long 0x00 "ICDIPTR59,Interrupt Processor Targets 59 Register" rgroup.long 0x18F0++0x03 line.long 0x00 "ICDIPTR60,Interrupt Processor Targets 60 Register" rgroup.long 0x18F4++0x03 line.long 0x00 "ICDIPTR61,Interrupt Processor Targets 61 Register" rgroup.long 0x18F8++0x03 line.long 0x00 "ICDIPTR62,Interrupt Processor Targets 62 Register" rgroup.long 0x18FC++0x03 line.long 0x00 "ICDIPTR63,Interrupt Processor Targets 63 Register" rgroup.long 0x1C00++0x03 line.long 0x00 "ICDICFR0,Interrupt Configuration 0 Register" rgroup.long 0x1C04++0x03 line.long 0x00 "ICDICFR1,Interrupt Configuration 1 Register" rgroup.long 0x1C08++0x03 line.long 0x00 "ICDICFR2,Interrupt Configuration 2 Register" rgroup.long 0x1C0C++0x03 line.long 0x00 "ICDICFR3,Interrupt Configuration 3 Register" rgroup.long 0x1C10++0x03 line.long 0x00 "ICDICFR4,Interrupt Configuration 4 Register" rgroup.long 0x1C14++0x03 line.long 0x00 "ICDICFR5,Interrupt Configuration 5 Register" rgroup.long 0x1C18++0x03 line.long 0x00 "ICDICFR6,Interrupt Configuration 6 Register" rgroup.long 0x1C1C++0x03 line.long 0x00 "ICDICFR7,Interrupt Configuration 7 Register" rgroup.long 0x1C20++0x03 line.long 0x00 "ICDICFR8,Interrupt Configuration 8 Register" rgroup.long 0x1C24++0x03 line.long 0x00 "ICDICFR9,Interrupt Configuration 9 Register" rgroup.long 0x1C28++0x03 line.long 0x00 "ICDICFR10,Interrupt Configuration 10 Register" rgroup.long 0x1C2C++0x03 line.long 0x00 "ICDICFR11,Interrupt Configuration 11 Register" rgroup.long 0x1C30++0x03 line.long 0x00 "ICDICFR12,Interrupt Configuration 12 Register" rgroup.long 0x1C34++0x03 line.long 0x00 "ICDICFR13,Interrupt Configuration 13 Register" rgroup.long 0x1C38++0x03 line.long 0x00 "ICDICFR14,Interrupt Configuration 14 Register" rgroup.long 0x1C3C++0x03 line.long 0x00 "ICDICFR15,Interrupt Configuration 15 Register" rgroup.long 0x1D00++0x03 line.long 0x00 "ICPPISR,Private Peripheral Interrupt Status Register" rgroup.long 0x1D04++0x03 line.long 0x00 "ICSPISR0,Shared Peripheral Interrupt Status 0 Register" rgroup.long 0x1D08++0x03 line.long 0x00 "ICSPISR1,Shared Peripheral Interrupt Status 1 Register" rgroup.long 0x1D0C++0x03 line.long 0x00 "ICSPISR2,Shared Peripheral Interrupt Status 2 Register" rgroup.long 0x1D10++0x03 line.long 0x00 "ICSPISR3,Shared Peripheral Interrupt Status 3 Register" rgroup.long 0x1D14++0x03 line.long 0x00 "ICSPISR4,Shared Peripheral Interrupt Status 4 Register" rgroup.long 0x1D18++0x03 line.long 0x00 "ICSPISR5,Shared Peripheral Interrupt Status 5 Register" rgroup.long 0x1D1C++0x03 line.long 0x00 "ICSPISR6,Shared Peripheral Interrupt Status 6 Register" group.long 0x1F00++0x03 line.long 0x00 "ICDSGIR,Software Generated Interrupt Register" rgroup.long 0x1FD0++0x1F line.long 0x00 "ICPIDR0,Peripheral ID4 Register" line.long 0x04 "ICPIDR1,Peripheral ID5 Register" line.long 0x08 "ICPIDR2,Peripheral ID6 Register" line.long 0x0C "ICPIDR3,Peripheral ID7 Register" line.long 0x10 "ICPIDR4,Peripheral ID0 Register" line.long 0x14 "ICPIDR5,Peripheral ID1 Register" line.long 0x18 "ICPIDR6,Peripheral ID2 Register" line.long 0x1C "ICPIDR7,Peripheral ID3 Register" rgroup.long 0x1FF0++0x03 line.long 0x00 "ICCIDR0_0,Component ID0 Register" rgroup.long 0x1FF4++0x03 line.long 0x00 "ICCIDR0_1,Component ID1 Register" rgroup.long 0x1FF8++0x03 line.long 0x00 "ICCIDR0_2,Component ID2 Register" rgroup.long 0x1FFC++0x03 line.long 0x00 "ICCIDR0_3,Component ID3 Register" width 0x0B tree.end tree "Audio Miscellaneous" base ad:0x702EC000 width 39. group.long 0x00++0x13 line.long 0x00 "CONFIG,CONFIG Register" bitfld.long 0x00 31. " DISABLE_ERROR_RESPONSE ,Disable error on AXI bus on an invalid access" "No,Yes" line.long 0x04 "ADSP_CONFIG,ADSP CONFIG Register" bitfld.long 0x04 29.--31. " MAXCLKLATENCY ,Max clock latency" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23.--26. " CLUSTERID ,Cluster ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 21. " VINITHI ,VINITHI" "0,1" textline " " bitfld.long 0x04 20. " CFGSDISABLE ,CFGS disable" "No,Yes" bitfld.long 0x04 19. " CP15SDISABLE ,CP15S disable" "No,Yes" bitfld.long 0x04 18. " EVENTI ,EVENTI" "0,1" line.long 0x08 "ADSP_PERIPHBASE,ADSP PERIPHBASE Register" hexmask.long.tbyte 0x08 13.--31. 1. " PERIPHBASE ,PERIPHBASE" line.long 0x0C "ADSP_L2_CONFIG,ADSP L2 Config Register" bitfld.long 0x0C 25.--30. " CACHEID ,Cache ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "ADSP_L2_REGFILEBASE,ADSP L2 REGFILEBASE Register" hexmask.long.tbyte 0x10 12.--31. 1. " REGFILEBASE ,REGFILEBASE" rgroup.long 0x14++0x03 line.long 0x00 "ADSP_STATUS,ADSP STATUS Register" bitfld.long 0x00 31. " L2_IDLE ,L2 idle" "False,True" bitfld.long 0x00 30. " L2_CLKSTOPPED ,L2 clock stopped" "False,True" bitfld.long 0x00 29. " DBGNOPWRDWN ,DBGNOPWRDWN" "0,1" group.long 0x18++0x03 line.long 0x00 "ADSP_AGIC_CONFIG,ADSP AGIC CONFIG Register" bitfld.long 0x00 31. " CFGSDISABLE ,CFGS disable" "No,Yes" sif cpuis("TEGRAX2") bitfld.long 0x00 24.--28. " NS_ENABLE ,NS enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. " GICD_MASK ,GICD mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif sif cpuis("TEGRAX2") group.long 0x1C++0x03 line.long 0x00 "CONFIG_LOCK,CONFIG LOCK Register" bitfld.long 0x00 31. " ADSP ,ADSP" "0,1" rgroup.long 0x4C++0x07 line.long 0x00 "TSC_LOW,TSC Low Register" line.long 0x04 "TSC_HIGH,TSC High Register" hexmask.long.tbyte 0x04 0.--23. 1. " TIMESTAMP ,Timestamp" group.long 0x54++0x07 line.long 0x00 "IDLE,Idle Register" bitfld.long 0x00 31. " IDLE_EN ,Idle enable" "Disabled,Enabled" line.long 0x04 "ACTMON,ACTMON Register" bitfld.long 0x04 31. " CNT_ENABLE ,CNT enable" "Disabled,Enabled" hexmask.long.byte 0x04 23.--30. 1. " CNT_TARGET ,CNT target" rgroup.long 0x60++0x0F line.long 0x00 "MC_STATS_READ,MC STATS READ (Acast) Register" line.long 0x04 "MC_STATS_READ_1,MC STATS READ (Adast) Register" line.long 0x08 "MC_STATS_WRITE,MC STATS WRITE (Acast) Register" line.long 0x0C "MC_STATS_WRITE_1,MC STATS WRITE (Adast) Register" group.long 0x70++0x07 line.long 0x00 "MC_STATS_CLEAR,MC STATS CLEAR Register" bitfld.long 0x00 1. " CLEAR_WRITE_COUNT ,Clear write count" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEAR_READ_COUNT ,Clear read count" "Not cleared,Cleared" line.long 0x04 "MC_STATS_CLEAR,MC STATS CLEAR Register" bitfld.long 0x04 1. " CLEAR_WRITE_COUNT ,Clear write count" "Not cleared,Cleared" bitfld.long 0x04 0. " CLEAR_READ_COUNT ,Clear read count" "Not cleared,Cleared" group.long 0x7C++0x03 line.long 0x00 "KEYSLOT_NS,KEYSLOT NS Register" bitfld.long 0x00 0.--3. " DISABLE ,Disable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x80++0x03 line.long 0x00 "KEYSLOT_KEY0_0,KEYSLOT KEY0 0 Register" group.long 0x84++0x03 line.long 0x00 "KEYSLOT_KEY0_1,KEYSLOT KEY0 1 Register" group.long 0x88++0x03 line.long 0x00 "KEYSLOT_KEY0_2,KEYSLOT KEY0 2 Register" group.long 0x8C++0x03 line.long 0x00 "KEYSLOT_KEY0_3,KEYSLOT KEY0 3 Register" group.long 0x90++0x03 line.long 0x00 "KEYSLOT_KEY1_0,KEYSLOT KEY1 0 Register" group.long 0x94++0x03 line.long 0x00 "KEYSLOT_KEY1_1,KEYSLOT KEY1 1 Register" group.long 0x98++0x03 line.long 0x00 "KEYSLOT_KEY1_2,KEYSLOT KEY1 2 Register" group.long 0x9C++0x03 line.long 0x00 "KEYSLOT_KEY1_3,KEYSLOT KEY1 3 Register" group.long 0xA0++0x03 line.long 0x00 "KEYSLOT_KEY2_0,KEYSLOT KEY2 0 Register" group.long 0xA4++0x03 line.long 0x00 "KEYSLOT_KEY2_1,KEYSLOT KEY2 1 Register" group.long 0xA8++0x03 line.long 0x00 "KEYSLOT_KEY2_2,KEYSLOT KEY2 2 Register" group.long 0xAC++0x03 line.long 0x00 "KEYSLOT_KEY2_3,KEYSLOT KEY2 3 Register" group.long 0xB0++0x03 line.long 0x00 "KEYSLOT_KEY3_0,KEYSLOT KEY3 0 Register" group.long 0xB4++0x03 line.long 0x00 "KEYSLOT_KEY3_1,KEYSLOT KEY3 1 Register" group.long 0xB8++0x03 line.long 0x00 "KEYSLOT_KEY3_2,KEYSLOT KEY3 2 Register" group.long 0xBC++0x03 line.long 0x00 "KEYSLOT_KEY3_3,KEYSLOT KEY3 3 Register" group.long 0xC0++0x0F line.long 0x00 "APE_TSC_CTRL,APE TSC CTRL Register" hexmask.long.word 0x00 16.--31. 1. " N_MODULO ,Modulo value after which fractional value will be added to integer value" hexmask.long.word 0x00 0.--15. 1. " N_FRACT ,Fractional value of the timestamp counter" line.long 0x04 "APE_TSC_CTRL_1,APE TSC CTRL 1 Register" hexmask.long.word 0x04 0.--15. 1. " N_INT ,Integer value to increment for every clock" line.long 0x08 "APE_TSC_CTRL_2,APE TSC CTRL 2 Register" line.long 0x0C "APE_TSC_CTRL_3,APE TSC CTRL 3 Register" bitfld.long 0x0C 31. " ENABLE ,Enable signals for clock synchronization" "Disabled,Enabled" bitfld.long 0x0C 2. " COPY ,Copy value of EAVB timestamps to APE timestamps" "Not copy,Copy" bitfld.long 0x0C 1. " RST ,Resets the APE time stamping counter logic" "No reset,Reset" textline " " bitfld.long 0x0C 0. " TRIGGER ,When written 1 to this field will trigger the snapshot capture for both EAVB/APE timestamps" "Not triggered,Triggered" rgroup.long 0xD0++0x17 line.long 0x00 "APE_RT_TSC_NS,APE RT TSC NS Register" line.long 0x04 "APE_RT_TSC_SEC,APE RT TSC SEC Register" line.long 0x08 "APE_SNAP_TSC_NS,APE SNAP TSC NS Register" line.long 0x0C "APE_SNAP_TSC_SEC,APE SNAP TSC SEC Register" line.long 0x10 "EAVB_SNAP_TSC_NS,EAVB SNAP TSC NS Register" line.long 0x14 "EAVB_SNAP_TSC_SEC,EAVB SNAP TSC SEC Register" group.long 0xE8++0x0B line.long 0x00 "SPARE,SPARE Register" line.long 0x04 "ACONNECT_CLOCK_GATING_DISABLE,ACONNECT Clock Gating Disable Register" bitfld.long 0x04 31. " APE_GATING_DISABLE ,APE gating disable" "No,Yes" bitfld.long 0x04 30. " ADMA_GATING_DISABLE ,ADMA gating disable" "No,Yes" bitfld.long 0x04 29. " ADSP_GATING_DISABLE ,ADSP gating disable" "No,Yes" textline " " bitfld.long 0x04 28. " AHUB_GATING_DISABLE ,AHUB gating disable" "No,Yes" bitfld.long 0x04 27. " APBP_GATING_DISABLE ,APBP gating disable" "No,Yes" line.long 0x08 "APE_SLCG_OVERRIDE,APE SLCG Override Register" bitfld.long 0x08 0. " APE_CLK_OVR_ON ,APE clock override enable" "Disabled,Enabled" group.long 0x100++0x03 line.long 0x00 "ACTMON_INPUT_CONFIG_0,ACTMON INPUT CONFIG 0 Register" bitfld.long 0x00 0.--2. " INPUT_SEL ,Input select" "ADSP active,ADSP MEM stall,AST active,ADSP PMU event,ADSP PMU even 1,OUTSTANDING req threshold,?..." group.long 0x104++0x03 line.long 0x00 "ACTMON_INPUT_CONFIG_1,ACTMON INPUT CONFIG 1 Register" bitfld.long 0x00 0.--2. " INPUT_SEL ,Input select" "ADSP active,ADSP MEM stall,AST active,ADSP PMU event,ADSP PMU even 1,OUTSTANDING req threshold,?..." group.long 0x108++0x03 line.long 0x00 "ACTMON_INPUT_CONFIG_2,ACTMON INPUT CONFIG 2 Register" bitfld.long 0x00 0.--2. " INPUT_SEL ,Input select" "ADSP active,ADSP MEM stall,AST active,ADSP PMU event,ADSP PMU even 1,OUTSTANDING req threshold,?..." group.long 0x10C++0x03 line.long 0x00 "ACTMON_MEM_ACTIVITY_0,ACTMON MEM ACTIVITY_0 Register" bitfld.long 0x00 8. " MEM_ACT_MODE ,MEM ACT mode" "Request count,Transfer count" bitfld.long 0x00 3. " ADAST_WR_ACT_EN ,ADAST WR ACT " "Disabled,Enabled" bitfld.long 0x00 2. " ADAST_RD_ACT_EN ,ADAST read ACT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ACAST_WR_ACT_EN ,ACAST WR ACT enable" "Disabled,Enabled" bitfld.long 0x00 0. " ACAST_RD_ACT_EN ,ACAST read ACT enable" "Disabled,Enabled" group.long 0x110++0x03 line.long 0x00 "ACTMON_MEM_ACTIVITY_1,ACTMON MEM ACTIVITY_1 Register" bitfld.long 0x00 8. " MEM_ACT_MODE ,MEM ACT mode" "Request count,Transfer count" bitfld.long 0x00 3. " ADAST_WR_ACT_EN ,ADAST WR ACT " "Disabled,Enabled" bitfld.long 0x00 2. " ADAST_RD_ACT_EN ,ADAST read ACT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ACAST_WR_ACT_EN ,ACAST WR ACT enable" "Disabled,Enabled" bitfld.long 0x00 0. " ACAST_RD_ACT_EN ,ACAST read ACT enable" "Disabled,Enabled" group.long 0x114++0x03 line.long 0x00 "ACTMON_MEM_ACTIVITY_2,ACTMON MEM ACTIVITY_2 Register" bitfld.long 0x00 8. " MEM_ACT_MODE ,MEM ACT mode" "Request count,Transfer count" bitfld.long 0x00 3. " ADAST_WR_ACT_EN ,ADAST WR ACT " "Disabled,Enabled" bitfld.long 0x00 2. " ADAST_RD_ACT_EN ,ADAST read ACT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ACAST_WR_ACT_EN ,ACAST WR ACT enable" "Disabled,Enabled" bitfld.long 0x00 0. " ACAST_RD_ACT_EN ,ACAST read ACT enable" "Disabled,Enabled" group.long 0x118++0x03 line.long 0x00 "ACTMON_ADSP_PMU_0,ACTMON ADSP PMU 0 Register" bitfld.long 0x00 0.--1. " ADSP_STALL_SEL ,ADSP stall select" "Disabled,INSTR stall,Data stall,INSTR data stall" group.long 0x11C++0x03 line.long 0x00 "ACTMON_ADSP_PMU_1,ACTMON ADSP PMU 1 Register" bitfld.long 0x00 0.--1. " ADSP_STALL_SEL ,ADSP stall select" "Disabled,INSTR stall,Data stall,INSTR data stall" group.long 0x120++0x03 line.long 0x00 "ACTMON_ADSP_PMU_2,ACTMON ADSP PMU 2 Register" bitfld.long 0x00 0.--1. " ADSP_STALL_SEL ,ADSP stall select" "Disabled,INSTR stall,Data stall,INSTR data stall" group.long 0x124++0x03 line.long 0x00 "ACTMON_REQ_THRSHOLD_0,ACTMON Required Threshold 0 Register" bitfld.long 0x00 11. " REQ_THRSHLD_ADAST_RD_EN ,Required threshold ADAST read enable" "Disabled,Enabled" bitfld.long 0x00 10. " REQ_THRSHLD_ADAST_WR_EN ,Required threshold ADAST write enable" "Disabled,Enabled" bitfld.long 0x00 9. " REQ_THRSHLD_ACAST_WR_EN ,Required threshold ACAST write enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " REQ_THRSHLD_ACAST_RD_EN ,Required threshold ACAST read enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " REQ_THRSHLD_LEVEL ,Required threshold level" group.long 0x128++0x03 line.long 0x00 "ACTMON_REQ_THRSHOLD_1,ACTMON Required Threshold 1 Register" bitfld.long 0x00 11. " REQ_THRSHLD_ADAST_RD_EN ,Required threshold ADAST read enable" "Disabled,Enabled" bitfld.long 0x00 10. " REQ_THRSHLD_ADAST_WR_EN ,Required threshold ADAST write enable" "Disabled,Enabled" bitfld.long 0x00 9. " REQ_THRSHLD_ACAST_WR_EN ,Required threshold ACAST write enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " REQ_THRSHLD_ACAST_RD_EN ,Required threshold ACAST read enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " REQ_THRSHLD_LEVEL ,Required threshold level" group.long 0x12C++0x03 line.long 0x00 "ACTMON_REQ_THRSHOLD_2,ACTMON Required Threshold 2 Register" bitfld.long 0x00 11. " REQ_THRSHLD_ADAST_RD_EN ,Required threshold ADAST read enable" "Disabled,Enabled" bitfld.long 0x00 10. " REQ_THRSHLD_ADAST_WR_EN ,Required threshold ADAST write enable" "Disabled,Enabled" bitfld.long 0x00 9. " REQ_THRSHLD_ACAST_WR_EN ,Required threshold ACAST write enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " REQ_THRSHLD_ACAST_RD_EN ,Required threshold ACAST read enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " REQ_THRSHLD_LEVEL ,Required threshold level" group.long 0x130++0x03 line.long 0x00 "ACTMON_MEM_ACTIVITY_PULSE_N_0,ACTMON MEM ACTIVITY Pulse N 0 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PULSE_N ,PULSE N" group.long 0x134++0x03 line.long 0x00 "ACTMON_MEM_ACTIVITY_PULSE_N_1,ACTMON MEM ACTIVITY Pulse N 1 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PULSE_N ,PULSE N" group.long 0x138++0x03 line.long 0x00 "ACTMON_MEM_ACTIVITY_PULSE_N_2,ACTMON MEM ACTIVITY Pulse N 2 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PULSE_N ,PULSE N" group.long 0x13C++0x03 line.long 0x00 "ACTMON_COMMON_ADSP_PULSE_N_0,ACTMON Common ADSP Pulse N 0 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " PULSE_N ,PULSE N" group.long 0x140++0x03 line.long 0x00 "ACTMON_COMMON_ADSP_PULSE_N_1,ACTMON Common ADSP Pulse N 1 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " PULSE_N ,PULSE N" group.long 0x144++0x03 line.long 0x00 "ACTMON_COMMON_ADSP_PULSE_N_2,ACTMON Common ADSP Pulse N 2 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " PULSE_N ,PULSE N" group.long 0x140++0x03 line.long 0x00 "ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0,ACTMON Common Required Threshold Pulse N 0 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PULSE_N ,PULSE N" group.long 0x144++0x03 line.long 0x00 "ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_1,ACTMON Common Required Threshold Pulse N 1 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PULSE_N ,PULSE N" group.long 0x148++0x03 line.long 0x00 "ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_2,ACTMON Common Required Threshold Pulse N 2 Register" bitfld.long 0x00 8. " ENABLE ,Enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 1. " PULSE_N ,PULSE N" else group.long 0x1C++0x03 line.long 0x00 "SHRD_SMP_STA,SHRD_SMP_STA Register" setclrfld.long 0x00 7. 0x04 7. 0x04 7. " SHRD_SMP_STA ,Shared semaphore status" "0,1" setclrfld.long 0x00 6. 0x04 6. 0x04 6. " SHRD_SMP_STA ,Shared semaphore status" "0,1" setclrfld.long 0x00 5. 0x04 5. 0x04 5. " SHRD_SMP_STA ,Shared semaphore status" "0,1" textline " " setclrfld.long 0x00 4. 0x04 4. 0x04 4. " SHRD_SMP_STA ,Shared semaphore status" "0,1" setclrfld.long 0x00 3. 0x04 3. 0x04 3. " SHRD_SMP_STA ,Shared semaphore status" "0,1" setclrfld.long 0x00 2. 0x04 2. 0x04 2. " SHRD_SMP_STA ,Shared semaphore status" "0,1" textline " " setclrfld.long 0x00 1. 0x04 1. 0x04 1. " SHRD_SMP_STA ,Shared semaphore status" "0,1" setclrfld.long 0x00 0. 0x04 0. 0x04 0. " SHRD_SMP_STA ,Shared semaphore status" "0,1" textline " " rgroup.long 0x28++0x03 line.long 0x00 "CPU_ARBGNT_STATUS,Semaphore Granted Status Register" bitfld.long 0x00 7. " ARBGNT_STATUS[7] ,Granted status semaphore bit [7]" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Granted status semaphore bit [6]" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Granted status semaphore bit [5]" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Granted status semaphore bit [4]" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Granted status semaphore bit [3]" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Granted status semaphore bit [2]" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Granted status semaphore bit [1]" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Granted status semaphore bit [0]" "Disabled,Enabled" group.long 0x2C++0x07 line.long 0x00 "CPU_ARBGNT_GET,Request Arbitration Semaphore Register" bitfld.long 0x00 7. " ARBGNT_GET[7] ,Request semaphore bit [7]" "Not requested,Requested" bitfld.long 0x00 6. " [6] ,Request semaphore bit [6]" "Not requested,Requested" bitfld.long 0x00 5. " [5] ,Request semaphore bit [5]" "Not requested,Requested" bitfld.long 0x00 4. " [4] ,Request semaphore bit [4]" "Not requested,Requested" textline " " bitfld.long 0x00 3. " [3] ,Request semaphore bit [3]" "Not requested,Requested" bitfld.long 0x00 2. " [2] ,Request semaphore bit [2]" "Not requested,Requested" bitfld.long 0x00 1. " [1] ,Request semaphore bit [1]" "Not requested,Requested" bitfld.long 0x00 0. " [0] ,Request semaphore bit [0]" "Not requested,Requested" line.long 0x04 "CPU_ARBGNT_PUT,Arbitration Semaphore Put Request Register" bitfld.long 0x04 7. " ARBGNT_PUT[7] ,Clear the corresponding semaphore bit [7]" "Not cleared,Cleared" bitfld.long 0x04 6. " [6] ,Clear the corresponding semaphore bit [6]" "Not cleared,Cleared" bitfld.long 0x04 5. " [5] ,Clear the corresponding semaphore bit [5]" "Not cleared,Cleared" bitfld.long 0x04 4. " [4] ,Clear the corresponding semaphore bit [4]" "Not cleared,Cleared" textline " " bitfld.long 0x04 3. " [3] ,Clear the corresponding semaphore bit [3]" "Not cleared,Cleared" bitfld.long 0x04 2. " [2] ,Clear the corresponding semaphore bit [2]" "Not cleared,Cleared" bitfld.long 0x04 1. " [1] ,Clear the corresponding semaphore bit [1]" "Not cleared,Cleared" bitfld.long 0x04 0. " [0] ,Clear the corresponding semaphore bit [0]" "Not cleared,Cleared" rgroup.long 0x34++0x03 line.long 0x00 "ADSP_ARBGNT_STATUS,Semaphore Granted Status Register" bitfld.long 0x00 7. " ARBGNT_STATUS[7] ,Granted status semaphore bit [7]" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Granted status semaphore bit [6]" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Granted status semaphore bit [5]" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Granted status semaphore bit [4]" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Granted status semaphore bit [3]" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Granted status semaphore bit [2]" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Granted status semaphore bit [1]" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Granted status semaphore bit [0]" "Disabled,Enabled" group.long 0x38++0x07 line.long 0x00 "ADSP_ARBGNT_GET,Request Arbitration Semaphore Register" bitfld.long 0x00 7. " ARBGNT_GET[7] ,Request semaphore bit [7]" "Not requested,Requested" bitfld.long 0x00 6. " [6] ,Request semaphore bit [6]" "Not requested,Requested" bitfld.long 0x00 5. " [5] ,Request semaphore bit [5]" "Not requested,Requested" bitfld.long 0x00 4. " [4] ,Request semaphore bit [4]" "Not requested,Requested" textline " " bitfld.long 0x00 3. " [3] ,Request semaphore bit [3]" "Not requested,Requested" bitfld.long 0x00 2. " [2] ,Request semaphore bit [2]" "Not requested,Requested" bitfld.long 0x00 1. " [1] ,Request semaphore bit [1]" "Not requested,Requested" bitfld.long 0x00 0. " [0] ,Request semaphore bit [0]" "Not requested,Requested" line.long 0x04 "ADSP_ARBGNT_PUT,Arbitration Semaphore Put Request Register" bitfld.long 0x04 7. " ARBGNT_PUT[7] ,Clear the corresponding semaphore bit [7]" "Not cleared,Cleared" bitfld.long 0x04 6. " [6] ,Clear the corresponding semaphore bit [6]" "Not cleared,Cleared" bitfld.long 0x04 5. " [5] ,Clear the corresponding semaphore bit [5]" "Not cleared,Cleared" bitfld.long 0x04 4. " [4] ,Clear the corresponding semaphore bit [4]" "Not cleared,Cleared" textline " " bitfld.long 0x04 3. " [3] ,Clear the corresponding semaphore bit [3]" "Not cleared,Cleared" bitfld.long 0x04 2. " [2] ,Clear the corresponding semaphore bit [2]" "Not cleared,Cleared" bitfld.long 0x04 1. " [1] ,Clear the corresponding semaphore bit [1]" "Not cleared,Cleared" bitfld.long 0x04 0. " [0] ,Clear the corresponding semaphore bit [0]" "Not cleared,Cleared" rgroup.long 0x40++0x0F line.long 0x00 "ADSP_ARBGNT_REQ_STATUS,Arbitration Request Pending Status Register" bitfld.long 0x00 7. " REQ_STATUS[7] ,Request pending status from the ADSP_ARBGNT_GET register for bit [7]" "Not pending,Pending" bitfld.long 0x00 6. " [6] ,Request pending status from the ADSP_ARBGNT_GET register for bit [6]" "Not pending,Pending" bitfld.long 0x00 5. " [5] ,Request pending status from the ADSP_ARBGNT_GET register for bit [5]" "Not pending,Pending" bitfld.long 0x00 4. " [4] ,Request pending status from the ADSP_ARBGNT_GET register for bit [4]" "Not pending,Pending" textline " " bitfld.long 0x00 3. " [3] ,Request pending status from the ADSP_ARBGNT_GET register for bit [3]" "Not pending,Pending" bitfld.long 0x00 2. " [2] ,Request pending status from the ADSP_ARBGNT_GET register for bit [2]" "Not pending,Pending" bitfld.long 0x00 1. " [1] ,Request pending status from the ADSP_ARBGNT_GET register for bit [1]" "Not pending,Pending" bitfld.long 0x00 0. " [0] ,Request pending status from the ADSP_ARBGNT_GET register for bit [0]" "Not pending,Pending" line.long 0x04 "CPU_ARBGNT_REQ_STATUS,Arbitration Request Pending Status Register" bitfld.long 0x04 7. " REQ_STATUS[7] ,Request pending status from the CPU_ARBGNT_GET register for bit [7]" "Not pending,Pending" bitfld.long 0x04 6. " [6] ,Request pending status from the CPU_ARBGNT_GET register for bit [6]" "Not pending,Pending" bitfld.long 0x04 5. " [5] ,Request pending status from the CPU_ARBGNT_GET register for bit [5]" "Not pending,Pending" bitfld.long 0x04 4. " [4] ,Request pending status from the CPU_ARBGNT_GET register for bit [4]" "Not pending,Pending" textline " " bitfld.long 0x04 3. " [3] ,Request pending status from the CPU_ARBGNT_GET register for bit [3]" "Not pending,Pending" bitfld.long 0x04 2. " [2] ,Request pending status from the CPU_ARBGNT_GET register for bit [2]" "Not pending,Pending" bitfld.long 0x04 1. " [1] ,Request pending status from the CPU_ARBGNT_GET register for bit [1]" "Not pending,Pending" bitfld.long 0x04 0. " [0] ,Request pending status from the CPU_ARBGNT_GET register for bit [0]" "Not pending,Pending" line.long 0x08 "TSC,TSC Register" line.long 0x0C "DEBUG,DEBUG Register" bitfld.long 0x0C 31. " TSC_SET ,Read 32 bits (Upper/lower) form TSC register" "Upper,Lower" group.long 0x50++0x07 line.long 0x00 "IDLE,IDLE Register" bitfld.long 0x00 31. " IDLE_EN ,Idle enable" "Disabled,Enabled" line.long 0x04 "ACTMON,ACTMON Register" bitfld.long 0x04 31. " CNT_ENABLE ,Enable the ADSP side counter" "Disabled,Enabled" hexmask.long.byte 0x04 23.--30. 1. " CNT_TARGET ,Count target minus 1 before signal to the ACTMON" group.long 0x58++0x03 line.long 0x00 "SHRD_MBOX_0,SHRD_MBOX Register 0" bitfld.long 0x00 31. " TAG ,Tag" "0,1" hexmask.long 0x00 0.--30. 1. " DATA ,Data" group.long 0x5C++0x03 line.long 0x00 "SHRD_MBOX_1,SHRD_MBOX Register 1" bitfld.long 0x00 31. " TAG ,Tag" "0,1" hexmask.long 0x00 0.--30. 1. " DATA ,Data" group.long 0x60++0x03 line.long 0x00 "SHRD_MBOX_2,SHRD_MBOX Register 2" bitfld.long 0x00 31. " TAG ,Tag" "0,1" hexmask.long 0x00 0.--30. 1. " DATA ,Data" group.long 0x64++0x03 line.long 0x00 "SHRD_MBOX_3,SHRD_MBOX Register 3" bitfld.long 0x00 31. " TAG ,Tag" "0,1" hexmask.long 0x00 0.--30. 1. " DATA ,Data" group.long 0x68++0x03 line.long 0x00 "SPARE,SPARE Register" endif width 0x0B tree.end tree.end tree "Display Controller" tree "Display Controller Registers" base ad:0x54200000 width 29. tree "Display CMD Registers" group.long 0x00++0x0B line.long 0x00 "GENERAL_INCR_SYNCPT_0,GENERAL_INCR_SYNCPT_0" hexmask.long.byte 0x00 8.--15. 1. " GENERAL_COND ,Condition mapped from raise/wait" hexmask.long.byte 0x00 0.--7. 1. " GENERAL_INDX ,Syncpt index value" line.long 0x04 "GENERAL_INCR_SYNCPT_CNTRL_0,GENERAL_INCR_SYNCPT_CNTRL_0" bitfld.long 0x04 8. " GENERAL_INCR_SYNCPT_NO_STALL ,GENERAL_INCR_SYNCPT_NO_STALL" "Disabled,Enabled" bitfld.long 0x04 0. " GENERAL_INCR_SYNCPT_SOFT_RESET ,GENERAL_INCR_SYNCPT_SOFT_RESET" "No reset,Reset" line.long 0x08 "GENERAL_INCR_SYNCPT_ERROR_0,GENERAL_INCR_SYNCPT_ERROR_0" eventfld.long 0x08 31. " COND_STATUS[31] ,FIFO overflow for COND[31]" "No overflow,Overflow" eventfld.long 0x08 30. " [30] ,FIFO overflow for COND[30]" "No overflow,Overflow" textline " " eventfld.long 0x08 29. " [29] ,FIFO overflow for COND[29]" "No overflow,Overflow" eventfld.long 0x08 28. " [28] ,FIFO overflow for COND[28]" "No overflow,Overflow" textline " " eventfld.long 0x08 27. " [27] ,FIFO overflow for COND[27]" "No overflow,Overflow" eventfld.long 0x08 26. " [26] ,FIFO overflow for COND[26]" "No overflow,Overflow" textline " " eventfld.long 0x08 25. " [25] ,FIFO overflow for COND[25]" "No overflow,Overflow" eventfld.long 0x08 24. " [24] ,FIFO overflow for COND[24]" "No overflow,Overflow" textline " " eventfld.long 0x08 23. " [23] ,FIFO overflow for COND[23]" "No overflow,Overflow" eventfld.long 0x08 22. " [22] ,FIFO overflow for COND[22]" "No overflow,Overflow" textline " " eventfld.long 0x08 21. " [21] ,FIFO overflow for COND[21]" "No overflow,Overflow" eventfld.long 0x08 20. " [20] ,FIFO overflow for COND[20]" "No overflow,Overflow" textline " " eventfld.long 0x08 19. " [19] ,FIFO overflow for COND[19]" "No overflow,Overflow" eventfld.long 0x08 18. " [18] ,FIFO overflow for COND[18]" "No overflow,Overflow" textline " " eventfld.long 0x08 17. " [17] ,FIFO overflow for COND[17]" "No overflow,Overflow" eventfld.long 0x08 16. " [16] ,FIFO overflow for COND[16]" "No overflow,Overflow" textline " " eventfld.long 0x08 15. " [15] ,FIFO overflow for COND[15]" "No overflow,Overflow" eventfld.long 0x08 14. " [14] ,FIFO overflow for COND[14]" "No overflow,Overflow" textline " " eventfld.long 0x08 13. " [13] ,FIFO overflow for COND[13]" "No overflow,Overflow" eventfld.long 0x08 12. " [12] ,FIFO overflow for COND[12]" "No overflow,Overflow" textline " " eventfld.long 0x08 11. " [11] ,FIFO overflow for COND[11]" "No overflow,Overflow" eventfld.long 0x08 10. " [10] ,FIFO overflow for COND[10]" "No overflow,Overflow" textline " " eventfld.long 0x08 9. " [9] ,FIFO overflow for COND[9]" "No overflow,Overflow" eventfld.long 0x08 8. " [8] ,FIFO overflow for COND[8]" "No overflow,Overflow" textline " " eventfld.long 0x08 7. " [7] ,FIFO overflow for COND[7]" "No overflow,Overflow" eventfld.long 0x08 6. " [6] ,FIFO overflow for COND[6]" "No overflow,Overflow" textline " " eventfld.long 0x08 5. " [5] ,FIFO overflow for COND[5]" "No overflow,Overflow" eventfld.long 0x08 4. " [4] ,FIFO overflow for COND[4]" "No overflow,Overflow" textline " " eventfld.long 0x08 3. " [3] ,FIFO overflow for COND[3]" "No overflow,Overflow" eventfld.long 0x08 2. " [2] ,FIFO overflow for COND[2]" "No overflow,Overflow" textline " " eventfld.long 0x08 1. " [1] ,FIFO overflow for COND[1]" "No overflow,Overflow" eventfld.long 0x08 0. " [0] ,FIFO overflow for COND[0]" "No overflow,Overflow" group.long 0x20++0x0B line.long 0x00 "WIN_A_INCR_SYNCPT_0,WIN_A_INCR_SYNCPT_0" hexmask.long.byte 0x00 8.--15. 1. " WIN_A_COND ,Condition mapped from raise/wait" hexmask.long.byte 0x00 0.--7. 1. " WIN_A_INDX ,Syncpt index value" line.long 0x04 "WIN_A_INCR_SYNCPT_CNTRL_0,WIN_A_INCR_SYNCPT_CNTRL_0" bitfld.long 0x04 8. " WIN_A_INCR_SYNCPT_NO_STALL ,WIN_A_INCR_SYNCPT_NO_STALL" "Disabled,Enabled" bitfld.long 0x04 0. " WIN_A_INCR_SYNCPT_SOFT_RESET ,WIN_A_INCR_SYNCPT_SOFT_RESET" "No reset,Reset" line.long 0x08 "WIN_A_INCR_SYNCPT_ERROR_0,WIN_A_INCR_SYNCPT_ERROR_0" eventfld.long 0x08 31. " COND_STATUS[31] ,FIFO overflow for COND[31]" "No overflow,Overflow" eventfld.long 0x08 30. " [30] ,FIFO overflow for COND[30]" "No overflow,Overflow" textline " " eventfld.long 0x08 29. " [29] ,FIFO overflow for COND[29]" "No overflow,Overflow" eventfld.long 0x08 28. " [28] ,FIFO overflow for COND[28]" "No overflow,Overflow" textline " " eventfld.long 0x08 27. " [27] ,FIFO overflow for COND[27]" "No overflow,Overflow" eventfld.long 0x08 26. " [26] ,FIFO overflow for COND[26]" "No overflow,Overflow" textline " " eventfld.long 0x08 25. " [25] ,FIFO overflow for COND[25]" "No overflow,Overflow" eventfld.long 0x08 24. " [24] ,FIFO overflow for COND[24]" "No overflow,Overflow" textline " " eventfld.long 0x08 23. " [23] ,FIFO overflow for COND[23]" "No overflow,Overflow" eventfld.long 0x08 22. " [22] ,FIFO overflow for COND[22]" "No overflow,Overflow" textline " " eventfld.long 0x08 21. " [21] ,FIFO overflow for COND[21]" "No overflow,Overflow" eventfld.long 0x08 20. " [20] ,FIFO overflow for COND[20]" "No overflow,Overflow" textline " " eventfld.long 0x08 19. " [19] ,FIFO overflow for COND[19]" "No overflow,Overflow" eventfld.long 0x08 18. " [18] ,FIFO overflow for COND[18]" "No overflow,Overflow" textline " " eventfld.long 0x08 17. " [17] ,FIFO overflow for COND[17]" "No overflow,Overflow" eventfld.long 0x08 16. " [16] ,FIFO overflow for COND[16]" "No overflow,Overflow" textline " " eventfld.long 0x08 15. " [15] ,FIFO overflow for COND[15]" "No overflow,Overflow" eventfld.long 0x08 14. " [14] ,FIFO overflow for COND[14]" "No overflow,Overflow" textline " " eventfld.long 0x08 13. " [13] ,FIFO overflow for COND[13]" "No overflow,Overflow" eventfld.long 0x08 12. " [12] ,FIFO overflow for COND[12]" "No overflow,Overflow" textline " " eventfld.long 0x08 11. " [11] ,FIFO overflow for COND[11]" "No overflow,Overflow" eventfld.long 0x08 10. " [10] ,FIFO overflow for COND[10]" "No overflow,Overflow" textline " " eventfld.long 0x08 9. " [9] ,FIFO overflow for COND[9]" "No overflow,Overflow" eventfld.long 0x08 8. " [8] ,FIFO overflow for COND[8]" "No overflow,Overflow" textline " " eventfld.long 0x08 7. " [7] ,FIFO overflow for COND[7]" "No overflow,Overflow" eventfld.long 0x08 6. " [6] ,FIFO overflow for COND[6]" "No overflow,Overflow" textline " " eventfld.long 0x08 5. " [5] ,FIFO overflow for COND[5]" "No overflow,Overflow" eventfld.long 0x08 4. " [4] ,FIFO overflow for COND[4]" "No overflow,Overflow" textline " " eventfld.long 0x08 3. " [3] ,FIFO overflow for COND[3]" "No overflow,Overflow" eventfld.long 0x08 2. " [2] ,FIFO overflow for COND[2]" "No overflow,Overflow" textline " " eventfld.long 0x08 1. " [1] ,FIFO overflow for COND[1]" "No overflow,Overflow" eventfld.long 0x08 0. " [0] ,FIFO overflow for COND[0]" "No overflow,Overflow" group.long 0x40++0x0B line.long 0x00 "WIN_B_INCR_SYNCPT_0,WIN_B_INCR_SYNCPT_0" hexmask.long.byte 0x00 8.--15. 1. " WIN_B_COND ,Condition mapped from raise/wait" hexmask.long.byte 0x00 0.--7. 1. " WIN_B_INDX ,Syncpt index value" line.long 0x04 "WIN_B_INCR_SYNCPT_CNTRL_0,WIN_B_INCR_SYNCPT_CNTRL_0" bitfld.long 0x04 8. " WIN_B_INCR_SYNCPT_NO_STALL ,WIN_B_INCR_SYNCPT_NO_STALL" "Disabled,Enabled" bitfld.long 0x04 0. " WIN_B_INCR_SYNCPT_SOFT_RESET ,WIN_B_INCR_SYNCPT_SOFT_RESET" "No reset,Reset" line.long 0x08 "WIN_B_INCR_SYNCPT_ERROR_0,WIN_B_INCR_SYNCPT_ERROR_0" eventfld.long 0x08 31. " COND_STATUS[31] ,FIFO overflow for COND[31]" "No overflow,Overflow" eventfld.long 0x08 30. " [30] ,FIFO overflow for COND[30]" "No overflow,Overflow" textline " " eventfld.long 0x08 29. " [29] ,FIFO overflow for COND[29]" "No overflow,Overflow" eventfld.long 0x08 28. " [28] ,FIFO overflow for COND[28]" "No overflow,Overflow" textline " " eventfld.long 0x08 27. " [27] ,FIFO overflow for COND[27]" "No overflow,Overflow" eventfld.long 0x08 26. " [26] ,FIFO overflow for COND[26]" "No overflow,Overflow" textline " " eventfld.long 0x08 25. " [25] ,FIFO overflow for COND[25]" "No overflow,Overflow" eventfld.long 0x08 24. " [24] ,FIFO overflow for COND[24]" "No overflow,Overflow" textline " " eventfld.long 0x08 23. " [23] ,FIFO overflow for COND[23]" "No overflow,Overflow" eventfld.long 0x08 22. " [22] ,FIFO overflow for COND[22]" "No overflow,Overflow" textline " " eventfld.long 0x08 21. " [21] ,FIFO overflow for COND[21]" "No overflow,Overflow" eventfld.long 0x08 20. " [20] ,FIFO overflow for COND[20]" "No overflow,Overflow" textline " " eventfld.long 0x08 19. " [19] ,FIFO overflow for COND[19]" "No overflow,Overflow" eventfld.long 0x08 18. " [18] ,FIFO overflow for COND[18]" "No overflow,Overflow" textline " " eventfld.long 0x08 17. " [17] ,FIFO overflow for COND[17]" "No overflow,Overflow" eventfld.long 0x08 16. " [16] ,FIFO overflow for COND[16]" "No overflow,Overflow" textline " " eventfld.long 0x08 15. " [15] ,FIFO overflow for COND[15]" "No overflow,Overflow" eventfld.long 0x08 14. " [14] ,FIFO overflow for COND[14]" "No overflow,Overflow" textline " " eventfld.long 0x08 13. " [13] ,FIFO overflow for COND[13]" "No overflow,Overflow" eventfld.long 0x08 12. " [12] ,FIFO overflow for COND[12]" "No overflow,Overflow" textline " " eventfld.long 0x08 11. " [11] ,FIFO overflow for COND[11]" "No overflow,Overflow" eventfld.long 0x08 10. " [10] ,FIFO overflow for COND[10]" "No overflow,Overflow" textline " " eventfld.long 0x08 9. " [9] ,FIFO overflow for COND[9]" "No overflow,Overflow" eventfld.long 0x08 8. " [8] ,FIFO overflow for COND[8]" "No overflow,Overflow" textline " " eventfld.long 0x08 7. " [7] ,FIFO overflow for COND[7]" "No overflow,Overflow" eventfld.long 0x08 6. " [6] ,FIFO overflow for COND[6]" "No overflow,Overflow" textline " " eventfld.long 0x08 5. " [5] ,FIFO overflow for COND[5]" "No overflow,Overflow" eventfld.long 0x08 4. " [4] ,FIFO overflow for COND[4]" "No overflow,Overflow" textline " " eventfld.long 0x08 3. " [3] ,FIFO overflow for COND[3]" "No overflow,Overflow" eventfld.long 0x08 2. " [2] ,FIFO overflow for COND[2]" "No overflow,Overflow" textline " " eventfld.long 0x08 1. " [1] ,FIFO overflow for COND[1]" "No overflow,Overflow" eventfld.long 0x08 0. " [0] ,FIFO overflow for COND[0]" "No overflow,Overflow" group.long 0x60++0x0B line.long 0x00 "WIN_C_INCR_SYNCPT_0,WIN_C_INCR_SYNCPT_0" hexmask.long.byte 0x00 8.--15. 1. " WIN_C_COND ,Condition mapped from raise/wait" hexmask.long.byte 0x00 0.--7. 1. " WIN_C_INDX ,Syncpt index value" line.long 0x04 "WIN_C_INCR_SYNCPT_CNTRL_0,WIN_C_INCR_SYNCPT_CNTRL_0" bitfld.long 0x04 8. " WIN_C_INCR_SYNCPT_NO_STALL ,WIN_C_INCR_SYNCPT_NO_STALL" "Disabled,Enabled" bitfld.long 0x04 0. " WIN_C_INCR_SYNCPT_SOFT_RESET ,WIN_C_INCR_SYNCPT_SOFT_RESET" "No reset,Reset" line.long 0x08 "WIN_C_INCR_SYNCPT_ERROR_0,WIN_C_INCR_SYNCPT_ERROR_0" eventfld.long 0x08 31. " COND_STATUS[31] ,FIFO overflow for COND[31]" "No overflow,Overflow" eventfld.long 0x08 30. " [30] ,FIFO overflow for COND[30]" "No overflow,Overflow" textline " " eventfld.long 0x08 29. " [29] ,FIFO overflow for COND[29]" "No overflow,Overflow" eventfld.long 0x08 28. " [28] ,FIFO overflow for COND[28]" "No overflow,Overflow" textline " " eventfld.long 0x08 27. " [27] ,FIFO overflow for COND[27]" "No overflow,Overflow" eventfld.long 0x08 26. " [26] ,FIFO overflow for COND[26]" "No overflow,Overflow" textline " " eventfld.long 0x08 25. " [25] ,FIFO overflow for COND[25]" "No overflow,Overflow" eventfld.long 0x08 24. " [24] ,FIFO overflow for COND[24]" "No overflow,Overflow" textline " " eventfld.long 0x08 23. " [23] ,FIFO overflow for COND[23]" "No overflow,Overflow" eventfld.long 0x08 22. " [22] ,FIFO overflow for COND[22]" "No overflow,Overflow" textline " " eventfld.long 0x08 21. " [21] ,FIFO overflow for COND[21]" "No overflow,Overflow" eventfld.long 0x08 20. " [20] ,FIFO overflow for COND[20]" "No overflow,Overflow" textline " " eventfld.long 0x08 19. " [19] ,FIFO overflow for COND[19]" "No overflow,Overflow" eventfld.long 0x08 18. " [18] ,FIFO overflow for COND[18]" "No overflow,Overflow" textline " " eventfld.long 0x08 17. " [17] ,FIFO overflow for COND[17]" "No overflow,Overflow" eventfld.long 0x08 16. " [16] ,FIFO overflow for COND[16]" "No overflow,Overflow" textline " " eventfld.long 0x08 15. " [15] ,FIFO overflow for COND[15]" "No overflow,Overflow" eventfld.long 0x08 14. " [14] ,FIFO overflow for COND[14]" "No overflow,Overflow" textline " " eventfld.long 0x08 13. " [13] ,FIFO overflow for COND[13]" "No overflow,Overflow" eventfld.long 0x08 12. " [12] ,FIFO overflow for COND[12]" "No overflow,Overflow" textline " " eventfld.long 0x08 11. " [11] ,FIFO overflow for COND[11]" "No overflow,Overflow" eventfld.long 0x08 10. " [10] ,FIFO overflow for COND[10]" "No overflow,Overflow" textline " " eventfld.long 0x08 9. " [9] ,FIFO overflow for COND[9]" "No overflow,Overflow" eventfld.long 0x08 8. " [8] ,FIFO overflow for COND[8]" "No overflow,Overflow" textline " " eventfld.long 0x08 7. " [7] ,FIFO overflow for COND[7]" "No overflow,Overflow" eventfld.long 0x08 6. " [6] ,FIFO overflow for COND[6]" "No overflow,Overflow" textline " " eventfld.long 0x08 5. " [5] ,FIFO overflow for COND[5]" "No overflow,Overflow" eventfld.long 0x08 4. " [4] ,FIFO overflow for COND[4]" "No overflow,Overflow" textline " " eventfld.long 0x08 3. " [3] ,FIFO overflow for COND[3]" "No overflow,Overflow" eventfld.long 0x08 2. " [2] ,FIFO overflow for COND[2]" "No overflow,Overflow" textline " " eventfld.long 0x08 1. " [1] ,FIFO overflow for COND[1]" "No overflow,Overflow" eventfld.long 0x08 0. " [0] ,FIFO overflow for COND[0]" "No overflow,Overflow" textline " " group.long 0xA0++0x03 line.long 0x00 "CONT_SYNCPT_VSYNC_0,CONT_SYNCPT_VSYNC_0" bitfld.long 0x00 8. " VSYNC_EN ,Vsync enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " VSYNC_INDX ,Return INDX" group.long 0xC0++0x03 line.long 0x00 "CTXSW_0,Context Switch Register" rbitfld.long 0x00 28.--31. " NEXT_CHANNEL ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--25. 1. " NEXT_CLASS ,Next requested class" bitfld.long 0x00 12.--15. " CURR_CHANNEL ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 11. " AUTO_ACK ,Automatically acknowledge any incoming context switch requests" "Manual,AutoACK" hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" if (((per.l(ad:0x54200000+0xC8))&0x60)==0x40) group.long 0xC4++0x03 line.long 0x00 "DISPLAY_COMMAND_OPTION0_0,Display Controller Option 0" bitfld.long 0x00 18. " WINDOW_C_NC_DISPLAY ,Window C Non-Continuous display" "Disabled,Enabled" bitfld.long 0x00 17. " WINDOW_B_NC_DISPLAY ,Window B Non-Continuous display" "Disabled,Enabled" bitfld.long 0x00 16. " WINDOW_A_NC_DISPLAY ,Window A Non-Continuous display" "Disabled,Enabled" textline " " bitfld.long 0x00 6.--7. " SSF_SOURCE ,Source pin for the SSF input" "SSF_LDC,SSF_LSPI,SSF_LSDI,?..." bitfld.long 0x00 5. " SSF_ENABLE ,Sub-Display Stop Frame (SSF) input" "Disabled,Enabled" bitfld.long 0x00 4. " SSF_POLARITY ,Sub-Display Stop Frame (SSF) Polarity" "Active high,Active low" textline " " bitfld.long 0x00 2.--3. " MSF_SOURCE ,Source pin for the MSF input" "MSF_LSPI,MSF_LDC,MSF_LSDI,?..." bitfld.long 0x00 1. " MSF_ENABLE ,Main-Display Stop Frame (MSF) input" "Disabled,Enabled" bitfld.long 0x00 0. " MSF_POLARITY ,Main-Display Stop Frame (MSF) Polarity" "Active high,Active low" else group.long 0xC4++0x03 line.long 0x00 "DISPLAY_COMMAND_OPTION0_0,Display Controller Option 0" textline " " bitfld.long 0x00 6.--7. " SSF_SOURCE ,Source pin for the SSF input" "SSF_LDC,SSF_LSPI,SSF_LSDI,?..." bitfld.long 0x00 4. " SSF_POLARITY ,Sub-Display Stop Frame (SSF) Polarity" "Active high,Active low" textline " " bitfld.long 0x00 2.--3. " MSF_SOURCE ,Source pin for the MSF input" "MSF_LSPI,MSF_LDC,MSF_LSDI,?..." bitfld.long 0x00 0. " MSF_POLARITY ,Main-Display Stop Frame (MSF) Polarity" "Active high,Active low" endif group.long 0xC8++0x07 line.long 0x00 "DISPLAY_COMMAND_0,Display Command" bitfld.long 0x00 27.--30. " DISP_COMMAND_RAISE_CHANNEL_ID ,Display Command Channel ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22.--26. " DISP_COMMAND_RAISE_VECTOR ,Display Command Raise Vector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--6. " DISPLAY_CTRL_MODE ,Display Controller Mode" "STOP,Continuous,Non-Continuous,?..." textline " " bitfld.long 0x00 0. " DISP_COMMAND_RAISE ,Display Command Raise" "Disabled,Enabled" textline " " line.long 0x04 "SIGNAL_RAISE_0,SIGNAL_RAISE_0" bitfld.long 0x04 16.--19. " SIGNAL_RAISE_CHANNEL_ID ,Signal Raise Channel ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 12. " SIGNAL_RAISE_TYPE ,Signal raise type" "One-shot,Continuous" textline " " bitfld.long 0x04 8.--10. " SIGNAL_RAISE_SELECT ,Signal to raise" "None,Frame End,V Blank,V Pulse 3,Rising edge of V Blank,Falling edge of V Blank,Rising edge of V Pulse 3,Falling edge of V Pulse 3" textline " " bitfld.long 0x04 0.--4. " SIGNAL_RAISE_VECTOR ,Bit number to raise" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xD8++0x03 line.long 0x00 "DISPLAY_POWER_CONTROL_0,Display Power Control" width 17. textline " " group.long 0xDC++0x1F line.long 0x00 "INT_STATUS_0,Display Interrupt and Status" sif CPUIS("TEGRAX1") eventfld.long 0x00 29. " DSC_TO_UF_INT ,DSC TO Underflow Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 28. " DSC_BBUF_UF_INT ,DSC BBUF Underflow Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 27. " DSC_RBUF_UF_INT ,DSC RBUF Underflow Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 26. " DSC_OBUF_UF_INT ,DSC OBUF Underflow Interrupt Status" "No interrupt,Interrupt" textline " " endif eventfld.long 0x00 25. " WIN_T_UF_INT ,Window T Underflow Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 24. " WIN_D_UF_INT ,Window D Underflow Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 23. " HC_UF_INT ,Cursor Underflow Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " CMU_LUT_CONFLICT_INT ,CMU LUT read/write conflict" "No interrupt,Interrupt" eventfld.long 0x00 16. " WIN_C_OF_INT ,Window C Overflow Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 15. " WIN_B_OF_INT ,Window B Overflow Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 14. " WIN_A_OF_INT ,Window A Overflow Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 13. " SSF_INT ,Sub-Display Stop Frame Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 12. " MSF_INT ,Main-Display Stop Frame Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 10. " WIN_C_UF_INT ,Window C Underflow Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 9. " WIN_B_UF_INT ,Window B Underflow Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 8. " WIN_A_UF_INT ,Window A Underflow Interrupt Status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " SPI_BUSY_INT ,SPI Busy Interrupt Status" "No interrupt,Interrupt" eventfld.long 0x00 5. " V_PULSE2_INT ,Vertical Pulse 2 Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " V_PULSE3_INT ,Vertical Pulse 3 Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " H_BLANK_INT ,Horizontal Blank Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " V_BLANK_INT ,Vertical Blank Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " FRAME_END_INT ,Frame End Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " CTXSW_INT ,Context Switch Interrupt Status" "No interrupt,Interrupt" line.long 0x04 "INT_MASK_0,Interrupt Mask" sif CPUIS("TEGRAX1") bitfld.long 0x04 29. " DSC_TO_UF_INT ,DSC TO Underflow Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 28. " DSC_BBUF_UF_INT ,DSC BBUF Underflow Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 27. " DSC_RBUF_UF_INT ,DSC RBUF Underflow Interrupt Mask" "Masked,Unmasked" textline " " bitfld.long 0x04 26. " DSC_OBUF_UF_INT ,DSC OBUF Underflow Interrupt Mask" "Masked,Unmasked" textline " " endif bitfld.long 0x04 25. " WIN_T_UF_INT_MASK ,Window T Underflow Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 24. " WIN_D_UF_INT_MASK ,Window D Underflow Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 23. " HC_UF_INT_MASK ,Cursor Underflow Interrupt Mask" "Masked,Unmasked" textline " " bitfld.long 0x04 22. " CMU_LUT_CONFLICT_INT_MASK ,CMU LUT read/write conflict Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 16. " WIN_C_OF_INT_MASK ,Window C Overflow Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 15. " WIN_B_OF_INT_MASK ,Window B Overflow Interrupt Mask" "Masked,Unmasked" textline " " bitfld.long 0x04 14. " WIN_A_OF_INT_MASK ,Window A Overflow Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 13. " SSF_INT_MASK ,Sub-Display Stop Frame Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 12. " MSF_INT_MASK ,Main-Display Stop Frame Interrupt Mask" "Masked,Unmasked" textline " " bitfld.long 0x04 10. " WIN_C_UF_INT_MASK ,Window C Underflow Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 9. " WIN_B_UF_INT_MASK ,Window B Underflow Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 8. " WIN_A_UF_INT_MASK ,Window A Underflow Interrupt Mask" "Masked,Unmasked" textline " " bitfld.long 0x04 7. " SPI_BUSY_INT_MASK ,SPI Busy Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 5. " V_PULSE2_INT_MASK ,Vertical Pulse 2 Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 4. " V_PULSE3_INT_MASK ,Vertical Pulse 3 Interrupt Mask" "Masked,Unmasked" textline " " bitfld.long 0x04 3. " H_BLANK_INT_MASK ,Horizontal Blank Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 2. " V_BLANK_INT_MASK ,Vertical Blank Interrupt Mask" "Masked,Unmasked" bitfld.long 0x04 1. " FRAME_END_INT_MASK ,Frame End Interrupt Mask" "Masked,Unmasked" textline " " bitfld.long 0x04 0. " CTXSW_INT_MASK ,Context Switch Interrupt Mask" "Masked,Unmasked" line.long 0x08 "INT_ENABLE_0,Interrupt Enable" sif CPUIS("TEGRAX1") bitfld.long 0x08 29. " DSC_TO_UF_INT_ENABLE ,DSC TO Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 28. " DSC_BBUF_UF_INT_ENABLE ,DSC BBUF Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 27. " DSC_RBUF_UF_INT_ENABLE ,DSC RBUF Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 26. " DSC_OBUF_UF_INT_ENABLE ,DSC OBUF Underflow Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x08 25. " WIN_T_UF_INT_ENABLE ,Window T Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 24. " WIN_D_UF_INT_ENABLE ,Window D Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 23. " HC_UF_INT_ENABLE ,Cursor Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " CMU_LUT_CONFLICT_INT_ENABLE ,CMU LUT read/write conflict" "Disabled,Enabled" bitfld.long 0x08 16. " WIN_C_OF_INT_ENABLE ,Window C Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 15. " WIN_B_OF_INT_ENABLE ,Window B Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " WIN_A_OF_INT_ENABLE ,Window A Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 13. " SSF_INT_ENABLE ,Sub-Display Stop Frame Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 12. " MSF_INT_ENABLE ,Main-Display Stop Frame Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " WIN_C_UF_INT_ENABLE ,Window C Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 9. " WIN_B_UF_INT_ENABLE ,Window B Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 8. " WIN_A_UF_INT_ENABLE ,Window A Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " SPI_BUSY_INT_ENABLE ,SPI Busy Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 5. " V_PULSE2_INT_ENABLE ,Vertical Pulse 2 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 4. " V_PULSE3_INT_ENABLE ,Vertical Pulse 3 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " H_BLANK_INT_ENABLE ,Horizontal Blank Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 2. " V_BLANK_INT_ENABLE ,Vertical Blank Interrupt Enable" "Disabled,Enabled" bitfld.long 0x08 1. " FRAME_END_INT_ENABLE ,Frame End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " CTXSW_INT_ENABLE ,Context Switch Interrupt Enable" "Disabled,Enabled" line.long 0x0C "INT_TYPE_0,Interrupt Type" sif CPUIS("TEGRAX1") bitfld.long 0x0C 29. " DSC_TO_UF_INT_TYPE ,DSC TO Underflow Interrupt Type" "Edge,Level" bitfld.long 0x0C 28. " DSC_BBUF_UF_INT_TYPE ,DSC BBUF Underflow Interrupt Type" "Edge,Level" bitfld.long 0x0C 27. " DSC_RBUF_UF_INT_TYPE ,DSC RBUF Underflow Interrupt Type" "Edge,Level" textline " " bitfld.long 0x0C 26. " DSC_OBUF_UF_INT_TYPE ,DSC OBUF Underflow Interrupt Type" "Edge,Level" textline " " endif bitfld.long 0x0C 25. " WIN_T_UF_INT_TYPE ,Window T Underflow Interrupt Type" "Edge,Level" bitfld.long 0x0C 24. " WIN_D_UF_INT_TYPE ,Window D Underflow Interrupt Type" "Edge,Level" bitfld.long 0x0C 23. " HC_UF_INT_TYPE ,Cursor Underflow Interrupt Type" "Edge,Level" textline " " bitfld.long 0x0C 22. " CMU_LUT_CONFLICT_INT_TYPE ,CMU LUT read/write conflict" "Edge,Level" bitfld.long 0x0C 16. " WIN_C_OF_INT_TYPE ,Window C Overflow Interrupt Type" "Edge,Level" bitfld.long 0x0C 15. " WIN_B_OF_INT_TYPE ,Window B Overflow Interrupt Type" "Edge,Level" textline " " bitfld.long 0x0C 14. " WIN_A_OF_INT_TYPE ,Window A Overflow Interrupt Type" "Edge,Level" bitfld.long 0x0C 13. " SSF_INT_TYPE ,Sub-Display Stop Frame Interrupt Type" "Edge,Level" bitfld.long 0x0C 11. " EPP_OF_INT_TYPE ,Display2epp Overflow Interrupt Type" "Edge,Level" textline " " bitfld.long 0x0C 10. " WIN_C_UF_INT_TYPE ,Window C Underflow Interrupt Type" "Edge,Level" bitfld.long 0x0C 9. " WIN_B_UF_INT_TYPE ,Window B Underflow Interrupt Type" "Edge,Level" bitfld.long 0x0C 8. " WIN_A_UF_INT_TYPE ,Window A Underflow Interrupt Type" "Edge,Level" textline " " bitfld.long 0x0C 7. " SPI_BUSY_INT_TYPE ,SPI Busy Interrupt Type" "Edge,Level" bitfld.long 0x0C 5. " V_PULSE2_INT_TYPE ,Vertical Pulse 2 Interrupt Type" "Edge,Level" bitfld.long 0x0C 4. " V_PULSE3_INT_TYPE ,Vertical Pulse 3 Interrupt Type" "Edge,Level" textline " " bitfld.long 0x0C 3. " H_BLANK_INT_TYPE ,Horizontal Blank Interrupt Type" "Edge,Level" bitfld.long 0x0C 2. " V_BLANK_INT_TYPE ,Vertical Blank Interrupt Type" "Edge,Level" bitfld.long 0x0C 1. " FRAME_END_INT_TYPE ,Frame End Interrupt Type" "Edge,Level" line.long 0x10 "INT_POLARITY_0,Interrupt Polarity" sif CPUIS("TEGRAX1") bitfld.long 0x10 29. " DSC_TO_UF_INT_POLARITY ,DSC TO Underflow Interrupt Polarity" "Low,High" bitfld.long 0x10 28. " DSC_BBUF_UF_INT_POLARITY ,DSC BBUF Underflow Interrupt Polarity" "Low,High" bitfld.long 0x10 27. " DSC_RBUF_UF_INT_POLARITY ,DSC RBUF Underflow Interrupt Polarity" "Low,High" textline " " bitfld.long 0x10 26. " DSC_OBUF_UF_INT_POLARITY ,DSC OBUF Underflow Interrupt Polarity" "Low,High" textline " " endif bitfld.long 0x10 25. " WIN_T_UF_INT_POLARITY ,Window T Underflow Interrupt Polarity" "Low,High" bitfld.long 0x10 24. " WIN_D_UF_INT_POLARITY ,Window D Underflow Interrupt Polarity" "Low,High" bitfld.long 0x10 23. " HC_UF_INT_POLARITY ,Cursor Underflow Interrupt Polarity" "Low,High" textline " " eventfld.long 0x10 22. " CMU_LUT_CONFLICT_INT_POLARITY ,CMU LUT read/write conflict" "Low,High" bitfld.long 0x10 16. " WIN_C_OF_INT_POLARITY ,Window C Overflow Interrupt Polarity" "Low,High" bitfld.long 0x10 15. " WIN_B_OF_INT_POLARITY ,Window B Overflow Interrupt Polarity" "Low,High" textline " " bitfld.long 0x10 14. " WIN_A_OF_INT_POLARITY ,Window A Overflow Interrupt Polarity" "Low,High" bitfld.long 0x10 13. " SSF_INT_POLARITY ,Sub-Display Stop Frame Interrupt Polarity" "Low,High" bitfld.long 0x10 12. " MSF_INT_POLARITY ,Main-Display Stop Frame Interrupt Polarity" "Low,High" textline " " bitfld.long 0x10 10. " WIN_C_UF_INT_POLARITY ,Window C Underflow Interrupt Polarity" "Low,High" bitfld.long 0x10 9. " WIN_B_UF_INT_POLARITY ,Window B Underflow Interrupt Polarity" "Low,High" bitfld.long 0x10 8. " WIN_A_UF_INT_POLARITY ,Window A Underflow Interrupt Polarity" "Low,High" textline " " bitfld.long 0x10 7. " SPI_BUSY_INT_POLARITY ,SPI Busy Interrupt Polarity" "Low,High" bitfld.long 0x10 5. " V_PULSE2_INT_POLARITY ,V Pulse 2 Interrupt Polarity" "Low,High" bitfld.long 0x10 4. " V_PULSE3_INT_POLARITY ,Vertical Pulse 3 Interrupt Polarity" "Low,High" textline " " bitfld.long 0x10 3. " H_BLANK_INT_POLARITY ,Horizontal Blank Interrupt Polarity" "Low,High" bitfld.long 0x10 2. " V_BLANK_INT_POLARITY ,Vertical Blank Interrupt Polarity" "Low,High" bitfld.long 0x10 1. " FRAME_END_INT_POLARITY ,Frame End Interrupt Polarity" "Low,High" line.long 0x14 "SIGNAL_RAISE1_0,SIGNAL_RAISE1_0" bitfld.long 0x14 16.--19. " SIGNAL_RAISE1_CHANNEL_ID ,Signal Raise Channel ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 12. " SIGNAL_RAISE1_TYPE ,Signal Raise Type" "Oneshot,Continuous" bitfld.long 0x14 8.--10. " SIGNAL_RAISE1_SELECT ,Signal Raise Select" "None,Frame End,V Blank,V Pulse 3,Rising edge of V Blank,Falling edge of V Blank,Rising edge of V Pulse 3,Falling edge of V Pulse 3" textline " " bitfld.long 0x14 0.--4. " SIGNAL_RAISE1_VECTOR ,Bit number to raise" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "SIGNAL_RAISE2_0,SIGNAL_RAISE2_0" bitfld.long 0x18 16.--19. " SIGNAL_RAISE2_CHANNEL_ID ,Signal Raise Channel ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12. " SIGNAL_RAISE2_TYPE ,Signal Raise Type" "Oneshot,Continuous" bitfld.long 0x18 8.--10. " SIGNAL_RAISE2_SELECT ,Signal Raise Select" "None,Frame End,V Blank,V Pulse 3,Rising edge of V Blank,Falling edge of V Blank,Rising edge of V Pulse 3,Falling edge of V Pulse 3" textline " " bitfld.long 0x18 0.--4. " SIGNAL_RAISE2_VECTOR ,Bit number to raise" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "SIGNAL_RAISE3_0,SIGNAL_RAISE3_0" bitfld.long 0x1C 16.--19. " SIGNAL_RAISE3_CHANNEL_ID ,Signal Raise Channel ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12. " SIGNAL_RAISE3_TYPE ,Signal Raise Type" "Oneshot,Continuous" bitfld.long 0x1C 8.--10. " SIGNAL_RAISE3_SELECT ,Signal Raise Select" "None,Frame End,V Blank,V Pulse 3,Rising edge of V Blank,Falling edge of V Blank,Rising edge of V Pulse 3,Falling edge of V Pulse 3" textline " " bitfld.long 0x1C 0.--4. " SIGNAL_RAISE3_VECTOR ,Bit number to raise" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x100++0x03 line.long 0x00 "STATE_ACCESS_0,Double/triple buffers read and write access control" bitfld.long 0x00 2. " WRITE_MUX ,Write access control" "Assembly,Active" bitfld.long 0x00 0. " READ_MUX ,Read access control" "Assembly,Active" if (((per.l(ad:0x54200000+0xC8))&0x60)==0x40) group.long 0x104++0x03 line.long 0x00 "STATE_CONTROL_0,State Control for Activating/Arming New Register State" bitfld.long 0x00 24. " NC_HOST_TRIG_ENABLE ,Host trigger enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " CURSOR_UPDATE ,Trigger for the arming state for a subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x00 12. " WIN_D_UPDATE ,Trigger for the arming state for the win D subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x00 11. " WIN_C_UPDATE ,Trigger for arming state for the win C subset of the triple buffered registers" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " WIN_B_UPDATE ,Trigger for arming state for the win B subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x00 9. " WIN_A_UPDATE ,rigger for arming state for the win A subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x00 8. " GENERAL_UPDATE ,Trigger for arming state for a subset of the triple buffered registers" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CURSOR_ACT_REQ ,Non-window specific" "Disabled,Enabled" bitfld.long 0x00 4. " WIN_D_ACT_REQ ,Window D activation request" "Disabled,Enabled" bitfld.long 0x00 3. " WIN_C_ACT_REQ ,Window C activation request" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " WIN_B_ACT_REQ ,Window B activation request" "Disabled,Enabled" bitfld.long 0x00 1. " WIN_A_ACT_REQ ,Window A activation request" "Disabled,Enabled" bitfld.long 0x00 0. " GENERAL_ACT_REQ ,Non-window-specific" "Disabled,Enabled" else group.long 0x104++0x03 line.long 0x00 "STATE_CONTROL_0,State Control for Activating/Arming New Register State" textline " " bitfld.long 0x00 15. " CURSOR_UPDATE ,Trigger for the arming state for a subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x00 12. " WIN_D_UPDATE ,Trigger for the arming state for the win D subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x00 11. " WIN_C_UPDATE ,Trigger for arming state for the win C subset of the triple buffered registers" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " WIN_B_UPDATE ,Trigger for arming state for the win B subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x00 9. " WIN_A_UPDATE ,rigger for arming state for the win A subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x00 8. " GENERAL_UPDATE ,Trigger for arming state for a subset of the triple buffered registers" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CURSOR_ACT_REQ ,Non-window specific" "Disabled,Enabled" bitfld.long 0x00 4. " WIN_D_ACT_REQ ,Window D activation request" "Disabled,Enabled" bitfld.long 0x00 3. " WIN_C_ACT_REQ ,Window C activation request" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " WIN_B_ACT_REQ ,Window B activation request" "Disabled,Enabled" bitfld.long 0x00 1. " WIN_A_ACT_REQ ,Window A activation request" "Disabled,Enabled" bitfld.long 0x00 0. " GENERAL_ACT_REQ ,Non-window-specific" "Disabled,Enabled" endif width 27. textline " " group.long 0x108++0x0F line.long 0x00 "DISPLAY_WINDOW_HEADER_0,Display Window Programming Header" bitfld.long 0x00 7. " WINDOW_D_SELECT ,Enable window D programming" "Disabled,Enabled" bitfld.long 0x00 6. " WINDOW_C_SELECT ,Enable window C programming" "Disabled,Enabled" bitfld.long 0x00 5. " WINDOW_B_SELECT ,Enable window B programming" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " WINDOW_A_SELECT ,Enable window A programming" "Disabled,Enabled" line.long 0x04 "REG_ACT_CONTROL_0,Register activation options" bitfld.long 0x04 10. " WIN_D_ACT_CNTR_SEL ,Select which counter to use for window D activation" "V counter,H counter" bitfld.long 0x04 7. " CURSOR_ACT_CNTR_SEL ,Select which counter to use for Cursor activation" "V counter,H counter" bitfld.long 0x04 6. " WIN_C_ACT_CNTR_SEL ,Select which counter to use for window C activation" "V counter,H counter" textline " " bitfld.long 0x04 4. " WIN_B_ACT_CNTR_SEL ,Select which counter to use for window B activation" "V counter,H counter" bitfld.long 0x04 2. " WIN_A_ACT_CNTR_SEL ,Select which counter to use for window A activation" "V counter,H counter" bitfld.long 0x04 0. " GENERAL_ACT_CNTR_SEL ,Select which counter to use for general activation" "V counter,H counter" line.long 0x08 "WIN_T_STATE_CONTROL_0,WIN_T State control register for activating/arming new register state" bitfld.long 0x08 8. " WIN_T_UPDATE ,Trigger for the arming state for the win B subset of the triple buffered registers" "Disabled,Enabled" bitfld.long 0x08 0. " WIN_T_ACT_REQ ,Request pending" "Not requested,Requested" line.long 0x0C "SECURE_CONTROL_0,Secure control register for enabling secure mode" sif CPUIS("TEGRAX1") bitfld.long 0x0C 14. " SECURE_SOR1_PROTECT ,Blanks the display output to SOR1" "Disabled,Enabled" textline " " endif bitfld.long 0x0C 13. " SECURE_SOR_PROTECT ,Blanks the display output to SOR" "Disabled,Enabled" bitfld.long 0x0C 12. " SECURE_DSIB_PROTECT ,Blanks the display output to DSIB" "Disabled,Enabled" bitfld.long 0x0C 11. " SECURE_DSIA_PROTECT ,Blanks the display output to DSIA" "Disabled,Enabled" textline " " sif CPUIS("TEGRAK1") bitfld.long 0x0C 10. " SECURE_HDMI_PROTECT ,Blanks the display output to HDMI" "Disabled,Enabled" textline " " endif bitfld.long 0x0C 9. " SECURE_READ_MUX ,Controls which of the double-buffered window registers are read in TZ Secure mode" "Assembly,Active" bitfld.long 0x0C 8. " SECURE_WRITE_MUX ,Controls which of the double-buffered window registers are written in TZ Secure mode" "Assembly,Active" textline " " bitfld.long 0x0C 2. " SECURE_CRC_PROTECT ,Disable CRC computation when enabled" "Disabled,Enabled" bitfld.long 0x0C 1. " SECURE_CMU_PROTECT ,CMU registers are only accessible in TZ Secure mode" "Disabled,Enabled" bitfld.long 0x0C 0. " SECURE_ENABLE ,Secure mode enable" "Disabled,Enabled" group.long 0x130++0x0B line.long 0x00 "WIN_D_INCR_SYNCPT_0,WIN_D_INCR_SYNCPT_0" hexmask.long.byte 0x00 8.--15. 1. " WIN_D_COND ,Condition mapped from raise/wait" hexmask.long.byte 0x00 0.--7. 1. " WIN_D_INDX ,Syncpt index value" line.long 0x04 "WIN_D_INCR_SYNCPT_CNTRL_0,WIN_D_INCR_SYNCPT_CNTRL_0" bitfld.long 0x04 8. " WIN_D_INCR_SYNCPT_NO_STALL ,Host interface stall" "Stalled,Not stalled" bitfld.long 0x04 0. " WIN_D_INCR_SYNCPT_SOFT_RESET ,Internal states of the client syncpt block reset" "No reset,Reset" line.long 0x08 "WIN_D_INCR_SYNCPT_ERROR_0,WIN_D_INCR_SYNCPT_ERROR_0" eventfld.long 0x08 31. " COND_STATUS[31] ,FIFO overflow for COND[31]" "No overflow,Overflow" eventfld.long 0x08 30. " [30] ,FIFO overflow for COND[30]" "No overflow,Overflow" textline " " eventfld.long 0x08 29. " [29] ,FIFO overflow for COND[29]" "No overflow,Overflow" eventfld.long 0x08 28. " [28] ,FIFO overflow for COND[28]" "No overflow,Overflow" textline " " eventfld.long 0x08 27. " [27] ,FIFO overflow for COND[27]" "No overflow,Overflow" eventfld.long 0x08 26. " [26] ,FIFO overflow for COND[26]" "No overflow,Overflow" textline " " eventfld.long 0x08 25. " [25] ,FIFO overflow for COND[25]" "No overflow,Overflow" eventfld.long 0x08 24. " [24] ,FIFO overflow for COND[24]" "No overflow,Overflow" textline " " eventfld.long 0x08 23. " [23] ,FIFO overflow for COND[23]" "No overflow,Overflow" eventfld.long 0x08 22. " [22] ,FIFO overflow for COND[22]" "No overflow,Overflow" textline " " eventfld.long 0x08 21. " [21] ,FIFO overflow for COND[21]" "No overflow,Overflow" eventfld.long 0x08 20. " [20] ,FIFO overflow for COND[20]" "No overflow,Overflow" textline " " eventfld.long 0x08 19. " [19] ,FIFO overflow for COND[19]" "No overflow,Overflow" eventfld.long 0x08 18. " [18] ,FIFO overflow for COND[18]" "No overflow,Overflow" textline " " eventfld.long 0x08 17. " [17] ,FIFO overflow for COND[17]" "No overflow,Overflow" eventfld.long 0x08 16. " [16] ,FIFO overflow for COND[16]" "No overflow,Overflow" textline " " eventfld.long 0x08 15. " [15] ,FIFO overflow for COND[15]" "No overflow,Overflow" eventfld.long 0x08 14. " [14] ,FIFO overflow for COND[14]" "No overflow,Overflow" textline " " eventfld.long 0x08 13. " [13] ,FIFO overflow for COND[13]" "No overflow,Overflow" eventfld.long 0x08 12. " [12] ,FIFO overflow for COND[12]" "No overflow,Overflow" textline " " eventfld.long 0x08 11. " [11] ,FIFO overflow for COND[11]" "No overflow,Overflow" eventfld.long 0x08 10. " [10] ,FIFO overflow for COND[10]" "No overflow,Overflow" textline " " eventfld.long 0x08 9. " [9] ,FIFO overflow for COND[9]" "No overflow,Overflow" eventfld.long 0x08 8. " [8] ,FIFO overflow for COND[8]" "No overflow,Overflow" textline " " eventfld.long 0x08 7. " [7] ,FIFO overflow for COND[7]" "No overflow,Overflow" eventfld.long 0x08 6. " [6] ,FIFO overflow for COND[6]" "No overflow,Overflow" textline " " eventfld.long 0x08 5. " [5] ,FIFO overflow for COND[5]" "No overflow,Overflow" eventfld.long 0x08 4. " [4] ,FIFO overflow for COND[4]" "No overflow,Overflow" textline " " eventfld.long 0x08 3. " [3] ,FIFO overflow for COND[3]" "No overflow,Overflow" eventfld.long 0x08 2. " [2] ,FIFO overflow for COND[2]" "No overflow,Overflow" textline " " eventfld.long 0x08 1. " [1] ,FIFO overflow for COND[1]" "No overflow,Overflow" eventfld.long 0x08 0. " [0] ,FIFO overflow for COND[0]" "No overflow,Overflow" tree.end width 24. tree "Display COM Registers" group.long 0xC00++0x03 line.long 0x00 "CRC_CONTROL_0,CRC Control" bitfld.long 0x00 3. " CRC_ALWAYS ,CRC always" "Disabled,Enabled" bitfld.long 0x00 2. " CRC_INPUT_DATA ,CRC input data" "Full frame,Active display" bitfld.long 0x00 1. " CRC_WAIT ,CRC Wait" "1 Vsync,2 Vsyncs" textline " " bitfld.long 0x00 0. " CRC_ENABLE ,CRC Enable" "Disabled,Enabled" rgroup.long 0xC04++0x03 line.long 0x00 "CRC_CHECKSUM_0,CRC Checksum" group.long 0xC6C++0x0B line.long 0x00 "PIN_MISC_CONTROL_0,Pin Miscellaneous Control" bitfld.long 0x00 2. " DISP_CLOCK_OUTPUT ,Display Clock (DCLK)" "Disabled,Enabled" line.long 0x04 "PM0_CONTROL_0,PM0 Signal Control" bitfld.long 0x04 18.--23. " PM0_PERIOD ,PM0 Period" "4,8,12,16,20,24,28,32,36,40,44,48,52,56,60,64,68,72,76,80,84,88,92,96,100,104,108,112,116,120,124,128,132,136,140,144,148,152,156,160,164,168,172,176,180,184,188,192,196,200,204,208,212,216,220,224,228,232,236,240,244,248,252,256" hexmask.long.word 0x04 4.--17. 1. " PM0_CLOCK_DIVIDER ,PM0 Clock Divider" bitfld.long 0x04 0.--1. " PM0_CLOCK_SELECT ,PM0 Clock Select" "SCdiv output,Pixel,Line,Frame" line.long 0x08 "PM0_DUTY_CYCLE_0,PM0 Duty Cycle" hexmask.long.word 0x08 0.--8. 1. " PM0_DUTY_CYCLE ,PM0 Duty Cycle" group.long 0xC94++0x07 line.long 0x00 "SCRATCH_REGISTER_A_0,Scratch Register A" line.long 0x04 "SCRATCH_REGISTER_B_0,Scratch Register B" rgroup.long 0xCA4++0x03 line.long 0x00 "CRC_CHECKSUM_LATCHED_0,CRC Checksum latched" group.long 0xCA8++0x23 line.long 0x00 "CMU_CSC_KRR_0,CMU Color Space Conversion Matrix (KRR)" hexmask.long.word 0x00 0.--9. 1. " KRR ,KRR" line.long 0x04 "CMU_CSC_KGR_0,CMU Color Space Conversion Matrix (KGR)" hexmask.long.word 0x04 0.--9. 1. " KGR ,KGR" line.long 0x08 "CMU_CSC_KBR_0,CMU Color Space Conversion Matrix (KBR)" hexmask.long.word 0x08 0.--9. 1. " KBR ,KBR" line.long 0x0C "CMU_CSC_KRG_0,CMU Color Space Conversion Matrix (KRG)" hexmask.long.word 0x0c 0.--9. 1. " KRG ,KRG" line.long 0x10 "CMU_CSC_KGG_0,CMU Color Space Conversion Matrix (KGG)" hexmask.long.word 0x10 0.--9. 1. " KGG ,KGG" line.long 0x14 "CMU_CSC_KBG_0,CMU Color Space Conversion Matrix (KBG)" hexmask.long.word 0x14 0.--9. 1. " KBG ,KBG" line.long 0x18 "CMU_CSC_KRB_0,CMU Color Space Conversion Matrix (KRB)" hexmask.long.word 0x18 0.--9. 1. " KRB ,KRB" line.long 0x1C "CMU_CSC_KGB_0,CMU Color Space Conversion Matrix (KGB)" hexmask.long.word 0x1c 0.--9. 1. " KGB ,KGB" line.long 0x20 "CMU_CSC_KBB_0,CMU Color Space Conversion Matrix (KBB)" hexmask.long.word 0x20 0.--9. 1. " KBB ,KBB" group.long 0xCCC++0x03 line.long 0x00 "CMU_LUT_MASK_0,CMU LUT Mask" bitfld.long 0x00 8.--9. " LUT2_WR_MASK ,Color channel write mask" "All,Red,Green,Blue" bitfld.long 0x00 0.--1. " LUT1_WR_MASK ,Color channel write mask" "All,Red,Green,Blue" group.long 0xCD8++0x07 line.long 0x00 "CMU_LUT1_0,CMU LUT1" hexmask.long.word 0x00 16.--27. 1. " LUT1_DATA ,LUT1 DATA" hexmask.long.byte 0x00 0.--7. 1. " LUT1_ADDR ,LUT1 ADDR" line.long 0x04 "CMU_LUT2_0,CMU LUT2" hexmask.long.byte 0x04 16.--23. 1. " LUT2_DATA ,LUT2 DATA" hexmask.long.word 0x04 0.--9. 1. " LUT2_ADDR ,LUT2 ADDR" sif CPUIS("TEGRAX1") group.long 0xCF8++0x63 line.long 0x00 "DSC_TOP_CTL_0,DSC_TOP_CTL_0" hexmask.long.word 0x00 4.--19. 1. " DSC_TIMEOUT_COUNTER ,Timeout counter" bitfld.long 0x00 3. " DSC_AUTO_RESET ,Auto reset" "No reset,Reset" bitfld.long 0x00 2. " DSC_SLCG_OVERRIDE ,SLCG override" "No override,Override" textline " " bitfld.long 0x00 1. " DSC_ENABLE ,Enable" "Disabled,Enabled" bitfld.long 0x00 0. " DSC_SOFT_RESET ,Soft reset" "No reset,Reset" line.long 0x04 "DSC_DELAY_0,DSC_DELAY_0" hexmask.long.word 0x04 0.--15. 1. " DSC_OUTPUT_DELAY ,Delay" line.long 0x08 "DSC_COMMON_CTL_0,DSC_COMMON_CTL_0" hexmask.long.word 0x08 16.--31. 1. " DSC_CHUNK_SIZE ,Chunk size" bitfld.long 0x08 10. " DSC_BLOCK_PRED_ENABLE ,DSC_BLOCK_PRED_ENABLE" "Disabled,Enabled" hexmask.long.word 0x08 0.--9. 1. " DSC_BITS_PER_PIXEL ,Bits per pixel" line.long 0x0C "DSC_SLICE_INFO_0,DSC_SLICE_INFO_0" hexmask.long.word 0x0C 16.--31. 1. " DSC_SLICE_HEIGHT ,Slice height in pixels" hexmask.long.word 0x0C 0.--15. 1. " DSC_SLICE_WIDTH ,Slice width in pixels" line.long 0x10 "DSC_RC_DELAY_INFO_0,DSC_RC_DELAY_INFO_0" hexmask.long.word 0x10 16.--31. 1. " DSC_INITIAL_DEC_DELAY ,Number of pixels to delay the VLD" hexmask.long.word 0x10 0.--9. 1. " DSC_INITIAL_XMIT_DELAY ,Number of pixels to delay the initial transmission" line.long 0x14 "DSC_RC_SCALE_INFO_0,DSC_RC_SCALE_INFO_0" hexmask.long.word 0x14 6.--21. 1. " DSC_SCALE_DECR_INTERVAL ,Decrement scale factor every scale_decr_interval group" bitfld.long 0x14 0.--5. " DSC_INITIAL_SCALE_VALUE ,Initial value for scale factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "DSC_RC_SCALE_INFO_2_0,DSC_RC_SCALE_INFO_2_0" hexmask.long.word 0x18 0.--15. 1. " DSC_SCALE_INCR_INTERVAL ,Increment scale factor every scale_incr_interval group" line.long 0x1C "DSC_RC_BPGOFF_INFO_0,DSC_RC_BPGOFF_INFO_0" hexmask.long.word 0x1C 16.--31. 1. " DSC_RC_BPGOFF_INFO_0 ,BPG offset used to enforce slice bit constraint" hexmask.long.word 0x1C 0.--15. 1. " DSC_NFL_BPG_OFFSET ,Non-first line BPG offset to use" line.long 0x20 "DSC_RC_OFFSET_INFO_0,DSC_RC_OFFSET_INFO_0" hexmask.long.word 0x20 16.--31. 1. " DSC_FINAL_OFFSET ,Final RC linear transformation offset value" hexmask.long.word 0x20 1.--15. 1. " DSC_INITIAL_OFFSET ,Value to use for RC model offset at slice start" line.long 0x24 "DSC_RC_FLATNESS_INFO_0,DSC_RC_FLATNESS_INFO_0" hexmask.long.byte 0x24 10.--14. 0x4 " DSC_FIRST_LINE_BPG_OFFS ,BPG offset to use for first line of the slice" bitfld.long 0x24 5.--9. " DSC_FLATNESS_MAX_QP ,Maximum QP where flatness information is sent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--4. " DSC_FLATNESS_MIN_QP ,Minimum QP where flatness information is sent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "DSC_RC_PARAM_SET_0,DSC_RC_PARAM_SET_0" hexmask.long.byte 0x28 18.--21. 0x4 " DSC_RC_TGT_OFFSET_LO ,Offset to BPG used by RC to determine QP adjustment" hexmask.long.byte 0x28 14.--17. 0x40 " DSC_RC_TGT_OFFSET_HI ,Offset to BPG used by RC to determine QP adjustment" bitfld.long 0x28 9.--13. " DSC_RC_QUANT_INCR_LIMIT1 ,Slow down incrementing once the range reaches this value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x28 4.--8. " DSC_RC_QUANT_INCR_LIMIT0 ,Slow down incrementing once the range reaches this value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 0.--3. " DSC_RC_EDGE_FACTOR ,Factor to determine if an edge is present based on the bits produced" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "DSC_RC_BUF_THRESH0_0,DC_COM_DSC_RC_BUF_THRESH0_0" hexmask.long.byte 0x2C 24.--31. 1. " DSC_RC_BUF_THRESH1 ,Threshold1 defining the buffer ranges" hexmask.long.byte 0x2C 16.--23. 1. " DSC_RC_BUF_THRESH0 ,Threshold0 defining the buffer ranges" hexmask.long.word 0x2C 0.--15. 1. " DSC_RC_MODEL_SIZE ,Total size of RC model" line.long 0x30 "DSC_RC_BUF_THRESH1_0,DC_COM_DSC_RC_BUF_THRESH1_0" hexmask.long.byte 0x30 24.--31. 1. " DSC_RC_BUF_THRESH5 ,Threshold5 defining the buffer ranges" hexmask.long.byte 0x30 16.--23. 1. " DSC_RC_BUF_THRESH4 ,Threshold4 defining the buffer ranges" hexmask.long.byte 0x30 8.--15. 1. " DSC_RC_BUF_THRESH3 ,Threshold3 defining the buffer ranges" textline " " hexmask.long.byte 0x30 0.--7. 1. " DSC_RC_BUF_THRESH2 ,Threshold2 defining the buffer ranges" line.long 0x34 "DSC_RC_BUF_THRESH2_0,DSC_RC_BUF_THRESH2_0" hexmask.long.byte 0x34 24.--31. 1. " DSC_RC_BUF_THRESH9 ,Threshold9 defining the buffer ranges" hexmask.long.byte 0x34 16.--23. 1. " DSC_RC_BUF_THRESH8 ,Threshold8 defining the buffer ranges" hexmask.long.byte 0x34 8.--15. 1. " DSC_RC_BUF_THRESH7 ,Threshold7 defining the buffer ranges" textline " " hexmask.long.byte 0x34 0.--7. 1. " DSC_RC_BUF_THRESH6 ,Threshold6 defining the buffer ranges" line.long 0x38 "DSC_RC_BUF_THRESH3_0,DSC_RC_BUF_THRESH3_0" hexmask.long.byte 0x38 24.--31. 1. " DSC_RC_BUF_THRESH13 ,Threshold13 defining the buffer ranges" hexmask.long.byte 0x38 16.--23. 1. " DSC_RC_BUF_THRESH12 ,Threshold12 defining the buffer ranges" hexmask.long.byte 0x38 8.--15. 1. " DSC_RC_BUF_THRESH11 ,Threshold11 defining the buffer ranges" textline " " hexmask.long.byte 0x38 0.--7. 1. " DSC_RC_BUF_THRESH10 ,Threshold10 defining the buffer ranges" line.long 0x3C "DSC_RC_RANGE_CFG0_0,DSC_RC_RANGE_CFG0_0" hexmask.long.word 0x3C 16.--31. 1. " DSC_RC_RANGE_PARAM1 ,Parameters for RC range1" hexmask.long.word 0x3C 0.--15. 1. " DSC_RC_RANGE_PARAM0 ,Parameters for RC range0" line.long 0x40 "DSC_RC_RANGE_CFG1_0,DSC_RC_RANGE_CFG1_0" hexmask.long.word 0x40 16.--31. 1. " DSC_RC_RANGE_PARAM3 ,Parameters for RC range3" hexmask.long.word 0x40 0.--15. 1. " DSC_RC_RANGE_PARAM2 ,Parameters for RC range2" line.long 0x44 "DSC_RC_RANGE_CFG2_0,DSC_RC_RANGE_CFG2_0" hexmask.long.word 0x44 16.--31. 1. " DSC_RC_RANGE_PARAM5 ,Parameters for RC range5" hexmask.long.word 0x44 0.--15. 1. " DSC_RC_RANGE_PARAM4 ,Parameters for RC range4" line.long 0x48 "DSC_RC_RANGE_CFG3_0,DSC_RC_RANGE_CFG3_0" hexmask.long.word 0x48 16.--31. 1. " DSC_RC_RANGE_PARAM7 ,Parameters for RC range7" hexmask.long.word 0x48 0.--15. 1. " DSC_RC_RANGE_PARAM6 ,Parameters for RC range6" line.long 0x4C "DSC_RC_RANGE_CFG4_0,DSC_RC_RANGE_CFG4_0" hexmask.long.word 0x4C 16.--31. 1. " DSC_RC_RANGE_PARAM9 ,Parameters for RC range9" hexmask.long.word 0x4C 0.--15. 1. " DSC_RC_RANGE_PARAM8 ,Parameters for RC range8" line.long 0x50 "DSC_RC_RANGE_CFG5_0,DSC_RC_RANGE_CFG5_0" hexmask.long.word 0x50 16.--31. 1. " DSC_RC_RANGE_PARAM11 ,Parameters for RC range11" hexmask.long.word 0x50 0.--15. 1. " DSC_RC_RANGE_PARAM10 ,Parameters for RC range10" line.long 0x54 "DSC_RC_RANGE_CFG6_0,DSC_RC_RANGE_CFG6_0" hexmask.long.word 0x54 16.--31. 1. " DSC_RC_RANGE_PARAM13 ,Parameters for RC range13" hexmask.long.word 0x54 0.--15. 1. " DSC_RC_RANGE_PARAM12 ,Parameters for RC range12" line.long 0x58 "DSC_RC_RANGE_CFG7_0,DSC_RC_RANGE_CFG7_0" hexmask.long.word 0x58 16.--31. 1. " DSC_RC_RANGE_PARAM15 ,Parameters for RC range15" hexmask.long.word 0x58 0.--15. 1. " DSC_RC_RANGE_PARAM14 ,Parameters for RC range14" line.long 0x5C "DSC_UNIT_SET_0,DSC_UNIT_SET_0" bitfld.long 0x5C 2. " DSC_LINEBUF_DEPTH ,Line buffer depth" "9 bits,8 bits" bitfld.long 0x5C 0.--1. " DSC_SLICE_NUM_MINUS1_IN_LINE ,The slice number in the line" "1,2,3,4" line.long 0x60 "DSC_CRC_CONTROL_0,DSC_CRC_CONTROL_0" bitfld.long 0x60 1. " DSC_CRC_ALWAYS ,CRC ALWAYS" "Disabled,Enabled" bitfld.long 0x60 0. " DSC_CRC_ENABLE ,CRC Enable" "Disabled,Enabled" rgroup.long 0xD5C++0x0B line.long 0x00 "DSC_CRC_CHECKSUM_0,CRC Checksum latched" line.long 0x04 "DSC_STATUS_0,DC_COM_DSC_STATUS_0" bitfld.long 0x04 16.--17. " DSC_STATUS_SLICEID ,Slice ID" "0,1,2,3" hexmask.long.word 0x04 0.--15. 1. " DSC_STATUS_HINDEX ,Horizontal index" line.long 0x08 "DSC_STATUS_2_0,DSC_STATUS_2_0" bitfld.long 0x08 16. " DSC_STATUS_BUSY ,Busy" "Not busy,Busy" hexmask.long.word 0x08 0.--15. 1. " DSC_STATUS_VINDEX ,Vertical index" endif tree.end width 35. tree "Display DISP Registers" group.long 0x1000++0x03 line.long 0x00 "DISP_SIGNAL_OPTIONS0_0,Display Signal Options 0" bitfld.long 0x00 26. " M1_ENABLE ,M1 Enable" "Disabled,Enabled" bitfld.long 0x00 24. " M0_ENABLE ,M0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " V_PULSE3_ENABLE ,V Pulse 3 Enable" "Disabled,Enabled" bitfld.long 0x00 19. " V_PULSE2_ENABLE ,V Pulse 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " V_PULSE1_ENABLE ,V Pulse 1 Enable" "Disabled,Enabled" bitfld.long 0x00 16. " V_PULSE0_ENABLE ,V Pulse 0 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " H_PULSE2_ENABLE ,H Pulse 2 Enable" "Disabled,Enabled" bitfld.long 0x00 10. " H_PULSE1_ENABLE ,H Pulse 1 Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " H_PULSE0_ENABLE ,H Pulse 0 Enable" "Disabled,Enabled" group.long 0x1008++0x03 line.long 0x00 "DISP_WIN_OPTIONS_0,Display Window Options" sif CPUIS("TEGRAK1") bitfld.long 0x00 30. " HDMI_ENABLE ,HDMI interface" "Disabled,Enabled" textline " " endif bitfld.long 0x00 29. " DSI_ENABLE ,MIPI Display Serial Interface Enable" "Disabled,Enabled" textline " " sif CPUIS("TEGRAX1") bitfld.long 0x00 27. " SOR1_TIMING_CYA ,HDMI expects a delayed vsync and preamble compared to DP" "DP,HDMI" bitfld.long 0x00 26. " SOR1_ENABLE ,SOR1 interface - DP/HDMI" "Disabled,Enabled" textline " " endif bitfld.long 0x00 25. " SOR_ENABLE ,SOR Enable" "Disabled,Enabled" bitfld.long 0x00 16. " CURSOR_ENABLE ,Cursor Enable" "Disabled,Enabled" textline " " group.long 0x1014++0x1B line.long 0x00 "DISP_TIMING_OPTIONS_0,Display Timing Options" hexmask.long.word 0x00 0.--12. 1. " VSYNC_H_POSITION ,VSYNC Horizontal Position" line.long 0x04 "REF_TO_SYNC_0,H/V Reference to Sync" hexmask.long.word 0x04 16.--28. 1. " V_REF_TO_SYNC ,V reference to VSYNC" hexmask.long.word 0x04 0.--12. 1. " H_REF_TO_SYNC ,H reference to HSYNC" line.long 0x08 "SYNC_WIDTH_0,H/V SYNC Pulse Width" hexmask.long.word 0x08 16.--28. 1. " V_SYNC_WIDTH ,VSYNC pulse width" hexmask.long.word 0x08 0.--12. 1. " H_SYNC_WIDTH ,HSYNC pulse width" line.long 0x0C "BACK_PORCH_0,H/V Back Porch" hexmask.long.word 0x0C 16.--28. 1. " V_BACK_PORCH ,V back porch" hexmask.long.word 0x0C 0.--12. 1. " H_BACK_PORCH ,H back porch" line.long 0x10 "DISP_ACTIVE_0,H/V Display Active width" hexmask.long.word 0x10 16.--28. 1. " V_DISP_ACTIVE ,V display active width" hexmask.long.word 0x10 0.--12. 1. " H_DISP_ACTIVE ,H display active width" line.long 0x14 "FRONT_PORCH_0,H/V Front Porch" hexmask.long.word 0x14 16.--28. 1. " V_FRONT_PORCH ,VSYNC front porch" hexmask.long.word 0x14 0.--12. 1. " H_FRONT_PORCH ,VSYNC front porch" line.long 0x18 "H_PULSE0_CONTROL_0,H Pulse 0 Control" bitfld.long 0x18 8.--11. " H_PULSE0_LAST ,H Pulse 0 Last point" "Start A,End A,Start B,End B,Start C,End C,Start D,End D,?..." bitfld.long 0x18 6.--7. " H_PULSE0_V_QUAL ,H Pulse 0 Vertical Qualifier" "Always,,V active,V active+1" textline " " bitfld.long 0x18 4. " H_PULSE0_POLARITY ,H Pulse 0 Polarity" "High,Low" bitfld.long 0x18 3. " H_PULSE0_MODE ,H Pulse 0 Mode" "Normal,Single-clock" group.long 0x1030++0x03 line.long 0x00 "H_PULSE0_POSITION_A_0,H Pulse 0 Position A" hexmask.long.word 0x00 16.--28. 1. " H_PULSE0_END_A ,H Pulse 0 End A" hexmask.long.word 0x00 0.--12. 1. " H_PULSE0_START_A ,H Pulse 0 Start A" group.long 0x1034++0x03 line.long 0x00 "H_PULSE0_POSITION_B_0,H Pulse 0 Position B" hexmask.long.word 0x00 16.--28. 1. " H_PULSE0_END_B ,H Pulse 0 End B" hexmask.long.word 0x00 0.--12. 1. " H_PULSE0_START_B ,H Pulse 0 Start B" group.long 0x1038++0x03 line.long 0x00 "H_PULSE0_POSITION_C_0,H Pulse 0 Position C" hexmask.long.word 0x00 16.--28. 1. " H_PULSE0_END_C ,H Pulse 0 End C" hexmask.long.word 0x00 0.--12. 1. " H_PULSE0_START_C ,H Pulse 0 Start C" group.long 0x103C++0x03 line.long 0x00 "H_PULSE0_POSITION_D_0,H Pulse 0 Position D" hexmask.long.word 0x00 16.--28. 1. " H_PULSE0_END_D ,H Pulse 0 End D" hexmask.long.word 0x00 0.--12. 1. " H_PULSE0_START_D ,H Pulse 0 Start D" group.long 0x1040++0x03 line.long 0x00 "H_PULSE1_CONTROL_0,H Pulse 1 Control" bitfld.long 0x00 8.--11. " H_PULSE1_LAST ,H Pulse 1 Last point" "Start A,End A,Start B,End B,Start C,End C,Start D,End D,?..." bitfld.long 0x00 6.--7. " H_PULSE1_V_QUAL ,H Pulse 1 Vertical Qualifier" "Always,,V active,V active+1" textline " " bitfld.long 0x00 4. " H_PULSE1_POLARITY ,H Pulse 1 Polarity" "High,Low" bitfld.long 0x00 3. " H_PULSE1_MODE ,H Pulse 1 Mode" "Normal,Single-clock" group.long 0x1044++0x03 line.long 0x00 "H_PULSE1_POSITION_A_0,H Pulse 1 Position A" hexmask.long.word 0x00 16.--28. 1. " H_PULSE1_END_A ,H Pulse 1 End A" hexmask.long.word 0x00 0.--12. 1. " H_PULSE1_START_A ,H Pulse 1 Start A" group.long 0x1048++0x03 line.long 0x00 "H_PULSE1_POSITION_B_0,H Pulse 1 Position B" hexmask.long.word 0x00 16.--28. 1. " H_PULSE1_END_B ,H Pulse 1 End B" hexmask.long.word 0x00 0.--12. 1. " H_PULSE1_START_B ,H Pulse 1 Start B" group.long 0x104C++0x03 line.long 0x00 "H_PULSE1_POSITION_C_0,H Pulse 1 Position C" hexmask.long.word 0x00 16.--28. 1. " H_PULSE1_END_C ,H Pulse 1 End C" hexmask.long.word 0x00 0.--12. 1. " H_PULSE1_START_C ,H Pulse 1 Start C" group.long 0x1050++0x03 line.long 0x00 "H_PULSE1_POSITION_D_0,H Pulse 1 Position D" hexmask.long.word 0x00 16.--28. 1. " H_PULSE1_END_D ,H Pulse 1 End D" hexmask.long.word 0x00 0.--12. 1. " H_PULSE1_START_D ,H Pulse 1 Start D" group.long 0x1054++0x03 line.long 0x00 "H_PULSE2_CONTROL_0,H Pulse 2 Control" bitfld.long 0x00 8.--11. " H_PULSE2_LAST ,H Pulse 2 Last point" "Start A,End A,Start B,End B,Start C,End C,Start D,End D,?..." bitfld.long 0x00 6.--7. " H_PULSE2_V_QUAL ,H Pulse 2 Vertical Qualifier" "Always,,V active,V active+1" textline " " bitfld.long 0x00 4. " H_PULSE2_POLARITY ,H Pulse 2 Polarity" "High,Low" bitfld.long 0x00 3. " H_PULSE2_MODE ,H Pulse 2 Mode" "Normal,Single-clock" group.long 0x1058++0x03 line.long 0x00 "H_PULSE2_POSITION_A_0,H Pulse 2 Position A" hexmask.long.word 0x00 16.--28. 1. " H_PULSE2_END_A ,H Pulse 2 End A" hexmask.long.word 0x00 0.--12. 1. " H_PULSE2_START_A ,H Pulse 2 Start A" group.long 0x105C++0x03 line.long 0x00 "H_PULSE2_POSITION_B_0,H Pulse 2 Position B" hexmask.long.word 0x00 16.--28. 1. " H_PULSE2_END_B ,H Pulse 2 End B" hexmask.long.word 0x00 0.--12. 1. " H_PULSE2_START_B ,H Pulse 2 Start B" group.long 0x1060++0x03 line.long 0x00 "H_PULSE2_POSITION_C_0,H Pulse 2 Position C" hexmask.long.word 0x00 16.--28. 1. " H_PULSE2_END_C ,H Pulse 2 End C" hexmask.long.word 0x00 0.--12. 1. " H_PULSE2_START_C ,H Pulse 2 Start C" group.long 0x1064++0x03 line.long 0x00 "H_PULSE2_POSITION_D_0,H Pulse 2 Position D" hexmask.long.word 0x00 16.--28. 1. " H_PULSE2_END_D ,H Pulse 2 End D" hexmask.long.word 0x00 0.--12. 1. " H_PULSE2_START_D ,H Pulse 2 Start D" group.long 0x1068++0x03 line.long 0x00 "V_PULSE0_CONTROL_0,V Pulse 0 Control" hexmask.long.word 0x00 16.--28. 1. " V_PULSE0_H_POSITION ,V Pulse 0 Horizontal Position" bitfld.long 0x00 8.--11. " V_PULSE0_LAST ,V Pulse 0 Last point" "Start A,End A,Start B,End B,Start C,End C,?..." textline " " bitfld.long 0x00 6.--7. " V_PULSE0_DELAY ,V Pulse 0 Delay" "No delay,1-line delay,2-line delay,?..." bitfld.long 0x00 4. " V_PULSE0_POLARITY ,V Pulse 0 Polarity" "High,Low" group.long 0x106C++0x03 line.long 0x00 "V_PULSE0_POSITION_A_0,H Pulse 0 Position A" hexmask.long.word 0x00 16.--28. 1. " V_PULSE0_END_A ,V Pulse 0 End A" hexmask.long.word 0x00 0.--12. 1. " V_PULSE0_START_A ,V Pulse 0 Start A" group.long 0x1070++0x03 line.long 0x00 "V_PULSE0_POSITION_B_0,H Pulse 0 Position B" hexmask.long.word 0x00 16.--28. 1. " V_PULSE0_END_B ,V Pulse 0 End B" hexmask.long.word 0x00 0.--12. 1. " V_PULSE0_START_B ,V Pulse 0 Start B" group.long 0x1074++0x03 line.long 0x00 "V_PULSE0_POSITION_C_0,H Pulse 0 Position C" hexmask.long.word 0x00 16.--28. 1. " V_PULSE0_END_C ,V Pulse 0 End C" hexmask.long.word 0x00 0.--12. 1. " V_PULSE0_START_C ,V Pulse 0 Start C" group.long 0x1078++0x03 line.long 0x00 "V_PULSE1_CONTROL_0,V Pulse 1 Control" hexmask.long.word 0x00 16.--28. 1. " V_PULSE1_H_POSITION ,V Pulse 1 Horizontal Position" bitfld.long 0x00 8.--11. " V_PULSE1_LAST ,V Pulse 1 Last point" "Start A,End A,Start B,End B,Start C,End C,?..." textline " " bitfld.long 0x00 6.--7. " V_PULSE1_DELAY ,V Pulse 1 Delay" "No delay,1-line delay,2-line delay,?..." bitfld.long 0x00 4. " V_PULSE1_POLARITY ,V Pulse 1 Polarity" "High,Low" group.long 0x107C++0x03 line.long 0x00 "V_PULSE1_POSITION_A_0,H Pulse 1 Position A" hexmask.long.word 0x00 16.--28. 1. " V_PULSE1_END_A ,V Pulse 1 End A" hexmask.long.word 0x00 0.--12. 1. " V_PULSE1_START_A ,V Pulse 1 Start A" group.long 0x1080++0x03 line.long 0x00 "V_PULSE1_POSITION_B_0,H Pulse 1 Position B" hexmask.long.word 0x00 16.--28. 1. " V_PULSE1_END_B ,V Pulse 1 End B" hexmask.long.word 0x00 0.--12. 1. " V_PULSE1_START_B ,V Pulse 1 Start B" group.long 0x1084++0x03 line.long 0x00 "V_PULSE1_POSITION_C_0,H Pulse 1 Position C" hexmask.long.word 0x00 16.--28. 1. " V_PULSE1_END_C ,V Pulse 1 End C" hexmask.long.word 0x00 0.--12. 1. " V_PULSE1_START_C ,V Pulse 1 Start C" group.long 0x1088++0x0F line.long 0x00 "V_PULSE2_CONTROL_0,V Pulse 2 Control" hexmask.long.word 0x00 16.--28. 1. " V_PULSE2_H_POSITION ,V Pulse 2 Horizontal Position" bitfld.long 0x00 8. " V_PULSE2_LAST ,V Pulse 2 Last point" "Start A,End A" textline " " bitfld.long 0x00 4. " V_PULSE2_POLARITY ,V Pulse 2 Polarity" "High,Low" line.long 0x04 "V_PULSE2_POSITION_A_0,H Pulse 2 Position A" hexmask.long.word 0x04 16.--28. 1. " V_PULSE2_END_A ,V Pulse 2 End A" hexmask.long.word 0x04 0.--12. 1. " V_PULSE2_START_A ,V Pulse 2 Start A" line.long 0x08 "V_PULSE3_CONTROL_0,V Pulse 3 Control" hexmask.long.word 0x08 16.--28. 1. " V_PULSE3_H_POSITION ,V Pulse 3 Horizontal Position" bitfld.long 0x08 8. " V_PULSE3_LAST ,V Pulse 3 Last point" "Start A,End A" textline " " bitfld.long 0x08 4. " V_PULSE3_POLARITY ,V Pulse 3 Polarity" "High,Low" line.long 0x0C "V_PULSE3_POSITION_A_0,H Pulse 3 Position A" hexmask.long.word 0x0C 16.--28. 1. " V_PULSE3_END_A ,V Pulse 3 End A" hexmask.long.word 0x0C 0.--12. 1. " V_PULSE3_START_A ,V Pulse 3 Start A" textline " " group.long 0x10B8++0x07 line.long 0x00 "DISP_CLOCK_CONTROL_0,Display Clock Control" bitfld.long 0x00 8.--11. " PIXEL_CLK_DIVIDER ,Pixel Clock Divider" "/1,/1.5,/2,/3,/4,/6,/8,/9,/12,/16,/18,/24,/13,?..." hexmask.long.byte 0x00 0.--7. 1. " SHIFT_CLK_DIVIDER ,Shift Clock Divider" line.long 0x04 "DISP_INTERFACE_CONTROL_0,Display Interface Control" bitfld.long 0x04 9. " DISP_DATA_ORDER ,Display Data Order" "RED_BLUE,BLUE_RED" bitfld.long 0x04 8. " DISP_DATA_ALIGNMENT ,Display Data Alignment" "MSB,LSB" textline " " bitfld.long 0x04 0.--3. " DISP_DATA_FORMAT ,Display Data Format Pixel Clock Divider" "DF1P1C,DF1P2C24B,DF1P2C18B,DF1P2C16B,DF1S,DF2S,DF3S,DFSPI,DF1P3C24B,DF2P1C18B,DFDUAL1P1C18B,?..." group.long 0x10C0++0x03 line.long 0x00 "DISP_COLOR_CONTROL_0,Display Color Control" sif CPUIS("TEGRAK1") bitfld.long 0x00 27. " LCD_MD3 ,LCD Mode 3 signal" "Low,High" bitfld.long 0x00 26. " LCD_MD2 ,LCD Mode 2 signal" "Low,High" textline " " bitfld.long 0x00 25. " LCD_MD1 ,LCD Mode 1 signal" "Low,High" bitfld.long 0x00 24. " LCD_MD0 ,LCD Mode 0 signal" "Low,High" textline " " endif bitfld.long 0x00 20. " CMU_ENABLE ,CMU_ENABLE" "Disabled,Enabled" bitfld.long 0x00 18. " NON_BASE_COLOR ,Non Base Color" "Zeros,Ones" textline " " bitfld.long 0x00 17. " BLANK_COLOR ,Blank Color" "Zeros,Ones" bitfld.long 0x00 16. " DISP_COLOR_SWAP ,Display Color Swap" "RGB,BGR" textline " " bitfld.long 0x00 12.--13. " ORD_DITHER_ROTATION ,Ordered Dither Frame Rotation" "0,1,2,3" bitfld.long 0x00 8.--9. " DITHER_CONTROL ,Dither Control" "Disabled,,Ordered,Temporal" textline " " bitfld.long 0x00 6.--7. " TEMPORAL_DITHER_PHASE ,Temporal dither LFSR phase control" "Previous val,34'H3FFFFFFFF,34'H155555555,34'H2AAAAAAAA" bitfld.long 0x00 0.--3. " BASE_COLOR_SIZE ,Display Base Color Size" "BASE666,BASE111,BASE222,BASE333,BASE444,BASE555,BASE565,BASE332,BASE888,?..." textline " " group.long 0x10D8++0x0F line.long 0x00 "COLOR_KEY0_LOWER_0,Color Key 0 Lower value" hexmask.long.byte 0x00 24.--31. 1. " COLOR_KEY0_L_A ,Color Key 0 Alpha (0xFF) Lower value" hexmask.long.byte 0x00 16.--23. 1. " COLOR_KEY0_L_B ,Color Key 0 Blue (U) Lower value" textline " " hexmask.long.byte 0x00 8.--15. 1. " COLOR_KEY0_L_G ,Color Key 0 Green (Y) Lower value" hexmask.long.byte 0x00 0.--7. 1. " COLOR_KEY0_L_R ,Color Key 0 Red (V) Lower value" line.long 0x04 "COLOR_KEY0_UPPER_0,Color Key 0 Upper value" hexmask.long.byte 0x04 24.--31. 1. " COLOR_KEY0_U_A ,Color Key 0 Alpha (0xFF) Upper value" hexmask.long.byte 0x04 16.--23. 1. " COLOR_KEY0_U_B ,Color Key 0 Blue (U) Upper value" textline " " hexmask.long.byte 0x04 8.--15. 1. " COLOR_KEY0_U_G ,Color Key 0 Green (Y) Upper value" hexmask.long.byte 0x04 0.--7. 1. " COLOR_KEY0_U_R ,Color Key 0 Red (V) Upper value" line.long 0x08 "COLOR_KEY1_LOWER_0,Color Key 1 Lower value" hexmask.long.byte 0x08 24.--31. 1. " COLOR_KEY1_L_A ,Color Key 1 Alpha (0xFF) Lower value" hexmask.long.byte 0x08 16.--23. 1. " COLOR_KEY1_L_B ,Color Key 1 Blue (U) Lower value" textline " " hexmask.long.byte 0x08 8.--15. 1. " COLOR_KEY1_L_G ,Color Key 1 Green (Y) Lower value" hexmask.long.byte 0x08 0.--7. 1. " COLOR_KEY1_L_R ,Color Key 1 Red (V) Lower value" line.long 0x0C "COLOR_KEY1_UPPER_0,Color Key 1 Upper value" hexmask.long.byte 0x0C 24.--31. 1. " COLOR_KEY1_U_A ,Color Key 1 Alpha (0xFF) Upper value" hexmask.long.byte 0x0C 16.--23. 1. " COLOR_KEY1_U_B ,Color Key 1 Blue (U) Upper value" textline " " hexmask.long.byte 0x0C 8.--15. 1. " COLOR_KEY1_U_G ,Color Key 1 Green (Y) Upper value" hexmask.long.byte 0x0C 0.--7. 1. " COLOR_KEY1_U_R ,Color Key 1 Red (V) Upper value" group.long 0x10F0++0x0B line.long 0x00 "CURSOR_FOREGROUND_0,Cursor Foreground color" hexmask.long.byte 0x00 16.--23. 1. " CURSOR_FOREGROUND_B ,Cursor Blue Foreground Color" hexmask.long.byte 0x00 8.--15. 1. " CURSOR_FOREGROUND_G ,Cursor Green Foreground Color" textline " " hexmask.long.byte 0x00 0.--7. 1. " CURSOR_FOREGROUND_R ,Cursor Red Foreground Color" line.long 0x04 "CURSOR_BACKGROUND_0,Cursor Background color" hexmask.long.byte 0x04 16.--23. 1. " CURSOR_BACKGROUND_B ,Cursor Blue Background Color" hexmask.long.byte 0x04 8.--15. 1. " CURSOR_BACKGROUND_G ,Cursor Green Background Color" textline " " hexmask.long.byte 0x04 0.--7. 1. " CURSOR_BACKGROUND_R ,Cursor Red Background Color" textline " " line.long 0x08 "CURSOR_START_ADDR_0,Cursor Start Address" bitfld.long 0x08 28.--29. " CURSOR_CLIPPING ,Cursor Clipping Select" "Display,Window A,Window B,Window C" bitfld.long 0x08 24.--25. " CURSOR_SIZE ,Cursor Size" "C32x32,C64x64,C128X128,C256X256" textline " " hexmask.long.tbyte 0x08 0.--21. 1. " CURSOR_START_ADDR ,Cursor Start Address bits" sif CPUIS("TEGRAK1") group.long 0x10FC++0x03 line.long 0x00 "CURSOR_START_ADDR_NS_0,Shadow of Cursor Start Address" bitfld.long 0x00 28.--29. " CURSOR_CLIPPING_NS ,Cursor Clipping Select" "Display,Window A,Window B,Window C" bitfld.long 0x00 24.--25. " CURSOR_SIZE_NS ,Cursor Size" "32x32,64x64,C128X128,C256X256" textline " " hexmask.long.tbyte 0x00 0.--21. 1. " CURSOR_START_ADDR_NS ,Cursor Start Address bits" endif group.long 0x1100++0x03 line.long 0x00 "CURSOR_POSITION_0,Cursor Position" hexmask.long.word 0x00 16.--29. 1. " V_CURSOR_POSITION ,V cursor position" hexmask.long.word 0x00 0.--13. 1. " H_CURSOR_POSITION ,H cursor position" sif CPUIS("TEGRAK1") group.long 0x1104++0x03 line.long 0x00 "CURSOR_POSITION_NS_0,Shadow of Cursor Position" hexmask.long.word 0x00 16.--29. 1. " V_CURSOR_POSITION_NS ,V cursor position" hexmask.long.word 0x00 0.--13. 1. " H_CURSOR_POSITION_NS ,H cursor position" endif group.long 0x1200++0x03 line.long 0x00 "DC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control Register" bitfld.long 0x00 20. " DC_RCLK_OVR_MODE ,DC_RCLK_OVERRIDE" "LEGACY,ON" bitfld.long 0x00 19. " DC_WCLK_OVR_MODE ,DC_WCLK_OVERRIDE" "LEGACY,ON" textline " " bitfld.long 0x00 18. " DC_CCLK_OVERRIDE ,DC_CCLK_OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 17. " DC_RCLK_OVERRIDE ,DC_RCLK_OVERRIDE" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " DC_WCLK_OVERRIDE ,DC_WCLK_OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 3. " DC_MCCIF_RDCL_RDFAST ,DC_MCCIF_RDCL_RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DC_MCCIF_WRMC_CLLE2X ,DC_MCCIF_WRMC_CLLE2X" "Disabled,Enabled" bitfld.long 0x00 1. " DC_MCCIF_RDMC_RDFAST ,DC_MCCIF_RDMC_RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DC_MCCIF_WRCL_MCLE2X ,DC_MCCIF_WRCL_MCLE2X" "Disabled,Enabled" textline " " group.long 0x1204++0x03 line.long 0x00 "MCCIF_DISPLAY0A_HYST_0,Memory Client Hysteresis Control Register" eventfld.long 0x00 31. " CBR_DISPLAY0A2MC_HYST_EN ,CBR_DISPLAY0A2MC_HYST_EN" "Disabled,Enabled" bitfld.long 0x00 28.--30. " CBR_DISPLAY0A2MC_HYST_REQ_TH ,CBR_DISPLAY0A2MC_HYST_REQ_TH" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 24.--27. " CBR_DISPLAY0A2MC_HYST_TM ,CBR_DISPLAY0A2MC_HYST_TM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " CBR_DISPLAY0A2MC_DHYST_TH ,CBR_DISPLAY0A2MC_DHYST_TH" textline " " hexmask.long.byte 0x00 8.--15. 1. " CBR_DISPLAY0A2MC_DHYST_TM ,CBR_DISPLAY0A2MC_DHYST_TM" hexmask.long.byte 0x00 0.--7. 1. " CBR_DISPLAY0A2MC_HYST_REQ_TM ,CBR_DISPLAY0A2MC_HYST_REQ_TM" group.long 0x1208++0x03 line.long 0x00 "MCCIF_DISPLAY0B_HYST_0,Memory Client Hysteresis Control Register" eventfld.long 0x00 31. " CBR_DISPLAY0B2MC_HYST_EN ,CBR_DISPLAY0B2MC_HYST_EN" "Disabled,Enabled" bitfld.long 0x00 28.--30. " CBR_DISPLAY0B2MC_HYST_REQ_TH ,CBR_DISPLAY0B2MC_HYST_REQ_TH" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 24.--27. " CBR_DISPLAY0B2MC_HYST_TM ,CBR_DISPLAY0B2MC_HYST_TM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " CBR_DISPLAY0B2MC_DHYST_TH ,CBR_DISPLAY0B2MC_DHYST_TH" textline " " hexmask.long.byte 0x00 8.--15. 1. " CBR_DISPLAY0B2MC_DHYST_TM ,CBR_DISPLAY0B2MC_DHYST_TM" hexmask.long.byte 0x00 0.--7. 1. " CBR_DISPLAY0B2MC_HYST_REQ_TM ,CBR_DISPLAY0B2MC_HYST_REQ_TM" group.long 0x120C++0x03 line.long 0x00 "MCCIF_DISPLAY0C_HYST_0,Memory Client Hysteresis Control Register" eventfld.long 0x00 31. " CBR_DISPLAY0C2MC_HYST_EN ,CBR_DISPLAY0C2MC_HYST_EN" "Disabled,Enabled" bitfld.long 0x00 28.--30. " CBR_DISPLAY0C2MC_HYST_REQ_TH ,CBR_DISPLAY0C2MC_HYST_REQ_TH" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 24.--27. " CBR_DISPLAY0C2MC_HYST_TM ,CBR_DISPLAY0C2MC_HYST_TM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " CBR_DISPLAY0C2MC_DHYST_TH ,CBR_DISPLAY0C2MC_DHYST_TH" textline " " hexmask.long.byte 0x00 8.--15. 1. " CBR_DISPLAY0C2MC_DHYST_TM ,CBR_DISPLAY0C2MC_DHYST_TM" hexmask.long.byte 0x00 0.--7. 1. " CBR_DISPLAY0C2MC_HYST_REQ_TM ,CBR_DISPLAY0C2MC_HYST_REQ_TM" textline " " group.long 0x1304++0x03 line.long 0x00 "DISP_MISC_CONTROL_0,Miscellaneous controls" eventfld.long 0x00 1. " UF_LINE_FLUSH ,Enable underflow line flush" "Disabled,Enabled" bitfld.long 0x00 0. " PHASE_SHIFT_2P1C18B ,Enable phase shift for 2P1C format" "Disabled,Enabled" group.long 0x1308++0x03 line.long 0x00 "SD_CONTROL_0,PRISM 3 Control" bitfld.long 0x00 29.--30. " K_INIT_BIAS ,BIAS of the initial K bias MSB of count" "BIAS0,BIAS1,BIAS_HALF,BIAS_MSB" bitfld.long 0x00 28. " SD_FRAME_PROC_CONTROL ,Run per-frame processing" "VSYNC,VPULSE2" textline " " bitfld.long 0x00 15. " SMOOTH_K_ENABLE ,Enable maximum raw K change per frame is limited to SMOOTH_K_INCR" "Disabled,Enabled" eventfld.long 0x00 14. " SOFT_CLIPPING_ENABLE ,Enable enhancement gain is reduced for pixels above SOFT_CLIPPING_THRESHOLD level" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " SD_WINDOW_ENABLE ,Enable constrain histogram to a rectangular subset of display" "Disabled,Enabled" bitfld.long 0x00 12. " K_LIMIT_ENABLE ,Enable Max K is taken from K_LIMIT register" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " SD_CORRECTION_MODE ,Determines which K values are used to modify the pixel values" "AUTO_CORRECT,MANUAL" bitfld.long 0x00 10. " SD_ONE_SHOT ,Enables the PRISM 3 function for one frame only" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " HW_UPDATE_DLY ,Determines the delay" "No delay,1 frame,2 frame,3 frame" bitfld.long 0x00 5.--7. " AGGRESSIVENESS ,The aggressiveness level of the PRISM 3 algorithm" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 3.--4. " BIN_WIDTH ,Width of the Histogram bins in quantization levels" "1,2,4,8" bitfld.long 0x00 2. " USE_VID_LUMA ,Use Video Luminance control of luminance" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " SD_ENABLE ,Enables the PRISM 3 Function" "Disabled,Enabled,ONE_SHOT,?..." sif CPUIS("TEGRAX1") group.long 0x130C++0x03 line.long 0x00 "SD_CSC_COEFF_0,SD_CSC_COEFF_0" bitfld.long 0x00 20.--23. " B_COEFF ,Blue coefficient for luminance calculation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " G_COEFF ,Green coefficient for luminance calculation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " R_COEFF ,Red coefficient for luminance calculation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x1310++0x03 line.long 0x00 "SD_LUT_0,SD_LUT_0" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" group.long 0x1314++0x03 line.long 0x00 "SD_LUT_1,SD_LUT_1" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" group.long 0x1318++0x03 line.long 0x00 "SD_LUT_2,SD_LUT_2" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" group.long 0x131C++0x03 line.long 0x00 "SD_LUT_3,SD_LUT_3" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" group.long 0x1320++0x03 line.long 0x00 "SD_LUT_4,SD_LUT_4" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" group.long 0x1324++0x03 line.long 0x00 "SD_LUT_5,SD_LUT_5" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" group.long 0x1328++0x03 line.long 0x00 "SD_LUT_6,SD_LUT_6" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" group.long 0x132C++0x03 line.long 0x00 "SD_LUT_7,SD_LUT_7" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" group.long 0x1330++0x03 line.long 0x00 "SD_LUT_8,SD_LUT_8" hexmask.long.byte 0x00 16.--23. 1. " B_LUT ,Blue Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 8.--15. 1. " G_LUT ,Green Enhancement value (k) Look Up Table" hexmask.long.byte 0x00 0.--7. 1. " R_LUT ,Red Enhancement value (k) Look Up Table" textline " " group.long 0x1334++0x07 line.long 0x00 "SD_FLICKER_CONTROL_0,Flicker Reduction Control Register" hexmask.long.byte 0x00 8.--15. 1. " THRESHOLD ,The amount by which the currently calculated enhancement value must deviate" hexmask.long.byte 0x00 0.--7. 1. " TIME_LIMIT ,Length of time - in frames - that the enhancement value must deviate" line.long 0x04 "SD_PIXEL_COUNT_0,Status / debug register showing the total number of active pixels" hexmask.long.word 0x04 0.--15. 1. " NUM_PIXELS ,Number of pixels in the preceding output frame" textline " " group.long 0x133C++0x03 line.long 0x00 "SD_HISTOGRAM_0,SD_HISTOGRAM_0" hexmask.long.byte 0x00 24.--31. 1. " BIN_3 ,BIN_3" hexmask.long.byte 0x00 16.--23. 1. " BIN_2 ,BIN_2" hexmask.long.byte 0x00 8.--15. 1. " BIN_1 ,BIN_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " BIN_0 ,BIN_0" group.long 0x1340++0x03 line.long 0x00 "SD_HISTOGRAM_1,SD_HISTOGRAM_1" hexmask.long.byte 0x00 24.--31. 1. " BIN_3 ,BIN_3" hexmask.long.byte 0x00 16.--23. 1. " BIN_2 ,BIN_2" hexmask.long.byte 0x00 8.--15. 1. " BIN_1 ,BIN_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " BIN_0 ,BIN_0" group.long 0x1344++0x03 line.long 0x00 "SD_HISTOGRAM_2,SD_HISTOGRAM_2" hexmask.long.byte 0x00 24.--31. 1. " BIN_3 ,BIN_3" hexmask.long.byte 0x00 16.--23. 1. " BIN_2 ,BIN_2" hexmask.long.byte 0x00 8.--15. 1. " BIN_1 ,BIN_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " BIN_0 ,BIN_0" group.long 0x1348++0x03 line.long 0x00 "SD_HISTOGRAM_3,SD_HISTOGRAM_3" hexmask.long.byte 0x00 24.--31. 1. " BIN_3 ,BIN_3" hexmask.long.byte 0x00 16.--23. 1. " BIN_2 ,BIN_2" hexmask.long.byte 0x00 8.--15. 1. " BIN_1 ,BIN_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " BIN_0 ,BIN_0" group.long 0x134C++0x03 line.long 0x00 "SD_HISTOGRAM_4,SD_HISTOGRAM_4" hexmask.long.byte 0x00 24.--31. 1. " BIN_3 ,BIN_3" hexmask.long.byte 0x00 16.--23. 1. " BIN_2 ,BIN_2" hexmask.long.byte 0x00 8.--15. 1. " BIN_1 ,BIN_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " BIN_0 ,BIN_0" group.long 0x1350++0x03 line.long 0x00 "SD_HISTOGRAM_5,SD_HISTOGRAM_5" hexmask.long.byte 0x00 24.--31. 1. " BIN_3 ,BIN_3" hexmask.long.byte 0x00 16.--23. 1. " BIN_2 ,BIN_2" hexmask.long.byte 0x00 8.--15. 1. " BIN_1 ,BIN_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " BIN_0 ,BIN_0" group.long 0x1354++0x03 line.long 0x00 "SD_HISTOGRAM_6,SD_HISTOGRAM_6" hexmask.long.byte 0x00 24.--31. 1. " BIN_3 ,BIN_3" hexmask.long.byte 0x00 16.--23. 1. " BIN_2 ,BIN_2" hexmask.long.byte 0x00 8.--15. 1. " BIN_1 ,BIN_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " BIN_0 ,BIN_0" group.long 0x1358++0x03 line.long 0x00 "SD_HISTOGRAM_7,SD_HISTOGRAM_7" hexmask.long.byte 0x00 24.--31. 1. " BIN_3 ,BIN_3" hexmask.long.byte 0x00 16.--23. 1. " BIN_2 ,BIN_2" hexmask.long.byte 0x00 8.--15. 1. " BIN_1 ,BIN_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " BIN_0 ,BIN_0" textline " " group.long 0x135C++0x03 line.long 0x00 "SD_BL_PARAMETERS_0,Backlight response parameters" hexmask.long.byte 0x00 16.--23. 1. " STEP ,Determines the instantaneous portion of the target value of enhancement that is applied" hexmask.long.word 0x00 0.--10. 1. " TIME_CONSTANT ,The time constant for the response curve" textline " " group.long 0x1360++0x03 line.long 0x00 "SD_BL_TF_0,Backlight Transfer Function" hexmask.long.byte 0x00 24.--31. 1. " POINT_3 ,POINT_3" hexmask.long.byte 0x00 16.--23. 1. " POINT_2 ,POINT_2" hexmask.long.byte 0x00 8.--15. 1. " POINT_1 ,POINT_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " POINT_0 ,POINT_0" group.long 0x1364++0x03 line.long 0x00 "SD_BL_TF_1,Backlight Transfer Function" hexmask.long.byte 0x00 24.--31. 1. " POINT_3 ,POINT_3" hexmask.long.byte 0x00 16.--23. 1. " POINT_2 ,POINT_2" hexmask.long.byte 0x00 8.--15. 1. " POINT_1 ,POINT_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " POINT_0 ,POINT_0" group.long 0x1368++0x03 line.long 0x00 "SD_BL_TF_2,Backlight Transfer Function" hexmask.long.byte 0x00 24.--31. 1. " POINT_3 ,POINT_3" hexmask.long.byte 0x00 16.--23. 1. " POINT_2 ,POINT_2" hexmask.long.byte 0x00 8.--15. 1. " POINT_1 ,POINT_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " POINT_0 ,POINT_0" group.long 0x136C++0x03 line.long 0x00 "SD_BL_TF_3,Backlight Transfer Function" hexmask.long.byte 0x00 24.--31. 1. " POINT_3 ,POINT_3" hexmask.long.byte 0x00 16.--23. 1. " POINT_2 ,POINT_2" hexmask.long.byte 0x00 8.--15. 1. " POINT_1 ,POINT_1" textline " " hexmask.long.byte 0x00 0.--7. 1. " POINT_0 ,POINT_0" textline " " group.long 0x1370++0x03 line.long 0x00 "SD_BL_CONTROL_0,SD_BL_CONTROL_0" hexmask.long.byte 0x00 8.--15. 1. " BRIGHTNESS ,Backlight brightness modification value" bitfld.long 0x00 0.--1. " BL_MODE ,Control Mode: and adjust the backlight brightness itself" "MANUAL,PWM_AUTO,?..." rgroup.long 0x1374++0x03 line.long 0x00 "SD_HW_K_VALUES_0,Hardware-computed values of K for each color component" hexmask.long.word 0x00 20.--29. 1. " HW_K_BLUE ,Value of K for blue pixels" hexmask.long.word 0x00 10.--19. 1. " HW_K_GREEN ,Value of K for green pixels" textline " " hexmask.long.word 0x00 0.--9. 1. " HW_K_RED ,Value of K for red pixels" group.long 0x1378++0x3B line.long 0x00 "SD_MAN_K_VALUES_0,Manual values of K for each color component" hexmask.long.word 0x00 20.--29. 1. " MAN_K_BLUE ,Value of K for blue pixels" hexmask.long.word 0x00 10.--19. 1. " MAN_K_GREEN ,Value of K for green pixels" textline " " hexmask.long.word 0x00 0.--9. 1. " MAN_K_RED ,Value of K for red pixels" line.long 0x04 "SD_K_LIMIT_0,SD_K_LIMIT_0" hexmask.long.word 0x04 0.--9. 1. " K_LIMIT ,When K_LIMIT_ENABLE=ENABLE limits raw K independently of AGGRESSIVENESS" line.long 0x08 "SD_WINDOW_POSITION_0,SD Window Position" hexmask.long.word 0x08 16.--28. 1. " SD_WIN_V_POSITION ,SD window vertical position (pixels)" hexmask.long.word 0x08 0.--12. 1. " SD_WIN_H_POSITION ,SD window horizontal position (pixels)" line.long 0x0C "SD_WINDOW_SIZE_0,SD Window Size" hexmask.long.word 0x0C 16.--28. 1. " SD_WIN_V_SIZE ,SD window vertical height (pixels)" hexmask.long.word 0x0C 0.--12. 1. " SD_WIN_H_SIZE ,SD window horizontal width (pixels)" line.long 0x10 "SD_SOFT_CLIPPING_0,SD soft clipping parameters" hexmask.long.word 0x10 16.--31. 1. " SOFT_CLIPPING_RECIP ,Reciprocal of inverse threshold" hexmask.long.byte 0x10 0.--7. 1. " SOFT_CLIPPING_THRESHOLD ,Threshold at which pixel enhancement gain is reduced" line.long 0x14 "SD_SMOOTH_K_0,SD_SMOOTH_K_0" hexmask.long.word 0x14 0.--13. 1. " SMOOTH_K_INCR ,When SMOOTH_K_ENABLE=1 the raw K is changed at most by SMOOTH_K_INCR per frame" line.long 0x18 "BLEND_BACKGROUND_COLOR_0,BLEND_BACKGROUND_COLOR_0" hexmask.long.byte 0x18 24.--31. 1. " BKGND_ALPHA ,Background color of alpha canal" hexmask.long.byte 0x18 16.--23. 1. " BKGND_BLUE ,Background color of blue canal" textline " " hexmask.long.byte 0x18 8.--15. 1. " BKGND_GREEN ,Background color of green canal" hexmask.long.byte 0x18 0.--7. 1. " BKGND_RED ,Background color of red canal" line.long 0x1C "INTERLACE_CONTROL_0,Control interlacing" rbitfld.long 0x1C 2. " INTERLACE_STATUS ,Status" "FIELD1,FIELD2" bitfld.long 0x1C 1. " INTERLACE_START ,Start" "FIELD1,FIELD2" textline " " bitfld.long 0x1C 0. " INTERLACE_ENABLE ,Enable" "Disabled,Enabled" line.long 0x20 "INTERLACE_FIELD2_REF_TO_SYNC_0,Control the ref to sync offset for H sync and V sync for FIELD2" hexmask.long.word 0x20 16.--28. 1. " FIELD2_V_REF_TO_SYNC ,V reference to VSYNC for FIELD2" hexmask.long.word 0x20 0.--12. 1. " FIELD2_H_REF_TO_SYNC ,H reference to HSYNC for FIELD2" line.long 0x24 "INTERLACE_FIELD2_SYNC_WIDTH_0,Control the H and V sync widths for FIELD2" hexmask.long.word 0x24 16.--28. 1. " FIELD2_V_SYNC_WIDTH ,This field controls the V sync widths for FIELD2" hexmask.long.word 0x24 0.--12. 1. " FIELD2_H_SYNC_WIDTH ,This field controls the H sync widths for FIELD2" line.long 0x28 "INTERLACE_FIELD2_BACK_PORCH_0,Control the H and V back porch widths for FIELD2" hexmask.long.word 0x28 16.--28. 1. " FIELD2_V_BACK_PORCH ,V back porch" hexmask.long.word 0x28 0.--12. 1. " FIELD2_H_BACK_PORCH ,H back porch" line.long 0x2C "INTERLACE_FIELD2_FRONT_PORCH_0,Control the H and V front porch widths for FIELD2" hexmask.long.word 0x2C 16.--28. 1. " FIELD2_V_FRONT_PORCH ,V front porch" hexmask.long.word 0x2C 0.--12. 1. " FIELD2_H_FRONT_PORCH ,H front porch" line.long 0x30 "INTERLACE_FIELD2_DISP_ACTIVE_0,Control the H and V active widths for FIELD2" hexmask.long.word 0x30 16.--28. 1. " FIELD2_V_DISP_ACTIVE ,V active width" hexmask.long.word 0x30 0.--12. 1. " FIELD2_H_DISP_ACTIVE ,H active width" line.long 0x34 "CURSOR_UNDERFLOW_CTRL_0,CURSOR_UNDERFLOW_CTRL_0" bitfld.long 0x34 7. " CURSOR_UFLOW_CYA ,CURSOR_UFLOW_CYA" "Disabled,Enabled" bitfld.long 0x34 0. " CURSOR_UFLOW_CTRL_DBG_MODE ,CURSOR_UFLOW_CTRL_DBG_MODE" "Disabled,Enabled" line.long 0x38 "CURSOR_START_ADDR_HI_0,Cursor Start Address" bitfld.long 0x38 0.--1. " CURSOR_START_ADDR_HI ,Cursor Start Address bits 33:32" "0,1,2,3" group.long 0x13B8++0x07 line.long 0x00 "CURSOR_INTERLACE_CONTROL_0,Control interlacing" bitfld.long 0x00 4. " CURSOR_INTERLACE_FIELD2_VOFF_INCR ,FIELD2 v position incr Enable" "Disabled,Enabled" bitfld.long 0x00 3. " CURSOR_INTERLACE_FIELD1_VOFF_INCR ,FIELD1 v position incr Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 2. " CURSOR_INTERLACE_STATUS ,Current line start" "LINE0,LINE1" bitfld.long 0x00 1. " CURSOR_INTERLACE_START ,Starting line" "LINE0,LINE1" textline " " bitfld.long 0x00 0. " CURSOR_INTERLACE_ENABLE ,Interlace enable" "Disabled,Enabled" line.long 0x04 "CSC2_CONTROL_0,The CSC2 can be used for RGB to YCbCr conversion used in 1080i HDMI output" bitfld.long 0x04 2. " LIMIT_RGB_COLOR ,Scale RGB [0,255] to [16,235]" "Disabled,Enabled" bitfld.long 0x04 0.--1. " OUTPUT_COLOR_SELECT ,Output color select" "RGB,YCBCR709,YCBCR601,?..." group.long 0x13C4++0x13 line.long 0x00 "BLEND_CURSOR_CONTROL_0,BLEND_CURSOR_CONTROL_0" bitfld.long 0x00 24. " CURSOR_MODE_SELECT ,CURSOR_MODE_SELECT" "LEGACY,NORMAL" bitfld.long 0x00 16.--17. " CURSOR_DST_BLEND_FACTOR_SELECT ,Controls the DST_FACTOR" "ZERO,K1,NEG_K1_TIMES_SRC,?..." textline " " bitfld.long 0x00 8.--9. " CURSOR_SRC_BLEND_FACTOR_SELECT ,Controls the SRC_FACTOR" "K1,K1_TIMES_SRC,?..." hexmask.long.byte 0x00 0.--7. 1. " CURSOR_ALPHA ,CURSOR_ALPHA" line.long 0x04 "DVFS_CURSOR_CONTROL_0,DVFS_CURSOR_CONTROL_0" bitfld.long 0x04 8. " CURSOR_DVFS_ENABLE ,Enable ready_for_latency_event to toggle based on CURSOR_DVFS_THRESHOLD (When disabled ready_for_latency_event is true)" "Disabled,Enabled" hexmask.long.byte 0x04 0.--7. 1. " CURSOR_DVFS_THRESHOLD ,CURSOR_DVFS_THRESHOLD" line.long 0x08 "CURSOR_UFLOW_DBG_PIXEL_0,CURSOR_UFLOW_DBG_PIXEL_0" line.long 0x0C "CURSOR_SPOOLUP_CONTROL_0,Programmable spool up for cursor If spoolup count > hc_vactive_start it will be clamped to zero" hexmask.long.byte 0x0C 0.--7. 1. " CURSOR_SPOOLUP_START ,CURSOR_SPOOLUP_START" line.long 0x10 "DISPLAY_CLK_GATE_OVERRIDE_0,DISPLAY_CLK_GATE_OVERRIDE_0" bitfld.long 0x10 1. " CMU_CLK_GATE_OVERRIDE ,Disable clock-gating of the CMU module" "Disabled,Enabled" bitfld.long 0x10 0. " CURSOR_CLK_GATE_OVERRIDE ,Disable clock-gating of cursor memfetch/control modules" "Disabled,Enabled" rgroup.long 0x13D8++0x03 line.long 0x00 "DISPLAY_DBG_TIMING_0,DISPLAY_DBG_TIMING_0" bitfld.long 0x00 31. " H_BLANK ,H_BLANK" "0,1" hexmask.long.word 0x00 16.--28. 1. " H_COUNT ,H_COUNT" textline " " bitfld.long 0x00 15. " V_BLANK ,V_BLANK" "0,1" hexmask.long.word 0x00 0.--12. 1. " V_COUNT ,V_COUNT" group.long 0x13DC++0x07 line.long 0x00 "DISPLAY_SPARE0_0,DISPLAY_SPARE0_0" hexmask.long.word 0x00 4.--13. 1. " DSC_RC_OVERFLOW_THRESH ,Program the threshold of bufferFullness + throttle_offset (currently it is -172)" bitfld.long 0x00 2.--3. " DSC_RC_SOLUTION_MODE ,DSC_RC_SOLUTION_MODE" "Disabled,Solution#1,Solution#2,?..." textline " " bitfld.long 0x00 1. " DSC_CHECK_FLATNESS2 ,DSC_CHECK_FLATNESS2" "Disabled,Enabled" bitfld.long 0x00 0. " DSC_FLATNESS_FIX_EN ,Diagnostic bit for flatness updates only" "Disabled,Enabled" line.long 0x04 "DISPLAY_SPARE1_0,DISPLAY_SPARE1_0" endif tree.end width 0x0B tree.end tree "Display A" tree "WINC" tree "AD" base ad:0x54200000+0x2800 width 21. wgroup.long 0x00++0x03 line.long 0x00 "COLOR_PALETTE_0,Window AD Color Palette" button "BGR" "d (ad:0x54200000+0x2800+0x00)--(ad:0x54200000+0x2800+0x3fc) /long" group.long 0x400++0x03 line.long 0x00 "PALETTE_COLOR_EXT_0,Window A Palette Color Extension" hexmask.long.byte 0x00 1.--7. 1. " AD_PALETTE_COLOR_EXT ,Window A Palette Color Extension" group.long 0x404++0x03 line.long 0x00 "H_FILTER_P00_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P00C5 ,Phase 00 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P00C4 ,Phase 00 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P00C3 ,Phase 00 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 00 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P00C1 ,Phase 00 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P00C0 ,Phase 00 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x408++0x03 line.long 0x00 "H_FILTER_P01_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P01C5 ,Phase 01 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P01C4 ,Phase 01 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P01C3 ,Phase 01 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 01 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P01C1 ,Phase 01 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P01C0 ,Phase 01 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x40C++0x03 line.long 0x00 "H_FILTER_P02_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P02C5 ,Phase 02 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P02C4 ,Phase 02 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P02C3 ,Phase 02 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 02 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P02C1 ,Phase 02 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P02C0 ,Phase 02 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x410++0x03 line.long 0x00 "H_FILTER_P03_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P03C5 ,Phase 03 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P03C4 ,Phase 03 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P03C3 ,Phase 03 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 03 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P03C1 ,Phase 03 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P03C0 ,Phase 03 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x414++0x03 line.long 0x00 "H_FILTER_P04_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P04C5 ,Phase 04 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P04C4 ,Phase 04 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P04C3 ,Phase 04 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 04 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P04C1 ,Phase 04 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P04C0 ,Phase 04 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x418++0x03 line.long 0x00 "H_FILTER_P05_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P05C5 ,Phase 05 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P05C4 ,Phase 05 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P05C3 ,Phase 05 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 05 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P05C1 ,Phase 05 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P05C0 ,Phase 05 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x41C++0x03 line.long 0x00 "H_FILTER_P06_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P06C5 ,Phase 06 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P06C4 ,Phase 06 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P06C3 ,Phase 06 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 06 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P06C1 ,Phase 06 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P06C0 ,Phase 06 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x420++0x03 line.long 0x00 "H_FILTER_P07_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P07C5 ,Phase 07 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P07C4 ,Phase 07 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P07C3 ,Phase 07 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 07 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P07C1 ,Phase 07 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P07C0 ,Phase 07 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x424++0x03 line.long 0x00 "H_FILTER_P08_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P08C5 ,Phase 08 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P08C4 ,Phase 08 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P08C3 ,Phase 08 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 08 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P08C1 ,Phase 08 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P08C0 ,Phase 08 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x428++0x03 line.long 0x00 "H_FILTER_P09_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P09C5 ,Phase 09 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P09C4 ,Phase 09 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P09C3 ,Phase 09 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 09 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P09C1 ,Phase 09 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P09C0 ,Phase 09 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x42C++0x03 line.long 0x00 "H_FILTER_P0A_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0AC5 ,Phase 0A coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0AC4 ,Phase 0A coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0AC3 ,Phase 0A coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0A coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0AC1 ,Phase 0A coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0AC0 ,Phase 0A coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x430++0x03 line.long 0x00 "H_FILTER_P0B_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0BC5 ,Phase 0B coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0BC4 ,Phase 0B coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0BC3 ,Phase 0B coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0B coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0BC1 ,Phase 0B coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0BC0 ,Phase 0B coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x434++0x03 line.long 0x00 "H_FILTER_P0C_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0CC5 ,Phase 0C coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0CC4 ,Phase 0C coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0CC3 ,Phase 0C coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0C coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0CC1 ,Phase 0C coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0CC0 ,Phase 0C coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x438++0x03 line.long 0x00 "H_FILTER_P0D_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0DC5 ,Phase 0D coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0DC4 ,Phase 0D coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0DC3 ,Phase 0D coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0D coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0DC1 ,Phase 0D coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0DC0 ,Phase 0D coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x43C++0x03 line.long 0x00 "H_FILTER_P0E_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0EC5 ,Phase 0E coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0EC4 ,Phase 0E coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0EC3 ,Phase 0E coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0E coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0EC1 ,Phase 0E coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0EC0 ,Phase 0E coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x440++0x03 line.long 0x00 "H_FILTER_P0F_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0FC5 ,Phase 0F coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0FC4 ,Phase 0F coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0FC3 ,Phase 0F coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0F coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0FC1 ,Phase 0F coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0FC0 ,Phase 0F coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x444++0x1F line.long 0x00 "CSC_YOF_0,Colour Space Conversion Coefficients" hexmask.long.byte 0x00 0.--7. 1. " AD_CSC_YOF ,Y Offset in s.7.0 format" line.long 0x04 "CSC_KYRGB_0,Window AD CSC Y Coefficient for RGB" hexmask.long.word 0x04 0.--9. 1. " AD_CSC_KYRGB ,Y Gain for R, G, B colours in 2.8 format" line.long 0x08 "CSC_KUR_0,Window AD CSC U coefficient for R" hexmask.long.word 0x08 0.--10. 1. " AD_CSC_KUR ,U coefficients for R in s.2.8 format" line.long 0x0C "CSC_KVR_0,Window AD CSC V coefficient for R" hexmask.long.word 0x0C 0.--10. 1. " AD_CSC_KVR ,V coefficients for R in s.2.8 format" line.long 0x10 "CSC_KUG_0,Window AD CSC U coefficient for G" hexmask.long.word 0x10 0.--9. 1. " AD_CSC_KUG ,U coefficients for G in s.1.8 format" line.long 0x14 "CSC_KVG_0,Window AD CSC V coefficient for G" hexmask.long.word 0x14 0.--9. 1. " AD_CSC_KVG ,V coefficients for G in s.1.8 format" line.long 0x18 "CSC_KUB_0,Window AD CSC U coefficient for B" hexmask.long.word 0x18 0.--10. 1. " AD_CSC_KUB ,U coefficients for B in s.2.8 format" line.long 0x1C "CSC_KVB_0,Window AD CSC V coefficient for B" hexmask.long.word 0x1C 0.--10. 1. " AD_CSC_KVB ,V coefficients for B in s.2.8 format" textline " " group.long 0x464++0x03 line.long 0x00 "V_FILTER_P00_0,Window AD Vertical Filter phase 00" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P00C0 ,Phase 00 coefficient 0" group.long 0x468++0x03 line.long 0x00 "V_FILTER_P01_0,Window AD Vertical Filter phase 01" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P01C0 ,Phase 01 coefficient 1" group.long 0x46C++0x03 line.long 0x00 "V_FILTER_P02_0,Window AD Vertical Filter phase 02" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P02C0 ,Phase 02 coefficient 2" group.long 0x470++0x03 line.long 0x00 "V_FILTER_P03_0,Window AD Vertical Filter phase 03" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P03C0 ,Phase 03 coefficient 3" group.long 0x474++0x03 line.long 0x00 "V_FILTER_P04_0,Window AD Vertical Filter phase 04" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P04C0 ,Phase 04 coefficient 4" group.long 0x478++0x03 line.long 0x00 "V_FILTER_P05_0,Window AD Vertical Filter phase 05" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P05C0 ,Phase 05 coefficient 5" group.long 0x47C++0x03 line.long 0x00 "V_FILTER_P06_0,Window AD Vertical Filter phase 06" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P06C0 ,Phase 06 coefficient 6" group.long 0x480++0x03 line.long 0x00 "V_FILTER_P07_0,Window AD Vertical Filter phase 07" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P07C0 ,Phase 07 coefficient 7" group.long 0x484++0x03 line.long 0x00 "V_FILTER_P08_0,Window AD Vertical Filter phase 08" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P08C0 ,Phase 08 coefficient 8" group.long 0x488++0x03 line.long 0x00 "V_FILTER_P09_0,Window AD Vertical Filter phase 09" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P09C0 ,Phase 09 coefficient 9" group.long 0x48C++0x03 line.long 0x00 "V_FILTER_P0A_0,Window AD Vertical Filter phase 0A" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0AC0 ,Phase 0A coefficient A" group.long 0x490++0x03 line.long 0x00 "V_FILTER_P0B_0,Window AD Vertical Filter phase 0B" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0BC0 ,Phase 0B coefficient B" group.long 0x494++0x03 line.long 0x00 "V_FILTER_P0C_0,Window AD Vertical Filter phase 0C" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0CC0 ,Phase 0C coefficient C" group.long 0x498++0x03 line.long 0x00 "V_FILTER_P0D_0,Window AD Vertical Filter phase 0D" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0DC0 ,Phase 0D coefficient D" group.long 0x49C++0x03 line.long 0x00 "V_FILTER_P0E_0,Window AD Vertical Filter phase 0E" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0EC0 ,Phase 0E coefficient E" group.long 0x4A0++0x03 line.long 0x00 "V_FILTER_P0F_0,Window AD Vertical Filter phase 0F" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0FC0 ,Phase 0F coefficient F" textline " " group.long 0x4A4++0x03 line.long 0x00 "H_FILTER_HI_P00_0,Window AD Horizontal Filter phase 00" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P00C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P00C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P00C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P00C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P00C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P00C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4A8++0x03 line.long 0x00 "H_FILTER_HI_P01_0,Window AD Horizontal Filter phase 01" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P01C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P01C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P01C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P01C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P01C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P01C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4AC++0x03 line.long 0x00 "H_FILTER_HI_P02_0,Window AD Horizontal Filter phase 02" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P02C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P02C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P02C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P02C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P02C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P02C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B0++0x03 line.long 0x00 "H_FILTER_HI_P03_0,Window AD Horizontal Filter phase 03" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P03C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P03C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P03C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P03C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P03C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P03C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B4++0x03 line.long 0x00 "H_FILTER_HI_P04_0,Window AD Horizontal Filter phase 04" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P04C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P04C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P04C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P04C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P04C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P04C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B8++0x03 line.long 0x00 "H_FILTER_HI_P05_0,Window AD Horizontal Filter phase 05" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P05C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P05C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P05C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P05C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P05C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P05C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4BC++0x03 line.long 0x00 "H_FILTER_HI_P06_0,Window AD Horizontal Filter phase 06" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P06C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P06C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P06C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P06C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P06C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P06C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C0++0x03 line.long 0x00 "H_FILTER_HI_P07_0,Window AD Horizontal Filter phase 07" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P07C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P07C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P07C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P07C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P07C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P07C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C4++0x03 line.long 0x00 "H_FILTER_HI_P08_0,Window AD Horizontal Filter phase 08" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P08C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P08C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P08C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P08C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P08C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P08C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C8++0x03 line.long 0x00 "H_FILTER_HI_P09_0,Window AD Horizontal Filter phase 09" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P09C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P09C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P09C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P09C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P09C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P09C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4CC++0x03 line.long 0x00 "H_FILTER_HI_P0A_0,Window AD Horizontal Filter phase 0A" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0AC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0AC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0AC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0AC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0AC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0AC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D0++0x03 line.long 0x00 "H_FILTER_HI_P0B_0,Window AD Horizontal Filter phase 0B" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0BC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0BC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0BC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0BC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0BC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0BC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D4++0x03 line.long 0x00 "H_FILTER_HI_P0C_0,Window AD Horizontal Filter phase 0C" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0CC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0CC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0CC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0CC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0CC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0CC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D8++0x03 line.long 0x00 "H_FILTER_HI_P0D_0,Window AD Horizontal Filter phase 0D" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0DC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0DC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0DC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0DC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0DC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0DC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4DC++0x03 line.long 0x00 "H_FILTER_HI_P0E_0,Window AD Horizontal Filter phase 0E" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0EC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0EC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0EC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0EC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0EC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0EC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4E0++0x03 line.long 0x00 "H_FILTER_HI_P0F_0,Window AD Horizontal Filter phase 0F" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0FC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0FC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0FC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0FC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0FC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0FC0 ,MSB of the lobe 0" "0,1,2,3" width 0x0B tree.end tree "BD" base ad:0x54200000+0x3000 width 21. wgroup.long 0x00++0x03 line.long 0x00 "COLOR_PALETTE_0,Window BD Color Palette" button "BGR" "d (ad:0x54200000+0x3000+0x00)--(ad:0x54200000+0x3000+0x3fc) /long" group.long 0x400++0x03 line.long 0x00 "PALETTE_COLOR_EXT_0,Window B Palette Color Extension" hexmask.long.byte 0x00 1.--7. 1. " BD_PALETTE_COLOR_EXT ,Window B Palette Color Extension" group.long 0x404++0x03 line.long 0x00 "H_FILTER_P00_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P00C5 ,Phase 00 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P00C4 ,Phase 00 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P00C3 ,Phase 00 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 00 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P00C1 ,Phase 00 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P00C0 ,Phase 00 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x408++0x03 line.long 0x00 "H_FILTER_P01_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P01C5 ,Phase 01 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P01C4 ,Phase 01 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P01C3 ,Phase 01 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 01 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P01C1 ,Phase 01 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P01C0 ,Phase 01 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x40C++0x03 line.long 0x00 "H_FILTER_P02_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P02C5 ,Phase 02 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P02C4 ,Phase 02 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P02C3 ,Phase 02 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 02 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P02C1 ,Phase 02 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P02C0 ,Phase 02 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x410++0x03 line.long 0x00 "H_FILTER_P03_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P03C5 ,Phase 03 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P03C4 ,Phase 03 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P03C3 ,Phase 03 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 03 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P03C1 ,Phase 03 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P03C0 ,Phase 03 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x414++0x03 line.long 0x00 "H_FILTER_P04_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P04C5 ,Phase 04 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P04C4 ,Phase 04 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P04C3 ,Phase 04 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 04 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P04C1 ,Phase 04 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P04C0 ,Phase 04 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x418++0x03 line.long 0x00 "H_FILTER_P05_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P05C5 ,Phase 05 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P05C4 ,Phase 05 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P05C3 ,Phase 05 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 05 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P05C1 ,Phase 05 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P05C0 ,Phase 05 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x41C++0x03 line.long 0x00 "H_FILTER_P06_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P06C5 ,Phase 06 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P06C4 ,Phase 06 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P06C3 ,Phase 06 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 06 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P06C1 ,Phase 06 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P06C0 ,Phase 06 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x420++0x03 line.long 0x00 "H_FILTER_P07_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P07C5 ,Phase 07 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P07C4 ,Phase 07 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P07C3 ,Phase 07 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 07 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P07C1 ,Phase 07 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P07C0 ,Phase 07 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x424++0x03 line.long 0x00 "H_FILTER_P08_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P08C5 ,Phase 08 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P08C4 ,Phase 08 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P08C3 ,Phase 08 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 08 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P08C1 ,Phase 08 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P08C0 ,Phase 08 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x428++0x03 line.long 0x00 "H_FILTER_P09_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P09C5 ,Phase 09 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P09C4 ,Phase 09 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P09C3 ,Phase 09 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 09 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P09C1 ,Phase 09 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P09C0 ,Phase 09 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x42C++0x03 line.long 0x00 "H_FILTER_P0A_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0AC5 ,Phase 0A coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0AC4 ,Phase 0A coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0AC3 ,Phase 0A coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0A coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0AC1 ,Phase 0A coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0AC0 ,Phase 0A coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x430++0x03 line.long 0x00 "H_FILTER_P0B_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0BC5 ,Phase 0B coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0BC4 ,Phase 0B coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0BC3 ,Phase 0B coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0B coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0BC1 ,Phase 0B coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0BC0 ,Phase 0B coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x434++0x03 line.long 0x00 "H_FILTER_P0C_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0CC5 ,Phase 0C coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0CC4 ,Phase 0C coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0CC3 ,Phase 0C coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0C coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0CC1 ,Phase 0C coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0CC0 ,Phase 0C coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x438++0x03 line.long 0x00 "H_FILTER_P0D_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0DC5 ,Phase 0D coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0DC4 ,Phase 0D coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0DC3 ,Phase 0D coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0D coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0DC1 ,Phase 0D coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0DC0 ,Phase 0D coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x43C++0x03 line.long 0x00 "H_FILTER_P0E_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0EC5 ,Phase 0E coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0EC4 ,Phase 0E coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0EC3 ,Phase 0E coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0E coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0EC1 ,Phase 0E coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0EC0 ,Phase 0E coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x440++0x03 line.long 0x00 "H_FILTER_P0F_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0FC5 ,Phase 0F coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0FC4 ,Phase 0F coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0FC3 ,Phase 0F coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0F coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0FC1 ,Phase 0F coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0FC0 ,Phase 0F coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x444++0x1F line.long 0x00 "CSC_YOF_0,Colour Space Conversion Coefficients" hexmask.long.byte 0x00 0.--7. 1. " BD_CSC_YOF ,Y Offset in s.7.0 format" line.long 0x04 "CSC_KYRGB_0,Window BD CSC Y Coefficient for RGB" hexmask.long.word 0x04 0.--9. 1. " BD_CSC_KYRGB ,Y Gain for R, G, B colours in 2.8 format" line.long 0x08 "CSC_KUR_0,Window BD CSC U coefficient for R" hexmask.long.word 0x08 0.--10. 1. " BD_CSC_KUR ,U coefficients for R in s.2.8 format" line.long 0x0C "CSC_KVR_0,Window BD CSC V coefficient for R" hexmask.long.word 0x0C 0.--10. 1. " BD_CSC_KVR ,V coefficients for R in s.2.8 format" line.long 0x10 "CSC_KUG_0,Window BD CSC U coefficient for G" hexmask.long.word 0x10 0.--9. 1. " BD_CSC_KUG ,U coefficients for G in s.1.8 format" line.long 0x14 "CSC_KVG_0,Window BD CSC V coefficient for G" hexmask.long.word 0x14 0.--9. 1. " BD_CSC_KVG ,V coefficients for G in s.1.8 format" line.long 0x18 "CSC_KUB_0,Window BD CSC U coefficient for B" hexmask.long.word 0x18 0.--10. 1. " BD_CSC_KUB ,U coefficients for B in s.2.8 format" line.long 0x1C "CSC_KVB_0,Window BD CSC V coefficient for B" hexmask.long.word 0x1C 0.--10. 1. " BD_CSC_KVB ,V coefficients for B in s.2.8 format" textline " " group.long 0x464++0x03 line.long 0x00 "V_FILTER_P00_0,Window BD Vertical Filter phase 00" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P00C0 ,Phase 00 coefficient 0" group.long 0x468++0x03 line.long 0x00 "V_FILTER_P01_0,Window BD Vertical Filter phase 01" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P01C0 ,Phase 01 coefficient 1" group.long 0x46C++0x03 line.long 0x00 "V_FILTER_P02_0,Window BD Vertical Filter phase 02" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P02C0 ,Phase 02 coefficient 2" group.long 0x470++0x03 line.long 0x00 "V_FILTER_P03_0,Window BD Vertical Filter phase 03" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P03C0 ,Phase 03 coefficient 3" group.long 0x474++0x03 line.long 0x00 "V_FILTER_P04_0,Window BD Vertical Filter phase 04" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P04C0 ,Phase 04 coefficient 4" group.long 0x478++0x03 line.long 0x00 "V_FILTER_P05_0,Window BD Vertical Filter phase 05" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P05C0 ,Phase 05 coefficient 5" group.long 0x47C++0x03 line.long 0x00 "V_FILTER_P06_0,Window BD Vertical Filter phase 06" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P06C0 ,Phase 06 coefficient 6" group.long 0x480++0x03 line.long 0x00 "V_FILTER_P07_0,Window BD Vertical Filter phase 07" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P07C0 ,Phase 07 coefficient 7" group.long 0x484++0x03 line.long 0x00 "V_FILTER_P08_0,Window BD Vertical Filter phase 08" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P08C0 ,Phase 08 coefficient 8" group.long 0x488++0x03 line.long 0x00 "V_FILTER_P09_0,Window BD Vertical Filter phase 09" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P09C0 ,Phase 09 coefficient 9" group.long 0x48C++0x03 line.long 0x00 "V_FILTER_P0A_0,Window BD Vertical Filter phase 0A" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0AC0 ,Phase 0A coefficient A" group.long 0x490++0x03 line.long 0x00 "V_FILTER_P0B_0,Window BD Vertical Filter phase 0B" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0BC0 ,Phase 0B coefficient B" group.long 0x494++0x03 line.long 0x00 "V_FILTER_P0C_0,Window BD Vertical Filter phase 0C" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0CC0 ,Phase 0C coefficient C" group.long 0x498++0x03 line.long 0x00 "V_FILTER_P0D_0,Window BD Vertical Filter phase 0D" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0DC0 ,Phase 0D coefficient D" group.long 0x49C++0x03 line.long 0x00 "V_FILTER_P0E_0,Window BD Vertical Filter phase 0E" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0EC0 ,Phase 0E coefficient E" group.long 0x4A0++0x03 line.long 0x00 "V_FILTER_P0F_0,Window BD Vertical Filter phase 0F" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0FC0 ,Phase 0F coefficient F" textline " " group.long 0x4A4++0x03 line.long 0x00 "H_FILTER_HI_P00_0,Window BD Horizontal Filter phase 00" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P00C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P00C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P00C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P00C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P00C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P00C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4A8++0x03 line.long 0x00 "H_FILTER_HI_P01_0,Window BD Horizontal Filter phase 01" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P01C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P01C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P01C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P01C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P01C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P01C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4AC++0x03 line.long 0x00 "H_FILTER_HI_P02_0,Window BD Horizontal Filter phase 02" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P02C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P02C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P02C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P02C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P02C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P02C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B0++0x03 line.long 0x00 "H_FILTER_HI_P03_0,Window BD Horizontal Filter phase 03" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P03C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P03C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P03C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P03C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P03C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P03C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B4++0x03 line.long 0x00 "H_FILTER_HI_P04_0,Window BD Horizontal Filter phase 04" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P04C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P04C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P04C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P04C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P04C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P04C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B8++0x03 line.long 0x00 "H_FILTER_HI_P05_0,Window BD Horizontal Filter phase 05" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P05C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P05C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P05C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P05C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P05C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P05C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4BC++0x03 line.long 0x00 "H_FILTER_HI_P06_0,Window BD Horizontal Filter phase 06" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P06C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P06C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P06C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P06C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P06C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P06C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C0++0x03 line.long 0x00 "H_FILTER_HI_P07_0,Window BD Horizontal Filter phase 07" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P07C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P07C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P07C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P07C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P07C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P07C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C4++0x03 line.long 0x00 "H_FILTER_HI_P08_0,Window BD Horizontal Filter phase 08" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P08C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P08C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P08C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P08C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P08C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P08C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C8++0x03 line.long 0x00 "H_FILTER_HI_P09_0,Window BD Horizontal Filter phase 09" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P09C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P09C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P09C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P09C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P09C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P09C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4CC++0x03 line.long 0x00 "H_FILTER_HI_P0A_0,Window BD Horizontal Filter phase 0A" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0AC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0AC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0AC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0AC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0AC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0AC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D0++0x03 line.long 0x00 "H_FILTER_HI_P0B_0,Window BD Horizontal Filter phase 0B" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0BC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0BC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0BC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0BC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0BC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0BC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D4++0x03 line.long 0x00 "H_FILTER_HI_P0C_0,Window BD Horizontal Filter phase 0C" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0CC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0CC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0CC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0CC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0CC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0CC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D8++0x03 line.long 0x00 "H_FILTER_HI_P0D_0,Window BD Horizontal Filter phase 0D" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0DC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0DC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0DC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0DC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0DC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0DC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4DC++0x03 line.long 0x00 "H_FILTER_HI_P0E_0,Window BD Horizontal Filter phase 0E" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0EC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0EC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0EC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0EC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0EC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0EC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4E0++0x03 line.long 0x00 "H_FILTER_HI_P0F_0,Window BD Horizontal Filter phase 0F" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0FC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0FC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0FC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0FC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0FC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0FC0 ,MSB of the lobe 0" "0,1,2,3" width 0x0B tree.end tree "CD" base ad:0x54200000+0x3800 width 21. wgroup.long 0x00++0x03 line.long 0x00 "COLOR_PALETTE_0,Window CD Color Palette" button "BGR" "d (ad:0x54200000+0x3800+0x00)--(ad:0x54200000+0x3800+0x3fc) /long" group.long 0x400++0x03 line.long 0x00 "PALETTE_COLOR_EXT_0,Window C Palette Color Extension" hexmask.long.byte 0x00 1.--7. 1. " CD_PALETTE_COLOR_EXT ,Window C Palette Color Extension" group.long 0x404++0x03 line.long 0x00 "H_FILTER_P00_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P00C5 ,Phase 00 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P00C4 ,Phase 00 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P00C3 ,Phase 00 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 00 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P00C1 ,Phase 00 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P00C0 ,Phase 00 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x408++0x03 line.long 0x00 "H_FILTER_P01_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P01C5 ,Phase 01 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P01C4 ,Phase 01 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P01C3 ,Phase 01 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 01 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P01C1 ,Phase 01 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P01C0 ,Phase 01 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x40C++0x03 line.long 0x00 "H_FILTER_P02_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P02C5 ,Phase 02 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P02C4 ,Phase 02 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P02C3 ,Phase 02 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 02 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P02C1 ,Phase 02 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P02C0 ,Phase 02 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x410++0x03 line.long 0x00 "H_FILTER_P03_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P03C5 ,Phase 03 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P03C4 ,Phase 03 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P03C3 ,Phase 03 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 03 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P03C1 ,Phase 03 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P03C0 ,Phase 03 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x414++0x03 line.long 0x00 "H_FILTER_P04_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P04C5 ,Phase 04 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P04C4 ,Phase 04 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P04C3 ,Phase 04 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 04 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P04C1 ,Phase 04 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P04C0 ,Phase 04 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x418++0x03 line.long 0x00 "H_FILTER_P05_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P05C5 ,Phase 05 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P05C4 ,Phase 05 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P05C3 ,Phase 05 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 05 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P05C1 ,Phase 05 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P05C0 ,Phase 05 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x41C++0x03 line.long 0x00 "H_FILTER_P06_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P06C5 ,Phase 06 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P06C4 ,Phase 06 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P06C3 ,Phase 06 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 06 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P06C1 ,Phase 06 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P06C0 ,Phase 06 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x420++0x03 line.long 0x00 "H_FILTER_P07_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P07C5 ,Phase 07 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P07C4 ,Phase 07 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P07C3 ,Phase 07 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 07 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P07C1 ,Phase 07 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P07C0 ,Phase 07 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x424++0x03 line.long 0x00 "H_FILTER_P08_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P08C5 ,Phase 08 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P08C4 ,Phase 08 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P08C3 ,Phase 08 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 08 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P08C1 ,Phase 08 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P08C0 ,Phase 08 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x428++0x03 line.long 0x00 "H_FILTER_P09_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P09C5 ,Phase 09 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P09C4 ,Phase 09 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P09C3 ,Phase 09 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 09 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P09C1 ,Phase 09 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P09C0 ,Phase 09 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x42C++0x03 line.long 0x00 "H_FILTER_P0A_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0AC5 ,Phase 0A coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0AC4 ,Phase 0A coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0AC3 ,Phase 0A coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0A coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0AC1 ,Phase 0A coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0AC0 ,Phase 0A coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x430++0x03 line.long 0x00 "H_FILTER_P0B_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0BC5 ,Phase 0B coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0BC4 ,Phase 0B coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0BC3 ,Phase 0B coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0B coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0BC1 ,Phase 0B coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0BC0 ,Phase 0B coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x434++0x03 line.long 0x00 "H_FILTER_P0C_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0CC5 ,Phase 0C coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0CC4 ,Phase 0C coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0CC3 ,Phase 0C coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0C coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0CC1 ,Phase 0C coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0CC0 ,Phase 0C coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x438++0x03 line.long 0x00 "H_FILTER_P0D_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0DC5 ,Phase 0D coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0DC4 ,Phase 0D coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0DC3 ,Phase 0D coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0D coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0DC1 ,Phase 0D coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0DC0 ,Phase 0D coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x43C++0x03 line.long 0x00 "H_FILTER_P0E_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0EC5 ,Phase 0E coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0EC4 ,Phase 0E coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0EC3 ,Phase 0E coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0E coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0EC1 ,Phase 0E coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0EC0 ,Phase 0E coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x440++0x03 line.long 0x00 "H_FILTER_P0F_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0FC5 ,Phase 0F coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0FC4 ,Phase 0F coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0FC3 ,Phase 0F coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0F coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0FC1 ,Phase 0F coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0FC0 ,Phase 0F coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x444++0x1F line.long 0x00 "CSC_YOF_0,Colour Space Conversion Coefficients" hexmask.long.byte 0x00 0.--7. 1. " CD_CSC_YOF ,Y Offset in s.7.0 format" line.long 0x04 "CSC_KYRGB_0,Window CD CSC Y Coefficient for RGB" hexmask.long.word 0x04 0.--9. 1. " CD_CSC_KYRGB ,Y Gain for R, G, B colours in 2.8 format" line.long 0x08 "CSC_KUR_0,Window CD CSC U coefficient for R" hexmask.long.word 0x08 0.--10. 1. " CD_CSC_KUR ,U coefficients for R in s.2.8 format" line.long 0x0C "CSC_KVR_0,Window CD CSC V coefficient for R" hexmask.long.word 0x0C 0.--10. 1. " CD_CSC_KVR ,V coefficients for R in s.2.8 format" line.long 0x10 "CSC_KUG_0,Window CD CSC U coefficient for G" hexmask.long.word 0x10 0.--9. 1. " CD_CSC_KUG ,U coefficients for G in s.1.8 format" line.long 0x14 "CSC_KVG_0,Window CD CSC V coefficient for G" hexmask.long.word 0x14 0.--9. 1. " CD_CSC_KVG ,V coefficients for G in s.1.8 format" line.long 0x18 "CSC_KUB_0,Window CD CSC U coefficient for B" hexmask.long.word 0x18 0.--10. 1. " CD_CSC_KUB ,U coefficients for B in s.2.8 format" line.long 0x1C "CSC_KVB_0,Window CD CSC V coefficient for B" hexmask.long.word 0x1C 0.--10. 1. " CD_CSC_KVB ,V coefficients for B in s.2.8 format" textline " " group.long 0x464++0x03 line.long 0x00 "V_FILTER_P00_0,Window CD Vertical Filter phase 00" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P00C0 ,Phase 00 coefficient 0" group.long 0x468++0x03 line.long 0x00 "V_FILTER_P01_0,Window CD Vertical Filter phase 01" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P01C0 ,Phase 01 coefficient 1" group.long 0x46C++0x03 line.long 0x00 "V_FILTER_P02_0,Window CD Vertical Filter phase 02" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P02C0 ,Phase 02 coefficient 2" group.long 0x470++0x03 line.long 0x00 "V_FILTER_P03_0,Window CD Vertical Filter phase 03" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P03C0 ,Phase 03 coefficient 3" group.long 0x474++0x03 line.long 0x00 "V_FILTER_P04_0,Window CD Vertical Filter phase 04" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P04C0 ,Phase 04 coefficient 4" group.long 0x478++0x03 line.long 0x00 "V_FILTER_P05_0,Window CD Vertical Filter phase 05" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P05C0 ,Phase 05 coefficient 5" group.long 0x47C++0x03 line.long 0x00 "V_FILTER_P06_0,Window CD Vertical Filter phase 06" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P06C0 ,Phase 06 coefficient 6" group.long 0x480++0x03 line.long 0x00 "V_FILTER_P07_0,Window CD Vertical Filter phase 07" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P07C0 ,Phase 07 coefficient 7" group.long 0x484++0x03 line.long 0x00 "V_FILTER_P08_0,Window CD Vertical Filter phase 08" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P08C0 ,Phase 08 coefficient 8" group.long 0x488++0x03 line.long 0x00 "V_FILTER_P09_0,Window CD Vertical Filter phase 09" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P09C0 ,Phase 09 coefficient 9" group.long 0x48C++0x03 line.long 0x00 "V_FILTER_P0A_0,Window CD Vertical Filter phase 0A" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0AC0 ,Phase 0A coefficient A" group.long 0x490++0x03 line.long 0x00 "V_FILTER_P0B_0,Window CD Vertical Filter phase 0B" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0BC0 ,Phase 0B coefficient B" group.long 0x494++0x03 line.long 0x00 "V_FILTER_P0C_0,Window CD Vertical Filter phase 0C" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0CC0 ,Phase 0C coefficient C" group.long 0x498++0x03 line.long 0x00 "V_FILTER_P0D_0,Window CD Vertical Filter phase 0D" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0DC0 ,Phase 0D coefficient D" group.long 0x49C++0x03 line.long 0x00 "V_FILTER_P0E_0,Window CD Vertical Filter phase 0E" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0EC0 ,Phase 0E coefficient E" group.long 0x4A0++0x03 line.long 0x00 "V_FILTER_P0F_0,Window CD Vertical Filter phase 0F" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0FC0 ,Phase 0F coefficient F" textline " " group.long 0x4A4++0x03 line.long 0x00 "H_FILTER_HI_P00_0,Window CD Horizontal Filter phase 00" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P00C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P00C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P00C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P00C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P00C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P00C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4A8++0x03 line.long 0x00 "H_FILTER_HI_P01_0,Window CD Horizontal Filter phase 01" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P01C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P01C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P01C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P01C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P01C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P01C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4AC++0x03 line.long 0x00 "H_FILTER_HI_P02_0,Window CD Horizontal Filter phase 02" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P02C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P02C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P02C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P02C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P02C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P02C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B0++0x03 line.long 0x00 "H_FILTER_HI_P03_0,Window CD Horizontal Filter phase 03" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P03C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P03C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P03C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P03C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P03C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P03C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B4++0x03 line.long 0x00 "H_FILTER_HI_P04_0,Window CD Horizontal Filter phase 04" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P04C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P04C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P04C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P04C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P04C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P04C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B8++0x03 line.long 0x00 "H_FILTER_HI_P05_0,Window CD Horizontal Filter phase 05" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P05C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P05C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P05C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P05C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P05C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P05C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4BC++0x03 line.long 0x00 "H_FILTER_HI_P06_0,Window CD Horizontal Filter phase 06" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P06C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P06C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P06C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P06C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P06C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P06C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C0++0x03 line.long 0x00 "H_FILTER_HI_P07_0,Window CD Horizontal Filter phase 07" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P07C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P07C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P07C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P07C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P07C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P07C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C4++0x03 line.long 0x00 "H_FILTER_HI_P08_0,Window CD Horizontal Filter phase 08" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P08C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P08C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P08C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P08C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P08C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P08C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C8++0x03 line.long 0x00 "H_FILTER_HI_P09_0,Window CD Horizontal Filter phase 09" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P09C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P09C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P09C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P09C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P09C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P09C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4CC++0x03 line.long 0x00 "H_FILTER_HI_P0A_0,Window CD Horizontal Filter phase 0A" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0AC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0AC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0AC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0AC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0AC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0AC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D0++0x03 line.long 0x00 "H_FILTER_HI_P0B_0,Window CD Horizontal Filter phase 0B" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0BC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0BC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0BC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0BC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0BC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0BC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D4++0x03 line.long 0x00 "H_FILTER_HI_P0C_0,Window CD Horizontal Filter phase 0C" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0CC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0CC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0CC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0CC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0CC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0CC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D8++0x03 line.long 0x00 "H_FILTER_HI_P0D_0,Window CD Horizontal Filter phase 0D" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0DC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0DC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0DC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0DC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0DC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0DC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4DC++0x03 line.long 0x00 "H_FILTER_HI_P0E_0,Window CD Horizontal Filter phase 0E" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0EC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0EC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0EC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0EC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0EC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0EC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4E0++0x03 line.long 0x00 "H_FILTER_HI_P0F_0,Window CD Horizontal Filter phase 0F" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0FC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0FC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0FC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0FC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0FC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0FC0 ,MSB of the lobe 0" "0,1,2,3" width 0x0B tree.end tree.end tree "WIN" tree "AD" base ad:0x54200000+0x2800 width 17. ;"WIN_A Registers" group.long 0x600++0x03 line.long 0x00 "WIN_OPTIONS_0,Window AD Options" bitfld.long 0x00 31. " AD_H_FILTER_MODE ,Horizontal filter mode" "Old,New" bitfld.long 0x00 30. " AD_WIN_ENABLE ,Window AD Window enable" "Disabled,Enabled" bitfld.long 0x00 23. " AD_INTERLACE_ENABLE ,Window AD Interlace enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " AD_YUV_RANGE_EXPAND ,Window AD Enable range expansion" "Disabled,Enabled" bitfld.long 0x00 20. " AD_DV_ENABLE ,Window AD Digital Vibrance Enable" "Disabled,Enabled" bitfld.long 0x00 18. " AD_CSC_ENABLE ,Window AD Color Space Conversion Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " AD_CP_ENABLE ,Window AD Color Palette Enable" "Disabled,Enabled" bitfld.long 0x00 14. " AD_V_FILTER_UV_ALIGN ,Window AD V Filter UV Alignment" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " AD_V_FILTER_ENABLE ,Window AD V Filter Enable" "Disabled,Enabled" bitfld.long 0x00 8. " AD_H_FILTER_ENABLE ,Window AD H Filter Enable" "Disabled,Enabled" bitfld.long 0x00 6. " AD_COLOR_EXPAND ,Color expansion" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " AD_SCAN_COLUMN ,Window AD Scanning direction" "Disabled,Enabled" bitfld.long 0x00 2. " AD_V_DIRECTION ,Window AD Vertical (Y) drawing Direction" "Increment,Decrement" bitfld.long 0x00 0. " AD_H_DIRECTION ,Window AD Horizontal (X) drawing Direction" "Increment,Decrement" group.long 0x604++0x03 line.long 0x00 "BYTE_SWAP_0,Window AD Byte Swap" bitfld.long 0x00 0.--2. " AD_BYTE_SWAP ,Window AD Byte Swap" "NOSWAP,SWAP2,SWAP4,SWAP4HW,SWAP02,SWAPLEFT,?..." group.long 0x60C++0x03 line.long 0x00 "COLOR_DEPTH_0,Window AD Color depth" hexmask.long.byte 0x00 0.--6. 1. " AD_COLOR_DEPTH ,Window AD Color Depth" width 18. textline " " group.long 0x610++0x1B line.long 0x00 "POSITION_0,Window AD Position" hexmask.long.word 0x00 16.--28. 1. " AD_V_POSITION ,Window AD V Position" hexmask.long.word 0x00 0.--12. 1. " AD_H_POSITION ,Window AD H Position" line.long 0x04 "SIZE_0,Window AD Size" hexmask.long.word 0x04 16.--28. 1. " AD_V_SIZE ,Vertical size after scaling" hexmask.long.word 0x04 0.--12. 1. " AD_H_SIZE ,Horizontal size after scaling" line.long 0x08 "PRESCALED_SIZE_0,Window AD Pre-scaled Size" hexmask.long.word 0x08 16.--28. 1. " AD_V_PRESCALED_SIZE ,Window AD V Pre-scaled Size" hexmask.long.word 0x08 0.--14. 1. " AD_H_PRESCALED_SIZE ,Window AD H Pre-scaled Size" line.long 0x0C "H_INITIAL_DDA_0,Window AD H Initial DDA" hexmask.long.word 0x0C 0.--15. 1. " AD_H_INITIAL_DDA ,Window AD H Initial DDA" line.long 0x10 "V_INITIAL_DDA_0,Window AD V Initial DDA" hexmask.long.word 0x10 0.--15. 1. " AD_V_INITIAL_DDA ,Window AD V Initial DDA" line.long 0x14 "DDA_INCREMENT_0,Window AD DDA Increment" hexmask.long.word 0x14 16.--31. 1. " AD_V_DDA_INCREMENT ,Window AD Vertical DDA Increment" hexmask.long.word 0x14 0.--15. 1. " AD_H_DDA_INCREMENT ,Window AD Horizontal DDA Increment" line.long 0x18 "LINE_STRIDE_0,Window AD Line Stride" hexmask.long.word 0x18 16.--31. 1. " AD_UV_LINE_STRIDE ,Window AD Line Stride for Chroma" hexmask.long.word 0x18 0.--15. 1. " AD_LINE_STRIDE ,Window AD Line Stride" group.long 0x638++0x03 line.long 0x00 "DV_CONTROL_0,Window AD Digital Vibrance Control" bitfld.long 0x00 16.--18. " AD_DV_CONTROL_B ,Digital Vibrance control for B" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " AD_DV_CONTROL_G ,Digital Vibrance control for G" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " AD_DV_CONTROL_R ,Digital Vibrance control for R" "0,1,2,3,4,5,6,7" textline " " width 24. group.long 0x658++0x0F line.long 0x00 "BLEND_LAYER_CONTROL_0,Window AD" bitfld.long 0x00 25.--27. " AD_COLOR_KEY_SELECT ,AD COLOR KEY SELECT" "0,1,2,3,4,5,6,7" eventfld.long 0x00 24. " AD_BLEND_BYPASS ,AD BLEND BYPASS" "BLEND_ENABLE,BLEND_BYPASS" hexmask.long.byte 0x00 16.--23. 1. " AD_K2 ,AD K2" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_K1 ,AD K1" hexmask.long.byte 0x00 0.--7. 1. " AD_WINDOW_LAYER_DEPTH ,AD WINDOW LAYER DEPTH" line.long 0x04 "BLEND_MATCH_SELECT_0,Blend match select 0" bitfld.long 0x04 12.--13. " AD_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT ,AD BLEND FACTOR DST ALPHA MATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x04 8.--9. " AD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,AD BLEND FACTOR SRC ALPHA MATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x04 4.--6. " AD_BLEND_FACTOR_DST_COLOR_MATCH_SELECT ,AD BLEND FACTOR DST COLOR MATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x04 0.--2. " AD_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT ,AD BLEND FACTOR SRC COLOR MATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x08 "BLEND_NOMATCH_SELECT_0,Blend no match select 0" bitfld.long 0x08 12.--13. " AD_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,AD BLEND FACTOR DST ALPHA NOMATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x08 8.--9. " AD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,AD BLEND FACTOR SRC ALPHA NOMATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x08 4.--6. " AD_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,AD BLEND FACTOR DST COLOR NOMATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x08 0.--2. " AD_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,AD BLEND FACTOR SRC COLOR NOMATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x0C "BLEND_ALPHA_1BIT_0,Blend alpha 1 bit 0" hexmask.long.byte 0x0C 8.--15. 1. " AD_BLEND_WEIGHT1 ,Alpha value of 1" hexmask.long.byte 0x0C 0.--7. 1. " AD_BLEND_WEIGHT0 ,Alpha value of 0" width 0x0B tree.end tree "BD" base ad:0x54200000+0x3000 width 17. ;"WIN_B Registers" group.long 0x600++0x03 line.long 0x00 "WIN_OPTIONS_0,Window BD Options" bitfld.long 0x00 31. " BD_H_FILTER_MODE ,Horizontal filter mode" "Old,New" bitfld.long 0x00 30. " BD_WIN_ENABLE ,Window BD Window enable" "Disabled,Enabled" bitfld.long 0x00 23. " BD_INTERLACE_ENABLE ,Window BD Interlace enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " BD_YUV_RANGE_EXPAND ,Window BD Enable range expansion" "Disabled,Enabled" bitfld.long 0x00 20. " BD_DV_ENABLE ,Window BD Digital Vibrance Enable" "Disabled,Enabled" bitfld.long 0x00 18. " BD_CSC_ENABLE ,Window BD Color Space Conversion Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BD_CP_ENABLE ,Window BD Color Palette Enable" "Disabled,Enabled" bitfld.long 0x00 14. " BD_V_FILTER_UV_ALIGN ,Window BD V Filter UV Alignment" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " BD_V_FILTER_ENABLE ,Window BD V Filter Enable" "Disabled,Enabled" bitfld.long 0x00 8. " BD_H_FILTER_ENABLE ,Window BD H Filter Enable" "Disabled,Enabled" bitfld.long 0x00 6. " BD_COLOR_EXPAND ,Color expansion" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BD_SCAN_COLUMN ,Window BD Scanning direction" "Disabled,Enabled" bitfld.long 0x00 2. " BD_V_DIRECTION ,Window BD Vertical (Y) drawing Direction" "Increment,Decrement" bitfld.long 0x00 0. " BD_H_DIRECTION ,Window BD Horizontal (X) drawing Direction" "Increment,Decrement" group.long 0x604++0x03 line.long 0x00 "BYTE_SWAP_0,Window BD Byte Swap" bitfld.long 0x00 0.--2. " BD_BYTE_SWAP ,Window BD Byte Swap" "NOSWAP,SWAP2,SWAP4,SWAP4HW,SWAP02,SWAPLEFT,?..." group.long 0x60C++0x03 line.long 0x00 "COLOR_DEPTH_0,Window BD Color depth" hexmask.long.byte 0x00 0.--6. 1. " BD_COLOR_DEPTH ,Window BD Color Depth" width 18. textline " " group.long 0x610++0x1B line.long 0x00 "POSITION_0,Window BD Position" hexmask.long.word 0x00 16.--28. 1. " BD_V_POSITION ,Window BD V Position" hexmask.long.word 0x00 0.--12. 1. " BD_H_POSITION ,Window BD H Position" line.long 0x04 "SIZE_0,Window BD Size" hexmask.long.word 0x04 16.--28. 1. " BD_V_SIZE ,Vertical size after scaling" hexmask.long.word 0x04 0.--12. 1. " BD_H_SIZE ,Horizontal size after scaling" line.long 0x08 "PRESCALED_SIZE_0,Window BD Pre-scaled Size" hexmask.long.word 0x08 16.--28. 1. " BD_V_PRESCALED_SIZE ,Window BD V Pre-scaled Size" hexmask.long.word 0x08 0.--14. 1. " BD_H_PRESCALED_SIZE ,Window BD H Pre-scaled Size" line.long 0x0C "H_INITIAL_DDA_0,Window BD H Initial DDA" hexmask.long.word 0x0C 0.--15. 1. " BD_H_INITIAL_DDA ,Window BD H Initial DDA" line.long 0x10 "V_INITIAL_DDA_0,Window BD V Initial DDA" hexmask.long.word 0x10 0.--15. 1. " BD_V_INITIAL_DDA ,Window BD V Initial DDA" line.long 0x14 "DDA_INCREMENT_0,Window BD DDA Increment" hexmask.long.word 0x14 16.--31. 1. " BD_V_DDA_INCREMENT ,Window BD Vertical DDA Increment" hexmask.long.word 0x14 0.--15. 1. " BD_H_DDA_INCREMENT ,Window BD Horizontal DDA Increment" line.long 0x18 "LINE_STRIDE_0,Window BD Line Stride" hexmask.long.word 0x18 16.--31. 1. " BD_UV_LINE_STRIDE ,Window BD Line Stride for Chroma" hexmask.long.word 0x18 0.--15. 1. " BD_LINE_STRIDE ,Window BD Line Stride" group.long 0x638++0x03 line.long 0x00 "DV_CONTROL_0,Window BD Digital Vibrance Control" bitfld.long 0x00 16.--18. " BD_DV_CONTROL_B ,Digital Vibrance control for B" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " BD_DV_CONTROL_G ,Digital Vibrance control for G" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " BD_DV_CONTROL_R ,Digital Vibrance control for R" "0,1,2,3,4,5,6,7" textline " " width 24. group.long 0x658++0x0F line.long 0x00 "BLEND_LAYER_CONTROL_0,Window BD" bitfld.long 0x00 25.--27. " BD_COLOR_KEY_SELECT ,BD COLOR KEY SELECT" "0,1,2,3,4,5,6,7" eventfld.long 0x00 24. " BD_BLEND_BYPASS ,BD BLEND BYPASS" "BLEND_ENABLE,BLEND_BYPASS" hexmask.long.byte 0x00 16.--23. 1. " BD_K2 ,BD K2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_K1 ,BD K1" hexmask.long.byte 0x00 0.--7. 1. " BD_WINDOW_LAYER_DEPTH ,BD WINDOW LAYER DEPTH" line.long 0x04 "BLEND_MATCH_SELECT_0,Blend match select 0" bitfld.long 0x04 12.--13. " BD_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT ,BD BLEND FACTOR DST ALPHA MATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x04 8.--9. " BD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,BD BLEND FACTOR SRC ALPHA MATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x04 4.--6. " BD_BLEND_FACTOR_DST_COLOR_MATCH_SELECT ,BD BLEND FACTOR DST COLOR MATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x04 0.--2. " BD_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT ,BD BLEND FACTOR SRC COLOR MATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x08 "BLEND_NOMATCH_SELECT_0,Blend no match select 0" bitfld.long 0x08 12.--13. " BD_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,BD BLEND FACTOR DST ALPHA NOMATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x08 8.--9. " BD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,BD BLEND FACTOR SRC ALPHA NOMATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x08 4.--6. " BD_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,BD BLEND FACTOR DST COLOR NOMATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x08 0.--2. " BD_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,BD BLEND FACTOR SRC COLOR NOMATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x0C "BLEND_ALPHA_1BIT_0,Blend alpha 1 bit 0" hexmask.long.byte 0x0C 8.--15. 1. " BD_BLEND_WEIGHT1 ,Alpha value of 1" hexmask.long.byte 0x0C 0.--7. 1. " BD_BLEND_WEIGHT0 ,Alpha value of 0" width 0x0B tree.end tree "CD" base ad:0x54200000+0x3800 width 17. ;"WIN_C Registers" group.long 0x600++0x03 line.long 0x00 "WIN_OPTIONS_0,Window CD Options" bitfld.long 0x00 31. " CD_H_FILTER_MODE ,Horizontal filter mode" "Old,New" bitfld.long 0x00 30. " CD_WIN_ENABLE ,Window CD Window enable" "Disabled,Enabled" bitfld.long 0x00 23. " CD_INTERLACE_ENABLE ,Window CD Interlace enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " CD_YUV_RANGE_EXPAND ,Window CD Enable range expansion" "Disabled,Enabled" bitfld.long 0x00 20. " CD_DV_ENABLE ,Window CD Digital Vibrance Enable" "Disabled,Enabled" bitfld.long 0x00 18. " CD_CSC_ENABLE ,Window CD Color Space Conversion Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CD_CP_ENABLE ,Window CD Color Palette Enable" "Disabled,Enabled" bitfld.long 0x00 14. " CD_V_FILTER_UV_ALIGN ,Window CD V Filter UV Alignment" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " CD_V_FILTER_ENABLE ,Window CD V Filter Enable" "Disabled,Enabled" bitfld.long 0x00 8. " CD_H_FILTER_ENABLE ,Window CD H Filter Enable" "Disabled,Enabled" bitfld.long 0x00 6. " CD_COLOR_EXPAND ,Color expansion" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CD_SCAN_COLUMN ,Window CD Scanning direction" "Disabled,Enabled" bitfld.long 0x00 2. " CD_V_DIRECTION ,Window CD Vertical (Y) drawing Direction" "Increment,Decrement" bitfld.long 0x00 0. " CD_H_DIRECTION ,Window CD Horizontal (X) drawing Direction" "Increment,Decrement" group.long 0x604++0x03 line.long 0x00 "BYTE_SWAP_0,Window CD Byte Swap" bitfld.long 0x00 0.--2. " CD_BYTE_SWAP ,Window CD Byte Swap" "NOSWAP,SWAP2,SWAP4,SWAP4HW,SWAP02,SWAPLEFT,?..." group.long 0x60C++0x03 line.long 0x00 "COLOR_DEPTH_0,Window CD Color depth" hexmask.long.byte 0x00 0.--6. 1. " CD_COLOR_DEPTH ,Window CD Color Depth" width 18. textline " " group.long 0x610++0x1B line.long 0x00 "POSITION_0,Window CD Position" hexmask.long.word 0x00 16.--28. 1. " CD_V_POSITION ,Window CD V Position" hexmask.long.word 0x00 0.--12. 1. " CD_H_POSITION ,Window CD H Position" line.long 0x04 "SIZE_0,Window CD Size" hexmask.long.word 0x04 16.--28. 1. " CD_V_SIZE ,Vertical size after scaling" hexmask.long.word 0x04 0.--12. 1. " CD_H_SIZE ,Horizontal size after scaling" line.long 0x08 "PRESCALED_SIZE_0,Window CD Pre-scaled Size" hexmask.long.word 0x08 16.--28. 1. " CD_V_PRESCALED_SIZE ,Window CD V Pre-scaled Size" hexmask.long.word 0x08 0.--14. 1. " CD_H_PRESCALED_SIZE ,Window CD H Pre-scaled Size" line.long 0x0C "H_INITIAL_DDA_0,Window CD H Initial DDA" hexmask.long.word 0x0C 0.--15. 1. " CD_H_INITIAL_DDA ,Window CD H Initial DDA" line.long 0x10 "V_INITIAL_DDA_0,Window CD V Initial DDA" hexmask.long.word 0x10 0.--15. 1. " CD_V_INITIAL_DDA ,Window CD V Initial DDA" line.long 0x14 "DDA_INCREMENT_0,Window CD DDA Increment" hexmask.long.word 0x14 16.--31. 1. " CD_V_DDA_INCREMENT ,Window CD Vertical DDA Increment" hexmask.long.word 0x14 0.--15. 1. " CD_H_DDA_INCREMENT ,Window CD Horizontal DDA Increment" line.long 0x18 "LINE_STRIDE_0,Window CD Line Stride" hexmask.long.word 0x18 16.--31. 1. " CD_UV_LINE_STRIDE ,Window CD Line Stride for Chroma" hexmask.long.word 0x18 0.--15. 1. " CD_LINE_STRIDE ,Window CD Line Stride" group.long 0x638++0x03 line.long 0x00 "DV_CONTROL_0,Window CD Digital Vibrance Control" bitfld.long 0x00 16.--18. " CD_DV_CONTROL_B ,Digital Vibrance control for B" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " CD_DV_CONTROL_G ,Digital Vibrance control for G" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " CD_DV_CONTROL_R ,Digital Vibrance control for R" "0,1,2,3,4,5,6,7" textline " " width 24. group.long 0x658++0x0F line.long 0x00 "BLEND_LAYER_CONTROL_0,Window CD" bitfld.long 0x00 25.--27. " CD_COLOR_KEY_SELECT ,CD COLOR KEY SELECT" "0,1,2,3,4,5,6,7" eventfld.long 0x00 24. " CD_BLEND_BYPASS ,CD BLEND BYPASS" "BLEND_ENABLE,BLEND_BYPASS" hexmask.long.byte 0x00 16.--23. 1. " CD_K2 ,CD K2" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_K1 ,CD K1" hexmask.long.byte 0x00 0.--7. 1. " CD_WINDOW_LAYER_DEPTH ,CD WINDOW LAYER DEPTH" line.long 0x04 "BLEND_MATCH_SELECT_0,Blend match select 0" bitfld.long 0x04 12.--13. " CD_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT ,CD BLEND FACTOR DST ALPHA MATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x04 8.--9. " CD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,CD BLEND FACTOR SRC ALPHA MATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x04 4.--6. " CD_BLEND_FACTOR_DST_COLOR_MATCH_SELECT ,CD BLEND FACTOR DST COLOR MATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x04 0.--2. " CD_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT ,CD BLEND FACTOR SRC COLOR MATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x08 "BLEND_NOMATCH_SELECT_0,Blend no match select 0" bitfld.long 0x08 12.--13. " CD_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,CD BLEND FACTOR DST ALPHA NOMATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x08 8.--9. " CD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,CD BLEND FACTOR SRC ALPHA NOMATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x08 4.--6. " CD_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,CD BLEND FACTOR DST COLOR NOMATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x08 0.--2. " CD_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,CD BLEND FACTOR SRC COLOR NOMATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x0C "BLEND_ALPHA_1BIT_0,Blend alpha 1 bit 0" hexmask.long.byte 0x0C 8.--15. 1. " CD_BLEND_WEIGHT1 ,Alpha value of 1" hexmask.long.byte 0x0C 0.--7. 1. " CD_BLEND_WEIGHT0 ,Alpha value of 0" width 0x0B tree.end tree.end tree "WINBUF" tree "AD" base ad:0x54200000+0x2800 width 21. group.long 0x700++0x03 line.long 0x00 "START_ADDR_0,Window ADD Start Address" group.long 0x708++0x03 line.long 0x00 "START_ADDR_U_0,Window ADD Start Address for U plane" group.long 0x710++0x03 line.long 0x00 "START_ADDR_V_0,Window ADD Start Address for V plane" group.long 0x718++0x03 line.long 0x00 "ADDR_H_OFFSET_0,Window ADD Horizontal Address Offset" group.long 0x720++0x03 line.long 0x00 "ADDR_V_OFFSET_0,Window ADD Vertical Address Offset" group.long 0x728++0x0B line.long 0x00 "UFLOW_STATUS,Window ADD FIFO Underflow Status Register" bitfld.long 0x00 30. " COUNT_OFLOW ,Counter has overflowed" "Not occurred,Occurred" hexmask.long.tbyte 0x00 0.--23. 1. " UFLOW_COUNT ,Underflow count" line.long 0x04 "SURFACE_KIND_0,Window ADD Surface Kind" bitfld.long 0x04 31. " AD_BLX4_CYA ,Force BLx4 fetches if surface is Block Linear" "Disabled,Enabled" bitfld.long 0x04 4.--6. " AD_BLOCK_HEIGHT ,Block Height" "HEIGHT_1,HEIGHT_2,HEIGHT_4,HEIGHT_8,HEIGHT_16,HEIGHT_32,," bitfld.long 0x04 0.--1. " AD_SURFACE_KIND ,Surface kind" "PITCH,TILED,BL_16B2," line.long 0x08 "SURFACE_WEIGHT_0,Window AD Surface Weights" bitfld.long 0x08 5.--6. " AD_SURFACE_WEIGHT_V ,Window AD V Surface Weights" "2,4,8,16" bitfld.long 0x08 3.--4. " AD_SURFACE_WEIGHT_U ,Window AD U or UV Surface Weights" "2,4,8,16" bitfld.long 0x08 1.--2. " AD_SURFACE_WEIGHT_Y ,Window AD Y or packed Surface Weights" "2,4,8,16" textline " " bitfld.long 0x08 0. " AD_SURFACE_WEIGHT_OVERRIDE ,Weight Override" "Disabled,Enabled" textline " " width 22. group.long 0x734++0x03 line.long 0x00 "START_ADDR_HI_0,Window AD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " AD_START_ADDR_HI ,Window AD Start Address" "0,1,2,3" group.long 0x73C++0x03 line.long 0x00 "START_ADDR_HI_U_0,Window AD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " AD_START_ADDR_HI ,Window AD Start Address" "0,1,2,3" group.long 0x744++0x03 line.long 0x00 "START_ADDR_HI_V_0,Window AD Higher 2 bits of Start Address for V Plane" bitfld.long 0x00 0.--1. " AD_START_ADDR_HI_V ,Window AD Higher 2 bits of Start Address for V plane" "0,1,2,3" textline " " width 29. group.long 0x74C++0x03 line.long 0x00 "START_ADDR_FIELD2_0,Window AD Start Address" group.long 0x754++0x03 line.long 0x00 "START_ADDR_FIELD2_U_0,Window AD Start Address for U plane" group.long 0x75C++0x03 line.long 0x00 "START_ADDR_FIELD2_V_0,Window AD Start Address for V plane" group.long 0x764++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_0,Window AD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " AD_START_ADDR_FIELD2_HI ,Window AD Start Address" "0,1,2,3" group.long 0x76C++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_U_0,Window AD Higher 2 bits of Start Address for U plane" bitfld.long 0x00 0.--1. " AD_START_ADDR_FIELD2_HI_U ,Window AD Start Address for U plane" "0,1,2,3" group.long 0x774++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_V_0,Window AD Higher 2 bits of Start Address for V plane" bitfld.long 0x00 0.--1. " AD_START_ADDR_FIELD2_HI_V ,Window AD Higher 2 bits of Start Address for V plane" "0,1,2,3" group.long 0x77C++0x03 line.long 0x00 "ADDR_H_OFFSET_FIELD2_0,Window AD Horizontal address offset" group.long 0x784++0x03 line.long 0x00 "ADDR_V_OFFSET_FIELD2_0,Window AD Vertical address offset" group.long 0x790++0x03 line.long 0x00 "UFLOW_CTRL_0,DC WINBUF AD UFLOW CTRL 0" bitfld.long 0x00 0. " AD_UFLOW_CTRL_DBG_MODE ,AD UFLOW CTRL DBG MODE" "Disabled,Enabled" textline " " width 25. group.long 0x794++0x27 line.long 0x00 "UFLOW_DBG_PIXEL_0,DC WINBUF AD UFLOW DBG PIXEL 0" line.long 0x04 "UFLOW_THRESHOLD_0,DC WINBUF AD UFLOW THRESHOLD 0" hexmask.long.word 0x04 0.--12. 1. " AD_UFLOW_THRESHOLD ,AD UFLOW THRESHOLD" line.long 0x08 "SPOOL_UP_0,Spool up time configuration for different windows related logic" hexmask.long.word 0x08 16.--28. 1. " AD_SPOOL_UP_DURATION ,AD SPOOL UP DURATION" bitfld.long 0x08 1. " AD_SPOOL_UP_EDGE ,AD SPOOL UP EDGE" "NEGEDGE,POSEDGE" bitfld.long 0x08 0. " AD_SPOOL_UP_CTRL ,AD SPOOL UP CTRL" "MAX,PROGRAMMABLE" line.long 0x0C "SCALEFACTOR_THRESHOLD_0,DC WINBUF AD SCALEFACTOR THRESHOLD 0" hexmask.long.word 0x0C 16.--31. 1. " AD_SF_LWM_THRESHOLD ,AD SF LWM THRESHOLD" hexmask.long.word 0x0C 0.--15. 1. " AD_SF_HWM_THRESHOLD ,AD SF HWM THRESHOLD" line.long 0x10 "LATENCY_THRESHOLD_0,Register controls the behavior of the rdy4_latency_event from the display to the MC" bitfld.long 0x10 31. " AD_RDY4LATENCY_THRESHOLD_ENABLE ,AD RDY4LATENCY THRESHOLD ENABLE" "Disabled,Enabled" bitfld.long 0x10 30. " AD_RDY4LATENCY_SPOOLUP_CTRL ,AD RDY4LATENCY SPOOLUP CTRL" "DISALLOW,ALLOW" textline " " hexmask.long.word 0x10 16.--28. 1. " AD_RDY4LATENCY_SPOOLUP_DURATION ,AD RDY4LATENCY THRESHOLD" hexmask.long.word 0x10 0.--15. 1. " AD_RDY4LATENCY_THRESHOLD ,AD RDY4LATENCY THRESHOLD" line.long 0x14 "MEMFETCH_DEBUG_STATUS_0,Memfetch Debug Status" bitfld.long 0x14 16. " AD_DEBUG_ENABLE ,Reg to enable FGCG for flops added to debug signals in memfetch" "Disabled,Enabled" bitfld.long 0x14 15. " AD_ALIGN_FIFO_NON_IDLE ,Align FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 14. " AD_PIPE1_FIFO_NON_IDLE ,Pipe1 FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 13. " AD_PIPE0_FIFO_NON_IDLE ,Pipe0 FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 12. " AD_FRAME_FIFO_NON_IDLE ,Frame FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 11. " AD_SURFACE_FIFO_NON_IDLE ,Surface FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 10. " AD_TAG_FIFO_NON_IDLE ,Tag FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 9. " AD_RSP_FIFO_NON_IDLE ,Response FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 8. " AD_REQ_FIFO_NON_IDLE ,Request FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 7. " AD_DP_VALID_NON_IDLE ,DP lines valid at end of frame" "Idle,Busy" bitfld.long 0x14 6. " AD_V_SSM_NON_IDLE ,V SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 5. " AD_U_SSM_NON_IDLE ,U SSM is non-idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 4. " AD_Y_SSM_NON_IDLE ,Y SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 3. " AD_DP_POOL_AVAIL ,DP thinks there is data in the pool at end of frame" "No data,Data" bitfld.long 0x14 2. " AD_POOL_NOT_EMPTY ,Status of pool at end of frame" "Empty,Not empty" textline " " bitfld.long 0x14 1. " AD_UNDERFLOW_LINE1 ,Underflow of line1" "No underflow,Underflow" bitfld.long 0x14 0. " AD_UNDERFLOW_LINE0 ,Underflow of line0" "No underflow,Underflow" line.long 0x18 "MEMFETCH_CONTROL_0,Memfetch Control Register" bitfld.long 0x18 1. " AD_MEMFETCH_CLK_GATE_OVERRIDE ,Disable clock-gating of memfetch for a controller" "Disabled,Enabled" bitfld.long 0x18 0. " AD_MEMFETCH_RESET ,Reset memfetch for a controller" "Disabled,Enabled" line.long 0x1C "OCCUPANCY_THROTTLE_0,DC WINBUF AD OCCUPANCY THROTTLE 0" hexmask.long.word 0x1C 16.--31. 1. " AD_OCCUPANCY_MAX_THRESHOLD ,AD OCCUPANCY MAX THRESHOLD" bitfld.long 0x1C 0. " AD_OCCUPANCY_THROTTLE_MODE ,AD OCCUPANCY THROTTLE MODE" "Disabled,Enabled" line.long 0x20 "SCRATCH_REGISTER_0_0,DC WINBUF AD SCRATCH REGISTER 0 0" line.long 0x24 "SCRATCH_REGISTER_1_0,DC WINBUF AD SCRATCH REGISTER 1 0" width 0x0B tree.end tree "BD" base ad:0x54200000+0x3000 width 21. group.long 0x700++0x03 line.long 0x00 "START_ADDR_0,Window BDD Start Address" group.long 0x708++0x03 line.long 0x00 "START_ADDR_U_0,Window BDD Start Address for U plane" group.long 0x710++0x03 line.long 0x00 "START_ADDR_V_0,Window BDD Start Address for V plane" group.long 0x718++0x03 line.long 0x00 "ADDR_H_OFFSET_0,Window BDD Horizontal Address Offset" group.long 0x720++0x03 line.long 0x00 "ADDR_V_OFFSET_0,Window BDD Vertical Address Offset" group.long 0x728++0x0B line.long 0x00 "UFLOW_STATUS,Window BDD FIFO Underflow Status Register" bitfld.long 0x00 30. " COUNT_OFLOW ,Counter has overflowed" "Not occurred,Occurred" hexmask.long.tbyte 0x00 0.--23. 1. " UFLOW_COUNT ,Underflow count" line.long 0x04 "SURFACE_KIND_0,Window BDD Surface Kind" bitfld.long 0x04 31. " BD_BLX4_CYA ,Force BLx4 fetches if surface is Block Linear" "Disabled,Enabled" bitfld.long 0x04 4.--6. " BD_BLOCK_HEIGHT ,Block Height" "HEIGHT_1,HEIGHT_2,HEIGHT_4,HEIGHT_8,HEIGHT_16,HEIGHT_32,," bitfld.long 0x04 0.--1. " BD_SURFACE_KIND ,Surface kind" "PITCH,TILED,BL_16B2," line.long 0x08 "SURFACE_WEIGHT_0,Window BD Surface Weights" bitfld.long 0x08 5.--6. " BD_SURFACE_WEIGHT_V ,Window BD V Surface Weights" "2,4,8,16" bitfld.long 0x08 3.--4. " BD_SURFACE_WEIGHT_U ,Window BD U or UV Surface Weights" "2,4,8,16" bitfld.long 0x08 1.--2. " BD_SURFACE_WEIGHT_Y ,Window BD Y or packed Surface Weights" "2,4,8,16" textline " " bitfld.long 0x08 0. " BD_SURFACE_WEIGHT_OVERRIDE ,Weight Override" "Disabled,Enabled" textline " " width 22. group.long 0x734++0x03 line.long 0x00 "START_ADDR_HI_0,Window BD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " BD_START_ADDR_HI ,Window BD Start Address" "0,1,2,3" group.long 0x73C++0x03 line.long 0x00 "START_ADDR_HI_U_0,Window BD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " BD_START_ADDR_HI ,Window BD Start Address" "0,1,2,3" group.long 0x744++0x03 line.long 0x00 "START_ADDR_HI_V_0,Window BD Higher 2 bits of Start Address for V Plane" bitfld.long 0x00 0.--1. " BD_START_ADDR_HI_V ,Window BD Higher 2 bits of Start Address for V plane" "0,1,2,3" textline " " width 29. group.long 0x74C++0x03 line.long 0x00 "START_ADDR_FIELD2_0,Window BD Start Address" group.long 0x754++0x03 line.long 0x00 "START_ADDR_FIELD2_U_0,Window BD Start Address for U plane" group.long 0x75C++0x03 line.long 0x00 "START_ADDR_FIELD2_V_0,Window BD Start Address for V plane" group.long 0x764++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_0,Window BD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " BD_START_ADDR_FIELD2_HI ,Window BD Start Address" "0,1,2,3" group.long 0x76C++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_U_0,Window BD Higher 2 bits of Start Address for U plane" bitfld.long 0x00 0.--1. " BD_START_ADDR_FIELD2_HI_U ,Window BD Start Address for U plane" "0,1,2,3" group.long 0x774++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_V_0,Window BD Higher 2 bits of Start Address for V plane" bitfld.long 0x00 0.--1. " BD_START_ADDR_FIELD2_HI_V ,Window BD Higher 2 bits of Start Address for V plane" "0,1,2,3" group.long 0x77C++0x03 line.long 0x00 "ADDR_H_OFFSET_FIELD2_0,Window BD Horizontal address offset" group.long 0x784++0x03 line.long 0x00 "ADDR_V_OFFSET_FIELD2_0,Window BD Vertical address offset" group.long 0x790++0x03 line.long 0x00 "UFLOW_CTRL_0,DC WINBUF BD UFLOW CTRL 0" bitfld.long 0x00 0. " BD_UFLOW_CTRL_DBG_MODE ,BD UFLOW CTRL DBG MODE" "Disabled,Enabled" textline " " width 25. group.long 0x794++0x27 line.long 0x00 "UFLOW_DBG_PIXEL_0,DC WINBUF BD UFLOW DBG PIXEL 0" line.long 0x04 "UFLOW_THRESHOLD_0,DC WINBUF BD UFLOW THRESHOLD 0" hexmask.long.word 0x04 0.--12. 1. " BD_UFLOW_THRESHOLD ,BD UFLOW THRESHOLD" line.long 0x08 "SPOOL_UP_0,Spool up time configuration for different windows related logic" hexmask.long.word 0x08 16.--28. 1. " BD_SPOOL_UP_DURATION ,BD SPOOL UP DURATION" bitfld.long 0x08 1. " BD_SPOOL_UP_EDGE ,BD SPOOL UP EDGE" "NEGEDGE,POSEDGE" bitfld.long 0x08 0. " BD_SPOOL_UP_CTRL ,BD SPOOL UP CTRL" "MAX,PROGRAMMABLE" line.long 0x0C "SCALEFACTOR_THRESHOLD_0,DC WINBUF BD SCALEFACTOR THRESHOLD 0" hexmask.long.word 0x0C 16.--31. 1. " BD_SF_LWM_THRESHOLD ,BD SF LWM THRESHOLD" hexmask.long.word 0x0C 0.--15. 1. " BD_SF_HWM_THRESHOLD ,BD SF HWM THRESHOLD" line.long 0x10 "LATENCY_THRESHOLD_0,Register controls the behavior of the rdy4_latency_event from the display to the MC" bitfld.long 0x10 31. " BD_RDY4LATENCY_THRESHOLD_ENABLE ,BD RDY4LATENCY THRESHOLD ENABLE" "Disabled,Enabled" bitfld.long 0x10 30. " BD_RDY4LATENCY_SPOOLUP_CTRL ,BD RDY4LATENCY SPOOLUP CTRL" "DISALLOW,ALLOW" textline " " hexmask.long.word 0x10 16.--28. 1. " BD_RDY4LATENCY_SPOOLUP_DURATION ,BD RDY4LATENCY THRESHOLD" hexmask.long.word 0x10 0.--15. 1. " BD_RDY4LATENCY_THRESHOLD ,BD RDY4LATENCY THRESHOLD" line.long 0x14 "MEMFETCH_DEBUG_STATUS_0,Memfetch Debug Status" bitfld.long 0x14 16. " BD_DEBUG_ENABLE ,Reg to enable FGCG for flops added to debug signals in memfetch" "Disabled,Enabled" bitfld.long 0x14 15. " BD_ALIGN_FIFO_NON_IDLE ,Align FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 14. " BD_PIPE1_FIFO_NON_IDLE ,Pipe1 FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 13. " BD_PIPE0_FIFO_NON_IDLE ,Pipe0 FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 12. " BD_FRAME_FIFO_NON_IDLE ,Frame FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 11. " BD_SURFACE_FIFO_NON_IDLE ,Surface FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 10. " BD_TAG_FIFO_NON_IDLE ,Tag FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 9. " BD_RSP_FIFO_NON_IDLE ,Response FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 8. " BD_REQ_FIFO_NON_IDLE ,Request FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 7. " BD_DP_VALID_NON_IDLE ,DP lines valid at end of frame" "Idle,Busy" bitfld.long 0x14 6. " BD_V_SSM_NON_IDLE ,V SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 5. " BD_U_SSM_NON_IDLE ,U SSM is non-idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 4. " BD_Y_SSM_NON_IDLE ,Y SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 3. " BD_DP_POOL_AVAIL ,DP thinks there is data in the pool at end of frame" "No data,Data" bitfld.long 0x14 2. " BD_POOL_NOT_EMPTY ,Status of pool at end of frame" "Empty,Not empty" textline " " bitfld.long 0x14 1. " BD_UNDERFLOW_LINE1 ,Underflow of line1" "No underflow,Underflow" bitfld.long 0x14 0. " BD_UNDERFLOW_LINE0 ,Underflow of line0" "No underflow,Underflow" line.long 0x18 "MEMFETCH_CONTROL_0,Memfetch Control Register" bitfld.long 0x18 1. " BD_MEMFETCH_CLK_GATE_OVERRIDE ,Disable clock-gating of memfetch for a controller" "Disabled,Enabled" bitfld.long 0x18 0. " BD_MEMFETCH_RESET ,Reset memfetch for a controller" "Disabled,Enabled" line.long 0x1C "OCCUPANCY_THROTTLE_0,DC WINBUF BD OCCUPANCY THROTTLE 0" hexmask.long.word 0x1C 16.--31. 1. " BD_OCCUPANCY_MAX_THRESHOLD ,BD OCCUPANCY MAX THRESHOLD" bitfld.long 0x1C 0. " BD_OCCUPANCY_THROTTLE_MODE ,BD OCCUPANCY THROTTLE MODE" "Disabled,Enabled" line.long 0x20 "SCRATCH_REGISTER_0_0,DC WINBUF BD SCRATCH REGISTER 0 0" line.long 0x24 "SCRATCH_REGISTER_1_0,DC WINBUF BD SCRATCH REGISTER 1 0" width 0x0B tree.end tree "CD" base ad:0x54200000+0x3800 width 21. group.long 0x700++0x03 line.long 0x00 "START_ADDR_0,Window CDD Start Address" group.long 0x708++0x03 line.long 0x00 "START_ADDR_U_0,Window CDD Start Address for U plane" group.long 0x710++0x03 line.long 0x00 "START_ADDR_V_0,Window CDD Start Address for V plane" group.long 0x718++0x03 line.long 0x00 "ADDR_H_OFFSET_0,Window CDD Horizontal Address Offset" group.long 0x720++0x03 line.long 0x00 "ADDR_V_OFFSET_0,Window CDD Vertical Address Offset" group.long 0x728++0x0B line.long 0x00 "UFLOW_STATUS,Window CDD FIFO Underflow Status Register" bitfld.long 0x00 30. " COUNT_OFLOW ,Counter has overflowed" "Not occurred,Occurred" hexmask.long.tbyte 0x00 0.--23. 1. " UFLOW_COUNT ,Underflow count" line.long 0x04 "SURFACE_KIND_0,Window CDD Surface Kind" bitfld.long 0x04 31. " CD_BLX4_CYA ,Force BLx4 fetches if surface is Block Linear" "Disabled,Enabled" bitfld.long 0x04 4.--6. " CD_BLOCK_HEIGHT ,Block Height" "HEIGHT_1,HEIGHT_2,HEIGHT_4,HEIGHT_8,HEIGHT_16,HEIGHT_32,," bitfld.long 0x04 0.--1. " CD_SURFACE_KIND ,Surface kind" "PITCH,TILED,BL_16B2," line.long 0x08 "SURFACE_WEIGHT_0,Window CD Surface Weights" bitfld.long 0x08 5.--6. " CD_SURFACE_WEIGHT_V ,Window CD V Surface Weights" "2,4,8,16" bitfld.long 0x08 3.--4. " CD_SURFACE_WEIGHT_U ,Window CD U or UV Surface Weights" "2,4,8,16" bitfld.long 0x08 1.--2. " CD_SURFACE_WEIGHT_Y ,Window CD Y or packed Surface Weights" "2,4,8,16" textline " " bitfld.long 0x08 0. " CD_SURFACE_WEIGHT_OVERRIDE ,Weight Override" "Disabled,Enabled" textline " " width 22. group.long 0x734++0x03 line.long 0x00 "START_ADDR_HI_0,Window CD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " CD_START_ADDR_HI ,Window CD Start Address" "0,1,2,3" group.long 0x73C++0x03 line.long 0x00 "START_ADDR_HI_U_0,Window CD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " CD_START_ADDR_HI ,Window CD Start Address" "0,1,2,3" group.long 0x744++0x03 line.long 0x00 "START_ADDR_HI_V_0,Window CD Higher 2 bits of Start Address for V Plane" bitfld.long 0x00 0.--1. " CD_START_ADDR_HI_V ,Window CD Higher 2 bits of Start Address for V plane" "0,1,2,3" textline " " width 29. group.long 0x74C++0x03 line.long 0x00 "START_ADDR_FIELD2_0,Window CD Start Address" group.long 0x754++0x03 line.long 0x00 "START_ADDR_FIELD2_U_0,Window CD Start Address for U plane" group.long 0x75C++0x03 line.long 0x00 "START_ADDR_FIELD2_V_0,Window CD Start Address for V plane" group.long 0x764++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_0,Window CD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " CD_START_ADDR_FIELD2_HI ,Window CD Start Address" "0,1,2,3" group.long 0x76C++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_U_0,Window CD Higher 2 bits of Start Address for U plane" bitfld.long 0x00 0.--1. " CD_START_ADDR_FIELD2_HI_U ,Window CD Start Address for U plane" "0,1,2,3" group.long 0x774++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_V_0,Window CD Higher 2 bits of Start Address for V plane" bitfld.long 0x00 0.--1. " CD_START_ADDR_FIELD2_HI_V ,Window CD Higher 2 bits of Start Address for V plane" "0,1,2,3" group.long 0x77C++0x03 line.long 0x00 "ADDR_H_OFFSET_FIELD2_0,Window CD Horizontal address offset" group.long 0x784++0x03 line.long 0x00 "ADDR_V_OFFSET_FIELD2_0,Window CD Vertical address offset" group.long 0x790++0x03 line.long 0x00 "UFLOW_CTRL_0,DC WINBUF CD UFLOW CTRL 0" bitfld.long 0x00 0. " CD_UFLOW_CTRL_DBG_MODE ,CD UFLOW CTRL DBG MODE" "Disabled,Enabled" textline " " width 25. group.long 0x794++0x27 line.long 0x00 "UFLOW_DBG_PIXEL_0,DC WINBUF CD UFLOW DBG PIXEL 0" line.long 0x04 "UFLOW_THRESHOLD_0,DC WINBUF CD UFLOW THRESHOLD 0" hexmask.long.word 0x04 0.--12. 1. " CD_UFLOW_THRESHOLD ,CD UFLOW THRESHOLD" line.long 0x08 "SPOOL_UP_0,Spool up time configuration for different windows related logic" hexmask.long.word 0x08 16.--28. 1. " CD_SPOOL_UP_DURATION ,CD SPOOL UP DURATION" bitfld.long 0x08 1. " CD_SPOOL_UP_EDGE ,CD SPOOL UP EDGE" "NEGEDGE,POSEDGE" bitfld.long 0x08 0. " CD_SPOOL_UP_CTRL ,CD SPOOL UP CTRL" "MAX,PROGRAMMABLE" line.long 0x0C "SCALEFACTOR_THRESHOLD_0,DC WINBUF CD SCALEFACTOR THRESHOLD 0" hexmask.long.word 0x0C 16.--31. 1. " CD_SF_LWM_THRESHOLD ,CD SF LWM THRESHOLD" hexmask.long.word 0x0C 0.--15. 1. " CD_SF_HWM_THRESHOLD ,CD SF HWM THRESHOLD" line.long 0x10 "LATENCY_THRESHOLD_0,Register controls the behavior of the rdy4_latency_event from the display to the MC" bitfld.long 0x10 31. " CD_RDY4LATENCY_THRESHOLD_ENABLE ,CD RDY4LATENCY THRESHOLD ENABLE" "Disabled,Enabled" bitfld.long 0x10 30. " CD_RDY4LATENCY_SPOOLUP_CTRL ,CD RDY4LATENCY SPOOLUP CTRL" "DISALLOW,ALLOW" textline " " hexmask.long.word 0x10 16.--28. 1. " CD_RDY4LATENCY_SPOOLUP_DURATION ,CD RDY4LATENCY THRESHOLD" hexmask.long.word 0x10 0.--15. 1. " CD_RDY4LATENCY_THRESHOLD ,CD RDY4LATENCY THRESHOLD" line.long 0x14 "MEMFETCH_DEBUG_STATUS_0,Memfetch Debug Status" bitfld.long 0x14 16. " CD_DEBUG_ENABLE ,Reg to enable FGCG for flops added to debug signals in memfetch" "Disabled,Enabled" bitfld.long 0x14 15. " CD_ALIGN_FIFO_NON_IDLE ,Align FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 14. " CD_PIPE1_FIFO_NON_IDLE ,Pipe1 FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 13. " CD_PIPE0_FIFO_NON_IDLE ,Pipe0 FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 12. " CD_FRAME_FIFO_NON_IDLE ,Frame FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 11. " CD_SURFACE_FIFO_NON_IDLE ,Surface FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 10. " CD_TAG_FIFO_NON_IDLE ,Tag FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 9. " CD_RSP_FIFO_NON_IDLE ,Response FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 8. " CD_REQ_FIFO_NON_IDLE ,Request FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 7. " CD_DP_VALID_NON_IDLE ,DP lines valid at end of frame" "Idle,Busy" bitfld.long 0x14 6. " CD_V_SSM_NON_IDLE ,V SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 5. " CD_U_SSM_NON_IDLE ,U SSM is non-idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 4. " CD_Y_SSM_NON_IDLE ,Y SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 3. " CD_DP_POOL_AVAIL ,DP thinks there is data in the pool at end of frame" "No data,Data" bitfld.long 0x14 2. " CD_POOL_NOT_EMPTY ,Status of pool at end of frame" "Empty,Not empty" textline " " bitfld.long 0x14 1. " CD_UNDERFLOW_LINE1 ,Underflow of line1" "No underflow,Underflow" bitfld.long 0x14 0. " CD_UNDERFLOW_LINE0 ,Underflow of line0" "No underflow,Underflow" line.long 0x18 "MEMFETCH_CONTROL_0,Memfetch Control Register" bitfld.long 0x18 1. " CD_MEMFETCH_CLK_GATE_OVERRIDE ,Disable clock-gating of memfetch for a controller" "Disabled,Enabled" bitfld.long 0x18 0. " CD_MEMFETCH_RESET ,Reset memfetch for a controller" "Disabled,Enabled" line.long 0x1C "OCCUPANCY_THROTTLE_0,DC WINBUF CD OCCUPANCY THROTTLE 0" hexmask.long.word 0x1C 16.--31. 1. " CD_OCCUPANCY_MAX_THRESHOLD ,CD OCCUPANCY MAX THRESHOLD" bitfld.long 0x1C 0. " CD_OCCUPANCY_THROTTLE_MODE ,CD OCCUPANCY THROTTLE MODE" "Disabled,Enabled" line.long 0x20 "SCRATCH_REGISTER_0_0,DC WINBUF CD SCRATCH REGISTER 0 0" line.long 0x24 "SCRATCH_REGISTER_1_0,DC WINBUF CD SCRATCH REGISTER 1 0" width 0x0B tree.end tree.end tree "WINBUF_CDE" tree "AD" base ad:0x54200000+0x2800 width 24. group.long 0x7BC++0x07 line.long 0x00 "CDE_CONTROL_0,WINBUF AD CDE window control register" bitfld.long 0x00 13. " ADD_CLEARRESPONSEONFRAMESTART ,Reset response block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 12. " ADD_CLEARREQUESTONFRAMESTART ,Reset request block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 0. " ADD_ENABLESURFACE0 ,Enabled compression for surface 0" "Disabled,Enabled" line.long 0x04 "CDE_COMPTAG_BASE_0_0,Base address of compression bit storage per surface" group.long 0x7C8++0x03 line.long 0x00 "CDE_COMPTAG_BASEHI_0_0,Base address high of compression bit storage per surface" hexmask.long.byte 0x00 0.--7. 1. " AD_BASEADDRESSHI ,Storage Base Address Hi for surface N" group.long 0x7D0++0x17 line.long 0x00 "ZBC_COLOR_0_0,One ZBC Color per surface" line.long 0x04 "SURFACE_OFFSET_0_0,X and Y offset of surface N" hexmask.long.word 0x04 16.--27. 1. " AD_YOFFSET ,Y offset for surface N" hexmask.long.word 0x04 0.--11. 1. " AD_XOFFSET ,X offset for surface N" line.long 0x08 "CTB_ENTRY_0_0,Maximum CTB entry count register" hexmask.long.byte 0x08 0.--7. 1. " AD_MAXENTRYCOUNT0 ,Maximum CTB entry count per surface" line.long 0x0C "CG_SW_OVR_0,SW override to enable/disable CDE clock-gating" bitfld.long 0x0C 0. " AD_CG ,CG software override to enable/disable CDE clock gating" "Disabled,Enabled" line.long 0x10 "PM_CONTROL_0,PM control register" bitfld.long 0x10 0.--3. " AD_SELECT ,Select lines for PM counters implemented in the CDE" "CTB_LOOKUP_HIT,CTB_LOOKUP_MISS,UNCOMP_1TO1,ARITHMETIC_2TO1,REDUCTION_8TO1,ZBC,CSR_FETCH_64B,CTB_FETCH_64B,PIXEL_FETCH_64B,PIXEL_FETCH_32B,CTB_READS_SAMPLED,CTB_READ_RSP_LATENCY,PIXEL_READS_SAMPLED,PIXEL_READ_RSP_LATENCY,?..." line.long 0x14 "PM_COUNTER_0,PM counter register" width 0x0B tree.end tree "BD" base ad:0x54200000+0x3000 width 24. group.long 0x7BC++0x07 line.long 0x00 "CDE_CONTROL_0,WINBUF BD CDE window control register" bitfld.long 0x00 13. " BDD_CLEARRESPONSEONFRAMESTART ,Reset response block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 12. " BDD_CLEARREQUESTONFRAMESTART ,Reset request block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 0. " BDD_ENABLESURFACE0 ,Enabled compression for surface 0" "Disabled,Enabled" line.long 0x04 "CDE_COMPTAG_BASE_0_0,Base address of compression bit storage per surface" group.long 0x7C8++0x03 line.long 0x00 "CDE_COMPTAG_BASEHI_0_0,Base address high of compression bit storage per surface" hexmask.long.byte 0x00 0.--7. 1. " BD_BASEADDRESSHI ,Storage Base Address Hi for surface N" group.long 0x7D0++0x17 line.long 0x00 "ZBC_COLOR_0_0,One ZBC Color per surface" line.long 0x04 "SURFACE_OFFSET_0_0,X and Y offset of surface N" hexmask.long.word 0x04 16.--27. 1. " BD_YOFFSET ,Y offset for surface N" hexmask.long.word 0x04 0.--11. 1. " BD_XOFFSET ,X offset for surface N" line.long 0x08 "CTB_ENTRY_0_0,Maximum CTB entry count register" hexmask.long.byte 0x08 0.--7. 1. " BD_MAXENTRYCOUNT0 ,Maximum CTB entry count per surface" line.long 0x0C "CG_SW_OVR_0,SW override to enable/disable CDE clock-gating" bitfld.long 0x0C 0. " BD_CG ,CG software override to enable/disable CDE clock gating" "Disabled,Enabled" line.long 0x10 "PM_CONTROL_0,PM control register" bitfld.long 0x10 0.--3. " BD_SELECT ,Select lines for PM counters implemented in the CDE" "CTB_LOOKUP_HIT,CTB_LOOKUP_MISS,UNCOMP_1TO1,ARITHMETIC_2TO1,REDUCTION_8TO1,ZBC,CSR_FETCH_64B,CTB_FETCH_64B,PIXEL_FETCH_64B,PIXEL_FETCH_32B,CTB_READS_SAMPLED,CTB_READ_RSP_LATENCY,PIXEL_READS_SAMPLED,PIXEL_READ_RSP_LATENCY,?..." line.long 0x14 "PM_COUNTER_0,PM counter register" width 0x0B tree.end tree "CD" base ad:0x54200000+0x3800 width 24. group.long 0x7BC++0x07 line.long 0x00 "CDE_CONTROL_0,WINBUF CD CDE window control register" bitfld.long 0x00 13. " CDD_CLEARRESPONSEONFRAMESTART ,Reset response block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 12. " CDD_CLEARREQUESTONFRAMESTART ,Reset request block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 0. " CDD_ENABLESURFACE0 ,Enabled compression for surface 0" "Disabled,Enabled" line.long 0x04 "CDE_COMPTAG_BASE_0_0,Base address of compression bit storage per surface" group.long 0x7C8++0x03 line.long 0x00 "CDE_COMPTAG_BASEHI_0_0,Base address high of compression bit storage per surface" hexmask.long.byte 0x00 0.--7. 1. " CD_BASEADDRESSHI ,Storage Base Address Hi for surface N" group.long 0x7D0++0x17 line.long 0x00 "ZBC_COLOR_0_0,One ZBC Color per surface" line.long 0x04 "SURFACE_OFFSET_0_0,X and Y offset of surface N" hexmask.long.word 0x04 16.--27. 1. " CD_YOFFSET ,Y offset for surface N" hexmask.long.word 0x04 0.--11. 1. " CD_XOFFSET ,X offset for surface N" line.long 0x08 "CTB_ENTRY_0_0,Maximum CTB entry count register" hexmask.long.byte 0x08 0.--7. 1. " CD_MAXENTRYCOUNT0 ,Maximum CTB entry count per surface" line.long 0x0C "CG_SW_OVR_0,SW override to enable/disable CDE clock-gating" bitfld.long 0x0C 0. " CD_CG ,CG software override to enable/disable CDE clock gating" "Disabled,Enabled" line.long 0x10 "PM_CONTROL_0,PM control register" bitfld.long 0x10 0.--3. " CD_SELECT ,Select lines for PM counters implemented in the CDE" "CTB_LOOKUP_HIT,CTB_LOOKUP_MISS,UNCOMP_1TO1,ARITHMETIC_2TO1,REDUCTION_8TO1,ZBC,CSR_FETCH_64B,CTB_FETCH_64B,PIXEL_FETCH_64B,PIXEL_FETCH_32B,CTB_READS_SAMPLED,CTB_READ_RSP_LATENCY,PIXEL_READS_SAMPLED,PIXEL_READ_RSP_LATENCY,?..." line.long 0x14 "PM_COUNTER_0,PM counter register" width 0x0B tree.end tree.end tree.end tree "Display B" tree "WINC" tree "AD" base ad:0x54240000+0x2800 width 21. wgroup.long 0x00++0x03 line.long 0x00 "COLOR_PALETTE_0,Window AD Color Palette" button "BGR" "d (ad:0x54240000+0x2800+0x00)--(ad:0x54240000+0x2800+0x3fc) /long" group.long 0x400++0x03 line.long 0x00 "PALETTE_COLOR_EXT_0,Window A Palette Color Extension" hexmask.long.byte 0x00 1.--7. 1. " AD_PALETTE_COLOR_EXT ,Window A Palette Color Extension" group.long 0x404++0x03 line.long 0x00 "H_FILTER_P00_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P00C5 ,Phase 00 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P00C4 ,Phase 00 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P00C3 ,Phase 00 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 00 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P00C1 ,Phase 00 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P00C0 ,Phase 00 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x408++0x03 line.long 0x00 "H_FILTER_P01_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P01C5 ,Phase 01 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P01C4 ,Phase 01 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P01C3 ,Phase 01 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 01 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P01C1 ,Phase 01 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P01C0 ,Phase 01 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x40C++0x03 line.long 0x00 "H_FILTER_P02_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P02C5 ,Phase 02 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P02C4 ,Phase 02 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P02C3 ,Phase 02 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 02 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P02C1 ,Phase 02 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P02C0 ,Phase 02 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x410++0x03 line.long 0x00 "H_FILTER_P03_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P03C5 ,Phase 03 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P03C4 ,Phase 03 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P03C3 ,Phase 03 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 03 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P03C1 ,Phase 03 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P03C0 ,Phase 03 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x414++0x03 line.long 0x00 "H_FILTER_P04_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P04C5 ,Phase 04 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P04C4 ,Phase 04 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P04C3 ,Phase 04 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 04 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P04C1 ,Phase 04 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P04C0 ,Phase 04 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x418++0x03 line.long 0x00 "H_FILTER_P05_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P05C5 ,Phase 05 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P05C4 ,Phase 05 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P05C3 ,Phase 05 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 05 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P05C1 ,Phase 05 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P05C0 ,Phase 05 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x41C++0x03 line.long 0x00 "H_FILTER_P06_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P06C5 ,Phase 06 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P06C4 ,Phase 06 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P06C3 ,Phase 06 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 06 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P06C1 ,Phase 06 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P06C0 ,Phase 06 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x420++0x03 line.long 0x00 "H_FILTER_P07_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P07C5 ,Phase 07 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P07C4 ,Phase 07 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P07C3 ,Phase 07 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 07 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P07C1 ,Phase 07 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P07C0 ,Phase 07 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x424++0x03 line.long 0x00 "H_FILTER_P08_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P08C5 ,Phase 08 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P08C4 ,Phase 08 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P08C3 ,Phase 08 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 08 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P08C1 ,Phase 08 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P08C0 ,Phase 08 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x428++0x03 line.long 0x00 "H_FILTER_P09_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P09C5 ,Phase 09 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P09C4 ,Phase 09 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P09C3 ,Phase 09 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 09 coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P09C1 ,Phase 09 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P09C0 ,Phase 09 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x42C++0x03 line.long 0x00 "H_FILTER_P0A_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0AC5 ,Phase 0A coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0AC4 ,Phase 0A coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0AC3 ,Phase 0A coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0A coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0AC1 ,Phase 0A coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0AC0 ,Phase 0A coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x430++0x03 line.long 0x00 "H_FILTER_P0B_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0BC5 ,Phase 0B coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0BC4 ,Phase 0B coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0BC3 ,Phase 0B coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0B coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0BC1 ,Phase 0B coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0BC0 ,Phase 0B coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x434++0x03 line.long 0x00 "H_FILTER_P0C_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0CC5 ,Phase 0C coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0CC4 ,Phase 0C coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0CC3 ,Phase 0C coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0C coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0CC1 ,Phase 0C coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0CC0 ,Phase 0C coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x438++0x03 line.long 0x00 "H_FILTER_P0D_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0DC5 ,Phase 0D coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0DC4 ,Phase 0D coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0DC3 ,Phase 0D coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0D coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0DC1 ,Phase 0D coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0DC0 ,Phase 0D coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x43C++0x03 line.long 0x00 "H_FILTER_P0E_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0EC5 ,Phase 0E coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0EC4 ,Phase 0E coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0EC3 ,Phase 0E coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0E coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0EC1 ,Phase 0E coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0EC0 ,Phase 0E coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x440++0x03 line.long 0x00 "H_FILTER_P0F_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " AD_H_FILTER_P0FC5 ,Phase 0F coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " AD_H_FILTER_P0FC4 ,Phase 0F coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " AD_H_FILTER_P0FC3 ,Phase 0F coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_H_FILTER_P00C2 ,Phase 0F coefficient 2" bitfld.long 0x00 3.--7. " AD_H_FILTER_P0FC1 ,Phase 0F coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " AD_H_FILTER_P0FC0 ,Phase 0F coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x444++0x1F line.long 0x00 "CSC_YOF_0,Colour Space Conversion Coefficients" hexmask.long.byte 0x00 0.--7. 1. " AD_CSC_YOF ,Y Offset in s.7.0 format" line.long 0x04 "CSC_KYRGB_0,Window AD CSC Y Coefficient for RGB" hexmask.long.word 0x04 0.--9. 1. " AD_CSC_KYRGB ,Y Gain for R, G, B colours in 2.8 format" line.long 0x08 "CSC_KUR_0,Window AD CSC U coefficient for R" hexmask.long.word 0x08 0.--10. 1. " AD_CSC_KUR ,U coefficients for R in s.2.8 format" line.long 0x0C "CSC_KVR_0,Window AD CSC V coefficient for R" hexmask.long.word 0x0C 0.--10. 1. " AD_CSC_KVR ,V coefficients for R in s.2.8 format" line.long 0x10 "CSC_KUG_0,Window AD CSC U coefficient for G" hexmask.long.word 0x10 0.--9. 1. " AD_CSC_KUG ,U coefficients for G in s.1.8 format" line.long 0x14 "CSC_KVG_0,Window AD CSC V coefficient for G" hexmask.long.word 0x14 0.--9. 1. " AD_CSC_KVG ,V coefficients for G in s.1.8 format" line.long 0x18 "CSC_KUB_0,Window AD CSC U coefficient for B" hexmask.long.word 0x18 0.--10. 1. " AD_CSC_KUB ,U coefficients for B in s.2.8 format" line.long 0x1C "CSC_KVB_0,Window AD CSC V coefficient for B" hexmask.long.word 0x1C 0.--10. 1. " AD_CSC_KVB ,V coefficients for B in s.2.8 format" textline " " group.long 0x464++0x03 line.long 0x00 "V_FILTER_P00_0,Window AD Vertical Filter phase 00" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P00C0 ,Phase 00 coefficient 0" group.long 0x468++0x03 line.long 0x00 "V_FILTER_P01_0,Window AD Vertical Filter phase 01" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P01C0 ,Phase 01 coefficient 1" group.long 0x46C++0x03 line.long 0x00 "V_FILTER_P02_0,Window AD Vertical Filter phase 02" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P02C0 ,Phase 02 coefficient 2" group.long 0x470++0x03 line.long 0x00 "V_FILTER_P03_0,Window AD Vertical Filter phase 03" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P03C0 ,Phase 03 coefficient 3" group.long 0x474++0x03 line.long 0x00 "V_FILTER_P04_0,Window AD Vertical Filter phase 04" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P04C0 ,Phase 04 coefficient 4" group.long 0x478++0x03 line.long 0x00 "V_FILTER_P05_0,Window AD Vertical Filter phase 05" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P05C0 ,Phase 05 coefficient 5" group.long 0x47C++0x03 line.long 0x00 "V_FILTER_P06_0,Window AD Vertical Filter phase 06" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P06C0 ,Phase 06 coefficient 6" group.long 0x480++0x03 line.long 0x00 "V_FILTER_P07_0,Window AD Vertical Filter phase 07" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P07C0 ,Phase 07 coefficient 7" group.long 0x484++0x03 line.long 0x00 "V_FILTER_P08_0,Window AD Vertical Filter phase 08" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P08C0 ,Phase 08 coefficient 8" group.long 0x488++0x03 line.long 0x00 "V_FILTER_P09_0,Window AD Vertical Filter phase 09" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P09C0 ,Phase 09 coefficient 9" group.long 0x48C++0x03 line.long 0x00 "V_FILTER_P0A_0,Window AD Vertical Filter phase 0A" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0AC0 ,Phase 0A coefficient A" group.long 0x490++0x03 line.long 0x00 "V_FILTER_P0B_0,Window AD Vertical Filter phase 0B" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0BC0 ,Phase 0B coefficient B" group.long 0x494++0x03 line.long 0x00 "V_FILTER_P0C_0,Window AD Vertical Filter phase 0C" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0CC0 ,Phase 0C coefficient C" group.long 0x498++0x03 line.long 0x00 "V_FILTER_P0D_0,Window AD Vertical Filter phase 0D" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0DC0 ,Phase 0D coefficient D" group.long 0x49C++0x03 line.long 0x00 "V_FILTER_P0E_0,Window AD Vertical Filter phase 0E" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0EC0 ,Phase 0E coefficient E" group.long 0x4A0++0x03 line.long 0x00 "V_FILTER_P0F_0,Window AD Vertical Filter phase 0F" hexmask.long.byte 0x00 0.--7. 1. " AD_V_FILTER_P0FC0 ,Phase 0F coefficient F" textline " " group.long 0x4A4++0x03 line.long 0x00 "H_FILTER_HI_P00_0,Window AD Horizontal Filter phase 00" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P00C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P00C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P00C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P00C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P00C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P00C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4A8++0x03 line.long 0x00 "H_FILTER_HI_P01_0,Window AD Horizontal Filter phase 01" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P01C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P01C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P01C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P01C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P01C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P01C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4AC++0x03 line.long 0x00 "H_FILTER_HI_P02_0,Window AD Horizontal Filter phase 02" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P02C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P02C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P02C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P02C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P02C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P02C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B0++0x03 line.long 0x00 "H_FILTER_HI_P03_0,Window AD Horizontal Filter phase 03" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P03C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P03C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P03C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P03C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P03C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P03C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B4++0x03 line.long 0x00 "H_FILTER_HI_P04_0,Window AD Horizontal Filter phase 04" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P04C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P04C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P04C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P04C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P04C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P04C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B8++0x03 line.long 0x00 "H_FILTER_HI_P05_0,Window AD Horizontal Filter phase 05" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P05C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P05C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P05C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P05C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P05C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P05C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4BC++0x03 line.long 0x00 "H_FILTER_HI_P06_0,Window AD Horizontal Filter phase 06" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P06C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P06C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P06C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P06C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P06C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P06C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C0++0x03 line.long 0x00 "H_FILTER_HI_P07_0,Window AD Horizontal Filter phase 07" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P07C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P07C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P07C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P07C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P07C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P07C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C4++0x03 line.long 0x00 "H_FILTER_HI_P08_0,Window AD Horizontal Filter phase 08" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P08C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P08C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P08C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P08C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P08C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P08C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C8++0x03 line.long 0x00 "H_FILTER_HI_P09_0,Window AD Horizontal Filter phase 09" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P09C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P09C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P09C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P09C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P09C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P09C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4CC++0x03 line.long 0x00 "H_FILTER_HI_P0A_0,Window AD Horizontal Filter phase 0A" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0AC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0AC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0AC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0AC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0AC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0AC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D0++0x03 line.long 0x00 "H_FILTER_HI_P0B_0,Window AD Horizontal Filter phase 0B" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0BC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0BC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0BC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0BC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0BC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0BC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D4++0x03 line.long 0x00 "H_FILTER_HI_P0C_0,Window AD Horizontal Filter phase 0C" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0CC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0CC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0CC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0CC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0CC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0CC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D8++0x03 line.long 0x00 "H_FILTER_HI_P0D_0,Window AD Horizontal Filter phase 0D" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0DC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0DC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0DC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0DC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0DC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0DC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4DC++0x03 line.long 0x00 "H_FILTER_HI_P0E_0,Window AD Horizontal Filter phase 0E" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0EC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0EC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0EC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0EC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0EC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0EC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4E0++0x03 line.long 0x00 "H_FILTER_HI_P0F_0,Window AD Horizontal Filter phase 0F" bitfld.long 0x00 8.--9. " AD_H_FILTER_HI_P0FC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " AD_H_FILTER_HI_P0FC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " AD_H_FILTER_HI_P0FC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " AD_H_FILTER_HI_P0FC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " AD_H_FILTER_HI_P0FC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " AD_H_FILTER_HI_P0FC0 ,MSB of the lobe 0" "0,1,2,3" width 0x0B tree.end tree "BD" base ad:0x54240000+0x3000 width 21. wgroup.long 0x00++0x03 line.long 0x00 "COLOR_PALETTE_0,Window BD Color Palette" button "BGR" "d (ad:0x54240000+0x3000+0x00)--(ad:0x54240000+0x3000+0x3fc) /long" group.long 0x400++0x03 line.long 0x00 "PALETTE_COLOR_EXT_0,Window B Palette Color Extension" hexmask.long.byte 0x00 1.--7. 1. " BD_PALETTE_COLOR_EXT ,Window B Palette Color Extension" group.long 0x404++0x03 line.long 0x00 "H_FILTER_P00_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P00C5 ,Phase 00 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P00C4 ,Phase 00 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P00C3 ,Phase 00 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 00 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P00C1 ,Phase 00 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P00C0 ,Phase 00 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x408++0x03 line.long 0x00 "H_FILTER_P01_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P01C5 ,Phase 01 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P01C4 ,Phase 01 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P01C3 ,Phase 01 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 01 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P01C1 ,Phase 01 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P01C0 ,Phase 01 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x40C++0x03 line.long 0x00 "H_FILTER_P02_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P02C5 ,Phase 02 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P02C4 ,Phase 02 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P02C3 ,Phase 02 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 02 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P02C1 ,Phase 02 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P02C0 ,Phase 02 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x410++0x03 line.long 0x00 "H_FILTER_P03_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P03C5 ,Phase 03 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P03C4 ,Phase 03 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P03C3 ,Phase 03 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 03 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P03C1 ,Phase 03 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P03C0 ,Phase 03 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x414++0x03 line.long 0x00 "H_FILTER_P04_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P04C5 ,Phase 04 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P04C4 ,Phase 04 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P04C3 ,Phase 04 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 04 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P04C1 ,Phase 04 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P04C0 ,Phase 04 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x418++0x03 line.long 0x00 "H_FILTER_P05_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P05C5 ,Phase 05 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P05C4 ,Phase 05 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P05C3 ,Phase 05 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 05 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P05C1 ,Phase 05 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P05C0 ,Phase 05 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x41C++0x03 line.long 0x00 "H_FILTER_P06_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P06C5 ,Phase 06 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P06C4 ,Phase 06 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P06C3 ,Phase 06 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 06 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P06C1 ,Phase 06 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P06C0 ,Phase 06 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x420++0x03 line.long 0x00 "H_FILTER_P07_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P07C5 ,Phase 07 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P07C4 ,Phase 07 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P07C3 ,Phase 07 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 07 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P07C1 ,Phase 07 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P07C0 ,Phase 07 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x424++0x03 line.long 0x00 "H_FILTER_P08_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P08C5 ,Phase 08 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P08C4 ,Phase 08 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P08C3 ,Phase 08 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 08 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P08C1 ,Phase 08 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P08C0 ,Phase 08 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x428++0x03 line.long 0x00 "H_FILTER_P09_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P09C5 ,Phase 09 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P09C4 ,Phase 09 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P09C3 ,Phase 09 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 09 coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P09C1 ,Phase 09 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P09C0 ,Phase 09 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x42C++0x03 line.long 0x00 "H_FILTER_P0A_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0AC5 ,Phase 0A coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0AC4 ,Phase 0A coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0AC3 ,Phase 0A coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0A coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0AC1 ,Phase 0A coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0AC0 ,Phase 0A coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x430++0x03 line.long 0x00 "H_FILTER_P0B_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0BC5 ,Phase 0B coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0BC4 ,Phase 0B coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0BC3 ,Phase 0B coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0B coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0BC1 ,Phase 0B coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0BC0 ,Phase 0B coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x434++0x03 line.long 0x00 "H_FILTER_P0C_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0CC5 ,Phase 0C coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0CC4 ,Phase 0C coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0CC3 ,Phase 0C coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0C coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0CC1 ,Phase 0C coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0CC0 ,Phase 0C coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x438++0x03 line.long 0x00 "H_FILTER_P0D_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0DC5 ,Phase 0D coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0DC4 ,Phase 0D coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0DC3 ,Phase 0D coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0D coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0DC1 ,Phase 0D coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0DC0 ,Phase 0D coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x43C++0x03 line.long 0x00 "H_FILTER_P0E_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0EC5 ,Phase 0E coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0EC4 ,Phase 0E coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0EC3 ,Phase 0E coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0E coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0EC1 ,Phase 0E coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0EC0 ,Phase 0E coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x440++0x03 line.long 0x00 "H_FILTER_P0F_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " BD_H_FILTER_P0FC5 ,Phase 0F coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " BD_H_FILTER_P0FC4 ,Phase 0F coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " BD_H_FILTER_P0FC3 ,Phase 0F coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_H_FILTER_P00C2 ,Phase 0F coefficient 2" bitfld.long 0x00 3.--7. " BD_H_FILTER_P0FC1 ,Phase 0F coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " BD_H_FILTER_P0FC0 ,Phase 0F coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x444++0x1F line.long 0x00 "CSC_YOF_0,Colour Space Conversion Coefficients" hexmask.long.byte 0x00 0.--7. 1. " BD_CSC_YOF ,Y Offset in s.7.0 format" line.long 0x04 "CSC_KYRGB_0,Window BD CSC Y Coefficient for RGB" hexmask.long.word 0x04 0.--9. 1. " BD_CSC_KYRGB ,Y Gain for R, G, B colours in 2.8 format" line.long 0x08 "CSC_KUR_0,Window BD CSC U coefficient for R" hexmask.long.word 0x08 0.--10. 1. " BD_CSC_KUR ,U coefficients for R in s.2.8 format" line.long 0x0C "CSC_KVR_0,Window BD CSC V coefficient for R" hexmask.long.word 0x0C 0.--10. 1. " BD_CSC_KVR ,V coefficients for R in s.2.8 format" line.long 0x10 "CSC_KUG_0,Window BD CSC U coefficient for G" hexmask.long.word 0x10 0.--9. 1. " BD_CSC_KUG ,U coefficients for G in s.1.8 format" line.long 0x14 "CSC_KVG_0,Window BD CSC V coefficient for G" hexmask.long.word 0x14 0.--9. 1. " BD_CSC_KVG ,V coefficients for G in s.1.8 format" line.long 0x18 "CSC_KUB_0,Window BD CSC U coefficient for B" hexmask.long.word 0x18 0.--10. 1. " BD_CSC_KUB ,U coefficients for B in s.2.8 format" line.long 0x1C "CSC_KVB_0,Window BD CSC V coefficient for B" hexmask.long.word 0x1C 0.--10. 1. " BD_CSC_KVB ,V coefficients for B in s.2.8 format" textline " " group.long 0x464++0x03 line.long 0x00 "V_FILTER_P00_0,Window BD Vertical Filter phase 00" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P00C0 ,Phase 00 coefficient 0" group.long 0x468++0x03 line.long 0x00 "V_FILTER_P01_0,Window BD Vertical Filter phase 01" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P01C0 ,Phase 01 coefficient 1" group.long 0x46C++0x03 line.long 0x00 "V_FILTER_P02_0,Window BD Vertical Filter phase 02" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P02C0 ,Phase 02 coefficient 2" group.long 0x470++0x03 line.long 0x00 "V_FILTER_P03_0,Window BD Vertical Filter phase 03" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P03C0 ,Phase 03 coefficient 3" group.long 0x474++0x03 line.long 0x00 "V_FILTER_P04_0,Window BD Vertical Filter phase 04" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P04C0 ,Phase 04 coefficient 4" group.long 0x478++0x03 line.long 0x00 "V_FILTER_P05_0,Window BD Vertical Filter phase 05" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P05C0 ,Phase 05 coefficient 5" group.long 0x47C++0x03 line.long 0x00 "V_FILTER_P06_0,Window BD Vertical Filter phase 06" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P06C0 ,Phase 06 coefficient 6" group.long 0x480++0x03 line.long 0x00 "V_FILTER_P07_0,Window BD Vertical Filter phase 07" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P07C0 ,Phase 07 coefficient 7" group.long 0x484++0x03 line.long 0x00 "V_FILTER_P08_0,Window BD Vertical Filter phase 08" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P08C0 ,Phase 08 coefficient 8" group.long 0x488++0x03 line.long 0x00 "V_FILTER_P09_0,Window BD Vertical Filter phase 09" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P09C0 ,Phase 09 coefficient 9" group.long 0x48C++0x03 line.long 0x00 "V_FILTER_P0A_0,Window BD Vertical Filter phase 0A" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0AC0 ,Phase 0A coefficient A" group.long 0x490++0x03 line.long 0x00 "V_FILTER_P0B_0,Window BD Vertical Filter phase 0B" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0BC0 ,Phase 0B coefficient B" group.long 0x494++0x03 line.long 0x00 "V_FILTER_P0C_0,Window BD Vertical Filter phase 0C" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0CC0 ,Phase 0C coefficient C" group.long 0x498++0x03 line.long 0x00 "V_FILTER_P0D_0,Window BD Vertical Filter phase 0D" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0DC0 ,Phase 0D coefficient D" group.long 0x49C++0x03 line.long 0x00 "V_FILTER_P0E_0,Window BD Vertical Filter phase 0E" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0EC0 ,Phase 0E coefficient E" group.long 0x4A0++0x03 line.long 0x00 "V_FILTER_P0F_0,Window BD Vertical Filter phase 0F" hexmask.long.byte 0x00 0.--7. 1. " BD_V_FILTER_P0FC0 ,Phase 0F coefficient F" textline " " group.long 0x4A4++0x03 line.long 0x00 "H_FILTER_HI_P00_0,Window BD Horizontal Filter phase 00" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P00C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P00C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P00C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P00C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P00C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P00C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4A8++0x03 line.long 0x00 "H_FILTER_HI_P01_0,Window BD Horizontal Filter phase 01" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P01C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P01C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P01C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P01C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P01C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P01C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4AC++0x03 line.long 0x00 "H_FILTER_HI_P02_0,Window BD Horizontal Filter phase 02" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P02C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P02C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P02C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P02C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P02C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P02C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B0++0x03 line.long 0x00 "H_FILTER_HI_P03_0,Window BD Horizontal Filter phase 03" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P03C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P03C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P03C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P03C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P03C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P03C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B4++0x03 line.long 0x00 "H_FILTER_HI_P04_0,Window BD Horizontal Filter phase 04" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P04C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P04C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P04C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P04C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P04C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P04C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B8++0x03 line.long 0x00 "H_FILTER_HI_P05_0,Window BD Horizontal Filter phase 05" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P05C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P05C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P05C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P05C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P05C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P05C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4BC++0x03 line.long 0x00 "H_FILTER_HI_P06_0,Window BD Horizontal Filter phase 06" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P06C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P06C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P06C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P06C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P06C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P06C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C0++0x03 line.long 0x00 "H_FILTER_HI_P07_0,Window BD Horizontal Filter phase 07" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P07C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P07C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P07C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P07C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P07C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P07C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C4++0x03 line.long 0x00 "H_FILTER_HI_P08_0,Window BD Horizontal Filter phase 08" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P08C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P08C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P08C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P08C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P08C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P08C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C8++0x03 line.long 0x00 "H_FILTER_HI_P09_0,Window BD Horizontal Filter phase 09" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P09C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P09C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P09C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P09C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P09C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P09C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4CC++0x03 line.long 0x00 "H_FILTER_HI_P0A_0,Window BD Horizontal Filter phase 0A" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0AC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0AC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0AC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0AC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0AC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0AC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D0++0x03 line.long 0x00 "H_FILTER_HI_P0B_0,Window BD Horizontal Filter phase 0B" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0BC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0BC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0BC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0BC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0BC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0BC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D4++0x03 line.long 0x00 "H_FILTER_HI_P0C_0,Window BD Horizontal Filter phase 0C" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0CC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0CC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0CC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0CC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0CC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0CC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D8++0x03 line.long 0x00 "H_FILTER_HI_P0D_0,Window BD Horizontal Filter phase 0D" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0DC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0DC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0DC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0DC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0DC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0DC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4DC++0x03 line.long 0x00 "H_FILTER_HI_P0E_0,Window BD Horizontal Filter phase 0E" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0EC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0EC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0EC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0EC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0EC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0EC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4E0++0x03 line.long 0x00 "H_FILTER_HI_P0F_0,Window BD Horizontal Filter phase 0F" bitfld.long 0x00 8.--9. " BD_H_FILTER_HI_P0FC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " BD_H_FILTER_HI_P0FC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " BD_H_FILTER_HI_P0FC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " BD_H_FILTER_HI_P0FC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " BD_H_FILTER_HI_P0FC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " BD_H_FILTER_HI_P0FC0 ,MSB of the lobe 0" "0,1,2,3" width 0x0B tree.end tree "CD" base ad:0x54240000+0x3800 width 21. wgroup.long 0x00++0x03 line.long 0x00 "COLOR_PALETTE_0,Window CD Color Palette" button "BGR" "d (ad:0x54240000+0x3800+0x00)--(ad:0x54240000+0x3800+0x3fc) /long" group.long 0x400++0x03 line.long 0x00 "PALETTE_COLOR_EXT_0,Window C Palette Color Extension" hexmask.long.byte 0x00 1.--7. 1. " CD_PALETTE_COLOR_EXT ,Window C Palette Color Extension" group.long 0x404++0x03 line.long 0x00 "H_FILTER_P00_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P00C5 ,Phase 00 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P00C4 ,Phase 00 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P00C3 ,Phase 00 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 00 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P00C1 ,Phase 00 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P00C0 ,Phase 00 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x408++0x03 line.long 0x00 "H_FILTER_P01_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P01C5 ,Phase 01 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P01C4 ,Phase 01 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P01C3 ,Phase 01 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 01 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P01C1 ,Phase 01 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P01C0 ,Phase 01 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x40C++0x03 line.long 0x00 "H_FILTER_P02_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P02C5 ,Phase 02 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P02C4 ,Phase 02 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P02C3 ,Phase 02 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 02 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P02C1 ,Phase 02 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P02C0 ,Phase 02 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x410++0x03 line.long 0x00 "H_FILTER_P03_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P03C5 ,Phase 03 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P03C4 ,Phase 03 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P03C3 ,Phase 03 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 03 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P03C1 ,Phase 03 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P03C0 ,Phase 03 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x414++0x03 line.long 0x00 "H_FILTER_P04_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P04C5 ,Phase 04 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P04C4 ,Phase 04 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P04C3 ,Phase 04 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 04 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P04C1 ,Phase 04 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P04C0 ,Phase 04 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x418++0x03 line.long 0x00 "H_FILTER_P05_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P05C5 ,Phase 05 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P05C4 ,Phase 05 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P05C3 ,Phase 05 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 05 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P05C1 ,Phase 05 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P05C0 ,Phase 05 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x41C++0x03 line.long 0x00 "H_FILTER_P06_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P06C5 ,Phase 06 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P06C4 ,Phase 06 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P06C3 ,Phase 06 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 06 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P06C1 ,Phase 06 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P06C0 ,Phase 06 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x420++0x03 line.long 0x00 "H_FILTER_P07_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P07C5 ,Phase 07 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P07C4 ,Phase 07 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P07C3 ,Phase 07 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 07 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P07C1 ,Phase 07 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P07C0 ,Phase 07 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x424++0x03 line.long 0x00 "H_FILTER_P08_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P08C5 ,Phase 08 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P08C4 ,Phase 08 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P08C3 ,Phase 08 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 08 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P08C1 ,Phase 08 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P08C0 ,Phase 08 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x428++0x03 line.long 0x00 "H_FILTER_P09_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P09C5 ,Phase 09 coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P09C4 ,Phase 09 coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P09C3 ,Phase 09 coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 09 coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P09C1 ,Phase 09 coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P09C0 ,Phase 09 coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x42C++0x03 line.long 0x00 "H_FILTER_P0A_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0AC5 ,Phase 0A coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0AC4 ,Phase 0A coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0AC3 ,Phase 0A coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0A coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0AC1 ,Phase 0A coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0AC0 ,Phase 0A coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x430++0x03 line.long 0x00 "H_FILTER_P0B_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0BC5 ,Phase 0B coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0BC4 ,Phase 0B coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0BC3 ,Phase 0B coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0B coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0BC1 ,Phase 0B coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0BC0 ,Phase 0B coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x434++0x03 line.long 0x00 "H_FILTER_P0C_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0CC5 ,Phase 0C coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0CC4 ,Phase 0C coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0CC3 ,Phase 0C coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0C coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0CC1 ,Phase 0C coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0CC0 ,Phase 0C coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x438++0x03 line.long 0x00 "H_FILTER_P0D_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0DC5 ,Phase 0D coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0DC4 ,Phase 0D coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0DC3 ,Phase 0D coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0D coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0DC1 ,Phase 0D coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0DC0 ,Phase 0D coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x43C++0x03 line.long 0x00 "H_FILTER_P0E_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0EC5 ,Phase 0E coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0EC4 ,Phase 0E coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0EC3 ,Phase 0E coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0E coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0EC1 ,Phase 0E coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0EC0 ,Phase 0E coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x440++0x03 line.long 0x00 "H_FILTER_P0F_0,Horizontal Scaling Filter Coefficients" bitfld.long 0x00 29.--31. " CD_H_FILTER_P0FC5 ,Phase 0F coefficient 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--28. " CD_H_FILTER_P0FC4 ,Phase 0F coefficient 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 16.--23. 1. " CD_H_FILTER_P0FC3 ,Phase 0F coefficient 3" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_H_FILTER_P00C2 ,Phase 0F coefficient 2" bitfld.long 0x00 3.--7. " CD_H_FILTER_P0FC1 ,Phase 0F coefficient 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--2. " CD_H_FILTER_P0FC0 ,Phase 0F coefficient 0" "0,1,2,3,4,5,6,7" group.long 0x444++0x1F line.long 0x00 "CSC_YOF_0,Colour Space Conversion Coefficients" hexmask.long.byte 0x00 0.--7. 1. " CD_CSC_YOF ,Y Offset in s.7.0 format" line.long 0x04 "CSC_KYRGB_0,Window CD CSC Y Coefficient for RGB" hexmask.long.word 0x04 0.--9. 1. " CD_CSC_KYRGB ,Y Gain for R, G, B colours in 2.8 format" line.long 0x08 "CSC_KUR_0,Window CD CSC U coefficient for R" hexmask.long.word 0x08 0.--10. 1. " CD_CSC_KUR ,U coefficients for R in s.2.8 format" line.long 0x0C "CSC_KVR_0,Window CD CSC V coefficient for R" hexmask.long.word 0x0C 0.--10. 1. " CD_CSC_KVR ,V coefficients for R in s.2.8 format" line.long 0x10 "CSC_KUG_0,Window CD CSC U coefficient for G" hexmask.long.word 0x10 0.--9. 1. " CD_CSC_KUG ,U coefficients for G in s.1.8 format" line.long 0x14 "CSC_KVG_0,Window CD CSC V coefficient for G" hexmask.long.word 0x14 0.--9. 1. " CD_CSC_KVG ,V coefficients for G in s.1.8 format" line.long 0x18 "CSC_KUB_0,Window CD CSC U coefficient for B" hexmask.long.word 0x18 0.--10. 1. " CD_CSC_KUB ,U coefficients for B in s.2.8 format" line.long 0x1C "CSC_KVB_0,Window CD CSC V coefficient for B" hexmask.long.word 0x1C 0.--10. 1. " CD_CSC_KVB ,V coefficients for B in s.2.8 format" textline " " group.long 0x464++0x03 line.long 0x00 "V_FILTER_P00_0,Window CD Vertical Filter phase 00" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P00C0 ,Phase 00 coefficient 0" group.long 0x468++0x03 line.long 0x00 "V_FILTER_P01_0,Window CD Vertical Filter phase 01" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P01C0 ,Phase 01 coefficient 1" group.long 0x46C++0x03 line.long 0x00 "V_FILTER_P02_0,Window CD Vertical Filter phase 02" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P02C0 ,Phase 02 coefficient 2" group.long 0x470++0x03 line.long 0x00 "V_FILTER_P03_0,Window CD Vertical Filter phase 03" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P03C0 ,Phase 03 coefficient 3" group.long 0x474++0x03 line.long 0x00 "V_FILTER_P04_0,Window CD Vertical Filter phase 04" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P04C0 ,Phase 04 coefficient 4" group.long 0x478++0x03 line.long 0x00 "V_FILTER_P05_0,Window CD Vertical Filter phase 05" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P05C0 ,Phase 05 coefficient 5" group.long 0x47C++0x03 line.long 0x00 "V_FILTER_P06_0,Window CD Vertical Filter phase 06" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P06C0 ,Phase 06 coefficient 6" group.long 0x480++0x03 line.long 0x00 "V_FILTER_P07_0,Window CD Vertical Filter phase 07" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P07C0 ,Phase 07 coefficient 7" group.long 0x484++0x03 line.long 0x00 "V_FILTER_P08_0,Window CD Vertical Filter phase 08" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P08C0 ,Phase 08 coefficient 8" group.long 0x488++0x03 line.long 0x00 "V_FILTER_P09_0,Window CD Vertical Filter phase 09" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P09C0 ,Phase 09 coefficient 9" group.long 0x48C++0x03 line.long 0x00 "V_FILTER_P0A_0,Window CD Vertical Filter phase 0A" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0AC0 ,Phase 0A coefficient A" group.long 0x490++0x03 line.long 0x00 "V_FILTER_P0B_0,Window CD Vertical Filter phase 0B" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0BC0 ,Phase 0B coefficient B" group.long 0x494++0x03 line.long 0x00 "V_FILTER_P0C_0,Window CD Vertical Filter phase 0C" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0CC0 ,Phase 0C coefficient C" group.long 0x498++0x03 line.long 0x00 "V_FILTER_P0D_0,Window CD Vertical Filter phase 0D" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0DC0 ,Phase 0D coefficient D" group.long 0x49C++0x03 line.long 0x00 "V_FILTER_P0E_0,Window CD Vertical Filter phase 0E" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0EC0 ,Phase 0E coefficient E" group.long 0x4A0++0x03 line.long 0x00 "V_FILTER_P0F_0,Window CD Vertical Filter phase 0F" hexmask.long.byte 0x00 0.--7. 1. " CD_V_FILTER_P0FC0 ,Phase 0F coefficient F" textline " " group.long 0x4A4++0x03 line.long 0x00 "H_FILTER_HI_P00_0,Window CD Horizontal Filter phase 00" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P00C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P00C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P00C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P00C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P00C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P00C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4A8++0x03 line.long 0x00 "H_FILTER_HI_P01_0,Window CD Horizontal Filter phase 01" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P01C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P01C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P01C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P01C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P01C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P01C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4AC++0x03 line.long 0x00 "H_FILTER_HI_P02_0,Window CD Horizontal Filter phase 02" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P02C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P02C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P02C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P02C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P02C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P02C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B0++0x03 line.long 0x00 "H_FILTER_HI_P03_0,Window CD Horizontal Filter phase 03" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P03C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P03C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P03C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P03C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P03C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P03C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B4++0x03 line.long 0x00 "H_FILTER_HI_P04_0,Window CD Horizontal Filter phase 04" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P04C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P04C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P04C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P04C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P04C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P04C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4B8++0x03 line.long 0x00 "H_FILTER_HI_P05_0,Window CD Horizontal Filter phase 05" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P05C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P05C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P05C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P05C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P05C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P05C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4BC++0x03 line.long 0x00 "H_FILTER_HI_P06_0,Window CD Horizontal Filter phase 06" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P06C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P06C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P06C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P06C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P06C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P06C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C0++0x03 line.long 0x00 "H_FILTER_HI_P07_0,Window CD Horizontal Filter phase 07" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P07C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P07C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P07C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P07C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P07C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P07C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C4++0x03 line.long 0x00 "H_FILTER_HI_P08_0,Window CD Horizontal Filter phase 08" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P08C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P08C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P08C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P08C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P08C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P08C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4C8++0x03 line.long 0x00 "H_FILTER_HI_P09_0,Window CD Horizontal Filter phase 09" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P09C5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P09C4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P09C3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P09C2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P09C1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P09C0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4CC++0x03 line.long 0x00 "H_FILTER_HI_P0A_0,Window CD Horizontal Filter phase 0A" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0AC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0AC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0AC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0AC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0AC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0AC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D0++0x03 line.long 0x00 "H_FILTER_HI_P0B_0,Window CD Horizontal Filter phase 0B" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0BC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0BC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0BC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0BC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0BC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0BC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D4++0x03 line.long 0x00 "H_FILTER_HI_P0C_0,Window CD Horizontal Filter phase 0C" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0CC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0CC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0CC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0CC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0CC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0CC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4D8++0x03 line.long 0x00 "H_FILTER_HI_P0D_0,Window CD Horizontal Filter phase 0D" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0DC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0DC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0DC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0DC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0DC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0DC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4DC++0x03 line.long 0x00 "H_FILTER_HI_P0E_0,Window CD Horizontal Filter phase 0E" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0EC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0EC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0EC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0EC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0EC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0EC0 ,MSB of the lobe 0" "0,1,2,3" group.long 0x4E0++0x03 line.long 0x00 "H_FILTER_HI_P0F_0,Window CD Horizontal Filter phase 0F" bitfld.long 0x00 8.--9. " CD_H_FILTER_HI_P0FC5 ,MSB of the lobe 5" "0,1,2,3" bitfld.long 0x00 6.--7. " CD_H_FILTER_HI_P0FC4 ,MSB of the lobe 4" "0,1,2,3" bitfld.long 0x00 5. " CD_H_FILTER_HI_P0FC3 ,MSB of the lobe 3" "0,1" textline " " bitfld.long 0x00 4. " CD_H_FILTER_HI_P0FC2 ,MSB of the lobe 2" "0,1" bitfld.long 0x00 2.--3. " CD_H_FILTER_HI_P0FC1 ,MSB of the lobe 1" "0,1,2,3" bitfld.long 0x00 0.--1. " CD_H_FILTER_HI_P0FC0 ,MSB of the lobe 0" "0,1,2,3" width 0x0B tree.end tree.end tree "WIN" tree "AD" base ad:0x54240000+0x2800 width 17. ;"WIN_A Registers" group.long 0x600++0x03 line.long 0x00 "WIN_OPTIONS_0,Window AD Options" bitfld.long 0x00 31. " AD_H_FILTER_MODE ,Horizontal filter mode" "Old,New" bitfld.long 0x00 30. " AD_WIN_ENABLE ,Window AD Window enable" "Disabled,Enabled" bitfld.long 0x00 23. " AD_INTERLACE_ENABLE ,Window AD Interlace enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " AD_YUV_RANGE_EXPAND ,Window AD Enable range expansion" "Disabled,Enabled" bitfld.long 0x00 20. " AD_DV_ENABLE ,Window AD Digital Vibrance Enable" "Disabled,Enabled" bitfld.long 0x00 18. " AD_CSC_ENABLE ,Window AD Color Space Conversion Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " AD_CP_ENABLE ,Window AD Color Palette Enable" "Disabled,Enabled" bitfld.long 0x00 14. " AD_V_FILTER_UV_ALIGN ,Window AD V Filter UV Alignment" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " AD_V_FILTER_ENABLE ,Window AD V Filter Enable" "Disabled,Enabled" bitfld.long 0x00 8. " AD_H_FILTER_ENABLE ,Window AD H Filter Enable" "Disabled,Enabled" bitfld.long 0x00 6. " AD_COLOR_EXPAND ,Color expansion" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " AD_SCAN_COLUMN ,Window AD Scanning direction" "Disabled,Enabled" bitfld.long 0x00 2. " AD_V_DIRECTION ,Window AD Vertical (Y) drawing Direction" "Increment,Decrement" bitfld.long 0x00 0. " AD_H_DIRECTION ,Window AD Horizontal (X) drawing Direction" "Increment,Decrement" group.long 0x604++0x03 line.long 0x00 "BYTE_SWAP_0,Window AD Byte Swap" bitfld.long 0x00 0.--2. " AD_BYTE_SWAP ,Window AD Byte Swap" "NOSWAP,SWAP2,SWAP4,SWAP4HW,SWAP02,SWAPLEFT,?..." group.long 0x60C++0x03 line.long 0x00 "COLOR_DEPTH_0,Window AD Color depth" hexmask.long.byte 0x00 0.--6. 1. " AD_COLOR_DEPTH ,Window AD Color Depth" width 18. textline " " group.long 0x610++0x1B line.long 0x00 "POSITION_0,Window AD Position" hexmask.long.word 0x00 16.--28. 1. " AD_V_POSITION ,Window AD V Position" hexmask.long.word 0x00 0.--12. 1. " AD_H_POSITION ,Window AD H Position" line.long 0x04 "SIZE_0,Window AD Size" hexmask.long.word 0x04 16.--28. 1. " AD_V_SIZE ,Vertical size after scaling" hexmask.long.word 0x04 0.--12. 1. " AD_H_SIZE ,Horizontal size after scaling" line.long 0x08 "PRESCALED_SIZE_0,Window AD Pre-scaled Size" hexmask.long.word 0x08 16.--28. 1. " AD_V_PRESCALED_SIZE ,Window AD V Pre-scaled Size" hexmask.long.word 0x08 0.--14. 1. " AD_H_PRESCALED_SIZE ,Window AD H Pre-scaled Size" line.long 0x0C "H_INITIAL_DDA_0,Window AD H Initial DDA" hexmask.long.word 0x0C 0.--15. 1. " AD_H_INITIAL_DDA ,Window AD H Initial DDA" line.long 0x10 "V_INITIAL_DDA_0,Window AD V Initial DDA" hexmask.long.word 0x10 0.--15. 1. " AD_V_INITIAL_DDA ,Window AD V Initial DDA" line.long 0x14 "DDA_INCREMENT_0,Window AD DDA Increment" hexmask.long.word 0x14 16.--31. 1. " AD_V_DDA_INCREMENT ,Window AD Vertical DDA Increment" hexmask.long.word 0x14 0.--15. 1. " AD_H_DDA_INCREMENT ,Window AD Horizontal DDA Increment" line.long 0x18 "LINE_STRIDE_0,Window AD Line Stride" hexmask.long.word 0x18 16.--31. 1. " AD_UV_LINE_STRIDE ,Window AD Line Stride for Chroma" hexmask.long.word 0x18 0.--15. 1. " AD_LINE_STRIDE ,Window AD Line Stride" group.long 0x638++0x03 line.long 0x00 "DV_CONTROL_0,Window AD Digital Vibrance Control" bitfld.long 0x00 16.--18. " AD_DV_CONTROL_B ,Digital Vibrance control for B" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " AD_DV_CONTROL_G ,Digital Vibrance control for G" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " AD_DV_CONTROL_R ,Digital Vibrance control for R" "0,1,2,3,4,5,6,7" textline " " width 24. group.long 0x658++0x0F line.long 0x00 "BLEND_LAYER_CONTROL_0,Window AD" bitfld.long 0x00 25.--27. " AD_COLOR_KEY_SELECT ,AD COLOR KEY SELECT" "0,1,2,3,4,5,6,7" eventfld.long 0x00 24. " AD_BLEND_BYPASS ,AD BLEND BYPASS" "BLEND_ENABLE,BLEND_BYPASS" hexmask.long.byte 0x00 16.--23. 1. " AD_K2 ,AD K2" textline " " hexmask.long.byte 0x00 8.--15. 1. " AD_K1 ,AD K1" hexmask.long.byte 0x00 0.--7. 1. " AD_WINDOW_LAYER_DEPTH ,AD WINDOW LAYER DEPTH" line.long 0x04 "BLEND_MATCH_SELECT_0,Blend match select 0" bitfld.long 0x04 12.--13. " AD_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT ,AD BLEND FACTOR DST ALPHA MATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x04 8.--9. " AD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,AD BLEND FACTOR SRC ALPHA MATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x04 4.--6. " AD_BLEND_FACTOR_DST_COLOR_MATCH_SELECT ,AD BLEND FACTOR DST COLOR MATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x04 0.--2. " AD_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT ,AD BLEND FACTOR SRC COLOR MATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x08 "BLEND_NOMATCH_SELECT_0,Blend no match select 0" bitfld.long 0x08 12.--13. " AD_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,AD BLEND FACTOR DST ALPHA NOMATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x08 8.--9. " AD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,AD BLEND FACTOR SRC ALPHA NOMATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x08 4.--6. " AD_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,AD BLEND FACTOR DST COLOR NOMATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x08 0.--2. " AD_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,AD BLEND FACTOR SRC COLOR NOMATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x0C "BLEND_ALPHA_1BIT_0,Blend alpha 1 bit 0" hexmask.long.byte 0x0C 8.--15. 1. " AD_BLEND_WEIGHT1 ,Alpha value of 1" hexmask.long.byte 0x0C 0.--7. 1. " AD_BLEND_WEIGHT0 ,Alpha value of 0" width 0x0B tree.end tree "BD" base ad:0x54240000+0x3000 width 17. ;"WIN_B Registers" group.long 0x600++0x03 line.long 0x00 "WIN_OPTIONS_0,Window BD Options" bitfld.long 0x00 31. " BD_H_FILTER_MODE ,Horizontal filter mode" "Old,New" bitfld.long 0x00 30. " BD_WIN_ENABLE ,Window BD Window enable" "Disabled,Enabled" bitfld.long 0x00 23. " BD_INTERLACE_ENABLE ,Window BD Interlace enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " BD_YUV_RANGE_EXPAND ,Window BD Enable range expansion" "Disabled,Enabled" bitfld.long 0x00 20. " BD_DV_ENABLE ,Window BD Digital Vibrance Enable" "Disabled,Enabled" bitfld.long 0x00 18. " BD_CSC_ENABLE ,Window BD Color Space Conversion Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BD_CP_ENABLE ,Window BD Color Palette Enable" "Disabled,Enabled" bitfld.long 0x00 14. " BD_V_FILTER_UV_ALIGN ,Window BD V Filter UV Alignment" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " BD_V_FILTER_ENABLE ,Window BD V Filter Enable" "Disabled,Enabled" bitfld.long 0x00 8. " BD_H_FILTER_ENABLE ,Window BD H Filter Enable" "Disabled,Enabled" bitfld.long 0x00 6. " BD_COLOR_EXPAND ,Color expansion" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BD_SCAN_COLUMN ,Window BD Scanning direction" "Disabled,Enabled" bitfld.long 0x00 2. " BD_V_DIRECTION ,Window BD Vertical (Y) drawing Direction" "Increment,Decrement" bitfld.long 0x00 0. " BD_H_DIRECTION ,Window BD Horizontal (X) drawing Direction" "Increment,Decrement" group.long 0x604++0x03 line.long 0x00 "BYTE_SWAP_0,Window BD Byte Swap" bitfld.long 0x00 0.--2. " BD_BYTE_SWAP ,Window BD Byte Swap" "NOSWAP,SWAP2,SWAP4,SWAP4HW,SWAP02,SWAPLEFT,?..." group.long 0x60C++0x03 line.long 0x00 "COLOR_DEPTH_0,Window BD Color depth" hexmask.long.byte 0x00 0.--6. 1. " BD_COLOR_DEPTH ,Window BD Color Depth" width 18. textline " " group.long 0x610++0x1B line.long 0x00 "POSITION_0,Window BD Position" hexmask.long.word 0x00 16.--28. 1. " BD_V_POSITION ,Window BD V Position" hexmask.long.word 0x00 0.--12. 1. " BD_H_POSITION ,Window BD H Position" line.long 0x04 "SIZE_0,Window BD Size" hexmask.long.word 0x04 16.--28. 1. " BD_V_SIZE ,Vertical size after scaling" hexmask.long.word 0x04 0.--12. 1. " BD_H_SIZE ,Horizontal size after scaling" line.long 0x08 "PRESCALED_SIZE_0,Window BD Pre-scaled Size" hexmask.long.word 0x08 16.--28. 1. " BD_V_PRESCALED_SIZE ,Window BD V Pre-scaled Size" hexmask.long.word 0x08 0.--14. 1. " BD_H_PRESCALED_SIZE ,Window BD H Pre-scaled Size" line.long 0x0C "H_INITIAL_DDA_0,Window BD H Initial DDA" hexmask.long.word 0x0C 0.--15. 1. " BD_H_INITIAL_DDA ,Window BD H Initial DDA" line.long 0x10 "V_INITIAL_DDA_0,Window BD V Initial DDA" hexmask.long.word 0x10 0.--15. 1. " BD_V_INITIAL_DDA ,Window BD V Initial DDA" line.long 0x14 "DDA_INCREMENT_0,Window BD DDA Increment" hexmask.long.word 0x14 16.--31. 1. " BD_V_DDA_INCREMENT ,Window BD Vertical DDA Increment" hexmask.long.word 0x14 0.--15. 1. " BD_H_DDA_INCREMENT ,Window BD Horizontal DDA Increment" line.long 0x18 "LINE_STRIDE_0,Window BD Line Stride" hexmask.long.word 0x18 16.--31. 1. " BD_UV_LINE_STRIDE ,Window BD Line Stride for Chroma" hexmask.long.word 0x18 0.--15. 1. " BD_LINE_STRIDE ,Window BD Line Stride" group.long 0x638++0x03 line.long 0x00 "DV_CONTROL_0,Window BD Digital Vibrance Control" bitfld.long 0x00 16.--18. " BD_DV_CONTROL_B ,Digital Vibrance control for B" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " BD_DV_CONTROL_G ,Digital Vibrance control for G" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " BD_DV_CONTROL_R ,Digital Vibrance control for R" "0,1,2,3,4,5,6,7" textline " " width 24. group.long 0x658++0x0F line.long 0x00 "BLEND_LAYER_CONTROL_0,Window BD" bitfld.long 0x00 25.--27. " BD_COLOR_KEY_SELECT ,BD COLOR KEY SELECT" "0,1,2,3,4,5,6,7" eventfld.long 0x00 24. " BD_BLEND_BYPASS ,BD BLEND BYPASS" "BLEND_ENABLE,BLEND_BYPASS" hexmask.long.byte 0x00 16.--23. 1. " BD_K2 ,BD K2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BD_K1 ,BD K1" hexmask.long.byte 0x00 0.--7. 1. " BD_WINDOW_LAYER_DEPTH ,BD WINDOW LAYER DEPTH" line.long 0x04 "BLEND_MATCH_SELECT_0,Blend match select 0" bitfld.long 0x04 12.--13. " BD_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT ,BD BLEND FACTOR DST ALPHA MATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x04 8.--9. " BD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,BD BLEND FACTOR SRC ALPHA MATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x04 4.--6. " BD_BLEND_FACTOR_DST_COLOR_MATCH_SELECT ,BD BLEND FACTOR DST COLOR MATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x04 0.--2. " BD_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT ,BD BLEND FACTOR SRC COLOR MATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x08 "BLEND_NOMATCH_SELECT_0,Blend no match select 0" bitfld.long 0x08 12.--13. " BD_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,BD BLEND FACTOR DST ALPHA NOMATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x08 8.--9. " BD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,BD BLEND FACTOR SRC ALPHA NOMATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x08 4.--6. " BD_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,BD BLEND FACTOR DST COLOR NOMATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x08 0.--2. " BD_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,BD BLEND FACTOR SRC COLOR NOMATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x0C "BLEND_ALPHA_1BIT_0,Blend alpha 1 bit 0" hexmask.long.byte 0x0C 8.--15. 1. " BD_BLEND_WEIGHT1 ,Alpha value of 1" hexmask.long.byte 0x0C 0.--7. 1. " BD_BLEND_WEIGHT0 ,Alpha value of 0" width 0x0B tree.end tree "CD" base ad:0x54240000+0x3800 width 17. ;"WIN_C Registers" group.long 0x600++0x03 line.long 0x00 "WIN_OPTIONS_0,Window CD Options" bitfld.long 0x00 31. " CD_H_FILTER_MODE ,Horizontal filter mode" "Old,New" bitfld.long 0x00 30. " CD_WIN_ENABLE ,Window CD Window enable" "Disabled,Enabled" bitfld.long 0x00 23. " CD_INTERLACE_ENABLE ,Window CD Interlace enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " CD_YUV_RANGE_EXPAND ,Window CD Enable range expansion" "Disabled,Enabled" bitfld.long 0x00 20. " CD_DV_ENABLE ,Window CD Digital Vibrance Enable" "Disabled,Enabled" bitfld.long 0x00 18. " CD_CSC_ENABLE ,Window CD Color Space Conversion Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CD_CP_ENABLE ,Window CD Color Palette Enable" "Disabled,Enabled" bitfld.long 0x00 14. " CD_V_FILTER_UV_ALIGN ,Window CD V Filter UV Alignment" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " CD_V_FILTER_ENABLE ,Window CD V Filter Enable" "Disabled,Enabled" bitfld.long 0x00 8. " CD_H_FILTER_ENABLE ,Window CD H Filter Enable" "Disabled,Enabled" bitfld.long 0x00 6. " CD_COLOR_EXPAND ,Color expansion" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CD_SCAN_COLUMN ,Window CD Scanning direction" "Disabled,Enabled" bitfld.long 0x00 2. " CD_V_DIRECTION ,Window CD Vertical (Y) drawing Direction" "Increment,Decrement" bitfld.long 0x00 0. " CD_H_DIRECTION ,Window CD Horizontal (X) drawing Direction" "Increment,Decrement" group.long 0x604++0x03 line.long 0x00 "BYTE_SWAP_0,Window CD Byte Swap" bitfld.long 0x00 0.--2. " CD_BYTE_SWAP ,Window CD Byte Swap" "NOSWAP,SWAP2,SWAP4,SWAP4HW,SWAP02,SWAPLEFT,?..." group.long 0x60C++0x03 line.long 0x00 "COLOR_DEPTH_0,Window CD Color depth" hexmask.long.byte 0x00 0.--6. 1. " CD_COLOR_DEPTH ,Window CD Color Depth" width 18. textline " " group.long 0x610++0x1B line.long 0x00 "POSITION_0,Window CD Position" hexmask.long.word 0x00 16.--28. 1. " CD_V_POSITION ,Window CD V Position" hexmask.long.word 0x00 0.--12. 1. " CD_H_POSITION ,Window CD H Position" line.long 0x04 "SIZE_0,Window CD Size" hexmask.long.word 0x04 16.--28. 1. " CD_V_SIZE ,Vertical size after scaling" hexmask.long.word 0x04 0.--12. 1. " CD_H_SIZE ,Horizontal size after scaling" line.long 0x08 "PRESCALED_SIZE_0,Window CD Pre-scaled Size" hexmask.long.word 0x08 16.--28. 1. " CD_V_PRESCALED_SIZE ,Window CD V Pre-scaled Size" hexmask.long.word 0x08 0.--14. 1. " CD_H_PRESCALED_SIZE ,Window CD H Pre-scaled Size" line.long 0x0C "H_INITIAL_DDA_0,Window CD H Initial DDA" hexmask.long.word 0x0C 0.--15. 1. " CD_H_INITIAL_DDA ,Window CD H Initial DDA" line.long 0x10 "V_INITIAL_DDA_0,Window CD V Initial DDA" hexmask.long.word 0x10 0.--15. 1. " CD_V_INITIAL_DDA ,Window CD V Initial DDA" line.long 0x14 "DDA_INCREMENT_0,Window CD DDA Increment" hexmask.long.word 0x14 16.--31. 1. " CD_V_DDA_INCREMENT ,Window CD Vertical DDA Increment" hexmask.long.word 0x14 0.--15. 1. " CD_H_DDA_INCREMENT ,Window CD Horizontal DDA Increment" line.long 0x18 "LINE_STRIDE_0,Window CD Line Stride" hexmask.long.word 0x18 16.--31. 1. " CD_UV_LINE_STRIDE ,Window CD Line Stride for Chroma" hexmask.long.word 0x18 0.--15. 1. " CD_LINE_STRIDE ,Window CD Line Stride" group.long 0x638++0x03 line.long 0x00 "DV_CONTROL_0,Window CD Digital Vibrance Control" bitfld.long 0x00 16.--18. " CD_DV_CONTROL_B ,Digital Vibrance control for B" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " CD_DV_CONTROL_G ,Digital Vibrance control for G" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " CD_DV_CONTROL_R ,Digital Vibrance control for R" "0,1,2,3,4,5,6,7" textline " " width 24. group.long 0x658++0x0F line.long 0x00 "BLEND_LAYER_CONTROL_0,Window CD" bitfld.long 0x00 25.--27. " CD_COLOR_KEY_SELECT ,CD COLOR KEY SELECT" "0,1,2,3,4,5,6,7" eventfld.long 0x00 24. " CD_BLEND_BYPASS ,CD BLEND BYPASS" "BLEND_ENABLE,BLEND_BYPASS" hexmask.long.byte 0x00 16.--23. 1. " CD_K2 ,CD K2" textline " " hexmask.long.byte 0x00 8.--15. 1. " CD_K1 ,CD K1" hexmask.long.byte 0x00 0.--7. 1. " CD_WINDOW_LAYER_DEPTH ,CD WINDOW LAYER DEPTH" line.long 0x04 "BLEND_MATCH_SELECT_0,Blend match select 0" bitfld.long 0x04 12.--13. " CD_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT ,CD BLEND FACTOR DST ALPHA MATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x04 8.--9. " CD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,CD BLEND FACTOR SRC ALPHA MATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x04 4.--6. " CD_BLEND_FACTOR_DST_COLOR_MATCH_SELECT ,CD BLEND FACTOR DST COLOR MATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x04 0.--2. " CD_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT ,CD BLEND FACTOR SRC COLOR MATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x08 "BLEND_NOMATCH_SELECT_0,Blend no match select 0" bitfld.long 0x08 12.--13. " CD_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,CD BLEND FACTOR DST ALPHA NOMATCH SELECT" "0,1,EG_K1_TIMES_SRC,K2" bitfld.long 0x08 8.--9. " CD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,CD BLEND FACTOR SRC ALPHA NOMATCH SELECT" "0,K1,K2," textline " " bitfld.long 0x08 4.--6. " CD_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,CD BLEND FACTOR DST COLOR NOMATCH SELECT" "0,1,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x08 0.--2. " CD_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,CD BLEND FACTOR SRC COLOR NOMATCH SELECT" "0,1,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,," line.long 0x0C "BLEND_ALPHA_1BIT_0,Blend alpha 1 bit 0" hexmask.long.byte 0x0C 8.--15. 1. " CD_BLEND_WEIGHT1 ,Alpha value of 1" hexmask.long.byte 0x0C 0.--7. 1. " CD_BLEND_WEIGHT0 ,Alpha value of 0" width 0x0B tree.end tree.end tree "WINBUF" tree "AD" base ad:0x54240000+0x2800 width 21. group.long 0x700++0x03 line.long 0x00 "START_ADDR_0,Window ADD Start Address" group.long 0x708++0x03 line.long 0x00 "START_ADDR_U_0,Window ADD Start Address for U plane" group.long 0x710++0x03 line.long 0x00 "START_ADDR_V_0,Window ADD Start Address for V plane" group.long 0x718++0x03 line.long 0x00 "ADDR_H_OFFSET_0,Window ADD Horizontal Address Offset" group.long 0x720++0x03 line.long 0x00 "ADDR_V_OFFSET_0,Window ADD Vertical Address Offset" group.long 0x728++0x0B line.long 0x00 "UFLOW_STATUS,Window ADD FIFO Underflow Status Register" bitfld.long 0x00 30. " COUNT_OFLOW ,Counter has overflowed" "Not occurred,Occurred" hexmask.long.tbyte 0x00 0.--23. 1. " UFLOW_COUNT ,Underflow count" line.long 0x04 "SURFACE_KIND_0,Window ADD Surface Kind" bitfld.long 0x04 31. " AD_BLX4_CYA ,Force BLx4 fetches if surface is Block Linear" "Disabled,Enabled" bitfld.long 0x04 4.--6. " AD_BLOCK_HEIGHT ,Block Height" "HEIGHT_1,HEIGHT_2,HEIGHT_4,HEIGHT_8,HEIGHT_16,HEIGHT_32,," bitfld.long 0x04 0.--1. " AD_SURFACE_KIND ,Surface kind" "PITCH,TILED,BL_16B2," line.long 0x08 "SURFACE_WEIGHT_0,Window AD Surface Weights" bitfld.long 0x08 5.--6. " AD_SURFACE_WEIGHT_V ,Window AD V Surface Weights" "2,4,8,16" bitfld.long 0x08 3.--4. " AD_SURFACE_WEIGHT_U ,Window AD U or UV Surface Weights" "2,4,8,16" bitfld.long 0x08 1.--2. " AD_SURFACE_WEIGHT_Y ,Window AD Y or packed Surface Weights" "2,4,8,16" textline " " bitfld.long 0x08 0. " AD_SURFACE_WEIGHT_OVERRIDE ,Weight Override" "Disabled,Enabled" textline " " width 22. group.long 0x734++0x03 line.long 0x00 "START_ADDR_HI_0,Window AD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " AD_START_ADDR_HI ,Window AD Start Address" "0,1,2,3" group.long 0x73C++0x03 line.long 0x00 "START_ADDR_HI_U_0,Window AD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " AD_START_ADDR_HI ,Window AD Start Address" "0,1,2,3" group.long 0x744++0x03 line.long 0x00 "START_ADDR_HI_V_0,Window AD Higher 2 bits of Start Address for V Plane" bitfld.long 0x00 0.--1. " AD_START_ADDR_HI_V ,Window AD Higher 2 bits of Start Address for V plane" "0,1,2,3" textline " " width 29. group.long 0x74C++0x03 line.long 0x00 "START_ADDR_FIELD2_0,Window AD Start Address" group.long 0x754++0x03 line.long 0x00 "START_ADDR_FIELD2_U_0,Window AD Start Address for U plane" group.long 0x75C++0x03 line.long 0x00 "START_ADDR_FIELD2_V_0,Window AD Start Address for V plane" group.long 0x764++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_0,Window AD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " AD_START_ADDR_FIELD2_HI ,Window AD Start Address" "0,1,2,3" group.long 0x76C++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_U_0,Window AD Higher 2 bits of Start Address for U plane" bitfld.long 0x00 0.--1. " AD_START_ADDR_FIELD2_HI_U ,Window AD Start Address for U plane" "0,1,2,3" group.long 0x774++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_V_0,Window AD Higher 2 bits of Start Address for V plane" bitfld.long 0x00 0.--1. " AD_START_ADDR_FIELD2_HI_V ,Window AD Higher 2 bits of Start Address for V plane" "0,1,2,3" group.long 0x77C++0x03 line.long 0x00 "ADDR_H_OFFSET_FIELD2_0,Window AD Horizontal address offset" group.long 0x784++0x03 line.long 0x00 "ADDR_V_OFFSET_FIELD2_0,Window AD Vertical address offset" group.long 0x790++0x03 line.long 0x00 "UFLOW_CTRL_0,DC WINBUF AD UFLOW CTRL 0" bitfld.long 0x00 0. " AD_UFLOW_CTRL_DBG_MODE ,AD UFLOW CTRL DBG MODE" "Disabled,Enabled" textline " " width 25. group.long 0x794++0x27 line.long 0x00 "UFLOW_DBG_PIXEL_0,DC WINBUF AD UFLOW DBG PIXEL 0" line.long 0x04 "UFLOW_THRESHOLD_0,DC WINBUF AD UFLOW THRESHOLD 0" hexmask.long.word 0x04 0.--12. 1. " AD_UFLOW_THRESHOLD ,AD UFLOW THRESHOLD" line.long 0x08 "SPOOL_UP_0,Spool up time configuration for different windows related logic" hexmask.long.word 0x08 16.--28. 1. " AD_SPOOL_UP_DURATION ,AD SPOOL UP DURATION" bitfld.long 0x08 1. " AD_SPOOL_UP_EDGE ,AD SPOOL UP EDGE" "NEGEDGE,POSEDGE" bitfld.long 0x08 0. " AD_SPOOL_UP_CTRL ,AD SPOOL UP CTRL" "MAX,PROGRAMMABLE" line.long 0x0C "SCALEFACTOR_THRESHOLD_0,DC WINBUF AD SCALEFACTOR THRESHOLD 0" hexmask.long.word 0x0C 16.--31. 1. " AD_SF_LWM_THRESHOLD ,AD SF LWM THRESHOLD" hexmask.long.word 0x0C 0.--15. 1. " AD_SF_HWM_THRESHOLD ,AD SF HWM THRESHOLD" line.long 0x10 "LATENCY_THRESHOLD_0,Register controls the behavior of the rdy4_latency_event from the display to the MC" bitfld.long 0x10 31. " AD_RDY4LATENCY_THRESHOLD_ENABLE ,AD RDY4LATENCY THRESHOLD ENABLE" "Disabled,Enabled" bitfld.long 0x10 30. " AD_RDY4LATENCY_SPOOLUP_CTRL ,AD RDY4LATENCY SPOOLUP CTRL" "DISALLOW,ALLOW" textline " " hexmask.long.word 0x10 16.--28. 1. " AD_RDY4LATENCY_SPOOLUP_DURATION ,AD RDY4LATENCY THRESHOLD" hexmask.long.word 0x10 0.--15. 1. " AD_RDY4LATENCY_THRESHOLD ,AD RDY4LATENCY THRESHOLD" line.long 0x14 "MEMFETCH_DEBUG_STATUS_0,Memfetch Debug Status" bitfld.long 0x14 16. " AD_DEBUG_ENABLE ,Reg to enable FGCG for flops added to debug signals in memfetch" "Disabled,Enabled" bitfld.long 0x14 15. " AD_ALIGN_FIFO_NON_IDLE ,Align FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 14. " AD_PIPE1_FIFO_NON_IDLE ,Pipe1 FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 13. " AD_PIPE0_FIFO_NON_IDLE ,Pipe0 FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 12. " AD_FRAME_FIFO_NON_IDLE ,Frame FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 11. " AD_SURFACE_FIFO_NON_IDLE ,Surface FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 10. " AD_TAG_FIFO_NON_IDLE ,Tag FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 9. " AD_RSP_FIFO_NON_IDLE ,Response FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 8. " AD_REQ_FIFO_NON_IDLE ,Request FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 7. " AD_DP_VALID_NON_IDLE ,DP lines valid at end of frame" "Idle,Busy" bitfld.long 0x14 6. " AD_V_SSM_NON_IDLE ,V SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 5. " AD_U_SSM_NON_IDLE ,U SSM is non-idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 4. " AD_Y_SSM_NON_IDLE ,Y SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 3. " AD_DP_POOL_AVAIL ,DP thinks there is data in the pool at end of frame" "No data,Data" bitfld.long 0x14 2. " AD_POOL_NOT_EMPTY ,Status of pool at end of frame" "Empty,Not empty" textline " " bitfld.long 0x14 1. " AD_UNDERFLOW_LINE1 ,Underflow of line1" "No underflow,Underflow" bitfld.long 0x14 0. " AD_UNDERFLOW_LINE0 ,Underflow of line0" "No underflow,Underflow" line.long 0x18 "MEMFETCH_CONTROL_0,Memfetch Control Register" bitfld.long 0x18 1. " AD_MEMFETCH_CLK_GATE_OVERRIDE ,Disable clock-gating of memfetch for a controller" "Disabled,Enabled" bitfld.long 0x18 0. " AD_MEMFETCH_RESET ,Reset memfetch for a controller" "Disabled,Enabled" line.long 0x1C "OCCUPANCY_THROTTLE_0,DC WINBUF AD OCCUPANCY THROTTLE 0" hexmask.long.word 0x1C 16.--31. 1. " AD_OCCUPANCY_MAX_THRESHOLD ,AD OCCUPANCY MAX THRESHOLD" bitfld.long 0x1C 0. " AD_OCCUPANCY_THROTTLE_MODE ,AD OCCUPANCY THROTTLE MODE" "Disabled,Enabled" line.long 0x20 "SCRATCH_REGISTER_0_0,DC WINBUF AD SCRATCH REGISTER 0 0" line.long 0x24 "SCRATCH_REGISTER_1_0,DC WINBUF AD SCRATCH REGISTER 1 0" width 0x0B tree.end tree "BD" base ad:0x54240000+0x3000 width 21. group.long 0x700++0x03 line.long 0x00 "START_ADDR_0,Window BDD Start Address" group.long 0x708++0x03 line.long 0x00 "START_ADDR_U_0,Window BDD Start Address for U plane" group.long 0x710++0x03 line.long 0x00 "START_ADDR_V_0,Window BDD Start Address for V plane" group.long 0x718++0x03 line.long 0x00 "ADDR_H_OFFSET_0,Window BDD Horizontal Address Offset" group.long 0x720++0x03 line.long 0x00 "ADDR_V_OFFSET_0,Window BDD Vertical Address Offset" group.long 0x728++0x0B line.long 0x00 "UFLOW_STATUS,Window BDD FIFO Underflow Status Register" bitfld.long 0x00 30. " COUNT_OFLOW ,Counter has overflowed" "Not occurred,Occurred" hexmask.long.tbyte 0x00 0.--23. 1. " UFLOW_COUNT ,Underflow count" line.long 0x04 "SURFACE_KIND_0,Window BDD Surface Kind" bitfld.long 0x04 31. " BD_BLX4_CYA ,Force BLx4 fetches if surface is Block Linear" "Disabled,Enabled" bitfld.long 0x04 4.--6. " BD_BLOCK_HEIGHT ,Block Height" "HEIGHT_1,HEIGHT_2,HEIGHT_4,HEIGHT_8,HEIGHT_16,HEIGHT_32,," bitfld.long 0x04 0.--1. " BD_SURFACE_KIND ,Surface kind" "PITCH,TILED,BL_16B2," line.long 0x08 "SURFACE_WEIGHT_0,Window BD Surface Weights" bitfld.long 0x08 5.--6. " BD_SURFACE_WEIGHT_V ,Window BD V Surface Weights" "2,4,8,16" bitfld.long 0x08 3.--4. " BD_SURFACE_WEIGHT_U ,Window BD U or UV Surface Weights" "2,4,8,16" bitfld.long 0x08 1.--2. " BD_SURFACE_WEIGHT_Y ,Window BD Y or packed Surface Weights" "2,4,8,16" textline " " bitfld.long 0x08 0. " BD_SURFACE_WEIGHT_OVERRIDE ,Weight Override" "Disabled,Enabled" textline " " width 22. group.long 0x734++0x03 line.long 0x00 "START_ADDR_HI_0,Window BD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " BD_START_ADDR_HI ,Window BD Start Address" "0,1,2,3" group.long 0x73C++0x03 line.long 0x00 "START_ADDR_HI_U_0,Window BD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " BD_START_ADDR_HI ,Window BD Start Address" "0,1,2,3" group.long 0x744++0x03 line.long 0x00 "START_ADDR_HI_V_0,Window BD Higher 2 bits of Start Address for V Plane" bitfld.long 0x00 0.--1. " BD_START_ADDR_HI_V ,Window BD Higher 2 bits of Start Address for V plane" "0,1,2,3" textline " " width 29. group.long 0x74C++0x03 line.long 0x00 "START_ADDR_FIELD2_0,Window BD Start Address" group.long 0x754++0x03 line.long 0x00 "START_ADDR_FIELD2_U_0,Window BD Start Address for U plane" group.long 0x75C++0x03 line.long 0x00 "START_ADDR_FIELD2_V_0,Window BD Start Address for V plane" group.long 0x764++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_0,Window BD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " BD_START_ADDR_FIELD2_HI ,Window BD Start Address" "0,1,2,3" group.long 0x76C++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_U_0,Window BD Higher 2 bits of Start Address for U plane" bitfld.long 0x00 0.--1. " BD_START_ADDR_FIELD2_HI_U ,Window BD Start Address for U plane" "0,1,2,3" group.long 0x774++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_V_0,Window BD Higher 2 bits of Start Address for V plane" bitfld.long 0x00 0.--1. " BD_START_ADDR_FIELD2_HI_V ,Window BD Higher 2 bits of Start Address for V plane" "0,1,2,3" group.long 0x77C++0x03 line.long 0x00 "ADDR_H_OFFSET_FIELD2_0,Window BD Horizontal address offset" group.long 0x784++0x03 line.long 0x00 "ADDR_V_OFFSET_FIELD2_0,Window BD Vertical address offset" group.long 0x790++0x03 line.long 0x00 "UFLOW_CTRL_0,DC WINBUF BD UFLOW CTRL 0" bitfld.long 0x00 0. " BD_UFLOW_CTRL_DBG_MODE ,BD UFLOW CTRL DBG MODE" "Disabled,Enabled" textline " " width 25. group.long 0x794++0x27 line.long 0x00 "UFLOW_DBG_PIXEL_0,DC WINBUF BD UFLOW DBG PIXEL 0" line.long 0x04 "UFLOW_THRESHOLD_0,DC WINBUF BD UFLOW THRESHOLD 0" hexmask.long.word 0x04 0.--12. 1. " BD_UFLOW_THRESHOLD ,BD UFLOW THRESHOLD" line.long 0x08 "SPOOL_UP_0,Spool up time configuration for different windows related logic" hexmask.long.word 0x08 16.--28. 1. " BD_SPOOL_UP_DURATION ,BD SPOOL UP DURATION" bitfld.long 0x08 1. " BD_SPOOL_UP_EDGE ,BD SPOOL UP EDGE" "NEGEDGE,POSEDGE" bitfld.long 0x08 0. " BD_SPOOL_UP_CTRL ,BD SPOOL UP CTRL" "MAX,PROGRAMMABLE" line.long 0x0C "SCALEFACTOR_THRESHOLD_0,DC WINBUF BD SCALEFACTOR THRESHOLD 0" hexmask.long.word 0x0C 16.--31. 1. " BD_SF_LWM_THRESHOLD ,BD SF LWM THRESHOLD" hexmask.long.word 0x0C 0.--15. 1. " BD_SF_HWM_THRESHOLD ,BD SF HWM THRESHOLD" line.long 0x10 "LATENCY_THRESHOLD_0,Register controls the behavior of the rdy4_latency_event from the display to the MC" bitfld.long 0x10 31. " BD_RDY4LATENCY_THRESHOLD_ENABLE ,BD RDY4LATENCY THRESHOLD ENABLE" "Disabled,Enabled" bitfld.long 0x10 30. " BD_RDY4LATENCY_SPOOLUP_CTRL ,BD RDY4LATENCY SPOOLUP CTRL" "DISALLOW,ALLOW" textline " " hexmask.long.word 0x10 16.--28. 1. " BD_RDY4LATENCY_SPOOLUP_DURATION ,BD RDY4LATENCY THRESHOLD" hexmask.long.word 0x10 0.--15. 1. " BD_RDY4LATENCY_THRESHOLD ,BD RDY4LATENCY THRESHOLD" line.long 0x14 "MEMFETCH_DEBUG_STATUS_0,Memfetch Debug Status" bitfld.long 0x14 16. " BD_DEBUG_ENABLE ,Reg to enable FGCG for flops added to debug signals in memfetch" "Disabled,Enabled" bitfld.long 0x14 15. " BD_ALIGN_FIFO_NON_IDLE ,Align FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 14. " BD_PIPE1_FIFO_NON_IDLE ,Pipe1 FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 13. " BD_PIPE0_FIFO_NON_IDLE ,Pipe0 FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 12. " BD_FRAME_FIFO_NON_IDLE ,Frame FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 11. " BD_SURFACE_FIFO_NON_IDLE ,Surface FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 10. " BD_TAG_FIFO_NON_IDLE ,Tag FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 9. " BD_RSP_FIFO_NON_IDLE ,Response FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 8. " BD_REQ_FIFO_NON_IDLE ,Request FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 7. " BD_DP_VALID_NON_IDLE ,DP lines valid at end of frame" "Idle,Busy" bitfld.long 0x14 6. " BD_V_SSM_NON_IDLE ,V SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 5. " BD_U_SSM_NON_IDLE ,U SSM is non-idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 4. " BD_Y_SSM_NON_IDLE ,Y SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 3. " BD_DP_POOL_AVAIL ,DP thinks there is data in the pool at end of frame" "No data,Data" bitfld.long 0x14 2. " BD_POOL_NOT_EMPTY ,Status of pool at end of frame" "Empty,Not empty" textline " " bitfld.long 0x14 1. " BD_UNDERFLOW_LINE1 ,Underflow of line1" "No underflow,Underflow" bitfld.long 0x14 0. " BD_UNDERFLOW_LINE0 ,Underflow of line0" "No underflow,Underflow" line.long 0x18 "MEMFETCH_CONTROL_0,Memfetch Control Register" bitfld.long 0x18 1. " BD_MEMFETCH_CLK_GATE_OVERRIDE ,Disable clock-gating of memfetch for a controller" "Disabled,Enabled" bitfld.long 0x18 0. " BD_MEMFETCH_RESET ,Reset memfetch for a controller" "Disabled,Enabled" line.long 0x1C "OCCUPANCY_THROTTLE_0,DC WINBUF BD OCCUPANCY THROTTLE 0" hexmask.long.word 0x1C 16.--31. 1. " BD_OCCUPANCY_MAX_THRESHOLD ,BD OCCUPANCY MAX THRESHOLD" bitfld.long 0x1C 0. " BD_OCCUPANCY_THROTTLE_MODE ,BD OCCUPANCY THROTTLE MODE" "Disabled,Enabled" line.long 0x20 "SCRATCH_REGISTER_0_0,DC WINBUF BD SCRATCH REGISTER 0 0" line.long 0x24 "SCRATCH_REGISTER_1_0,DC WINBUF BD SCRATCH REGISTER 1 0" width 0x0B tree.end tree "CD" base ad:0x54240000+0x3800 width 21. group.long 0x700++0x03 line.long 0x00 "START_ADDR_0,Window CDD Start Address" group.long 0x708++0x03 line.long 0x00 "START_ADDR_U_0,Window CDD Start Address for U plane" group.long 0x710++0x03 line.long 0x00 "START_ADDR_V_0,Window CDD Start Address for V plane" group.long 0x718++0x03 line.long 0x00 "ADDR_H_OFFSET_0,Window CDD Horizontal Address Offset" group.long 0x720++0x03 line.long 0x00 "ADDR_V_OFFSET_0,Window CDD Vertical Address Offset" group.long 0x728++0x0B line.long 0x00 "UFLOW_STATUS,Window CDD FIFO Underflow Status Register" bitfld.long 0x00 30. " COUNT_OFLOW ,Counter has overflowed" "Not occurred,Occurred" hexmask.long.tbyte 0x00 0.--23. 1. " UFLOW_COUNT ,Underflow count" line.long 0x04 "SURFACE_KIND_0,Window CDD Surface Kind" bitfld.long 0x04 31. " CD_BLX4_CYA ,Force BLx4 fetches if surface is Block Linear" "Disabled,Enabled" bitfld.long 0x04 4.--6. " CD_BLOCK_HEIGHT ,Block Height" "HEIGHT_1,HEIGHT_2,HEIGHT_4,HEIGHT_8,HEIGHT_16,HEIGHT_32,," bitfld.long 0x04 0.--1. " CD_SURFACE_KIND ,Surface kind" "PITCH,TILED,BL_16B2," line.long 0x08 "SURFACE_WEIGHT_0,Window CD Surface Weights" bitfld.long 0x08 5.--6. " CD_SURFACE_WEIGHT_V ,Window CD V Surface Weights" "2,4,8,16" bitfld.long 0x08 3.--4. " CD_SURFACE_WEIGHT_U ,Window CD U or UV Surface Weights" "2,4,8,16" bitfld.long 0x08 1.--2. " CD_SURFACE_WEIGHT_Y ,Window CD Y or packed Surface Weights" "2,4,8,16" textline " " bitfld.long 0x08 0. " CD_SURFACE_WEIGHT_OVERRIDE ,Weight Override" "Disabled,Enabled" textline " " width 22. group.long 0x734++0x03 line.long 0x00 "START_ADDR_HI_0,Window CD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " CD_START_ADDR_HI ,Window CD Start Address" "0,1,2,3" group.long 0x73C++0x03 line.long 0x00 "START_ADDR_HI_U_0,Window CD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " CD_START_ADDR_HI ,Window CD Start Address" "0,1,2,3" group.long 0x744++0x03 line.long 0x00 "START_ADDR_HI_V_0,Window CD Higher 2 bits of Start Address for V Plane" bitfld.long 0x00 0.--1. " CD_START_ADDR_HI_V ,Window CD Higher 2 bits of Start Address for V plane" "0,1,2,3" textline " " width 29. group.long 0x74C++0x03 line.long 0x00 "START_ADDR_FIELD2_0,Window CD Start Address" group.long 0x754++0x03 line.long 0x00 "START_ADDR_FIELD2_U_0,Window CD Start Address for U plane" group.long 0x75C++0x03 line.long 0x00 "START_ADDR_FIELD2_V_0,Window CD Start Address for V plane" group.long 0x764++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_0,Window CD Higher 2 bits of Start Address" bitfld.long 0x00 0.--1. " CD_START_ADDR_FIELD2_HI ,Window CD Start Address" "0,1,2,3" group.long 0x76C++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_U_0,Window CD Higher 2 bits of Start Address for U plane" bitfld.long 0x00 0.--1. " CD_START_ADDR_FIELD2_HI_U ,Window CD Start Address for U plane" "0,1,2,3" group.long 0x774++0x03 line.long 0x00 "START_ADDR_FIELD2_HI_V_0,Window CD Higher 2 bits of Start Address for V plane" bitfld.long 0x00 0.--1. " CD_START_ADDR_FIELD2_HI_V ,Window CD Higher 2 bits of Start Address for V plane" "0,1,2,3" group.long 0x77C++0x03 line.long 0x00 "ADDR_H_OFFSET_FIELD2_0,Window CD Horizontal address offset" group.long 0x784++0x03 line.long 0x00 "ADDR_V_OFFSET_FIELD2_0,Window CD Vertical address offset" group.long 0x790++0x03 line.long 0x00 "UFLOW_CTRL_0,DC WINBUF CD UFLOW CTRL 0" bitfld.long 0x00 0. " CD_UFLOW_CTRL_DBG_MODE ,CD UFLOW CTRL DBG MODE" "Disabled,Enabled" textline " " width 25. group.long 0x794++0x27 line.long 0x00 "UFLOW_DBG_PIXEL_0,DC WINBUF CD UFLOW DBG PIXEL 0" line.long 0x04 "UFLOW_THRESHOLD_0,DC WINBUF CD UFLOW THRESHOLD 0" hexmask.long.word 0x04 0.--12. 1. " CD_UFLOW_THRESHOLD ,CD UFLOW THRESHOLD" line.long 0x08 "SPOOL_UP_0,Spool up time configuration for different windows related logic" hexmask.long.word 0x08 16.--28. 1. " CD_SPOOL_UP_DURATION ,CD SPOOL UP DURATION" bitfld.long 0x08 1. " CD_SPOOL_UP_EDGE ,CD SPOOL UP EDGE" "NEGEDGE,POSEDGE" bitfld.long 0x08 0. " CD_SPOOL_UP_CTRL ,CD SPOOL UP CTRL" "MAX,PROGRAMMABLE" line.long 0x0C "SCALEFACTOR_THRESHOLD_0,DC WINBUF CD SCALEFACTOR THRESHOLD 0" hexmask.long.word 0x0C 16.--31. 1. " CD_SF_LWM_THRESHOLD ,CD SF LWM THRESHOLD" hexmask.long.word 0x0C 0.--15. 1. " CD_SF_HWM_THRESHOLD ,CD SF HWM THRESHOLD" line.long 0x10 "LATENCY_THRESHOLD_0,Register controls the behavior of the rdy4_latency_event from the display to the MC" bitfld.long 0x10 31. " CD_RDY4LATENCY_THRESHOLD_ENABLE ,CD RDY4LATENCY THRESHOLD ENABLE" "Disabled,Enabled" bitfld.long 0x10 30. " CD_RDY4LATENCY_SPOOLUP_CTRL ,CD RDY4LATENCY SPOOLUP CTRL" "DISALLOW,ALLOW" textline " " hexmask.long.word 0x10 16.--28. 1. " CD_RDY4LATENCY_SPOOLUP_DURATION ,CD RDY4LATENCY THRESHOLD" hexmask.long.word 0x10 0.--15. 1. " CD_RDY4LATENCY_THRESHOLD ,CD RDY4LATENCY THRESHOLD" line.long 0x14 "MEMFETCH_DEBUG_STATUS_0,Memfetch Debug Status" bitfld.long 0x14 16. " CD_DEBUG_ENABLE ,Reg to enable FGCG for flops added to debug signals in memfetch" "Disabled,Enabled" bitfld.long 0x14 15. " CD_ALIGN_FIFO_NON_IDLE ,Align FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 14. " CD_PIPE1_FIFO_NON_IDLE ,Pipe1 FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 13. " CD_PIPE0_FIFO_NON_IDLE ,Pipe0 FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 12. " CD_FRAME_FIFO_NON_IDLE ,Frame FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 11. " CD_SURFACE_FIFO_NON_IDLE ,Surface FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 10. " CD_TAG_FIFO_NON_IDLE ,Tag FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 9. " CD_RSP_FIFO_NON_IDLE ,Response FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x14 8. " CD_REQ_FIFO_NON_IDLE ,Request FIFO idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 7. " CD_DP_VALID_NON_IDLE ,DP lines valid at end of frame" "Idle,Busy" bitfld.long 0x14 6. " CD_V_SSM_NON_IDLE ,V SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 5. " CD_U_SSM_NON_IDLE ,U SSM is non-idle at end of frame" "Idle,Busy" textline " " bitfld.long 0x14 4. " CD_Y_SSM_NON_IDLE ,Y SSM is non-idle at end of frame" "Idle,Busy" bitfld.long 0x14 3. " CD_DP_POOL_AVAIL ,DP thinks there is data in the pool at end of frame" "No data,Data" bitfld.long 0x14 2. " CD_POOL_NOT_EMPTY ,Status of pool at end of frame" "Empty,Not empty" textline " " bitfld.long 0x14 1. " CD_UNDERFLOW_LINE1 ,Underflow of line1" "No underflow,Underflow" bitfld.long 0x14 0. " CD_UNDERFLOW_LINE0 ,Underflow of line0" "No underflow,Underflow" line.long 0x18 "MEMFETCH_CONTROL_0,Memfetch Control Register" bitfld.long 0x18 1. " CD_MEMFETCH_CLK_GATE_OVERRIDE ,Disable clock-gating of memfetch for a controller" "Disabled,Enabled" bitfld.long 0x18 0. " CD_MEMFETCH_RESET ,Reset memfetch for a controller" "Disabled,Enabled" line.long 0x1C "OCCUPANCY_THROTTLE_0,DC WINBUF CD OCCUPANCY THROTTLE 0" hexmask.long.word 0x1C 16.--31. 1. " CD_OCCUPANCY_MAX_THRESHOLD ,CD OCCUPANCY MAX THRESHOLD" bitfld.long 0x1C 0. " CD_OCCUPANCY_THROTTLE_MODE ,CD OCCUPANCY THROTTLE MODE" "Disabled,Enabled" line.long 0x20 "SCRATCH_REGISTER_0_0,DC WINBUF CD SCRATCH REGISTER 0 0" line.long 0x24 "SCRATCH_REGISTER_1_0,DC WINBUF CD SCRATCH REGISTER 1 0" width 0x0B tree.end tree.end tree "WINBUF_CDE" tree "AD" base ad:0x54200000+0x2800 width 24. group.long 0x7BC++0x07 line.long 0x00 "CDE_CONTROL_0,WINBUF AD CDE window control register" bitfld.long 0x00 13. " ADD_CLEARRESPONSEONFRAMESTART ,Reset response block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 12. " ADD_CLEARREQUESTONFRAMESTART ,Reset request block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 0. " ADD_ENABLESURFACE0 ,Enabled compression for surface 0" "Disabled,Enabled" line.long 0x04 "CDE_COMPTAG_BASE_0_0,Base address of compression bit storage per surface" group.long 0x7C8++0x03 line.long 0x00 "CDE_COMPTAG_BASEHI_0_0,Base address high of compression bit storage per surface" hexmask.long.byte 0x00 0.--7. 1. " AD_BASEADDRESSHI ,Storage Base Address Hi for surface N" group.long 0x7D0++0x17 line.long 0x00 "ZBC_COLOR_0_0,One ZBC Color per surface" line.long 0x04 "SURFACE_OFFSET_0_0,X and Y offset of surface N" hexmask.long.word 0x04 16.--27. 1. " AD_YOFFSET ,Y offset for surface N" hexmask.long.word 0x04 0.--11. 1. " AD_XOFFSET ,X offset for surface N" line.long 0x08 "CTB_ENTRY_0_0,Maximum CTB entry count register" hexmask.long.byte 0x08 0.--7. 1. " AD_MAXENTRYCOUNT0 ,Maximum CTB entry count per surface" line.long 0x0C "CG_SW_OVR_0,SW override to enable/disable CDE clock-gating" bitfld.long 0x0C 0. " AD_CG ,CG software override to enable/disable CDE clock gating" "Disabled,Enabled" line.long 0x10 "PM_CONTROL_0,PM control register" bitfld.long 0x10 0.--3. " AD_SELECT ,Select lines for PM counters implemented in the CDE" "CTB_LOOKUP_HIT,CTB_LOOKUP_MISS,UNCOMP_1TO1,ARITHMETIC_2TO1,REDUCTION_8TO1,ZBC,CSR_FETCH_64B,CTB_FETCH_64B,PIXEL_FETCH_64B,PIXEL_FETCH_32B,CTB_READS_SAMPLED,CTB_READ_RSP_LATENCY,PIXEL_READS_SAMPLED,PIXEL_READ_RSP_LATENCY,?..." line.long 0x14 "PM_COUNTER_0,PM counter register" width 0x0B tree.end tree "BD" base ad:0x54200000+0x3000 width 24. group.long 0x7BC++0x07 line.long 0x00 "CDE_CONTROL_0,WINBUF BD CDE window control register" bitfld.long 0x00 13. " BDD_CLEARRESPONSEONFRAMESTART ,Reset response block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 12. " BDD_CLEARREQUESTONFRAMESTART ,Reset request block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 0. " BDD_ENABLESURFACE0 ,Enabled compression for surface 0" "Disabled,Enabled" line.long 0x04 "CDE_COMPTAG_BASE_0_0,Base address of compression bit storage per surface" group.long 0x7C8++0x03 line.long 0x00 "CDE_COMPTAG_BASEHI_0_0,Base address high of compression bit storage per surface" hexmask.long.byte 0x00 0.--7. 1. " BD_BASEADDRESSHI ,Storage Base Address Hi for surface N" group.long 0x7D0++0x17 line.long 0x00 "ZBC_COLOR_0_0,One ZBC Color per surface" line.long 0x04 "SURFACE_OFFSET_0_0,X and Y offset of surface N" hexmask.long.word 0x04 16.--27. 1. " BD_YOFFSET ,Y offset for surface N" hexmask.long.word 0x04 0.--11. 1. " BD_XOFFSET ,X offset for surface N" line.long 0x08 "CTB_ENTRY_0_0,Maximum CTB entry count register" hexmask.long.byte 0x08 0.--7. 1. " BD_MAXENTRYCOUNT0 ,Maximum CTB entry count per surface" line.long 0x0C "CG_SW_OVR_0,SW override to enable/disable CDE clock-gating" bitfld.long 0x0C 0. " BD_CG ,CG software override to enable/disable CDE clock gating" "Disabled,Enabled" line.long 0x10 "PM_CONTROL_0,PM control register" bitfld.long 0x10 0.--3. " BD_SELECT ,Select lines for PM counters implemented in the CDE" "CTB_LOOKUP_HIT,CTB_LOOKUP_MISS,UNCOMP_1TO1,ARITHMETIC_2TO1,REDUCTION_8TO1,ZBC,CSR_FETCH_64B,CTB_FETCH_64B,PIXEL_FETCH_64B,PIXEL_FETCH_32B,CTB_READS_SAMPLED,CTB_READ_RSP_LATENCY,PIXEL_READS_SAMPLED,PIXEL_READ_RSP_LATENCY,?..." line.long 0x14 "PM_COUNTER_0,PM counter register" width 0x0B tree.end tree "CD" base ad:0x54200000+0x3800 width 24. group.long 0x7BC++0x07 line.long 0x00 "CDE_CONTROL_0,WINBUF CD CDE window control register" bitfld.long 0x00 13. " CDD_CLEARRESPONSEONFRAMESTART ,Reset response block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 12. " CDD_CLEARREQUESTONFRAMESTART ,Reset request block state machines and buffers with FrameStart" "Disabled,Enabled" bitfld.long 0x00 0. " CDD_ENABLESURFACE0 ,Enabled compression for surface 0" "Disabled,Enabled" line.long 0x04 "CDE_COMPTAG_BASE_0_0,Base address of compression bit storage per surface" group.long 0x7C8++0x03 line.long 0x00 "CDE_COMPTAG_BASEHI_0_0,Base address high of compression bit storage per surface" hexmask.long.byte 0x00 0.--7. 1. " CD_BASEADDRESSHI ,Storage Base Address Hi for surface N" group.long 0x7D0++0x17 line.long 0x00 "ZBC_COLOR_0_0,One ZBC Color per surface" line.long 0x04 "SURFACE_OFFSET_0_0,X and Y offset of surface N" hexmask.long.word 0x04 16.--27. 1. " CD_YOFFSET ,Y offset for surface N" hexmask.long.word 0x04 0.--11. 1. " CD_XOFFSET ,X offset for surface N" line.long 0x08 "CTB_ENTRY_0_0,Maximum CTB entry count register" hexmask.long.byte 0x08 0.--7. 1. " CD_MAXENTRYCOUNT0 ,Maximum CTB entry count per surface" line.long 0x0C "CG_SW_OVR_0,SW override to enable/disable CDE clock-gating" bitfld.long 0x0C 0. " CD_CG ,CG software override to enable/disable CDE clock gating" "Disabled,Enabled" line.long 0x10 "PM_CONTROL_0,PM control register" bitfld.long 0x10 0.--3. " CD_SELECT ,Select lines for PM counters implemented in the CDE" "CTB_LOOKUP_HIT,CTB_LOOKUP_MISS,UNCOMP_1TO1,ARITHMETIC_2TO1,REDUCTION_8TO1,ZBC,CSR_FETCH_64B,CTB_FETCH_64B,PIXEL_FETCH_64B,PIXEL_FETCH_32B,CTB_READS_SAMPLED,CTB_READ_RSP_LATENCY,PIXEL_READS_SAMPLED,PIXEL_READ_RSP_LATENCY,?..." line.long 0x14 "PM_COUNTER_0,PM counter register" width 0x0B tree.end tree.end tree.end tree "WIN" tree "D" base ad:0x54200000+0x200 width 31. group.long 0x00++0x03 line.long 0x00 "WIN_OPTIONS_0,Window (2)D Options" bitfld.long 0x00 30. " DD_WIN_ENABLE ,Window DD Window enable" "Disabled,Enabled" bitfld.long 0x00 6. " DD_COLOR_EXPAND ,Window DD 12/15/16/18-to-24 bpp color expansion" "Disabled,Enabled" group.long 0x0C++0x0B line.long 0x00 "DD_COLOR_DEPTH_0,Window (2)D Color Depth" hexmask.long.byte 0x00 0.--6. 1. " DD_COLOR_DEPTH ,Window D Color Depth" line.long 0x04 "DD_V_POSITION,Window DD Position" hexmask.long.word 0x04 16.--28. 1. " DD_V_POSITION ,Window DD V Position" hexmask.long.word 0x04 0.--12. 1. " DD_H_POSITION ,Window DD H Position" line.long 0x08 "SIZE_0,Window DD Size" hexmask.long.word 0x08 16.--28. 1. " DD_V_SIZE ,Window DD V Size (lines)" hexmask.long.word 0x08 0.--12. 1. " DD_H_SIZE ,Window DD H Size (pixels)" group.long 0x28++0x03 line.long 0x00 "LINE_STRIDE_0,Window DD Line Stride" hexmask.long.word 0x00 0.--15. 1. " DD_LINE_STRIDE ,Window DD Line Stride" group.long 0x58++0x07 line.long 0x00 "BLEND_LAYER_CONTROL_0,Blend Layer Control" bitfld.long 0x00 24. " DD_BLEND_BYPASS ,Blend Bypass" "Not bypassed,Bypassed" hexmask.long.byte 0x00 16.--23. 1. " DD_K2 ,DD_K2" textline " " hexmask.long.byte 0x00 8.--15. 1. " DD_K1 ,DD_K1" hexmask.long.byte 0x00 0.--7. 1. " DD_WINDOW_LAYER_DEPTH ,DD_WINDOW_LAYER_DEPTH" line.long 0x04 "BLEND_MATCH_SELECT_0,Blend Match Select" bitfld.long 0x04 12.--13. " DD_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT ,DST Alpha Match Select" "ZERO,ONE,NEG_K1_TIMES_SRC,K2" bitfld.long 0x04 8.--9. " DD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,SRC Alpha Match Select" "ZERO,K1,K2,?..." textline " " bitfld.long 0x04 4.--6. " DD_BLEND_FACTOR_DST_COLOR_MATCH_SELECT ,DST Color Match Select" "ZERO,ONE,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x04 0.--2. " DD_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT ,SRC Color Match Select" "ZERO,ONE,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,?..." group.long 0x64++0x03 line.long 0x00 "BLEND_ALPHA_1BIT_0,Blend Alpha 1BIT" hexmask.long.byte 0x00 8.--15. 1. " BLEND_WEIGHT1 ,1-bit alpha and alpha value of 1" hexmask.long.byte 0x00 0.--7. 1. " BLEND_WEIGHT0 ,T1-bit alpha and alpha value of 0" width 0x0B tree.end tree "T" base ad:0x54200000+0x400 width 31. group.long 0x00++0x03 line.long 0x00 "WIN_OPTIONS_0,Window (2)D Options" bitfld.long 0x00 30. " TD_WIN_ENABLE ,Window TD Window enable" "Disabled,Enabled" bitfld.long 0x00 6. " TD_COLOR_EXPAND ,Window TD 12/15/16/18-to-24 bpp color expansion" "Disabled,Enabled" group.long 0x0C++0x0B line.long 0x00 "TD_COLOR_DEPTH_0,Window (2)D Color Depth" hexmask.long.byte 0x00 0.--6. 1. " TD_COLOR_DEPTH ,Window D Color Depth" line.long 0x04 "TD_V_POSITION,Window TD Position" hexmask.long.word 0x04 16.--28. 1. " TD_V_POSITION ,Window TD V Position" hexmask.long.word 0x04 0.--12. 1. " TD_H_POSITION ,Window TD H Position" line.long 0x08 "SIZE_0,Window TD Size" hexmask.long.word 0x08 16.--28. 1. " TD_V_SIZE ,Window TD V Size (lines)" hexmask.long.word 0x08 0.--12. 1. " TD_H_SIZE ,Window TD H Size (pixels)" group.long 0x28++0x03 line.long 0x00 "LINE_STRIDE_0,Window TD Line Stride" hexmask.long.word 0x00 0.--15. 1. " TD_LINE_STRIDE ,Window TD Line Stride" group.long 0x58++0x07 line.long 0x00 "BLEND_LAYER_CONTROL_0,Blend Layer Control" bitfld.long 0x00 24. " TD_BLEND_BYPASS ,Blend Bypass" "Not bypassed,Bypassed" hexmask.long.byte 0x00 16.--23. 1. " TD_K2 ,TD_K2" textline " " hexmask.long.byte 0x00 8.--15. 1. " TD_K1 ,TD_K1" hexmask.long.byte 0x00 0.--7. 1. " TD_WINDOW_LAYER_DEPTH ,TD_WINDOW_LAYER_DEPTH" line.long 0x04 "BLEND_MATCH_SELECT_0,Blend Match Select" bitfld.long 0x04 12.--13. " TD_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT ,DST Alpha Match Select" "ZERO,ONE,NEG_K1_TIMES_SRC,K2" bitfld.long 0x04 8.--9. " TD_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT ,SRC Alpha Match Select" "ZERO,K1,K2,?..." textline " " bitfld.long 0x04 4.--6. " TD_BLEND_FACTOR_DST_COLOR_MATCH_SELECT ,DST Color Match Select" "ZERO,ONE,K1,K2,K1_TIMES_DST,NEG_K1_TIMES_DST,NEG_K1_TIMES_SRC,NEG_K1" bitfld.long 0x04 0.--2. " TD_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT ,SRC Color Match Select" "ZERO,ONE,K1,K1_TIMES_DST,NEG_K1_TIMES_DST,K1_TIMES_SRC,?..." group.long 0x64++0x03 line.long 0x00 "BLEND_ALPHA_1BIT_0,Blend Alpha 1BIT" hexmask.long.byte 0x00 8.--15. 1. " BLEND_WEIGHT1 ,1-bit alpha and alpha value of 1" hexmask.long.byte 0x00 0.--7. 1. " BLEND_WEIGHT0 ,T1-bit alpha and alpha value of 0" width 0x0B tree.end tree.end tree "WINBUF" tree "D" base ad:0x54200000+0x300 width 25. group.long 0x00++0x03 line.long 0x00 "START_ADDR_0,Window D Start Address" group.long 0x18++0x03 line.long 0x00 "ADDR_H_OFFSET_0,Window D Horizontal address offset" group.long 0x20++0x03 line.long 0x00 "ADDR_V_OFFSET_0,Window D Vertical address offset" group.long 0x28++0x03 line.long 0x00 "UFLOW_STATUS_0,Window D FIFO Underflow Status Register" eventfld.long 0x00 30. " COUNT_OFLOW ,Flag bit that indicates that the underflow event counter has overflowed" "No overflow,Overflow" hexmask.long.tbyte 0x00 0.--23. 1. " UFLOW_COUNT ,Underflow count" group.long 0x34++0x03 line.long 0x00 "START_ADDR_HI_0,Window D Higher 32 bits of Start Address" bitfld.long 0x00 0.--1. " D_START_ADDR_HI ,Window D Start Address" "0,1,2,3" group.long 0x90++0x07 line.long 0x00 "UFLOW_CTRL_0,Window D FIFO Underflow Control Register" bitfld.long 0x00 1. " D_UFLOW_CYA ,D_UFLOW_CYA" "Disabled,Enabled" bitfld.long 0x00 0. " D_UFLOW_CTRL_DBG_MODE ,Underflow debug mode" "Disabled,Enabled" line.long 0x04 "UFLOW_DBG_PIXEL_0,Window D FIFO Underflow Debug Pixel Register" group.long 0x9C++0x03 line.long 0x00 "SPOOL_UP_0,Spool up time configuration for different windows related logic" hexmask.long.word 0x00 16.--28. 1. " D_SPOOL_UP_DURATION ,Spool up duration" bitfld.long 0x00 1. " D_SPOOL_UP_EDGE ,Spool up edge" "NEGEDGE,POSEDGE" bitfld.long 0x00 0. " D_SPOOL_UP_CTRL ,Spool up control" "MAX,PROGRAMMABLE" group.long 0xA4++0x17 line.long 0x00 "LATENCY_THRESHOLD_0,Latency Threshold Register" bitfld.long 0x00 31. " D_RDY4LATENCY_THRESHOLD_ENABLE ,Enable RDY4LATENCY Threshold" "Disabled,Enabled" bitfld.long 0x00 30. " D_RDY4LATENCY_SPOOLUP_CTRL ,RDY4LATENCY spoolup controller" "Disallow,Allow" hexmask.long.word 0x00 16.--28. 1. " D_RDY4LATENCY_SPOOLUP_DURATION ,RDY4LATENCY spoolup duration" textline " " hexmask.long.word 0x00 0.--15. 1. " D_RDY4LATENCY_THRESHOLD ,RDY4LATENCY threshold" line.long 0x04 "MEMFETCH_DEBUG_STATUS_0,Memfetch Debug Status" bitfld.long 0x04 9. " D_RSP_FIFO_NON_IDLE ,Response FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x04 8. " D_REQ_FIFO_NON_IDLE ,Request FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x04 0. " D_UNDERFLOW_LINE0 ,Underflow of line0" "No underflow,Underflow" line.long 0x08 "MEMFETCH_CONTROL_0,Memfetch Control Register" bitfld.long 0x08 1. " D_MEMFETCH_CLK_GATE_OVERRIDE ,Disable clock-gating of memfetch for a controller (all three windows)" "Disabled,Enabled" bitfld.long 0x08 0. " D_MEMFETCH_RESET ,Reset memfetch for a controller (all three windows)" "Disabled,Enabled" line.long 0x0C "OCCUPANCY_THROTTLE_0,Occupancy Throttle Register" hexmask.long.word 0x0C 16.--31. 1. " D_OCCUPANCY_MAX_THRESHOLD ,Occupancy Max Threshold" bitfld.long 0x0C 0. " D_OCCUPANCY_THROTTLE_MODE , Occupancy Throttle Mode" "Disabled,Enabled" line.long 0x10 "SCRATCH_REGISTER_0_0,Scratch Register 0" line.long 0x14 "SCRATCH_REGISTER_1_0,Scratch Register 1" width 0x0B tree.end tree "T" base ad:0x54200000+0x500 width 25. group.long 0x00++0x03 line.long 0x00 "START_ADDR_0,Window T Start Address" group.long 0x18++0x03 line.long 0x00 "ADDR_H_OFFSET_0,Window T Horizontal address offset" group.long 0x20++0x03 line.long 0x00 "ADDR_V_OFFSET_0,Window T Vertical address offset" group.long 0x28++0x03 line.long 0x00 "UFLOW_STATUS_0,Window T FIFO Underflow Status Register" eventfld.long 0x00 30. " COUNT_OFLOW ,Flag bit that indicates that the underflow event counter has overflowed" "No overflow,Overflow" hexmask.long.tbyte 0x00 0.--23. 1. " UFLOW_COUNT ,Underflow count" group.long 0x34++0x03 line.long 0x00 "START_ADDR_HI_0,Window T Higher 32 bits of Start Address" bitfld.long 0x00 0.--1. " T_START_ADDR_HI ,Window T Start Address" "0,1,2,3" group.long 0x90++0x07 line.long 0x00 "UFLOW_CTRL_0,Window T FIFO Underflow Control Register" bitfld.long 0x00 1. " T_UFLOW_CYA ,T_UFLOW_CYA" "Disabled,Enabled" bitfld.long 0x00 0. " T_UFLOW_CTRL_DBG_MODE ,Underflow debug mode" "Disabled,Enabled" line.long 0x04 "UFLOW_DBG_PIXEL_0,Window T FIFO Underflow Debug Pixel Register" group.long 0x9C++0x03 line.long 0x00 "SPOOL_UP_0,Spool up time configuration for different windows related logic" hexmask.long.word 0x00 16.--28. 1. " T_SPOOL_UP_DURATION ,Spool up duration" bitfld.long 0x00 1. " T_SPOOL_UP_EDGE ,Spool up edge" "NEGEDGE,POSEDGE" bitfld.long 0x00 0. " T_SPOOL_UP_CTRL ,Spool up control" "MAX,PROGRAMMABLE" group.long 0xA4++0x17 line.long 0x00 "LATENCY_THRESHOLD_0,Latency Threshold Register" bitfld.long 0x00 31. " T_RDY4LATENCY_THRESHOLD_ENABLE ,Enable RDY4LATENCY Threshold" "Disabled,Enabled" bitfld.long 0x00 30. " T_RDY4LATENCY_SPOOLUP_CTRL ,RDY4LATENCY spoolup controller" "Disallow,Allow" hexmask.long.word 0x00 16.--28. 1. " T_RDY4LATENCY_SPOOLUP_DURATION ,RDY4LATENCY spoolup duration" textline " " hexmask.long.word 0x00 0.--15. 1. " T_RDY4LATENCY_THRESHOLD ,RDY4LATENCY threshold" line.long 0x04 "MEMFETCH_DEBUG_STATUS_0,Memfetch Debug Status" bitfld.long 0x04 9. " T_RSP_FIFO_NON_IDLE ,Response FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x04 8. " T_REQ_FIFO_NON_IDLE ,Request FIFO idle at end of frame" "Idle,Busy" bitfld.long 0x04 0. " T_UNDERFLOW_LINE0 ,Underflow of line0" "No underflow,Underflow" line.long 0x08 "MEMFETCH_CONTROL_0,Memfetch Control Register" bitfld.long 0x08 1. " T_MEMFETCH_CLK_GATE_OVERRIDE ,Disable clock-gating of memfetch for a controller (all three windows)" "Disabled,Enabled" bitfld.long 0x08 0. " T_MEMFETCH_RESET ,Reset memfetch for a controller (all three windows)" "Disabled,Enabled" line.long 0x0C "OCCUPANCY_THROTTLE_0,Occupancy Throttle Register" hexmask.long.word 0x0C 16.--31. 1. " T_OCCUPANCY_MAX_THRESHOLD ,Occupancy Max Threshold" bitfld.long 0x0C 0. " T_OCCUPANCY_THROTTLE_MODE , Occupancy Throttle Mode" "Disabled,Enabled" line.long 0x10 "SCRATCH_REGISTER_0_0,Scratch Register 0" line.long 0x14 "SCRATCH_REGISTER_1_0,Scratch Register 1" width 0x0B tree.end tree.end tree.end tree "Display Interfaces: MIPI-DSI" base ad:0x54300000 width 22. tree "MIPI-DSI Registers" group.long 0x00++0x0B line.long 0x00 "INCR_SYNCPT_0,DSI_INCR_SYNCPT_0" hexmask.long.byte 0x00 8.--15. 1. " COND ,Condition mapped from raise/wait" hexmask.long.byte 0x00 0.--7. 1. " INDX ,Syncpt index value" line.long 0x04 "INCR_SYNCPT_CNTRL_0,DSI_INCR_SYNCPT_CNTRL_0" bitfld.long 0x04 8. " INCR_SYNCPT_NO_STALL ,The client host interface will be stalled when FIFOs are full" "No full,Full" bitfld.long 0x04 0. " INCR_SYNCPT_SOFT_RESET ,All internal states of the client syncpt block will be reset" "No reset,Reset" line.long 0x08 "INCR_SYNCPT_ERROR_0,DSI_INCR_SYNCPT_ERROR_0" sif (cpuis("TEGRAX2")) group.long 0x20++0x03 line.long 0x00 "CTXSW_NEXT_0,Context Switch Register" hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL ,Next requested channel" hexmask.long.word 0x00 0.--9. 1. " NEXT_CLASS ,Next requested channel" else group.long 0x20++0x03 line.long 0x00 "CTXSW_0,Context Switch Register" rbitfld.long 0x00 28.--31. " NEXT_CHANNEL ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--25. 1. " NEXT_CLASS ,Next requested class" bitfld.long 0x00 12.--15. " CURR_CHANNEL ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 11. " AUTO_ACK ,Automatically acknowledge" "Manual,AutoACK" hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" endif base ad:0x54300000 rgroup.long 0x24++0x03 line.long 0x00 "RD_DATA_0,DSI Read Return Data" group.long 0x28++0x27 line.long 0x00 "WR_DATA_0,Host FIFO Write Input" line.long 0x04 "POWER_CONTROL_0,Display Power Control. DSI Enable" bitfld.long 0x04 0. " LEG_DSI_ENABLE ,DSI interface enable" "Disabled,Enabled" line.long 0x08 "INT_ENABLE_0,Interrupt Enable Register" bitfld.long 0x08 0. " CTXSW_INT_ENABLE ,Context switch interrupt enable" "Disabled,Enabled" line.long 0x0C "INT_STATUS_0,Interrupt Status Register" eventfld.long 0x0C 0. " CTXSW_INT ,Context switch interrupt status" "No interrupt,Interrupt" line.long 0x10 "INT_MASK_0,Interrupt Mask" bitfld.long 0x10 0. " CTXSW_INT_MASK ,Context switch interrupt mask" "Masked,Not masked" line.long 0x14 "HOST_DSI_CONTROL_0,DSI Control Register When Input Is From HOST" bitfld.long 0x14 21. " FIFO_STAT_RESET ,Clear FIFO underflow/overflow flags" "No occurred,Occurred" bitfld.long 0x14 20. " CRC_RESET ,CRC generator reset" "No reset,Reset" bitfld.long 0x14 16.--18. " DSI_PHY_CLK_DIV ,Phy clock divider value for byte clock" "/1,/2,?..." textline " " bitfld.long 0x14 12.--13. " HOST_TX_TRIG_SRC ,Source of the trigger" "SOL,FIFO Level,Immediate,?..." bitfld.long 0x14 8.--9. " DSI_ULTRA_LOW_POWER ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..." bitfld.long 0x14 7. " PERIPH_RESET ,Initiate an escape mode peripheral reset" "Disabled,Enabled" textline " " bitfld.long 0x14 6. " RAW_DATA ,Host raw data mode" "Disabled,Enabled" bitfld.long 0x14 5. " DSI_HIGH_SPEED_TRANS ,DSI high speed transmission of packets" "Low,High" bitfld.long 0x14 4. " PKT_WR_FIFO_SEL ,Host write FIFO select" "Host,Video" textline " " bitfld.long 0x14 3. " IMM_BTA ,Generate BTA immediately" "Disabled,Enabled" bitfld.long 0x14 2. " PKT_BTA ,Generate BTA at the end of host packets" "Disabled,Enabled" bitfld.long 0x14 1. " CS_ENABLE ,Enable hardware check sum for host packets" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " ECC_ENABLE ,Enable hardware error correction code" "Disabled,Enabled" line.long 0x18 "CONTROL_0,General DSI Control Register" bitfld.long 0x18 31. " DSI_DBG_ENABLE ,Turn off clock monitoring when enabled for debug" "Disabled,Enabled" bitfld.long 0x18 30. " DFMT_16BPP_SWAP_EN ,16BPP Swap enabled" "Disabled,Enabled" bitfld.long 0x18 20. " DSI_HS_CLK_CTRL ,Control for the HS clock lane" "Continuous,TX Only" textline " " bitfld.long 0x18 16.--17. " DSI_VIRTUAL_CHANNEL ,Virtual channel ID" "0,1,2,3" bitfld.long 0x18 12.--13. " DSI_DATA_FORMAT ,Pixel data format transmitted" "BIT16P,BIT18NP,BIT18P,BIT24P" bitfld.long 0x18 8.--9. " VID_TX_TRIG_SRC ,Source of the trigger to start sending packets" "SOL,FIFO Level,Immediate,?..." textline " " bitfld.long 0x18 4.--5. " DSI_NUM_DATA_LANES ,Number of D-PHY data lanes" "1,2,3,4" bitfld.long 0x18 3. " VID_DCS_ENABLE ,Enable for insertion of DCS commands" "Disabled,Enabled" bitfld.long 0x18 2. " DSI_VID_SOURCE ,Source of video pixels" "Display 0,Display 1" textline " " bitfld.long 0x18 1. " DSI_VID_ENABLE ,Video DSI interface enable" "Disabled,Enabled" bitfld.long 0x18 0. " DSI_HOST_ENABLE ,Host DSI interface enable" "Disabled,Enabled" line.long 0x1C "SOL_DELAY_0,Number Of Byte-clock Counts To Wait" hexmask.long.word 0x1C 0.--15. 1. " SOL_DELAY ,Start of line before generating output packets" line.long 0x20 "MAX_THRESHOLD_0,Maximum Threshold Registers For DSI Related Packets" hexmask.long.word 0x20 0.--15. 1. " MAX_THRESHOLD ,Start draining FIFO once this threshold is met" line.long 0x24 "TRIGGER_0,Manual Transmissions Trigger Register" sif (cpuis("TEGRAX2")) bitfld.long 0x24 2. " SKEWCAL_TRIGGER ,SKEWCAL trigger" "Not triggered,Triggered" textline " " endif bitfld.long 0x24 1. " DSI_HOST_TRIGGER ,DSI Host trigger" "Not triggered,Triggered" bitfld.long 0x24 0. " DSI_VID_TRIGGER ,DSI VID trigger" "Not triggered,Triggered" rgroup.long 0x50++0x07 line.long 0x00 "TX_CRC_0,Transmission CRC" line.long 0x04 "STATUS_0,DSI Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x04 13. " DSI_CLOCK_LANE_IDLE ,DSI clock lane" "Busy,Idle" bitfld.long 0x04 12. " HRD_FIFO_UNDERFLOW ,Host read data FIFO underflow event occurred" "No underflow,Underflow" bitfld.long 0x04 11. " HRD_FIFO_OVERFLOW ,Host read data FIFO overflow event occurred" "No overflow,overflow" textline " " endif bitfld.long 0x04 10. " DSI_IDLE ,DSI is IDLE" "Busy,Idle" bitfld.long 0x04 9. " LB_UNDERFLOW ,Line buffer underflow event happened" "No underflow,Underflow" bitfld.long 0x04 8. " LB_OVERFLOW ,Line buffer overflow event happened" "No overflow,Overflow" textline " " bitfld.long 0x04 0.--4. " RD_FIFO_COUNT ,Data words left in the host read data return FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpuis("TEGRAX2")) group.long 0x58++0x03 line.long 0x00 "DSI_VID_BTA_CONTROL_0,DSI BTA Operation In Video/DCS Mode Control Register" bitfld.long 0x00 1.--3. " BTA_VID_LINE_TYPE ,Blank Line type on which BTA operation is to be performed in video/DCS mode" "Type 0,Type 1,Type 2,Type 3,Type 4,Type 5,?..." bitfld.long 0x00 0. " BTA_VID_MODE ,Configuration bit to choose if BTA operation has to be done for every frame until disabled (or) only once when triggered" "One time,Continuous" endif tree.end width 20. tree "Initialization Sequence Registers" group.long 0x68++0x03 line.long 0x00 "INIT_SEQ_CONTROL_0,DSI Initialization Sequence Control" sif (cpuis("TEGRAX1")) hexmask.long.byte 0x00 8.--14. 1. " DSI_FRAME_INIT_BYTE_COUNT ,Frame initialization sequence byte count" elif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " DSI_INIT_SEQ_MODE ,Configuration bit to choose if init sequence" "Continuous,Once" hexmask.long.byte 0x00 8.--14. 1. " DSI_FRAME_INIT_BYTE_COUNT ,Frame initialization sequence byte count" textline " " else bitfld.long 0x00 8.--13. " DSI_FRAME_INIT_BYTE_COUNT ,Frame initialization sequence byte count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif bitfld.long 0x00 0. " DSI_SEND_INIT_SEQUENCE ,Send initialization sequence" "Disabled,Enabled" group.long 0x6C++0x03 line.long 0x00 "INIT_SEQ_DATA_0_0,DSI Init Sequence Write Data 0" group.long 0x70++0x03 line.long 0x00 "INIT_SEQ_DATA_1_0,DSI Init Sequence Write Data 1" group.long 0x74++0x03 line.long 0x00 "INIT_SEQ_DATA_2_0,DSI Init Sequence Write Data 2" group.long 0x78++0x03 line.long 0x00 "INIT_SEQ_DATA_3_0,DSI Init Sequence Write Data 3" group.long 0x7C++0x03 line.long 0x00 "INIT_SEQ_DATA_4_0,DSI Init Sequence Write Data 4" group.long 0x80++0x03 line.long 0x00 "INIT_SEQ_DATA_5_0,DSI Init Sequence Write Data 5" group.long 0x84++0x03 line.long 0x00 "INIT_SEQ_DATA_6_0,DSI Init Sequence Write Data 6" group.long 0x88++0x03 line.long 0x00 "INIT_SEQ_DATA_7_0,DSI Init Sequence Write Data 7" tree.end width 16. tree "Packet Sequence Registers" group.long 0x8C++0x07 line.long 0x00 "PKT_SEQ_0_LO_0,DSI Packet Sequence 0 LO Half" bitfld.long 0x00 30. " SEQ_0_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PKT_02_EN ,Packet 2 enable" "Disabled,Enabled" bitfld.long 0x00 23.--28. " PKT_02_ID ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " PKT_02_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19. " PKT_01_EN ,Packet 1 enable" "Disabled,Enabled" bitfld.long 0x00 13.--18. " PKT_01_ID ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 10.--12. " PKT_01_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " PKT_00_EN ,Packet 0 enable" "Disabled,Enabled" bitfld.long 0x00 3.--8. " PKT_00_ID ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " PKT_00_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7" line.long 0x04 "PKT_SEQ_0_HI_0,DSI Packet Sequence 0 HI Half" bitfld.long 0x04 29. " PKT_05_EN ,Packet 5 enable" "Disabled,Enabled" bitfld.long 0x04 23.--28. " PKT_05_ID ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 20.--22. " PKT_05_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 19. " PKT_04_EN ,Packet 4 enable" "Disabled,Enabled" bitfld.long 0x04 13.--18. " PKT_04_ID ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--12. " PKT_04_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 9. " PKT_03_EN ,Packet 3 enable" "Disabled,Enabled" bitfld.long 0x04 3.--8. " PKT_03_ID ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " PKT_03_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7" group.long 0x94++0x07 line.long 0x00 "PKT_SEQ_1_LO_0,DSI Packet Sequence 1 LO Half" bitfld.long 0x00 30. " SEQ_1_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PKT_12_EN ,Packet 2 enable" "Disabled,Enabled" bitfld.long 0x00 23.--28. " PKT_12_ID ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " PKT_12_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19. " PKT_11_EN ,Packet 1 enable" "Disabled,Enabled" bitfld.long 0x00 13.--18. " PKT_11_ID ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 10.--12. " PKT_11_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " PKT_10_EN ,Packet 0 enable" "Disabled,Enabled" bitfld.long 0x00 3.--8. " PKT_10_ID ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " PKT_10_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7" line.long 0x04 "PKT_SEQ_1_HI_0,DSI Packet Sequence 1 HI Half" bitfld.long 0x04 29. " PKT_15_EN ,Packet 5 enable" "Disabled,Enabled" bitfld.long 0x04 23.--28. " PKT_15_ID ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 20.--22. " PKT_15_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 19. " PKT_14_EN ,Packet 4 enable" "Disabled,Enabled" bitfld.long 0x04 13.--18. " PKT_14_ID ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--12. " PKT_14_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 9. " PKT_13_EN ,Packet 3 enable" "Disabled,Enabled" bitfld.long 0x04 3.--8. " PKT_13_ID ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " PKT_13_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7" group.long 0x9C++0x07 line.long 0x00 "PKT_SEQ_2_LO_0,DSI Packet Sequence 2 LO Half" bitfld.long 0x00 30. " SEQ_2_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PKT_22_EN ,Packet 2 enable" "Disabled,Enabled" bitfld.long 0x00 23.--28. " PKT_22_ID ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " PKT_22_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19. " PKT_21_EN ,Packet 1 enable" "Disabled,Enabled" bitfld.long 0x00 13.--18. " PKT_21_ID ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 10.--12. " PKT_21_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " PKT_20_EN ,Packet 0 enable" "Disabled,Enabled" bitfld.long 0x00 3.--8. " PKT_20_ID ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " PKT_20_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7" line.long 0x04 "PKT_SEQ_2_HI_0,DSI Packet Sequence 2 HI Half" bitfld.long 0x04 29. " PKT_25_EN ,Packet 5 enable" "Disabled,Enabled" bitfld.long 0x04 23.--28. " PKT_25_ID ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 20.--22. " PKT_25_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 19. " PKT_24_EN ,Packet 4 enable" "Disabled,Enabled" bitfld.long 0x04 13.--18. " PKT_24_ID ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--12. " PKT_24_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 9. " PKT_23_EN ,Packet 3 enable" "Disabled,Enabled" bitfld.long 0x04 3.--8. " PKT_23_ID ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " PKT_23_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7" group.long 0xA4++0x07 line.long 0x00 "PKT_SEQ_3_LO_0,DSI Packet Sequence 3 LO Half" bitfld.long 0x00 30. " SEQ_3_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PKT_32_EN ,Packet 2 enable" "Disabled,Enabled" bitfld.long 0x00 23.--28. " PKT_32_ID ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " PKT_32_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19. " PKT_31_EN ,Packet 1 enable" "Disabled,Enabled" bitfld.long 0x00 13.--18. " PKT_31_ID ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 10.--12. " PKT_31_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " PKT_30_EN ,Packet 0 enable" "Disabled,Enabled" bitfld.long 0x00 3.--8. " PKT_30_ID ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " PKT_30_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7" line.long 0x04 "PKT_SEQ_3_HI_0,DSI Packet Sequence 3 HI Half" bitfld.long 0x04 29. " PKT_35_EN ,Packet 5 enable" "Disabled,Enabled" bitfld.long 0x04 23.--28. " PKT_35_ID ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 20.--22. " PKT_35_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 19. " PKT_34_EN ,Packet 4 enable" "Disabled,Enabled" bitfld.long 0x04 13.--18. " PKT_34_ID ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--12. " PKT_34_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 9. " PKT_33_EN ,Packet 3 enable" "Disabled,Enabled" bitfld.long 0x04 3.--8. " PKT_33_ID ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " PKT_33_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7" group.long 0xAC++0x07 line.long 0x00 "PKT_SEQ_4_LO_0,DSI Packet Sequence 4 LO Half" bitfld.long 0x00 30. " SEQ_4_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PKT_42_EN ,Packet 2 enable" "Disabled,Enabled" bitfld.long 0x00 23.--28. " PKT_42_ID ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " PKT_42_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19. " PKT_41_EN ,Packet 1 enable" "Disabled,Enabled" bitfld.long 0x00 13.--18. " PKT_41_ID ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 10.--12. " PKT_41_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " PKT_40_EN ,Packet 0 enable" "Disabled,Enabled" bitfld.long 0x00 3.--8. " PKT_40_ID ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " PKT_40_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7" line.long 0x04 "PKT_SEQ_4_HI_0,DSI Packet Sequence 4 HI Half" bitfld.long 0x04 29. " PKT_45_EN ,Packet 5 enable" "Disabled,Enabled" bitfld.long 0x04 23.--28. " PKT_45_ID ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 20.--22. " PKT_45_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 19. " PKT_44_EN ,Packet 4 enable" "Disabled,Enabled" bitfld.long 0x04 13.--18. " PKT_44_ID ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--12. " PKT_44_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 9. " PKT_43_EN ,Packet 3 enable" "Disabled,Enabled" bitfld.long 0x04 3.--8. " PKT_43_ID ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " PKT_43_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7" group.long 0xB4++0x07 line.long 0x00 "PKT_SEQ_5_LO_0,DSI Packet Sequence 5 LO Half" bitfld.long 0x00 30. " SEQ_5_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " PKT_52_EN ,Packet 2 enable" "Disabled,Enabled" bitfld.long 0x00 23.--28. " PKT_52_ID ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 20.--22. " PKT_52_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19. " PKT_51_EN ,Packet 1 enable" "Disabled,Enabled" bitfld.long 0x00 13.--18. " PKT_51_ID ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 10.--12. " PKT_51_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " PKT_50_EN ,Packet 0 enable" "Disabled,Enabled" bitfld.long 0x00 3.--8. " PKT_50_ID ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " PKT_50_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7" line.long 0x04 "PKT_SEQ_5_HI_0,DSI Packet Sequence 5 HI Half" bitfld.long 0x04 29. " PKT_55_EN ,Packet 5 enable" "Disabled,Enabled" bitfld.long 0x04 23.--28. " PKT_55_ID ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 20.--22. " PKT_55_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 19. " PKT_54_EN ,Packet 4 enable" "Disabled,Enabled" bitfld.long 0x04 13.--18. " PKT_54_ID ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 10.--12. " PKT_54_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 9. " PKT_53_EN ,Packet 3 enable" "Disabled,Enabled" bitfld.long 0x04 3.--8. " PKT_53_ID ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--2. " PKT_53_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7" tree.end tree "DCS Command and Packet Length Registers" group.long 0xCC++0x13 line.long 0x00 "DCS_CMDS_0,DCS Command IDs Used For Line Types 3 And 5" hexmask.long.byte 0x00 8.--15. 1. " LT5_DCS_CMD ,DCS command for line type 5" hexmask.long.byte 0x00 0.--7. 1. " LT3_DCS_CMD ,DCS command for line type 3" line.long 0x04 "PKT_LEN_0_1_0,DSI Packet Lengths 0 And 1" hexmask.long.word 0x04 16.--31. 1. " LENGTH_1 ,Packet length 1" hexmask.long.word 0x04 0.--15. 1. " LENGTH_0 ,Packet length 0" line.long 0x08 "PKT_LEN_2_3_0,DSI Packet Lengths 2 And 3" hexmask.long.word 0x08 16.--31. 1. " LENGTH_3 ,Packet length 3" hexmask.long.word 0x08 0.--15. 1. " LENGTH_2 ,Packet length 2" line.long 0x0C "KT_LEN_4_5_0,DSI Packet Lengths 4 And 5" hexmask.long.word 0x0C 16.--31. 1. " LENGTH_5 ,Packet length 5" hexmask.long.word 0x0C 0.--15. 1. " LENGTH_4 ,Packet length 4" line.long 0x10 "PKT_LEN_6_7_0,DSI Packet Lengths 6 And 7" hexmask.long.word 0x10 16.--31. 1. " LENGTH_7 ,Packet length 7" hexmask.long.word 0x10 0.--15. 1. " LENGTH_6 ,Packet length 6" tree.end tree "Physical Interface Timing Registers" group.long 0xF0++0x0F line.long 0x00 "PHY_TIMING_0_0,DSI D-PHY Timing Register 0" hexmask.long.byte 0x00 24.--31. 1. " DSI_THSDEXIT ,Time to drive LP11 after HS" hexmask.long.byte 0x00 16.--23. 1. " DSI_THSTRAIL ,Time to drive HS flipped bit at EOT" hexmask.long.byte 0x00 8.--15. 1. " DSI_TDATZERO ,Time to drive HS0 before SOT" hexmask.long.byte 0x00 0.--7. 1. " DSI_THSPREPR ,Time to drive LP00 before HS data" line.long 0x04 "PHY_TIMING_1_0,DSI D-PHY Timing Register 1" hexmask.long.byte 0x04 24.--31. 1. " DSI_TCLKTRAIL ,Time to drive HS0 before clock goes to LP11" hexmask.long.byte 0x04 16.--23. 1. " DSI_TCLKPOST ,Time to drive clock after the last HS data" hexmask.long.byte 0x04 8.--15. 1. " DSI_TCLKZERO ,Time to drive LP00 before HS clock" hexmask.long.byte 0x04 0.--7. 1. " DSI_TTLPX ,LP period" line.long 0x08 "PHY_TIMING_2_0,DSI D-PHY Timing Register 2" hexmask.long.byte 0x08 16.--23. 1. " DSI_TCLKPREPARE ,Time to drive LP0 before CLK_ZERO starts off on clock lane" hexmask.long.byte 0x08 8.--15. 1. " DSI_TCLKPRE ,Time to run clock before enabling data lane" hexmask.long.byte 0x08 0.--7. 1. " DSI_TWAKEUP ,LP period" line.long 0x0C "BTA_TIMING_0,DSI D-PHY Bus-Turn-Around Timing" sif (CPUIS("TEGRAX1")) hexmask.long.byte 0x0C 24.--31. 1. " DSI_TPKTBTA ,Time delay between end of host packet transmission and generation of PKT BTA" textline " " endif hexmask.long.byte 0x0C 16.--23. 1. " DSI_TTAGET ,Time to drive LP00 at end of BTA" hexmask.long.byte 0x0C 8.--15. 1. " DSI_TTASURE ,Time to receive LP00 at end of BTA" hexmask.long.byte 0x0C 0.--7. 1. " DSI_TTAGO ,Time to drive LP00 at start of BTA" tree.end tree "Contention Recovery Timers" group.long 0x110++0x03 line.long 0x00 "TIMEOUT_0_0,DSI Time Out Terminal Count Register 0" hexmask.long.word 0x00 16.--31. 1. " LRXH_TO ,Low power receive time out terminal count" hexmask.long.word 0x00 0.--15. 1. " HTX_TO ,High speed transmit time out terminal count" group.long 0x114++0x03 line.long 0x00 "TIMEOUT_1_0,DSI Time Out Terminal Count Register 1" hexmask.long.word 0x00 16.--31. 1. " PR_TO ,Peripheral reset duration" hexmask.long.word 0x00 0.--15. 1. " TA_TO ,Turn around time out terminal count" group.long 0x118++0x03 line.long 0x00 "TO_TALLY_0,DSI Time Out Tally Register" rbitfld.long 0x00 24. " P_RESET_STATUS ,Peripheral reset time out status" "In reset,Ready" hexmask.long.byte 0x00 16.--23. 1. " TA_TALLY ,Turn around time out tally" hexmask.long.byte 0x00 8.--15. 1. " LRXH_TALLY ,LP Rx time out tally" hexmask.long.byte 0x00 0.--7. 1. " HTX_TALLY ,HS Tx time out tally" tree.end width 23. tree "Physical Pad Control Registers" group.long 0x12C++0x07 line.long 0x00 "PAD_CONTROL_0,DSI PHY Configuration Register" bitfld.long 0x00 24. " DSI_PAD_PULLDN_CLK_ENAB ,Enable pad pulldown for clock bit at power on" "Disabled,Enabled" bitfld.long 0x00 16.--19. " DSI_PAD_PULLDN_ENAB ,Pad pulldown on power on" "Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled" bitfld.long 0x00 8. " DSI_PAD_PDIO_CLK ,Power down for clock bit, drivers, receivers and contention detectors" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " DSI_PAD_PDIO ,Power down for data bit,drivers,receivers and contention detectors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "PAD_CONTROL_CD_0,Contention Detection Logic Enable Signals" bitfld.long 0x04 16.--18. " DSI_PAD_CDDNADJ ,Level adjust on low limit of detection" "0.3V,0.375V,0.45V,0.525V,0.3V,0.225V,0.15V,0.075V" bitfld.long 0x04 8. " DSI_PAD_CD_EN_CLK ,Clock bit contention detector enable" "Disabled,Enabled" bitfld.long 0x04 0.--3. " DSI_PAD_CD_EN ,Data bits contention detector enable" "Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled" rgroup.long 0x134++0x03 line.long 0x00 "PAD_CD_STATUS_0,Contention Detection Status From MIPI PAD" bitfld.long 0x00 18. " DSI_PAD_CDN_CLK ,DSI PAD CDN CLK" "0,1" bitfld.long 0x00 16. " DSI_PAD_CDP_CLK ,DSI PAD CDP CLK" "0,1" bitfld.long 0x00 8.--11. " DSI_PAD_CDN ,DSI PAD CDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " DSI_PAD_CDP ,DSI PAD CDP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x138++0x17 line.long 0x00 "VID_MODE_CONTROL_0,Host Command Packet During Video Mode" bitfld.long 0x00 1.--3. " DSI_LINE_TYPE ,LINE TYPE on which host command packet to be transmitted" "Line type 0,Line type 1,Line type 2,,Line type 4,?..." bitfld.long 0x00 0. " DSI_CMD_PKT_VID_ENABLE ,Host command packet during video mode" "Disabled,Enabled" line.long 0x04 "PAD_CONTROL_1_0,DSI PHY Configuration Register 1" bitfld.long 0x04 12.--14. " DSI_PAD_OUTADJ3 ,Input delay trimmer for data bit 3" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps" bitfld.long 0x04 8.--10. " DSI_PAD_OUTADJ2 ,Input delay trimmer for data bit 2" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps" bitfld.long 0x04 4.--6. " DSI_PAD_OUTADJ1 ,Input delay trimmer for data bit 1" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps" textline " " bitfld.long 0x04 0.--2. " DSI_PAD_OUTADJ0 ,Input delay trimmer for data bit 0" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps" line.long 0x08 "PAD_CONTROL_2_0,DSI PHY Configuration Register 2" bitfld.long 0x08 16.--18. " DSI_PAD_SLEWUPADJ ,Pull-up slew rate adjust" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " DSI_PAD_SLEWDNADJ ,Pull-down slew rate adjust" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " DSI_PAD_LPUPADJ ,Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,?..." textline " " bitfld.long 0x08 4.--6. " DSI_PAD_LPDNADJ ,Input delay trimmer for data bit 0" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x08 0.--2. " DSI_PAD_OUTADJCLK ,Output trimmer delay for clock bit" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps" line.long 0x0C "PAD_CONTROL_3_0,DSI PHY Configuration Register 3" bitfld.long 0x0C 28. " DSI_PAD_PDVCLAMP ,Power down regulator" "Power Up,Power down" bitfld.long 0x0C 16. " DSI_PAD_BANDWD_IN ,Increase bandwidth of differential receiver" "Disabled,Enabled" bitfld.long 0x0C 12.--13. " DSI_PAD_PREEMP_PD_CLK ,Clock bit HS driver pull down pre-emphasis" "No preemphasis,,,Maximum" textline " " bitfld.long 0x0C 8.--9. " DSI_PAD_PREEMP_PU_CLK ,Clock bit HS driver pull up pre-emphasis" "No preemphasis,,,Maximum" bitfld.long 0x0C 4.--5. " DSI_PAD_PREEMP_PD ,Clock bit HS driver pull down pre-emphasis" "No preemphasis,,,Maximum" bitfld.long 0x0C 0.--1. " DSI_PAD_PREEMP_PU ,Clock bit HS driver pull up pre-emphasis" "No preemphasis,,,Maximum" line.long 0x10 "PAD_CONTROL_4_0,DSI PHY Configuration Register 4" bitfld.long 0x10 28. " DSI_PAD_HS_BSO_CLK ,Enables BIAS and power regulators on for HS mode" "Disabled,Enabled" bitfld.long 0x10 20.--23. " DSI_PAD_HS_BSO ,Enables BIAS and power regulators on for HS mode" "Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled" bitfld.long 0x10 16. " DSI_PAD_LP_BSO_CLK ,Enables BIAS and power regulators on for LP mode" "Disabled,Enabled" textline " " bitfld.long 0x10 8.--11. " DSI_PAD_LP_BSO ,Enables BIAS and power regulators on for LP mode" "Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled" bitfld.long 0x10 4. " DSI_PAD_TXBW_EN ,Increase bandwidth of output driver" "Disabled,Enabled" bitfld.long 0x10 0. " DSI_PAD_REV_CLK ,Reverse clock polarity" "Not reversed,Reversed" line.long 0x14 "GANGED_MODE_CONTROL_0,Mode Control Register 0" sif (cpuis("TEGRAX1")) bitfld.long 0x14 1.--2. " DUMMY_PIX_LEFT_RIGHT_SIDE ,Dummy pixels side" "Normal,Left,Right,?..." textline " " endif bitfld.long 0x14 0. " DSI_GANGED_MODE_EN ,Ganged mode transaction enabled" "Disabled,Enabled" textline " " width 27. group.long 0x150++0x0F line.long 0x00 "GANGED_MODE_START_0,Mode Start Register 0" hexmask.long.word 0x00 0.--12. 1. " DSI_GANGED_START_POINTER ,Start pointer for indicating the start of partial active valid pixel data" line.long 0x04 "GANGED_MODE_SIZE_0,Mode Size Register 0" hexmask.long.word 0x04 16.--28. 1. " DSI_GANGED_VALID_LOW_WIDTH ,Width of partial inactive/ignored pixel data from the valid pixels" hexmask.long.word 0x04 0.--12. 1. " DSI_GANGED_VALID_HIGH_WIDTH ,Width of partial active valid pixel data latched from the valid pixels" line.long 0x08 "RAW_DATA_BYTE_COUNT_0,Raw Data Counter Register 0" hexmask.long.word 0x08 0.--15. 1. " DSI_RAW_DATA_BYTE_COUNT ,Host RAW DATA byte count specifies the total number of bytes to send" line.long 0x0C "ULTRA_LOW_POWER_CONTROL_0,Ultra Low Power Sequence Control Register 0" bitfld.long 0x0C 8.--9. " DSI_ULTRA_LOW_POWER_DATA_LANE3 ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..." bitfld.long 0x0C 6.--7. " DSI_ULTRA_LOW_POWER_DATA_LANE2 ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..." bitfld.long 0x0C 4.--5. " DSI_ULTRA_LOW_POWER_DATA_LANE1 ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..." textline " " bitfld.long 0x0C 2.--3. " DSI_ULTRA_LOW_POWER_DATA_LANE0 ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..." bitfld.long 0x0C 0.--1. " DSI_ULTRA_LOW_POWER_CLK_LANE ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..." textline " " group.long 0x160++0x03 line.long 0x00 "INIT_SEQ_DATA_8_0,DSI Init Sequence Write Data 8" group.long 0x164++0x03 line.long 0x00 "INIT_SEQ_DATA_9_0,DSI Init Sequence Write Data 9" group.long 0x168++0x03 line.long 0x00 "INIT_SEQ_DATA_10_0,DSI Init Sequence Write Data 10" group.long 0x16C++0x03 line.long 0x00 "INIT_SEQ_DATA_11_0,DSI Init Sequence Write Data 11" group.long 0x170++0x03 line.long 0x00 "INIT_SEQ_DATA_12_0,DSI Init Sequence Write Data 12" group.long 0x174++0x03 line.long 0x00 "INIT_SEQ_DATA_13_0,DSI Init Sequence Write Data 13" group.long 0x178++0x03 line.long 0x00 "INIT_SEQ_DATA_14_0,DSI Init Sequence Write Data 14" group.long 0x17C++0x03 line.long 0x00 "INIT_SEQ_DATA_15_0,DSI Init Sequence Write Data 15" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " group.long 0x180++0x07 line.long 0x00 "DUMMY_PIX_CNT_0,Dummy Pixel Count Register" hexmask.long.byte 0x00 16.--23. 1. " RIGHT_DUMMY_PIX_CNT ,Number of dummy pixels padded to the right of active pixel stream" hexmask.long.byte 0x00 0.--7. 1. " LEFT_DUMMY_PIX_CNT ,Number of dummy pixels padded to the left of active pixel stream" line.long 0x04 "DSI_DSC_CONTROL_0,Display Stream Compression Control Register" bitfld.long 0x04 16.--17. " NUM_COMPRESS_PKTS_PER_ROW ,Number of compressed image packets per row between two sync events" "1,2,,4" hexmask.long.word 0x04 2.--11. 1. " COMPRESS_RATE ,Compression bit rate" bitfld.long 0x04 0. " COMPRESS_MODE_EN ,Compressed bit stream transport mode enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0x18C++0x0B line.long 0x00 "DSI_LANE_XBAR_CTRL_0,DSI Lane Control Register" bitfld.long 0x00 17.--18. " DATA_LANE3_XSEL ,Lane3 selection" "Lane 0,Lane 1,Lane 2,Lane 3" bitfld.long 0x00 14.--15. " DATA_LANE2_XSEL ,Lane2 selection" "Lane 0,Lane 1,Lane 2,Lane 3" bitfld.long 0x00 11.--12. " DATA_LANE1_XSEL ,Lane1 selection" "Lane 0,Lane 1,Lane 2,Lane 3" textline " " bitfld.long 0x00 8.--9. " DATA_LANE0_XSEL ,Lane0 selection" "Lane 0,Lane 1,Lane 2,Lane 3" bitfld.long 0x00 4. " DATA_LANE3_POLARITY ,Swaps P/N pins polarity of data lane-3" "Normal,Reversed" textline " " bitfld.long 0x00 3. " DATA_LANE2_POLARITY ,Swaps P/N pins polarity of data lane-2" "Normal,Reversed" textline " " bitfld.long 0x00 2. " DATA_LANE1_POLARITY ,Swaps P/N pins polarity of data lane-1" "Normal,Reversed" bitfld.long 0x00 1. " DATA_LANE0_POLARITY ,Swaps P/N pins polarity of data lane-0" "Normal,Reversed" bitfld.long 0x00 0. " CLOCK_LANE_POLARITY ,Swaps P/N pins polarity of clock lane" "Normal,Reversed" line.long 0x04 "DSI_SKEWCAL_CTRL_0,DSI Deskew Calibration Control Register" bitfld.long 0x04 6. " SKEWCAL_SYNCPT_ENABLE ,Syncpt Enable for Skew calibration operation" "Disabled,Enabled" bitfld.long 0x04 5. " SKEWCAL_CRC_ENABLE ,CRC Enable for Skew calibrating data pattern too along with other DSI packets" "Disabled,Enabled" bitfld.long 0x04 2.--4. " SKEWCAL_LINE_TYPE ,Line type selection for Skew calibration" "Line 0,Line 1,Line 2,,Line 4,?..." textline " " bitfld.long 0x04 1. " SKEWCAL_MODE ,Skew Calibration Mode" "Non-continuous,Continuous" bitfld.long 0x04 0. " SKEWCAL_ENABLE ,Skew calibration enable" "Disabled,Enabled" line.long 0x08 "DSI_SKEWCAL_TIMING_0,DSI Deskew Calibration Duration Register" hexmask.long.tbyte 0x08 0.--23. 1. " SKEWCAL_TIME ,Time that DSI drives the skew calibration data pattern" endif endif tree.end width 0x0B tree.end tree "HDMI Display Port" tree "SOR0" base ad:0x54540000 width 51. sif (!cpuis("TEGRAX2")) group.long 0x00++0x03 line.long 0x00 "CTXSW_0,Context Switch Register" rbitfld.long 0x00 28.--31. " NEXT_CHANNEL ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--25. 1. " NEXT_CLASS ,Next requested class" textline " " bitfld.long 0x00 12.--15. " CURR_CHANNEL ,Current working channel reset to invalid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " AUTO_ACK ,Automatically acknowledge any incoming context switch requests" "Manual,Autoack" textline " " hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" endif group.long 0x04++0x0F line.long 0x00 "NV_PDISP_SOR_SUPER_STATE0_0,State Supervisor" bitfld.long 0x00 0. " UPDATE ,Update" "Not updated,Updated" line.long 0x04 "NV_PDISP_SOR_SUPER_STATE1_0,Triple Buffered Register" bitfld.long 0x04 3. " ATTACHED ,Attached SOR to display head" "No,Yes" bitfld.long 0x04 2. " ASY_ORMODE ,SOR sending active data" "Safe,Normal" textline " " bitfld.long 0x04 0.--1. " ASY_HEAD_OPMODE ,Display sending active pixels to SOR" "Sleep,Snooze,Awake,?..." line.long 0x08 "NV_PDISP_SOR_STATE0_0,NV PDISP SOR STATE0" bitfld.long 0x08 0. " UPDATE ,Update" "Not updated,Updated" line.long 0x0C "NV_PDISP_SOR_STATE1_0,SOR Control Register" sif (cpuis("TEGRAX2")) bitfld.long 0x0C 17.--20. " ASY_PIXELDEPTH ,The pixel depth" "DEFAULTVAL,BPP_16_422,BPP_18_4444,,,BPP_24_444,BPP_30_444,,BPP_36_444,?..." textline " " else bitfld.long 0x0C 17.--20. " ASY_PIXELDEPTH ,The pixel depth" "DEFAULTVAL,,BPP_18_4444,,,BPP_24_444,?..." textline " " endif bitfld.long 0x0C 15.--16. " ASY_REPLICATE ,HDMI pixel replication enable/disable" "Off,x2,x4,?..." textline " " bitfld.long 0x0C 14. " ASY_DEPOL ,ASY DEPOL" "Positive,Negative" bitfld.long 0x0C 13. " ASY_VSYNCPOL ,ASY VSYNCPOL" "Positive,Negative" textline " " bitfld.long 0x0C 12. " ASY_HSYNCPOL ,ASY HSYNCPOL" "Positive,Negative" bitfld.long 0x0C 8.--11. " ASY_PROTOCOL ,ASY protocol" "LVDS custom,Single TMDS A,Single TMDS B,,,,,,DP A,DP B,,,,,,Custom" textline " " bitfld.long 0x0C 6.--7. " ASY_CRCMODE ,ASY CRCMODE" "Active raster,Complete raster,Non active raster,?..." bitfld.long 0x0C 4.--5. " ASY_SUBOWNER ,ASY SUBOWNER" "None,SUBHEAD0,SUBHEAD1,Both" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x0C 0.--3. " ASY_OWNER ,SOR display pipe control" "None,HEAD0,HEAD1,HEAD2,?..." else bitfld.long 0x0C 0.--3. " ASY_OWNER ,SOR display pipe control" "None,HEAD0,HEAD1,?..." endif sif (!cpuis("TEGRAX2")) group.long 0x14++0x2F line.long 0x00 "NV_PDISP_HEAD_STATE0_0,Head Control 0 Register 0" bitfld.long 0x00 4.--5. " INTERLACED ,Interlaced" "Progressive,Interlaced,?..." bitfld.long 0x00 3. " RANGECOMPRESS ,Compresses the range of an RGB signal" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DYNRANGE ,Dynamic range for the output" "VESA,CEA" bitfld.long 0x00 0.--1. " COLORSPACE ,Colorspace" "RGB,YUV_601,YUV_709,?..." line.long 0x04 "NV_PDISP_HEAD_STATE0_1,Head Control 0 Register 1" bitfld.long 0x04 4.--5. " INTERLACED ,INTERLACED" "Progressive,Interlaced,?..." bitfld.long 0x04 3. " RANGECOMPRESS ,Compresses the range of an RGB signal" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " DYNRANGE ,Dynamic range for the output" "VESA,CEA" bitfld.long 0x04 0.--1. " COLORSPACE ,Colorspace" "RGB,YUV_601,YUV_709,?..." line.long 0x08 "NV_PDISP_HEAD_STATE1_0,Head Control 1 Register 0" hexmask.long.word 0x08 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x08 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" line.long 0x0C "NV_PDISP_HEAD_STATE1_1,Head Control 1 Register 1" hexmask.long.word 0x0C 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x0C 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" line.long 0x10 "NV_PDISP_HEAD_STATE2_0,Head Control 2 Register 0" hexmask.long.word 0x10 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x10 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" line.long 0x14 "NV_PDISP_HEAD_STATE2_1,Head Control 2 Register 1" hexmask.long.word 0x14 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x14 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" line.long 0x18 "NV_PDISP_HEAD_STATE3_0,Head Control 3 Register 0" hexmask.long.word 0x18 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x18 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" line.long 0x1C "NV_PDISP_HEAD_STATE3_1,Head Control 3 Register 1" hexmask.long.word 0x1C 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x1C 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" line.long 0x20 "NV_PDISP_HEAD_STATE4_0,Head Control 4 Register 0" hexmask.long.word 0x20 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x20 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" line.long 0x24 "NV_PDISP_HEAD_STATE4_1,Head Control 4 Register 1" hexmask.long.word 0x24 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x24 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" line.long 0x28 "NV_PDISP_HEAD_STATE5_0,Head Control 5 Register 0" hexmask.long.word 0x28 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x28 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" line.long 0x2C "NV_PDISP_HEAD_STATE5_1,Head Control 5 Register 1" hexmask.long.word 0x2C 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x2C 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" endif group.long 0x44++0x03 line.long 0x00 "NV_PDISP_SOR_CRC_CNTRL_0,CRC Control" bitfld.long 0x00 0. " ARM_CRC_ENABLE ,Arm CRC enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) rgroup.long 0x48++0x03 line.long 0x00 "NV_PDISP_SOR_DP_DEBUG_MVID_0,NV_PDISP_SOR_DP_DEBUG_MVID_0" bitfld.long 0x00 23. " ARM_CRC_ENABLE[23] ,ARM CRC enable 23" "Disabled,Enabled" bitfld.long 0x00 22. " ARM_CRC_ENABLE[22] ,ARM CRC enable 22" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ARM_CRC_ENABLE[21] ,ARM CRC enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " ARM_CRC_ENABLE[20] ,ARM CRC enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ARM_CRC_ENABLE[19] ,ARM CRC enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " ARM_CRC_ENABLE[18] ,ARM CRC enable 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " ARM_CRC_ENABLE[17] ,ARM CRC enable 17" "Disabled,Enabled" bitfld.long 0x00 16. " ARM_CRC_ENABLE[16] ,ARM CRC enable 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ARM_CRC_ENABLE[15] ,ARM CRC enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " ARM_CRC_ENABLE[14] ,ARM CRC enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ARM_CRC_ENABLE[13] ,ARM CRC enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " ARM_CRC_ENABLE[12] ,ARM CRC enable 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ARM_CRC_ENABLE[11] ,ARM CRC enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " ARM_CRC_ENABLE[10] ,ARM CRC enable 10" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " ARM_CRC_ENABLE[9] ,ARM CRC enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " ARM_CRC_ENABLE[8] ,ARM CRC enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ARM_CRC_ENABLE[7] ,ARM CRC enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " ARM_CRC_ENABLE[6] ,ARM CRC enable 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ARM_CRC_ENABLE[5] ,ARM CRC enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " ARM_CRC_ENABLE[4] ,ARM CRC enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ARM_CRC_ENABLE[3] ,ARM CRC enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " ARM_CRC_ENABLE[2] ,ARM CRC enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARM_CRC_ENABLE[1] ,ARM CRC enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " ARM_CRC_ENABLE[0] ,ARM CRC enable 0" "Disabled,Enabled" endif group.long 0x4C++0x03 line.long 0x00 "NV_PDISP_SOR_CLK_CNTRL_0,NV PDISP SOR Clock CNTRL 0" sif (cpuis("TEGRAX2")) bitfld.long 0x00 2.--6. " DP_LINK_SPEED ,Selects the multiplier used by the analog macro PLL" ",,,,,,G1_62,LVDS,G2_16,G2_43,G2_7,,G3_24,,,,G4_32,,,,G5_4,,,,,,,,,,G8_1,?..." else bitfld.long 0x00 2.--6. " DP_LINK_SPEED ,Selects the multiplier used by the analog macro PLL" ",,,,,,G1_62,LVDS,G2_16,G2_43,G2_7,,G3_24,,,,G4_32,,,,G5_4,,,,,,,,,G8_1,?..." endif bitfld.long 0x00 0.--1. " DP_CLK_SEL ,Selects which clock is used for the internal logic" "Single PCLK,DIFF PCLK,Single DPCLK,DIFF DPCLK" rgroup.long 0x50++0x03 line.long 0x00 "NV_PDISP_SOR_CAP_0,Serial Output Resource" bitfld.long 0x00 31. " LVDS_ONLY ,LVDS only" "False,True" bitfld.long 0x00 25. " DP_B ,DP B" "False,True" textline " " bitfld.long 0x00 24. " DP_A ,DP A" "False,True" bitfld.long 0x00 20. " DDI ,DDI" "False,True" textline " " bitfld.long 0x00 16. " SDI ,SDI" "False,True" bitfld.long 0x00 13. " DISPLAY_OVER_PCIE ,Display over PCIE" "False,True" textline " " bitfld.long 0x00 12. " SINGLE_TMDS_225_MHZ ,Single TMDS 225 MHZ" "False,True" bitfld.long 0x00 11. " DUAL_TMDS ,Dual TMDS" "False,True" textline " " bitfld.long 0x00 10. " DUAL_SINGLE_TMDS ,Dual single TMDS" "False,True" bitfld.long 0x00 9. " SINGLE_TMDS_B ,Single TMDS B" "False,True" textline " " bitfld.long 0x00 8. " SINGLE_TMDS_A ,Single TMDS A" "False,True" bitfld.long 0x00 3. " DUAL_LVDS_24 ,Dual LVDS 24" "False,True" textline " " bitfld.long 0x00 2. " DUAL_LVDS_18 ,Dual LVDS 18" "False,True" bitfld.long 0x00 1. " SINGLE_LVDS 24 ,Single LVDS 24" "False,True" textline " " bitfld.long 0x00 0. " SINGLE_LVDS_18 ,Single LVDS 18" "False,True" group.long 0x54++0x03 line.long 0x00 "NV_PDISP_SOR_PWR_0,Power State Of The SOR" eventfld.long 0x00 31. " SETTING_NEW ,New setting of power mode to take effect" "Done,Pending" rbitfld.long 0x00 28. " MODE ,Currently active state" "Normal,Safe" textline " " rbitfld.long 0x00 24. " HALT_DELAY ,Halt delay" "Done,Active" bitfld.long 0x00 17. " SAFE_START ,Safe start" "Normal,Alt" textline " " bitfld.long 0x00 16. " SAFE_STATE ,Safe operating state" "PD,PU" bitfld.long 0x00 1. " NORMAL_START ,Normal start" "Normal,Alt" textline " " bitfld.long 0x00 0. " NORMAL_STATE ,Sets the normal operating state" "PD,PU" sif (!cpuis("TEGRAX2")) group.long 0x5C++0x0F line.long 0x00 "NV_PDISP_SOR_PLL0_0,NV PDISP_SOR_PLL0_0" bitfld.long 0x00 24.--27. " ICHPMP ,Additions to the charge pump current" "0,0.375 uA,0.75 uA,1.125 uA,1.5 uA,1.875 uA,2.25 uA,2.625 uA,3 uA,3.375 uA,3.75 uA,4.125 uA,4.5 uA,4.875 uA,5.25 uA,5.625 uA" textline " " bitfld.long 0x00 19. " FILTER[3] ,Controls this VCO startup bit for the TMDS_DUAL macro" "Normal operation,Forced VCO" bitfld.long 0x00 16.--18. " FILTER[2:0] ,Select the loop filter and adjust the filter resistor value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--13. " TXREG_LEVEL ,TXREG level" "V25,V15,V35,V45" bitfld.long 0x00 8.--11. " VCOCAP ,Selects the VCO capacitor and adjusts ring oscillator inter-stage load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6.--7. " PLLREG_LEVEL ,PLLREG level" "V25,V15,V35,V45" bitfld.long 0x00 5. " PULLDOWN ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " VCOPD ,VCOPD" "Rescind,Assert" bitfld.long 0x00 0. " PWR ,Power" "On,Off" line.long 0x04 "NV_PDISP_SOR_PLL1_0,Configure The Main SOR PLL1" bitfld.long 0x04 29. " COHERENTMODE ,Coherent mode" "Disabled,Enabled" bitfld.long 0x04 20.--23. " LOADADJ ,Load pulse position adjust" "Center,?..." textline " " rbitfld.long 0x04 15. " TERM_COMPOUT ,Termination calibration status" "Low,High" bitfld.long 0x04 9.--12. " TMDS_TERMADJ ,Termination resistance control" "Lowest,1,2,3,4,5,6,7,OHM500,9,10,11,12,13,14,Highest" textline " " bitfld.long 0x04 8. " TMDS_TERM ,Termination enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " IOCURRENT ,Used for I/O control" "RST,?..." line.long 0x08 "NV_PDISP_SOR_PLL2_0,Configure The Main SOR PLL2" bitfld.long 0x08 28.--31. " PLL_MDIV ,PLL M divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 26.--27. " CLKGEN_MODE ,CLKGEN mode" ",DP TMDS,HBR3,MPHY" textline " " bitfld.long 0x08 25. " AUX9 ,AUX9 - LVDSEN" "Allow,Override" bitfld.long 0x08 24. " AUX8 ,AUX8 - sequencer PLLCAPPD enforce" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " AUX7 ,AUX7 - port powerdown" "Disabled,Enabled" bitfld.long 0x08 22. " AUX6 ,AUX6 - bandgap powerdown" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " AUX5 ,AUX5 - link LVDS" "Single,Dual" bitfld.long 0x08 20. " AUX4 ,AUX4 - duplicate control" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " AUX3 ,AUX3 - rotate" "Disabled,Enabled" bitfld.long 0x08 18. " AUX2 ,AUX2 - powerdown" "Override,Allow" textline " " bitfld.long 0x08 17. " AUX1 ,AUX1 - sequencer PLLCAPPD" "Allow,Override" bitfld.long 0x08 16. " AUX0 ,AUX0 - sequencer PLL pulldown" "Allow,Override" textline " " hexmask.long.byte 0x08 8.--15. 1. " PLL_NDIV ,PLL NDIV" bitfld.long 0x08 4.--7. " PLL_PDIV ,PLL P divider" "BY 1,BY 2,BY 4,BY 8,BY 16,?..." textline " " bitfld.long 0x08 2.--3. " PLL_PDIV_MODE ,PLL PDIV mode" "LVDS mode,TMDS DP mode,EDP RATE3 mode,?..." bitfld.long 0x08 1. " DIV_RATIO_OVERRIDE ,DIV ratio override" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " DCIR_PLL_RESET ,DCIR PLL reset" "Override,Allow" line.long 0x0C "NV_PDISP_SOR_PLL3_0,Directly Controls The SOR Analog Macro" bitfld.long 0x0C 28.--31. " BG_TEMP_COEF ,Bandgap temperature coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. " BG_VREF_LEVEL ,Bandgap output voltages" "0.588 V,0.602 V,0.616 V,0.63 V,0.644 V,0.658 V,0.672 V,0.686 V,0.7 V,0.714 V,0.728 V,0.742 V,0.756 V,0.77 V,0.784 V,0.798 V" textline " " hexmask.long.byte 0x0C 16.--23. 1. " TEST_REFCLK_EN ,Test REFCLK EN" bitfld.long 0x0C 14. " PLL_BYPASS ,PLL bypass" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " PLLVDD_MODE ,Field to determine the PLL voltage" "1.8 V,3.3 V" bitfld.long 0x0C 12. " CLKDIST_MODE ,Clock distribution by CMOS/CML buffers" "CMOS,CML" textline " " bitfld.long 0x0C 8.--11. " AVDD10_LEVEL ,Internal regulated 1.0v voltage level control bits" ",,,0.95 V,1.00 V,1.05 V,1.10 V,?..." bitfld.long 0x0C 4.--7. " AVDD14_LEVEL ,Internal regulated 1.4v voltage level control bits" ",,,1.35 V,1.40 V,1.45 V,1.50 V,?..." textline " " bitfld.long 0x0C 0.--1. " KICKSTART ,Short loop-filter [%] of AVDD14" "Disabled,Loop 40,Loop 50,Loop 60" endif group.long 0x6C++0x03 line.long 0x00 "NV_PDISP_SOR_CSTM_0,Select A Number Of Operating Modes For The SOR" bitfld.long 0x00 28.--30. " ROTDAT ,Right rotated color channel" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--27. " ROTCLK ,Number of sclk cycles which the output clock " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 21. " PLLDIV ,Controls the internal clock dividers of the TMDS_MACRO" ",By 10" bitfld.long 0x00 19. " BALANCED ,Balanced" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " NEW_MODE ,None of the control bits of the second link for dual-link mode" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " LVDS_EN ,Output driver configuration for encoding of the data and output common mode control" "TMDS,?..." bitfld.long 0x00 15. " LINKACTB ,Enables digital logic of links B" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " LINKACTA ,Enables digital logic of links A" "Disabled,Enabled" bitfld.long 0x00 12.--13. " MODE ,Controls the digital output encoding applied to the data stream in custom mode" ",TMDS,?..." textline " " bitfld.long 0x00 11. " UPPER ,LVDS bank A is the upper" "False,True" bitfld.long 0x00 9. " PD_TXCB ,Power down the clock pin of link B" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " PD_TXCA ,Power down the clock pin of link A" "Enabled,Disabled" bitfld.long 0x00 7. " PD_TXDB_3 ,Bitwise control to power down the data pin 3 of link B" "Enabled,Disabled" textline " " bitfld.long 0x00 6. " PD_TXDB_2 ,Bitwise control to power down the data pin 2 of link B" "Enabled,Disabled" bitfld.long 0x00 5. " PD_TXDB_1 ,Bitwise control to power down the data pin 1 of link B" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " PD_TXDB_0 ,Bitwise control to power down the data pin 0 of link B" "Enabled,Disabled" bitfld.long 0x00 3. " PD_TXDA_3 ,Bitwise control to power down the data pin 3 of link A" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PD_TXDA_2 ,Bitwise control to power down the data pin 2 of link A" "Enabled,Disabled" bitfld.long 0x00 1. " PD_TXDA_1 ,Bitwise control to power down the data pin 1 of link A" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " PD_TXDA_0 ,Bitwise control to power down the data pin 0 of link A" "Enabled,Disabled" group.long 0x7C++0x0B line.long 0x00 "NV_PDISP_SOR_BLANK_0,Override The SOR Output Resource Pixels With Blank Data" rbitfld.long 0x00 2. " STATUS ,Output resource is sending blank pixels forced by the OVERRIDE bit" "Not blanked,Blanked" bitfld.long 0x00 1. " TRANSITION ,Controls the timing of the output resource blank override" "Immediate,Next VSYNC" textline " " bitfld.long 0x00 0. " OVERRIDE ,Override" "False,True" line.long 0x04 "NV_PDISP_SOR_SEQ_CTL_0,Sequencer Control Register For SOR" bitfld.long 0x04 30. " SWITCH ,Switch" "Wait,Force" rbitfld.long 0x04 28. " STATUS ,Sequencer stopped/running" "Stopped,Running" textline " " rbitfld.long 0x04 16.--19. " PC ,The current value of the program counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " PD_PC_ALT ,The alternate entry point into the power down program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " PD_PC ,The program counter for the start of the power down program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " PU_PC_ALT ,The alternate entry point into the power up program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x04 0.--3. " PU_PC ,The program counter for the start of the power up program sequence" "0,?..." line.long 0x08 "NV_PDISP_SOR_LANE_SEQ_CTL_0,Sequencer Control Register For SOR Lane" bitfld.long 0x08 31. " SETTING_NEW ,Run sequencer outside of the normal SOR sequencer operation" "Done,Pending" rbitfld.long 0x08 28. " SEQ_STATE ,Sequencer state" "Idle,Busy" textline " " bitfld.long 0x08 20. " SEQUENCE ,Controls the direction of the power up/power down sequence" "Up,Down" bitfld.long 0x08 16. " NEW_POWER_STATE ,Controls whether the lanes should be powered up/powered down" "PU,PD" textline " " bitfld.long 0x08 12.--15. " DELAY ,Number of microseconds to delay between each lanes' power state change" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x08 9. " LANE9_STATE ,LANE9 state" "Power up,Power down" textline " " rbitfld.long 0x08 8. " LANE8_STATE ,LANE8 state" "Power up,Power down" rbitfld.long 0x08 7. " LANE7_STATE ,LANE7 state" "Power up,Power down" textline " " rbitfld.long 0x08 6. " LANE6_STATE ,LANE6 state" "Power up,Power down" rbitfld.long 0x08 5. " LANE5_STATE ,LANE5 state" "Power up,Power down" textline " " rbitfld.long 0x08 4. " LANE4_STATE ,LANE4 state" "Power up,Power down" rbitfld.long 0x08 3. " LANE3_STATE ,LANE3 state" "Power up,Power down" textline " " rbitfld.long 0x08 2. " LANE2_STATE ,LANE2 state" "Power up,Power down" rbitfld.long 0x08 1. " LANE1_STATE ,LANE1 state" "Power up,Power down" textline " " rbitfld.long 0x08 0. " LANE0_STATE ,LANE0 state" "Power up,Power down" group.long 0x88++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST0_0,Preload The Power-Up And Power-Down Sequence 0" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x8C++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST1_0,Preload The Power-Up And Power-Down Sequence 1" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x90++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST2_0,Preload The Power-Up And Power-Down Sequence 2" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x94++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST3_0,Preload The Power-Up And Power-Down Sequence 3" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x98++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST4_0,Preload The Power-Up And Power-Down Sequence 4" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x9C++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST5_0,Preload The Power-Up And Power-Down Sequence 5" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xA0++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST6_0,Preload The Power-Up And Power-Down Sequence 6" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xA4++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST7_0,Preload The Power-Up And Power-Down Sequence 7" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xA8++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST8_0,Preload The Power-Up And Power-Down Sequence 8" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xAC++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST9_0,Preload The Power-Up And Power-Down Sequence 9" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xB0++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTA_0,Preload The Power-Up And Power-Down Sequence A" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xB4++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTB_0,Preload The Power-Up And Power-Down Sequence B" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xB8++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTC_0,Preload The Power-Up And Power-Down Sequence C" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xBC++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTD_0,Preload The Power-Up And Power-Down Sequence D" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xC0++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTE_0,Preload The Power-Up And Power-Down Sequence E" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xC4++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTF_0,Preload The Power-Up And Power-Down Sequence F" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xC8++0x07 line.long 0x00 "NV_PDISP_SOR_PWM_DIV_0,PWM Divide" hexmask.long.tbyte 0x00 0.--23. 1. " DIVIDE ,Defines the period of the PWM output" line.long 0x04 "NV_PDISP_SOR_PWM_CTL_0,Controls The Optional PWM Function" bitfld.long 0x04 31. " SETTING_NEW ,Setting new" "Done,Pending" bitfld.long 0x04 30. " CLKSEL ,Clock select" "PCLK,XTAL" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " DUTY_CYCLE ,Duty cycle of PWM output" group.long 0x128++0x47 line.long 0x00 "NV_PDISP_SOR_XBAR_CTRL_0,Controls The XBAR Between The SOR And The TMDS Analog Macro" bitfld.long 0x00 29.--31. " LINK1_XSEL_4 ,Link1 XSEL 4" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 26.--28. " LINK1_XSEL_3 ,Link1 XSEL 3" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 23.--25. " LINK1_XSEL_2 ,Link1 XSEL 2" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 20.--22. " LINK1_XSEL_1 ,Link1 XSEL 1" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 17.--19. " LINK1_XSEL_0 ,Link1 XSEL 0" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 14.--16. " LINK0_XSEL_4 ,Link0 XSEL 4" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 11.--13. " LINK0_XSEL_3 ,Link0 XSEL 3" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 8.--10. " LINK0_XSEL_2 ,Link0 XSEL 2" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 5.--7. " LINK0_XSEL_1 ,Link0 XSEL 1" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 2.--4. " LINK0_XSEL_0 ,Link0 XSEL 0" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 1. " LINK_SWAP ,Link swap" "Not swapped,Swapped" bitfld.long 0x00 0. " BYPASS ,Bypass XBAR" "Not bypassed,Bypassed" line.long 0x04 "NV_PDISP_SOR_XBAR_POL_0,Polarity Of The Channels Control" bitfld.long 0x04 9. " POL_LINK1_4 ,POL Link1 4" "Normal,Inverted" bitfld.long 0x04 8. " POL_LINK1_3 ,POL Link1 3" "Normal,Inverted" textline " " bitfld.long 0x04 7. " POL_LINK1_2 ,POL Link1 2" "Normal,Inverted" bitfld.long 0x04 6. " POL_LINK1_1 ,POL Link1 1" "Normal,Inverted" textline " " bitfld.long 0x04 5. " POL_LINK1_0 ,POL Link1 0" "Normal,Inverted" bitfld.long 0x04 4. " POL_LINK0_4 ,POL Link0 4" "Normal,Inverted" textline " " bitfld.long 0x04 3. " POL_LINK0_3 ,POL Link0 3" "Normal,Inverted" bitfld.long 0x04 2. " POL_LINK0_2 ,POL Link0 2" "Normal,Inverted" textline " " bitfld.long 0x04 1. " POL_LINK0_1 ,POL Link0 1" "Normal,Inverted" bitfld.long 0x04 0. " POL_LINK0_0 ,POL Link0 0" "Normal,Inverted" line.long 0x08 "NV_PDISP_SOR_DP_LINKCTL0_0,Select Index The SOR" bitfld.long 0x08 31. " FORCE_IDLEPTTRN ,Force idle pattern" "No,Yes" bitfld.long 0x08 28. " COMPLIANCEPTTRN ,Compliance test pattern" "No pattern,Color square" textline " " bitfld.long 0x08 16.--20. " LANECOUNT ,Controls the lane configuration of the DP datapath" "0,1,,2,,,,,,,,,,,,4,?..." bitfld.long 0x08 14. " ENHANCEDFRAME ,Enhanced framing symbol sequence for BS/SR/CPBS/CPSR" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " SYNCMODE ,Link clock and pixel clock are synchronous" "Disabled,Enabled" hexmask.long.byte 0x08 2.--8. 1. " TUSIZE ,Transfer unit size" textline " " bitfld.long 0x08 0. " ENABLE ,The current DP port" "Disabled,Enabled" line.long 0x0C "NV_PDISP_SOR_DP_LINKCTL1_0,Select Index Port Within The SOR" bitfld.long 0x0C 31. " FORCE_IDLEPTTRN ,Force idle pattern" "No,Yes" bitfld.long 0x0C 28. " COMPLIANCEPTTRN ,Compliance test pattern" "No pattern,Color square" textline " " bitfld.long 0x0C 16.--20. " LANECOUNT ,Controls the lane configuration of the DP datapath" "0,1,,2,,,,,,,,,,,,4,?..." bitfld.long 0x0C 14. " ENHANCEDFRAME ,Enhanced framing symbol sequence for BS/SR/CPBS/CPSR" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " SYNCMODE ,Link clock and pixel clock are synchronous" "Disabled,Enabled" hexmask.long.byte 0x0C 2.--8. 1. " TUSIZE ,Transfer unit size" textline " " bitfld.long 0x0C 0. " ENABLE ,The current DP port" "Disabled,Enabled" line.long 0x10 "NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0,SOR Lane Drive Current 0" hexmask.long.byte 0x10 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x10 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x10 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x10 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x14 "NV_PDISP_SOR_LANE_DRIVE_CURRENT1_0,SOR Lane Drive Current 1" hexmask.long.byte 0x14 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x14 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x14 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x14 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x18 "NV_PDISP_SOR_LANE4_DRIVE_CURRENT0_0,SOR Lane 4 Drive Current 0" hexmask.long.byte 0x18 0.--7. 1. " LANE4 ,LANE4 controls the fifth lane" line.long 0x1C "NV_PDISP_SOR_LANE4_DRIVE_CURRENT1_0,SOR Lane 4 Drive Current 1" hexmask.long.byte 0x1C 0.--7. 1. " LANE4 ,LANE4 controls the fifth lane" line.long 0x20 "NV_PDISP_SOR_LANE_PREEMPHASIS0_0,SOR Lane Pre-Emphasis 0" hexmask.long.byte 0x20 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x20 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x20 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x24 "NV_PDISP_SOR_LANE_PREEMPHASIS1_0,SOR Lane Pre-Emphasis 1" hexmask.long.byte 0x24 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x24 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x24 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x24 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x28 "NV_PDISP_SOR_LANE4_PREEMPHASIS0_0,SOR Lane 4 Pre-Emphasis 0" hexmask.long.byte 0x28 0.--7. 1. " LANE4 ,LANE4 controls the fifth lane" line.long 0x2C "NV_PDISP_SOR_LANE4_PREEMPHASIS1_0,SOR Lane 4 Pre-Emphasis 1" hexmask.long.byte 0x2C 0.--7. 1. " LANE4 ,LANE4 controls the fifth lane" line.long 0x30 "NV_PDISP_SOR_POSTCURSOR0_0,SOR Lane Post-Cursor 0" hexmask.long.byte 0x30 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x30 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x30 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x30 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x34 "NV_PDISP_SOR_POSTCURSOR1_0,SOR Lane Post-Cursor 1" hexmask.long.byte 0x34 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x34 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x34 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x34 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x38 "NV_PDISP_SOR_DP_CONFIG0_0,SOR DP Config 0" bitfld.long 0x38 31. " RD_RESET_VAL ,Internal running disparity" "Negative,Positive" bitfld.long 0x38 28. " IDLE_BEFORE_ATTACH ,Idle before attach" "Disabled,Enabled" textline " " bitfld.long 0x38 26. " ACTIVESYM_CNTL ,ACTIVESYM CNTL" "Disabled,Enabled" bitfld.long 0x38 24. " ACTIVESYM_POLARITY ,ACTIVESYM polarity" "Negative,Positive" textline " " bitfld.long 0x38 16.--19. " ACTIVESYM_FRAC ,Active fraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x38 8.--14. 1. " ACTIVESYM_COUNT ,Number of symbols sent out every transfer irrespective of the TU count" textline " " bitfld.long 0x38 0.--5. " WATERMARK ,Defines the number of symbols that the DP logic will wait for at the beginning of a line before ending blanking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x3C "NV_PDISP_SOR_DP_CONFIG1_0,SOR DP Config 1" bitfld.long 0x3C 31. " RD_RESET_VAL ,Internal running disparity" "Negative,Positive" bitfld.long 0x3C 28. " IDLE_BEFORE_ATTACH ,Idle before attach" "Disabled,Enabled" textline " " bitfld.long 0x3C 26. " ACTIVESYM_CNTL ,ACTIVESYM CNTL" "Disabled,Enabled" bitfld.long 0x3C 24. " ACTIVESYM_POLARITY ,ACTIVESYM polarity" "Negative,Positive" textline " " bitfld.long 0x3C 16.--19. " ACTIVESYM_FRAC ,Active fraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x3C 8.--14. 1. " ACTIVESYM_COUNT ,Number of symbols sent out every transfer irrespective of the TU count" textline " " bitfld.long 0x3C 0.--5. " WATERMARK ,Defines the number of symbols that the DP logic will wait for at the beginning of a line before ending blanking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x40 "NV_PDISP_SOR_DP_MN0_0,SOR DP MN 0" bitfld.long 0x40 30.--31. " M_MOD ,M_DELTA field not used/added/subtracted the M value" "None,INC,DEC,?..." bitfld.long 0x40 24.--27. " M_DELTA ,Defines an offset that will be used to modify the calculated M value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.tbyte 0x40 0.--23. 1. " N_VAL ,The value that will be used for calculating M" line.long 0x44 "NV_PDISP_SOR_DP_MN1_0,SOR DP MN 1" bitfld.long 0x44 30.--31. " M_MOD ,Describes how the M_DELTA field should be applied to the M value" "NONE,INC,DEC,?..." bitfld.long 0x44 24.--27. " M_DELTA ,Defines an offset that will be used to modify the calculated M value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.tbyte 0x44 0.--23. 1. " N_VAL ,The value that will be used for calculating M" sif (!cpuis("TEGRAX2")) if (((per.l(ad:0x54540000+0x130))&0x01)==0x01) group.long 0x170++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" bitfld.long 0x00 3. " PD_TXD_3 ,Controls to power down the lane 3" "Yes,No" textline " " bitfld.long 0x00 2. " PD_TXD_0 ,Controls to power down the lane 0" "Yes,No" bitfld.long 0x00 1. " PD_TXD_1 ,Controls to power down the lane 1" "Yes,No" textline " " bitfld.long 0x00 0. " PD_TXD_2 ,Controls to power down the lane 2" "Yes,No" else group.long 0x170++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" endif if (((per.l(ad:0x54540000+0x134))&0x01)==0x01) group.long 0x174++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" bitfld.long 0x00 3. " PD_TXD_3 ,Controls to power down the lane 3" "Yes,No" textline " " bitfld.long 0x00 2. " PD_TXD_0 ,Controls to power down the lane 0" "Yes,No" bitfld.long 0x00 1. " PD_TXD_1 ,Controls to power down the lane 1" "Yes,No" textline " " bitfld.long 0x00 0. " PD_TXD_2 ,Controls to power down the lane 2" "Yes,No" else group.long 0x174++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" endif endif group.long 0x180++0x47 line.long 0x00 "NV_PDISP_SOR_DP_SPARE0_0,NV PDISP SOR DP Spare" bitfld.long 0x00 31. " SOR_PSR_DIABLE_CYA ,SOR PSR disable CYA" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 30. " SOR_MSA_SOURCE_SEL ,Allows software to choose whether SOR uses MSA data" "SOR,RG" hexmask.long.word 0x00 14.--29. 1. " REG ,REG" textline " " bitfld.long 0x00 12.--13. " DEBUG_MODE ,Controls the mapping of DEBUG_OUT" "0,1,2,3" hexmask.long.byte 0x00 4.--11. 1. " DEBUG_OUT ,Spare output bits for debug" else textline " " hexmask.long 0x00 4.--30. 1. " REG ,REG" endif textline " " bitfld.long 0x00 3. " DISP_VIDEO_PREAMBLE_CYA ,Selects between video preamble from display versus the locally generated video preamble signal" "Disabled,Enabled" bitfld.long 0x00 2. " SOR_CLK_SEL ,Safe/macro clock as the SOR clock" "Safe,Macro" textline " " bitfld.long 0x00 1. " PANEL ,DP panel is external/internal" "External,Internal" bitfld.long 0x00 0. " SEQ_ENABLE ,Enables the sequencer in DP mode" "No,Yes" line.long 0x04 "NV_PDISP_SOR_DP_SPARE1_0,NV_PDISP_SOR_DP_SPARE" sif (cpuis("TEGRAX2")) hexmask.long 0x04 4.--31. 1. " REG ,Reg" bitfld.long 0x04 3. " SOR_CLK_OVR_ON ,SOR override for SLCG" "False,True" else hexmask.long 0x04 3.--31. 1. " REG ,Reg" endif textline " " bitfld.long 0x04 2. " SOR_CLK_SEL ,Safe/macro clock as the SOR clock" "Safe,Macro" textline " " bitfld.long 0x04 1. " PANEL ,DP panel is external/internal" "External,Internal" bitfld.long 0x04 0. " SEQ_ENABLE ,Enables the sequencer in DP mode" "No,Yes" line.long 0x08 "NV_PDISP_SOR_DP_AUDIO_CTRL_0,SOR DP Audio Control" eventfld.long 0x08 31. " NEW_SETTINGS ,New settings" "Done,Pending" rbitfld.long 0x08 21. " MUTE_STATUS ,Mute status" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " CA_SELECT ,Channel/speaker allocation select" "SW,HW" bitfld.long 0x08 19. " SS_SELECT ,Sample size select" "SW,HW" textline " " bitfld.long 0x08 18. " SF_SELECT ,Sampling frequency select" "SW,HW" bitfld.long 0x08 17. " CC_SELECT ,Channel count select" "SW,HW" textline " " bitfld.long 0x08 16. " CT_SELECT ,Coding type select" "SW,HW" hexmask.long.byte 0x08 8.--15. 1. " PACKET_ID ,Packet ID" textline " " bitfld.long 0x08 7. " GENERIC_INFOFRAME_ENABLE ,Allows software to send infoframes (AVI etc.) other than audio infoframe" "No,Yes" bitfld.long 0x08 6. " INFOFRAME_HEADER_OVERRIDE ,Lets the values in AUDIO_INFOFRAME_HEADER override the default values" "Disabled,Enabled" textline " " bitfld.long 0x08 2.--3. " MUTE ,Controls the AudioMute_Flag in the VB-ID" "Auto,Disabled,Enabled,?..." bitfld.long 0x08 0. " ENABLE ,Enables field for Audio over DisplayPort" "No,Yes" line.long 0x0C "NV_PDISP_SOR_DP_AUDIO_HBLANK_SYMBOLS_0,SOR DP Audio HBlank Symbols" hexmask.long.tbyte 0x0C 0.--16. 1. " VALUE ,Value" line.long 0x10 "NV_PDISP_SOR_DP_AUDIO_VBLANK_SYMBOLS_0,SOR DP Audio VBlank Symbols" hexmask.long.tbyte 0x10 0.--20. 1. " VALUE ,Value" line.long 0x14 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_HEADER_0,SOR DP Generic Infoframe Header" hexmask.long.byte 0x14 24.--31. 1. " HB3 ,HB3" hexmask.long.byte 0x14 16.--23. 1. " HB2 ,HB2" textline " " hexmask.long.byte 0x14 8.--15. 1. " HB1 ,HB1" hexmask.long.byte 0x14 0.--7. 1. " HB0 ,HB0" line.long 0x18 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK0_0,SOR DP Generic Infoframe Subpack0" hexmask.long.byte 0x18 24.--31. 1. " DB3 ,DB3" hexmask.long.byte 0x18 16.--23. 1. " DB2 ,DB2" textline " " hexmask.long.byte 0x18 8.--15. 1. " DB1 ,DB1" hexmask.long.byte 0x18 0.--7. 1. " DB0 ,DB0" line.long 0x1C "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK1_0,SOR DP Generic Infoframe Subpack1" hexmask.long.byte 0x1C 24.--31. 1. " DB7 ,DB7" hexmask.long.byte 0x1C 16.--23. 1. " DB6 ,DB6" textline " " hexmask.long.byte 0x1C 8.--15. 1. " DB5 ,DB5" hexmask.long.byte 0x1C 0.--7. 1. " DB4 ,DB4" line.long 0x20 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK2_0,SOR DP Generic Infoframe Subpack2" hexmask.long.byte 0x20 24.--31. 1. " DB11 ,DB11" hexmask.long.byte 0x20 16.--23. 1. " DB10 ,DB10" textline " " hexmask.long.byte 0x20 8.--15. 1. " DB9 ,DB9" hexmask.long.byte 0x20 0.--7. 1. " DB8 ,DB8" line.long 0x24 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK3_0,SOR DP Generic Infoframe Subpack3" hexmask.long.byte 0x24 24.--31. 1. " DB15 ,DB15" hexmask.long.byte 0x24 16.--23. 1. " DB14 ,DB14" textline " " hexmask.long.byte 0x24 8.--15. 1. " DB13 ,DB13" hexmask.long.byte 0x24 0.--7. 1. " DB12 ,DB12" line.long 0x28 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK4_0,SOR DP Generic Infoframe Subpack4" hexmask.long.byte 0x28 24.--31. 1. " DB19 ,DB19" hexmask.long.byte 0x28 16.--23. 1. " DB18 ,DB18" textline " " hexmask.long.byte 0x28 8.--15. 1. " DB17 ,DB17" hexmask.long.byte 0x28 0.--7. 1. " DB16 ,DB16" line.long 0x2C "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK5_0,SOR DP Generic Infoframe Subpack5" hexmask.long.byte 0x2C 24.--31. 1. " DB23 ,DB23" hexmask.long.byte 0x2C 16.--23. 1. " DB22 ,DB22" textline " " hexmask.long.byte 0x2C 8.--15. 1. " DB21 ,DB21" hexmask.long.byte 0x2C 0.--7. 1. " DB20 ,DB20" line.long 0x30 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK6_0,SOR DP Generic Infoframe Subpack6" hexmask.long.byte 0x30 24.--31. 1. " DB27 ,DB27" hexmask.long.byte 0x30 16.--23. 1. " DB26 ,DB26" textline " " hexmask.long.byte 0x30 8.--15. 1. " DB25 ,DB25" hexmask.long.byte 0x30 0.--7. 1. " DB24 ,DB24" line.long 0x34 "NV_PDISP_SOR_DP_TPG_0,Controls The Training Patterns Needed During Link Training" bitfld.long 0x34 30. " LANE3_CHANNELCODING ,Lane 3 - supports the main link channel coding" "Disabled,Enabled" bitfld.long 0x34 28.--29. " LANE3_SCRAMBLEREN ,Lane 3 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..." textline " " bitfld.long 0x34 24.--27. " LANE3_PATTERN ,Lane 3 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..." bitfld.long 0x34 22. " LANE2_CHANNELCODING ,Lane 2 - supports the main link channel coding" "Disabled,Enabled" textline " " bitfld.long 0x34 20.--21. " LANE2_SCRAMBLEREN ,Lane 2 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..." bitfld.long 0x34 16.--19. " LANE2_PATTERN ,Lane 2 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..." textline " " bitfld.long 0x34 14. " LANE1_CHANNELCODING ,Lane 1 - supports the main link channel coding" "Disabled,Enabled" bitfld.long 0x34 12.--13. " LANE1_SCRAMBLEREN ,Lane 1 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..." textline " " bitfld.long 0x34 8.--11. " LANE1_PATTERN ,Lane 1 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..." bitfld.long 0x34 6. " LANE0_CHANNELCODING ,Lane 0 - supports the main link channel coding" "Disabled,Enabled" textline " " bitfld.long 0x34 4.--5. " LANE0_SCRAMBLEREN ,Lane 0 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..." bitfld.long 0x34 0.--3. " LANE0_PATTERN ,Lane 0 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..." line.long 0x38 "NV_PDISP_SOR_DP_TPG_CONFIG_0,Additional Controls For The DP Test Pattern Generator" hexmask.long.tbyte 0x38 0.--16. 1. " HBR2_COMPLIANCE_PERIOD ,Total symbols there are between the start of a new scrambler reset sequence" line.long 0x3C "NV_PDISP_SOR_DP_LQ_CSTM0_0,Program A Custom 80-bit Test Pattern [31:0]" line.long 0x40 "NV_PDISP_SOR_DP_LQ_CSTM1_0,Program A Custom 80-bit Test Pattern [63:32]" line.long 0x44 "NV_PDISP_SOR_DP_LQ_CSTM2_0,Program A Custom 80-bit Test Pattern [79:64]" sif (!cpuis("TEGRAX2")) group.long 0x1C8++0x0B line.long 0x00 "NV_PDISP_SOR_PLL4_0,SOR PLL4" bitfld.long 0x00 24.--29. " SETUP_LCKDET ,Setup LCKDET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 23. " LOCK_OVERRIDE ,Lock override" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ENABLE_LCKDET ,Enable LCKDET" "Enabled,Disabled" rbitfld.long 0x00 21. " LOCKDET ,LOCKDET" "0,1" line.long 0x04 "NV_PDISP_SOR_DP_PADCTL2_0,SOR DP PADCTL2" hexmask.long.byte 0x04 24.--31. 1. " SPAREPLL ,Spare PLL" bitfld.long 0x04 20.--23. " SPARE4 ,Spare 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 16.--19. " SPARE3 ,Spare 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " SPARE2 ,Spare 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " SPARE1 ,Spare 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " SPARE0 ,Spare 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0. " REG_BYPASS ,REG bypass" "0,1" line.long 0x08 "NV_PDISP_SOR_DP_PADCTL3_0,SOR DP PADCTL3" hexmask.long.byte 0x08 24.--31. 1. " TX_PATTERN_GEN ,TX pattern GEN" endif rgroup.long 0x1D4++0x0F line.long 0x00 "NV_PDISP_SOR_DP_HDCP_AN_MSB_0,HDCP AN MSB Register" line.long 0x04 "NV_PDISP_SOR_DP_HDCP_AN_LSB_0,HDCP AN LSB Register" line.long 0x08 "NV_PDISP_SOR_DP_HDCP_AKSV_MSB_0,HDCP AKSV MSB Register" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the transmitter's downstream key selection vector (KSV)" line.long 0x0C "NV_PDISP_SOR_DP_HDCP_AKSV_LSB_0,HDCP AKSV LSB Register" group.long 0x1E4++0x0B line.long 0x00 "NV_PDISP_SOR_DP_HDCP_BKSV_MSB_0,HDCP BKSV MSB Register" bitfld.long 0x00 31. " REPEATER ,Repeater" "0,1" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the receiver's key selection vector (KSV)" line.long 0x04 "NV_PDISP_SOR_DP_HDCP_BKSV_LSB_0,HDCP BKSV LSB Register" line.long 0x08 "NV_PDISP_SOR_DP_HDCP_CTRL_0,HDCP Control Register" bitfld.long 0x08 15. " UPSTREAM ,SPRIME and MPRIME calculations will use AN and BKSV and M0 values from the TMDS/DP HDCP block" "TMDS,DP" rbitfld.long 0x08 13. " SROM_ERR ,Error occurs while using the HDCP SROM" "No error,Error" textline " " rbitfld.long 0x08 12. " SROM_EN ,HDCP SROM is in use" "Disabled,Enabled" rbitfld.long 0x08 11. " MPRIME ,M' has been calculated" "Invalid,Valid" textline " " rbitfld.long 0x08 10. " SPRIME ,S' has been calculated" "Invalid,Valid" rbitfld.long 0x08 9. " R0 ,Km Ks M0 and R0 have been calculated" "Invalid,Valid" textline " " rbitfld.long 0x08 8. " AN ,An value has been generated" "Invalid,Valid" bitfld.long 0x08 3. " ONEONE ,Enables the HDCP 1.1 features" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " DUAL_LINK_EN ,Turns dual-link mode on" "Disabled,Enabled" bitfld.long 0x08 1. " CRYPT ,Turns encryption on" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " RUN ,Starts downstream protocol" "No,Yes" rgroup.long 0x1F0++0x03 line.long 0x00 "NV_PDISP_SOR_DP_HDCP_RI_0,HDCP RI Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,RI register holds the 16-bit link integrity check value" group.long 0x1F8++0x07 line.long 0x00 "NV_PDISP_SOR_DP_HDCP_EMU1_0,SOR NV PDISP SOR DP HDCP EMU1" line.long 0x04 "NV_PDISP_SOR_DP_HDCP_CYA_0,HDCP Diagnostic Register" rgroup.long 0x200++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_AN_MSB_0,HDCP AN MSB Register" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_AN_LSB_0,HDCP AN LSB Register" group.long 0x208++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CN_MSB_0,HDCP CN MSB Register" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CN_LSB_0,HDCP CN LSB Register" rgroup.long 0x210++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_AKSV_MSB_0,HDCP AKSV MSB Register" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the transmitter's downstream key selection vector (KSV)" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_AKSV_LSB_0,HDCP AKSV LSB Register" group.long 0x218++0x0F line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_BKSV_MSB_0,HDCP BKSV MSB Register" bitfld.long 0x00 31. " REPEATER ,Repeater" "0,1" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the receiver's key selection vector (KSV)" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB_0,HDCP BKSV LSB Register" line.long 0x08 "NV_PDISP_SOR_TMDS_HDCP_CKSV_MSB_0,HDCP CKSV MSB Register" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the software's key selection vector (KSV)" line.long 0x0C "NV_PDISP_SOR_TMDS_HDCP_CKSV_LSB_0,HDCP CKSV LSB Register" rgroup.long 0x228++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_DKSV_MSB_0,HDCP DKSV MSB Register" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the transmitter's upstream key selection vector (KSV)" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_DKSV_LSB_0,HDCP DKSV LSB Register" group.long 0x230++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CTRL_0,HDCP Control Register" rbitfld.long 0x00 13. " SROM_ERR ,Error occurs while using the HDCP SROM" "No error,Error" rbitfld.long 0x00 12. " SROM_EN ,HDCP SROM is in use" "Disabled,Enabled" textline " " rbitfld.long 0x00 11. " MPRIME ,M' has been calculated" "Invalid,Valid" rbitfld.long 0x00 10. " SPRIME ,S' has been calculated" "Invalid,Valid" textline " " rbitfld.long 0x00 9. " R0 ,Km Ks M0 and R0 have been calculated" "Invalid,Valid" rbitfld.long 0x00 8. " AN ,An value has been generated" "Invalid,Valid" textline " " bitfld.long 0x00 3. " ONEONE ,Enables the HDCP 1.1 features" "Disabled,Enabled" bitfld.long 0x00 2. " DUAL_LINK_EN ,Turns dual-link mode on" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CRYPT ,Turns encryption on" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Starts downstream protocol" "No,Yes" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CMODE_0,HDCP CMODE Register" bitfld.long 0x04 4.--7. " INDEX ,Index" "SOR0,SOR1,SOR2,SOR3,SOR4,SOR5,SOR6,SOR7,DAC0,DAC1,DAC2,PIOR0,PIOR1,PIOR2,PIOR3,PIOR4" bitfld.long 0x04 0.--3. " MODE ,Mode" ",Read S,Read M,?..." rgroup.long 0x238++0x17 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_MPRIME_MSB_0,HDCP MPRIME MSB Register" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_MPRIME_LSB_0,HDCP MPRIME LSB Register" line.long 0x08 "NV_PDISP_SOR_TMDS_HDCP_SPRIME_MSB_0,HDCP SPRIME MSB Register" bitfld.long 0x08 7. " STATUS_READZ ,Implements the HDCP upstream spec's read Z operation" "Not implemented,Implemented" bitfld.long 0x08 6. " STATUS_CS ,Implements the connection state (CS) register" "Not implemented,Implemented" textline " " bitfld.long 0x08 5. " STATUS_SCOPE ,Report the status for the STATUS_UNPROTECTED field" "Scope 2 heads,Scope 1 head" bitfld.long 0x08 4. " STATUS_INTPNL ,Transmitting to an internal panel on this head" "Inactive,Active" textline " " bitfld.long 0x08 0.--3. " STATUS_MAX_CMODE_IDX ,Identifies the maximum CMode index allowed for requesting status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "NV_PDISP_SOR_TMDS_HDCP_SPRIME_LSB2_0,HDCP SPRIME LSB2 Register" bitfld.long 0x0C 28.--31. " STATUS_CMODE_IDX ,Identifies the index of the port to which the status request was actually routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 27. " STATUS_UNPROTECTED ,Queried port is transmitting unprotected data" "No,Yes" textline " " bitfld.long 0x0C 26. " STATUS_EXTPNL ,Port identified digital interface and transmitting on other than an internal panel" "Inactive,Active" bitfld.long 0x0C 25. " STATUS_RPTR ,Status repeater" "Inactive,Active" textline " " bitfld.long 0x0C 24. " STATUS_ENCRYPTING ,HDCP unit in this head is actually encrypting the data it receives" "No,Yes" hexmask.long.tbyte 0x0C 0.--23. 1. " VALUE ,Value" line.long 0x10 "NV_PDISP_SOR_TMDS_HDCP_SPRIME_LSB1_0,HDCP SPRIME LSB1 Register" line.long 0x14 "NV_PDISP_SOR_TMDS_HDCP_RI_0,HDCP RI Register" hgroup.long 0x250++0x07 hide.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CS_MSB_0,HDCP CS MSB Register" hide.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CS_LSB_0,HDCP CS LSB Register" rgroup.long 0x25C++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_EMU_RDATA0_0,HDMI Audio EMU RDATA0" group.long 0x260++0x0B line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_EMU1_0,HDMI Audio EMU1" bitfld.long 0x00 31. " WRITE ,Write" "0,1" hexmask.long.byte 0x00 0.--7. 1. " ADDR ,Address" line.long 0x04 "NV_PDISP_SOR_HDMI_AUDIO_EMU2_0,HDMI Audio EMU2" line.long 0x08 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_CTRL_0,HDMI Audio Infoframe Control Register" bitfld.long 0x08 9. " CHKSUM_HW ,Way to calculate the checksum for the infoframes" "Disabled,Enabled" bitfld.long 0x08 8. " SINGLE ,InfoFrame to be transmitted exactly once" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " OTHER ,InfoFrame to be transmitted to every other frame" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLE ,Enables the hardware calculation to be passed to the packet" "Disabled,Enabled" rgroup.long 0x26C++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_STATUS_0,HDMI Audio InfoFrame Status" bitfld.long 0x00 0. " SENT ,Sent" "Waiting,Done" group.long 0x270++0x0F line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_HEADER_0,HDMI Audio InfoFrame Header" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" line.long 0x04 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_SUBPACK0_LOW_0,HDMI Audio InfoFrame SUBPACK0 Low" hexmask.long.byte 0x04 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x04 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x04 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x04 0.--7. 1. " PB0 ,PB0" line.long 0x08 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_SUBPACK0_HIGH_0,HDMI Audio InfoFrame SUBPACK0 High" hexmask.long.byte 0x08 8.--15. 1. " PB5 ,PB5" hexmask.long.byte 0x08 0.--7. 1. " PB4 ,PB4" line.long 0x0C "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_CTRL_0,HDMI AVI Infoframe Control Register" bitfld.long 0x0C 9. " CHKSUM_HW ,Way to calculate the checksum for the infoframes" "Disabled,Enabled" bitfld.long 0x0C 8. " SINGLE ,InfoFrame to be transmitted exactly once" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " OTHER ,InfoFrame to be transmitted to every other frame" "Disabled,Enabled" bitfld.long 0x0C 0. " ENABLE ,Enables the hardware calculation to be passed to the packe" "Disabled,Enabled" rgroup.long 0x280++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_STATUS_0,HDMI AVI Infoframe Status" bitfld.long 0x00 0. " SENT ,Field will be set to after the first packet is sent" "Waiting,Done" group.long 0x284++0x13 line.long 0x00 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_HEADER_0,HDMI AVI Infoframe Header" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" line.long 0x04 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_0,HDMI AVI Infoframe SUBPACK0 Low" hexmask.long.byte 0x04 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x04 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x04 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x04 0.--7. 1. " PB0 ,PB0" line.long 0x08 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_0,HDMI AVI Infoframe SUBPACK0 High" hexmask.long.byte 0x08 16.--23. 1. " PB6 ,PB6" hexmask.long.byte 0x08 8.--15. 1. " PB5 ,PB5" textline " " hexmask.long.byte 0x08 0.--7. 1. " PB4 ,PB4" line.long 0x0C "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_0,HDMI AVI Infoframe SUBPACK1 Low" hexmask.long.byte 0x0C 24.--31. 1. " PB10 ,PB10" hexmask.long.byte 0x0C 16.--23. 1. " PB9 ,PB9" textline " " hexmask.long.byte 0x0C 8.--15. 1. " PB8 ,PB8" hexmask.long.byte 0x0C 0.--7. 1. " PB7 ,PB7" line.long 0x10 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_0,HDMI AVI Infoframe SUBPACK1 High" hexmask.long.byte 0x10 16.--23. 1. " PB13 ,PB13" hexmask.long.byte 0x10 8.--15. 1. " PB12 ,PB12" textline " " hexmask.long.byte 0x10 0.--7. 1. " PB11 ,PB11" rgroup.long 0x29C++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_STATUS_0,HDMI Generic Status" bitfld.long 0x00 0. " SENT ,Field will be set to after the first packet is sent" "Waiting,Done" group.long 0xB0++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_HEADER_0,HDMI Generic Header" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" group.long 0x2A4++0x6B line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK0_LOW_0,HDMI Generic SUBPACK0 Low" hexmask.long.byte 0x00 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x00 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x00 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x00 0.--7. 1. " PB0 ,PB0" line.long 0x04 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK0_HIGH_0,HDMI Generic SUBPACK0 High" hexmask.long.byte 0x04 16.--23. 1. " PB6 ,PB6" hexmask.long.byte 0x04 8.--15. 1. " PB5 ,PB5" textline " " hexmask.long.byte 0x04 0.--7. 1. " PB4 ,PB4" line.long 0x08 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK1_LOW_0,HDMI Generic SUBPACK1 Low" hexmask.long.byte 0x08 24.--31. 1. " PB10 ,PB10" hexmask.long.byte 0x08 16.--23. 1. " PB9 ,PB9" textline " " hexmask.long.byte 0x08 8.--15. 1. " PB8 ,PB8" hexmask.long.byte 0x08 0.--7. 1. " PB7 ,PB7" line.long 0x0C "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK1_HIGH_0,HDMI Generic SUBPACK1 High" hexmask.long.byte 0x0C 16.--23. 1. " PB13 ,PB13" hexmask.long.byte 0x0C 8.--15. 1. " PB12 ,PB12" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PB11 ,PB11" line.long 0x10 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK2_LOW_0,HDMI Generic SUBPACK2 Low" hexmask.long.byte 0x10 24.--31. 1. " PB17 ,PB17" hexmask.long.byte 0x10 16.--23. 1. " PB16 ,PB16" textline " " hexmask.long.byte 0x10 8.--15. 1. " PB15 ,PB15" hexmask.long.byte 0x10 0.--7. 1. " PB14 ,PB14" line.long 0x14 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK2_HIGH_0,HDMI Generic SUBPACK2 High" hexmask.long.byte 0x14 16.--23. 1. " PB20 ,PB20" hexmask.long.byte 0x14 8.--15. 1. " PB19 ,PB19" textline " " hexmask.long.byte 0x14 0.--7. 1. " PB18 ,PB18" line.long 0x18 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK3_LOW_0,HDMI Generic SUBPACK3 Low" hexmask.long.byte 0x18 24.--31. 1. " PB24 ,PB24" hexmask.long.byte 0x18 16.--23. 1. " PB23 ,PB23" textline " " hexmask.long.byte 0x18 8.--15. 1. " PB22 ,PB22" hexmask.long.byte 0x18 0.--7. 1. " PB21 ,PB21" line.long 0x1C "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK3_HIGH_0,HDMI Generic SUBPACK2 High" hexmask.long.byte 0x1C 16.--23. 1. " PB27 ,PB27" hexmask.long.byte 0x1C 8.--15. 1. " PB26 ,PB26" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PB25 ,PB25" line.long 0x20 "NV_PDISP_SOR_HDMI_ACR_CTRL_0,HDMI Audio Clock Regeneration Control" bitfld.long 0x20 24.--27. " FREQS ,Audio sampling frequency" "FREQ_44_1KHZ,,FREQ_48KHZ,FREQ_32KHZ,,,,,FREQ_88_2KHZ,,FREQ_96KHZ,,FREQ_176_4KHZ,,FREQ_192KHZ,?..." bitfld.long 0x20 16. " FREQS_ENABLE ,Uses the sampling frequency" "Disabled,Enabled" textline " " bitfld.long 0x20 8. " MEASURE_ENABLE ,Uses the sampling frequency measured" "Disabled,Enabled" bitfld.long 0x20 0. " PACKET_ENABLE ,Uses the channel status information read from the incoming SPDIF" "Disabled,Enabled" line.long 0x24 "NV_PDISP_SOR_HDMI_ACR_0320_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 32 KHz SUBPACK Low" hexmask.long.byte 0x24 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x24 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x24 8.--15. 1. " SB3 ,SB3" line.long 0x28 "NV_PDISP_SOR_HDMI_ACR_0320_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 32 KHz SUBPACK High" bitfld.long 0x28 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x28 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x28 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x28 0.--7. 1. " SB6 ,SB6" line.long 0x2C "NV_PDISP_SOR_HDMI_ACR_0441_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 44.1 KHz SUBPACK Low" hexmask.long.byte 0x2C 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x2C 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x2C 8.--15. 1. " SB3 ,SB3" line.long 0x30 "NV_PDISP_SOR_HDMI_ACR_0441_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 44.1 KHz SUBPACK High" bitfld.long 0x30 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x30 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x30 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x30 0.--7. 1. " SB6 ,SB6" line.long 0x34 "NV_PDISP_SOR_HDMI_ACR_0882_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 88.2 KHz SUBPACK Low" hexmask.long.byte 0x34 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x34 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x34 8.--15. 1. " SB3 ,SB3" line.long 0x38 "NV_PDISP_SOR_HDMI_ACR_0882_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 88.2 KHz SUBPACK High" bitfld.long 0x38 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x38 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x38 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x38 0.--7. 1. " SB6 ,SB6" line.long 0x3C "NV_PDISP_SOR_HDMI_ACR_1764_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 176.4 KHz SUBPACK Low" hexmask.long.byte 0x3C 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x3C 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x3C 8.--15. 1. " SB3 ,SB3" line.long 0x40 "NV_PDISP_SOR_HDMI_ACR_1764_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 176.4 KHz SUBPACK High" bitfld.long 0x40 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x40 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x40 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x40 0.--7. 1. " SB6 ,SB6" line.long 0x44 "NV_PDISP_SOR_HDMI_ACR_0480_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 48 KHz SUBPACK Low" hexmask.long.byte 0x44 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x44 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x44 8.--15. 1. " SB3 ,SB3" line.long 0x48 "NV_PDISP_SOR_HDMI_ACR_0480_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 48 KHz SUBPACK High" bitfld.long 0x48 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x48 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x48 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x48 0.--7. 1. " SB6 ,SB6" line.long 0x4C "NV_PDISP_SOR_HDMI_ACR_0960_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 96 KHz SUBPACK Low" hexmask.long.byte 0x4C 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x4C 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x4C 8.--15. 1. " SB3 ,SB3" line.long 0x50 "NV_PDISP_SOR_HDMI_ACR_0960_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 96 KHz SUBPACK High" bitfld.long 0x50 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x50 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x50 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x50 0.--7. 1. " SB6 ,SB6" line.long 0x54 "NV_PDISP_SOR_HDMI_ACR_1920_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 192 KHz SUBPACK Low" hexmask.long.byte 0x54 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x54 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x54 8.--15. 1. " SB3 ,SB3" line.long 0x58 "NV_PDISP_SOR_HDMI_ACR_1920_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 192 KHz SUBPACK High" bitfld.long 0x58 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x58 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x58 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x58 0.--7. 1. " SB6 ,SB6" line.long 0x5C "NV_PDISP_SOR_HDMI_CTRL_0,HDMI Control" bitfld.long 0x5C 30. " ENABLE ,Enables HDMI for this head" "Disabled,Enabled" bitfld.long 0x5C 28. " CA_SELECT ,Value of channel allocation value software/hardware based" "SW,HW" textline " " bitfld.long 0x5C 27. " SS_SELECT ,Value of sample size software/hardware based" "SW,HW" bitfld.long 0x5C 26. " SF_SELECT ,Value of sampling frequency software/hardware based" "SW,HW" textline " " bitfld.long 0x5C 25. " CC_SELECT ,Value of channel count software/hardware based" "SW,HW" bitfld.long 0x5C 24. " CT_SELECT ,Value of coding type software/hardware based" "SW,HW" textline " " hexmask.long.byte 0x5C 16.--20. 1. " MAX_AC_PACKET ,Maximum number of 32-pixel packets" bitfld.long 0x5C 12. " SAMPLE_FLAT ,Controls the values of HB2[3:0]" "CLR,SET" textline " " bitfld.long 0x5C 10. " AUDIO_LAYOUT_SELECT ,AUDIO_LAYOUT information is automatically detected by hardware/software" "HW,SW" bitfld.long 0x5C 8. " AUDIO_LAYOUT ,Controls layout HB1[4]" "Layout 2CH,Layout 8CH" textline " " hexmask.long.byte 0x5C 0.--6. 1. " REKEY ,Number of clocks required for HDCP rekey" line.long 0x60 "NV_PDISP_SOR_HDMI_VSYNC_KEEPOUT_0,HDMI VSYNC Keepout" bitfld.long 0x60 31. " ENABLE ,Enables keepout window" "Disabled,Enabled" hexmask.long.word 0x60 16.--25. 1. " START ,Defines the start of the keepout period" textline " " hexmask.long.word 0x60 0.--9. 1. " END ,Defines the end of the keepout period" line.long 0x64 "NV_PDISP_SOR_HDMI_VSYNC_WINDOW_0,HDMI VSYNC Window" bitfld.long 0x64 31. " ENABLE ,Allow EESS signaling during the window of opportunity" "Disabled,Enabled" hexmask.long.word 0x64 16.--25. 1. " START ,Defines the start of the window of opportunity" textline " " hexmask.long.word 0x64 0.--9. 1. " END ,Defines the end of the window of opportunity" line.long 0x68 "NV_PDISP_SOR_HDMI_GCP_CTRL_0,HDMI GCP Control" bitfld.long 0x68 8. " SINGLE ,Cause infoframe to be transmitted exactly once" "Disabled,Enabled" bitfld.long 0x68 4. " OTHER ,Cause infoframe to be transmitted to every other frame" "Disabled,Enabled" textline " " bitfld.long 0x68 0. " ENABLE ,Enables the hardware calculation to be passed to the packet" "Disabled,Enabled" rgroup.long 0x310++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_GCP_STATUS_0,HDMI GCP Status" bitfld.long 0x00 24.--26. " HSYNC_END_PP ,Indicates the pixel phase for the end fragment number of the HSYNC" ",PP_1,PP_2,PP_3,PP_0,?..." bitfld.long 0x00 20.--22. " HSYNC_START_PP ,Indicates the pixel phase for the start fragment number of the HSYNC" ",PP_1,PP_2,PP_3,PP_0,?..." textline " " bitfld.long 0x00 16.--18. " VSYNC_END_PP ,Indicates the pixel phase for the end fragment number of the VSYNC" ",PP_1,PP_2,PP_3,PP_0,?..." bitfld.long 0x00 12.--14. " VSYNC_START_PP ,Indicates the pixel phase for the start fragment number of the VSYNC" ",PP_1,PP_2,PP_3,PP_0,?..." textline " " bitfld.long 0x00 8.--10. " ACTIVE_END_PP ,Indicates the pixel phase for the END fragment number of the ACTIVE" ",PP_1,PP_2,PP_3,PP_0,?..." bitfld.long 0x00 4.--6. " ACTIVE_START_PP ,Indicates the pixel phase for the start fragment number of the ACTIVE" ",PP_1,PP_2,PP_3,PP_0,?..." textline " " bitfld.long 0x00 0. " SENT ,Field will be set to after the first packet is sent" "Waiting,Done" group.long 0x314++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_GCP_SUBPACK_0,HDMI GCP SUBPACK" hexmask.long.byte 0x00 16.--23. 1. " SB2 ,SB2" hexmask.long.byte 0x00 8.--15. 1. " SB1 ,SB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " SB0 ,SB0" group.long 0x320++0x07 line.long 0x00 "NV_PDISP_SOR_HDMI_EMU0_0,SOR NV PDISP SOR HDMI EMU0" line.long 0x04 "NV_PDISP_SOR_HDMI_EMU1_0,SOR NV PDISP SOR HDMI EMU1" rgroup.long 0x328++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_EMU1_RDATA_0,SOR NV PDISP SOR HDMI EMU1 RDATA" group.long 0x32C++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_SPARE_0,HDMI Spare" rgroup.long 0x330++0x07 line.long 0x00 "NV_PDISP_SOR_HDMI_SPDIF_CHN_STATUS1_0,HDMI SPDIF Channel Status1" bitfld.long 0x00 28.--31. " ACCURACY ,Transmitter clock accuracy" "High,Normal,Variable pitch,Other,?..." bitfld.long 0x00 24.--27. " SFREQ ,Reported sampling frequency of the input audio stream" ",Undefined,?..." textline " " bitfld.long 0x00 20.--23. " CHANNEL ,Channel number of the audio" "Undefined,?..." bitfld.long 0x00 16.--19. " SOURCE ,Source number of the audio" "Undefined,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " CODE ,This byte defines the category code of the input device" bitfld.long 0x00 6.--7. " MODE ,Defines one of four possible channel status formats for bytes 1-23 of channel status" "0,1,2,3" textline " " bitfld.long 0x00 3.--5. " D ,2 audio channels without pre-emphasis/pre-emphasis" "No pre-emphasis,Pre-emphasis,?..." bitfld.long 0x00 2. " COPYRIGHT ,Copyright status of the audio" "Yes,No" textline " " bitfld.long 0x00 1. " TYPE ,Specifies the type of data the audio word represents" "PCM,Other" bitfld.long 0x00 0. " USE ,Specifies consumer/professional use of the channel status block" "CONSUMER,PRO" line.long 0x04 "NV_PDISP_SOR_HDMI_SPDIF_CHN_STATUS2_0,HDMI SPDIF Channel Status2" bitfld.long 0x04 4.--7. " ORIGINAL ,ORIGINAL" "Undefined,?..." bitfld.long 0x04 1.--3. " LENGTH ,Audio sample word length of this block depends on MAX_LENGTH" "MAX20_UNDEF/MAX24_UNDEF,MAX20_16BITS/MAX24_20BITS,MAX20_18BITS/MAX24_22BITS,,MAX20_19BITS/MAX24_23BITS,MAX20_20BITS/MAX24_24BITS,MAX20_17BITS/MAX24_21BITS,?..." textline " " bitfld.long 0x04 0. " MAX_LENGTH ,Reports if the maximum audio sample word length is 20 bits or 24 bits" "0,1" group.long 0x33C++0x03 line.long 0x00 "NV_PDISP_HDCPRIF_ROM_CTRL_0,HDCPRIF Control Register" hexmask.long.word 0x00 0.--15. 1. " ACK_ATTEMPTS ,Controls the number of Ack Attempts" group.long 0x394++0x17 line.long 0x00 "NV_PDISP_HDCPRIF_ROM_TIMING_0,HDCPRIF Control Timing Register" bitfld.long 0x00 24.--27. " PRESCALE ,Prescale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " START_DLY ,Defines how many scaled ticks pass before SDA (the data bit) makes a transition after the rising edge of SCL" textline " " hexmask.long.byte 0x00 8.--15. 1. " DATA_DLY ,Defines how many scaled ticks pass before SDA (the data bit) makes a transition after the falling edge of SCL" hexmask.long.byte 0x00 0.--7. 1. " BIT_PERIOD ,Defines the timing of the SCL (serial clock) output" line.long 0x04 "NV_PDISP_SOR_REFCLK_0,SOR REFCLK" hexmask.long.byte 0x04 8.--15. 1. " DIV_INT ,Divisor integer" bitfld.long 0x04 6.--7. " DIV_FRAC ,Divisor fractional" "0,1,2,3" line.long 0x08 "NV_PDISP_CRC_CONTROL_0,CRC Control" bitfld.long 0x08 0. " ARM_CRC_ENABLE ,Enables or disables computation of CRC" "Disabled,Enabled" line.long 0x0C "NV_PDISP_INPUT_CONTROL_0,Input Control" bitfld.long 0x0C 1. " ARM_VIDEO_RANGE ,Controls whether R/G/B values of 0 and 255 are permitted" "Full,Limited" bitfld.long 0x0C 0. " HDMI_SRC_SELECT ,Selects from which of the two display units to take input" "Display,DisplayB" line.long 0x10 "NV_PDISP_SCRATCH_0,Scratch" line.long 0x14 "NV_PDISP_KEY_CTRL_0,HDCP KEY SRAM Register Control" hexmask.long.word 0x14 22.--31. 0x40 " ADDRESS ,Reports the next byte address in the local key store" hexmask.long.word 0x14 12.--21. 0x10 " LOAD_ADDRESS ,Selects the start byte address of the contiguous locations in the local key store" textline " " rbitfld.long 0x14 6. " PKEY_LOADED ,Indicates that the private key value has been received from KFUSE and is ready for use" "False,True" bitfld.long 0x14 5. " PKEY_REQUEST_RELOAD ,Requests that the private key be requested again from KFUSE" "Idle,Triggered" textline " " bitfld.long 0x14 4. " WRITE16 ,HDCP keys module will write all 16 bytes of data into the local key store" "Done,Triggered" bitfld.long 0x14 1. " AUTOINC ,Auto-increment" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " LOCAL_KEYS ,On-chip HDCP key store " "Disabled,Enabled" group.long 0x3B8++0x13 line.long 0x00 "NV_PDISP_KEY_HDCP_KEY_0_0,SOR NV_PDISP Key HDCP Key 0" line.long 0x04 "NV_PDISP_KEY_HDCP_KEY_1_0,SOR NV_PDISP Key HDCP Key 1" line.long 0x08 "NV_PDISP_KEY_HDCP_KEY_2_0,SOR NV_PDISP Key HDCP Key 2" line.long 0x0C "NV_PDISP_KEY_HDCP_KEY_3_0,SOR NV_PDISP Key HDCP Key 3" line.long 0x10 "NV_PDISP_KEY_HDCP_KEY_TRIG_0,SOR NV PDISP Key HDCP Key Trigger" bitfld.long 0x10 8. " LOAD_HDCP_KEY ,Load HDCP key" "Idle,Triggered" wgroup.long 0x3CC++0x03 line.long 0x00 "NV_PDISP_KEY_SKEY_INDEX_0,SOR NV PDISP Key SKEY INDEX" bitfld.long 0x00 0.--3. " IDX_VALUE ,Index value" ",,,,,,,,,,,,,,,Test" group.long 0x3F0++0x03 line.long 0x00 "NV_PDISP_SOR_AUDIO_CNTRL0_0,HD Audio (Known as Azalia)" rbitfld.long 0x00 31. " INPUT_MODE ,This bit indicates what the audio data source is" "HDA,SPDIF" bitfld.long 0x00 29. " INJECT_NULLSMPL ,Inserts null samples into the audio FIFO for each Azalia frame" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " SOURCE_SELECT ,Determines whether to use the S/PDIF or Azalia (HDAL) audio input" "Auto,SPDIF,HDAL,?..." rbitfld.long 0x00 16.--19. " SAMPLING_FREQ ,Incoming audio stream sampling frequency in the Azalia code" "FREQ_44_1KHZ,FREQ Unknown,FREQ_48_0KHZ,FREQ_32_0KHZ,,,,,FREQ_88_2KHZ,,FREQ_96_0KHZ,,FREQ_176_4KHZ,,FREQ_192_0KHZ,?..." textline " " bitfld.long 0x00 12. " AFIFO_FLUSH ,Ensures that the next new audio packet sent will begin on the correct channel" "Disabled,Enabled" bitfld.long 0x00 0. " PORT_CONNECTIVITY ,Controls the behavior of the Port Connectivity field of the Azalia configuration defaults verb" "Enabled,Disabled" group.long 0x3FC++0x1B line.long 0x00 "NV_PDISP_SOR_AUDIO_NVAL_0320_0,SOR Audio N values 32 KHz" hexmask.long.tbyte 0x00 0.--19. 1. " VALUE ,The correct N value for 32 KHz audio at the current pixel clock frequency" line.long 0x04 "NV_PDISP_SOR_AUDIO_NVAL_0441_0,SOR Audio N values 44.1 KHz" hexmask.long.tbyte 0x04 0.--19. 1. " VALUE ,The correct N value for 44.1 KHz audio at the current pixel clock frequency" line.long 0x08 "NV_PDISP_SOR_AUDIO_NVAL_0882_0,SOR Audio N values 88.2 KHz" hexmask.long.tbyte 0x08 0.--19. 1. " VALUE ,The correct N value for 88.2 KHz audio at the current pixel clock frequency" line.long 0x0C "NV_PDISP_SOR_AUDIO_NVAL_1764_0,SOR Audio N values 176.4 KHz" hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE ,The correct N value for 176.4 KHz audio at the current pixel clock frequency" line.long 0x10 "NV_PDISP_SOR_AUDIO_NVAL_0480_0,SOR Audio N values 48 KHz" hexmask.long.tbyte 0x10 0.--19. 1. " VALUE ,The correct N value for 48 KHz audio at the current pixel clock frequency" line.long 0x14 "NV_PDISP_SOR_AUDIO_NVAL_0960_0,SOR Audio N values 96 KHz" hexmask.long.tbyte 0x14 0.--19. 1. " VALUE ,The correct N value for 96 KHz audio at the current pixel clock frequency" line.long 0x18 "NV_PDISP_SOR_AUDIO_NVAL_1920_0,SOR Audio N values 192 KHz" hexmask.long.tbyte 0x18 0.--19. 1. " VALUE ,The correct N value for 192 KHz audio at the current pixel clock frequency" hgroup.long 0x418++0x0F hide.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH0_0,SOR Audio HDA Scratch0" hide.long 0x04 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH1_0,SOR Audio HDA Scratch1" hide.long 0x08 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH2_0,SOR Audio HDA Scratch2" hide.long 0x0C "NV_PDISP_SOR_AUDIO_HDA_SCRATCH3_0,SOR Audio HDA Scratch3" rgroup.long 0x428++0x07 line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH0_0,SOR Audio HDA Codec SCRATCH0" line.long 0x04 "NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH1_0,SOR Audio HDA Codec SCRATCH1" group.long 0x430++0x03 line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_ELD_BUFWR_0,SOR Audio HDA ELD Buffer" hexmask.long.byte 0x00 8.--15. 1. " INDEX ,Index" hexmask.long.byte 0x00 0.--7. 1. " DATABYTE ,Databyte" group.long 0x434++0x03 line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_PRESENSE_0,SOR Audio HDA Presense" bitfld.long 0x00 1. " ELDV ,Indicates whether the data in the ELD buffer is valid and ready to read" "Invalid,Valid" bitfld.long 0x00 0. " PD ,Presence detect" "Not present,Present" rgroup.long 0x438++0x03 line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_CP_0,SOR Audio HDA Content Protection" bitfld.long 0x00 2. " REQUEST_STATE_VALID ,Request state valid" "Invalid,Valid" bitfld.long 0x00 0.--1. " REQUEST_STATE ,Request state" "Don't care,,Protection off,Protection on" group.long 0x43C++0x23 line.long 0x00 "NV_PDISP_SOR_AUDIO_AVAL_0320_0,Audio AVAL 32 KHz" hexmask.long.tbyte 0x00 0.--19. 1. " VALUE ,The correct A value for 32 KHz audio at the current pixel clock frequency" line.long 0x04 "NV_PDISP_SOR_AUDIO_AVAL_0441_0,Audio AVAL 44.1 KHz" hexmask.long.tbyte 0x04 0.--19. 1. " VALUE ,The correct A value for 44.1 KHz audio at the current pixel clock frequency" line.long 0x08 "NV_PDISP_SOR_AUDIO_AVAL_0882_0,Audio AVAL 88.2 KHz" hexmask.long.tbyte 0x08 0.--19. 1. " VALUE ,The correct A value for 88.2 KHz audio at the current pixel clock frequency" line.long 0x0C "NV_PDISP_SOR_AUDIO_AVAL_1764_0,Audio AVAL 176.4 KHz" hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE ,The correct A value for 176.4 KHz audio at the current pixel clock frequency" line.long 0x10 "NV_PDISP_SOR_AUDIO_AVAL_0480_0,Audio AVAL 48 KHz" hexmask.long.tbyte 0x10 0.--19. 1. " VALUE ,The correct A value for 48 KHz audio at the current pixel clock frequency" line.long 0x14 "NV_PDISP_SOR_AUDIO_AVAL_0960_0,Audio AVAL 96 KHz" hexmask.long.tbyte 0x14 0.--19. 1. " VALUE ,The correct A value for 96 KHz audio at the current pixel clock frequency" line.long 0x18 "NV_PDISP_SOR_AUDIO_AVAL_1920_0,Audio AVAL 192 KHz" hexmask.long.tbyte 0x18 0.--19. 1. " VALUE ,The correct A value for 192 KHz audio at the current pixel clock frequency" line.long 0x1C "NV_PDISP_SOR_AUDIO_AVAL_DEFAULT_0,Audio AVAL Default" hexmask.long.tbyte 0x1C 0.--19. 1. " VALUE ,Default A value if the Azalia codec sampling frequency does not match any" line.long 0x20 "NV_PDISP_SOR_AUDIO_GEN_CTRL_0,SOR Audio GEN Control" hexmask.long.word 0x20 16.--31. 1. " DEV_ID ,Device ID to identify the current chip" hexmask.long.byte 0x20 0.--7. 1. " REV_ID ,Rev ID for the codec" group.long 0x470++0x0B line.long 0x00 "NV_PDISP_INT_STATUS_0,NV PDISP Interrupt Status" sif (cpuis("TEGRAX2")) eventfld.long 0x00 21. " LANE3_FIFO_OVERFLOW ,LANE3 FIFO overflow" "No interrupt,Interrupt" eventfld.long 0x00 20. " LANE2_FIFO_OVERFLOW ,LANE2 FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " LANE1_FIFO_OVERFLOW ,LANE1 FIFO overflow" "No interrupt,Interrupt" eventfld.long 0x00 18. " LANE0_FIFO_OVERFLOW ,LANE0 FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " SPKT_OVERRUN ,SPKT overrun" "No interrupt,Interrupt" eventfld.long 0x00 16. " LANE3_STEER_ERROR ,LANE3 steer error" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " LANE2_STEER_ERROR ,LANE2 steer error" "No interrupt,Interrupt" eventfld.long 0x00 14. " LANE1_STEER_ERROR ,LANE1 steer error" "No interrupt,Interrupt" textline " " eventfld.long 0x00 13. " LANE0_STEER_ERROR ,LANE0 steer error" "No interrupt,Interrupt" eventfld.long 0x00 12. " LANE3_PIXPACK_OVERFLOW ,LANE3 pixpack overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " LANE2_PIXPACK_OVERFLOW ,LANE2 pixpack overflow" "No interrupt,Interrupt" eventfld.long 0x00 10. " LANE1_PIXPACK_OVERFLOW ,LANE1 pixpack overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " LANE0_PIXPACK_OVERFLOW ,LANE0 pixpack overflow" "No interrupt,Interrupt" eventfld.long 0x00 8. " LANE3_FIFO_UNDERFLOW ,LANE3 FIFO underflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " LANE2_FIFO_UNDERFLOW ,LANE2 FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 6. " LANE1_FIFO_UNDERFLOW ,LANE1 FIFO underflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 5. " LANE0_FIFO_UNDERFLOW ,LANE0 FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 4. " REG_SECURE_ACCESS_ERR ,REG secure access error" "No interrupt,Interrupt" textline " " endif eventfld.long 0x00 3. " SCRATCH ,Scratch" "No interrupt,Interrupt" eventfld.long 0x00 2. " CP_REQUEST ,CP Request" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " CODEC_SCRATCH1 ,Codec scratch1" "No interrupt,Interrupt" eventfld.long 0x00 0. " CODEC_SCRATCH0 ,Codec scratch0" "No interrupt,Interrupt" line.long 0x04 "NV_PDISP_INT_MASK_0,NV PDISP Interrupt Masked" sif (cpuis("TEGRAX2")) bitfld.long 0x04 21. " LANE3_FIFO_OVERFLOW_MASK ,LANE3 FIFO overflow mask" "Masked,Not masked" bitfld.long 0x04 20. " LANE2_FIFO_OVERFLOW_MASK ,LANE2 FIFO overflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " LANE1_FIFO_OVERFLOW_MASK ,LANE1 FIFO overflow mask" "Masked,Not masked" bitfld.long 0x04 18. " LANE0_FIFO_OVERFLOW_MASK ,LANE0 FIFO overflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 17. " SPKT_OVERRUN_MASK ,SPKT overrun mask" "Masked,Not masked" bitfld.long 0x04 16. " LANE3_STEER_ERROR_MASK ,LANE3 steer error mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " LANE2_STEER_ERROR_MASK ,LANE2 steer error mask" "Masked,Not masked" bitfld.long 0x04 14. " LANE1_STEER_ERROR_MASK ,LANE1 steer error mask" "Masked,Not masked" textline " " bitfld.long 0x04 13. " LANE0_STEER_ERROR_MASK ,LANE0 steer error mask" "Masked,Not masked" bitfld.long 0x04 12. " LANE3_PIXPACK_OVERFLOW_MASK ,LANE3 pixpack overflow mask" "Masked,Not Masked" textline " " bitfld.long 0x04 11. " LANE2_PIXPACK_OVERFLOW_MASK ,LANE2 pixpack overflow mask" "Masked,Not masked" bitfld.long 0x04 10. " LANE1_PIXPACK_OVERFLOW_MASK ,LANE1 pixpack overflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 9. " LANE0_PIXPACK_OVERFLOW_MASK ,LANE0 pixpack overflow mask" "Masked,Not masked" bitfld.long 0x04 8. " LANE3_FIFO_UNDERFLOW_MASK ,LANE3 FIFO underflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 7. " LANE2_FIFO_UNDERFLOW_MASK ,LANE2 FIFO underflow mask" "Masked,Not masked" bitfld.long 0x04 6. " LANE1_FIFO_UNDERFLOW_MASK ,LANE1 FIFO underflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 5. " LANE0_FIFO_UNDERFLOW_MASK ,LANE0 FIFO underflow mask" "Masked,Not masked" bitfld.long 0x04 4. " REG_SECURE_ACCESS_ERR_MASK ,REG secure access error" "Masked,Not masked" textline " " endif bitfld.long 0x04 3. " SCRATCH_MASK ,Scratch mask" "Masked,Not masked" bitfld.long 0x04 2. " CP_REQUEST_MASK ,CP request mask" "Masked,Not masked" textline " " bitfld.long 0x04 1. " CODEC_SCRATCH1_MASK ,Codec scratch1 mask" "Masked,Not masked" bitfld.long 0x04 0. " CODEC_SCRATCH0_MASK ,Codec scratch0 mask" "Masked,Not masked" line.long 0x08 "NV_PDISP_INT_ENABLE_0,NV PDISP Interrupt Enable" sif (cpuis("TEGRAX2")) bitfld.long 0x08 21. " LANE3_FIFO_OVERFLOW_ENABLE ,LANE3 FIFO overflow enable" "Disabled,Enabled" bitfld.long 0x08 20. " LANE2_FIFO_OVERFLOW_ENABLE ,LANE2 FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " LANE1_FIFO_OVERFLOW_ENABLE ,LANE1 FIFO overflow enable" "Disabled,Enabled" bitfld.long 0x08 18. " LANE0_FIFO_OVERFLOW_ENABLE ,LANE0 FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " SPKT_OVERRUN_ENABLE ,SPKT overrun enable" "Disabled,Enabled" bitfld.long 0x08 16. " LANE3_STEER_ERROR_ENABLE ,LANE3 steer error enable" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " LANE2_STEER_ERROR_ENABLE ,LANE2 steer error enable" "Disabled,Enabled" bitfld.long 0x08 14. " LANE1_STEER_ERROR_ENABLE ,LANE1 steer error enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " LANE0_STEER_ERROR_ENABLE ,LANE0 steer error enable" "Disabled,Enabled" bitfld.long 0x08 12. " LANE3_PIXPACK_OVERFLOW_ENABLE ,LANE3 pixpack overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " LANE2_PIXPACK_OVERFLOW_ENABLE ,LANE2 pixpack overflow enable" "Disabled,Enabled" bitfld.long 0x08 10. " LANE1_PIXPACK_OVERFLOW_ENABLE ,LANE1 pixpack overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " LANE0_PIXPACK_OVERFLOW_ENABLE ,LANE0 pixpack overflow enable" "Disabled,Enabled" bitfld.long 0x08 8. " LANE3_FIFO_UNDERFLOW_ENABLE ,LANE3 FIFO underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " LANE2_FIFO_UNDERFLOW_ENABLE ,LANE2 FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x08 6. " LANE1_FIFO_UNDERFLOW_ENABLE ,LANE1 FIFO underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " LANE0_FIFO_UNDERFLOW_ENABLE ,LANE0 FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x08 4. " REG_SECURE_ACCESS_ERR_ENABLE ,REG secure access error enable" "Disabled,Enabled" textline " " endif bitfld.long 0x08 3. " SCRATCH_ENABLE ,Scratch enable" "Disabled,Enabled" bitfld.long 0x08 2. " CP_REQUEST_ENABLE ,CP request enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " CODEC_SCRATCH1_ENABLE ,Codec scratch1 enable" "Disabled,Enabled" bitfld.long 0x08 0. " CODEC_SCRATCH0_ENABLE ,Codec scratch0 enable" "Disabled,Enabled" rgroup.long 0x47C++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_M0_LO_0,SOR NV PDISP SOR TMDS HDCP M0 Low" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_M0_HI_0,SOR NV PDISP SOR TMDS HDCP M0 High" group.long 0x484++0x03 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_STATUS_0,SOR NV PDISP SOR TMDS HDCP Status" bitfld.long 0x00 8. " OVERRIDE_ENABLE ,Override enable" "Disabled,Enabled" bitfld.long 0x00 2. " SCOPE_OVERRIDE ,Scope override" "No override,Override" textline " " bitfld.long 0x00 1. " UNPROTECTED_OVERRIDE ,Unprotected override" "No override,Override" bitfld.long 0x00 0. " RPTR_OVERRIDE ,Repeater override" "No override,Override" group.long 0x488++0x07 line.long 0x00 "NV_HDACODEC_AUDIO_GEN_CTL_0,HDACODEC Audio GEN Control" bitfld.long 0x00 4. " COPY_POLARITY ,The polarity of the COPY bit is currently inverted" "Old,New" bitfld.long 0x00 0.--3. " CHSTS_FS_3840 ,CHSTS sampling frequency 384 KHz" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_CTRL_0,HDMI Vendor Specific Infoframe Control" bitfld.long 0x04 16. " VIDEO_FMT ,Specifies how the remaining bytes in the infoframe should be interpreted by the specification" "SW controlled,HW controlled" bitfld.long 0x04 9. " CHKSUM_HW ,Hardware provides a way to calculate the checksum for the infoframes" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " SINGLE ,Cause infoframe to be transmitted exactly once" "Disabled,Enabled" bitfld.long 0x04 4. " OTHER ,Cause infoframe to be transmitted every other frame" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ENABLE ,Initiates infoframe generation" "Disabled,Enabled" rgroup.long 0x490++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_STATUS_0,HDMI Vendor Specific Infoframe Status" bitfld.long 0x00 0. " SENT ,Field will be set to after the first packet is sent" "Waiting,Done" group.long 0x494++0x23 line.long 0x00 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_HEADER_0,HDMI Vendor Specific Infoframe Header" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" line.long 0x04 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK0_LOW_0,HDMI Vendor Specific Infoframe SUBPACK0 Low" hexmask.long.byte 0x04 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x04 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x04 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x04 0.--7. 1. " PB0 ,PB0" line.long 0x08 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK0_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK0 High" hexmask.long.byte 0x08 16.--23. 1. " PB6 ,PB6" hexmask.long.byte 0x08 8.--15. 1. " PB5 ,PB5" textline " " hexmask.long.byte 0x08 0.--7. 1. " PB4 ,PB4" line.long 0x0C "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK1_LOW_0,HDMI Vendor Specific Infoframe SUBPACK1 Low" hexmask.long.byte 0x0C 24.--31. 1. " PB10 ,PB10" hexmask.long.byte 0x0C 16.--23. 1. " PB9 ,PB9" textline " " hexmask.long.byte 0x0C 8.--15. 1. " PB8 ,PB8" hexmask.long.byte 0x0C 0.--7. 1. " PB7 ,PB7" line.long 0x10 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK1_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK1 High" hexmask.long.byte 0x10 16.--23. 1. " PB13 ,PB13" hexmask.long.byte 0x10 8.--15. 1. " PB12 ,PB12" textline " " hexmask.long.byte 0x10 0.--7. 1. " PB11 ,PB11" line.long 0x14 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK2_LOW_0,HDMI Vendor Specific Infoframe SUBPACK2 Low" hexmask.long.byte 0x14 24.--31. 1. " PB17 ,PB17" hexmask.long.byte 0x14 16.--23. 1. " PB16 ,PB16" textline " " hexmask.long.byte 0x14 8.--15. 1. " PB15 ,PB15" hexmask.long.byte 0x14 0.--7. 1. " PB14 ,PB14" line.long 0x18 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK2_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK2 High" hexmask.long.byte 0x18 16.--23. 1. " PB20 ,PB20" hexmask.long.byte 0x18 8.--15. 1. " PB19 ,PB19" textline " " hexmask.long.byte 0x18 0.--7. 1. " PB18 ,PB18" line.long 0x1C "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK3_LOW_0,HDMI Vendor Specific Infoframe SUBPACK3 Low" hexmask.long.byte 0x1C 24.--31. 1. " PB24 ,PB24" hexmask.long.byte 0x1C 16.--23. 1. " PB23 ,PB23" textline " " hexmask.long.byte 0x1C 8.--15. 1. " PB22 ,PB22" hexmask.long.byte 0x1C 0.--7. 1. " PB21 ,PB21" line.long 0x20 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK3_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK3 High" hexmask.long.byte 0x20 16.--23. 1. " PB27 ,PB27" hexmask.long.byte 0x20 8.--15. 1. " PB26 ,PB26" textline " " hexmask.long.byte 0x20 0.--7. 1. " PB25 ,PB25" group.long 0x4C0++0x27 line.long 0x00 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_HEADER_0,SOR DP Audio InfoFrame Header" hexmask.long.byte 0x00 24.--31. 1. " HB3 ,HB3" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" textline " " hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" line.long 0x04 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_SUBPACK0_LOW_0,SOR DP Audio InfoFrame SUBPACK0 Low" hexmask.long.byte 0x04 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x04 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x04 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x04 0.--7. 1. " PB0 ,PB0" line.long 0x08 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_SUBPACK0_HIGH_0,SOR DP Audio InfoFrame SUBPACK0 High" hexmask.long.byte 0x08 8.--15. 1. " PB5 ,PB5" hexmask.long.byte 0x08 0.--7. 1. " PB4 ,PB4" line.long 0x0C "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0320_0,SOR DP Audio Timestamp 32 KHz" hexmask.long.word 0x0C 16.--31. 1. " N ,N" hexmask.long.word 0x0C 0.--15. 1. " D_M ,D_N" line.long 0x10 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0441_0,SOR DP Audio Timestamp 44.1 KHz" hexmask.long.word 0x10 16.--31. 1. " N ,N" hexmask.long.word 0x10 0.--15. 1. " D_M ,D_N" line.long 0x14 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0882_0,SOR DP Audio Timestamp 88.2 KHz" hexmask.long.word 0x14 16.--31. 1. " N ,N" hexmask.long.word 0x14 0.--15. 1. " D_M ,D_N" line.long 0x18 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_1764_0,SOR DP Audio Timestamp 176.4" hexmask.long.word 0x18 16.--31. 1. " N ,N" hexmask.long.word 0x18 0.--15. 1. " D_M ,D_N" line.long 0x1C "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0480_0,SOR DP Audio Timestamp 48 KHz" hexmask.long.word 0x1C 16.--31. 1. " N ,N" hexmask.long.word 0x1C 0.--15. 1. " D_M ,D_N" line.long 0x20 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0960_0,SOR DP Audio Timestamp 96 KHz" hexmask.long.word 0x20 16.--31. 1. " N ,N" hexmask.long.word 0x20 0.--15. 1. " D_M ,D_N" line.long 0x24 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_1920_0,SOR DP Audio Timestamp 192 KHz" hexmask.long.word 0x24 16.--31. 1. " N ,N" hexmask.long.word 0x24 0.--15. 1. " D_M ,D_N" group.long 0x4F0++0x03 line.long 0x00 "NV_PDISP_HDMI_AUDIO_N_0,Audio N" bitfld.long 0x00 28. " LOOKUP ,Hardware will select the appropriate value of N" "Disabled,Enabled" rgroup.long 0x4F4++0x03 line.long 0x00 "NV_PDISP_HDMI_LANE_CALIB_FUSE_0,NV PDISP HDMI Lane Calibration Fuse" hexmask.long.byte 0x00 24.--31. 1. " LANE3_CALIB ,Lane 3 calibration" hexmask.long.byte 0x00 16.--23. 1. " LANE2_CALIB ,Lane 2 calibration" textline " " hexmask.long.byte 0x00 8.--15. 1. " LANE1_CALIB ,Lane 1 calibration" hexmask.long.byte 0x00 0.--7. 1. " LANE0_CALIB ,Lane 0 calibration" group.long 0x4F8++0x0F line.long 0x00 "NV_PDISP_SOR_HDMI2_CTRL_0,NV PDISP SOR HDMI2 Control" hexmask.long.word 0x00 16.--31. 1. " SSCP_START ,This sets the start point of the SSCP period" bitfld.long 0x00 4.--7. " SSCP_LENGTH ,This sets the length of the SSCP period which is output once per frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2. " SCRAMBLE_AT_LOADV ,Scramble at LOADV" "Disabled,Enabled" bitfld.long 0x00 1. " CLOCK_MODE ,This bit allows the clock signal to be divide by 4" "Normal,Mode DIV by4" textline " " bitfld.long 0x00 0. " SCRAMBLE ,This bit enables scrambling for HDMI 2.0" "Disabled,Enabled" line.long 0x04 "NV_PDISP_SOR_HDMI2_LFSR0_0,NV PDISP SOR HDMI2 LFSR0" hexmask.long.word 0x04 16.--31. 1. " LANE1_SEED ,Lane 1 seed" hexmask.long.word 0x04 0.--15. 1. " LANE0_SEED ,Lane 0 seed" line.long 0x08 "NV_PDISP_SOR_HDMI2_LFSR1_0,NV PDISP SOR HDMI2 LFSR1" hexmask.long.word 0x08 0.--15. 1. " LANE2_SEED ,Lane 2 seed" line.long 0x0C "NV_PDISP_SOR_HDCP22_CTRL_0,HDCP 2.2 Control Register" bitfld.long 0x0C 6. " DISABLE_LANE_CNT0 ,Enables HW to disable encryption when SOR lane count is set to 0" "Yes,No" bitfld.long 0x0C 5. " DISABLE_DETACH ,Enables HW to disable encryption when SOR is detached from the head" "Yes,No" textline " " bitfld.long 0x0C 4. " REPEATER ,Reporting that the SOR is authenticated with a downstream REPEATER " "Yes,No" bitfld.long 0x0C 2. " LOCK_TYPE ,Protected software write to the TYPE register" "Unlocked,Locked" textline " " bitfld.long 0x0C 1. " INIT ,Initial value to indicate a fresh start of a new session" "Done,Triggered" bitfld.long 0x0C 0. " CRYPT ,Would actually start encrypting the incoming data" "Disabled,Enabled" rgroup.long 0x508++0x03 line.long 0x00 "NV_PDISP_SOR_HDCP22_STATUS_0,HDCP 2.2 Status register" bitfld.long 0x00 9.--11. " HDCP_STATE ,HDCP_STATE" "Idle,Wait LC128,Wait AES ready,HDCP22 enable,HDMI encrypt on,DP encrypt on,?..." bitfld.long 0x00 7.--8. " AUTODIS_STATE ,AUTODIS state" "Idle,Encrypting,Disabled LC_0,Disabled detach" textline " " bitfld.long 0x00 6. " LC128_ERROR ,LC128 error" "No,Yes" bitfld.long 0x00 5. " LANE_CNT0_DISABLE ,Lane CNT0 disable" "No,Yes" textline " " bitfld.long 0x00 4. " DETACHED_DISABLE ,Detached disable" "No,Yes" bitfld.long 0x00 3. " DATA_CNT_OVERFLOW ,This indicates if the Data counter has overflowed" "No,Yes" textline " " bitfld.long 0x00 2. " FRAME_CNT_OVERFLOW ,This indicates if the Frame counter has overflowed" "No overflow,Overflow" bitfld.long 0x00 0. " CRYPT_STATUS ,Reports the actual link encryption status" "Inactive,Active" group.long 0x510++0x2B line.long 0x00 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_MSB_0,AES-CTR Key Bus MBS" line.long 0x04 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB1_0,AES-CTR Key Bus LSB1" line.long 0x08 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB2_0,AES-CTR Key Bus LSB2" line.long 0x0C "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB3_0,AES-CTR Key Bus LSB3" line.long 0x10 "NV_PDISP_SOR_HDCP22_AES_CTR_DATA_MSB_0,AES-CTR Data Bus MBS" line.long 0x14 "NV_PDISP_SOR_HDCP22_AES_CTR_DATA_LSB_0,AES-CTR Data Bus LBS" line.long 0x18 "NV_PDISP_SOR_HDCP22_SST_DP_TYPE_0,AES-CTR DP Type" hexmask.long.byte 0x18 0.--7. 1. " VALUE ,Value" line.long 0x1C "NV_PDISP_SOR_HDCP22_LC128_MSB_0,NV PDISP SOR HDCP22 LC128 MSB" line.long 0x20 "NV_PDISP_SOR_HDCP22_LC128_LSB1_0,NV PDISP SOR HDCP22 LC128 LSB1" line.long 0x24 "NV_PDISP_SOR_HDCP22_LC128_LSB2_0,NV PDISP SOR HDCP22 LC128 LSB2" line.long 0x28 "NV_PDISP_SOR_HDCP22_LC128_LSB3_0,NV PDISP SOR HDCP22 LC128 LSB3" sif (cpuis("TEGRAX2")) rgroup.long 0x53C++0x03 line.long 0x00 "CTXSW_0_NEXT_0,Context Switch Register" hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL ,Next requested channel" hexmask.long.word 0x00 0.--9. 1. " NEXT_CLASS ,Next requested class" group.long 0x540++0x03 line.long 0x00 "CTXSW_0,Context Switch Register" hexmask.long.word 0x00 11.--20. 1. " CURR_CHANNEL ,Current working channel" bitfld.long 0x00 10. " AUTO_ACK ,Automatically acknowledge any incoming context switch requests" "Manual,Auto ACK" textline " " hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" group.long 0x544++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE0_0,Head Control Register" bitfld.long 0x00 4.--5. " INTERLACED ,Interlaced is not supported" "Progressive,?..." bitfld.long 0x00 3. " RANGECOMPRESS ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DYNRANGE ,Sets the dynamic range for the output" "VESA,CEA" bitfld.long 0x00 0.--1. " COLORSPACE ,YUV_601/YUV_709 are not supported" "RGB,?..." group.long 0x548++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE0_1,Head Control Register" bitfld.long 0x00 4.--5. " INTERLACED ,Interlaced is not supported" "Progressive,?..." bitfld.long 0x00 3. " RANGECOMPRESS ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DYNRANGE ,Sets the dynamic range for the output" "VESA,CEA" bitfld.long 0x00 0.--1. " COLORSPACE ,YUV_601/YUV_709 are not supported" "RGB,?..." group.long 0x54C++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE0_2,Head Control Register" bitfld.long 0x00 4.--5. " INTERLACED ,Interlaced is not supported" "Progressive,?..." bitfld.long 0x00 3. " RANGECOMPRESS ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DYNRANGE ,Sets the dynamic range for the output" "VESA,CEA" bitfld.long 0x00 0.--1. " COLORSPACE ,YUV_601/YUV_709 are not supported" "RGB,?..." group.long 0x550++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE1_0,Size Of The Raster" hexmask.long.word 0x00 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x00 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" group.long 0x554++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE1_1,Size Of The Raster" hexmask.long.word 0x00 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x00 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" group.long 0x558++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE1_2,Size Of The Raster" hexmask.long.word 0x00 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x00 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" group.long 0x55C++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE2_0,Location Of The Horizontal And Vertical Sync End" hexmask.long.word 0x00 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x00 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" group.long 0x560++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE2_1,Location Of The Horizontal And Vertical Sync End" hexmask.long.word 0x00 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x00 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" group.long 0x564++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE2_2,Location Of The Horizontal And Vertical Sync End" hexmask.long.word 0x00 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x00 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" group.long 0x568++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE3_0,Location Of The Horizontal And Vertical Blank End" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x00 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" group.long 0x56C++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE3_1,Location Of The Horizontal And Vertical Blank End" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x00 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" group.long 0x570++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE3_2,Location Of The Horizontal And Vertical Blank End" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x00 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" group.long 0x574++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE4_0,Location Of The Horizontal And Vertical Blank Start" hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x00 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" group.long 0x578++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE4_1,Location Of The Horizontal And Vertical Blank Start" hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x00 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" group.long 0x57C++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE4_2,Location Of The Horizontal And Vertical Blank Start" hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x00 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" group.long 0x580++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE5_0,Interlaced Mode" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x00 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" group.long 0x584++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE5_1,Interlaced Mode" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x00 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" group.long 0x588++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE5_2,Interlaced Mode" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x00 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" textline " " group.long 0x58C++0x13 line.long 0x00 "NV_PDISP_SOR_PLL0_0,NV PDISP SOR PLL0" bitfld.long 0x00 24.--27. " ICHPMP ,Additions to the charge pump current" "0,0.375 uA,0.75 uA,1.125 uA,1.5 uA,1.875 uA,2.25 uA,2.625 uA,3 uA,3.375 uA,3.75 uA,4.125 uA,4.5 uA,4.875 uA,5.25 uA,5.625 uA" textline " " bitfld.long 0x00 19. " FILTER[3] ,Controls this VCO startup bit for the TMDS_DUAL macro" "Normal operation,Forced VCO" bitfld.long 0x00 16.--18. " FILTER[2:0] ,Select the loop filter and adjust the filter resistor value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--13. " TXREG_LEVEL ,TXREG level" "V25,V15,V35,V45" bitfld.long 0x00 8.--11. " VCOCAP ,Selects the VCO capacitor and adjusts ring oscillator inter-stage load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6.--7. " PLLREG_LEVEL ,PLLREG level" "V25,V15,V35,V45" bitfld.long 0x00 5. " PULLDOWN ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " VCOPD ,VCOPD" "Rescind,Assert" bitfld.long 0x00 0. " PWR ,Power" "On,Off" line.long 0x04 "NV_PDISP_SOR_PLL1_0,Configure The Main SOR PLL1" bitfld.long 0x04 29. " COHERENTMODE ,Coherent mode" "Disabled,Enabled" bitfld.long 0x04 20.--23. " LOADADJ ,Load pulse position adjust" "Center,?..." textline " " rbitfld.long 0x04 15. " TERM_COMPOUT ,Termination calibration status" "Low,High" bitfld.long 0x04 9.--12. " TMDS_TERMADJ ,Termination resistance control" "Lowest,1,2,3,4,5,6,7,OHM500,9,10,11,12,13,14,Highest" textline " " bitfld.long 0x04 8. " TMDS_TERM ,Termination enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " IOCURRENT ,Used for I/O control" "RST,?..." line.long 0x08 "NV_PDISP_SOR_PLL2_0,Configure The Main SOR PLL2" bitfld.long 0x08 28.--31. " PLL_MDIV ,PLL M divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 26.--27. " CLKGEN_MODE ,CLKGEN mode" "LVDS,DP TMDS,?..." textline " " bitfld.long 0x08 25. " AUX9 ,AUX9 - LVDSEN" "Allow,Override" bitfld.long 0x08 24. " AUX8 ,AUX8 - sequencer PLLCAPPD enforce" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " AUX7 ,AUX7 - port powerdown" "Disabled,Enabled" bitfld.long 0x08 22. " AUX6 ,AUX6 - bandgap powerdown" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " AUX5 ,AUX5 - link LVDS" "Single,Dual" bitfld.long 0x08 20. " AUX4 ,AUX4 - duplicate control" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " AUX3 ,AUX3 - rotate" "Disabled,Enabled" bitfld.long 0x08 18. " AUX2 ,AUX2 - powerdown" "Override,Allow" textline " " bitfld.long 0x08 17. " AUX1 ,AUX1 - sequencer PLLCAPPD" "Allow,Override" bitfld.long 0x08 16. " AUX0 ,AUX0 - sequencer PLL pulldown" "Allow,Override" textline " " hexmask.long.byte 0x08 8.--15. 1. " PLL_NDIV ,PLL NDIV" bitfld.long 0x08 4.--7. " PLL_PDIV ,PLL P divider" "BY 1,BY 2,BY 4,BY 8,BY 16,?..." textline " " bitfld.long 0x08 2.--3. " PLL_PDIV_MODE ,PLL PDIV mode" "LVDS mode,TMDS DP mode,EDP RATE3 mode,?..." bitfld.long 0x08 1. " DIV_RATIO_OVERRIDE ,DIV ratio override" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " DCIR_PLL_RESET ,DCIR PLL reset" "Override,Allow" line.long 0x0C "NV_PDISP_SOR_PLL3_0,Directly Controls The SOR Analog Macro" bitfld.long 0x0C 28.--31. " BG_TEMP_COEF ,Bandgap temperature coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. " BG_VREF_LEVEL ,Bandgap output voltages" "0.588 V,0.602 V,0.616 V,0.63 V,0.644 V,0.658 V,0.672 V,0.686 V,0.7 V,0.714 V,0.728 V,0.742 V,0.756 V,0.77 V,0.784 V,0.798 V" textline " " hexmask.long.byte 0x0C 16.--23. 1. " TEST_REFCLK_EN ,Test REFCLK EN" bitfld.long 0x0C 14. " PLL_BYPASS ,PLL bypass" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " PLLVDD_MODE ,Field to determine the PLL voltage" "1.8 V,3.3 V" bitfld.long 0x0C 12. " CLKDIST_MODE ,Clock distribution by CMOS/CML buffers" "CMOS,CML" textline " " bitfld.long 0x0C 8.--11. " AVDD10_LEVEL ,Internal regulated 1.0v voltage level control bits" ",,,0.95 V,1.00 V,1.05 V,1.10 V,?..." bitfld.long 0x0C 4.--7. " AVDD14_LEVEL ,Internal regulated 1.4v voltage level control bits" ",,,1.35 V,1.40 V,1.45 V,1.50 V,?..." textline " " bitfld.long 0x0C 0.--1. " KICKSTART ,Short loop-filter [%] of AVDD14" "Disabled,Loop 40,Loop 50,Loop 60" line.long 0x10 "NV_PDISP_SOR_PLL4_0,SOR NV PDISP SOR PLL4" bitfld.long 0x10 24.--29. " SETUP_LCKDET ,Setup LCKDET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 23. " LOCK_OVERRIDE ,Lock override" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " ENABLE_LCKDET ,Enable LCKDET" "Enabled,Disabled" rbitfld.long 0x10 21. " LOCKDET ,Status signal indicating whether PLL is locked within the desired resolution" "Not locked,Locked" textline " " bitfld.long 0x10 6.--7. " AVDD10_LOAD ,Internal regulated 1.0V extra loading for stability control bits" "0 mA,1 mA,2 mA,3 mA" bitfld.long 0x10 4.--5. " AVDD14_LOAD ,Internal regulated 1.4V extra loading for stability control bits" "0 uA,175 uA,350 uA,525 uA" if (((per.l(ad:0x54540000+0x130))&0x01)==0x01) group.long 0x5A0++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" bitfld.long 0x00 3. " PD_TXD_3 ,Controls to power down the lane 3" "Yes,No" textline " " bitfld.long 0x00 2. " PD_TXD_0 ,Controls to power down the lane 0" "Yes,No" bitfld.long 0x00 1. " PD_TXD_1 ,Controls to power down the lane 1" "Yes,No" textline " " bitfld.long 0x00 0. " PD_TXD_2 ,Controls to power down the lane 2" "Yes,No" else group.long 0x5A0++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" endif if (((per.l(ad:0x54540000+0x134))&0x01)==0x01) group.long 0x5A4++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL 1" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" bitfld.long 0x00 3. " PD_TXD_3 ,Controls to power down the lane 3" "Yes,No" textline " " bitfld.long 0x00 2. " PD_TXD_0 ,Controls to power down the lane 0" "Yes,No" bitfld.long 0x00 1. " PD_TXD_1 ,Controls to power down the lane 1" "Yes,No" textline " " bitfld.long 0x00 0. " PD_TXD_2 ,Controls to power down the lane 2" "Yes,No" else group.long 0x5A4++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" endif group.long 0x5A8++0x23 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL2_0,SOR DP PADCTL2" hexmask.long.byte 0x00 24.--31. 1. " SPAREPLL ,Spare PLL" bitfld.long 0x00 20.--23. " SPARE4 ,Spare 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16.--19. " SPARE3 ,Spare 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " SPARE2 ,Spare 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " SPARE1 ,Spare 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " SPARE0 ,Spare 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " REG_BYPASS ,REG bypass" "0,1" line.long 0x04 "NV_PDISP_SOR_DP_PADCTL3_0,SOR DP PADCTL3" hexmask.long.byte 0x04 24.--31. 1. " TX_PATTERN_GEN ,TX pattern GEN" line.long 0x08 "NV_PDISP_SOR_DP_BS,Program The Timing Of The Scrambler Reset" bitfld.long 0x08 19. " OVERRIDE ,Override" "Done,Pending" hexmask.long.word 0x08 10.--18. 1. " CNT_STATUS ,Value of running BS count" textline " " rbitfld.long 0x08 9. " OVERRIDE_DEBUG ,Reports the BS_OVERRIDE status of each of the 8-Lane DP primary/secondary pipelines" "Done,Pending" hexmask.long.word 0x08 0.--8. 1. " CNT ,Count" line.long 0x0C "NV_PDISP_SOR_DP_MISC1_OVERRIDE_0,SOR DP MISC1 Override" bitfld.long 0x0C 31. " CNTL ,CNTL" "Done,Pending" bitfld.long 0x0C 0. " ENABLE ,Enables MISC bit 6 overriding" "Disabled,Enabled" line.long 0x10 "NV_PDISP_SOR_DP_MISC1_BIT6_0,SOR DP MISC1 Bit 6" bitfld.long 0x10 0. " VAL ,Value" "0,1" line.long 0x14 "NV_PDISP_DP_INT_STATUS_0,DP Interrupt Status" eventfld.long 0x14 16. " LANE3_FIFO_OVERFLOW ,Lane 3 FIFO overflow" "Not interrupt,Interrupt" eventfld.long 0x14 15. " LANE2_FIFO_OVERFLOW ,Lane 2 FIFO overflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 14. " LANE1_FIFO_OVERFLOW ,Lane 1 FIFO overflow" "Not interrupt,Interrupt" eventfld.long 0x14 13. " LANE0_FIFO_OVERFLOW ,Lane 0 FIFO overflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 12. " SPKT_OVERRUN ,SPKT overrun" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 11. " LANE3_STEER_ERROR ,Lane 3 steer error" "Not interrupt,Interrupt" eventfld.long 0x14 10. " LANE2_STEER_ERROR ,Lane 2 steer error" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 9. " LANE1_STEER_ERROR ,Lane 1 steer error" "Not interrupt,Interrupt" eventfld.long 0x14 8. " LANE0_STEER_ERROR ,Lane 0 steer error" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 7. " LANE3_PIXPACK_OVERFLOW ,Lane 3 pixpack overflow" "Not interrupt,Interrupt" eventfld.long 0x14 6. " LANE2_PIXPACK_OVERFLOW ,Lane 2 pixpack overflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 5. " LANE1_PIXPACK_OVERFLOW ,Lane 1 pixpack overflow" "Not interrupt,Interrupt" eventfld.long 0x14 4. " LANE0_PIXPACK_OVERFLOW ,Lane 0 pixpack overflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 3. " LANE3_FIFO_UNDERFLOW ,Lane 3 FIFO underflow" "Not interrupt,Interrupt" eventfld.long 0x14 2. " LANE2_FIFO_UNDERFLOW ,Lane 2 FIFO underflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 1. " LANE1_FIFO_UNDERFLOW ,Lane 1 FIFO underflow" "Not interrupt,Interrupt" eventfld.long 0x14 0. " LANE0_FIFO_UNDERFLOW ,Lane 0 FIFO underflow" "Not interrupt,Interrupt" line.long 0x18 "NV_PDISP_DP_INT_MASK_0,DP Interrupt Mask" bitfld.long 0x18 16. " LANE3_FIFO_OVERFLOW_MASK ,LANE3 FIFO overflow mask" "Masked,Not masked" bitfld.long 0x18 15. " LANE2_FIFO_OVERFLOW_MASK ,LANE2 FIFO overflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 14. " LANE1_FIFO_OVERFLOW_MASK ,LANE1 FIFO overflow mask" "Masked,Not masked" bitfld.long 0x18 13. " LANE0_FIFO_OVERFLOW_MASK ,LANE0 FIFO overflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 12. " SPKT_OVERRUN_MASK ,SPKT overrun mask" "Masked,Not masked" bitfld.long 0x18 11. " LANE3_STEER_ERROR_MASK ,LANE3 steer error mask" "Masked,Not masked" textline " " bitfld.long 0x18 10. " LANE2_STEER_ERROR_MASK ,LANE2 steer error mask" "Masked,Not masked" bitfld.long 0x18 9. " LANE1_STEER_ERROR_MASK ,LANE1 steer error mask" "Masked,Not masked" textline " " bitfld.long 0x18 8. " LANE0_STEER_ERROR_MASK ,LANE0 steer error mask" "Masked,Not masked" bitfld.long 0x18 7. " LANE3_PIXPACK_OVERFLOW_MASK ,LANE3 pixpack overflow mask" "Masked,Not Masked" textline " " bitfld.long 0x18 6. " LANE2_PIXPACK_OVERFLOW_MASK ,LANE2 pixpack overflow mask" "Masked,Not masked" bitfld.long 0x18 5. " LANE1_PIXPACK_OVERFLOW_MASK ,LANE1 pixpack overflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 4. " LANE0_PIXPACK_OVERFLOW_MASK ,LANE0 pixpack overflow mask" "Masked,Not masked" bitfld.long 0x18 3. " LANE3_FIFO_UNDERFLOW_MASK ,LANE3 FIFO underflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 2. " LANE2_FIFO_UNDERFLOW_MASK ,LANE2 FIFO underflow mask" "Masked,Not masked" bitfld.long 0x18 1. " LANE1_FIFO_UNDERFLOW_MASK ,LANE1 FIFO underflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 0. " LANE0_FIFO_UNDERFLOW_MASK ,LANE0 FIFO underflow mask" "Masked,Not masked" line.long 0x1C "NV_PDISP_DP_INT_ENABLE_0,DP Interrupt Enable" bitfld.long 0x1C 16. " LANE3_FIFO_OVERFLOW_ENABLE ,LANE3 FIFO overflow enable" "Disabled,Enabled" bitfld.long 0x1C 15. " LANE2_FIFO_OVERFLOW_ENABLE ,LANE2 FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 14. " LANE1_FIFO_OVERFLOW_ENABLE ,LANE1 FIFO overflow enable" "Disabled,Enabled" bitfld.long 0x1C 13. " LANE0_FIFO_OVERFLOW_ENABLE ,LANE0 FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 12. " SPKT_OVERRUN_ENABLE ,SPKT overrun enable" "Disabled,Enabled" bitfld.long 0x1C 11. " LANE3_STEER_ERROR_ENABLE ,LANE3 steer error enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " LANE2_STEER_ERROR_ENABLE ,LANE2 steer error enable" "Disabled,Enabled" bitfld.long 0x1C 9. " LANE1_STEER_ERROR_ENABLE ,LANE1 steer error enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " LANE0_STEER_ERROR_ENABLE ,LANE0 steer error enable" "Disabled,Enabled" bitfld.long 0x1C 7. " LANE3_PIXPACK_OVERFLOW_ENABLE ,LANE3 pixpack overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 6. " LANE2_PIXPACK_OVERFLOW_ENABLE ,LANE2 pixpack overflow enable" "Disabled,Enabled" bitfld.long 0x1C 5. " LANE1_PIXPACK_OVERFLOW_ENABLE ,LANE1 pixpack overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " LANE0_PIXPACK_OVERFLOW_ENABLE ,LANE0 pixpack overflow enable" "Disabled,Enabled" bitfld.long 0x1C 3. " LANE3_FIFO_UNDERFLOW_ENABLE ,LANE3 FIFO underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 2. " LANE2_FIFO_UNDERFLOW_ENABLE ,LANE2 FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x1C 1. " LANE1_FIFO_UNDERFLOW_ENABLE ,LANE1 FIFO underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " LANE0_FIFO_UNDERFLOW_ENABLE ,LANE0 FIFO underflow enable" "Disabled,Enabled" line.long 0x20 "NV_PDISP_SOR_VPR_POLICY_0,SOR VPR Policy Table Register" bitfld.long 0x20 3. " ALLOW_DIGITAL_OUT ,Allow digital output" "Disallow,Allow" bitfld.long 0x20 2. " ALLOW_INTERNAL_PANEL ,Allow internal panel output" "Disallow,Allow" textline " " bitfld.long 0x20 1. " ALLOW_HDCP1X_PROTECTED , Allow HDCP1.x protected output" "Disallow,Allow" bitfld.long 0x20 0. " ALLOW_HDCP22_PROTECTED ,Allow HDCP2.2 protected output" "Disallow,Allow" endif width 0x0B tree.end tree "SOR1" base ad:0x54580000 width 51. sif (!cpuis("TEGRAX2")) group.long 0x00++0x03 line.long 0x00 "CTXSW_0,Context Switch Register" rbitfld.long 0x00 28.--31. " NEXT_CHANNEL ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--25. 1. " NEXT_CLASS ,Next requested class" textline " " bitfld.long 0x00 12.--15. " CURR_CHANNEL ,Current working channel reset to invalid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " AUTO_ACK ,Automatically acknowledge any incoming context switch requests" "Manual,Autoack" textline " " hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" endif group.long 0x04++0x0F line.long 0x00 "NV_PDISP_SOR_SUPER_STATE0_0,State Supervisor" bitfld.long 0x00 0. " UPDATE ,Update" "Not updated,Updated" line.long 0x04 "NV_PDISP_SOR_SUPER_STATE1_0,Triple Buffered Register" bitfld.long 0x04 3. " ATTACHED ,Attached SOR to display head" "No,Yes" bitfld.long 0x04 2. " ASY_ORMODE ,SOR sending active data" "Safe,Normal" textline " " bitfld.long 0x04 0.--1. " ASY_HEAD_OPMODE ,Display sending active pixels to SOR" "Sleep,Snooze,Awake,?..." line.long 0x08 "NV_PDISP_SOR_STATE0_0,NV PDISP SOR STATE0" bitfld.long 0x08 0. " UPDATE ,Update" "Not updated,Updated" line.long 0x0C "NV_PDISP_SOR_STATE1_0,SOR Control Register" sif (cpuis("TEGRAX2")) bitfld.long 0x0C 17.--20. " ASY_PIXELDEPTH ,The pixel depth" "DEFAULTVAL,BPP_16_422,BPP_18_4444,,,BPP_24_444,BPP_30_444,,BPP_36_444,?..." textline " " else bitfld.long 0x0C 17.--20. " ASY_PIXELDEPTH ,The pixel depth" "DEFAULTVAL,,BPP_18_4444,,,BPP_24_444,?..." textline " " endif bitfld.long 0x0C 15.--16. " ASY_REPLICATE ,HDMI pixel replication enable/disable" "Off,x2,x4,?..." textline " " bitfld.long 0x0C 14. " ASY_DEPOL ,ASY DEPOL" "Positive,Negative" bitfld.long 0x0C 13. " ASY_VSYNCPOL ,ASY VSYNCPOL" "Positive,Negative" textline " " bitfld.long 0x0C 12. " ASY_HSYNCPOL ,ASY HSYNCPOL" "Positive,Negative" bitfld.long 0x0C 8.--11. " ASY_PROTOCOL ,ASY protocol" "LVDS custom,Single TMDS A,Single TMDS B,,,,,,DP A,DP B,,,,,,Custom" textline " " bitfld.long 0x0C 6.--7. " ASY_CRCMODE ,ASY CRCMODE" "Active raster,Complete raster,Non active raster,?..." bitfld.long 0x0C 4.--5. " ASY_SUBOWNER ,ASY SUBOWNER" "None,SUBHEAD0,SUBHEAD1,Both" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x0C 0.--3. " ASY_OWNER ,SOR display pipe control" "None,HEAD0,HEAD1,HEAD2,?..." else bitfld.long 0x0C 0.--3. " ASY_OWNER ,SOR display pipe control" "None,HEAD0,HEAD1,?..." endif sif (!cpuis("TEGRAX2")) group.long 0x14++0x2F line.long 0x00 "NV_PDISP_HEAD_STATE0_0,Head Control 0 Register 0" bitfld.long 0x00 4.--5. " INTERLACED ,Interlaced" "Progressive,Interlaced,?..." bitfld.long 0x00 3. " RANGECOMPRESS ,Compresses the range of an RGB signal" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DYNRANGE ,Dynamic range for the output" "VESA,CEA" bitfld.long 0x00 0.--1. " COLORSPACE ,Colorspace" "RGB,YUV_601,YUV_709,?..." line.long 0x04 "NV_PDISP_HEAD_STATE0_1,Head Control 0 Register 1" bitfld.long 0x04 4.--5. " INTERLACED ,INTERLACED" "Progressive,Interlaced,?..." bitfld.long 0x04 3. " RANGECOMPRESS ,Compresses the range of an RGB signal" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " DYNRANGE ,Dynamic range for the output" "VESA,CEA" bitfld.long 0x04 0.--1. " COLORSPACE ,Colorspace" "RGB,YUV_601,YUV_709,?..." line.long 0x08 "NV_PDISP_HEAD_STATE1_0,Head Control 1 Register 0" hexmask.long.word 0x08 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x08 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" line.long 0x0C "NV_PDISP_HEAD_STATE1_1,Head Control 1 Register 1" hexmask.long.word 0x0C 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x0C 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" line.long 0x10 "NV_PDISP_HEAD_STATE2_0,Head Control 2 Register 0" hexmask.long.word 0x10 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x10 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" line.long 0x14 "NV_PDISP_HEAD_STATE2_1,Head Control 2 Register 1" hexmask.long.word 0x14 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x14 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" line.long 0x18 "NV_PDISP_HEAD_STATE3_0,Head Control 3 Register 0" hexmask.long.word 0x18 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x18 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" line.long 0x1C "NV_PDISP_HEAD_STATE3_1,Head Control 3 Register 1" hexmask.long.word 0x1C 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x1C 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" line.long 0x20 "NV_PDISP_HEAD_STATE4_0,Head Control 4 Register 0" hexmask.long.word 0x20 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x20 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" line.long 0x24 "NV_PDISP_HEAD_STATE4_1,Head Control 4 Register 1" hexmask.long.word 0x24 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x24 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" line.long 0x28 "NV_PDISP_HEAD_STATE5_0,Head Control 5 Register 0" hexmask.long.word 0x28 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x28 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" line.long 0x2C "NV_PDISP_HEAD_STATE5_1,Head Control 5 Register 1" hexmask.long.word 0x2C 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x2C 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" endif group.long 0x44++0x03 line.long 0x00 "NV_PDISP_SOR_CRC_CNTRL_0,CRC Control" bitfld.long 0x00 0. " ARM_CRC_ENABLE ,Arm CRC enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) rgroup.long 0x48++0x03 line.long 0x00 "NV_PDISP_SOR_DP_DEBUG_MVID_0,NV_PDISP_SOR_DP_DEBUG_MVID_0" bitfld.long 0x00 23. " ARM_CRC_ENABLE[23] ,ARM CRC enable 23" "Disabled,Enabled" bitfld.long 0x00 22. " ARM_CRC_ENABLE[22] ,ARM CRC enable 22" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ARM_CRC_ENABLE[21] ,ARM CRC enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " ARM_CRC_ENABLE[20] ,ARM CRC enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ARM_CRC_ENABLE[19] ,ARM CRC enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " ARM_CRC_ENABLE[18] ,ARM CRC enable 18" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " ARM_CRC_ENABLE[17] ,ARM CRC enable 17" "Disabled,Enabled" bitfld.long 0x00 16. " ARM_CRC_ENABLE[16] ,ARM CRC enable 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ARM_CRC_ENABLE[15] ,ARM CRC enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " ARM_CRC_ENABLE[14] ,ARM CRC enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ARM_CRC_ENABLE[13] ,ARM CRC enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " ARM_CRC_ENABLE[12] ,ARM CRC enable 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ARM_CRC_ENABLE[11] ,ARM CRC enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " ARM_CRC_ENABLE[10] ,ARM CRC enable 10" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " ARM_CRC_ENABLE[9] ,ARM CRC enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " ARM_CRC_ENABLE[8] ,ARM CRC enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ARM_CRC_ENABLE[7] ,ARM CRC enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " ARM_CRC_ENABLE[6] ,ARM CRC enable 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ARM_CRC_ENABLE[5] ,ARM CRC enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " ARM_CRC_ENABLE[4] ,ARM CRC enable 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ARM_CRC_ENABLE[3] ,ARM CRC enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " ARM_CRC_ENABLE[2] ,ARM CRC enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARM_CRC_ENABLE[1] ,ARM CRC enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " ARM_CRC_ENABLE[0] ,ARM CRC enable 0" "Disabled,Enabled" endif group.long 0x4C++0x03 line.long 0x00 "NV_PDISP_SOR_CLK_CNTRL_0,NV PDISP SOR Clock CNTRL 0" sif (cpuis("TEGRAX2")) bitfld.long 0x00 2.--6. " DP_LINK_SPEED ,Selects the multiplier used by the analog macro PLL" ",,,,,,G1_62,LVDS,G2_16,G2_43,G2_7,,G3_24,,,,G4_32,,,,G5_4,,,,,,,,,,G8_1,?..." else bitfld.long 0x00 2.--6. " DP_LINK_SPEED ,Selects the multiplier used by the analog macro PLL" ",,,,,,G1_62,LVDS,G2_16,G2_43,G2_7,,G3_24,,,,G4_32,,,,G5_4,,,,,,,,,G8_1,?..." endif bitfld.long 0x00 0.--1. " DP_CLK_SEL ,Selects which clock is used for the internal logic" "Single PCLK,DIFF PCLK,Single DPCLK,DIFF DPCLK" rgroup.long 0x50++0x03 line.long 0x00 "NV_PDISP_SOR_CAP_0,Serial Output Resource" bitfld.long 0x00 31. " LVDS_ONLY ,LVDS only" "False,True" bitfld.long 0x00 25. " DP_B ,DP B" "False,True" textline " " bitfld.long 0x00 24. " DP_A ,DP A" "False,True" bitfld.long 0x00 20. " DDI ,DDI" "False,True" textline " " bitfld.long 0x00 16. " SDI ,SDI" "False,True" bitfld.long 0x00 13. " DISPLAY_OVER_PCIE ,Display over PCIE" "False,True" textline " " bitfld.long 0x00 12. " SINGLE_TMDS_225_MHZ ,Single TMDS 225 MHZ" "False,True" bitfld.long 0x00 11. " DUAL_TMDS ,Dual TMDS" "False,True" textline " " bitfld.long 0x00 10. " DUAL_SINGLE_TMDS ,Dual single TMDS" "False,True" bitfld.long 0x00 9. " SINGLE_TMDS_B ,Single TMDS B" "False,True" textline " " bitfld.long 0x00 8. " SINGLE_TMDS_A ,Single TMDS A" "False,True" bitfld.long 0x00 3. " DUAL_LVDS_24 ,Dual LVDS 24" "False,True" textline " " bitfld.long 0x00 2. " DUAL_LVDS_18 ,Dual LVDS 18" "False,True" bitfld.long 0x00 1. " SINGLE_LVDS 24 ,Single LVDS 24" "False,True" textline " " bitfld.long 0x00 0. " SINGLE_LVDS_18 ,Single LVDS 18" "False,True" group.long 0x54++0x03 line.long 0x00 "NV_PDISP_SOR_PWR_0,Power State Of The SOR" eventfld.long 0x00 31. " SETTING_NEW ,New setting of power mode to take effect" "Done,Pending" rbitfld.long 0x00 28. " MODE ,Currently active state" "Normal,Safe" textline " " rbitfld.long 0x00 24. " HALT_DELAY ,Halt delay" "Done,Active" bitfld.long 0x00 17. " SAFE_START ,Safe start" "Normal,Alt" textline " " bitfld.long 0x00 16. " SAFE_STATE ,Safe operating state" "PD,PU" bitfld.long 0x00 1. " NORMAL_START ,Normal start" "Normal,Alt" textline " " bitfld.long 0x00 0. " NORMAL_STATE ,Sets the normal operating state" "PD,PU" sif (!cpuis("TEGRAX2")) group.long 0x5C++0x0F line.long 0x00 "NV_PDISP_SOR_PLL0_0,NV PDISP_SOR_PLL0_0" bitfld.long 0x00 24.--27. " ICHPMP ,Additions to the charge pump current" "0,0.375 uA,0.75 uA,1.125 uA,1.5 uA,1.875 uA,2.25 uA,2.625 uA,3 uA,3.375 uA,3.75 uA,4.125 uA,4.5 uA,4.875 uA,5.25 uA,5.625 uA" textline " " bitfld.long 0x00 19. " FILTER[3] ,Controls this VCO startup bit for the TMDS_DUAL macro" "Normal operation,Forced VCO" bitfld.long 0x00 16.--18. " FILTER[2:0] ,Select the loop filter and adjust the filter resistor value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--13. " TXREG_LEVEL ,TXREG level" "V25,V15,V35,V45" bitfld.long 0x00 8.--11. " VCOCAP ,Selects the VCO capacitor and adjusts ring oscillator inter-stage load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6.--7. " PLLREG_LEVEL ,PLLREG level" "V25,V15,V35,V45" bitfld.long 0x00 5. " PULLDOWN ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " VCOPD ,VCOPD" "Rescind,Assert" bitfld.long 0x00 0. " PWR ,Power" "On,Off" line.long 0x04 "NV_PDISP_SOR_PLL1_0,Configure The Main SOR PLL1" bitfld.long 0x04 29. " COHERENTMODE ,Coherent mode" "Disabled,Enabled" bitfld.long 0x04 20.--23. " LOADADJ ,Load pulse position adjust" "Center,?..." textline " " rbitfld.long 0x04 15. " TERM_COMPOUT ,Termination calibration status" "Low,High" bitfld.long 0x04 9.--12. " TMDS_TERMADJ ,Termination resistance control" "Lowest,1,2,3,4,5,6,7,OHM500,9,10,11,12,13,14,Highest" textline " " bitfld.long 0x04 8. " TMDS_TERM ,Termination enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " IOCURRENT ,Used for I/O control" "RST,?..." line.long 0x08 "NV_PDISP_SOR_PLL2_0,Configure The Main SOR PLL2" bitfld.long 0x08 28.--31. " PLL_MDIV ,PLL M divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 26.--27. " CLKGEN_MODE ,CLKGEN mode" ",DP TMDS,HBR3,MPHY" textline " " bitfld.long 0x08 25. " AUX9 ,AUX9 - LVDSEN" "Allow,Override" bitfld.long 0x08 24. " AUX8 ,AUX8 - sequencer PLLCAPPD enforce" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " AUX7 ,AUX7 - port powerdown" "Disabled,Enabled" bitfld.long 0x08 22. " AUX6 ,AUX6 - bandgap powerdown" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " AUX5 ,AUX5 - link LVDS" "Single,Dual" bitfld.long 0x08 20. " AUX4 ,AUX4 - duplicate control" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " AUX3 ,AUX3 - rotate" "Disabled,Enabled" bitfld.long 0x08 18. " AUX2 ,AUX2 - powerdown" "Override,Allow" textline " " bitfld.long 0x08 17. " AUX1 ,AUX1 - sequencer PLLCAPPD" "Allow,Override" bitfld.long 0x08 16. " AUX0 ,AUX0 - sequencer PLL pulldown" "Allow,Override" textline " " hexmask.long.byte 0x08 8.--15. 1. " PLL_NDIV ,PLL NDIV" bitfld.long 0x08 4.--7. " PLL_PDIV ,PLL P divider" "BY 1,BY 2,BY 4,BY 8,BY 16,?..." textline " " bitfld.long 0x08 2.--3. " PLL_PDIV_MODE ,PLL PDIV mode" "LVDS mode,TMDS DP mode,EDP RATE3 mode,?..." bitfld.long 0x08 1. " DIV_RATIO_OVERRIDE ,DIV ratio override" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " DCIR_PLL_RESET ,DCIR PLL reset" "Override,Allow" line.long 0x0C "NV_PDISP_SOR_PLL3_0,Directly Controls The SOR Analog Macro" bitfld.long 0x0C 28.--31. " BG_TEMP_COEF ,Bandgap temperature coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. " BG_VREF_LEVEL ,Bandgap output voltages" "0.588 V,0.602 V,0.616 V,0.63 V,0.644 V,0.658 V,0.672 V,0.686 V,0.7 V,0.714 V,0.728 V,0.742 V,0.756 V,0.77 V,0.784 V,0.798 V" textline " " hexmask.long.byte 0x0C 16.--23. 1. " TEST_REFCLK_EN ,Test REFCLK EN" bitfld.long 0x0C 14. " PLL_BYPASS ,PLL bypass" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " PLLVDD_MODE ,Field to determine the PLL voltage" "1.8 V,3.3 V" bitfld.long 0x0C 12. " CLKDIST_MODE ,Clock distribution by CMOS/CML buffers" "CMOS,CML" textline " " bitfld.long 0x0C 8.--11. " AVDD10_LEVEL ,Internal regulated 1.0v voltage level control bits" ",,,0.95 V,1.00 V,1.05 V,1.10 V,?..." bitfld.long 0x0C 4.--7. " AVDD14_LEVEL ,Internal regulated 1.4v voltage level control bits" ",,,1.35 V,1.40 V,1.45 V,1.50 V,?..." textline " " bitfld.long 0x0C 0.--1. " KICKSTART ,Short loop-filter [%] of AVDD14" "Disabled,Loop 40,Loop 50,Loop 60" endif group.long 0x6C++0x03 line.long 0x00 "NV_PDISP_SOR_CSTM_0,Select A Number Of Operating Modes For The SOR" bitfld.long 0x00 28.--30. " ROTDAT ,Right rotated color channel" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--27. " ROTCLK ,Number of sclk cycles which the output clock " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 21. " PLLDIV ,Controls the internal clock dividers of the TMDS_MACRO" ",By 10" bitfld.long 0x00 19. " BALANCED ,Balanced" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " NEW_MODE ,None of the control bits of the second link for dual-link mode" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " LVDS_EN ,Output driver configuration for encoding of the data and output common mode control" "TMDS,?..." bitfld.long 0x00 15. " LINKACTB ,Enables digital logic of links B" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " LINKACTA ,Enables digital logic of links A" "Disabled,Enabled" bitfld.long 0x00 12.--13. " MODE ,Controls the digital output encoding applied to the data stream in custom mode" ",TMDS,?..." textline " " bitfld.long 0x00 11. " UPPER ,LVDS bank A is the upper" "False,True" bitfld.long 0x00 9. " PD_TXCB ,Power down the clock pin of link B" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " PD_TXCA ,Power down the clock pin of link A" "Enabled,Disabled" bitfld.long 0x00 7. " PD_TXDB_3 ,Bitwise control to power down the data pin 3 of link B" "Enabled,Disabled" textline " " bitfld.long 0x00 6. " PD_TXDB_2 ,Bitwise control to power down the data pin 2 of link B" "Enabled,Disabled" bitfld.long 0x00 5. " PD_TXDB_1 ,Bitwise control to power down the data pin 1 of link B" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " PD_TXDB_0 ,Bitwise control to power down the data pin 0 of link B" "Enabled,Disabled" bitfld.long 0x00 3. " PD_TXDA_3 ,Bitwise control to power down the data pin 3 of link A" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " PD_TXDA_2 ,Bitwise control to power down the data pin 2 of link A" "Enabled,Disabled" bitfld.long 0x00 1. " PD_TXDA_1 ,Bitwise control to power down the data pin 1 of link A" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " PD_TXDA_0 ,Bitwise control to power down the data pin 0 of link A" "Enabled,Disabled" group.long 0x7C++0x0B line.long 0x00 "NV_PDISP_SOR_BLANK_0,Override The SOR Output Resource Pixels With Blank Data" rbitfld.long 0x00 2. " STATUS ,Output resource is sending blank pixels forced by the OVERRIDE bit" "Not blanked,Blanked" bitfld.long 0x00 1. " TRANSITION ,Controls the timing of the output resource blank override" "Immediate,Next VSYNC" textline " " bitfld.long 0x00 0. " OVERRIDE ,Override" "False,True" line.long 0x04 "NV_PDISP_SOR_SEQ_CTL_0,Sequencer Control Register For SOR" bitfld.long 0x04 30. " SWITCH ,Switch" "Wait,Force" rbitfld.long 0x04 28. " STATUS ,Sequencer stopped/running" "Stopped,Running" textline " " rbitfld.long 0x04 16.--19. " PC ,The current value of the program counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " PD_PC_ALT ,The alternate entry point into the power down program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " PD_PC ,The program counter for the start of the power down program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " PU_PC_ALT ,The alternate entry point into the power up program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x04 0.--3. " PU_PC ,The program counter for the start of the power up program sequence" "0,?..." line.long 0x08 "NV_PDISP_SOR_LANE_SEQ_CTL_0,Sequencer Control Register For SOR Lane" bitfld.long 0x08 31. " SETTING_NEW ,Run sequencer outside of the normal SOR sequencer operation" "Done,Pending" rbitfld.long 0x08 28. " SEQ_STATE ,Sequencer state" "Idle,Busy" textline " " bitfld.long 0x08 20. " SEQUENCE ,Controls the direction of the power up/power down sequence" "Up,Down" bitfld.long 0x08 16. " NEW_POWER_STATE ,Controls whether the lanes should be powered up/powered down" "PU,PD" textline " " bitfld.long 0x08 12.--15. " DELAY ,Number of microseconds to delay between each lanes' power state change" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x08 9. " LANE9_STATE ,LANE9 state" "Power up,Power down" textline " " rbitfld.long 0x08 8. " LANE8_STATE ,LANE8 state" "Power up,Power down" rbitfld.long 0x08 7. " LANE7_STATE ,LANE7 state" "Power up,Power down" textline " " rbitfld.long 0x08 6. " LANE6_STATE ,LANE6 state" "Power up,Power down" rbitfld.long 0x08 5. " LANE5_STATE ,LANE5 state" "Power up,Power down" textline " " rbitfld.long 0x08 4. " LANE4_STATE ,LANE4 state" "Power up,Power down" rbitfld.long 0x08 3. " LANE3_STATE ,LANE3 state" "Power up,Power down" textline " " rbitfld.long 0x08 2. " LANE2_STATE ,LANE2 state" "Power up,Power down" rbitfld.long 0x08 1. " LANE1_STATE ,LANE1 state" "Power up,Power down" textline " " rbitfld.long 0x08 0. " LANE0_STATE ,LANE0 state" "Power up,Power down" group.long 0x88++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST0_0,Preload The Power-Up And Power-Down Sequence 0" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x8C++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST1_0,Preload The Power-Up And Power-Down Sequence 1" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x90++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST2_0,Preload The Power-Up And Power-Down Sequence 2" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x94++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST3_0,Preload The Power-Up And Power-Down Sequence 3" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x98++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST4_0,Preload The Power-Up And Power-Down Sequence 4" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0x9C++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST5_0,Preload The Power-Up And Power-Down Sequence 5" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xA0++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST6_0,Preload The Power-Up And Power-Down Sequence 6" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xA4++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST7_0,Preload The Power-Up And Power-Down Sequence 7" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xA8++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST8_0,Preload The Power-Up And Power-Down Sequence 8" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xAC++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INST9_0,Preload The Power-Up And Power-Down Sequence 9" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xB0++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTA_0,Preload The Power-Up And Power-Down Sequence A" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xB4++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTB_0,Preload The Power-Up And Power-Down Sequence B" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xB8++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTC_0,Preload The Power-Up And Power-Down Sequence C" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xBC++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTD_0,Preload The Power-Up And Power-Down Sequence D" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xC0++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTE_0,Preload The Power-Up And Power-Down Sequence E" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xC4++0x03 line.long 0x00 "NV_PDISP_SOR_SEQ_INSTF_0,Preload The Power-Up And Power-Down Sequence F" bitfld.long 0x00 31. " PLL_PULLDOWN ,Weak pulldown enable" "Disabled,Enabled" bitfld.long 0x00 30. " POWERDOWN_MACRO ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown" textline " " bitfld.long 0x00 29. " ASSERT_PLL_RESET ,Assert reset to the PLL" "Normal,RST" bitfld.long 0x00 28. " BLANK_V ,Override the VSYNC signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 27. " BLANK_H ,Override the HSYNC signal from the RG" "Normal,Inactive" bitfld.long 0x00 26. " BLANK_DE ,Override the DE signal from the RG" "Normal,Inactive" textline " " bitfld.long 0x00 25. " BLACK_DATA ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black" bitfld.long 0x00 24. " TRISTATE_IOS ,Coerce all output pins to tristate" "Enabled,Tristate" textline " " bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO ,Drive the PWM circuit output LO" "False,True" bitfld.long 0x00 22. " PIN_B ,State to drive the external pin to" "Low,High" textline " " bitfld.long 0x00 21. " PIN_A ,State to drive the external pin to" "Low,High" bitfld.long 0x00 19. " SEQUENCE ,Controls the direction of the lane power up/power down sequence" "Up,Down" textline " " bitfld.long 0x00 18. " LANE_SEQ ,Sequencer will kick off the Lane Sequencer" "Stopped,Run" bitfld.long 0x00 17. " PDPORT ,Asserts the PDPORT port on the SOR analog macro" "No,Yes" textline " " bitfld.long 0x00 16. " PDPLL ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes" bitfld.long 0x00 15. " HALT ,Halt" "False,True" textline " " bitfld.long 0x00 12.--13. " WAIT_UNITS ,Wait delay mode" "US,MS,VSYNC,?..." hexmask.long.word 0x00 0.--9. 1. " WAIT_TIME ,Amount of time to wait " group.long 0xC8++0x07 line.long 0x00 "NV_PDISP_SOR_PWM_DIV_0,PWM Divide" hexmask.long.tbyte 0x00 0.--23. 1. " DIVIDE ,Defines the period of the PWM output" line.long 0x04 "NV_PDISP_SOR_PWM_CTL_0,Controls The Optional PWM Function" bitfld.long 0x04 31. " SETTING_NEW ,Setting new" "Done,Pending" bitfld.long 0x04 30. " CLKSEL ,Clock select" "PCLK,XTAL" textline " " hexmask.long.tbyte 0x04 0.--23. 1. " DUTY_CYCLE ,Duty cycle of PWM output" group.long 0x128++0x47 line.long 0x00 "NV_PDISP_SOR_XBAR_CTRL_0,Controls The XBAR Between The SOR And The TMDS Analog Macro" bitfld.long 0x00 29.--31. " LINK1_XSEL_4 ,Link1 XSEL 4" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 26.--28. " LINK1_XSEL_3 ,Link1 XSEL 3" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 23.--25. " LINK1_XSEL_2 ,Link1 XSEL 2" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 20.--22. " LINK1_XSEL_1 ,Link1 XSEL 1" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 17.--19. " LINK1_XSEL_0 ,Link1 XSEL 0" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 14.--16. " LINK0_XSEL_4 ,Link0 XSEL 4" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 11.--13. " LINK0_XSEL_3 ,Link0 XSEL 3" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 8.--10. " LINK0_XSEL_2 ,Link0 XSEL 2" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 5.--7. " LINK0_XSEL_1 ,Link0 XSEL 1" "0,1,2,3,4,5,6,ZERO" bitfld.long 0x00 2.--4. " LINK0_XSEL_0 ,Link0 XSEL 0" "0,1,2,3,4,5,6,ZERO" textline " " bitfld.long 0x00 1. " LINK_SWAP ,Link swap" "Not swapped,Swapped" bitfld.long 0x00 0. " BYPASS ,Bypass XBAR" "Not bypassed,Bypassed" line.long 0x04 "NV_PDISP_SOR_XBAR_POL_0,Polarity Of The Channels Control" bitfld.long 0x04 9. " POL_LINK1_4 ,POL Link1 4" "Normal,Inverted" bitfld.long 0x04 8. " POL_LINK1_3 ,POL Link1 3" "Normal,Inverted" textline " " bitfld.long 0x04 7. " POL_LINK1_2 ,POL Link1 2" "Normal,Inverted" bitfld.long 0x04 6. " POL_LINK1_1 ,POL Link1 1" "Normal,Inverted" textline " " bitfld.long 0x04 5. " POL_LINK1_0 ,POL Link1 0" "Normal,Inverted" bitfld.long 0x04 4. " POL_LINK0_4 ,POL Link0 4" "Normal,Inverted" textline " " bitfld.long 0x04 3. " POL_LINK0_3 ,POL Link0 3" "Normal,Inverted" bitfld.long 0x04 2. " POL_LINK0_2 ,POL Link0 2" "Normal,Inverted" textline " " bitfld.long 0x04 1. " POL_LINK0_1 ,POL Link0 1" "Normal,Inverted" bitfld.long 0x04 0. " POL_LINK0_0 ,POL Link0 0" "Normal,Inverted" line.long 0x08 "NV_PDISP_SOR_DP_LINKCTL0_0,Select Index The SOR" bitfld.long 0x08 31. " FORCE_IDLEPTTRN ,Force idle pattern" "No,Yes" bitfld.long 0x08 28. " COMPLIANCEPTTRN ,Compliance test pattern" "No pattern,Color square" textline " " bitfld.long 0x08 16.--20. " LANECOUNT ,Controls the lane configuration of the DP datapath" "0,1,,2,,,,,,,,,,,,4,?..." bitfld.long 0x08 14. " ENHANCEDFRAME ,Enhanced framing symbol sequence for BS/SR/CPBS/CPSR" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " SYNCMODE ,Link clock and pixel clock are synchronous" "Disabled,Enabled" hexmask.long.byte 0x08 2.--8. 1. " TUSIZE ,Transfer unit size" textline " " bitfld.long 0x08 0. " ENABLE ,The current DP port" "Disabled,Enabled" line.long 0x0C "NV_PDISP_SOR_DP_LINKCTL1_0,Select Index Port Within The SOR" bitfld.long 0x0C 31. " FORCE_IDLEPTTRN ,Force idle pattern" "No,Yes" bitfld.long 0x0C 28. " COMPLIANCEPTTRN ,Compliance test pattern" "No pattern,Color square" textline " " bitfld.long 0x0C 16.--20. " LANECOUNT ,Controls the lane configuration of the DP datapath" "0,1,,2,,,,,,,,,,,,4,?..." bitfld.long 0x0C 14. " ENHANCEDFRAME ,Enhanced framing symbol sequence for BS/SR/CPBS/CPSR" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " SYNCMODE ,Link clock and pixel clock are synchronous" "Disabled,Enabled" hexmask.long.byte 0x0C 2.--8. 1. " TUSIZE ,Transfer unit size" textline " " bitfld.long 0x0C 0. " ENABLE ,The current DP port" "Disabled,Enabled" line.long 0x10 "NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0,SOR Lane Drive Current 0" hexmask.long.byte 0x10 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x10 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x10 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x10 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x14 "NV_PDISP_SOR_LANE_DRIVE_CURRENT1_0,SOR Lane Drive Current 1" hexmask.long.byte 0x14 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x14 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x14 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x14 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x18 "NV_PDISP_SOR_LANE4_DRIVE_CURRENT0_0,SOR Lane 4 Drive Current 0" hexmask.long.byte 0x18 0.--7. 1. " LANE4 ,LANE4 controls the fifth lane" line.long 0x1C "NV_PDISP_SOR_LANE4_DRIVE_CURRENT1_0,SOR Lane 4 Drive Current 1" hexmask.long.byte 0x1C 0.--7. 1. " LANE4 ,LANE4 controls the fifth lane" line.long 0x20 "NV_PDISP_SOR_LANE_PREEMPHASIS0_0,SOR Lane Pre-Emphasis 0" hexmask.long.byte 0x20 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x20 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x20 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x20 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x24 "NV_PDISP_SOR_LANE_PREEMPHASIS1_0,SOR Lane Pre-Emphasis 1" hexmask.long.byte 0x24 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x24 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x24 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x24 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x28 "NV_PDISP_SOR_LANE4_PREEMPHASIS0_0,SOR Lane 4 Pre-Emphasis 0" hexmask.long.byte 0x28 0.--7. 1. " LANE4 ,LANE4 controls the fifth lane" line.long 0x2C "NV_PDISP_SOR_LANE4_PREEMPHASIS1_0,SOR Lane 4 Pre-Emphasis 1" hexmask.long.byte 0x2C 0.--7. 1. " LANE4 ,LANE4 controls the fifth lane" line.long 0x30 "NV_PDISP_SOR_POSTCURSOR0_0,SOR Lane Post-Cursor 0" hexmask.long.byte 0x30 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x30 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x30 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x30 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x34 "NV_PDISP_SOR_POSTCURSOR1_0,SOR Lane Post-Cursor 1" hexmask.long.byte 0x34 24.--31. 1. " LANE3_DP_LANE3 ,Lane 3 DP lane 3" hexmask.long.byte 0x34 16.--23. 1. " LANE2_DP_LANE0 ,Lane 2 DP lane 0" textline " " hexmask.long.byte 0x34 8.--15. 1. " LANE1_DP_LANE1 ,Lane 1 DP lane 1" hexmask.long.byte 0x34 0.--7. 1. " LANE0_DP_LANE2 ,Lane 0 DP lane 2" line.long 0x38 "NV_PDISP_SOR_DP_CONFIG0_0,SOR DP Config 0" bitfld.long 0x38 31. " RD_RESET_VAL ,Internal running disparity" "Negative,Positive" bitfld.long 0x38 28. " IDLE_BEFORE_ATTACH ,Idle before attach" "Disabled,Enabled" textline " " bitfld.long 0x38 26. " ACTIVESYM_CNTL ,ACTIVESYM CNTL" "Disabled,Enabled" bitfld.long 0x38 24. " ACTIVESYM_POLARITY ,ACTIVESYM polarity" "Negative,Positive" textline " " bitfld.long 0x38 16.--19. " ACTIVESYM_FRAC ,Active fraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x38 8.--14. 1. " ACTIVESYM_COUNT ,Number of symbols sent out every transfer irrespective of the TU count" textline " " bitfld.long 0x38 0.--5. " WATERMARK ,Defines the number of symbols that the DP logic will wait for at the beginning of a line before ending blanking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x3C "NV_PDISP_SOR_DP_CONFIG1_0,SOR DP Config 1" bitfld.long 0x3C 31. " RD_RESET_VAL ,Internal running disparity" "Negative,Positive" bitfld.long 0x3C 28. " IDLE_BEFORE_ATTACH ,Idle before attach" "Disabled,Enabled" textline " " bitfld.long 0x3C 26. " ACTIVESYM_CNTL ,ACTIVESYM CNTL" "Disabled,Enabled" bitfld.long 0x3C 24. " ACTIVESYM_POLARITY ,ACTIVESYM polarity" "Negative,Positive" textline " " bitfld.long 0x3C 16.--19. " ACTIVESYM_FRAC ,Active fraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x3C 8.--14. 1. " ACTIVESYM_COUNT ,Number of symbols sent out every transfer irrespective of the TU count" textline " " bitfld.long 0x3C 0.--5. " WATERMARK ,Defines the number of symbols that the DP logic will wait for at the beginning of a line before ending blanking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x40 "NV_PDISP_SOR_DP_MN0_0,SOR DP MN 0" bitfld.long 0x40 30.--31. " M_MOD ,M_DELTA field not used/added/subtracted the M value" "None,INC,DEC,?..." bitfld.long 0x40 24.--27. " M_DELTA ,Defines an offset that will be used to modify the calculated M value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.tbyte 0x40 0.--23. 1. " N_VAL ,The value that will be used for calculating M" line.long 0x44 "NV_PDISP_SOR_DP_MN1_0,SOR DP MN 1" bitfld.long 0x44 30.--31. " M_MOD ,Describes how the M_DELTA field should be applied to the M value" "NONE,INC,DEC,?..." bitfld.long 0x44 24.--27. " M_DELTA ,Defines an offset that will be used to modify the calculated M value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.tbyte 0x44 0.--23. 1. " N_VAL ,The value that will be used for calculating M" sif (!cpuis("TEGRAX2")) if (((per.l(ad:0x54580000+0x130))&0x01)==0x01) group.long 0x170++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" bitfld.long 0x00 3. " PD_TXD_3 ,Controls to power down the lane 3" "Yes,No" textline " " bitfld.long 0x00 2. " PD_TXD_0 ,Controls to power down the lane 0" "Yes,No" bitfld.long 0x00 1. " PD_TXD_1 ,Controls to power down the lane 1" "Yes,No" textline " " bitfld.long 0x00 0. " PD_TXD_2 ,Controls to power down the lane 2" "Yes,No" else group.long 0x170++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" endif if (((per.l(ad:0x54580000+0x134))&0x01)==0x01) group.long 0x174++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" bitfld.long 0x00 3. " PD_TXD_3 ,Controls to power down the lane 3" "Yes,No" textline " " bitfld.long 0x00 2. " PD_TXD_0 ,Controls to power down the lane 0" "Yes,No" bitfld.long 0x00 1. " PD_TXD_1 ,Controls to power down the lane 1" "Yes,No" textline " " bitfld.long 0x00 0. " PD_TXD_2 ,Controls to power down the lane 2" "Yes,No" else group.long 0x174++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" endif endif group.long 0x180++0x47 line.long 0x00 "NV_PDISP_SOR_DP_SPARE0_0,NV PDISP SOR DP Spare" bitfld.long 0x00 31. " SOR_PSR_DIABLE_CYA ,SOR PSR disable CYA" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 30. " SOR_MSA_SOURCE_SEL ,Allows software to choose whether SOR uses MSA data" "SOR,RG" hexmask.long.word 0x00 14.--29. 1. " REG ,REG" textline " " bitfld.long 0x00 12.--13. " DEBUG_MODE ,Controls the mapping of DEBUG_OUT" "0,1,2,3" hexmask.long.byte 0x00 4.--11. 1. " DEBUG_OUT ,Spare output bits for debug" else textline " " hexmask.long 0x00 4.--30. 1. " REG ,REG" endif textline " " bitfld.long 0x00 3. " DISP_VIDEO_PREAMBLE_CYA ,Selects between video preamble from display versus the locally generated video preamble signal" "Disabled,Enabled" bitfld.long 0x00 2. " SOR_CLK_SEL ,Safe/macro clock as the SOR clock" "Safe,Macro" textline " " bitfld.long 0x00 1. " PANEL ,DP panel is external/internal" "External,Internal" bitfld.long 0x00 0. " SEQ_ENABLE ,Enables the sequencer in DP mode" "No,Yes" line.long 0x04 "NV_PDISP_SOR_DP_SPARE1_0,NV_PDISP_SOR_DP_SPARE" sif (cpuis("TEGRAX2")) hexmask.long 0x04 4.--31. 1. " REG ,Reg" bitfld.long 0x04 3. " SOR_CLK_OVR_ON ,SOR override for SLCG" "False,True" else hexmask.long 0x04 3.--31. 1. " REG ,Reg" endif textline " " bitfld.long 0x04 2. " SOR_CLK_SEL ,Safe/macro clock as the SOR clock" "Safe,Macro" textline " " bitfld.long 0x04 1. " PANEL ,DP panel is external/internal" "External,Internal" bitfld.long 0x04 0. " SEQ_ENABLE ,Enables the sequencer in DP mode" "No,Yes" line.long 0x08 "NV_PDISP_SOR_DP_AUDIO_CTRL_0,SOR DP Audio Control" eventfld.long 0x08 31. " NEW_SETTINGS ,New settings" "Done,Pending" rbitfld.long 0x08 21. " MUTE_STATUS ,Mute status" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " CA_SELECT ,Channel/speaker allocation select" "SW,HW" bitfld.long 0x08 19. " SS_SELECT ,Sample size select" "SW,HW" textline " " bitfld.long 0x08 18. " SF_SELECT ,Sampling frequency select" "SW,HW" bitfld.long 0x08 17. " CC_SELECT ,Channel count select" "SW,HW" textline " " bitfld.long 0x08 16. " CT_SELECT ,Coding type select" "SW,HW" hexmask.long.byte 0x08 8.--15. 1. " PACKET_ID ,Packet ID" textline " " bitfld.long 0x08 7. " GENERIC_INFOFRAME_ENABLE ,Allows software to send infoframes (AVI etc.) other than audio infoframe" "No,Yes" bitfld.long 0x08 6. " INFOFRAME_HEADER_OVERRIDE ,Lets the values in AUDIO_INFOFRAME_HEADER override the default values" "Disabled,Enabled" textline " " bitfld.long 0x08 2.--3. " MUTE ,Controls the AudioMute_Flag in the VB-ID" "Auto,Disabled,Enabled,?..." bitfld.long 0x08 0. " ENABLE ,Enables field for Audio over DisplayPort" "No,Yes" line.long 0x0C "NV_PDISP_SOR_DP_AUDIO_HBLANK_SYMBOLS_0,SOR DP Audio HBlank Symbols" hexmask.long.tbyte 0x0C 0.--16. 1. " VALUE ,Value" line.long 0x10 "NV_PDISP_SOR_DP_AUDIO_VBLANK_SYMBOLS_0,SOR DP Audio VBlank Symbols" hexmask.long.tbyte 0x10 0.--20. 1. " VALUE ,Value" line.long 0x14 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_HEADER_0,SOR DP Generic Infoframe Header" hexmask.long.byte 0x14 24.--31. 1. " HB3 ,HB3" hexmask.long.byte 0x14 16.--23. 1. " HB2 ,HB2" textline " " hexmask.long.byte 0x14 8.--15. 1. " HB1 ,HB1" hexmask.long.byte 0x14 0.--7. 1. " HB0 ,HB0" line.long 0x18 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK0_0,SOR DP Generic Infoframe Subpack0" hexmask.long.byte 0x18 24.--31. 1. " DB3 ,DB3" hexmask.long.byte 0x18 16.--23. 1. " DB2 ,DB2" textline " " hexmask.long.byte 0x18 8.--15. 1. " DB1 ,DB1" hexmask.long.byte 0x18 0.--7. 1. " DB0 ,DB0" line.long 0x1C "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK1_0,SOR DP Generic Infoframe Subpack1" hexmask.long.byte 0x1C 24.--31. 1. " DB7 ,DB7" hexmask.long.byte 0x1C 16.--23. 1. " DB6 ,DB6" textline " " hexmask.long.byte 0x1C 8.--15. 1. " DB5 ,DB5" hexmask.long.byte 0x1C 0.--7. 1. " DB4 ,DB4" line.long 0x20 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK2_0,SOR DP Generic Infoframe Subpack2" hexmask.long.byte 0x20 24.--31. 1. " DB11 ,DB11" hexmask.long.byte 0x20 16.--23. 1. " DB10 ,DB10" textline " " hexmask.long.byte 0x20 8.--15. 1. " DB9 ,DB9" hexmask.long.byte 0x20 0.--7. 1. " DB8 ,DB8" line.long 0x24 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK3_0,SOR DP Generic Infoframe Subpack3" hexmask.long.byte 0x24 24.--31. 1. " DB15 ,DB15" hexmask.long.byte 0x24 16.--23. 1. " DB14 ,DB14" textline " " hexmask.long.byte 0x24 8.--15. 1. " DB13 ,DB13" hexmask.long.byte 0x24 0.--7. 1. " DB12 ,DB12" line.long 0x28 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK4_0,SOR DP Generic Infoframe Subpack4" hexmask.long.byte 0x28 24.--31. 1. " DB19 ,DB19" hexmask.long.byte 0x28 16.--23. 1. " DB18 ,DB18" textline " " hexmask.long.byte 0x28 8.--15. 1. " DB17 ,DB17" hexmask.long.byte 0x28 0.--7. 1. " DB16 ,DB16" line.long 0x2C "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK5_0,SOR DP Generic Infoframe Subpack5" hexmask.long.byte 0x2C 24.--31. 1. " DB23 ,DB23" hexmask.long.byte 0x2C 16.--23. 1. " DB22 ,DB22" textline " " hexmask.long.byte 0x2C 8.--15. 1. " DB21 ,DB21" hexmask.long.byte 0x2C 0.--7. 1. " DB20 ,DB20" line.long 0x30 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK6_0,SOR DP Generic Infoframe Subpack6" hexmask.long.byte 0x30 24.--31. 1. " DB27 ,DB27" hexmask.long.byte 0x30 16.--23. 1. " DB26 ,DB26" textline " " hexmask.long.byte 0x30 8.--15. 1. " DB25 ,DB25" hexmask.long.byte 0x30 0.--7. 1. " DB24 ,DB24" line.long 0x34 "NV_PDISP_SOR_DP_TPG_0,Controls The Training Patterns Needed During Link Training" bitfld.long 0x34 30. " LANE3_CHANNELCODING ,Lane 3 - supports the main link channel coding" "Disabled,Enabled" bitfld.long 0x34 28.--29. " LANE3_SCRAMBLEREN ,Lane 3 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..." textline " " bitfld.long 0x34 24.--27. " LANE3_PATTERN ,Lane 3 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..." bitfld.long 0x34 22. " LANE2_CHANNELCODING ,Lane 2 - supports the main link channel coding" "Disabled,Enabled" textline " " bitfld.long 0x34 20.--21. " LANE2_SCRAMBLEREN ,Lane 2 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..." bitfld.long 0x34 16.--19. " LANE2_PATTERN ,Lane 2 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..." textline " " bitfld.long 0x34 14. " LANE1_CHANNELCODING ,Lane 1 - supports the main link channel coding" "Disabled,Enabled" bitfld.long 0x34 12.--13. " LANE1_SCRAMBLEREN ,Lane 1 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..." textline " " bitfld.long 0x34 8.--11. " LANE1_PATTERN ,Lane 1 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..." bitfld.long 0x34 6. " LANE0_CHANNELCODING ,Lane 0 - supports the main link channel coding" "Disabled,Enabled" textline " " bitfld.long 0x34 4.--5. " LANE0_SCRAMBLEREN ,Lane 0 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..." bitfld.long 0x34 0.--3. " LANE0_PATTERN ,Lane 0 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..." line.long 0x38 "NV_PDISP_SOR_DP_TPG_CONFIG_0,Additional Controls For The DP Test Pattern Generator" hexmask.long.tbyte 0x38 0.--16. 1. " HBR2_COMPLIANCE_PERIOD ,Total symbols there are between the start of a new scrambler reset sequence" line.long 0x3C "NV_PDISP_SOR_DP_LQ_CSTM0_0,Program A Custom 80-bit Test Pattern [31:0]" line.long 0x40 "NV_PDISP_SOR_DP_LQ_CSTM1_0,Program A Custom 80-bit Test Pattern [63:32]" line.long 0x44 "NV_PDISP_SOR_DP_LQ_CSTM2_0,Program A Custom 80-bit Test Pattern [79:64]" sif (!cpuis("TEGRAX2")) group.long 0x1C8++0x0B line.long 0x00 "NV_PDISP_SOR_PLL4_0,SOR PLL4" bitfld.long 0x00 24.--29. " SETUP_LCKDET ,Setup LCKDET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 23. " LOCK_OVERRIDE ,Lock override" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ENABLE_LCKDET ,Enable LCKDET" "Enabled,Disabled" rbitfld.long 0x00 21. " LOCKDET ,LOCKDET" "0,1" line.long 0x04 "NV_PDISP_SOR_DP_PADCTL2_0,SOR DP PADCTL2" hexmask.long.byte 0x04 24.--31. 1. " SPAREPLL ,Spare PLL" bitfld.long 0x04 20.--23. " SPARE4 ,Spare 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 16.--19. " SPARE3 ,Spare 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " SPARE2 ,Spare 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " SPARE1 ,Spare 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " SPARE0 ,Spare 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0. " REG_BYPASS ,REG bypass" "0,1" line.long 0x08 "NV_PDISP_SOR_DP_PADCTL3_0,SOR DP PADCTL3" hexmask.long.byte 0x08 24.--31. 1. " TX_PATTERN_GEN ,TX pattern GEN" endif rgroup.long 0x1D4++0x0F line.long 0x00 "NV_PDISP_SOR_DP_HDCP_AN_MSB_0,HDCP AN MSB Register" line.long 0x04 "NV_PDISP_SOR_DP_HDCP_AN_LSB_0,HDCP AN LSB Register" line.long 0x08 "NV_PDISP_SOR_DP_HDCP_AKSV_MSB_0,HDCP AKSV MSB Register" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the transmitter's downstream key selection vector (KSV)" line.long 0x0C "NV_PDISP_SOR_DP_HDCP_AKSV_LSB_0,HDCP AKSV LSB Register" group.long 0x1E4++0x0B line.long 0x00 "NV_PDISP_SOR_DP_HDCP_BKSV_MSB_0,HDCP BKSV MSB Register" bitfld.long 0x00 31. " REPEATER ,Repeater" "0,1" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the receiver's key selection vector (KSV)" line.long 0x04 "NV_PDISP_SOR_DP_HDCP_BKSV_LSB_0,HDCP BKSV LSB Register" line.long 0x08 "NV_PDISP_SOR_DP_HDCP_CTRL_0,HDCP Control Register" bitfld.long 0x08 15. " UPSTREAM ,SPRIME and MPRIME calculations will use AN and BKSV and M0 values from the TMDS/DP HDCP block" "TMDS,DP" rbitfld.long 0x08 13. " SROM_ERR ,Error occurs while using the HDCP SROM" "No error,Error" textline " " rbitfld.long 0x08 12. " SROM_EN ,HDCP SROM is in use" "Disabled,Enabled" rbitfld.long 0x08 11. " MPRIME ,M' has been calculated" "Invalid,Valid" textline " " rbitfld.long 0x08 10. " SPRIME ,S' has been calculated" "Invalid,Valid" rbitfld.long 0x08 9. " R0 ,Km Ks M0 and R0 have been calculated" "Invalid,Valid" textline " " rbitfld.long 0x08 8. " AN ,An value has been generated" "Invalid,Valid" bitfld.long 0x08 3. " ONEONE ,Enables the HDCP 1.1 features" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " DUAL_LINK_EN ,Turns dual-link mode on" "Disabled,Enabled" bitfld.long 0x08 1. " CRYPT ,Turns encryption on" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " RUN ,Starts downstream protocol" "No,Yes" rgroup.long 0x1F0++0x03 line.long 0x00 "NV_PDISP_SOR_DP_HDCP_RI_0,HDCP RI Register" hexmask.long.word 0x00 0.--15. 1. " VALUE ,RI register holds the 16-bit link integrity check value" group.long 0x1F8++0x07 line.long 0x00 "NV_PDISP_SOR_DP_HDCP_EMU1_0,SOR NV PDISP SOR DP HDCP EMU1" line.long 0x04 "NV_PDISP_SOR_DP_HDCP_CYA_0,HDCP Diagnostic Register" rgroup.long 0x200++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_AN_MSB_0,HDCP AN MSB Register" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_AN_LSB_0,HDCP AN LSB Register" group.long 0x208++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CN_MSB_0,HDCP CN MSB Register" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CN_LSB_0,HDCP CN LSB Register" rgroup.long 0x210++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_AKSV_MSB_0,HDCP AKSV MSB Register" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the transmitter's downstream key selection vector (KSV)" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_AKSV_LSB_0,HDCP AKSV LSB Register" group.long 0x218++0x0F line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_BKSV_MSB_0,HDCP BKSV MSB Register" bitfld.long 0x00 31. " REPEATER ,Repeater" "0,1" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the receiver's key selection vector (KSV)" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB_0,HDCP BKSV LSB Register" line.long 0x08 "NV_PDISP_SOR_TMDS_HDCP_CKSV_MSB_0,HDCP CKSV MSB Register" hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the software's key selection vector (KSV)" line.long 0x0C "NV_PDISP_SOR_TMDS_HDCP_CKSV_LSB_0,HDCP CKSV LSB Register" rgroup.long 0x228++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_DKSV_MSB_0,HDCP DKSV MSB Register" hexmask.long.byte 0x00 0.--7. 1. " VALUE ,Holds the 8 most significant bits of the transmitter's upstream key selection vector (KSV)" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_DKSV_LSB_0,HDCP DKSV LSB Register" group.long 0x230++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CTRL_0,HDCP Control Register" rbitfld.long 0x00 13. " SROM_ERR ,Error occurs while using the HDCP SROM" "No error,Error" rbitfld.long 0x00 12. " SROM_EN ,HDCP SROM is in use" "Disabled,Enabled" textline " " rbitfld.long 0x00 11. " MPRIME ,M' has been calculated" "Invalid,Valid" rbitfld.long 0x00 10. " SPRIME ,S' has been calculated" "Invalid,Valid" textline " " rbitfld.long 0x00 9. " R0 ,Km Ks M0 and R0 have been calculated" "Invalid,Valid" rbitfld.long 0x00 8. " AN ,An value has been generated" "Invalid,Valid" textline " " bitfld.long 0x00 3. " ONEONE ,Enables the HDCP 1.1 features" "Disabled,Enabled" bitfld.long 0x00 2. " DUAL_LINK_EN ,Turns dual-link mode on" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CRYPT ,Turns encryption on" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Starts downstream protocol" "No,Yes" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CMODE_0,HDCP CMODE Register" bitfld.long 0x04 4.--7. " INDEX ,Index" "SOR0,SOR1,SOR2,SOR3,SOR4,SOR5,SOR6,SOR7,DAC0,DAC1,DAC2,PIOR0,PIOR1,PIOR2,PIOR3,PIOR4" bitfld.long 0x04 0.--3. " MODE ,Mode" ",Read S,Read M,?..." rgroup.long 0x238++0x17 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_MPRIME_MSB_0,HDCP MPRIME MSB Register" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_MPRIME_LSB_0,HDCP MPRIME LSB Register" line.long 0x08 "NV_PDISP_SOR_TMDS_HDCP_SPRIME_MSB_0,HDCP SPRIME MSB Register" bitfld.long 0x08 7. " STATUS_READZ ,Implements the HDCP upstream spec's read Z operation" "Not implemented,Implemented" bitfld.long 0x08 6. " STATUS_CS ,Implements the connection state (CS) register" "Not implemented,Implemented" textline " " bitfld.long 0x08 5. " STATUS_SCOPE ,Report the status for the STATUS_UNPROTECTED field" "Scope 2 heads,Scope 1 head" bitfld.long 0x08 4. " STATUS_INTPNL ,Transmitting to an internal panel on this head" "Inactive,Active" textline " " bitfld.long 0x08 0.--3. " STATUS_MAX_CMODE_IDX ,Identifies the maximum CMode index allowed for requesting status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "NV_PDISP_SOR_TMDS_HDCP_SPRIME_LSB2_0,HDCP SPRIME LSB2 Register" bitfld.long 0x0C 28.--31. " STATUS_CMODE_IDX ,Identifies the index of the port to which the status request was actually routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 27. " STATUS_UNPROTECTED ,Queried port is transmitting unprotected data" "No,Yes" textline " " bitfld.long 0x0C 26. " STATUS_EXTPNL ,Port identified digital interface and transmitting on other than an internal panel" "Inactive,Active" bitfld.long 0x0C 25. " STATUS_RPTR ,Status repeater" "Inactive,Active" textline " " bitfld.long 0x0C 24. " STATUS_ENCRYPTING ,HDCP unit in this head is actually encrypting the data it receives" "No,Yes" hexmask.long.tbyte 0x0C 0.--23. 1. " VALUE ,Value" line.long 0x10 "NV_PDISP_SOR_TMDS_HDCP_SPRIME_LSB1_0,HDCP SPRIME LSB1 Register" line.long 0x14 "NV_PDISP_SOR_TMDS_HDCP_RI_0,HDCP RI Register" hgroup.long 0x250++0x07 hide.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CS_MSB_0,HDCP CS MSB Register" hide.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CS_LSB_0,HDCP CS LSB Register" rgroup.long 0x25C++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_EMU_RDATA0_0,HDMI Audio EMU RDATA0" group.long 0x260++0x0B line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_EMU1_0,HDMI Audio EMU1" bitfld.long 0x00 31. " WRITE ,Write" "0,1" hexmask.long.byte 0x00 0.--7. 1. " ADDR ,Address" line.long 0x04 "NV_PDISP_SOR_HDMI_AUDIO_EMU2_0,HDMI Audio EMU2" line.long 0x08 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_CTRL_0,HDMI Audio Infoframe Control Register" bitfld.long 0x08 9. " CHKSUM_HW ,Way to calculate the checksum for the infoframes" "Disabled,Enabled" bitfld.long 0x08 8. " SINGLE ,InfoFrame to be transmitted exactly once" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " OTHER ,InfoFrame to be transmitted to every other frame" "Disabled,Enabled" bitfld.long 0x08 0. " ENABLE ,Enables the hardware calculation to be passed to the packet" "Disabled,Enabled" rgroup.long 0x26C++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_STATUS_0,HDMI Audio InfoFrame Status" bitfld.long 0x00 0. " SENT ,Sent" "Waiting,Done" group.long 0x270++0x0F line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_HEADER_0,HDMI Audio InfoFrame Header" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" line.long 0x04 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_SUBPACK0_LOW_0,HDMI Audio InfoFrame SUBPACK0 Low" hexmask.long.byte 0x04 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x04 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x04 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x04 0.--7. 1. " PB0 ,PB0" line.long 0x08 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_SUBPACK0_HIGH_0,HDMI Audio InfoFrame SUBPACK0 High" hexmask.long.byte 0x08 8.--15. 1. " PB5 ,PB5" hexmask.long.byte 0x08 0.--7. 1. " PB4 ,PB4" line.long 0x0C "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_CTRL_0,HDMI AVI Infoframe Control Register" bitfld.long 0x0C 9. " CHKSUM_HW ,Way to calculate the checksum for the infoframes" "Disabled,Enabled" bitfld.long 0x0C 8. " SINGLE ,InfoFrame to be transmitted exactly once" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " OTHER ,InfoFrame to be transmitted to every other frame" "Disabled,Enabled" bitfld.long 0x0C 0. " ENABLE ,Enables the hardware calculation to be passed to the packe" "Disabled,Enabled" rgroup.long 0x280++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_STATUS_0,HDMI AVI Infoframe Status" bitfld.long 0x00 0. " SENT ,Field will be set to after the first packet is sent" "Waiting,Done" group.long 0x284++0x13 line.long 0x00 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_HEADER_0,HDMI AVI Infoframe Header" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" line.long 0x04 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_0,HDMI AVI Infoframe SUBPACK0 Low" hexmask.long.byte 0x04 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x04 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x04 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x04 0.--7. 1. " PB0 ,PB0" line.long 0x08 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_0,HDMI AVI Infoframe SUBPACK0 High" hexmask.long.byte 0x08 16.--23. 1. " PB6 ,PB6" hexmask.long.byte 0x08 8.--15. 1. " PB5 ,PB5" textline " " hexmask.long.byte 0x08 0.--7. 1. " PB4 ,PB4" line.long 0x0C "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_0,HDMI AVI Infoframe SUBPACK1 Low" hexmask.long.byte 0x0C 24.--31. 1. " PB10 ,PB10" hexmask.long.byte 0x0C 16.--23. 1. " PB9 ,PB9" textline " " hexmask.long.byte 0x0C 8.--15. 1. " PB8 ,PB8" hexmask.long.byte 0x0C 0.--7. 1. " PB7 ,PB7" line.long 0x10 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_0,HDMI AVI Infoframe SUBPACK1 High" hexmask.long.byte 0x10 16.--23. 1. " PB13 ,PB13" hexmask.long.byte 0x10 8.--15. 1. " PB12 ,PB12" textline " " hexmask.long.byte 0x10 0.--7. 1. " PB11 ,PB11" rgroup.long 0x29C++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_STATUS_0,HDMI Generic Status" bitfld.long 0x00 0. " SENT ,Field will be set to after the first packet is sent" "Waiting,Done" group.long 0xB0++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_HEADER_0,HDMI Generic Header" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" group.long 0x2A4++0x6B line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK0_LOW_0,HDMI Generic SUBPACK0 Low" hexmask.long.byte 0x00 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x00 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x00 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x00 0.--7. 1. " PB0 ,PB0" line.long 0x04 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK0_HIGH_0,HDMI Generic SUBPACK0 High" hexmask.long.byte 0x04 16.--23. 1. " PB6 ,PB6" hexmask.long.byte 0x04 8.--15. 1. " PB5 ,PB5" textline " " hexmask.long.byte 0x04 0.--7. 1. " PB4 ,PB4" line.long 0x08 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK1_LOW_0,HDMI Generic SUBPACK1 Low" hexmask.long.byte 0x08 24.--31. 1. " PB10 ,PB10" hexmask.long.byte 0x08 16.--23. 1. " PB9 ,PB9" textline " " hexmask.long.byte 0x08 8.--15. 1. " PB8 ,PB8" hexmask.long.byte 0x08 0.--7. 1. " PB7 ,PB7" line.long 0x0C "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK1_HIGH_0,HDMI Generic SUBPACK1 High" hexmask.long.byte 0x0C 16.--23. 1. " PB13 ,PB13" hexmask.long.byte 0x0C 8.--15. 1. " PB12 ,PB12" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PB11 ,PB11" line.long 0x10 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK2_LOW_0,HDMI Generic SUBPACK2 Low" hexmask.long.byte 0x10 24.--31. 1. " PB17 ,PB17" hexmask.long.byte 0x10 16.--23. 1. " PB16 ,PB16" textline " " hexmask.long.byte 0x10 8.--15. 1. " PB15 ,PB15" hexmask.long.byte 0x10 0.--7. 1. " PB14 ,PB14" line.long 0x14 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK2_HIGH_0,HDMI Generic SUBPACK2 High" hexmask.long.byte 0x14 16.--23. 1. " PB20 ,PB20" hexmask.long.byte 0x14 8.--15. 1. " PB19 ,PB19" textline " " hexmask.long.byte 0x14 0.--7. 1. " PB18 ,PB18" line.long 0x18 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK3_LOW_0,HDMI Generic SUBPACK3 Low" hexmask.long.byte 0x18 24.--31. 1. " PB24 ,PB24" hexmask.long.byte 0x18 16.--23. 1. " PB23 ,PB23" textline " " hexmask.long.byte 0x18 8.--15. 1. " PB22 ,PB22" hexmask.long.byte 0x18 0.--7. 1. " PB21 ,PB21" line.long 0x1C "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK3_HIGH_0,HDMI Generic SUBPACK2 High" hexmask.long.byte 0x1C 16.--23. 1. " PB27 ,PB27" hexmask.long.byte 0x1C 8.--15. 1. " PB26 ,PB26" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PB25 ,PB25" line.long 0x20 "NV_PDISP_SOR_HDMI_ACR_CTRL_0,HDMI Audio Clock Regeneration Control" bitfld.long 0x20 24.--27. " FREQS ,Audio sampling frequency" "FREQ_44_1KHZ,,FREQ_48KHZ,FREQ_32KHZ,,,,,FREQ_88_2KHZ,,FREQ_96KHZ,,FREQ_176_4KHZ,,FREQ_192KHZ,?..." bitfld.long 0x20 16. " FREQS_ENABLE ,Uses the sampling frequency" "Disabled,Enabled" textline " " bitfld.long 0x20 8. " MEASURE_ENABLE ,Uses the sampling frequency measured" "Disabled,Enabled" bitfld.long 0x20 0. " PACKET_ENABLE ,Uses the channel status information read from the incoming SPDIF" "Disabled,Enabled" line.long 0x24 "NV_PDISP_SOR_HDMI_ACR_0320_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 32 KHz SUBPACK Low" hexmask.long.byte 0x24 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x24 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x24 8.--15. 1. " SB3 ,SB3" line.long 0x28 "NV_PDISP_SOR_HDMI_ACR_0320_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 32 KHz SUBPACK High" bitfld.long 0x28 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x28 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x28 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x28 0.--7. 1. " SB6 ,SB6" line.long 0x2C "NV_PDISP_SOR_HDMI_ACR_0441_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 44.1 KHz SUBPACK Low" hexmask.long.byte 0x2C 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x2C 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x2C 8.--15. 1. " SB3 ,SB3" line.long 0x30 "NV_PDISP_SOR_HDMI_ACR_0441_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 44.1 KHz SUBPACK High" bitfld.long 0x30 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x30 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x30 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x30 0.--7. 1. " SB6 ,SB6" line.long 0x34 "NV_PDISP_SOR_HDMI_ACR_0882_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 88.2 KHz SUBPACK Low" hexmask.long.byte 0x34 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x34 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x34 8.--15. 1. " SB3 ,SB3" line.long 0x38 "NV_PDISP_SOR_HDMI_ACR_0882_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 88.2 KHz SUBPACK High" bitfld.long 0x38 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x38 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x38 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x38 0.--7. 1. " SB6 ,SB6" line.long 0x3C "NV_PDISP_SOR_HDMI_ACR_1764_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 176.4 KHz SUBPACK Low" hexmask.long.byte 0x3C 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x3C 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x3C 8.--15. 1. " SB3 ,SB3" line.long 0x40 "NV_PDISP_SOR_HDMI_ACR_1764_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 176.4 KHz SUBPACK High" bitfld.long 0x40 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x40 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x40 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x40 0.--7. 1. " SB6 ,SB6" line.long 0x44 "NV_PDISP_SOR_HDMI_ACR_0480_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 48 KHz SUBPACK Low" hexmask.long.byte 0x44 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x44 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x44 8.--15. 1. " SB3 ,SB3" line.long 0x48 "NV_PDISP_SOR_HDMI_ACR_0480_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 48 KHz SUBPACK High" bitfld.long 0x48 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x48 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x48 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x48 0.--7. 1. " SB6 ,SB6" line.long 0x4C "NV_PDISP_SOR_HDMI_ACR_0960_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 96 KHz SUBPACK Low" hexmask.long.byte 0x4C 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x4C 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x4C 8.--15. 1. " SB3 ,SB3" line.long 0x50 "NV_PDISP_SOR_HDMI_ACR_0960_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 96 KHz SUBPACK High" bitfld.long 0x50 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x50 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x50 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x50 0.--7. 1. " SB6 ,SB6" line.long 0x54 "NV_PDISP_SOR_HDMI_ACR_1920_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 192 KHz SUBPACK Low" hexmask.long.byte 0x54 24.--31. 1. " SB1 ,SB1" hexmask.long.byte 0x54 16.--23. 1. " SB2 ,SB2" textline " " hexmask.long.byte 0x54 8.--15. 1. " SB3 ,SB3" line.long 0x58 "NV_PDISP_SOR_HDMI_ACR_1920_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 192 KHz SUBPACK High" bitfld.long 0x58 31. " ENABLE ,Allow sent packet" "Disabled,Enabled" hexmask.long.byte 0x58 16.--23. 1. " SB4 ,SB4" textline " " hexmask.long.byte 0x58 8.--15. 1. " SB5 ,SB5" hexmask.long.byte 0x58 0.--7. 1. " SB6 ,SB6" line.long 0x5C "NV_PDISP_SOR_HDMI_CTRL_0,HDMI Control" bitfld.long 0x5C 30. " ENABLE ,Enables HDMI for this head" "Disabled,Enabled" bitfld.long 0x5C 28. " CA_SELECT ,Value of channel allocation value software/hardware based" "SW,HW" textline " " bitfld.long 0x5C 27. " SS_SELECT ,Value of sample size software/hardware based" "SW,HW" bitfld.long 0x5C 26. " SF_SELECT ,Value of sampling frequency software/hardware based" "SW,HW" textline " " bitfld.long 0x5C 25. " CC_SELECT ,Value of channel count software/hardware based" "SW,HW" bitfld.long 0x5C 24. " CT_SELECT ,Value of coding type software/hardware based" "SW,HW" textline " " hexmask.long.byte 0x5C 16.--20. 1. " MAX_AC_PACKET ,Maximum number of 32-pixel packets" bitfld.long 0x5C 12. " SAMPLE_FLAT ,Controls the values of HB2[3:0]" "CLR,SET" textline " " bitfld.long 0x5C 10. " AUDIO_LAYOUT_SELECT ,AUDIO_LAYOUT information is automatically detected by hardware/software" "HW,SW" bitfld.long 0x5C 8. " AUDIO_LAYOUT ,Controls layout HB1[4]" "Layout 2CH,Layout 8CH" textline " " hexmask.long.byte 0x5C 0.--6. 1. " REKEY ,Number of clocks required for HDCP rekey" line.long 0x60 "NV_PDISP_SOR_HDMI_VSYNC_KEEPOUT_0,HDMI VSYNC Keepout" bitfld.long 0x60 31. " ENABLE ,Enables keepout window" "Disabled,Enabled" hexmask.long.word 0x60 16.--25. 1. " START ,Defines the start of the keepout period" textline " " hexmask.long.word 0x60 0.--9. 1. " END ,Defines the end of the keepout period" line.long 0x64 "NV_PDISP_SOR_HDMI_VSYNC_WINDOW_0,HDMI VSYNC Window" bitfld.long 0x64 31. " ENABLE ,Allow EESS signaling during the window of opportunity" "Disabled,Enabled" hexmask.long.word 0x64 16.--25. 1. " START ,Defines the start of the window of opportunity" textline " " hexmask.long.word 0x64 0.--9. 1. " END ,Defines the end of the window of opportunity" line.long 0x68 "NV_PDISP_SOR_HDMI_GCP_CTRL_0,HDMI GCP Control" bitfld.long 0x68 8. " SINGLE ,Cause infoframe to be transmitted exactly once" "Disabled,Enabled" bitfld.long 0x68 4. " OTHER ,Cause infoframe to be transmitted to every other frame" "Disabled,Enabled" textline " " bitfld.long 0x68 0. " ENABLE ,Enables the hardware calculation to be passed to the packet" "Disabled,Enabled" rgroup.long 0x310++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_GCP_STATUS_0,HDMI GCP Status" bitfld.long 0x00 24.--26. " HSYNC_END_PP ,Indicates the pixel phase for the end fragment number of the HSYNC" ",PP_1,PP_2,PP_3,PP_0,?..." bitfld.long 0x00 20.--22. " HSYNC_START_PP ,Indicates the pixel phase for the start fragment number of the HSYNC" ",PP_1,PP_2,PP_3,PP_0,?..." textline " " bitfld.long 0x00 16.--18. " VSYNC_END_PP ,Indicates the pixel phase for the end fragment number of the VSYNC" ",PP_1,PP_2,PP_3,PP_0,?..." bitfld.long 0x00 12.--14. " VSYNC_START_PP ,Indicates the pixel phase for the start fragment number of the VSYNC" ",PP_1,PP_2,PP_3,PP_0,?..." textline " " bitfld.long 0x00 8.--10. " ACTIVE_END_PP ,Indicates the pixel phase for the END fragment number of the ACTIVE" ",PP_1,PP_2,PP_3,PP_0,?..." bitfld.long 0x00 4.--6. " ACTIVE_START_PP ,Indicates the pixel phase for the start fragment number of the ACTIVE" ",PP_1,PP_2,PP_3,PP_0,?..." textline " " bitfld.long 0x00 0. " SENT ,Field will be set to after the first packet is sent" "Waiting,Done" group.long 0x314++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_GCP_SUBPACK_0,HDMI GCP SUBPACK" hexmask.long.byte 0x00 16.--23. 1. " SB2 ,SB2" hexmask.long.byte 0x00 8.--15. 1. " SB1 ,SB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " SB0 ,SB0" group.long 0x320++0x07 line.long 0x00 "NV_PDISP_SOR_HDMI_EMU0_0,SOR NV PDISP SOR HDMI EMU0" line.long 0x04 "NV_PDISP_SOR_HDMI_EMU1_0,SOR NV PDISP SOR HDMI EMU1" rgroup.long 0x328++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_EMU1_RDATA_0,SOR NV PDISP SOR HDMI EMU1 RDATA" group.long 0x32C++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_SPARE_0,HDMI Spare" rgroup.long 0x330++0x07 line.long 0x00 "NV_PDISP_SOR_HDMI_SPDIF_CHN_STATUS1_0,HDMI SPDIF Channel Status1" bitfld.long 0x00 28.--31. " ACCURACY ,Transmitter clock accuracy" "High,Normal,Variable pitch,Other,?..." bitfld.long 0x00 24.--27. " SFREQ ,Reported sampling frequency of the input audio stream" ",Undefined,?..." textline " " bitfld.long 0x00 20.--23. " CHANNEL ,Channel number of the audio" "Undefined,?..." bitfld.long 0x00 16.--19. " SOURCE ,Source number of the audio" "Undefined,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " CODE ,This byte defines the category code of the input device" bitfld.long 0x00 6.--7. " MODE ,Defines one of four possible channel status formats for bytes 1-23 of channel status" "0,1,2,3" textline " " bitfld.long 0x00 3.--5. " D ,2 audio channels without pre-emphasis/pre-emphasis" "No pre-emphasis,Pre-emphasis,?..." bitfld.long 0x00 2. " COPYRIGHT ,Copyright status of the audio" "Yes,No" textline " " bitfld.long 0x00 1. " TYPE ,Specifies the type of data the audio word represents" "PCM,Other" bitfld.long 0x00 0. " USE ,Specifies consumer/professional use of the channel status block" "CONSUMER,PRO" line.long 0x04 "NV_PDISP_SOR_HDMI_SPDIF_CHN_STATUS2_0,HDMI SPDIF Channel Status2" bitfld.long 0x04 4.--7. " ORIGINAL ,ORIGINAL" "Undefined,?..." bitfld.long 0x04 1.--3. " LENGTH ,Audio sample word length of this block depends on MAX_LENGTH" "MAX20_UNDEF/MAX24_UNDEF,MAX20_16BITS/MAX24_20BITS,MAX20_18BITS/MAX24_22BITS,,MAX20_19BITS/MAX24_23BITS,MAX20_20BITS/MAX24_24BITS,MAX20_17BITS/MAX24_21BITS,?..." textline " " bitfld.long 0x04 0. " MAX_LENGTH ,Reports if the maximum audio sample word length is 20 bits or 24 bits" "0,1" group.long 0x33C++0x03 line.long 0x00 "NV_PDISP_HDCPRIF_ROM_CTRL_0,HDCPRIF Control Register" hexmask.long.word 0x00 0.--15. 1. " ACK_ATTEMPTS ,Controls the number of Ack Attempts" group.long 0x394++0x17 line.long 0x00 "NV_PDISP_HDCPRIF_ROM_TIMING_0,HDCPRIF Control Timing Register" bitfld.long 0x00 24.--27. " PRESCALE ,Prescale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 16.--23. 1. " START_DLY ,Defines how many scaled ticks pass before SDA (the data bit) makes a transition after the rising edge of SCL" textline " " hexmask.long.byte 0x00 8.--15. 1. " DATA_DLY ,Defines how many scaled ticks pass before SDA (the data bit) makes a transition after the falling edge of SCL" hexmask.long.byte 0x00 0.--7. 1. " BIT_PERIOD ,Defines the timing of the SCL (serial clock) output" line.long 0x04 "NV_PDISP_SOR_REFCLK_0,SOR REFCLK" hexmask.long.byte 0x04 8.--15. 1. " DIV_INT ,Divisor integer" bitfld.long 0x04 6.--7. " DIV_FRAC ,Divisor fractional" "0,1,2,3" line.long 0x08 "NV_PDISP_CRC_CONTROL_0,CRC Control" bitfld.long 0x08 0. " ARM_CRC_ENABLE ,Enables or disables computation of CRC" "Disabled,Enabled" line.long 0x0C "NV_PDISP_INPUT_CONTROL_0,Input Control" bitfld.long 0x0C 1. " ARM_VIDEO_RANGE ,Controls whether R/G/B values of 0 and 255 are permitted" "Full,Limited" bitfld.long 0x0C 0. " HDMI_SRC_SELECT ,Selects from which of the two display units to take input" "Display,DisplayB" line.long 0x10 "NV_PDISP_SCRATCH_0,Scratch" line.long 0x14 "NV_PDISP_KEY_CTRL_0,HDCP KEY SRAM Register Control" hexmask.long.word 0x14 22.--31. 0x40 " ADDRESS ,Reports the next byte address in the local key store" hexmask.long.word 0x14 12.--21. 0x10 " LOAD_ADDRESS ,Selects the start byte address of the contiguous locations in the local key store" textline " " rbitfld.long 0x14 6. " PKEY_LOADED ,Indicates that the private key value has been received from KFUSE and is ready for use" "False,True" bitfld.long 0x14 5. " PKEY_REQUEST_RELOAD ,Requests that the private key be requested again from KFUSE" "Idle,Triggered" textline " " bitfld.long 0x14 4. " WRITE16 ,HDCP keys module will write all 16 bytes of data into the local key store" "Done,Triggered" bitfld.long 0x14 1. " AUTOINC ,Auto-increment" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " LOCAL_KEYS ,On-chip HDCP key store " "Disabled,Enabled" group.long 0x3B8++0x13 line.long 0x00 "NV_PDISP_KEY_HDCP_KEY_0_0,SOR NV_PDISP Key HDCP Key 0" line.long 0x04 "NV_PDISP_KEY_HDCP_KEY_1_0,SOR NV_PDISP Key HDCP Key 1" line.long 0x08 "NV_PDISP_KEY_HDCP_KEY_2_0,SOR NV_PDISP Key HDCP Key 2" line.long 0x0C "NV_PDISP_KEY_HDCP_KEY_3_0,SOR NV_PDISP Key HDCP Key 3" line.long 0x10 "NV_PDISP_KEY_HDCP_KEY_TRIG_0,SOR NV PDISP Key HDCP Key Trigger" bitfld.long 0x10 8. " LOAD_HDCP_KEY ,Load HDCP key" "Idle,Triggered" wgroup.long 0x3CC++0x03 line.long 0x00 "NV_PDISP_KEY_SKEY_INDEX_0,SOR NV PDISP Key SKEY INDEX" bitfld.long 0x00 0.--3. " IDX_VALUE ,Index value" ",,,,,,,,,,,,,,,Test" group.long 0x3F0++0x03 line.long 0x00 "NV_PDISP_SOR_AUDIO_CNTRL0_0,HD Audio (Known as Azalia)" rbitfld.long 0x00 31. " INPUT_MODE ,This bit indicates what the audio data source is" "HDA,SPDIF" bitfld.long 0x00 29. " INJECT_NULLSMPL ,Inserts null samples into the audio FIFO for each Azalia frame" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " SOURCE_SELECT ,Determines whether to use the S/PDIF or Azalia (HDAL) audio input" "Auto,SPDIF,HDAL,?..." rbitfld.long 0x00 16.--19. " SAMPLING_FREQ ,Incoming audio stream sampling frequency in the Azalia code" "FREQ_44_1KHZ,FREQ Unknown,FREQ_48_0KHZ,FREQ_32_0KHZ,,,,,FREQ_88_2KHZ,,FREQ_96_0KHZ,,FREQ_176_4KHZ,,FREQ_192_0KHZ,?..." textline " " bitfld.long 0x00 12. " AFIFO_FLUSH ,Ensures that the next new audio packet sent will begin on the correct channel" "Disabled,Enabled" bitfld.long 0x00 0. " PORT_CONNECTIVITY ,Controls the behavior of the Port Connectivity field of the Azalia configuration defaults verb" "Enabled,Disabled" group.long 0x3FC++0x1B line.long 0x00 "NV_PDISP_SOR_AUDIO_NVAL_0320_0,SOR Audio N values 32 KHz" hexmask.long.tbyte 0x00 0.--19. 1. " VALUE ,The correct N value for 32 KHz audio at the current pixel clock frequency" line.long 0x04 "NV_PDISP_SOR_AUDIO_NVAL_0441_0,SOR Audio N values 44.1 KHz" hexmask.long.tbyte 0x04 0.--19. 1. " VALUE ,The correct N value for 44.1 KHz audio at the current pixel clock frequency" line.long 0x08 "NV_PDISP_SOR_AUDIO_NVAL_0882_0,SOR Audio N values 88.2 KHz" hexmask.long.tbyte 0x08 0.--19. 1. " VALUE ,The correct N value for 88.2 KHz audio at the current pixel clock frequency" line.long 0x0C "NV_PDISP_SOR_AUDIO_NVAL_1764_0,SOR Audio N values 176.4 KHz" hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE ,The correct N value for 176.4 KHz audio at the current pixel clock frequency" line.long 0x10 "NV_PDISP_SOR_AUDIO_NVAL_0480_0,SOR Audio N values 48 KHz" hexmask.long.tbyte 0x10 0.--19. 1. " VALUE ,The correct N value for 48 KHz audio at the current pixel clock frequency" line.long 0x14 "NV_PDISP_SOR_AUDIO_NVAL_0960_0,SOR Audio N values 96 KHz" hexmask.long.tbyte 0x14 0.--19. 1. " VALUE ,The correct N value for 96 KHz audio at the current pixel clock frequency" line.long 0x18 "NV_PDISP_SOR_AUDIO_NVAL_1920_0,SOR Audio N values 192 KHz" hexmask.long.tbyte 0x18 0.--19. 1. " VALUE ,The correct N value for 192 KHz audio at the current pixel clock frequency" hgroup.long 0x418++0x0F hide.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH0_0,SOR Audio HDA Scratch0" hide.long 0x04 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH1_0,SOR Audio HDA Scratch1" hide.long 0x08 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH2_0,SOR Audio HDA Scratch2" hide.long 0x0C "NV_PDISP_SOR_AUDIO_HDA_SCRATCH3_0,SOR Audio HDA Scratch3" rgroup.long 0x428++0x07 line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH0_0,SOR Audio HDA Codec SCRATCH0" line.long 0x04 "NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH1_0,SOR Audio HDA Codec SCRATCH1" group.long 0x430++0x03 line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_ELD_BUFWR_0,SOR Audio HDA ELD Buffer" hexmask.long.byte 0x00 8.--15. 1. " INDEX ,Index" hexmask.long.byte 0x00 0.--7. 1. " DATABYTE ,Databyte" group.long 0x434++0x03 line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_PRESENSE_0,SOR Audio HDA Presense" bitfld.long 0x00 1. " ELDV ,Indicates whether the data in the ELD buffer is valid and ready to read" "Invalid,Valid" bitfld.long 0x00 0. " PD ,Presence detect" "Not present,Present" rgroup.long 0x438++0x03 line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_CP_0,SOR Audio HDA Content Protection" bitfld.long 0x00 2. " REQUEST_STATE_VALID ,Request state valid" "Invalid,Valid" bitfld.long 0x00 0.--1. " REQUEST_STATE ,Request state" "Don't care,,Protection off,Protection on" group.long 0x43C++0x23 line.long 0x00 "NV_PDISP_SOR_AUDIO_AVAL_0320_0,Audio AVAL 32 KHz" hexmask.long.tbyte 0x00 0.--19. 1. " VALUE ,The correct A value for 32 KHz audio at the current pixel clock frequency" line.long 0x04 "NV_PDISP_SOR_AUDIO_AVAL_0441_0,Audio AVAL 44.1 KHz" hexmask.long.tbyte 0x04 0.--19. 1. " VALUE ,The correct A value for 44.1 KHz audio at the current pixel clock frequency" line.long 0x08 "NV_PDISP_SOR_AUDIO_AVAL_0882_0,Audio AVAL 88.2 KHz" hexmask.long.tbyte 0x08 0.--19. 1. " VALUE ,The correct A value for 88.2 KHz audio at the current pixel clock frequency" line.long 0x0C "NV_PDISP_SOR_AUDIO_AVAL_1764_0,Audio AVAL 176.4 KHz" hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE ,The correct A value for 176.4 KHz audio at the current pixel clock frequency" line.long 0x10 "NV_PDISP_SOR_AUDIO_AVAL_0480_0,Audio AVAL 48 KHz" hexmask.long.tbyte 0x10 0.--19. 1. " VALUE ,The correct A value for 48 KHz audio at the current pixel clock frequency" line.long 0x14 "NV_PDISP_SOR_AUDIO_AVAL_0960_0,Audio AVAL 96 KHz" hexmask.long.tbyte 0x14 0.--19. 1. " VALUE ,The correct A value for 96 KHz audio at the current pixel clock frequency" line.long 0x18 "NV_PDISP_SOR_AUDIO_AVAL_1920_0,Audio AVAL 192 KHz" hexmask.long.tbyte 0x18 0.--19. 1. " VALUE ,The correct A value for 192 KHz audio at the current pixel clock frequency" line.long 0x1C "NV_PDISP_SOR_AUDIO_AVAL_DEFAULT_0,Audio AVAL Default" hexmask.long.tbyte 0x1C 0.--19. 1. " VALUE ,Default A value if the Azalia codec sampling frequency does not match any" line.long 0x20 "NV_PDISP_SOR_AUDIO_GEN_CTRL_0,SOR Audio GEN Control" hexmask.long.word 0x20 16.--31. 1. " DEV_ID ,Device ID to identify the current chip" hexmask.long.byte 0x20 0.--7. 1. " REV_ID ,Rev ID for the codec" group.long 0x470++0x0B line.long 0x00 "NV_PDISP_INT_STATUS_0,NV PDISP Interrupt Status" sif (cpuis("TEGRAX2")) eventfld.long 0x00 21. " LANE3_FIFO_OVERFLOW ,LANE3 FIFO overflow" "No interrupt,Interrupt" eventfld.long 0x00 20. " LANE2_FIFO_OVERFLOW ,LANE2 FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " LANE1_FIFO_OVERFLOW ,LANE1 FIFO overflow" "No interrupt,Interrupt" eventfld.long 0x00 18. " LANE0_FIFO_OVERFLOW ,LANE0 FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " SPKT_OVERRUN ,SPKT overrun" "No interrupt,Interrupt" eventfld.long 0x00 16. " LANE3_STEER_ERROR ,LANE3 steer error" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " LANE2_STEER_ERROR ,LANE2 steer error" "No interrupt,Interrupt" eventfld.long 0x00 14. " LANE1_STEER_ERROR ,LANE1 steer error" "No interrupt,Interrupt" textline " " eventfld.long 0x00 13. " LANE0_STEER_ERROR ,LANE0 steer error" "No interrupt,Interrupt" eventfld.long 0x00 12. " LANE3_PIXPACK_OVERFLOW ,LANE3 pixpack overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 11. " LANE2_PIXPACK_OVERFLOW ,LANE2 pixpack overflow" "No interrupt,Interrupt" eventfld.long 0x00 10. " LANE1_PIXPACK_OVERFLOW ,LANE1 pixpack overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " LANE0_PIXPACK_OVERFLOW ,LANE0 pixpack overflow" "No interrupt,Interrupt" eventfld.long 0x00 8. " LANE3_FIFO_UNDERFLOW ,LANE3 FIFO underflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 7. " LANE2_FIFO_UNDERFLOW ,LANE2 FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 6. " LANE1_FIFO_UNDERFLOW ,LANE1 FIFO underflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 5. " LANE0_FIFO_UNDERFLOW ,LANE0 FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 4. " REG_SECURE_ACCESS_ERR ,REG secure access error" "No interrupt,Interrupt" textline " " endif eventfld.long 0x00 3. " SCRATCH ,Scratch" "No interrupt,Interrupt" eventfld.long 0x00 2. " CP_REQUEST ,CP Request" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " CODEC_SCRATCH1 ,Codec scratch1" "No interrupt,Interrupt" eventfld.long 0x00 0. " CODEC_SCRATCH0 ,Codec scratch0" "No interrupt,Interrupt" line.long 0x04 "NV_PDISP_INT_MASK_0,NV PDISP Interrupt Masked" sif (cpuis("TEGRAX2")) bitfld.long 0x04 21. " LANE3_FIFO_OVERFLOW_MASK ,LANE3 FIFO overflow mask" "Masked,Not masked" bitfld.long 0x04 20. " LANE2_FIFO_OVERFLOW_MASK ,LANE2 FIFO overflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 19. " LANE1_FIFO_OVERFLOW_MASK ,LANE1 FIFO overflow mask" "Masked,Not masked" bitfld.long 0x04 18. " LANE0_FIFO_OVERFLOW_MASK ,LANE0 FIFO overflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 17. " SPKT_OVERRUN_MASK ,SPKT overrun mask" "Masked,Not masked" bitfld.long 0x04 16. " LANE3_STEER_ERROR_MASK ,LANE3 steer error mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " LANE2_STEER_ERROR_MASK ,LANE2 steer error mask" "Masked,Not masked" bitfld.long 0x04 14. " LANE1_STEER_ERROR_MASK ,LANE1 steer error mask" "Masked,Not masked" textline " " bitfld.long 0x04 13. " LANE0_STEER_ERROR_MASK ,LANE0 steer error mask" "Masked,Not masked" bitfld.long 0x04 12. " LANE3_PIXPACK_OVERFLOW_MASK ,LANE3 pixpack overflow mask" "Masked,Not Masked" textline " " bitfld.long 0x04 11. " LANE2_PIXPACK_OVERFLOW_MASK ,LANE2 pixpack overflow mask" "Masked,Not masked" bitfld.long 0x04 10. " LANE1_PIXPACK_OVERFLOW_MASK ,LANE1 pixpack overflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 9. " LANE0_PIXPACK_OVERFLOW_MASK ,LANE0 pixpack overflow mask" "Masked,Not masked" bitfld.long 0x04 8. " LANE3_FIFO_UNDERFLOW_MASK ,LANE3 FIFO underflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 7. " LANE2_FIFO_UNDERFLOW_MASK ,LANE2 FIFO underflow mask" "Masked,Not masked" bitfld.long 0x04 6. " LANE1_FIFO_UNDERFLOW_MASK ,LANE1 FIFO underflow mask" "Masked,Not masked" textline " " bitfld.long 0x04 5. " LANE0_FIFO_UNDERFLOW_MASK ,LANE0 FIFO underflow mask" "Masked,Not masked" bitfld.long 0x04 4. " REG_SECURE_ACCESS_ERR_MASK ,REG secure access error" "Masked,Not masked" textline " " endif bitfld.long 0x04 3. " SCRATCH_MASK ,Scratch mask" "Masked,Not masked" bitfld.long 0x04 2. " CP_REQUEST_MASK ,CP request mask" "Masked,Not masked" textline " " bitfld.long 0x04 1. " CODEC_SCRATCH1_MASK ,Codec scratch1 mask" "Masked,Not masked" bitfld.long 0x04 0. " CODEC_SCRATCH0_MASK ,Codec scratch0 mask" "Masked,Not masked" line.long 0x08 "NV_PDISP_INT_ENABLE_0,NV PDISP Interrupt Enable" sif (cpuis("TEGRAX2")) bitfld.long 0x08 21. " LANE3_FIFO_OVERFLOW_ENABLE ,LANE3 FIFO overflow enable" "Disabled,Enabled" bitfld.long 0x08 20. " LANE2_FIFO_OVERFLOW_ENABLE ,LANE2 FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " LANE1_FIFO_OVERFLOW_ENABLE ,LANE1 FIFO overflow enable" "Disabled,Enabled" bitfld.long 0x08 18. " LANE0_FIFO_OVERFLOW_ENABLE ,LANE0 FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " SPKT_OVERRUN_ENABLE ,SPKT overrun enable" "Disabled,Enabled" bitfld.long 0x08 16. " LANE3_STEER_ERROR_ENABLE ,LANE3 steer error enable" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " LANE2_STEER_ERROR_ENABLE ,LANE2 steer error enable" "Disabled,Enabled" bitfld.long 0x08 14. " LANE1_STEER_ERROR_ENABLE ,LANE1 steer error enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " LANE0_STEER_ERROR_ENABLE ,LANE0 steer error enable" "Disabled,Enabled" bitfld.long 0x08 12. " LANE3_PIXPACK_OVERFLOW_ENABLE ,LANE3 pixpack overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " LANE2_PIXPACK_OVERFLOW_ENABLE ,LANE2 pixpack overflow enable" "Disabled,Enabled" bitfld.long 0x08 10. " LANE1_PIXPACK_OVERFLOW_ENABLE ,LANE1 pixpack overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " LANE0_PIXPACK_OVERFLOW_ENABLE ,LANE0 pixpack overflow enable" "Disabled,Enabled" bitfld.long 0x08 8. " LANE3_FIFO_UNDERFLOW_ENABLE ,LANE3 FIFO underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " LANE2_FIFO_UNDERFLOW_ENABLE ,LANE2 FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x08 6. " LANE1_FIFO_UNDERFLOW_ENABLE ,LANE1 FIFO underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " LANE0_FIFO_UNDERFLOW_ENABLE ,LANE0 FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x08 4. " REG_SECURE_ACCESS_ERR_ENABLE ,REG secure access error enable" "Disabled,Enabled" textline " " endif bitfld.long 0x08 3. " SCRATCH_ENABLE ,Scratch enable" "Disabled,Enabled" bitfld.long 0x08 2. " CP_REQUEST_ENABLE ,CP request enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " CODEC_SCRATCH1_ENABLE ,Codec scratch1 enable" "Disabled,Enabled" bitfld.long 0x08 0. " CODEC_SCRATCH0_ENABLE ,Codec scratch0 enable" "Disabled,Enabled" rgroup.long 0x47C++0x07 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_M0_LO_0,SOR NV PDISP SOR TMDS HDCP M0 Low" line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_M0_HI_0,SOR NV PDISP SOR TMDS HDCP M0 High" group.long 0x484++0x03 line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_STATUS_0,SOR NV PDISP SOR TMDS HDCP Status" bitfld.long 0x00 8. " OVERRIDE_ENABLE ,Override enable" "Disabled,Enabled" bitfld.long 0x00 2. " SCOPE_OVERRIDE ,Scope override" "No override,Override" textline " " bitfld.long 0x00 1. " UNPROTECTED_OVERRIDE ,Unprotected override" "No override,Override" bitfld.long 0x00 0. " RPTR_OVERRIDE ,Repeater override" "No override,Override" group.long 0x488++0x07 line.long 0x00 "NV_HDACODEC_AUDIO_GEN_CTL_0,HDACODEC Audio GEN Control" bitfld.long 0x00 4. " COPY_POLARITY ,The polarity of the COPY bit is currently inverted" "Old,New" bitfld.long 0x00 0.--3. " CHSTS_FS_3840 ,CHSTS sampling frequency 384 KHz" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_CTRL_0,HDMI Vendor Specific Infoframe Control" bitfld.long 0x04 16. " VIDEO_FMT ,Specifies how the remaining bytes in the infoframe should be interpreted by the specification" "SW controlled,HW controlled" bitfld.long 0x04 9. " CHKSUM_HW ,Hardware provides a way to calculate the checksum for the infoframes" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " SINGLE ,Cause infoframe to be transmitted exactly once" "Disabled,Enabled" bitfld.long 0x04 4. " OTHER ,Cause infoframe to be transmitted every other frame" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ENABLE ,Initiates infoframe generation" "Disabled,Enabled" rgroup.long 0x490++0x03 line.long 0x00 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_STATUS_0,HDMI Vendor Specific Infoframe Status" bitfld.long 0x00 0. " SENT ,Field will be set to after the first packet is sent" "Waiting,Done" group.long 0x494++0x23 line.long 0x00 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_HEADER_0,HDMI Vendor Specific Infoframe Header" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" textline " " hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" line.long 0x04 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK0_LOW_0,HDMI Vendor Specific Infoframe SUBPACK0 Low" hexmask.long.byte 0x04 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x04 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x04 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x04 0.--7. 1. " PB0 ,PB0" line.long 0x08 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK0_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK0 High" hexmask.long.byte 0x08 16.--23. 1. " PB6 ,PB6" hexmask.long.byte 0x08 8.--15. 1. " PB5 ,PB5" textline " " hexmask.long.byte 0x08 0.--7. 1. " PB4 ,PB4" line.long 0x0C "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK1_LOW_0,HDMI Vendor Specific Infoframe SUBPACK1 Low" hexmask.long.byte 0x0C 24.--31. 1. " PB10 ,PB10" hexmask.long.byte 0x0C 16.--23. 1. " PB9 ,PB9" textline " " hexmask.long.byte 0x0C 8.--15. 1. " PB8 ,PB8" hexmask.long.byte 0x0C 0.--7. 1. " PB7 ,PB7" line.long 0x10 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK1_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK1 High" hexmask.long.byte 0x10 16.--23. 1. " PB13 ,PB13" hexmask.long.byte 0x10 8.--15. 1. " PB12 ,PB12" textline " " hexmask.long.byte 0x10 0.--7. 1. " PB11 ,PB11" line.long 0x14 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK2_LOW_0,HDMI Vendor Specific Infoframe SUBPACK2 Low" hexmask.long.byte 0x14 24.--31. 1. " PB17 ,PB17" hexmask.long.byte 0x14 16.--23. 1. " PB16 ,PB16" textline " " hexmask.long.byte 0x14 8.--15. 1. " PB15 ,PB15" hexmask.long.byte 0x14 0.--7. 1. " PB14 ,PB14" line.long 0x18 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK2_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK2 High" hexmask.long.byte 0x18 16.--23. 1. " PB20 ,PB20" hexmask.long.byte 0x18 8.--15. 1. " PB19 ,PB19" textline " " hexmask.long.byte 0x18 0.--7. 1. " PB18 ,PB18" line.long 0x1C "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK3_LOW_0,HDMI Vendor Specific Infoframe SUBPACK3 Low" hexmask.long.byte 0x1C 24.--31. 1. " PB24 ,PB24" hexmask.long.byte 0x1C 16.--23. 1. " PB23 ,PB23" textline " " hexmask.long.byte 0x1C 8.--15. 1. " PB22 ,PB22" hexmask.long.byte 0x1C 0.--7. 1. " PB21 ,PB21" line.long 0x20 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK3_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK3 High" hexmask.long.byte 0x20 16.--23. 1. " PB27 ,PB27" hexmask.long.byte 0x20 8.--15. 1. " PB26 ,PB26" textline " " hexmask.long.byte 0x20 0.--7. 1. " PB25 ,PB25" group.long 0x4C0++0x27 line.long 0x00 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_HEADER_0,SOR DP Audio InfoFrame Header" hexmask.long.byte 0x00 24.--31. 1. " HB3 ,HB3" hexmask.long.byte 0x00 16.--23. 1. " HB2 ,HB2" textline " " hexmask.long.byte 0x00 8.--15. 1. " HB1 ,HB1" hexmask.long.byte 0x00 0.--7. 1. " HB0 ,HB0" line.long 0x04 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_SUBPACK0_LOW_0,SOR DP Audio InfoFrame SUBPACK0 Low" hexmask.long.byte 0x04 24.--31. 1. " PB3 ,PB3" hexmask.long.byte 0x04 16.--23. 1. " PB2 ,PB2" textline " " hexmask.long.byte 0x04 8.--15. 1. " PB1 ,PB1" hexmask.long.byte 0x04 0.--7. 1. " PB0 ,PB0" line.long 0x08 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_SUBPACK0_HIGH_0,SOR DP Audio InfoFrame SUBPACK0 High" hexmask.long.byte 0x08 8.--15. 1. " PB5 ,PB5" hexmask.long.byte 0x08 0.--7. 1. " PB4 ,PB4" line.long 0x0C "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0320_0,SOR DP Audio Timestamp 32 KHz" hexmask.long.word 0x0C 16.--31. 1. " N ,N" hexmask.long.word 0x0C 0.--15. 1. " D_M ,D_N" line.long 0x10 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0441_0,SOR DP Audio Timestamp 44.1 KHz" hexmask.long.word 0x10 16.--31. 1. " N ,N" hexmask.long.word 0x10 0.--15. 1. " D_M ,D_N" line.long 0x14 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0882_0,SOR DP Audio Timestamp 88.2 KHz" hexmask.long.word 0x14 16.--31. 1. " N ,N" hexmask.long.word 0x14 0.--15. 1. " D_M ,D_N" line.long 0x18 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_1764_0,SOR DP Audio Timestamp 176.4" hexmask.long.word 0x18 16.--31. 1. " N ,N" hexmask.long.word 0x18 0.--15. 1. " D_M ,D_N" line.long 0x1C "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0480_0,SOR DP Audio Timestamp 48 KHz" hexmask.long.word 0x1C 16.--31. 1. " N ,N" hexmask.long.word 0x1C 0.--15. 1. " D_M ,D_N" line.long 0x20 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0960_0,SOR DP Audio Timestamp 96 KHz" hexmask.long.word 0x20 16.--31. 1. " N ,N" hexmask.long.word 0x20 0.--15. 1. " D_M ,D_N" line.long 0x24 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_1920_0,SOR DP Audio Timestamp 192 KHz" hexmask.long.word 0x24 16.--31. 1. " N ,N" hexmask.long.word 0x24 0.--15. 1. " D_M ,D_N" group.long 0x4F0++0x03 line.long 0x00 "NV_PDISP_HDMI_AUDIO_N_0,Audio N" bitfld.long 0x00 28. " LOOKUP ,Hardware will select the appropriate value of N" "Disabled,Enabled" rgroup.long 0x4F4++0x03 line.long 0x00 "NV_PDISP_HDMI_LANE_CALIB_FUSE_0,NV PDISP HDMI Lane Calibration Fuse" hexmask.long.byte 0x00 24.--31. 1. " LANE3_CALIB ,Lane 3 calibration" hexmask.long.byte 0x00 16.--23. 1. " LANE2_CALIB ,Lane 2 calibration" textline " " hexmask.long.byte 0x00 8.--15. 1. " LANE1_CALIB ,Lane 1 calibration" hexmask.long.byte 0x00 0.--7. 1. " LANE0_CALIB ,Lane 0 calibration" group.long 0x4F8++0x0F line.long 0x00 "NV_PDISP_SOR_HDMI2_CTRL_0,NV PDISP SOR HDMI2 Control" hexmask.long.word 0x00 16.--31. 1. " SSCP_START ,This sets the start point of the SSCP period" bitfld.long 0x00 4.--7. " SSCP_LENGTH ,This sets the length of the SSCP period which is output once per frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 2. " SCRAMBLE_AT_LOADV ,Scramble at LOADV" "Disabled,Enabled" bitfld.long 0x00 1. " CLOCK_MODE ,This bit allows the clock signal to be divide by 4" "Normal,Mode DIV by4" textline " " bitfld.long 0x00 0. " SCRAMBLE ,This bit enables scrambling for HDMI 2.0" "Disabled,Enabled" line.long 0x04 "NV_PDISP_SOR_HDMI2_LFSR0_0,NV PDISP SOR HDMI2 LFSR0" hexmask.long.word 0x04 16.--31. 1. " LANE1_SEED ,Lane 1 seed" hexmask.long.word 0x04 0.--15. 1. " LANE0_SEED ,Lane 0 seed" line.long 0x08 "NV_PDISP_SOR_HDMI2_LFSR1_0,NV PDISP SOR HDMI2 LFSR1" hexmask.long.word 0x08 0.--15. 1. " LANE2_SEED ,Lane 2 seed" line.long 0x0C "NV_PDISP_SOR_HDCP22_CTRL_0,HDCP 2.2 Control Register" bitfld.long 0x0C 6. " DISABLE_LANE_CNT0 ,Enables HW to disable encryption when SOR lane count is set to 0" "Yes,No" bitfld.long 0x0C 5. " DISABLE_DETACH ,Enables HW to disable encryption when SOR is detached from the head" "Yes,No" textline " " bitfld.long 0x0C 4. " REPEATER ,Reporting that the SOR is authenticated with a downstream REPEATER " "Yes,No" bitfld.long 0x0C 2. " LOCK_TYPE ,Protected software write to the TYPE register" "Unlocked,Locked" textline " " bitfld.long 0x0C 1. " INIT ,Initial value to indicate a fresh start of a new session" "Done,Triggered" bitfld.long 0x0C 0. " CRYPT ,Would actually start encrypting the incoming data" "Disabled,Enabled" rgroup.long 0x508++0x03 line.long 0x00 "NV_PDISP_SOR_HDCP22_STATUS_0,HDCP 2.2 Status register" bitfld.long 0x00 9.--11. " HDCP_STATE ,HDCP_STATE" "Idle,Wait LC128,Wait AES ready,HDCP22 enable,HDMI encrypt on,DP encrypt on,?..." bitfld.long 0x00 7.--8. " AUTODIS_STATE ,AUTODIS state" "Idle,Encrypting,Disabled LC_0,Disabled detach" textline " " bitfld.long 0x00 6. " LC128_ERROR ,LC128 error" "No,Yes" bitfld.long 0x00 5. " LANE_CNT0_DISABLE ,Lane CNT0 disable" "No,Yes" textline " " bitfld.long 0x00 4. " DETACHED_DISABLE ,Detached disable" "No,Yes" bitfld.long 0x00 3. " DATA_CNT_OVERFLOW ,This indicates if the Data counter has overflowed" "No,Yes" textline " " bitfld.long 0x00 2. " FRAME_CNT_OVERFLOW ,This indicates if the Frame counter has overflowed" "No overflow,Overflow" bitfld.long 0x00 0. " CRYPT_STATUS ,Reports the actual link encryption status" "Inactive,Active" group.long 0x510++0x2B line.long 0x00 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_MSB_0,AES-CTR Key Bus MBS" line.long 0x04 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB1_0,AES-CTR Key Bus LSB1" line.long 0x08 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB2_0,AES-CTR Key Bus LSB2" line.long 0x0C "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB3_0,AES-CTR Key Bus LSB3" line.long 0x10 "NV_PDISP_SOR_HDCP22_AES_CTR_DATA_MSB_0,AES-CTR Data Bus MBS" line.long 0x14 "NV_PDISP_SOR_HDCP22_AES_CTR_DATA_LSB_0,AES-CTR Data Bus LBS" line.long 0x18 "NV_PDISP_SOR_HDCP22_SST_DP_TYPE_0,AES-CTR DP Type" hexmask.long.byte 0x18 0.--7. 1. " VALUE ,Value" line.long 0x1C "NV_PDISP_SOR_HDCP22_LC128_MSB_0,NV PDISP SOR HDCP22 LC128 MSB" line.long 0x20 "NV_PDISP_SOR_HDCP22_LC128_LSB1_0,NV PDISP SOR HDCP22 LC128 LSB1" line.long 0x24 "NV_PDISP_SOR_HDCP22_LC128_LSB2_0,NV PDISP SOR HDCP22 LC128 LSB2" line.long 0x28 "NV_PDISP_SOR_HDCP22_LC128_LSB3_0,NV PDISP SOR HDCP22 LC128 LSB3" sif (cpuis("TEGRAX2")) rgroup.long 0x53C++0x03 line.long 0x00 "CTXSW_0_NEXT_0,Context Switch Register" hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL ,Next requested channel" hexmask.long.word 0x00 0.--9. 1. " NEXT_CLASS ,Next requested class" group.long 0x540++0x03 line.long 0x00 "CTXSW_0,Context Switch Register" hexmask.long.word 0x00 11.--20. 1. " CURR_CHANNEL ,Current working channel" bitfld.long 0x00 10. " AUTO_ACK ,Automatically acknowledge any incoming context switch requests" "Manual,Auto ACK" textline " " hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" group.long 0x544++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE0_0,Head Control Register" bitfld.long 0x00 4.--5. " INTERLACED ,Interlaced is not supported" "Progressive,?..." bitfld.long 0x00 3. " RANGECOMPRESS ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DYNRANGE ,Sets the dynamic range for the output" "VESA,CEA" bitfld.long 0x00 0.--1. " COLORSPACE ,YUV_601/YUV_709 are not supported" "RGB,?..." group.long 0x548++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE0_1,Head Control Register" bitfld.long 0x00 4.--5. " INTERLACED ,Interlaced is not supported" "Progressive,?..." bitfld.long 0x00 3. " RANGECOMPRESS ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DYNRANGE ,Sets the dynamic range for the output" "VESA,CEA" bitfld.long 0x00 0.--1. " COLORSPACE ,YUV_601/YUV_709 are not supported" "RGB,?..." group.long 0x54C++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE0_2,Head Control Register" bitfld.long 0x00 4.--5. " INTERLACED ,Interlaced is not supported" "Progressive,?..." bitfld.long 0x00 3. " RANGECOMPRESS ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DYNRANGE ,Sets the dynamic range for the output" "VESA,CEA" bitfld.long 0x00 0.--1. " COLORSPACE ,YUV_601/YUV_709 are not supported" "RGB,?..." group.long 0x550++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE1_0,Size Of The Raster" hexmask.long.word 0x00 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x00 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" group.long 0x554++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE1_1,Size Of The Raster" hexmask.long.word 0x00 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x00 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" group.long 0x558++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE1_2,Size Of The Raster" hexmask.long.word 0x00 16.--30. 1. " VTOTAL ,Total number of lines in a frame of the raster" hexmask.long.word 0x00 0.--14. 1. " HTOTAL ,Total number of pixels in a line of the raster" group.long 0x55C++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE2_0,Location Of The Horizontal And Vertical Sync End" hexmask.long.word 0x00 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x00 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" group.long 0x560++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE2_1,Location Of The Horizontal And Vertical Sync End" hexmask.long.word 0x00 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x00 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" group.long 0x564++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE2_2,Location Of The Horizontal And Vertical Sync End" hexmask.long.word 0x00 16.--30. 1. " VSYNC_END ,Total number of lines after which vertical sync ends" hexmask.long.word 0x00 0.--14. 1. " HSYNC_END ,Total number of pixels after which horizontal sync ends" group.long 0x568++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE3_0,Location Of The Horizontal And Vertical Blank End" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x00 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" group.long 0x56C++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE3_1,Location Of The Horizontal And Vertical Blank End" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x00 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" group.long 0x570++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE3_2,Location Of The Horizontal And Vertical Blank End" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END ,Total number of lines after which vertical blank ends" hexmask.long.word 0x00 0.--14. 1. " HBLANK_END ,Total number of pixels after which horizontal blank ends" group.long 0x574++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE4_0,Location Of The Horizontal And Vertical Blank Start" hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x00 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" group.long 0x578++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE4_1,Location Of The Horizontal And Vertical Blank Start" hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x00 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" group.long 0x57C++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE4_2,Location Of The Horizontal And Vertical Blank Start" hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts" hexmask.long.word 0x00 0.--14. 1. " HBLANK_START ,Total number of pixels after which horizontal blank starts" group.long 0x580++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE5_0,Interlaced Mode" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x00 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" group.long 0x584++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE5_1,Interlaced Mode" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x00 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" group.long 0x588++0x03 line.long 0x00 "NV_PDISP_HEAD_STATE5_2,Interlaced Mode" hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2" hexmask.long.word 0x00 0.--14. 1. " VBLANK_START_2 ,Total number of lines after which vertical blank starts 2" textline " " group.long 0x58C++0x13 line.long 0x00 "NV_PDISP_SOR_PLL0_0,NV PDISP SOR PLL0" bitfld.long 0x00 24.--27. " ICHPMP ,Additions to the charge pump current" "0,0.375 uA,0.75 uA,1.125 uA,1.5 uA,1.875 uA,2.25 uA,2.625 uA,3 uA,3.375 uA,3.75 uA,4.125 uA,4.5 uA,4.875 uA,5.25 uA,5.625 uA" textline " " bitfld.long 0x00 19. " FILTER[3] ,Controls this VCO startup bit for the TMDS_DUAL macro" "Normal operation,Forced VCO" bitfld.long 0x00 16.--18. " FILTER[2:0] ,Select the loop filter and adjust the filter resistor value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--13. " TXREG_LEVEL ,TXREG level" "V25,V15,V35,V45" bitfld.long 0x00 8.--11. " VCOCAP ,Selects the VCO capacitor and adjusts ring oscillator inter-stage load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6.--7. " PLLREG_LEVEL ,PLLREG level" "V25,V15,V35,V45" bitfld.long 0x00 5. " PULLDOWN ,Weak pull-down enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " VCOPD ,VCOPD" "Rescind,Assert" bitfld.long 0x00 0. " PWR ,Power" "On,Off" line.long 0x04 "NV_PDISP_SOR_PLL1_0,Configure The Main SOR PLL1" bitfld.long 0x04 29. " COHERENTMODE ,Coherent mode" "Disabled,Enabled" bitfld.long 0x04 20.--23. " LOADADJ ,Load pulse position adjust" "Center,?..." textline " " rbitfld.long 0x04 15. " TERM_COMPOUT ,Termination calibration status" "Low,High" bitfld.long 0x04 9.--12. " TMDS_TERMADJ ,Termination resistance control" "Lowest,1,2,3,4,5,6,7,OHM500,9,10,11,12,13,14,Highest" textline " " bitfld.long 0x04 8. " TMDS_TERM ,Termination enable" "Disabled,Enabled" bitfld.long 0x04 0.--5. " IOCURRENT ,Used for I/O control" "RST,?..." line.long 0x08 "NV_PDISP_SOR_PLL2_0,Configure The Main SOR PLL2" bitfld.long 0x08 28.--31. " PLL_MDIV ,PLL M divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 26.--27. " CLKGEN_MODE ,CLKGEN mode" "LVDS,DP TMDS,?..." textline " " bitfld.long 0x08 25. " AUX9 ,AUX9 - LVDSEN" "Allow,Override" bitfld.long 0x08 24. " AUX8 ,AUX8 - sequencer PLLCAPPD enforce" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " AUX7 ,AUX7 - port powerdown" "Disabled,Enabled" bitfld.long 0x08 22. " AUX6 ,AUX6 - bandgap powerdown" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " AUX5 ,AUX5 - link LVDS" "Single,Dual" bitfld.long 0x08 20. " AUX4 ,AUX4 - duplicate control" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " AUX3 ,AUX3 - rotate" "Disabled,Enabled" bitfld.long 0x08 18. " AUX2 ,AUX2 - powerdown" "Override,Allow" textline " " bitfld.long 0x08 17. " AUX1 ,AUX1 - sequencer PLLCAPPD" "Allow,Override" bitfld.long 0x08 16. " AUX0 ,AUX0 - sequencer PLL pulldown" "Allow,Override" textline " " hexmask.long.byte 0x08 8.--15. 1. " PLL_NDIV ,PLL NDIV" bitfld.long 0x08 4.--7. " PLL_PDIV ,PLL P divider" "BY 1,BY 2,BY 4,BY 8,BY 16,?..." textline " " bitfld.long 0x08 2.--3. " PLL_PDIV_MODE ,PLL PDIV mode" "LVDS mode,TMDS DP mode,EDP RATE3 mode,?..." bitfld.long 0x08 1. " DIV_RATIO_OVERRIDE ,DIV ratio override" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " DCIR_PLL_RESET ,DCIR PLL reset" "Override,Allow" line.long 0x0C "NV_PDISP_SOR_PLL3_0,Directly Controls The SOR Analog Macro" bitfld.long 0x0C 28.--31. " BG_TEMP_COEF ,Bandgap temperature coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. " BG_VREF_LEVEL ,Bandgap output voltages" "0.588 V,0.602 V,0.616 V,0.63 V,0.644 V,0.658 V,0.672 V,0.686 V,0.7 V,0.714 V,0.728 V,0.742 V,0.756 V,0.77 V,0.784 V,0.798 V" textline " " hexmask.long.byte 0x0C 16.--23. 1. " TEST_REFCLK_EN ,Test REFCLK EN" bitfld.long 0x0C 14. " PLL_BYPASS ,PLL bypass" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " PLLVDD_MODE ,Field to determine the PLL voltage" "1.8 V,3.3 V" bitfld.long 0x0C 12. " CLKDIST_MODE ,Clock distribution by CMOS/CML buffers" "CMOS,CML" textline " " bitfld.long 0x0C 8.--11. " AVDD10_LEVEL ,Internal regulated 1.0v voltage level control bits" ",,,0.95 V,1.00 V,1.05 V,1.10 V,?..." bitfld.long 0x0C 4.--7. " AVDD14_LEVEL ,Internal regulated 1.4v voltage level control bits" ",,,1.35 V,1.40 V,1.45 V,1.50 V,?..." textline " " bitfld.long 0x0C 0.--1. " KICKSTART ,Short loop-filter [%] of AVDD14" "Disabled,Loop 40,Loop 50,Loop 60" line.long 0x10 "NV_PDISP_SOR_PLL4_0,SOR NV PDISP SOR PLL4" bitfld.long 0x10 24.--29. " SETUP_LCKDET ,Setup LCKDET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 23. " LOCK_OVERRIDE ,Lock override" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " ENABLE_LCKDET ,Enable LCKDET" "Enabled,Disabled" rbitfld.long 0x10 21. " LOCKDET ,Status signal indicating whether PLL is locked within the desired resolution" "Not locked,Locked" textline " " bitfld.long 0x10 6.--7. " AVDD10_LOAD ,Internal regulated 1.0V extra loading for stability control bits" "0 mA,1 mA,2 mA,3 mA" bitfld.long 0x10 4.--5. " AVDD14_LOAD ,Internal regulated 1.4V extra loading for stability control bits" "0 uA,175 uA,350 uA,525 uA" if (((per.l(ad:0x54580000+0x130))&0x01)==0x01) group.long 0x5A0++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" bitfld.long 0x00 3. " PD_TXD_3 ,Controls to power down the lane 3" "Yes,No" textline " " bitfld.long 0x00 2. " PD_TXD_0 ,Controls to power down the lane 0" "Yes,No" bitfld.long 0x00 1. " PD_TXD_1 ,Controls to power down the lane 1" "Yes,No" textline " " bitfld.long 0x00 0. " PD_TXD_2 ,Controls to power down the lane 2" "Yes,No" else group.long 0x5A0++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" endif if (((per.l(ad:0x54580000+0x134))&0x01)==0x01) group.long 0x5A4++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL 1" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" bitfld.long 0x00 3. " PD_TXD_3 ,Controls to power down the lane 3" "Yes,No" textline " " bitfld.long 0x00 2. " PD_TXD_0 ,Controls to power down the lane 0" "Yes,No" bitfld.long 0x00 1. " PD_TXD_1 ,Controls to power down the lane 1" "Yes,No" textline " " bitfld.long 0x00 0. " PD_TXD_2 ,Controls to power down the lane 2" "Yes,No" else group.long 0x5A4++0x03 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1" bitfld.long 0x00 31. " VCOLIMIT_DISABLE ,VCO-protection clamp disable" "No,Yes" bitfld.long 0x00 30. " VCOCALIB_TS0 ,VCO-calibration block counts" "96 cycles,128 cycles" textline " " bitfld.long 0x00 29. " VCOCALIB_OVERWRB ,VCO-calibration block" "Disabled,Enabled" bitfld.long 0x00 28. " VCOCALIB_ENB ,VCO-calibration block" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " LOADADJ_BYPN ,LOADADJ-calibration block" "Disabled,Enabled" bitfld.long 0x00 26. " LOADADJ_SYNC_EN ,LOADADJ-calibration code" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " VCOLIMIT_SEL ,Clamp counter counts" "128 cycles,32 cycles" bitfld.long 0x00 24. " VCO_2X ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " PAD_CAL_PD ,Powerdown control for the pad calibration logic" "Powerup,Powerdown" bitfld.long 0x00 22. " TX_PU ,Pull-up current sources" "Disabled,Enabled" textline " " bitfld.long 0x00 20.--21. " REG_CTRL ,Internal regulator control" "0,1,2,3" bitfld.long 0x00 16.--19. " VCMMODE ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE ,TX pull-up current source drive" bitfld.long 0x00 7. " COMMONMODE_TXD_3_DP_TXD_3 ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0 ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled" bitfld.long 0x00 5. " COMMONMODE_TXD_1_DP_TXD_1 ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2 ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled" endif group.long 0x5A8++0x23 line.long 0x00 "NV_PDISP_SOR_DP_PADCTL2_0,SOR DP PADCTL2" hexmask.long.byte 0x00 24.--31. 1. " SPAREPLL ,Spare PLL" bitfld.long 0x00 20.--23. " SPARE4 ,Spare 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16.--19. " SPARE3 ,Spare 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " SPARE2 ,Spare 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " SPARE1 ,Spare 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " SPARE0 ,Spare 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " REG_BYPASS ,REG bypass" "0,1" line.long 0x04 "NV_PDISP_SOR_DP_PADCTL3_0,SOR DP PADCTL3" hexmask.long.byte 0x04 24.--31. 1. " TX_PATTERN_GEN ,TX pattern GEN" line.long 0x08 "NV_PDISP_SOR_DP_BS,Program The Timing Of The Scrambler Reset" bitfld.long 0x08 19. " OVERRIDE ,Override" "Done,Pending" hexmask.long.word 0x08 10.--18. 1. " CNT_STATUS ,Value of running BS count" textline " " rbitfld.long 0x08 9. " OVERRIDE_DEBUG ,Reports the BS_OVERRIDE status of each of the 8-Lane DP primary/secondary pipelines" "Done,Pending" hexmask.long.word 0x08 0.--8. 1. " CNT ,Count" line.long 0x0C "NV_PDISP_SOR_DP_MISC1_OVERRIDE_0,SOR DP MISC1 Override" bitfld.long 0x0C 31. " CNTL ,CNTL" "Done,Pending" bitfld.long 0x0C 0. " ENABLE ,Enables MISC bit 6 overriding" "Disabled,Enabled" line.long 0x10 "NV_PDISP_SOR_DP_MISC1_BIT6_0,SOR DP MISC1 Bit 6" bitfld.long 0x10 0. " VAL ,Value" "0,1" line.long 0x14 "NV_PDISP_DP_INT_STATUS_0,DP Interrupt Status" eventfld.long 0x14 16. " LANE3_FIFO_OVERFLOW ,Lane 3 FIFO overflow" "Not interrupt,Interrupt" eventfld.long 0x14 15. " LANE2_FIFO_OVERFLOW ,Lane 2 FIFO overflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 14. " LANE1_FIFO_OVERFLOW ,Lane 1 FIFO overflow" "Not interrupt,Interrupt" eventfld.long 0x14 13. " LANE0_FIFO_OVERFLOW ,Lane 0 FIFO overflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 12. " SPKT_OVERRUN ,SPKT overrun" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 11. " LANE3_STEER_ERROR ,Lane 3 steer error" "Not interrupt,Interrupt" eventfld.long 0x14 10. " LANE2_STEER_ERROR ,Lane 2 steer error" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 9. " LANE1_STEER_ERROR ,Lane 1 steer error" "Not interrupt,Interrupt" eventfld.long 0x14 8. " LANE0_STEER_ERROR ,Lane 0 steer error" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 7. " LANE3_PIXPACK_OVERFLOW ,Lane 3 pixpack overflow" "Not interrupt,Interrupt" eventfld.long 0x14 6. " LANE2_PIXPACK_OVERFLOW ,Lane 2 pixpack overflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 5. " LANE1_PIXPACK_OVERFLOW ,Lane 1 pixpack overflow" "Not interrupt,Interrupt" eventfld.long 0x14 4. " LANE0_PIXPACK_OVERFLOW ,Lane 0 pixpack overflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 3. " LANE3_FIFO_UNDERFLOW ,Lane 3 FIFO underflow" "Not interrupt,Interrupt" eventfld.long 0x14 2. " LANE2_FIFO_UNDERFLOW ,Lane 2 FIFO underflow" "Not interrupt,Interrupt" textline " " eventfld.long 0x14 1. " LANE1_FIFO_UNDERFLOW ,Lane 1 FIFO underflow" "Not interrupt,Interrupt" eventfld.long 0x14 0. " LANE0_FIFO_UNDERFLOW ,Lane 0 FIFO underflow" "Not interrupt,Interrupt" line.long 0x18 "NV_PDISP_DP_INT_MASK_0,DP Interrupt Mask" bitfld.long 0x18 16. " LANE3_FIFO_OVERFLOW_MASK ,LANE3 FIFO overflow mask" "Masked,Not masked" bitfld.long 0x18 15. " LANE2_FIFO_OVERFLOW_MASK ,LANE2 FIFO overflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 14. " LANE1_FIFO_OVERFLOW_MASK ,LANE1 FIFO overflow mask" "Masked,Not masked" bitfld.long 0x18 13. " LANE0_FIFO_OVERFLOW_MASK ,LANE0 FIFO overflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 12. " SPKT_OVERRUN_MASK ,SPKT overrun mask" "Masked,Not masked" bitfld.long 0x18 11. " LANE3_STEER_ERROR_MASK ,LANE3 steer error mask" "Masked,Not masked" textline " " bitfld.long 0x18 10. " LANE2_STEER_ERROR_MASK ,LANE2 steer error mask" "Masked,Not masked" bitfld.long 0x18 9. " LANE1_STEER_ERROR_MASK ,LANE1 steer error mask" "Masked,Not masked" textline " " bitfld.long 0x18 8. " LANE0_STEER_ERROR_MASK ,LANE0 steer error mask" "Masked,Not masked" bitfld.long 0x18 7. " LANE3_PIXPACK_OVERFLOW_MASK ,LANE3 pixpack overflow mask" "Masked,Not Masked" textline " " bitfld.long 0x18 6. " LANE2_PIXPACK_OVERFLOW_MASK ,LANE2 pixpack overflow mask" "Masked,Not masked" bitfld.long 0x18 5. " LANE1_PIXPACK_OVERFLOW_MASK ,LANE1 pixpack overflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 4. " LANE0_PIXPACK_OVERFLOW_MASK ,LANE0 pixpack overflow mask" "Masked,Not masked" bitfld.long 0x18 3. " LANE3_FIFO_UNDERFLOW_MASK ,LANE3 FIFO underflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 2. " LANE2_FIFO_UNDERFLOW_MASK ,LANE2 FIFO underflow mask" "Masked,Not masked" bitfld.long 0x18 1. " LANE1_FIFO_UNDERFLOW_MASK ,LANE1 FIFO underflow mask" "Masked,Not masked" textline " " bitfld.long 0x18 0. " LANE0_FIFO_UNDERFLOW_MASK ,LANE0 FIFO underflow mask" "Masked,Not masked" line.long 0x1C "NV_PDISP_DP_INT_ENABLE_0,DP Interrupt Enable" bitfld.long 0x1C 16. " LANE3_FIFO_OVERFLOW_ENABLE ,LANE3 FIFO overflow enable" "Disabled,Enabled" bitfld.long 0x1C 15. " LANE2_FIFO_OVERFLOW_ENABLE ,LANE2 FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 14. " LANE1_FIFO_OVERFLOW_ENABLE ,LANE1 FIFO overflow enable" "Disabled,Enabled" bitfld.long 0x1C 13. " LANE0_FIFO_OVERFLOW_ENABLE ,LANE0 FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 12. " SPKT_OVERRUN_ENABLE ,SPKT overrun enable" "Disabled,Enabled" bitfld.long 0x1C 11. " LANE3_STEER_ERROR_ENABLE ,LANE3 steer error enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " LANE2_STEER_ERROR_ENABLE ,LANE2 steer error enable" "Disabled,Enabled" bitfld.long 0x1C 9. " LANE1_STEER_ERROR_ENABLE ,LANE1 steer error enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " LANE0_STEER_ERROR_ENABLE ,LANE0 steer error enable" "Disabled,Enabled" bitfld.long 0x1C 7. " LANE3_PIXPACK_OVERFLOW_ENABLE ,LANE3 pixpack overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 6. " LANE2_PIXPACK_OVERFLOW_ENABLE ,LANE2 pixpack overflow enable" "Disabled,Enabled" bitfld.long 0x1C 5. " LANE1_PIXPACK_OVERFLOW_ENABLE ,LANE1 pixpack overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " LANE0_PIXPACK_OVERFLOW_ENABLE ,LANE0 pixpack overflow enable" "Disabled,Enabled" bitfld.long 0x1C 3. " LANE3_FIFO_UNDERFLOW_ENABLE ,LANE3 FIFO underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 2. " LANE2_FIFO_UNDERFLOW_ENABLE ,LANE2 FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x1C 1. " LANE1_FIFO_UNDERFLOW_ENABLE ,LANE1 FIFO underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " LANE0_FIFO_UNDERFLOW_ENABLE ,LANE0 FIFO underflow enable" "Disabled,Enabled" line.long 0x20 "NV_PDISP_SOR_VPR_POLICY_0,SOR VPR Policy Table Register" bitfld.long 0x20 3. " ALLOW_DIGITAL_OUT ,Allow digital output" "Disallow,Allow" bitfld.long 0x20 2. " ALLOW_INTERNAL_PANEL ,Allow internal panel output" "Disallow,Allow" textline " " bitfld.long 0x20 1. " ALLOW_HDCP1X_PROTECTED , Allow HDCP1.x protected output" "Disallow,Allow" bitfld.long 0x20 0. " ALLOW_HDCP22_PROTECTED ,Allow HDCP2.2 protected output" "Disallow,Allow" endif width 0x0B tree.end tree "DCP KFUSE Control Registers" base ad:0x7000FC00 width 18. group.long 0x80++0x03 line.long 0x00 "STATE_0,Commands And Status For ECC Mode" bitfld.long 0x00 31. " SOFTRESET ,Soft reset" "0,1" bitfld.long 0x00 25. " STOP ,Stop" "0,1" bitfld.long 0x00 24. " RESTART ,Restart" "0,1" rbitfld.long 0x00 17. " CRCPASS ,CRC pass" "Fail,Pass" textline " " rbitfld.long 0x00 16. " DONE ,DONE" "0,1" rbitfld.long 0x00 8.--13. " ERRBLOCK ,Contains offset of first errored block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " CURBLOCK ,Counter of current block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x84++0x03 line.long 0x00 "ERRCOUNT_0,ECC Decode Error Count" hexmask.long.byte 0x00 24.--30. 1. " ERR_FATAL ,Number of uncorrectable errors" hexmask.long.byte 0x00 16.--22. 1. " ERR_3 ,Number of correctable 3-bit errors" hexmask.long.byte 0x00 8.--14. 1. " ERR_2 ,Number of correctable 2-bit errors" hexmask.long.byte 0x00 0.--6. 1. " ERR_1 ,Number of correctable 1-bit errors" group.long 0x88++0x03 line.long 0x00 "KEYADDR_0,Key Address" bitfld.long 0x00 16. " AUTOINC ,Auto incrementation" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 0x01 " ADDR ,Word address" rgroup.long 0x8C++0x03 line.long 0x00 "KEYS_0,Keys" sif (cpuis("TEGRAX2")) group.long 0x90++0x03 line.long 0x00 "CG1_0,Clock Gating 1" bitfld.long 0x00 0. " SLCG_CTRL ,Kfuse block SLCG(clock gating) enable" "Disabled,Enabled" endif group.long 0x24++0x03 line.long 0x00 "PD_0,PD" rbitfld.long 0x00 1. " STATUS ,PD status bit" "Power up,Power down" bitfld.long 0x00 0. " CTRL ,PD (POWER DOWN) feature" "Power up,Power down" width 0x0B tree.end tree "HDA Registers" base ad:0x70030000 width 33. group.long 0x0++0x03 line.long 0x00 "AXI_BAR0_SZ_0,AXI BAR0 mapping" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR0_SIZE ,Size of the address range associated with BAR0" group.long 0x4++0x03 line.long 0x00 "AXI_BAR1_SZ_0,AXI BAR1 mapping" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR1_SIZE ,Size of the address range associated with BAR1" group.long 0x8++0x03 line.long 0x00 "AXI_BAR2_SZ_0,AXI BAR2 mapping" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR2_SIZE ,Size of the address range associated with BAR2" group.long 0xC++0x03 line.long 0x00 "AXI_BAR3_SZ_0,AXI BAR3 mapping" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR3_SIZE ,Size of the address range associated with BAR3" group.long 0x40++0x03 line.long 0x00 "AXI_BAR0_START_0,AXI BAR0 mapping" hexmask.long.tbyte 0x00 12.--31. 1. " AXI_BAR0_START ,Start of AXI address space for BAR0" group.long 0x44++0x03 line.long 0x00 "AXI_BAR1_START_0,AXI BAR1 mapping" hexmask.long.tbyte 0x00 12.--31. 1. " AXI_BAR1_START ,Start of AXI address space for BAR1" group.long 0x48++0x03 line.long 0x00 "AXI_BAR2_START_0,AXI BAR2 mapping" hexmask.long.tbyte 0x00 12.--31. 1. " AXI_BAR2_START ,Start of AXI address space for BAR2" group.long 0x4C++0x03 line.long 0x00 "AXI_BAR3_START_0,AXI BAR3 mapping" hexmask.long.tbyte 0x00 12.--31. 1. " AXI_BAR3_START ,Start of AXI address space for BAR3" group.long 0x80++0x03 line.long 0x00 "FPCI_BAR0_0,AXI BAR0 mapping" hexmask.long 0x00 4.--31. 1. " FPCI_BAR0_START ,FPCI address space mapped into the BAR0" bitfld.long 0x00 0. " FPCI_BAR0_ACCESS_TYPE ,Address region memory mapped indicator" "Memory mapped access,I\O config access" group.long 0x84++0x03 line.long 0x00 "FPCI_BAR1_0,AXI BAR1 mapping" hexmask.long 0x00 4.--31. 1. " FPCI_BAR1_START ,FPCI address space mapped into the BAR1" bitfld.long 0x00 0. " FPCI_BAR1_ACCESS_TYPE ,Address region memory mapped indicator" "Memory mapped access,I\O config access" group.long 0x88++0x03 line.long 0x00 "FPCI_BAR2_0,AXI BAR2 mapping" hexmask.long 0x00 4.--31. 1. " FPCI_BAR2_START ,FPCI address space mapped into the BAR2" bitfld.long 0x00 0. " FPCI_BAR2_ACCESS_TYPE ,Address region memory mapped indicator" "Memory mapped access,I\O config access" group.long 0x8C++0x03 line.long 0x00 "FPCI_BAR3_0,AXI BAR3 mapping" hexmask.long 0x00 4.--31. 1. " FPCI_BAR3_START ,FPCI address space mapped into the BAR3" bitfld.long 0x00 0. " FPCI_BAR3_ACCESS_TYPE ,Address region memory mapped indicator" "Memory mapped access,I\O config access" group.long 0xC0++0x0B line.long 0x00 "MSI_BAR_SZ_0,MSI BAR SIZE" hexmask.long.tbyte 0x00 0.--19. 1. " MSI_BAR_SIZE ,Size of the address range associated with MSI BAR" line.long 0x04 "MSI_AXI_BAR_ST_0,MSI AXI BAR START" hexmask.long.tbyte 0x04 12.--31. 1. " MSI_AXI_BAR_START ,Start of upstream AXI address space for MSI BAR" line.long 0x08 "MSI_FPCI_BAR_ST_0,MSI FPCI BAR START" hexmask.long 0x08 4.--31. 1. " MSI_FPCI_BAR_START ,Start of upstream FPCI address space for MSI BAR" group.long 0x100++0x1F line.long 0x00 "MSI_VEC0_0,MSI VECTOR0" bitfld.long 0x00 31. " MSI_VECTOR[31] ,MSI vector 31" "0,1" bitfld.long 0x00 30. " [30] ,MSI vector 30" "0,1" textline " " bitfld.long 0x00 29. " [29] ,MSI vector 29" "0,1" bitfld.long 0x00 28. " [28] ,MSI vector 28" "0,1" textline " " bitfld.long 0x00 27. " [27] ,MSI vector 27" "0,1" bitfld.long 0x00 26. " [26] ,MSI vector 26" "0,1" textline " " bitfld.long 0x00 25. " [25] ,MSI vector 25" "0,1" bitfld.long 0x00 24. " [24] ,MSI vector 24" "0,1" textline " " bitfld.long 0x00 23. " [23] ,MSI vector 23" "0,1" bitfld.long 0x00 22. " [22] ,MSI vector 22" "0,1" textline " " bitfld.long 0x00 21. " [21] ,MSI vector 21" "0,1" bitfld.long 0x00 20. " [20] ,MSI vector 20" "0,1" textline " " bitfld.long 0x00 19. " [19] ,MSI vector 19" "0,1" bitfld.long 0x00 18. " [18] ,MSI vector 18" "0,1" textline " " bitfld.long 0x00 17. " [17] ,MSI vector 17" "0,1" bitfld.long 0x00 16. " [16] ,MSI vector 16" "0,1" textline " " bitfld.long 0x00 15. " [15] ,MSI vector 15" "0,1" bitfld.long 0x00 14. " [14] ,MSI vector 14" "0,1" textline " " bitfld.long 0x00 13. " [13] ,MSI vector 13" "0,1" bitfld.long 0x00 12. " [12] ,MSI vector 12" "0,1" textline " " bitfld.long 0x00 11. " [11] ,MSI vector 11" "0,1" bitfld.long 0x00 10. " [10] ,MSI vector 10" "0,1" textline " " bitfld.long 0x00 9. " [9] ,MSI vector 9" "0,1" bitfld.long 0x00 8. " [8] ,MSI vector 8" "0,1" textline " " bitfld.long 0x00 7. " [7] ,MSI vector 7" "0,1" bitfld.long 0x00 6. " [6] ,MSI vector 6" "0,1" textline " " bitfld.long 0x00 5. " [5] ,MSI vector 5" "0,1" bitfld.long 0x00 4. " [4] ,MSI vector 4" "0,1" textline " " bitfld.long 0x00 3. " [3] ,MSI vector 3" "0,1" bitfld.long 0x00 2. " [2] ,MSI vector 2" "0,1" textline " " bitfld.long 0x00 1. " [1] ,MSI vector 1" "0,1" bitfld.long 0x00 0. " [0] ,MSI vector 0" "0,1" line.long 0x04 "MSI_VEC1_0,MSI VECTOR1" bitfld.long 0x04 31. " MSI_VECTOR[63] ,MSI vector 63" "0,1" bitfld.long 0x04 30. " [62] ,MSI vector 62" "0,1" textline " " bitfld.long 0x04 29. " [61] ,MSI vector 61" "0,1" bitfld.long 0x04 28. " [60] ,MSI vector 60" "0,1" textline " " bitfld.long 0x04 27. " [59] ,MSI vector 59" "0,1" bitfld.long 0x04 26. " [58] ,MSI vector 58" "0,1" textline " " bitfld.long 0x04 25. " [57] ,MSI vector 57" "0,1" bitfld.long 0x04 24. " [56] ,MSI vector 56" "0,1" textline " " bitfld.long 0x04 23. " [55] ,MSI vector 55" "0,1" bitfld.long 0x04 22. " [54] ,MSI vector 54" "0,1" textline " " bitfld.long 0x04 21. " [53] ,MSI vector 53" "0,1" bitfld.long 0x04 20. " [52] ,MSI vector 52" "0,1" textline " " bitfld.long 0x04 19. " [51] ,MSI vector 51" "0,1" bitfld.long 0x04 18. " [50] ,MSI vector 50" "0,1" textline " " bitfld.long 0x04 17. " [49] ,MSI vector 49" "0,1" bitfld.long 0x04 16. " [48] ,MSI vector 48" "0,1" textline " " bitfld.long 0x04 15. " [47] ,MSI vector 47" "0,1" bitfld.long 0x04 14. " [46] ,MSI vector 46" "0,1" textline " " bitfld.long 0x04 13. " [45] ,MSI vector 45" "0,1" bitfld.long 0x04 12. " [44] ,MSI vector 44" "0,1" textline " " bitfld.long 0x04 11. " [43] ,MSI vector 43" "0,1" bitfld.long 0x04 10. " [42] ,MSI vector 42" "0,1" textline " " bitfld.long 0x04 9. " [41] ,MSI vector 41" "0,1" bitfld.long 0x04 8. " [40] ,MSI vector 40" "0,1" textline " " bitfld.long 0x04 7. " [39] ,MSI vector 39" "0,1" bitfld.long 0x04 6. " [38] ,MSI vector 38" "0,1" textline " " bitfld.long 0x04 5. " [37] ,MSI vector 37" "0,1" bitfld.long 0x04 4. " [36] ,MSI vector 36" "0,1" textline " " bitfld.long 0x04 3. " [35] ,MSI vector 35" "0,1" bitfld.long 0x04 2. " [34] ,MSI vector 34" "0,1" textline " " bitfld.long 0x04 1. " [33] ,MSI vector 33" "0,1" bitfld.long 0x04 0. " [32] ,MSI vector 32" "0,1" line.long 0x08 "MSI_VEC2_0,MSI VECTOR2" bitfld.long 0x08 31. " MSI_VECTOR[95] ,MSI vector 95" "0,1" bitfld.long 0x08 30. " [94] ,MSI vector 94" "0,1" textline " " bitfld.long 0x08 29. " [93] ,MSI vector 93" "0,1" bitfld.long 0x08 28. " [92] ,MSI vector 92" "0,1" textline " " bitfld.long 0x08 27. " [91] ,MSI vector 91" "0,1" bitfld.long 0x08 26. " [90] ,MSI vector 90" "0,1" textline " " bitfld.long 0x08 25. " [89] ,MSI vector 89" "0,1" bitfld.long 0x08 24. " [88] ,MSI vector 88" "0,1" textline " " bitfld.long 0x08 23. " [87] ,MSI vector 87" "0,1" bitfld.long 0x08 22. " [86] ,MSI vector 86" "0,1" textline " " bitfld.long 0x08 21. " [85] ,MSI vector 85" "0,1" bitfld.long 0x08 20. " [84] ,MSI vector 84" "0,1" textline " " bitfld.long 0x08 19. " [83] ,MSI vector 83" "0,1" bitfld.long 0x08 18. " [82] ,MSI vector 82" "0,1" textline " " bitfld.long 0x08 17. " [81] ,MSI vector 81" "0,1" bitfld.long 0x08 16. " [80] ,MSI vector 80" "0,1" textline " " bitfld.long 0x08 15. " [79] ,MSI vector 79" "0,1" bitfld.long 0x08 14. " [78] ,MSI vector 78" "0,1" textline " " bitfld.long 0x08 13. " [77] ,MSI vector 77" "0,1" bitfld.long 0x08 12. " [76] ,MSI vector 76" "0,1" textline " " bitfld.long 0x08 11. " [75] ,MSI vector 75" "0,1" bitfld.long 0x08 10. " [74] ,MSI vector 74" "0,1" textline " " bitfld.long 0x08 9. " [73] ,MSI vector 73" "0,1" bitfld.long 0x08 8. " [72] ,MSI vector 72" "0,1" textline " " bitfld.long 0x08 7. " [71] ,MSI vector 71" "0,1" bitfld.long 0x08 6. " [70] ,MSI vector 70" "0,1" textline " " bitfld.long 0x08 5. " [69] ,MSI vector 69" "0,1" bitfld.long 0x08 4. " [68] ,MSI vector 68" "0,1" textline " " bitfld.long 0x08 3. " [67] ,MSI vector 67" "0,1" bitfld.long 0x08 2. " [66] ,MSI vector 66" "0,1" textline " " bitfld.long 0x08 1. " [65] ,MSI vector 65" "0,1" bitfld.long 0x08 0. " [64] ,MSI vector 64" "0,1" line.long 0x0C "MSI_VEC3_0,MSI VECTOR3" bitfld.long 0x0C 31. " MSI_VECTOR[127] ,MSI vector 127" "0,1" bitfld.long 0x0C 30. " [126] ,MSI vector 126" "0,1" textline " " bitfld.long 0x0C 29. " [125] ,MSI vector 125" "0,1" bitfld.long 0x0C 28. " [124] ,MSI vector 124" "0,1" textline " " bitfld.long 0x0C 27. " [123] ,MSI vector 123" "0,1" bitfld.long 0x0C 26. " [122] ,MSI vector 122" "0,1" textline " " bitfld.long 0x0C 25. " [121] ,MSI vector 121" "0,1" bitfld.long 0x0C 24. " [120] ,MSI vector 120" "0,1" textline " " bitfld.long 0x0C 23. " [119] ,MSI vector 119" "0,1" bitfld.long 0x0C 22. " [118] ,MSI vector 118" "0,1" textline " " bitfld.long 0x0C 21. " [117] ,MSI vector 117" "0,1" bitfld.long 0x0C 20. " [116] ,MSI vector 116" "0,1" textline " " bitfld.long 0x0C 19. " [115] ,MSI vector 115" "0,1" bitfld.long 0x0C 18. " [114] ,MSI vector 114" "0,1" textline " " bitfld.long 0x0C 17. " [113] ,MSI vector 113" "0,1" bitfld.long 0x0C 16. " [112] ,MSI vector 112" "0,1" textline " " bitfld.long 0x0C 15. " [111] ,MSI vector 111" "0,1" bitfld.long 0x0C 14. " [110] ,MSI vector 110" "0,1" textline " " bitfld.long 0x0C 13. " [109] ,MSI vector 109" "0,1" bitfld.long 0x0C 12. " [108] ,MSI vector 108" "0,1" textline " " bitfld.long 0x0C 11. " [107] ,MSI vector 107" "0,1" bitfld.long 0x0C 10. " [106] ,MSI vector 106" "0,1" textline " " bitfld.long 0x0C 9. " [105] ,MSI vector 105" "0,1" bitfld.long 0x0C 8. " [104] ,MSI vector 104" "0,1" textline " " bitfld.long 0x0C 7. " [103] ,MSI vector 103" "0,1" bitfld.long 0x0C 6. " [102] ,MSI vector 102" "0,1" textline " " bitfld.long 0x0C 5. " [101] ,MSI vector 101" "0,1" bitfld.long 0x0C 4. " [100] ,MSI vector 100" "0,1" textline " " bitfld.long 0x0C 3. " [99] ,MSI vector 99" "0,1" bitfld.long 0x0C 2. " [98] ,MSI vector 98" "0,1" textline " " bitfld.long 0x0C 1. " [97] ,MSI vector 97" "0,1" bitfld.long 0x0C 0. " [96] ,MSI vector 96" "0,1" line.long 0x10 "MSI_VEC4_0,MSI VECTOR4" bitfld.long 0x10 31. " MSI_VECTOR[159] ,MSI vector 159" "0,1" bitfld.long 0x10 30. " [158] ,MSI vector 158" "0,1" textline " " bitfld.long 0x10 29. " [157] ,MSI vector 157" "0,1" bitfld.long 0x10 28. " [156] ,MSI vector 156" "0,1" textline " " bitfld.long 0x10 27. " [155] ,MSI vector 155" "0,1" bitfld.long 0x10 26. " [154] ,MSI vector 154" "0,1" textline " " bitfld.long 0x10 25. " [153] ,MSI vector 153" "0,1" bitfld.long 0x10 24. " [152] ,MSI vector 152" "0,1" textline " " bitfld.long 0x10 23. " [151] ,MSI vector 151" "0,1" bitfld.long 0x10 22. " [150] ,MSI vector 150" "0,1" textline " " bitfld.long 0x10 21. " [149] ,MSI vector 149" "0,1" bitfld.long 0x10 20. " [148] ,MSI vector 148" "0,1" textline " " bitfld.long 0x10 19. " [147] ,MSI vector 147" "0,1" bitfld.long 0x10 18. " [146] ,MSI vector 146" "0,1" textline " " bitfld.long 0x10 17. " [145] ,MSI vector 145" "0,1" bitfld.long 0x10 16. " [144] ,MSI vector 144" "0,1" textline " " bitfld.long 0x10 15. " [143] ,MSI vector 143" "0,1" bitfld.long 0x10 14. " [142] ,MSI vector 142" "0,1" textline " " bitfld.long 0x10 13. " [141] ,MSI vector 141" "0,1" bitfld.long 0x10 12. " [140] ,MSI vector 140" "0,1" textline " " bitfld.long 0x10 11. " [139] ,MSI vector 139" "0,1" bitfld.long 0x10 10. " [138] ,MSI vector 138" "0,1" textline " " bitfld.long 0x10 9. " [137] ,MSI vector 137" "0,1" bitfld.long 0x10 8. " [136] ,MSI vector 136" "0,1" textline " " bitfld.long 0x10 7. " [135] ,MSI vector 135" "0,1" bitfld.long 0x10 6. " [134] ,MSI vector 134" "0,1" textline " " bitfld.long 0x10 5. " [133] ,MSI vector 133" "0,1" bitfld.long 0x10 4. " [132] ,MSI vector 132" "0,1" textline " " bitfld.long 0x10 3. " [131] ,MSI vector 131" "0,1" bitfld.long 0x10 2. " [130] ,MSI vector 130" "0,1" textline " " bitfld.long 0x10 1. " [129] ,MSI vector 129" "0,1" bitfld.long 0x10 0. " [128] ,MSI vector 128" "0,1" line.long 0x14 "MSI_VEC5_0,MSI VECTOR5" bitfld.long 0x14 31. " MSI_VECTOR[191] ,MSI vector 191" "0,1" bitfld.long 0x14 30. " [190] ,MSI vector 190" "0,1" textline " " bitfld.long 0x14 29. " [189] ,MSI vector 189" "0,1" bitfld.long 0x14 28. " [188] ,MSI vector 188" "0,1" textline " " bitfld.long 0x14 27. " [187] ,MSI vector 187" "0,1" bitfld.long 0x14 26. " [186] ,MSI vector 186" "0,1" textline " " bitfld.long 0x14 25. " [185] ,MSI vector 185" "0,1" bitfld.long 0x14 24. " [184] ,MSI vector 184" "0,1" textline " " bitfld.long 0x14 23. " [183] ,MSI vector 183" "0,1" bitfld.long 0x14 22. " [182] ,MSI vector 182" "0,1" textline " " bitfld.long 0x14 21. " [181] ,MSI vector 181" "0,1" bitfld.long 0x14 20. " [180] ,MSI vector 180" "0,1" textline " " bitfld.long 0x14 19. " [179] ,MSI vector 179" "0,1" bitfld.long 0x14 18. " [178] ,MSI vector 178" "0,1" textline " " bitfld.long 0x14 17. " [177] ,MSI vector 177" "0,1" bitfld.long 0x14 16. " [176] ,MSI vector 176" "0,1" textline " " bitfld.long 0x14 15. " [175] ,MSI vector 175" "0,1" bitfld.long 0x14 14. " [174] ,MSI vector 174" "0,1" textline " " bitfld.long 0x14 13. " [173] ,MSI vector 173" "0,1" bitfld.long 0x14 12. " [172] ,MSI vector 172" "0,1" textline " " bitfld.long 0x14 11. " [171] ,MSI vector 171" "0,1" bitfld.long 0x14 10. " [170] ,MSI vector 170" "0,1" textline " " bitfld.long 0x14 9. " [169] ,MSI vector 169" "0,1" bitfld.long 0x14 8. " [168] ,MSI vector 168" "0,1" textline " " bitfld.long 0x14 7. " [167] ,MSI vector 167" "0,1" bitfld.long 0x14 6. " [166] ,MSI vector 166" "0,1" textline " " bitfld.long 0x14 5. " [165] ,MSI vector 165" "0,1" bitfld.long 0x14 4. " [164] ,MSI vector 164" "0,1" textline " " bitfld.long 0x14 3. " [163] ,MSI vector 163" "0,1" bitfld.long 0x14 2. " [162] ,MSI vector 162" "0,1" textline " " bitfld.long 0x14 1. " [161] ,MSI vector 161" "0,1" bitfld.long 0x14 0. " [160] ,MSI vector 160" "0,1" line.long 0x18 "MSI_VEC6_0,MSI VECTOR6" bitfld.long 0x18 31. " MSI_VECTOR[223] ,MSI vector 223" "0,1" bitfld.long 0x18 30. " [222] ,MSI vector 222" "0,1" textline " " bitfld.long 0x18 29. " [221] ,MSI vector 221" "0,1" bitfld.long 0x18 28. " [220] ,MSI vector 220" "0,1" textline " " bitfld.long 0x18 27. " [219] ,MSI vector 219" "0,1" bitfld.long 0x18 26. " [218] ,MSI vector 218" "0,1" textline " " bitfld.long 0x18 25. " [217] ,MSI vector 217" "0,1" bitfld.long 0x18 24. " [216] ,MSI vector 216" "0,1" textline " " bitfld.long 0x18 23. " [215] ,MSI vector 215" "0,1" bitfld.long 0x18 22. " [214] ,MSI vector 214" "0,1" textline " " bitfld.long 0x18 21. " [213] ,MSI vector 213" "0,1" bitfld.long 0x18 20. " [212] ,MSI vector 212" "0,1" textline " " bitfld.long 0x18 19. " [211] ,MSI vector 211" "0,1" bitfld.long 0x18 18. " [210] ,MSI vector 210" "0,1" textline " " bitfld.long 0x18 17. " [209] ,MSI vector 209" "0,1" bitfld.long 0x18 16. " [208] ,MSI vector 208" "0,1" textline " " bitfld.long 0x18 15. " [207] ,MSI vector 207" "0,1" bitfld.long 0x18 14. " [206] ,MSI vector 206" "0,1" textline " " bitfld.long 0x18 13. " [205] ,MSI vector 205" "0,1" bitfld.long 0x18 12. " [204] ,MSI vector 204" "0,1" textline " " bitfld.long 0x18 11. " [203] ,MSI vector 203" "0,1" bitfld.long 0x18 10. " [202] ,MSI vector 202" "0,1" textline " " bitfld.long 0x18 9. " [201] ,MSI vector 201" "0,1" bitfld.long 0x18 8. " [200] ,MSI vector 200" "0,1" textline " " bitfld.long 0x18 7. " [199] ,MSI vector 199" "0,1" bitfld.long 0x18 6. " [198] ,MSI vector 198" "0,1" textline " " bitfld.long 0x18 5. " [197] ,MSI vector 197" "0,1" bitfld.long 0x18 4. " [196] ,MSI vector 196" "0,1" textline " " bitfld.long 0x18 3. " [195] ,MSI vector 195" "0,1" bitfld.long 0x18 2. " [194] ,MSI vector 194" "0,1" textline " " bitfld.long 0x18 1. " [193] ,MSI vector 193" "0,1" bitfld.long 0x18 0. " [192] ,MSI vector 192" "0,1" line.long 0x1C "MSI_VEC7_0,MSI VECTOR7" bitfld.long 0x1C 31. " MSI_VECTOR[255] ,MSI vector 255" "0,1" bitfld.long 0x1C 30. " [254] ,MSI vector 254" "0,1" textline " " bitfld.long 0x1C 29. " [253] ,MSI vector 253" "0,1" bitfld.long 0x1C 28. " [252] ,MSI vector 252" "0,1" textline " " bitfld.long 0x1C 27. " [251] ,MSI vector 251" "0,1" bitfld.long 0x1C 26. " [250] ,MSI vector 250" "0,1" textline " " bitfld.long 0x1C 25. " [249] ,MSI vector 249" "0,1" bitfld.long 0x1C 24. " [248] ,MSI vector 248" "0,1" textline " " bitfld.long 0x1C 23. " [247] ,MSI vector 247" "0,1" bitfld.long 0x1C 22. " [246] ,MSI vector 246" "0,1" textline " " bitfld.long 0x1C 21. " [245] ,MSI vector 245" "0,1" bitfld.long 0x1C 20. " [244] ,MSI vector 244" "0,1" textline " " bitfld.long 0x1C 19. " [243] ,MSI vector 243" "0,1" bitfld.long 0x1C 18. " [242] ,MSI vector 242" "0,1" textline " " bitfld.long 0x1C 17. " [241] ,MSI vector 241" "0,1" bitfld.long 0x1C 16. " [240] ,MSI vector 240" "0,1" textline " " bitfld.long 0x1C 15. " [239] ,MSI vector 239" "0,1" bitfld.long 0x1C 14. " [238] ,MSI vector 238" "0,1" textline " " bitfld.long 0x1C 13. " [237] ,MSI vector 237" "0,1" bitfld.long 0x1C 12. " [236] ,MSI vector 236" "0,1" textline " " bitfld.long 0x1C 11. " [235] ,MSI vector 235" "0,1" bitfld.long 0x1C 10. " [234] ,MSI vector 234" "0,1" textline " " bitfld.long 0x1C 9. " [233] ,MSI vector 233" "0,1" bitfld.long 0x1C 8. " [232] ,MSI vector 232" "0,1" textline " " bitfld.long 0x1C 7. " [231] ,MSI vector 231" "0,1" bitfld.long 0x1C 6. " [230] ,MSI vector 230" "0,1" textline " " bitfld.long 0x1C 5. " [229] ,MSI vector 229" "0,1" bitfld.long 0x1C 4. " [228] ,MSI vector 228" "0,1" textline " " bitfld.long 0x1C 3. " [227] ,MSI vector 227" "0,1" bitfld.long 0x1C 2. " [226] ,MSI vector 226" "0,1" textline " " bitfld.long 0x1C 1. " [225] ,MSI vector 225" "0,1" bitfld.long 0x1C 0. " [224] ,MSI vector 224" "0,1" group.long 0x140++0x1F line.long 0x00 "MSI_EN_VEC0_0,MSI ENABLE VECTOR0" bitfld.long 0x00 31. " MSI_ENABLE_VECTOR[32] ,MSI enable vector 32" "Disabled,Enabled" bitfld.long 0x00 30. " [31] ,MSI enable vector 31" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " [30] ,MSI enable vector 30" "Disabled,Enabled" bitfld.long 0x00 28. " [29] ,MSI enable vector 29" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " [28] ,MSI enable vector 28" "Disabled,Enabled" bitfld.long 0x00 26. " [27] ,MSI enable vector 27" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [26] ,MSI enable vector 26" "Disabled,Enabled" bitfld.long 0x00 24. " [25] ,MSI enable vector 25" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [24] ,MSI enable vector 24" "Disabled,Enabled" bitfld.long 0x00 22. " [23] ,MSI enable vector 23" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " [22] ,MSI enable vector 22" "Disabled,Enabled" bitfld.long 0x00 20. " [21] ,MSI enable vector 21" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [20] ,MSI enable vector 20" "Disabled,Enabled" bitfld.long 0x00 18. " [19] ,MSI enable vector 19" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " [18] ,MSI enable vector 18" "Disabled,Enabled" bitfld.long 0x00 16. " [17] ,MSI enable vector 17" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [16] ,MSI enable vector 16" "Disabled,Enabled" bitfld.long 0x00 14. " [15] ,MSI enable vector 15" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [14] ,MSI enable vector 14" "Disabled,Enabled" bitfld.long 0x00 12. " [13] ,MSI enable vector 13" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [12] ,MSI enable vector 12" "Disabled,Enabled" bitfld.long 0x00 10. " [11] ,MSI enable vector 11" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " [10] ,MSI enable vector 10" "Disabled,Enabled" bitfld.long 0x00 8. " [9] ,MSI enable vector 9" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [8] ,MSI enable vector 8" "Disabled,Enabled" bitfld.long 0x00 6. " [7] ,MSI enable vector 7" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " [6] ,MSI enable vector 6" "Disabled,Enabled" bitfld.long 0x00 4. " [5] ,MSI enable vector 5" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [4] ,MSI enable vector 4" "Disabled,Enabled" bitfld.long 0x00 2. " [3] ,MSI enable vector 3" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [2] ,MSI enable vector 2" "Disabled,Enabled" bitfld.long 0x00 0. " [1] ,MSI enable vector 1" "Disabled,Enabled" line.long 0x04 "MSI_EN_VEC0_1,MSI ENABLE VECTOR1" bitfld.long 0x04 31. " MSI_ENABLE_VECTOR[63] ,MSI enable vector 63" "Disabled,Enabled" bitfld.long 0x04 30. " [62] ,MSI enable vector 62" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " [61] ,MSI enable vector 61" "Disabled,Enabled" bitfld.long 0x04 28. " [60] ,MSI enable vector 60" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " [59] ,MSI enable vector 59" "Disabled,Enabled" bitfld.long 0x04 26. " [58] ,MSI enable vector 58" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " [57] ,MSI enable vector 57" "Disabled,Enabled" bitfld.long 0x04 24. " [56] ,MSI enable vector 56" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " [55] ,MSI enable vector 55" "Disabled,Enabled" bitfld.long 0x04 22. " [54] ,MSI enable vector 54" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " [53] ,MSI enable vector 53" "Disabled,Enabled" bitfld.long 0x04 20. " [52] ,MSI enable vector 52" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [51] ,MSI enable vector 51" "Disabled,Enabled" bitfld.long 0x04 18. " [50] ,MSI enable vector 50" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " [49] ,MSI enable vector 49" "Disabled,Enabled" bitfld.long 0x04 16. " [48] ,MSI enable vector 48" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " [47] ,MSI enable vector 47" "Disabled,Enabled" bitfld.long 0x04 14. " [46] ,MSI enable vector 46" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [45] ,MSI enable vector 45" "Disabled,Enabled" bitfld.long 0x04 12. " [44] ,MSI enable vector 44" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [43] ,MSI enable vector 43" "Disabled,Enabled" bitfld.long 0x04 10. " [42] ,MSI enable vector 42" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " [41] ,MSI enable vector 41" "Disabled,Enabled" bitfld.long 0x04 8. " [40] ,MSI enable vector 40" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [39] ,MSI enable vector 39" "Disabled,Enabled" bitfld.long 0x04 6. " [38] ,MSI enable vector 38" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " [37] ,MSI enable vector 37" "Disabled,Enabled" bitfld.long 0x04 4. " [36] ,MSI enable vector 36" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [35] ,MSI enable vector 35" "Disabled,Enabled" bitfld.long 0x04 2. " [34] ,MSI enable vector 34" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [33] ,MSI enable vector 33" "Disabled,Enabled" bitfld.long 0x04 0. " [32] ,MSI enable vector 32" "Disabled,Enabled" line.long 0x08 "MSI_EN_VEC0_2,MSI ENABLE VECTOR2" bitfld.long 0x08 31. " MSI_ENABLE_VECTOR[95] ,MSI enable vector 95" "Disabled,Enabled" bitfld.long 0x08 30. " [94] ,MSI enable vector 94" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " [93] ,MSI enable vector 93" "Disabled,Enabled" bitfld.long 0x08 28. " [92] ,MSI enable vector 92" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " [91] ,MSI enable vector 91" "Disabled,Enabled" bitfld.long 0x08 26. " [90] ,MSI enable vector 90" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " [89] ,MSI enable vector 89" "Disabled,Enabled" bitfld.long 0x08 24. " [88] ,MSI enable vector 88" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " [87] ,MSI enable vector 87" "Disabled,Enabled" bitfld.long 0x08 22. " [86] ,MSI enable vector 86" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " [85] ,MSI enable vector 85" "Disabled,Enabled" bitfld.long 0x08 20. " [84] ,MSI enable vector 84" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " [83] ,MSI enable vector 83" "Disabled,Enabled" bitfld.long 0x08 18. " [82] ,MSI enable vector 82" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " [81] ,MSI enable vector 81" "Disabled,Enabled" bitfld.long 0x08 16. " [80] ,MSI enable vector 80" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " [79] ,MSI enable vector 79" "Disabled,Enabled" bitfld.long 0x08 14. " [78] ,MSI enable vector 78" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " [77] ,MSI enable vector 77" "Disabled,Enabled" bitfld.long 0x08 12. " [76] ,MSI enable vector 76" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " [75] ,MSI enable vector 75" "Disabled,Enabled" bitfld.long 0x08 10. " [74] ,MSI enable vector 74" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " [73] ,MSI enable vector 73" "Disabled,Enabled" bitfld.long 0x08 8. " [72] ,MSI enable vector 72" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " [71] ,MSI enable vector 71" "Disabled,Enabled" bitfld.long 0x08 6. " [70] ,MSI enable vector 70" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " [69] ,MSI enable vector 69" "Disabled,Enabled" bitfld.long 0x08 4. " [68] ,MSI enable vector 68" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " [67] ,MSI enable vector 67" "Disabled,Enabled" bitfld.long 0x08 2. " [66] ,MSI enable vector 66" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " [65] ,MSI enable vector 65" "Disabled,Enabled" bitfld.long 0x08 0. " [64] ,MSI enable vector 64" "Disabled,Enabled" line.long 0x0C "MSI_EN_VEC0_3,MSI ENABLE VECTOR3" bitfld.long 0x0C 31. " MSI_ENABLE_VECTOR[127] ,MSI enable vector 127" "Disabled,Enabled" bitfld.long 0x0C 30. " [126] ,MSI enable vector 126" "Disabled,Enabled" textline " " bitfld.long 0x0C 29. " [125] ,MSI enable vector 125" "Disabled,Enabled" bitfld.long 0x0C 28. " [124] ,MSI enable vector 124" "Disabled,Enabled" textline " " bitfld.long 0x0C 27. " [123] ,MSI enable vector 123" "Disabled,Enabled" bitfld.long 0x0C 26. " [122] ,MSI enable vector 122" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " [121] ,MSI enable vector 121" "Disabled,Enabled" bitfld.long 0x0C 24. " [120] ,MSI enable vector 120" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " [119] ,MSI enable vector 119" "Disabled,Enabled" bitfld.long 0x0C 22. " [118] ,MSI enable vector 118" "Disabled,Enabled" textline " " bitfld.long 0x0C 21. " [117] ,MSI enable vector 117" "Disabled,Enabled" bitfld.long 0x0C 20. " [116] ,MSI enable vector 116" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " [115] ,MSI enable vector 115" "Disabled,Enabled" bitfld.long 0x0C 18. " [114] ,MSI enable vector 114" "Disabled,Enabled" textline " " bitfld.long 0x0C 17. " [113] ,MSI enable vector 113" "Disabled,Enabled" bitfld.long 0x0C 16. " [112] ,MSI enable vector 112" "Disabled,Enabled" textline " " bitfld.long 0x0C 15. " [111] ,MSI enable vector 111" "Disabled,Enabled" bitfld.long 0x0C 14. " [110] ,MSI enable vector 110" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " [109] ,MSI enable vector 109" "Disabled,Enabled" bitfld.long 0x0C 12. " [108] ,MSI enable vector 108" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " [107] ,MSI enable vector 107" "Disabled,Enabled" bitfld.long 0x0C 10. " [106] ,MSI enable vector 106" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " [105] ,MSI enable vector 105" "Disabled,Enabled" bitfld.long 0x0C 8. " [104] ,MSI enable vector 104" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " [103] ,MSI enable vector 103" "Disabled,Enabled" bitfld.long 0x0C 6. " [102] ,MSI enable vector 102" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " [101] ,MSI enable vector 101" "Disabled,Enabled" bitfld.long 0x0C 4. " [100] ,MSI enable vector 100" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " [99] ,MSI enable vector 99" "Disabled,Enabled" bitfld.long 0x0C 2. " [98] ,MSI enable vector 98" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " [97] ,MSI enable vector 97" "Disabled,Enabled" bitfld.long 0x0C 0. " [96] ,MSI enable vector 96" "Disabled,Enabled" line.long 0x10 "MSI_EN_VEC0_4,MSI ENABLE VECTOR4" bitfld.long 0x10 31. " MSI_ENABLE_VECTOR[159] ,MSI enable vector 159" "Disabled,Enabled" bitfld.long 0x10 30. " [158] ,MSI enable vector 158" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " [157] ,MSI enable vector 157" "Disabled,Enabled" bitfld.long 0x10 28. " [156] ,MSI enable vector 156" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " [155] ,MSI enable vector 155" "Disabled,Enabled" bitfld.long 0x10 26. " [154] ,MSI enable vector 154" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " [153] ,MSI enable vector 153" "Disabled,Enabled" bitfld.long 0x10 24. " [152] ,MSI enable vector 152" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " [151] ,MSI enable vector 151" "Disabled,Enabled" bitfld.long 0x10 22. " [150] ,MSI enable vector 150" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " [149] ,MSI enable vector 149" "Disabled,Enabled" bitfld.long 0x10 20. " [148] ,MSI enable vector 148" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " [147] ,MSI enable vector 147" "Disabled,Enabled" bitfld.long 0x10 18. " [146] ,MSI enable vector 146" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " [145] ,MSI enable vector 145" "Disabled,Enabled" bitfld.long 0x10 16. " [144] ,MSI enable vector 144" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " [143] ,MSI enable vector 143" "Disabled,Enabled" bitfld.long 0x10 14. " [142] ,MSI enable vector 142" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " [141] ,MSI enable vector 141" "Disabled,Enabled" bitfld.long 0x10 12. " [140] ,MSI enable vector 140" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " [139] ,MSI enable vector 139" "Disabled,Enabled" bitfld.long 0x10 10. " [138] ,MSI enable vector 138" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " [137] ,MSI enable vector 137" "Disabled,Enabled" bitfld.long 0x10 8. " [136] ,MSI enable vector 136" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " [135] ,MSI enable vector 135" "Disabled,Enabled" bitfld.long 0x10 6. " [134] ,MSI enable vector 134" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " [133] ,MSI enable vector 133" "Disabled,Enabled" bitfld.long 0x10 4. " [132] ,MSI enable vector 132" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " [131] ,MSI enable vector 131" "Disabled,Enabled" bitfld.long 0x10 2. " [130] ,MSI enable vector 130" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " [129] ,MSI enable vector 129" "Disabled,Enabled" bitfld.long 0x10 0. " [128] ,MSI enable vector 128" "Disabled,Enabled" line.long 0x14 "MSI_EN_VEC0_5,MSI ENABLE VECTOR5" bitfld.long 0x14 31. " MSI_ENABLE_VECTOR[191] ,MSI enable vector 191" "Disabled,Enabled" bitfld.long 0x14 30. " [190] ,MSI enable vector 190" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " [189] ,MSI enable vector 189" "Disabled,Enabled" bitfld.long 0x14 28. " [188] ,MSI enable vector 188" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " [187] ,MSI enable vector 187" "Disabled,Enabled" bitfld.long 0x14 26. " [186] ,MSI enable vector 186" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " [185] ,MSI enable vector 185" "Disabled,Enabled" bitfld.long 0x14 24. " [184] ,MSI enable vector 184" "Disabled,Enabled" textline " " bitfld.long 0x14 23. " [183] ,MSI enable vector 183" "Disabled,Enabled" bitfld.long 0x14 22. " [182] ,MSI enable vector 182" "Disabled,Enabled" textline " " bitfld.long 0x14 21. " [181] ,MSI enable vector 181" "Disabled,Enabled" bitfld.long 0x14 20. " [180] ,MSI enable vector 180" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " [179] ,MSI enable vector 179" "Disabled,Enabled" bitfld.long 0x14 18. " [178] ,MSI enable vector 178" "Disabled,Enabled" textline " " bitfld.long 0x14 17. " [177] ,MSI enable vector 177" "Disabled,Enabled" bitfld.long 0x14 16. " [176] ,MSI enable vector 176" "Disabled,Enabled" textline " " bitfld.long 0x14 15. " [175] ,MSI enable vector 175" "Disabled,Enabled" bitfld.long 0x14 14. " [174] ,MSI enable vector 174" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " [173] ,MSI enable vector 173" "Disabled,Enabled" bitfld.long 0x14 12. " [172] ,MSI enable vector 172" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " [171] ,MSI enable vector 171" "Disabled,Enabled" bitfld.long 0x14 10. " [170] ,MSI enable vector 170" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " [169] ,MSI enable vector 169" "Disabled,Enabled" bitfld.long 0x14 8. " [168] ,MSI enable vector 168" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " [167] ,MSI enable vector 167" "Disabled,Enabled" bitfld.long 0x14 6. " [166] ,MSI enable vector 166" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " [165] ,MSI enable vector 165" "Disabled,Enabled" bitfld.long 0x14 4. " [164] ,MSI enable vector 164" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " [163] ,MSI enable vector 163" "Disabled,Enabled" bitfld.long 0x14 2. " [162] ,MSI enable vector 162" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " [161] ,MSI enable vector 161" "Disabled,Enabled" bitfld.long 0x14 0. " [160] ,MSI enable vector 160" "Disabled,Enabled" line.long 0x18 "MSI_EN_VEC0_6,MSI ENABLE VECTOR6" bitfld.long 0x18 31. " MSI_ENABLE_VECTOR[223] ,MSI enable vector 223" "Disabled,Enabled" bitfld.long 0x18 30. " [222] ,MSI enable vector 222" "Disabled,Enabled" textline " " bitfld.long 0x18 29. " [221] ,MSI enable vector 221" "Disabled,Enabled" bitfld.long 0x18 28. " [220] ,MSI enable vector 220" "Disabled,Enabled" textline " " bitfld.long 0x18 27. " [219] ,MSI enable vector 219" "Disabled,Enabled" bitfld.long 0x18 26. " [218] ,MSI enable vector 218" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " [217] ,MSI enable vector 217" "Disabled,Enabled" bitfld.long 0x18 24. " [216] ,MSI enable vector 216" "Disabled,Enabled" textline " " bitfld.long 0x18 23. " [215] ,MSI enable vector 215" "Disabled,Enabled" bitfld.long 0x18 22. " [214] ,MSI enable vector 214" "Disabled,Enabled" textline " " bitfld.long 0x18 21. " [213] ,MSI enable vector 213" "Disabled,Enabled" bitfld.long 0x18 20. " [212] ,MSI enable vector 212" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " [211] ,MSI enable vector 211" "Disabled,Enabled" bitfld.long 0x18 18. " [210] ,MSI enable vector 210" "Disabled,Enabled" textline " " bitfld.long 0x18 17. " [209] ,MSI enable vector 209" "Disabled,Enabled" bitfld.long 0x18 16. " [208] ,MSI enable vector 208" "Disabled,Enabled" textline " " bitfld.long 0x18 15. " [207] ,MSI enable vector 207" "Disabled,Enabled" bitfld.long 0x18 14. " [206] ,MSI enable vector 206" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " [205] ,MSI enable vector 205" "Disabled,Enabled" bitfld.long 0x18 12. " [204] ,MSI enable vector 204" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " [203] ,MSI enable vector 203" "Disabled,Enabled" bitfld.long 0x18 10. " [202] ,MSI enable vector 202" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " [201] ,MSI enable vector 201" "Disabled,Enabled" bitfld.long 0x18 8. " [200] ,MSI enable vector 200" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " [199] ,MSI enable vector 199" "Disabled,Enabled" bitfld.long 0x18 6. " [198] ,MSI enable vector 198" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " [197] ,MSI enable vector 197" "Disabled,Enabled" bitfld.long 0x18 4. " [196] ,MSI enable vector 196" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " [195] ,MSI enable vector 195" "Disabled,Enabled" bitfld.long 0x18 2. " [194] ,MSI enable vector 194" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " [193] ,MSI enable vector 193" "Disabled,Enabled" bitfld.long 0x18 0. " [192] ,MSI enable vector 192" "Disabled,Enabled" line.long 0x1C "MSI_EN_VEC0_7,MSI ENABLE VECTOR7" bitfld.long 0x1C 31. " MSI_ENABLE_VECTOR[255] ,MSI enable vector 255" "Disabled,Enabled" bitfld.long 0x1C 30. " [254] ,MSI enable vector 254" "Disabled,Enabled" textline " " bitfld.long 0x1C 29. " [253] ,MSI enable vector 253" "Disabled,Enabled" bitfld.long 0x1C 28. " [252] ,MSI enable vector 252" "Disabled,Enabled" textline " " bitfld.long 0x1C 27. " [251] ,MSI enable vector 251" "Disabled,Enabled" bitfld.long 0x1C 26. " [250] ,MSI enable vector 250" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " [249] ,MSI enable vector 249" "Disabled,Enabled" bitfld.long 0x1C 24. " [248] ,MSI enable vector 248" "Disabled,Enabled" textline " " bitfld.long 0x1C 23. " [247] ,MSI enable vector 247" "Disabled,Enabled" bitfld.long 0x1C 22. " [246] ,MSI enable vector 246" "Disabled,Enabled" textline " " bitfld.long 0x1C 21. " [245] ,MSI enable vector 245" "Disabled,Enabled" bitfld.long 0x1C 20. " [244] ,MSI enable vector 244" "Disabled,Enabled" textline " " bitfld.long 0x1C 19. " [243] ,MSI enable vector 243" "Disabled,Enabled" bitfld.long 0x1C 18. " [242] ,MSI enable vector 242" "Disabled,Enabled" textline " " bitfld.long 0x1C 17. " [241] ,MSI enable vector 241" "Disabled,Enabled" bitfld.long 0x1C 16. " [240] ,MSI enable vector 240" "Disabled,Enabled" textline " " bitfld.long 0x1C 15. " [239] ,MSI enable vector 239" "Disabled,Enabled" bitfld.long 0x1C 14. " [238] ,MSI enable vector 238" "Disabled,Enabled" textline " " bitfld.long 0x1C 13. " [237] ,MSI enable vector 237" "Disabled,Enabled" bitfld.long 0x1C 12. " [236] ,MSI enable vector 236" "Disabled,Enabled" textline " " bitfld.long 0x1C 11. " [235] ,MSI enable vector 235" "Disabled,Enabled" bitfld.long 0x1C 10. " [234] ,MSI enable vector 234" "Disabled,Enabled" textline " " bitfld.long 0x1C 9. " [233] ,MSI enable vector 233" "Disabled,Enabled" bitfld.long 0x1C 8. " [232] ,MSI enable vector 232" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " [231] ,MSI enable vector 231" "Disabled,Enabled" bitfld.long 0x1C 6. " [230] ,MSI enable vector 230" "Disabled,Enabled" textline " " bitfld.long 0x1C 5. " [229] ,MSI enable vector 229" "Disabled,Enabled" bitfld.long 0x1C 4. " [228] ,MSI enable vector 228" "Disabled,Enabled" textline " " bitfld.long 0x1C 3. " [227] ,MSI enable vector 227" "Disabled,Enabled" bitfld.long 0x1C 2. " [226] ,MSI enable vector 226" "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " [225] ,MSI enable vector 225" "Disabled,Enabled" bitfld.long 0x1C 0. " [224] ,MSI enable vector 224" "Disabled,Enabled" group.long 0x180++0x2B line.long 0x00 "CONFIGURATION_0,Configuration" bitfld.long 0x00 31. " CLKEN_OVERRIDE ,Override the clock enable" "No override,Override" bitfld.long 0x00 19. " PW_NO_DEVSEL_ERR_CYA ,Detection of DECERR disables" "Enabled,Disabled" textline " " rbitfld.long 0x00 18. " INITIATOR_READ_IDLE ,Status reads on AFI upstream""0,1" rbitfld.long 0x00 17. " INITIATOR_WRITE_IDLE ,Status write on AFI upstream" "0,1" textline " " bitfld.long 0x00 15. " WDATA_LEAD_CYA ,Enable/Disable the handling write data of IPFS" "Enabled,Disabled" bitfld.long 0x00 14. " WR_INTRLV_CYA ,Enable/disable the handling write requests on IPFS" "Enabled,Disabled" textline " " rbitfld.long 0x00 11. " TARGET_READ_IDLE ,IPFS read target status" "0,1" rbitfld.long 0x00 10. " TARGET_WRITE_IDLE ,IPFS write target status" "0,1" textline " " rbitfld.long 0x00 9. " MSI_VEC_EMPTY ,MSI Vector registers status" "Not empty,Empty" bitfld.long 0x00 7. " UFPCI_MSIAW ,MSI After Write ordering rule" "0,1" textline " " bitfld.long 0x00 6. " UFPCI_PWPASSPW ,Input to upstream FPCI" "0,1" bitfld.long 0x00 5. " UFPCI_PASSPW ,Input to upstream FPCI" "0,1" textline " " bitfld.long 0x00 4. " UFPCI_PWPASSNPW ,Used for upstream FPCI" "0,1" bitfld.long 0x00 3. " DFPCI_PWPASSNPW ,Used for downstream FPCI" "0,1" textline " " bitfld.long 0x00 2. " DFPCI_RSPPASSPW ,Input to downstream FPCI" "0,1" bitfld.long 0x00 1. " DFPCI_PASSPW ,Input to downstream FPCI" "0,1" textline " " bitfld.long 0x00 0. " EN_FPCI ,IPFS device block disabled" "No,Yes" line.long 0x04 "FPCI_ERROR_MASKS_0,FPCI Error Masks" bitfld.long 0x04 2. " MASK_FPCI_MASTER_ABORT ,FPCI Master Abort" "No error,Error" bitfld.long 0x04 1. " MASK_FPCI_DATA_ERROR ,FPCI Data Error" "No error,Error" textline " " bitfld.long 0x04 0. " MASK_FPCI_TARGET_ABORT ,FPCI AXI OKAY" "No error,Error" line.long 0x08 "INTR_MASK_0,Interrupt Masks" bitfld.long 0x08 16. " IP_INT_MASK ,:IP (SATA/AZA) interrupt to MPCORE gate mask" "No interrupt,Interrupt" bitfld.long 0x08 8. " MSI_MASK ,MSI to MPCORE gate mask" "No interrupt,Interrupt" textline " " bitfld.long 0x08 0. " INT_MASK ,Interrupt to MPCORE gate mask" "No interrupt,Interrupt" line.long 0x0C "INTR_CODE_0,Interrupt Control" bitfld.long 0x0C 0.--4. " INT_CODE ,Eight interrupt codes" "INT_CODE_CLEAR,INT_CODE_INI_SLVERR,INT_CODE_INI_DECERR,INT_CODE_TGT_SLVERR,INT_CODE_TGT_DECERR,INT_CODE_TGT_WRERR,,INT_CODE_DFPCI_DECERR,INT_CODE_AXI_DECERR,INT_CODE_FPCI_TIMEOUT,,,,,,INT_CODE_SM_FATAL_ERROR,INT_CODE_SM_NON_FATAL_ERROR,?..." line.long 0x10 "INTR_SIGNATURE_0,Interrupt Signature" hexmask.long 0x10 2.--31. 1. " INT_INFO ,Address for FPCI generated errors" bitfld.long 0x10 0. " DIR ,Direction of the AXI/FPCI transaction" "Write,Read" line.long 0x14 "UPPER_FPCI_ADDR_0,Upper FPCI Address" hexmask.long.byte 0x14 0.--7. 1. " INT_INFO_UPPER ,Upper byte of captured FPCI address" line.long 0x18 "IPFS_INTR_ENABLE_0,IPFS Interrupt Enable" bitfld.long 0x18 13. " EN_SM_NON_FATAL_ERROR ,Enable bit for interrupt code 15" "Disabled,Enabled" bitfld.long 0x18 12. " EN_SM_FATAL_ERROR ,Enable bit for interrupt code 14" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " EN_FPCI_TIMEOUT ,Enable bit for interrupt code 9" "Disabled,Enabled" bitfld.long 0x18 6. " EN_AXI_DECERR ,Enable bit for interrupt code 8" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " EN_DFPCI_DECERR ,Enable bit for interrupt code 7" "Disabled,Enabled" bitfld.long 0x18 4. " EN_TGT_WRERR ,Enable bit for interrupt code 5" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " EN_TGT_DECERR ,Enable bit for interrupt code 4" "Disabled,Enabled" bitfld.long 0x18 2. " EN_TGT_SLVERR ,Enable bit for interrupt code 3" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " EN_INI_DECERR ,Enable bit for interrupt code 2" "Disabled,Enabled" bitfld.long 0x18 0. " EN_INI_SLVERR ,Enable bit for interrupt code 1" "Disabled,Enabled" line.long 0x1C "UFPCI_CONFIG_0,Upstream FPCI Configuration" bitfld.long 0x1C 0.--4. " UNITID_T0C0 ,Upstream FPCI Unit ID for controller 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "CFG_REVID_0,CFG_REVID register" rbitfld.long 0x20 19. " DEV2SM_NONISO_REQUEST_PEND ,Non ISO request pending" "No,Yes" rbitfld.long 0x20 18. " DEV2SM_ISO_REQUEST_PEND ,ISO request pending" "No,Yes" textline " " bitfld.long 0x20 12.--13. " STRAP_CPU_MODE ,MSI send mode" "NB_INTEL,NB_AMD,AMD,TMTA" bitfld.long 0x20 11. " CFG_REVID_WRITE_ENABLE ,the enable to override the revid" "Disabled,Enabled" textline " " bitfld.long 0x20 10. " CFG_REVID_OVERRIDE ,Current revision ID override" "Disabled,Enabled" rbitfld.long 0x20 4. " DEV2LEG_NONCOH_REQUEST_PEND ,Non coherent req pending" "No,Yes" textline " " rbitfld.long 0x20 3. " DEV2LEG_COH_REQUEST_PEND ,Coherent req pending" "No,Yes" bitfld.long 0x20 2. " SM2DEV_FPCI_TIMEOUT_EN ,FPCI timeout enable control" "Disabled,Enabled" line.long 0x24 "FPCI_TIMEOUT_0,FPCI_TIMEOUT register" hexmask.long.tbyte 0x24 0.--19. 1. " SM2ALL_FPCI_TIMEOUT_THRESH ,Timeout thresh value" line.long 0x28 "TOM_0,Top of Memory Limit" hexmask.long.word 0x28 16.--29. 1. " LEG2ALL_TOM2 ,Top of Memory Limit 2" hexmask.long.word 0x28 0.--11. 1. " LEG2ALL_TOM1 ,Top of Memory Limit 1" rgroup.long 0x1AC++0x0B line.long 0x00 "INITIATOR_ISO_PW_RESP_PENDING_0,Initiator ISO PW Response Pending" hexmask.long.byte 0x00 0.--7. 1. " NUM_INITIATOR_ISO_PW_RESP_PEND ,Number of pending initiator iso PW responses" line.long 0x04 "INITIATOR_NISO_PW_RESP_PENDING_0,Initiator Non-ISO PW Response Pending" hexmask.long.byte 0x04 0.--7. 1. " NUM_INITIATOR_NISO_PW_RESP_PEND ,Number of pending initiator niso PW responses" line.long 0x08 "INTR_STATUS_0,IPFS Interrupt Status" bitfld.long 0x08 2. " IP_INTR_STATUS ,Status of IP (SATA/AZA) interrupt" "No interrupt,Interrupt" bitfld.long 0x08 1. " MSI_INTR_STATUS ,Status of MSI interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x08 0. " IPFS_INTR_STATUS ,Status of ipfs interrupt" "No interrupt,Interrupt" group.long 0x1B8++0x07 line.long 0x00 "DFPCI_BEN_0,Downstream FPCI Byte Enables" bitfld.long 0x00 31. " EN_DFPCI_BEN ,DFPCI ben bit enable" "Disabled,Enabled" bitfld.long 0x00 0.--3. " DFPCI_BYTE_ENABLE_N ,Active low byte enables" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CLKGATE_HYSTERESIS_0,CLKGATE_HYSTERESIS_0" hexmask.long.byte 0x04 0.--7. 1. " CLK_DISABLE_CNT ,Number of IPFS clock cycles to wait after clock gating criteria is met to disable IPFS/FPCI clocks" sif (!cpuis("TEGRAX2")) group.long 0x1D8++0x03 line.long 0x00 "SPARE_REG0_0,SPARE_REG0_0" endif sif (cpuis("TEGRAX2")) group.long 0x1DC++0x07 line.long 0x00 "MISC_0,MISC_0" bitfld.long 0x00 0. " HDA_DEVICE_DIS ,Serial ATA Interface 0 Disable" "No,Yes" line.long 0x04 "HDA_GSC_ID_0,HDA_GSC_ID_0" bitfld.long 0x04 0.--4. " HDA_GSC_ID ,HDA_GSC_ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long 0x1DC++0x07 line.long 0x00 "HDA_MCCIF_FIFOCTRL_0,HDA_MCCIF_FIFOCTRL_0" bitfld.long 0x00 20. " HDA_RCLK_OVR_MODE ,HDA_RCLK_OVR_MODE" "Legacy,On" bitfld.long 0x00 19. " HDA_WCLK_OVR_MODE ,HDA_WCLK_OVR_MODE" "Legacy,On" textline " " bitfld.long 0x00 18. " HDA_CCLK_OVERRIDE ,HDA_CCLK_OVERRIDE" "No override,Override" bitfld.long 0x00 17. " HDA_RCLK_OVERRIDE ,HDA_RCLK_OVERRIDE" "No override,Override" textline " " bitfld.long 0x00 16. " HDA_WCLK_OVERRIDE ,HDA_WCLK_OVERRIDE" "No override,Override" bitfld.long 0x00 3. " HDA_MCCIF_RDCL_RDFAST ,HDA_MCCIF_RDCL_RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HDA_MCCIF_WRMC_CLLE2X ,HDA_MCCIF_WRMC_CLLE2X" "Disabled,Enabled" bitfld.long 0x00 1. " HDA_MCCIF_RDMC_RDFAST ,HDA_MCCIF_RDMC_RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HDA_MCCIF_WRCL_MCLE2X ,HDA_MCCIF_WRCL_MCLE2X" "Disabled,Enabled" line.long 0x04 "MISC_0,MISC_0" bitfld.long 0x04 0. " HDA_DEVICE_DIS ,Serial ATA Interface 0 Disable" "No,Yes" endif group.long 0x1E4++0x0B line.long 0x00 "ORDERING_RULES_0,ORDERING_RULES_0" bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "MSIAW,Legacy (Tegra 3)" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering" "RespAW,Legacy (Tegra 3)" textline " " bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "RAW,Legacy (Tegra 3)" line.long 0x04 "A2F_UFPCI_CFG0_0,A2F_UFPCI_CFG0_0" hexmask.long.byte 0x04 24.--31. 1. " STATIC_WAIT_IDLE_CNTR ,STATIC_WAIT_IDLE_CNTR" bitfld.long 0x04 16.--18. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI1 ,STATIC_UFPCI_UFA_STARVE_CNTR_PRI1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 12.--15. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI0 ,STATIC_UFPCI_UFA_STARVE_CNTR_PRI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 10.--11. " STATIC_UFPCI_RR_BURST_SZ_PRI1 ,STATIC_UFPCI_RR_BURST_SZ_PRI1" "0,1,2,3" textline " " bitfld.long 0x04 8.--9. " STATIC_UFPCI_RR_BURST_SZ_PRI0 ,STATIC_UFPCI_RR_BURST_SZ_PRI0" "0,1,2,3" bitfld.long 0x04 7. " STATIC_WAIT_CLAMP_EN ,STATIC_WAIT_CLAMP_EN" "0,1" textline " " bitfld.long 0x04 6. " STATIC_UFPCI_UFA_DYN_BLOCK_EN ,STATIC_UFPCI_UFA_DYN_BLOCK_EN" "0,1" bitfld.long 0x04 5. " STATIC_UFPCI_UFA_BLK_COHERENT ,STATIC_UFPCI_UFA_BLK_COHERENT" "0,1" textline " " bitfld.long 0x04 2.--4. " STATIC_UFPCI_BLOCK_CMD_THRESHOLD ,STATIC_UFPCI_BLOCK_CMD_THRESHOLD" "0,1,2,3,4,5,6,7" bitfld.long 0x04 1. " STATIC_CYA_UFA_ARB ,STATIC_CYA_UFA_ARB" "0,1" textline " " bitfld.long 0x04 0. " STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK ,STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK" "0,1" line.long 0x08 "A2F_UFPCI_CFG1_0,A2F_UFPCI_CFG1_0" hexmask.long.byte 0x08 0.--7. 1. " STATIC_WAIT_UNCLAMP_CNTR ,STATIC_WAIT_UNCLAMP_CNTR" sif (!cpuis("TEGRAX2")) group.long 0x1F0++0x03 line.long 0x00 "DUMMY_REG_0,DUMMY_REG_0" bitfld.long 0x00 0. " DUMMY ,Dummy register" "0,1" endif width 0x0B tree.end tree "DPAUX0 Registers" base ad:0X545C0000 width 25. sif (!cpuis("TEGRAX2")) group.long 0x00++0x03 line.long 0x00 "CTXSW_0,Context Switch Register" rbitfld.long 0x00 28.--31. " NEXT_CHANNEL ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--25. 1. " NEXT_CLASS ,Next requested class" bitfld.long 0x00 12.--15. " CURR_CHANNEL ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 11. " AUTO_ACK ,Automatically acknowledge incoming context" "Manual,Autoack" hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" endif group.long (0x04+0x0)++0x03 "REG_0" line.long 0x00 "INTR_EN_AUX_0,Interrupt Enable AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Disabled,Enabled" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Disabled,Enabled" group.long (0x14+0x0)++0x03 line.long 0x00 "INTR_AUX_0,Interrupt AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Not pending,Pending" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Not pending,Pending" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Not pending,Pending" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Not pending,Pending" group.long (0x24+0x0)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W0_0,Data Register Array For DisplayPort Write 0 (Register 0)" group.long (0x34+0x0)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W1_0,Data Register Array For DisplayPort Write 1 (Register 0)" group.long (0x44+0x0)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W2_0,Data Register Array For DisplayPort Write 2 (Register 0)" group.long (0x54+0x0)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W3_0,Data Register Array For DisplayPort Write 3 (Register 0)" rgroup.long (0x64+0x0)++0x03 line.long 0x00 "DP_AUXDATA_READ_W0_0,Data Register Array For DisplayPort Read 0 (Register 0)" rgroup.long (0x74+0x0)++0x03 line.long 0x00 "DP_AUXDATA_READ_W1_0,Data Register Array For DisplayPort Read 1 (Register 0)" rgroup.long (0x84+0x0)++0x03 line.long 0x00 "DP_AUXDATA_READ_W2_0,Data Register Array For DisplayPort Read 2 (Register 0)" rgroup.long (0x94+0x0)++0x03 line.long 0x00 "DP_AUXDATA_READ_W3_0,Data Register Array For DisplayPort Read 3 (Register 0)" group.long (0xA4+0x0)++0x03 line.long 0x00 "DP_AUXADDR_0,Address Register For DisplayPort AUX " hexmask.long.tbyte 0x00 0.--19. 0x01 " REG ,20-bit address register transaction reads from/writes to the sink AUX" group.long (0xB4+0x0)++0x03 line.long 0x00 "DP_AUXCTL_0,Main Control Register For AUX Transactions" bitfld.long 0x00 31. " RST ,AUX channel reset" "Deasserted,Asserted" rbitfld.long 0x00 24.--25. " SEMA_GRANT ,AUX channel obtained" "None,RM,VBIOS,PMU" bitfld.long 0x00 20.--21. " SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU" textline " " bitfld.long 0x00 16. " TRANSACTREQ ,AUX channel transaction request" "Done,Pending" bitfld.long 0x00 12.--15. " CMD ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..." bitfld.long 0x00 8. " ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " CMDLEN ,AUX channel data bytes number" group.long (0xC4+0x0)++0x03 line.long 0x00 "DP_AUXSTAT_0,DP AUX Status" rbitfld.long 0x00 28. " HPD_STATUS ,HPD line state" "Unplugged,Plugged" rbitfld.long 0x00 20.--23. " AUXCTL_STATE ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..." rbitfld.long 0x00 16.--19. " REPLYTYPE ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..." textline " " bitfld.long 0x00 11. " NO_STOP_ERROR ,STOP signal error pending" "Not pending,Pending" bitfld.long 0x00 10. " SINKSTAT_ERROR ,SINKSTAT_ERROR" "Not pending,Pending" bitfld.long 0x00 9. " RX_ERROR ,AUX channel receive error pending" "Not pending,Pending" textline " " bitfld.long 0x00 8. " TIMEOUT_ERROR ,Timeout error pending" "Not pending,Pending" hexmask.long.byte 0x00 0.--7. 1. " REPLY_M , AUX channel transaction receive" rgroup.long (0xD4+0x0)++0x07 line.long 0x00 "DP_AUX_SINKSTATLO_0,AUX Sink Status Low" rgroup.long (0xE4+0x0)++0x07 line.long 0x04 "P_AUX_SINKSTATHI_0,AUX Sink Status High" hexmask.long.word 0x04 0.--15. 0x01 " REG ,Data buffer for sink/link status information" group.long (0xF4+0x0)++0x03 line.long 0x00 "HPD_CONFIG_0,HPD Config" hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME ,HPD line low before unplug" hexmask.long.word 0x00 0.--15. 1. " PLUG_MIN_TIME ,HPD line high before plug" group.long (0x104+0x0)++0x03 line.long 0x00 "HPD_IRQ_CONFIG_0,HPD IRQ Config" hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME ,IRQ minimum time" group.long (0x114+0x0)++0x03 line.long 0x00 "DP_AUX_CONFIG_0,DP AUX Config" hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Sets the wait time (in microseconds)" group.long (0x124+0x0)++0x03 line.long 0x00 "HYBRID_PADCTL_0,Hybrid Pads Control" bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled" bitfld.long 0x00 14. " I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA" else textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 1. " AUX_INPUT_RCV ,AUX CH pad receiver enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MODE ,AUX/I2C pad mode control" "AUX,I2C" group.long (0x134+0x0)++0x03 line.long 0x00 "HYBRID_SPARE_0,Hybrid Spare" sif (cpuis("TEGRAX2")) hexmask.long 0x00 2.--31. 1. " REG ,REG" bitfld.long 0x00 1. " RCV_33_18_SEL ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V" textline " " endif bitfld.long 0x00 0. " PAD_PWR ,Hybrid pad E_PWRD port control" "Power-up,Power-down" group.long (0x04+0x4)++0x03 "REG_1" line.long 0x00 "INTR_EN_AUX_1,Interrupt Enable AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Disabled,Enabled" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Disabled,Enabled" group.long (0x14+0x4)++0x03 line.long 0x00 "INTR_AUX_1,Interrupt AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Not pending,Pending" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Not pending,Pending" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Not pending,Pending" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Not pending,Pending" group.long (0x24+0x4)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W0_1,Data Register Array For DisplayPort Write 0 (Register 1)" group.long (0x34+0x4)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W1_1,Data Register Array For DisplayPort Write 1 (Register 1)" group.long (0x44+0x4)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W2_1,Data Register Array For DisplayPort Write 2 (Register 1)" group.long (0x54+0x4)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W3_1,Data Register Array For DisplayPort Write 3 (Register 1)" rgroup.long (0x64+0x4)++0x03 line.long 0x00 "DP_AUXDATA_READ_W0_1,Data Register Array For DisplayPort Read 0 (Register 1)" rgroup.long (0x74+0x4)++0x03 line.long 0x00 "DP_AUXDATA_READ_W1_1,Data Register Array For DisplayPort Read 1 (Register 1)" rgroup.long (0x84+0x4)++0x03 line.long 0x00 "DP_AUXDATA_READ_W2_1,Data Register Array For DisplayPort Read 2 (Register 1)" rgroup.long (0x94+0x4)++0x03 line.long 0x00 "DP_AUXDATA_READ_W3_1,Data Register Array For DisplayPort Read 3 (Register 1)" group.long (0xA4+0x4)++0x03 line.long 0x00 "DP_AUXADDR_1,Address Register For DisplayPort AUX " hexmask.long.tbyte 0x00 0.--19. 0x01 " REG ,20-bit address register transaction reads from/writes to the sink AUX" group.long (0xB4+0x4)++0x03 line.long 0x00 "DP_AUXCTL_1,Main Control Register For AUX Transactions" bitfld.long 0x00 31. " RST ,AUX channel reset" "Deasserted,Asserted" rbitfld.long 0x00 24.--25. " SEMA_GRANT ,AUX channel obtained" "None,RM,VBIOS,PMU" bitfld.long 0x00 20.--21. " SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU" textline " " bitfld.long 0x00 16. " TRANSACTREQ ,AUX channel transaction request" "Done,Pending" bitfld.long 0x00 12.--15. " CMD ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..." bitfld.long 0x00 8. " ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " CMDLEN ,AUX channel data bytes number" group.long (0xC4+0x4)++0x03 line.long 0x00 "DP_AUXSTAT_1,DP AUX Status" rbitfld.long 0x00 28. " HPD_STATUS ,HPD line state" "Unplugged,Plugged" rbitfld.long 0x00 20.--23. " AUXCTL_STATE ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..." rbitfld.long 0x00 16.--19. " REPLYTYPE ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..." textline " " bitfld.long 0x00 11. " NO_STOP_ERROR ,STOP signal error pending" "Not pending,Pending" bitfld.long 0x00 10. " SINKSTAT_ERROR ,SINKSTAT_ERROR" "Not pending,Pending" bitfld.long 0x00 9. " RX_ERROR ,AUX channel receive error pending" "Not pending,Pending" textline " " bitfld.long 0x00 8. " TIMEOUT_ERROR ,Timeout error pending" "Not pending,Pending" hexmask.long.byte 0x00 0.--7. 1. " REPLY_M , AUX channel transaction receive" rgroup.long (0xD4+0x4)++0x07 line.long 0x00 "DP_AUX_SINKSTATLO_1,AUX Sink Status Low" rgroup.long (0xE4+0x4)++0x07 line.long 0x04 "P_AUX_SINKSTATHI_1,AUX Sink Status High" hexmask.long.word 0x04 0.--15. 0x01 " REG ,Data buffer for sink/link status information" group.long (0xF4+0x4)++0x03 line.long 0x00 "HPD_CONFIG_1,HPD Config" hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME ,HPD line low before unplug" hexmask.long.word 0x00 0.--15. 1. " PLUG_MIN_TIME ,HPD line high before plug" group.long (0x104+0x4)++0x03 line.long 0x00 "HPD_IRQ_CONFIG_1,HPD IRQ Config" hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME ,IRQ minimum time" group.long (0x114+0x4)++0x03 line.long 0x00 "DP_AUX_CONFIG_1,DP AUX Config" hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Sets the wait time (in microseconds)" group.long (0x124+0x4)++0x03 line.long 0x00 "HYBRID_PADCTL_1,Hybrid Pads Control" bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled" bitfld.long 0x00 14. " I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA" else textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 1. " AUX_INPUT_RCV ,AUX CH pad receiver enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MODE ,AUX/I2C pad mode control" "AUX,I2C" group.long (0x134+0x4)++0x03 line.long 0x00 "HYBRID_SPARE_1,Hybrid Spare" sif (cpuis("TEGRAX2")) hexmask.long 0x00 2.--31. 1. " REG ,REG" bitfld.long 0x00 1. " RCV_33_18_SEL ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V" textline " " endif bitfld.long 0x00 0. " PAD_PWR ,Hybrid pad E_PWRD port control" "Power-up,Power-down" group.long (0x04+0x8)++0x03 "REG_2" line.long 0x00 "INTR_EN_AUX_2,Interrupt Enable AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Disabled,Enabled" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Disabled,Enabled" group.long (0x14+0x8)++0x03 line.long 0x00 "INTR_AUX_2,Interrupt AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Not pending,Pending" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Not pending,Pending" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Not pending,Pending" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Not pending,Pending" group.long (0x24+0x8)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W0_2,Data Register Array For DisplayPort Write 0 (Register 2)" group.long (0x34+0x8)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W1_2,Data Register Array For DisplayPort Write 1 (Register 2)" group.long (0x44+0x8)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W2_2,Data Register Array For DisplayPort Write 2 (Register 2)" group.long (0x54+0x8)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W3_2,Data Register Array For DisplayPort Write 3 (Register 2)" rgroup.long (0x64+0x8)++0x03 line.long 0x00 "DP_AUXDATA_READ_W0_2,Data Register Array For DisplayPort Read 0 (Register 2)" rgroup.long (0x74+0x8)++0x03 line.long 0x00 "DP_AUXDATA_READ_W1_2,Data Register Array For DisplayPort Read 1 (Register 2)" rgroup.long (0x84+0x8)++0x03 line.long 0x00 "DP_AUXDATA_READ_W2_2,Data Register Array For DisplayPort Read 2 (Register 2)" rgroup.long (0x94+0x8)++0x03 line.long 0x00 "DP_AUXDATA_READ_W3_2,Data Register Array For DisplayPort Read 3 (Register 2)" group.long (0xA4+0x8)++0x03 line.long 0x00 "DP_AUXADDR_2,Address Register For DisplayPort AUX " hexmask.long.tbyte 0x00 0.--19. 0x01 " REG ,20-bit address register transaction reads from/writes to the sink AUX" group.long (0xB4+0x8)++0x03 line.long 0x00 "DP_AUXCTL_2,Main Control Register For AUX Transactions" bitfld.long 0x00 31. " RST ,AUX channel reset" "Deasserted,Asserted" rbitfld.long 0x00 24.--25. " SEMA_GRANT ,AUX channel obtained" "None,RM,VBIOS,PMU" bitfld.long 0x00 20.--21. " SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU" textline " " bitfld.long 0x00 16. " TRANSACTREQ ,AUX channel transaction request" "Done,Pending" bitfld.long 0x00 12.--15. " CMD ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..." bitfld.long 0x00 8. " ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " CMDLEN ,AUX channel data bytes number" group.long (0xC4+0x8)++0x03 line.long 0x00 "DP_AUXSTAT_2,DP AUX Status" rbitfld.long 0x00 28. " HPD_STATUS ,HPD line state" "Unplugged,Plugged" rbitfld.long 0x00 20.--23. " AUXCTL_STATE ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..." rbitfld.long 0x00 16.--19. " REPLYTYPE ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..." textline " " bitfld.long 0x00 11. " NO_STOP_ERROR ,STOP signal error pending" "Not pending,Pending" bitfld.long 0x00 10. " SINKSTAT_ERROR ,SINKSTAT_ERROR" "Not pending,Pending" bitfld.long 0x00 9. " RX_ERROR ,AUX channel receive error pending" "Not pending,Pending" textline " " bitfld.long 0x00 8. " TIMEOUT_ERROR ,Timeout error pending" "Not pending,Pending" hexmask.long.byte 0x00 0.--7. 1. " REPLY_M , AUX channel transaction receive" rgroup.long (0xD4+0x8)++0x07 line.long 0x00 "DP_AUX_SINKSTATLO_2,AUX Sink Status Low" rgroup.long (0xE4+0x8)++0x07 line.long 0x04 "P_AUX_SINKSTATHI_2,AUX Sink Status High" hexmask.long.word 0x04 0.--15. 0x01 " REG ,Data buffer for sink/link status information" group.long (0xF4+0x8)++0x03 line.long 0x00 "HPD_CONFIG_2,HPD Config" hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME ,HPD line low before unplug" hexmask.long.word 0x00 0.--15. 1. " PLUG_MIN_TIME ,HPD line high before plug" group.long (0x104+0x8)++0x03 line.long 0x00 "HPD_IRQ_CONFIG_2,HPD IRQ Config" hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME ,IRQ minimum time" group.long (0x114+0x8)++0x03 line.long 0x00 "DP_AUX_CONFIG_2,DP AUX Config" hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Sets the wait time (in microseconds)" group.long (0x124+0x8)++0x03 line.long 0x00 "HYBRID_PADCTL_2,Hybrid Pads Control" bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled" bitfld.long 0x00 14. " I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA" else textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 1. " AUX_INPUT_RCV ,AUX CH pad receiver enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MODE ,AUX/I2C pad mode control" "AUX,I2C" group.long (0x134+0x8)++0x03 line.long 0x00 "HYBRID_SPARE_2,Hybrid Spare" sif (cpuis("TEGRAX2")) hexmask.long 0x00 2.--31. 1. " REG ,REG" bitfld.long 0x00 1. " RCV_33_18_SEL ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V" textline " " endif bitfld.long 0x00 0. " PAD_PWR ,Hybrid pad E_PWRD port control" "Power-up,Power-down" group.long (0x04+0xC)++0x03 "REG_3" line.long 0x00 "INTR_EN_AUX_3,Interrupt Enable AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Disabled,Enabled" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Disabled,Enabled" group.long (0x14+0xC)++0x03 line.long 0x00 "INTR_AUX_3,Interrupt AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Not pending,Pending" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Not pending,Pending" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Not pending,Pending" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Not pending,Pending" group.long (0x24+0xC)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W0_3,Data Register Array For DisplayPort Write 0 (Register 3)" group.long (0x34+0xC)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W1_3,Data Register Array For DisplayPort Write 1 (Register 3)" group.long (0x44+0xC)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W2_3,Data Register Array For DisplayPort Write 2 (Register 3)" group.long (0x54+0xC)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W3_3,Data Register Array For DisplayPort Write 3 (Register 3)" rgroup.long (0x64+0xC)++0x03 line.long 0x00 "DP_AUXDATA_READ_W0_3,Data Register Array For DisplayPort Read 0 (Register 3)" rgroup.long (0x74+0xC)++0x03 line.long 0x00 "DP_AUXDATA_READ_W1_3,Data Register Array For DisplayPort Read 1 (Register 3)" rgroup.long (0x84+0xC)++0x03 line.long 0x00 "DP_AUXDATA_READ_W2_3,Data Register Array For DisplayPort Read 2 (Register 3)" rgroup.long (0x94+0xC)++0x03 line.long 0x00 "DP_AUXDATA_READ_W3_3,Data Register Array For DisplayPort Read 3 (Register 3)" group.long (0xA4+0xC)++0x03 line.long 0x00 "DP_AUXADDR_3,Address Register For DisplayPort AUX " hexmask.long.tbyte 0x00 0.--19. 0x01 " REG ,20-bit address register transaction reads from/writes to the sink AUX" group.long (0xB4+0xC)++0x03 line.long 0x00 "DP_AUXCTL_3,Main Control Register For AUX Transactions" bitfld.long 0x00 31. " RST ,AUX channel reset" "Deasserted,Asserted" rbitfld.long 0x00 24.--25. " SEMA_GRANT ,AUX channel obtained" "None,RM,VBIOS,PMU" bitfld.long 0x00 20.--21. " SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU" textline " " bitfld.long 0x00 16. " TRANSACTREQ ,AUX channel transaction request" "Done,Pending" bitfld.long 0x00 12.--15. " CMD ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..." bitfld.long 0x00 8. " ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " CMDLEN ,AUX channel data bytes number" group.long (0xC4+0xC)++0x03 line.long 0x00 "DP_AUXSTAT_3,DP AUX Status" rbitfld.long 0x00 28. " HPD_STATUS ,HPD line state" "Unplugged,Plugged" rbitfld.long 0x00 20.--23. " AUXCTL_STATE ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..." rbitfld.long 0x00 16.--19. " REPLYTYPE ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..." textline " " bitfld.long 0x00 11. " NO_STOP_ERROR ,STOP signal error pending" "Not pending,Pending" bitfld.long 0x00 10. " SINKSTAT_ERROR ,SINKSTAT_ERROR" "Not pending,Pending" bitfld.long 0x00 9. " RX_ERROR ,AUX channel receive error pending" "Not pending,Pending" textline " " bitfld.long 0x00 8. " TIMEOUT_ERROR ,Timeout error pending" "Not pending,Pending" hexmask.long.byte 0x00 0.--7. 1. " REPLY_M , AUX channel transaction receive" rgroup.long (0xD4+0xC)++0x07 line.long 0x00 "DP_AUX_SINKSTATLO_3,AUX Sink Status Low" rgroup.long (0xE4+0xC)++0x07 line.long 0x04 "P_AUX_SINKSTATHI_3,AUX Sink Status High" hexmask.long.word 0x04 0.--15. 0x01 " REG ,Data buffer for sink/link status information" group.long (0xF4+0xC)++0x03 line.long 0x00 "HPD_CONFIG_3,HPD Config" hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME ,HPD line low before unplug" hexmask.long.word 0x00 0.--15. 1. " PLUG_MIN_TIME ,HPD line high before plug" group.long (0x104+0xC)++0x03 line.long 0x00 "HPD_IRQ_CONFIG_3,HPD IRQ Config" hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME ,IRQ minimum time" group.long (0x114+0xC)++0x03 line.long 0x00 "DP_AUX_CONFIG_3,DP AUX Config" hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Sets the wait time (in microseconds)" group.long (0x124+0xC)++0x03 line.long 0x00 "HYBRID_PADCTL_3,Hybrid Pads Control" bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled" bitfld.long 0x00 14. " I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA" else textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 1. " AUX_INPUT_RCV ,AUX CH pad receiver enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MODE ,AUX/I2C pad mode control" "AUX,I2C" group.long (0x134+0xC)++0x03 line.long 0x00 "HYBRID_SPARE_3,Hybrid Spare" sif (cpuis("TEGRAX2")) hexmask.long 0x00 2.--31. 1. " REG ,REG" bitfld.long 0x00 1. " RCV_33_18_SEL ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V" textline " " endif bitfld.long 0x00 0. " PAD_PWR ,Hybrid pad E_PWRD port control" "Power-up,Power-down" sif (cpuis("TEGRAX2")) group.long 0x174++0x07 line.long 0x00 "CTXSW_NEXT_0,Context Switch Register" hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL ,Next requested channel" hexmask.long.word 0x00 0.--9. 1. " NEXT_CLASS ,Next requested class" line.long 0x04 "CTXSW_0,Context Switch Register" hexmask.long.word 0x04 11.--20. 1. " CURR_CHANNEL ,Current working channel" textline " " bitfld.long 0x04 10. " AUTO_ACK ,Automatically acknowledge incoming context" "Manual,Autoack" hexmask.long.word 0x04 0.--9. 1. " CURR_CLASS ,Current working class" group.long (0x17C+0x0)++0x07 "REG_0" line.long 0x00 "HSM_INTR_EN_AUX_0,HSM_INTR_EN_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt for HSM IRQ event" "Disabled,Enabled" group.long (0x18C+0x0)++0x03 line.long 0x00 "HSM_INTR_AUX_0,HSM_INTR_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending" group.long (0x17C+0x4)++0x07 "REG_1" line.long 0x00 "HSM_INTR_EN_AUX_1,HSM_INTR_EN_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt for HSM IRQ event" "Disabled,Enabled" group.long (0x18C+0x4)++0x03 line.long 0x00 "HSM_INTR_AUX_1,HSM_INTR_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending" group.long (0x17C+0x8)++0x07 "REG_2" line.long 0x00 "HSM_INTR_EN_AUX_2,HSM_INTR_EN_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt for HSM IRQ event" "Disabled,Enabled" group.long (0x18C+0x8)++0x03 line.long 0x00 "HSM_INTR_AUX_2,HSM_INTR_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending" group.long (0x17C+0xC)++0x07 "REG_3" line.long 0x00 "HSM_INTR_EN_AUX_3,HSM_INTR_EN_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt for HSM IRQ event" "Disabled,Enabled" group.long (0x18C+0xC)++0x03 line.long 0x00 "HSM_INTR_AUX_3,HSM_INTR_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending" endif width 0x0B tree.end tree "DPAUX1 Registers" base ad:0x54040000 width 25. sif (!cpuis("TEGRAX2")) group.long 0x00++0x03 line.long 0x00 "CTXSW_0,Context Switch Register" rbitfld.long 0x00 28.--31. " NEXT_CHANNEL ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--25. 1. " NEXT_CLASS ,Next requested class" bitfld.long 0x00 12.--15. " CURR_CHANNEL ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 11. " AUTO_ACK ,Automatically acknowledge incoming context" "Manual,Autoack" hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" endif group.long (0x04+0x0)++0x03 "REG_0" line.long 0x00 "INTR_EN_AUX_0,Interrupt Enable AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Disabled,Enabled" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Disabled,Enabled" group.long (0x14+0x0)++0x03 line.long 0x00 "INTR_AUX_0,Interrupt AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Not pending,Pending" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Not pending,Pending" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Not pending,Pending" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Not pending,Pending" group.long (0x24+0x0)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W0_0,Data Register Array For DisplayPort Write 0 (Register 0)" group.long (0x34+0x0)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W1_0,Data Register Array For DisplayPort Write 1 (Register 0)" group.long (0x44+0x0)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W2_0,Data Register Array For DisplayPort Write 2 (Register 0)" group.long (0x54+0x0)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W3_0,Data Register Array For DisplayPort Write 3 (Register 0)" rgroup.long (0x64+0x0)++0x03 line.long 0x00 "DP_AUXDATA_READ_W0_0,Data Register Array For DisplayPort Read 0 (Register 0)" rgroup.long (0x74+0x0)++0x03 line.long 0x00 "DP_AUXDATA_READ_W1_0,Data Register Array For DisplayPort Read 1 (Register 0)" rgroup.long (0x84+0x0)++0x03 line.long 0x00 "DP_AUXDATA_READ_W2_0,Data Register Array For DisplayPort Read 2 (Register 0)" rgroup.long (0x94+0x0)++0x03 line.long 0x00 "DP_AUXDATA_READ_W3_0,Data Register Array For DisplayPort Read 3 (Register 0)" group.long (0xA4+0x0)++0x03 line.long 0x00 "DP_AUXADDR_0,Address Register For DisplayPort AUX " hexmask.long.tbyte 0x00 0.--19. 0x01 " REG ,20-bit address register transaction reads from/writes to the sink AUX" group.long (0xB4+0x0)++0x03 line.long 0x00 "DP_AUXCTL_0,Main Control Register For AUX Transactions" bitfld.long 0x00 31. " RST ,AUX channel reset" "Deasserted,Asserted" rbitfld.long 0x00 24.--25. " SEMA_GRANT ,AUX channel obtained" "None,RM,VBIOS,PMU" bitfld.long 0x00 20.--21. " SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU" textline " " bitfld.long 0x00 16. " TRANSACTREQ ,AUX channel transaction request" "Done,Pending" bitfld.long 0x00 12.--15. " CMD ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..." bitfld.long 0x00 8. " ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " CMDLEN ,AUX channel data bytes number" group.long (0xC4+0x0)++0x03 line.long 0x00 "DP_AUXSTAT_0,DP AUX Status" rbitfld.long 0x00 28. " HPD_STATUS ,HPD line state" "Unplugged,Plugged" rbitfld.long 0x00 20.--23. " AUXCTL_STATE ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..." rbitfld.long 0x00 16.--19. " REPLYTYPE ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..." textline " " bitfld.long 0x00 11. " NO_STOP_ERROR ,STOP signal error pending" "Not pending,Pending" bitfld.long 0x00 10. " SINKSTAT_ERROR ,SINKSTAT_ERROR" "Not pending,Pending" bitfld.long 0x00 9. " RX_ERROR ,AUX channel receive error pending" "Not pending,Pending" textline " " bitfld.long 0x00 8. " TIMEOUT_ERROR ,Timeout error pending" "Not pending,Pending" hexmask.long.byte 0x00 0.--7. 1. " REPLY_M , AUX channel transaction receive" rgroup.long (0xD4+0x0)++0x07 line.long 0x00 "DP_AUX_SINKSTATLO_0,AUX Sink Status Low" rgroup.long (0xE4+0x0)++0x07 line.long 0x04 "P_AUX_SINKSTATHI_0,AUX Sink Status High" hexmask.long.word 0x04 0.--15. 0x01 " REG ,Data buffer for sink/link status information" group.long (0xF4+0x0)++0x03 line.long 0x00 "HPD_CONFIG_0,HPD Config" hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME ,HPD line low before unplug" hexmask.long.word 0x00 0.--15. 1. " PLUG_MIN_TIME ,HPD line high before plug" group.long (0x104+0x0)++0x03 line.long 0x00 "HPD_IRQ_CONFIG_0,HPD IRQ Config" hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME ,IRQ minimum time" group.long (0x114+0x0)++0x03 line.long 0x00 "DP_AUX_CONFIG_0,DP AUX Config" hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Sets the wait time (in microseconds)" group.long (0x124+0x0)++0x03 line.long 0x00 "HYBRID_PADCTL_0,Hybrid Pads Control" bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled" bitfld.long 0x00 14. " I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA" else textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 1. " AUX_INPUT_RCV ,AUX CH pad receiver enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MODE ,AUX/I2C pad mode control" "AUX,I2C" group.long (0x134+0x0)++0x03 line.long 0x00 "HYBRID_SPARE_0,Hybrid Spare" sif (cpuis("TEGRAX2")) hexmask.long 0x00 2.--31. 1. " REG ,REG" bitfld.long 0x00 1. " RCV_33_18_SEL ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V" textline " " endif bitfld.long 0x00 0. " PAD_PWR ,Hybrid pad E_PWRD port control" "Power-up,Power-down" group.long (0x04+0x4)++0x03 "REG_1" line.long 0x00 "INTR_EN_AUX_1,Interrupt Enable AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Disabled,Enabled" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Disabled,Enabled" group.long (0x14+0x4)++0x03 line.long 0x00 "INTR_AUX_1,Interrupt AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Not pending,Pending" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Not pending,Pending" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Not pending,Pending" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Not pending,Pending" group.long (0x24+0x4)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W0_1,Data Register Array For DisplayPort Write 0 (Register 1)" group.long (0x34+0x4)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W1_1,Data Register Array For DisplayPort Write 1 (Register 1)" group.long (0x44+0x4)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W2_1,Data Register Array For DisplayPort Write 2 (Register 1)" group.long (0x54+0x4)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W3_1,Data Register Array For DisplayPort Write 3 (Register 1)" rgroup.long (0x64+0x4)++0x03 line.long 0x00 "DP_AUXDATA_READ_W0_1,Data Register Array For DisplayPort Read 0 (Register 1)" rgroup.long (0x74+0x4)++0x03 line.long 0x00 "DP_AUXDATA_READ_W1_1,Data Register Array For DisplayPort Read 1 (Register 1)" rgroup.long (0x84+0x4)++0x03 line.long 0x00 "DP_AUXDATA_READ_W2_1,Data Register Array For DisplayPort Read 2 (Register 1)" rgroup.long (0x94+0x4)++0x03 line.long 0x00 "DP_AUXDATA_READ_W3_1,Data Register Array For DisplayPort Read 3 (Register 1)" group.long (0xA4+0x4)++0x03 line.long 0x00 "DP_AUXADDR_1,Address Register For DisplayPort AUX " hexmask.long.tbyte 0x00 0.--19. 0x01 " REG ,20-bit address register transaction reads from/writes to the sink AUX" group.long (0xB4+0x4)++0x03 line.long 0x00 "DP_AUXCTL_1,Main Control Register For AUX Transactions" bitfld.long 0x00 31. " RST ,AUX channel reset" "Deasserted,Asserted" rbitfld.long 0x00 24.--25. " SEMA_GRANT ,AUX channel obtained" "None,RM,VBIOS,PMU" bitfld.long 0x00 20.--21. " SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU" textline " " bitfld.long 0x00 16. " TRANSACTREQ ,AUX channel transaction request" "Done,Pending" bitfld.long 0x00 12.--15. " CMD ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..." bitfld.long 0x00 8. " ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " CMDLEN ,AUX channel data bytes number" group.long (0xC4+0x4)++0x03 line.long 0x00 "DP_AUXSTAT_1,DP AUX Status" rbitfld.long 0x00 28. " HPD_STATUS ,HPD line state" "Unplugged,Plugged" rbitfld.long 0x00 20.--23. " AUXCTL_STATE ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..." rbitfld.long 0x00 16.--19. " REPLYTYPE ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..." textline " " bitfld.long 0x00 11. " NO_STOP_ERROR ,STOP signal error pending" "Not pending,Pending" bitfld.long 0x00 10. " SINKSTAT_ERROR ,SINKSTAT_ERROR" "Not pending,Pending" bitfld.long 0x00 9. " RX_ERROR ,AUX channel receive error pending" "Not pending,Pending" textline " " bitfld.long 0x00 8. " TIMEOUT_ERROR ,Timeout error pending" "Not pending,Pending" hexmask.long.byte 0x00 0.--7. 1. " REPLY_M , AUX channel transaction receive" rgroup.long (0xD4+0x4)++0x07 line.long 0x00 "DP_AUX_SINKSTATLO_1,AUX Sink Status Low" rgroup.long (0xE4+0x4)++0x07 line.long 0x04 "P_AUX_SINKSTATHI_1,AUX Sink Status High" hexmask.long.word 0x04 0.--15. 0x01 " REG ,Data buffer for sink/link status information" group.long (0xF4+0x4)++0x03 line.long 0x00 "HPD_CONFIG_1,HPD Config" hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME ,HPD line low before unplug" hexmask.long.word 0x00 0.--15. 1. " PLUG_MIN_TIME ,HPD line high before plug" group.long (0x104+0x4)++0x03 line.long 0x00 "HPD_IRQ_CONFIG_1,HPD IRQ Config" hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME ,IRQ minimum time" group.long (0x114+0x4)++0x03 line.long 0x00 "DP_AUX_CONFIG_1,DP AUX Config" hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Sets the wait time (in microseconds)" group.long (0x124+0x4)++0x03 line.long 0x00 "HYBRID_PADCTL_1,Hybrid Pads Control" bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled" bitfld.long 0x00 14. " I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA" else textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 1. " AUX_INPUT_RCV ,AUX CH pad receiver enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MODE ,AUX/I2C pad mode control" "AUX,I2C" group.long (0x134+0x4)++0x03 line.long 0x00 "HYBRID_SPARE_1,Hybrid Spare" sif (cpuis("TEGRAX2")) hexmask.long 0x00 2.--31. 1. " REG ,REG" bitfld.long 0x00 1. " RCV_33_18_SEL ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V" textline " " endif bitfld.long 0x00 0. " PAD_PWR ,Hybrid pad E_PWRD port control" "Power-up,Power-down" group.long (0x04+0x8)++0x03 "REG_2" line.long 0x00 "INTR_EN_AUX_2,Interrupt Enable AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Disabled,Enabled" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Disabled,Enabled" group.long (0x14+0x8)++0x03 line.long 0x00 "INTR_AUX_2,Interrupt AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Not pending,Pending" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Not pending,Pending" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Not pending,Pending" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Not pending,Pending" group.long (0x24+0x8)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W0_2,Data Register Array For DisplayPort Write 0 (Register 2)" group.long (0x34+0x8)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W1_2,Data Register Array For DisplayPort Write 1 (Register 2)" group.long (0x44+0x8)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W2_2,Data Register Array For DisplayPort Write 2 (Register 2)" group.long (0x54+0x8)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W3_2,Data Register Array For DisplayPort Write 3 (Register 2)" rgroup.long (0x64+0x8)++0x03 line.long 0x00 "DP_AUXDATA_READ_W0_2,Data Register Array For DisplayPort Read 0 (Register 2)" rgroup.long (0x74+0x8)++0x03 line.long 0x00 "DP_AUXDATA_READ_W1_2,Data Register Array For DisplayPort Read 1 (Register 2)" rgroup.long (0x84+0x8)++0x03 line.long 0x00 "DP_AUXDATA_READ_W2_2,Data Register Array For DisplayPort Read 2 (Register 2)" rgroup.long (0x94+0x8)++0x03 line.long 0x00 "DP_AUXDATA_READ_W3_2,Data Register Array For DisplayPort Read 3 (Register 2)" group.long (0xA4+0x8)++0x03 line.long 0x00 "DP_AUXADDR_2,Address Register For DisplayPort AUX " hexmask.long.tbyte 0x00 0.--19. 0x01 " REG ,20-bit address register transaction reads from/writes to the sink AUX" group.long (0xB4+0x8)++0x03 line.long 0x00 "DP_AUXCTL_2,Main Control Register For AUX Transactions" bitfld.long 0x00 31. " RST ,AUX channel reset" "Deasserted,Asserted" rbitfld.long 0x00 24.--25. " SEMA_GRANT ,AUX channel obtained" "None,RM,VBIOS,PMU" bitfld.long 0x00 20.--21. " SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU" textline " " bitfld.long 0x00 16. " TRANSACTREQ ,AUX channel transaction request" "Done,Pending" bitfld.long 0x00 12.--15. " CMD ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..." bitfld.long 0x00 8. " ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " CMDLEN ,AUX channel data bytes number" group.long (0xC4+0x8)++0x03 line.long 0x00 "DP_AUXSTAT_2,DP AUX Status" rbitfld.long 0x00 28. " HPD_STATUS ,HPD line state" "Unplugged,Plugged" rbitfld.long 0x00 20.--23. " AUXCTL_STATE ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..." rbitfld.long 0x00 16.--19. " REPLYTYPE ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..." textline " " bitfld.long 0x00 11. " NO_STOP_ERROR ,STOP signal error pending" "Not pending,Pending" bitfld.long 0x00 10. " SINKSTAT_ERROR ,SINKSTAT_ERROR" "Not pending,Pending" bitfld.long 0x00 9. " RX_ERROR ,AUX channel receive error pending" "Not pending,Pending" textline " " bitfld.long 0x00 8. " TIMEOUT_ERROR ,Timeout error pending" "Not pending,Pending" hexmask.long.byte 0x00 0.--7. 1. " REPLY_M , AUX channel transaction receive" rgroup.long (0xD4+0x8)++0x07 line.long 0x00 "DP_AUX_SINKSTATLO_2,AUX Sink Status Low" rgroup.long (0xE4+0x8)++0x07 line.long 0x04 "P_AUX_SINKSTATHI_2,AUX Sink Status High" hexmask.long.word 0x04 0.--15. 0x01 " REG ,Data buffer for sink/link status information" group.long (0xF4+0x8)++0x03 line.long 0x00 "HPD_CONFIG_2,HPD Config" hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME ,HPD line low before unplug" hexmask.long.word 0x00 0.--15. 1. " PLUG_MIN_TIME ,HPD line high before plug" group.long (0x104+0x8)++0x03 line.long 0x00 "HPD_IRQ_CONFIG_2,HPD IRQ Config" hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME ,IRQ minimum time" group.long (0x114+0x8)++0x03 line.long 0x00 "DP_AUX_CONFIG_2,DP AUX Config" hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Sets the wait time (in microseconds)" group.long (0x124+0x8)++0x03 line.long 0x00 "HYBRID_PADCTL_2,Hybrid Pads Control" bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled" bitfld.long 0x00 14. " I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA" else textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 1. " AUX_INPUT_RCV ,AUX CH pad receiver enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MODE ,AUX/I2C pad mode control" "AUX,I2C" group.long (0x134+0x8)++0x03 line.long 0x00 "HYBRID_SPARE_2,Hybrid Spare" sif (cpuis("TEGRAX2")) hexmask.long 0x00 2.--31. 1. " REG ,REG" bitfld.long 0x00 1. " RCV_33_18_SEL ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V" textline " " endif bitfld.long 0x00 0. " PAD_PWR ,Hybrid pad E_PWRD port control" "Power-up,Power-down" group.long (0x04+0xC)++0x03 "REG_3" line.long 0x00 "INTR_EN_AUX_3,Interrupt Enable AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Disabled,Enabled" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Disabled,Enabled" group.long (0x14+0xC)++0x03 line.long 0x00 "INTR_AUX_3,Interrupt AUX" bitfld.long 0x00 3. " AUX_DONE ,AUX transaction interrupt" "Not pending,Pending" bitfld.long 0x00 2. " IRQ_EVENT ,Interrupt request" "Not pending,Pending" bitfld.long 0x00 1. " UNPLUG_EVENT ,HPD line high" "Not pending,Pending" textline " " bitfld.long 0x00 0. " PLUG_EVENT ,HPD line low" "Not pending,Pending" group.long (0x24+0xC)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W0_3,Data Register Array For DisplayPort Write 0 (Register 3)" group.long (0x34+0xC)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W1_3,Data Register Array For DisplayPort Write 1 (Register 3)" group.long (0x44+0xC)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W2_3,Data Register Array For DisplayPort Write 2 (Register 3)" group.long (0x54+0xC)++0x03 line.long 0x00 "DP_AUXDATA_WRITE_W3_3,Data Register Array For DisplayPort Write 3 (Register 3)" rgroup.long (0x64+0xC)++0x03 line.long 0x00 "DP_AUXDATA_READ_W0_3,Data Register Array For DisplayPort Read 0 (Register 3)" rgroup.long (0x74+0xC)++0x03 line.long 0x00 "DP_AUXDATA_READ_W1_3,Data Register Array For DisplayPort Read 1 (Register 3)" rgroup.long (0x84+0xC)++0x03 line.long 0x00 "DP_AUXDATA_READ_W2_3,Data Register Array For DisplayPort Read 2 (Register 3)" rgroup.long (0x94+0xC)++0x03 line.long 0x00 "DP_AUXDATA_READ_W3_3,Data Register Array For DisplayPort Read 3 (Register 3)" group.long (0xA4+0xC)++0x03 line.long 0x00 "DP_AUXADDR_3,Address Register For DisplayPort AUX " hexmask.long.tbyte 0x00 0.--19. 0x01 " REG ,20-bit address register transaction reads from/writes to the sink AUX" group.long (0xB4+0xC)++0x03 line.long 0x00 "DP_AUXCTL_3,Main Control Register For AUX Transactions" bitfld.long 0x00 31. " RST ,AUX channel reset" "Deasserted,Asserted" rbitfld.long 0x00 24.--25. " SEMA_GRANT ,AUX channel obtained" "None,RM,VBIOS,PMU" bitfld.long 0x00 20.--21. " SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU" textline " " bitfld.long 0x00 16. " TRANSACTREQ ,AUX channel transaction request" "Done,Pending" bitfld.long 0x00 12.--15. " CMD ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..." bitfld.long 0x00 8. " ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " CMDLEN ,AUX channel data bytes number" group.long (0xC4+0xC)++0x03 line.long 0x00 "DP_AUXSTAT_3,DP AUX Status" rbitfld.long 0x00 28. " HPD_STATUS ,HPD line state" "Unplugged,Plugged" rbitfld.long 0x00 20.--23. " AUXCTL_STATE ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..." rbitfld.long 0x00 16.--19. " REPLYTYPE ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..." textline " " bitfld.long 0x00 11. " NO_STOP_ERROR ,STOP signal error pending" "Not pending,Pending" bitfld.long 0x00 10. " SINKSTAT_ERROR ,SINKSTAT_ERROR" "Not pending,Pending" bitfld.long 0x00 9. " RX_ERROR ,AUX channel receive error pending" "Not pending,Pending" textline " " bitfld.long 0x00 8. " TIMEOUT_ERROR ,Timeout error pending" "Not pending,Pending" hexmask.long.byte 0x00 0.--7. 1. " REPLY_M , AUX channel transaction receive" rgroup.long (0xD4+0xC)++0x07 line.long 0x00 "DP_AUX_SINKSTATLO_3,AUX Sink Status Low" rgroup.long (0xE4+0xC)++0x07 line.long 0x04 "P_AUX_SINKSTATHI_3,AUX Sink Status High" hexmask.long.word 0x04 0.--15. 0x01 " REG ,Data buffer for sink/link status information" group.long (0xF4+0xC)++0x03 line.long 0x00 "HPD_CONFIG_3,HPD Config" hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME ,HPD line low before unplug" hexmask.long.word 0x00 0.--15. 1. " PLUG_MIN_TIME ,HPD line high before plug" group.long (0x104+0xC)++0x03 line.long 0x00 "HPD_IRQ_CONFIG_3,HPD IRQ Config" hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME ,IRQ minimum time" group.long (0x114+0xC)++0x03 line.long 0x00 "DP_AUX_CONFIG_3,DP AUX Config" hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Sets the wait time (in microseconds)" group.long (0x124+0xC)++0x03 line.long 0x00 "HYBRID_PADCTL_3,Hybrid Pads Control" bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled" bitfld.long 0x00 14. " I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA" else textline " " bitfld.long 0x00 12.--13. " AUX_CMH ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V" bitfld.long 0x00 8.--10. " AUX_DRVZ ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34" bitfld.long 0x00 2.--7. " AUX_DRVI ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif textline " " bitfld.long 0x00 1. " AUX_INPUT_RCV ,AUX CH pad receiver enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MODE ,AUX/I2C pad mode control" "AUX,I2C" group.long (0x134+0xC)++0x03 line.long 0x00 "HYBRID_SPARE_3,Hybrid Spare" sif (cpuis("TEGRAX2")) hexmask.long 0x00 2.--31. 1. " REG ,REG" bitfld.long 0x00 1. " RCV_33_18_SEL ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V" textline " " endif bitfld.long 0x00 0. " PAD_PWR ,Hybrid pad E_PWRD port control" "Power-up,Power-down" sif (cpuis("TEGRAX2")) group.long 0x174++0x07 line.long 0x00 "CTXSW_NEXT_0,Context Switch Register" hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL ,Next requested channel" hexmask.long.word 0x00 0.--9. 1. " NEXT_CLASS ,Next requested class" line.long 0x04 "CTXSW_0,Context Switch Register" hexmask.long.word 0x04 11.--20. 1. " CURR_CHANNEL ,Current working channel" textline " " bitfld.long 0x04 10. " AUTO_ACK ,Automatically acknowledge incoming context" "Manual,Autoack" hexmask.long.word 0x04 0.--9. 1. " CURR_CLASS ,Current working class" group.long (0x17C+0x0)++0x07 "REG_0" line.long 0x00 "HSM_INTR_EN_AUX_0,HSM_INTR_EN_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt for HSM IRQ event" "Disabled,Enabled" group.long (0x18C+0x0)++0x03 line.long 0x00 "HSM_INTR_AUX_0,HSM_INTR_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending" group.long (0x17C+0x4)++0x07 "REG_1" line.long 0x00 "HSM_INTR_EN_AUX_1,HSM_INTR_EN_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt for HSM IRQ event" "Disabled,Enabled" group.long (0x18C+0x4)++0x03 line.long 0x00 "HSM_INTR_AUX_1,HSM_INTR_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending" group.long (0x17C+0x8)++0x07 "REG_2" line.long 0x00 "HSM_INTR_EN_AUX_2,HSM_INTR_EN_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt for HSM IRQ event" "Disabled,Enabled" group.long (0x18C+0x8)++0x03 line.long 0x00 "HSM_INTR_AUX_2,HSM_INTR_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending" group.long (0x17C+0xC)++0x07 "REG_3" line.long 0x00 "HSM_INTR_EN_AUX_3,HSM_INTR_EN_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt for HSM IRQ event" "Disabled,Enabled" group.long (0x18C+0xC)++0x03 line.long 0x00 "HSM_INTR_AUX_3,HSM_INTR_AUX_0" bitfld.long 0x00 0. " IRQ_EVENT ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending" endif width 0x0B tree.end tree.end tree "HDMI CEC" base ad:0x70015000 width 16. group.long 0x00++0x0B line.long 0x00 "SW_CONTROL_0,Software Control Mode 0" bitfld.long 0x00 31. " MODE ,Mode" "Disabled,Enabled" rbitfld.long 0x00 4. " FILTERED_RX_DATA_PIN ,Filtrated RX data pin" "Not filtrated,Filtrated" rbitfld.long 0x00 0. " RAW_INPUT_DATA_PIN ,Raw input data pin" "0,1" line.long 0x04 "HW_CONTROL_0,Hardware Control Mode 0" bitfld.long 0x04 31. " TX_RX_MODE ,TX/RX mode" "Disabled,Enabled" bitfld.long 0x04 30. " FAST_SIM_MODE ,Fast sim mode" "Disabled,Enabled" bitfld.long 0x04 24. " TX_NAK_MODE ,TX not acknowledge mode" "Block,Frame" textline " " bitfld.long 0x04 16. " RX_NAK_MODE ,RX not acknowledge mode" "Block,Frame" bitfld.long 0x04 15. " RX_SNOOP ,RX snoop" "Disabled,Enabled" hexmask.long.word 0x04 0.--14. 0x01 " RX_LOGICAL_ADDRS ,RX logical address" line.long 0x08 "INPUT_FILTER_0,Input Filter 0" bitfld.long 0x08 31. " MODE ,Mode" "Disabled,Enabled" bitfld.long 0x08 0.--5. " FIFO_LENGTH ,FIFO length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif (!cpuis("TEGRAX2")) hgroup.long 0x0C++0x03 hide.long 0x00 "SPARE_0,Spare register for future use" endif group.long 0x10++0x03 line.long 0x00 "TX_REGISTER_0,TX Register 0" bitfld.long 0x00 17. " RETRY_FRAME ,Retry frame indicator" "Not retry,Retry" bitfld.long 0x00 16. " GENERATE_START_BIT ,Generate start bit" "Not generated,Generated" textline " " bitfld.long 0x00 12. " ADDRESS_MODE ,Hardware direct/broadcast address" "Direct,Broadcast" bitfld.long 0x00 8. " EOM ,End of message" "Not end,End" hexmask.long.byte 0x00 0.--7. 1. " DATA ,8 bit address/data transmission" rgroup.long 0x14++0x03 line.long 0x00 "RX_REGISTER_0,RX Register 0" bitfld.long 0x00 9. " ACK_NAK ,Acknowledge/Not acknowledge bus read" "Acknowledged,Not acknowledged" bitfld.long 0x00 8. " EOM ,End of message bus read" "0,1" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Bus read data bits" group.long 0x18++0x07 line.long 0x00 "RX_TIMING_0_0,RX Timing Register 0" hexmask.long.byte 0x00 24.--31. 1. " RX_START_BIT_MIN_DURATION ,RX start bit minimum duration" hexmask.long.byte 0x00 16.--23. 1. " RX_START_BIT_MAX_DURATION ,RX start bit maximum duration" textline " " hexmask.long.byte 0x00 8.--15. 1. " RX_START_BIT_MIN_LO_TIME ,RX start bit minimum low time" hexmask.long.byte 0x00 0.--7. 1. " RX_START_BIT_MAX_LO_TIME ,RX start bit maximum low time" line.long 0x04 "RX_TIMING_1_0,RX Timing Register 1" hexmask.long.byte 0x04 24.--31. 1. " RX_START_BIT_MIN_DURATION ,RX start bit minimum duration" hexmask.long.byte 0x04 16.--23. 1. " RX_START_BIT_MAX_DURATION ,RX start bit maximum duration" textline " " hexmask.long.byte 0x04 8.--15. 1. " RX_START_BIT_MIN_LO_TIME ,RX start bit minimum low time" hexmask.long.byte 0x04 0.--7. 1. " RX_START_BIT_MAX_LO_TIME ,RX start bit maximum low time" group.long 0x20++0x03 line.long 0x00 "RX_TIMING_2_0,RX Timing Register 2" hexmask.long.byte 0x00 0.--7. 1. " RX_END_OF_BLOCK_TIME ,RX end of block time" group.long 0x24++0x07 line.long 0x00 "TX_TIMING_0_0,TX Timing Register 0" hexmask.long.byte 0x00 24.--31. 1. " TX_BUS_ERROR_LO_TIME ,TX bus error low time" textline " " bitfld.long 0x00 16.--19. " TX_BUS_XITION_TIME ,TX bus xition time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_START_BIT_DURATION ,TX start bit duration" hexmask.long.byte 0x00 0.--7. 1. " TX_START_BIT_LO_TIME ,TX start bit low time" line.long 0x04 "TX_TIMING_1_0,TX Timing Register 1" hexmask.long.byte 0x04 24.--31. 1. " TX_ACK_NAK_BIT_SAMPLE_TIME ,TX ACK/NAK bit sample time" hexmask.long.byte 0x04 16.--23. 1. " TX_DATA_BIT_DURATION ,TX data bit duration" textline " " hexmask.long.byte 0x04 8.--15. 1. " TX_HI_DATA_BIT_LO_TIME ,TX high data bit low time" hexmask.long.byte 0x04 0.--7. 1. " TX_LO_DATA_BIT_LO_TIME ,TX low data bit low time" group.long 0x2C++0x0B line.long 0x00 "TX_TIMING_2_0,TX Timing Register 2" bitfld.long 0x00 8.--11. " BUS_IDLE_TIME_RETRY_FRAME ,Bus idle time retry frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " BUS_IDLE_TIME_NEW_FRAME ,Bus idle time new frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " BUS_IDLE_TIME_ADDITIONAL_FRAME ,Bus idle time additional frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "INT_STAT_0,Interrupt Status 0" bitfld.long 0x04 14. " FILTERED_RX_DATA_PIN_TRANSITION_L2H ,Filtrated RX data pin transition low to high" "No interrupt,Interrupt" bitfld.long 0x04 13. " FILTERED_RX_DATA_PIN_TRANSITION_H2L ,Filtrated RX data pin transition high to low" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " RX_BUS_ERROR_DETECTED ,RX bus error detected" "No interrupt,Interrupt" bitfld.long 0x04 11. " RX_BUS_ANOMALY_DETECTED ,RX bus anomaly detected" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " RX_START_BIT_DETECTED ,RX start bit detected" "No interrupt,Interrupt" bitfld.long 0x04 9. " RX_REGISTER_OVERRUN ,RX register overrun" "No interrupt,Interrupt" textline " " bitfld.long 0x04 8. " RX_REGISTER_FULL ,RX register full" "No interrupt,Interrupt" bitfld.long 0x04 5. " TX_FRAME_TRANSMITTED ,TX frame transmitted" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " TX_BUS_ANOMALY_DETECTED ,TX bus anomaly detected" "No interrupt,Interrupt" bitfld.long 0x04 3. " TX_ARBITRATION_FAILED ,TX arbitration failed" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " TX_FRAME_OR_BLOCK_NAKD ,TX frame or block not acknowledge" "No interrupt,Interrupt" bitfld.long 0x04 1. " TX_REGISTER_UNDERRUN ,TX register error occur" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " TX_REGISTER_EMPTY ,TX register empty" "No interrupt,Interrupt" line.long 0x08 "INT_MASK_0,Interrupt Mask 0" bitfld.long 0x08 14. " FILTERED_RX_DATA_PIN_TRANSITION_L2H ,Filtrated RX data pin transition low to high mask" "Disabled,Enabled" bitfld.long 0x08 13. " FILTERED_RX_DATA_PIN_TRANSITION_H2L ,Filtrated RX data pin transition high to low mask" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " RX_BUS_ERROR_DETECTED ,RX bus error detected mask" "Disabled,Enabled" bitfld.long 0x08 11. " RX_BUS_ANOMALY_DETECTED ,RX bus anomaly detected mask" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " RX_START_BIT_DETECTED ,RX start bit detected mask" "Disabled,Enabled" bitfld.long 0x08 9. " RX_REGISTER_OVERRUN ,RX register overrun mask" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " RX_REGISTER_FULL ,RX register full mask" "Disabled,Enabled" bitfld.long 0x08 5. " TX_FRAME_TRANSMITTED ,TX frame transmitted mask" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " TX_BUS_ANOMALY_DETECTED ,TX bus anomaly detected mask" "Disabled,Enabled" bitfld.long 0x08 3. " TX_ARBITRATION_FAILED ,TX arbitration failed mask" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " TX_FRAME_OR_BLOCK_NAKD ,TX frame or block not acknowledge mask" "Disabled,Enabled" bitfld.long 0x08 1. " TX_REGISTER_UNDERRUN ,TX register error occur mask" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " TX_REGISTER_EMPTY ,TX register empty mask" "Disabled,Enabled" rgroup.long 0x38++0x07 line.long 0x00 "HW_DEBUG_RX_0,Hardware Debug RX 0" bitfld.long 0x00 27. " RXDATABIT_SAMPLE_TIMER ,RX data bit sample timer" "0,1" bitfld.long 0x00 26. " LOGICADDR_MATCH ,Logic address match" "Not matched,Matched" textline " " bitfld.long 0x00 25. " FORCELOOUT ,Force low out" "Not forced,Forced" bitfld.long 0x00 21.--24. " STATE ,State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 17.--20. " RXBIT_COUNT ,RX bit count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 0.--16. 1. " DURATION_COUNT ,Duration count" line.long 0x04 "HW_DEBUG_TX_0,Hardware Debug TX 0" bitfld.long 0x04 26. " TXDATABIT_SAMPLE_TIMER ,TX data bit sample timer" "Not matched,Matched" bitfld.long 0x04 25. " FORCELOOUT ,Force low out" "Not forced,Forced" textline " " bitfld.long 0x04 21.--24. " STATE ,State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 17.--20. " TXBIT_COUNT ,TX bit count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.tbyte 0x04 0.--16. 1. " DURATION_COUNT ,Duration count" hgroup.long 0x40++0x03 hide.long 0x00 "HW_SPARE_0_0,Hardware Spare 0" width 0x0B tree.end tree "MIPI-CSI Camera serial interface" base ad:0x54080000 tree "CSI" width 33. tree "Sensor A" group.long (0x838+0x0)++0x1B line.long 0x00 "INPUT_STREAM_A_CONTROL_0,CSI Input Stream A Control" hexmask.long.word 0x00 16.--24. 1. " CSI_A_SKIP_PACKET_THRESHOLD ,CSI-A Skip Packet Threshold" bitfld.long 0x00 4. " A_SKIP_PACKET_THRESHOLD_ENABLE ,Enables skip packet threshold feature" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " A_BYPASS_ALIGN ,Bypass aligning CSIA and CSIB lanes" "Not bypassed,Bypassed" bitfld.long 0x00 0.--1. " A_DATA_LANE ,CSI-A Data Lane" "1 data lane,2 data lanes,3 data lanes,4 data lanes" line.long 0x04 "PIXEL_STREAM_A_CONTROL0_0,CSI Pixel Stream A Control 0" bitfld.long 0x04 28.--29. " PPA_PAD_FRAME ,CSI Pixel Parser A Pad Frame" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 27. " PPA_HEADER_EC_ENABLE ,CSI Pixel Parser A Packet Header Error Correction Enable" "Enable,Disable" textline " " bitfld.long 0x04 24.--25. " PPA_PAD_SHORT_LINE ,CSI Pixel Parser A Pad Short Line" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 20.--21. " PPA_EMBEDDED_DATA_OPTIONS ,CSI Pixel Parser A Embedded Data Options" "Discard,Embedded,?..." textline " " bitfld.long 0x04 16.--19. " PPA_OUTPUT_FORMAT_OPTIONS ,CSI Pixel Parser A Output Format Options" "Arbitrary,Pixel,Pixel_Rep,Store,?..." bitfld.long 0x04 8. " PPA_WC_CHECK ,CSI Pixel Parser A Data WC Check" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PPA_CRC_CHECK ,CSI Pixel Parser A Data CRC Check" "Disabled,Enabled" bitfld.long 0x04 6. " PPA_WORD_COUNT_SELECT ,CSI Pixel Parser A Word Count Select" "REGISTER,HEADER" textline " " bitfld.long 0x04 5. " PPA_DATA_IDENTIFIER ,CSI Pixel Parser A Data Identifier byte processing" "Disabled,Enabled" bitfld.long 0x04 4. " PPA_PACKET_HEADER ,CSI Pixel Parser A Packet Header processing" "Not sent,Sent" textline " " bitfld.long 0x04 0.--2. " PPA_STREAM_SOURCE ,CSI Pixel Parser A Stream Source Host" "CSI Interface A,CSI Interface B,?..." line.long 0x08 "PIXEL_STREAM_A_CONTROL1_0,CSI Pixel Stream A Control 1" bitfld.long 0x08 4.--7. " PPA_TOP_FIELD_FRAME_MASK ,CSI Pixel Parser A Top Field Frame Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " PPA_TOP_FIELD_FRAME ,CSI Pixel Parser A Top Field Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PIXEL_STREAM_A_GAP_0,CSI Pixel Stream A Gap" hexmask.long.word 0x0C 16.--31. 1. " PPA_FRAME_MIN_GAP ,Minimum number of viclk cycles from end of frame to start of next frame" hexmask.long.word 0x0C 0.--15. 1. " PPA_LINE_MIN_GAP ,Minimum number of viclk cycles from end of previous line to start of next line" line.long 0x10 "PIXEL_STREAM_PPA_COMMAND_0,CSI Pixel Parser A Command" bitfld.long 0x10 12.--15. " PPA_START_MARKER_FRAME_MAX ,CSI Pixel Parser A Start Marker Maximum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " PPA_START_MARKER_FRAME_MIN ,CSI Pixel Parser A Start Marker Minimum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4. " PPA_VSYNC_START_MARKER ,CSI Pixel Parser A VSYNC Start Marker" "FSPKT,VSYNC" bitfld.long 0x10 2. " PPA_SINGLE_SHOT ,CSI Pixel Parser A Single Shot Mode" "Disabled,Enabled" textline " " bitfld.long 0x10 0.--1. " PPA_ENABLE ,CSI Pixel Parser A Enable" "No operation,Enabled,Disabled,RST" line.long 0x14 "PIXEL_STREAM_A_EXPECTED_FRAME_0,CSI Pixel Stream A Expected Frame" hexmask.long.word 0x14 4.--15. 1. " PPA_MAX_CLOCKS ,Maximum Number of viclk clock cycles between line start requests" bitfld.long 0x14 0. " PPA_ENABLE_LINE_TIMEOUT ,PPA_ENABLE_LINE_TIMEOUT" "Disabled,Enabled" line.long 0x18 "PIXEL_PARSER_A_INTERRUPT_MASK_0,CSI Pixel Parser A Interrupt Mask" bitfld.long 0x18 14. " HPA_UNC_HDR_ERR_INT_MASK ,Interrupt Mask for HPA_UNC_HDR_ERR" "Disabled,Enabled" bitfld.long 0x18 10. " PPA_SPARE_STATUS_1_INT_MASK ,Interrupt Mask for PPA_SPARE_STATUS_1" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " PPA_INTERFRAME_LINE_INT_MASK ,Interrupt Mask for PPA_INTERFRAME_LINE" "Disabled,Enabled" bitfld.long 0x18 8. " PPA_EXTRA_SF_INT_MASK ,Interrupt Mask for PPA_EXTRA_SF" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " PPA_SHORT_FRAME_INT_MASK ,Interrupt Mask for PPA_SHORT_FRAME" "Disabled,Enabled" bitfld.long 0x18 6. " PPA_STMERR_INT_MASK ,Interrupt Mask for PPA_STMERR" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " PPA_FIFO_OVRF_INT_MASK ,Interrupt Mask for PPA_FIFO_OVRF" "Disabled,Enabled" bitfld.long 0x18 4. " PPA_PL_CRC_ERR_INT_MASK ,Interrupt Mask for PPA_PL_CRC_ERR" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " PPA_SL_PKT_DROPPED_INT_MASK ,Interrupt Mask for PPA_SL_PKT_DROPPED" "Disabled,Enabled" bitfld.long 0x18 2. " PPA_SL_PROCESSED_INT_MASK ,Interrupt Mask for PPA_SL_PROCESSED" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PPA_ILL_WD_CNT_INT_MASK ,Interrupt Mask for PPA_ILL_WD_CNT" "Disabled,Enabled" bitfld.long 0x18 0. " PPA_HDR_ERR_COR_INT_MASK ,Interrupt Mask for PPA_HDR_ERR_COR" "Disabled,Enabled" rgroup.long (0x854+0x0)++0x03 line.long 0x00 "PIXEL_PARSER_A_STATUS_0,Pixel Parser A Status" bitfld.long 0x00 14. " HPA_UNC_HDR_ERR ,Uncorrectable Header Error" "No error,Error" bitfld.long 0x00 10. " PPA_SPARE_STATUS_1 ,PPA Spare Status bit" "No line timeout,Line timeout" textline " " bitfld.long 0x00 9. " PPA_INTERFRAME_LINE ,Set when CSI-PPA receives a request to output a line that is not in the active part of the frame output" "No active,Active" bitfld.long 0x00 8. " PPA_EXTRA_SF ,Set when CSI-PPA receives a SF when it is expecting an EF" "Not corrupted,corrupted" textline " " bitfld.long 0x00 7. " PPA_SHORT_FRAME ,Set when CSI-PPA receives a short frame" ",Short Frame" bitfld.long 0x00 6. " PPA_STMERR ,Stream Error" "No error,Error" textline " " bitfld.long 0x00 5. " PPA_FIFO_OVRF ,FIFO Overflow" "Not overflow,Overflow" bitfld.long 0x00 4. " PPA_PL_CRC_ERR ,PayLoad CRC Error" "No error,Error" textline " " bitfld.long 0x00 3. " PPA_SL_PKT_DROPPED ,Short Line Packet Dropped" "Not dropped,Dropped" bitfld.long 0x00 2. " PPA_SL_PROCESSED ,Short Line Processed" "Equal/longer,Shorter" textline " " bitfld.long 0x00 1. " PPA_ILL_WD_CNT ,Illegal Word Count" "No,Yes" bitfld.long 0x00 0. " PPA_HDR_ERR_COR ,Header Error Corrected" "No error,Error" group.long (0x858+0x0)++0x03 line.long 0x00 "SW_SENSOR_A_RESET_0,SW sensor A" bitfld.long 0x00 0. " SENSOR_A_RESET ,Reset CSI sensor A" "No reset,Reset" tree.end tree "Sensor B" group.long (0x86c+0x0)++0x1B line.long 0x00 "INPUT_STREAM_B_CONTROL_0,CSI Input Stream B Control" hexmask.long.word 0x00 16.--24. 1. " B_SKIP_PACKET_THRESHOLD ,CSI-B Skip Packet Threshold" bitfld.long 0x00 4. " B_SKIP_PACKET_THRESHOLD_ENABLE ,Enables skip packet threshold feature" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " B_BYPASS_ALIGN ,Bypass aligning CSIB lanes" "Not bypassed,Bypassed" bitfld.long 0x00 0.--1. " B_DATA_LANE ,CSI-B Data Lane" "1 data lane,2 data lanes,3 data lanes,4 data lanes" line.long 0x04 "PIXEL_STREAM_B_CONTROL0_0,CSI Pixel Stream B Control 0" bitfld.long 0x04 28.--29. " PPB_PAD_FRAME ,CSI Pixel Parser B Pad Frame" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 27. " PPB_HEADER_EC_ENABLE ,CSI Pixel Parser B Packet Header Error Correction Enable" "No,Yes" textline " " bitfld.long 0x04 24.--25. " PPB_PAD_SHORT_LINE ,CSI Pixel Parser B Pad Short Line" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 20.--21. " PPB_EMBEDDED_DATA_OPTIONS ,CSI Pixel Parser B Embedded Data Options" "Discard,Embedded,?..." textline " " bitfld.long 0x04 16.--19. " PPB_OUTPUT_FORMAT_OPTIONS ,CSI Pixel Parser B Output Format Options" "Arbitrary,Pixel,Pixel_Rep,Store,?..." bitfld.long 0x04 8. " PPB_WC_CHECK ,CSI Pixel Parser B Data WC Check" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PPB_CRC_CHECK ,CSI Pixel Parser B Data CRC Check" "Disabled,Enabled" bitfld.long 0x04 6. " PPB_WORD_COUNT_SELECT ,CSI Pixel Parser B Word Count Select" "REGISTER,HEADER" textline " " bitfld.long 0x04 5. " PPB_DATA_IDENTIFIER ,CSI Pixel Parser B Data Identifier byte processing" "Disabled,Enabled" bitfld.long 0x04 4. " PPB_PACKET_HEADER ,CSI Pixel Parser B Packet Header processing" "Not sent,Sent" textline " " bitfld.long 0x04 0.--2. " PPB_STREAM_SOURCE ,CSI Pixel Parser B Stream Source Host" "CSI Interface A,CSI Interface B,?..." line.long 0x08 "PIXEL_STREAM_B_CONTROL1_0,CSI Pixel Stream B Control 1" bitfld.long 0x08 4.--7. " PPB_TOP_FIELD_FRAME_MASK ,CSI Pixel Parser B Top Field Frame Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " PPB_TOP_FIELD_FRAME ,CSI Pixel Parser B Top Field Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PIXEL_STREAM_B_GAP_0,CSI Pixel Stream B Gap" hexmask.long.word 0x0C 16.--31. 1. " PPB_FRAME_MIN_GAP ,Minimum number of viclk cycles from end of frame to start of next frame" hexmask.long.word 0x0C 0.--15. 1. " PPB_LINE_MIN_GAP ,Minimum number of viclk cycles from end of previous line to start of next line" line.long 0x10 "PIXEL_STREAM_PPB_COMMAND_0,CSI Pixel Parser B Command" bitfld.long 0x10 12.--15. " PPB_START_MARKER_FRAME_MAX ,CSI Pixel Parser B Start Marker Maximum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " PPB_START_MARKER_FRAME_MIN ,CSI Pixel Parser B Start Marker Minimum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4. " PPB_VSYNC_START_MARKER ,CSI Pixel Parser B VSYNC Start Marker" "FSPKT,VSYNC" bitfld.long 0x10 2. " PPB_SINGLE_SHOT ,CSI Pixel Parser B Single Shot Mode" "Disabled,Enabled" textline " " bitfld.long 0x10 0.--1. " PPB_ENABLE ,CSI Pixel Parser B Enable" "No operation,Enabled,Disabled,RST" line.long 0x14 "PIXEL_STREAM_B_EXPECTED_FRAME_0,CSI Pixel Stream B Expected Frame" hexmask.long.word 0x14 4.--15. 1. " PPB_MAX_CLOCKS ,Maximum Number of viclk clock cycles between line start requests" bitfld.long 0x14 0. " PPB_ENABLE_LINE_TIMEOUT ,PPB_ENABLE_LINE_TIMEOUT" "Disabled,Enabled" line.long 0x18 "PIXEL_PARSER_B_INTERRUPT_MASK_0,CSI Pixel Parser B Interrupt Mask" bitfld.long 0x18 14. " HPB_UNC_HDR_ERR_INT_MASK ,Interrupt Mask for HPB_UNC_HDR_ERR" "Disabled,Enabled" bitfld.long 0x18 10. " PPB_SPARE_STATUS_1_INT_MASK ,Interrupt Mask for PPB_SPARE_STATUS_1" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " PPB_INTERFRAME_LINE_INT_MASK ,Interrupt Mask for PPB_INTERFRAME_LINE" "Disabled,Enabled" bitfld.long 0x18 8. " PPB_EXTRA_SF_INT_MASK ,Interrupt Mask for PPB_EXTRA_SF" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " PPB_SHORT_FRAME_INT_MASK ,Interrupt Mask for PPB_SHORT_FRAME" "Disabled,Enabled" bitfld.long 0x18 6. " PPB_STMERR_INT_MASK ,Interrupt Mask for PPB_STMERR" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " PPB_FIFO_OVRF_INT_MASK ,Interrupt Mask for PPB_FIFO_OVRF" "Disabled,Enabled" bitfld.long 0x18 4. " PPB_PL_CRC_ERR_INT_MASK ,Interrupt Mask for PPB_PL_CRC_ERR" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " PPB_SL_PKT_DROPPED_INT_MASK ,Interrupt Mask for PPB_SL_PKT_DROPPED" "Disabled,Enabled" bitfld.long 0x18 2. " PPB_SL_PROCESSED_INT_MASK ,Interrupt Mask for PPB_SL_PROCESSED" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PPB_ILL_WD_CNT_INT_MASK ,Interrupt Mask for PPB_ILL_WD_CNT" "Disabled,Enabled" bitfld.long 0x18 0. " PPB_HDR_ERR_COR_INT_MASK ,Interrupt Mask for PPB_HDR_ERR_COR" "Disabled,Enabled" rgroup.long (0x888+0x0)++0x03 line.long 0x00 "PIXEL_PARSER_B_STATUS_0,Pixel Parser B Status" bitfld.long 0x00 14. " HPB_UNC_HDR_ERR ,Uncorrectable Header Error" "No error,Error" bitfld.long 0x00 10. " PPB_SPARE_STATUS_1 ,PPB Spare Status bit" "No line timeout,Line timeout" textline " " bitfld.long 0x00 9. " PPB_INTERFRAME_LINE ,Set when CSI-PPB receives a request to output a line that is not in the active part of the frame output" "No active,Active" bitfld.long 0x00 8. " PPB_EXTRA_SF ,Set when CSI-PPB receives a SF when it is expecting an EF" "Not corrupted,corrupted" textline " " bitfld.long 0x00 7. " PPB_SHORT_FRAME ,Set when CSI-PPB receives a short frame" "0,Short Frame" bitfld.long 0x00 6. " PPB_STMERR ,Stream Error" "No error,Error" textline " " bitfld.long 0x00 5. " PPB_FIFO_OVRF ,FIFO Overflow" "Not overflow,Overflow" bitfld.long 0x00 4. " PPB_PL_CRC_ERR ,PayLoad CRC Error" "No error,Error" textline " " bitfld.long 0x00 3. " PPB_SL_PKT_DROPPED ,Short Line Packet Dropped" "Not dropped,Dropped" bitfld.long 0x00 2. " PPB_SL_PROCESSED ,Short Line Processed" "Equal/longer,Shorter" textline " " bitfld.long 0x00 1. " PPB_ILL_WD_CNT ,Illegal Word Count" "No,Yes" bitfld.long 0x00 0. " PPB_HDR_ERR_COR ,Header Error Corrected" "No error,Error" group.long (0x88C+0x0)++0x03 line.long 0x00 "SW_SENSOR_B_RESET_0,SW sensor B" bitfld.long 0x00 0. " SENSOR_B_RESET ,Reset CSI sensor B" "No reset,Reset" tree.end textline " " width 25. group.long (0x908+0x0)++0x07 line.long 0x00 "PHY_CIL_COMMAND_0,CSI Phy and CIL Command" bitfld.long 0x00 8.--9. " CSI_B_PHY_CIL_ENABLE ,CSI B PHY and CIL Enable" "No operation,Enable,Disable,?..." bitfld.long 0x00 0.--1. " CSI_A_PHY_CIL_ENABLE ,CSI A Phy and CIL" "No operation,Enable,Disable,?..." line.long 0x04 "CIL_PAD_CONFIG0_0,CIL Pad Configuration 0" hexmask.long.byte 0x04 8.--15. 1. " PAD_CIL_SPARE ,Spare bit for CIL BIAS Config" tree "CILA" width 28. group.long (0x92c+0x0)++0x0F line.long 0x00 "PAD_CONFIG0_0,CIL-A Pad Configuration 0" bitfld.long 0x00 31. " PAD_CILA_E_TXBW ,Enable VCLAMP regulator" "Enabled,Disabled" bitfld.long 0x00 28.--30. " PAD_CILA_SLEWDNADJ ,Pull down slew rate adjust" "0,1,2,3,0,-1,-2,-3" bitfld.long 0x00 24.--26. " PAD_CILA_SLEWUPADJ ,Pull up slew rate adjust" "0,1,2,3,0,-1,-2,-3" textline " " bitfld.long 0x00 21.--23. " PAD_CILA_LPDNADJ ,Driver pull down impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 18.--20. " PAD_CILA_LPUPADJ ,Driver pull up impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 16.--17. " PAD_AB_BK_MODE ,PAD_AB_BK_MODE" "two 2x bricks,one 4x brick (A),one 4x brick (B),Illegal" textline " " bitfld.long 0x00 15. " PAD_CILA_BANDWD_IN ,Increase bandwidth of differential receiver" "Disabled,Enabled" bitfld.long 0x00 12.--14. " PAD_CILA_INADJ1 ,bit 1 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 8.--10. " PAD_CILA_INADJ0 ,bit 0 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" textline " " bitfld.long 0x00 4.--6. " PAD_CILA_INADJCLK ,Clock bit input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 3. " PAD_CILA_PDVCLAMP ,Power down regulator which supplies current to serializer/deserializer logic" "Serializer,Deserializer" bitfld.long 0x00 2. " PAD_CILA_PDIO_CLK ,Power down for clock bit" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " PAD_CILA_PDIO ,Power down for each data bit" "0,1,2,3" line.long 0x04 "PAD_CONFIG1_0,CIL-A Pad Configuration 4" hexmask.long.word 0x04 16.--31. 1. " PAD_CILA_SPARE_RO ,Spare Read only bits for CILA Config" hexmask.long.byte 0x04 8.--15. 1. " PAD_CILA_SPARE ,Spare bits for CILA" bitfld.long 0x04 6.--7. " PAD_CILA_PEMPD_CLK ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" textline " " bitfld.long 0x04 4.--5. " PAD_CILA_PEMPU_CLK ,Enable data bit HS driver pull up pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 2.--3. " PAD_CILA_PEMPD ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 0.--1. " PAD_CILA_PEMPU ,Enable data bit HS driver pull up pre-emphasis," "No pre-emphasis,,,Max" line.long 0x08 "PHY_CILA_CONTROL0_0,CSI-A Phy and CIL Control" bitfld.long 0x08 8.--13. " CLK_SETTLE ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles,8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,?..." bitfld.long 0x08 6. " BYPASS_LP_SEQ ,CILA_BYPASS_LP_SEQ" "Not bypassed,Bypassed" textline " " bitfld.long 0x08 0.--5. " THS_SETTLE ,Settle time for data lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "INTERRUPT_MASK_0,CSI Control and Interface Logic A Interrupt Mask" bitfld.long 0x0C 9. " CLK_LANE_CTRL_ERR_INT_MASK ,Interrupt Mask for CILA_CLK_CTRL_ERR" "Disabled,Enabled" bitfld.long 0x0C 6. " ESC_DATA_REC_INT_MASK ,Interrupt Mask for CILA_ESC_DATA_REC" "Disabled,Enabled" bitfld.long 0x0C 5. " ESC_CMD_REC_INT_MASK ,Interrupt Mask for CILA_ESC_CMD_REC" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " CTRL_ERR_INT_MASK ,Interrupt Mask for CILA_CTRL_ERR" "Disabled,Enabled" bitfld.long 0x0C 2. " SYNC_ESC_ERR_INT_MASK ,Interrupt Mask for CILA_SYNC_ESC_ERR" "Disabled,Enabled" bitfld.long 0x0C 1. " SOT_MB_ERR_INT_MASK ,Interrupt Mask for CILA_SOT_MB_ERR" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " SOT_SB_ERR_INT_MASK ,Interrupt Mask for CILA_SOT_SB_ERR" "Disabled,Enabled" rgroup.long (0x93c+0x0)++0x07 line.long 0x00 "STATUS_0,CSI Control and Interface Logic A Status" bitfld.long 0x00 6. " CILA_ESC_DATA_REC ,Escape Mode Data Received" "No received,Received" bitfld.long 0x00 5. " ESC_CMD_REC ,Escape Mode Command Received" "No received,Received" bitfld.long 0x00 4. " CTRL_ERR ,Control Error" "No error,Error" textline " " bitfld.long 0x00 2. " CILA_SYNC_ESC_ERR ,Sync Escape Error" "No error,Error" bitfld.long 0x00 1. " SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x00 0. " SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" line.long 0x04 "STATUS_0,CSI-CILA Control and Interface Logic Status" bitfld.long 0x04 18. " DATA_LANE1_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 17. " DATA_LANE1_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 16. " DATA_LANE1_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 6. " DATA_LANE0_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 5. " DATA_LANE0_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 4. " DATA_LANE0_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 0. " CLK_LANE_CTRL_ERR ,Control Error" "No error,Error" if (((per.l(ad:0x54080000+0x93c+0x0))&0x20)==0x20) rgroup.long (0x944+0x0)++0x07 line.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hexmask.long.byte 0x00 0.--7. 1. " CILA_ESC_CMD_BYTE ,CIL-A Escape Mode Command Byte" line.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" hexmask.long.byte 0x04 0.--7. 1. " CILA_ESC_DATA_BYTE ,CIL-A Escape Mode Data Byte" else hgroup.long (0x944+0x0)++0x07 hide.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hide.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" endif group.long (0x94c+0x0)++0x03 line.long 0x00 "CSICIL_SW_SENSOR_A_RESET_0,Sensor A Reset" bitfld.long 0x00 0. " CSICIL_SENSOR_A_RESET ,Reset CSICIL sensor A" "No reset,Reset" tree.end tree "CILB" group.long (0x960+0x0)++0x0F line.long 0x00 "PAD_CONFIG0_0,CIL-B Pad Configuration 0" bitfld.long 0x00 31. " PAD_CILB_E_TXBW ,Enable VCLAMP regulator" "Enabled,Disabled" bitfld.long 0x00 28.--30. " PAD_CILB_SLEWDNADJ ,Pull down slew rate adjust" "0,1,2,3,0,-1,-2,-3" bitfld.long 0x00 24.--26. " PAD_CILB_SLEWUPADJ ,Pull up slew rate adjust" "0,1,2,3,0,-1,-2,-3" textline " " bitfld.long 0x00 21.--23. " PAD_CILB_LPDNADJ ,Driver pull down impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 18.--20. " PAD_CILB_LPUPADJ ,Driver pull up impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 15. " PAD_CILB_BANDWD_IN ,Increase bandwidth of differential receiver" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " PAD_CILB_INADJ1 ,bit 1 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 8.--10. " PAD_CILB_INADJ0 ,bit 0 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 4.--6. " PAD_CILB_INADJCLK ,Clock bit input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" textline " " bitfld.long 0x00 3. " PAD_CILB_PDVCLAMP ,Power down regulator which supplies current to serializer/deserializer logic" "Serializer,Deserializer" bitfld.long 0x00 2. " PAD_CILB_PDIO_CLK ,Power down for clock bit" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PAD_CILB_PDIO ,Power down for each data bit" "0,1,2,3" line.long 0x04 "PAD_CONFIG1_0,CIL-B Pad Configuration 4" hexmask.long.word 0x04 16.--31. 1. " PAD_CILB_SPARE_RO ,Spare Read only bits for CILB Config" hexmask.long.byte 0x04 8.--15. 1. " PAD_CILB_SPARE ,Spare bits for CILB" bitfld.long 0x04 6.--7. " PAD_CILB_PEMPD_CLK ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" textline " " bitfld.long 0x04 4.--5. " PAD_CILB_PEMPU_CLK ,Enable data bit HS driver pull up pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 2.--3. " PAD_CILB_PEMPD ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 0.--1. " PAD_CILB_PEMPU ,Enable data bit HS driver pull up pre-emphasis," "No pre-emphasis,,,Max" line.long 0x08 "PHY_CILB_CONTROL0_0,CSI-B Phy and CIL Control" bitfld.long 0x08 8.--13. " CLK_SETTLE ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles,8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,?..." bitfld.long 0x08 6. " BYPASS_LP_SEQ ,CILB_BYPASS_LP_SEQ" "Not bypassed,Bypassed" textline " " bitfld.long 0x08 0.--5. " THS_SETTLE ,Settle time for data lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "CIL_B_INTERRUPT_MASK_0,CSI Control and Interface Logic B Interrupt Mask" bitfld.long 0x0C 6. " ESC_DATA_REC_INT_MASK ,Interrupt Mask for CILB_ESC_DATA_REC" "Disabled,Enabled" bitfld.long 0x0C 5. " ESC_CMD_REC_INT_MASK ,Interrupt Mask for CILB_ESC_CMD_REC" "Disabled,Enabled" bitfld.long 0x0C 4. " CTRL_ERR_INT_MASK ,Interrupt Mask for CILB_CTRL_ERR" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " SYNC_ESC_ERR_INT_MASK ,Interrupt Mask for CILB_SYNC_ESC_ERR" "Disabled,Enabled" bitfld.long 0x0C 1. " SOT_MB_ERR_INT_MASK ,Interrupt Mask for CILB_SOT_MB_ERR" "Disabled,Enabled" bitfld.long 0x0C 0. " SOT_SB_ERR_INT_MASK ,Interrupt Mask for CILB_SOT_SB_ERR" "Disabled,Enabled" rgroup.long (0x970+0x0)++0x07 line.long 0x00 "STATUS_0,CSI Control and Interface Logic B Status" bitfld.long 0x00 6. " ESC_DATA_REC ,Escape Mode Data Received" "No received,Received" bitfld.long 0x00 5. " ESC_CMD_REC ,Escape Mode Command Received" "No received,Received" bitfld.long 0x00 4. " CTRL_ERR ,Control Error" "No error,Error" textline " " bitfld.long 0x00 2. " SYNC_ESC_ERR ,Sync Escape Error" "No error,Error" bitfld.long 0x00 1. " SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x00 0. " SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" line.long 0x04 "STATUS_0,CSI-CILB Control and Interface Logic Status" bitfld.long 0x04 18. " DATA_LANE1_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 17. " DATA_LANE1_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 16. " DATA_LANE1_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 6. " DATA_LANE0_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 5. " DATA_LANE0_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 4. " DATA_LANE0_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 0. " CLK_LANE_CTRL_ERR ,Control Error" "No error,Error" if (((per.l(ad:0x54080000+0x970+0x0))&0x20)==0x20) rgroup.long (0x978+0x0)++0x07 line.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hexmask.long.byte 0x00 0.--7. 1. " ESC_CMD_BYTE ,CIL-B Escape Mode Command Byte" line.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" hexmask.long.byte 0x04 0.--7. 1. " ESC_DATA_BYTE ,CIL-B Escape Mode Data Byte" else hgroup.long (0x978+0x0)++0x07 hide.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hide.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" endif group.long (0x980+0x0)++0x03 line.long 0x00 "CSICIL_SW_SENSOR_B_RESET_0,Sensor B Reset" bitfld.long 0x00 0. " CSICIL_SENSOR_B_RESET ,Reset CSICIL sensor B" "No reset,Reset" tree.end tree "PATTERN GENERATOR" width 21. group.long (0x9C4+0x0)++0x27 line.long 0x00 "CTRL_A_0,Generator Control A" bitfld.long 0x00 2.--3. " MODE_A ,Mode for Sensor A" "DIRECT,PATCH,?..." bitfld.long 0x00 1. " AUTO_INC_A ,Automatic phase increment mode for sensor A" "0,1" bitfld.long 0x00 0. " ENABLE_A ,Enable Pattern Generator for sensor A" "Disabled,Enabled" line.long 0x04 "BLANK_A_0,Blanking for PG" hexmask.long.word 0x04 16.--31. 1. " VBLANK_A ,Vertical Blanking for PG" hexmask.long.word 0x04 0.--15. 1. " HBLANK_A ,Horizontal Blanking for PG" line.long 0x08 "PHASE_A_0,Phase" hexmask.long.word 0x08 0.--13. 1. " PHASE_A ,Initial Phase" line.long 0x0C "RED_FREQ_A_0,Initial frequency" hexmask.long.word 0x0C 16.--29. 1. " RED_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x0C 0.--13. 1. " RED_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x10 "RED_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x10 8.--15. 1. " RED_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x10 0.--7. 1. " RED_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x14 "GREEN_FREQ_A_0,Initial frequency" hexmask.long.word 0x14 16.--29. 1. " GREEN_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x14 0.--13. 1. " GREEN_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x18 "GREEN_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x18 8.--15. 1. " GREEN_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x18 0.--7. 1. " GREEN_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x1C "BLUE_FREQ_A_0,Initial frequency" hexmask.long.word 0x1C 16.--29. 1. " BLUE_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x1C 0.--13. 1. " BLUE_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x20 "BLUE_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x20 8.--15. 1. " BLUE_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x20 0.--7. 1. " BLUE_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x24 "AOHDR_A_0,AOHDR" bitfld.long 0x24 1.--2. " GAIN_RATIO_A ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1" bitfld.long 0x24 0. " ENABLE_A ,AOHDR enable" "Disabled,Enabled" group.long (0x9F8+0x0)++0x27 line.long 0x00 "CTRL_B_0,Generator Control B" bitfld.long 0x00 2.--3. " MODE_B ,Mode for Sensor B" "DIRECT,PATCH,?..." bitfld.long 0x00 1. " AUTO_INC_B ,Automatic phase increment mode for sensor B" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE_B ,Enable Pattern Generator for sensor B" "Disabled,Enabled" line.long 0x04 "BLANK_B_0,Blanking for PG" hexmask.long.word 0x04 16.--31. 1. " VBLANK_B ,Vertical Blanking for PG" hexmask.long.word 0x04 0.--15. 1. " HBLANK_B ,Horizontal Blanking for PG" line.long 0x08 "PHASE_B_0,Phase" hexmask.long.word 0x08 0.--13. 1. " PHASE_B ,Initial Phase" line.long 0x0C "RED_FREQ_B_0,Initial frequency" hexmask.long.word 0x0C 16.--29. 1. " RED_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x0C 0.--13. 1. " RED_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x10 "RED_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x10 8.--15. 1. " RED_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x10 0.--7. 1. " RED_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x14 "GREEN_FREQ_B_0,Initial frequency" hexmask.long.word 0x14 16.--29. 1. " GREEN_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x14 0.--13. 1. " GREEN_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x18 "GREEN_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x18 8.--15. 1. " GREEN_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x18 0.--7. 1. " GREEN_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x1C "BLUE_FREQ_B_0,Initial frequency" hexmask.long.word 0x1C 16.--29. 1. " BLUE_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x1C 0.--13. 1. " BLUE_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x20 "BLUE_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x20 8.--15. 1. " BLUE_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x20 0.--7. 1. " BLUE_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x24 "AOHDR_B_0,AOHDR" bitfld.long 0x24 1.--2. " GAIN_RATIO_B ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1" bitfld.long 0x24 0. " ENABLE_B ,AOHDR enable" "Disabled,Enabled" tree.end textline "" width 20. group.long (0xa2C+0x0)++0x07 line.long 0x00 "DPCM_CTRL_A_0,DPCM control A" bitfld.long 0x00 8.--11. " DPCM_COMPRESSION_RATIO_A ,DPCM A compression ratio" "BYPASS,10_8_10,10_7_10,10_6_10,12_8_12,12_7_12,12_6_12,14_10_14,14_8_14,?..." bitfld.long 0x00 0. " DPCM_PREDICTOR_A ,DPCM A predictor" "Predictor1,Predictor2" line.long 0x04 "DPCM_CTRL_B_0,DPCM control B" bitfld.long 0x04 8.--11. " DPCM_COMPRESSION_RATIO_B ,DPCM B compression ratio" "BYPASS,10_8_10,10_7_10,10_6_10,12_8_12,12_7_12,12_6_12,14_10_14,14_8_14,?..." bitfld.long 0x04 0. " DPCM_PREDICTOR_B ,DPCM B predictor" "Predictor1,Predictor2" group.long (0xa44+0x0)++0x03 line.long 0x00 "STALL_COUNTER_0,Counter" hexmask.long.byte 0x00 8.--15. 1. " STALL_SENSOR_B_COUNT ,Number of cycles to stall sensor B after every EOF" hexmask.long.byte 0x00 0.--7. 1. " STALL_SENSOR_A_COUNT ,Number of cycles to stall sensor A after every EOF" rgroup.long (0xA48+0x0)++0x03 line.long 0x00 "READONLY_STATUS_0,CSI Read Only Status" bitfld.long 0x00 1. " CSI_PPB_ACTIVE ,One only when Pixel Parser B is capturing frame data" "No active,Active" bitfld.long 0x00 0. " CSI_PPA_ACTIVE ,One only when Pixel Parser A is capturing frame data" "No active,Active" group.long (0xA4C+0x0)++0x03 line.long 0x00 "SW_STATUS_RESET_0,Status reset" bitfld.long 0x00 0. " CSI_STATUS_RESET ,Reset CSI status and dbgcnt registers" "No reset,Reset" group.long (0xA50+0x0)++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,Second-level clock enable override register" bitfld.long 0x00 18. " CSI_CILB_CLKEN_OVR ,CSI_CILB_CLKEN_OVR" "GATED,ALWAYS_ON" bitfld.long 0x00 17. " CSI_CILA_CLKEN_OVR ,CSI_CILA_CLKEN_OVR" "GATED,ALWAYS_ON" textline " " bitfld.long 0x00 14. " CSI_PPB_CLKEN_OVR ,CSI_PPB_CLKEN_OVR" "GATED,ALWAYS_ON" bitfld.long 0x00 13. " CSI_PPA_CLKEN_OVR ,CSI_PPA_CLKEN_OVR" "GATED,ALWAYS_ON" textline " " bitfld.long 0x00 9. " CSI_HPB_CLKEN_OVR ,CSI_HPB_CLKEN_OVR" "GATED,ALWAYS_ON" bitfld.long 0x00 8. " CSI_HPA_CLKEN_OVR ,CSI_HPA_CLKEN_OVR" "GATED,ALWAYS_ON" textline " " bitfld.long 0x00 4. " CSI_FB_CLKEN_OVR ,CSI_FB_CLKEN_OVR" "GATED,ALWAYS_ON" bitfld.long 0x00 3. " CSI_FA_CLKEN_OVR ,CSI_FA_CLKEN_OVR" "GATED,ALWAYS_ON" textline " " bitfld.long 0x00 1. " CSI_DBG_CLKEN_OVR ,CSI_DBG_CLKEN_OVR" "GATED,ALWAYS_ON" bitfld.long 0x00 0. " CSI_CLKEN_OVR ,CSI_CLKEN_OVR" "GATED,ALWAYS_ON" group.long (0xA54+0x0)++0x03 line.long 0x00 "DEBUG_CONTROL_0,Debug Control" rbitfld.long 0x00 31. " DBG_CNT_ROLLED_2 ,Incremented past max count" "No increment,Increment" hexmask.long.byte 0x00 24.--30. 1. " DBG_CNT_SEL_2 ,Debug Count Select 2" textline " " rbitfld.long 0x00 23. " DBG_CNT_ROLLED_1 ,Incremented past max count" "No increment,Increment" hexmask.long.byte 0x00 16.--22. 1. " DBG_CNT_SEL_1 ,Debug Count Select 1" textline " " rbitfld.long 0x00 15. " DBG_CNT_ROLLED_0 ,Incremented past max count" "No increment,Increment" hexmask.long.byte 0x00 8.--14. 1. " DBG_CNT_SEL_0 ,Debug Count Select 0" textline " " rbitfld.long 0x00 7. " CLR_DBG_CNT_2 ,Clear Debug Counter 2" "No effect,Cleared" rbitfld.long 0x00 6. " CLR_DBG_CNT_1 ,Clear Debug Counter 1" "No effect,Cleared" rbitfld.long 0x00 5. " CLR_DBG_CNT_0 ,Clear Debug Counter 0" "No effect,Cleared" textline " " rbitfld.long 0x00 2. " CSIB_DBG_SF ,Indicates start frame (SF) or end frame (EF)" "No generated,Generated" rbitfld.long 0x00 1. " CSIA_DBG_SF ,Indicates start frame (SF) or end frame (EF)" "No generated,Generated" bitfld.long 0x00 0. " DEBUG_EN ,Debug Enable Second level CSI Debug clock is enabled" "Disabled,Enabled" rgroup.long (0xA58+0x0)++0x0B line.long 0x00 "DEBUG_COUNTER_0_0,Debug Counter 0" line.long 0x04 "DEBUG_COUNTER_1_0,Debug Counter 1" line.long 0x08 "DEBUG_COUNTER_2_0,Debug Counter 2" tree.end tree "CSI1" tree "CAP" width 7. group.long (0x808+0x800)++0x03 line.long 0x00 "CIL_0,CIL Capability" bitfld.long 0x00 4.--6. " CIL_B_NUMLANES ,CIL B NUMLANES" "NONE,ONE,TWO,?..." bitfld.long 0x00 0.--2. " CIL_A_NUMLANES ,CIL A NUMLANES" "NONE,ONE,TWO,?..." group.long (0x818+0x800)++0x03 line.long 0x00 "CSI_0,CSI Capability" bitfld.long 0x00 4.--7. " CSIB_EXISTS ,CSIB EXISTS" "NO,YES,?..." bitfld.long 0x00 0.--3. " CSIA_EXISTS ,CSIA EXISTS" "NO,YES,?..." group.long (0x828+0x800)++0x03 line.long 0x00 "PP_0,PP Capability" bitfld.long 0x00 4.--7. " PPB_EXISTS ,PPB EXISTS" "NO,YES,?..." bitfld.long 0x00 0.--3. " PPA_EXISTS ,PPA EXISTS" "NO,YES,?..." tree.end width 33. tree "Sensor A" group.long (0x838+0x800)++0x1B line.long 0x00 "INPUT_STREAM_A_CONTROL_0,CSI Input Stream A Control" hexmask.long.word 0x00 16.--24. 1. " CSI_A_SKIP_PACKET_THRESHOLD ,CSI-A Skip Packet Threshold" bitfld.long 0x00 4. " A_SKIP_PACKET_THRESHOLD_ENABLE ,Enables skip packet threshold feature" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " A_BYPASS_ALIGN ,Bypass aligning CSIA and CSIB lanes" "Not bypassed,Bypassed" bitfld.long 0x00 0.--1. " A_DATA_LANE ,CSI-A Data Lane" "1 data lane,2 data lanes,3 data lanes,4 data lanes" line.long 0x04 "PIXEL_STREAM_A_CONTROL0_0,CSI Pixel Stream A Control 0" bitfld.long 0x04 28.--29. " PPA_PAD_FRAME ,CSI Pixel Parser A Pad Frame" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 27. " PPA_HEADER_EC_ENABLE ,CSI Pixel Parser A Packet Header Error Correction Enable" "Enable,Disable" textline " " bitfld.long 0x04 24.--25. " PPA_PAD_SHORT_LINE ,CSI Pixel Parser A Pad Short Line" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 20.--21. " PPA_EMBEDDED_DATA_OPTIONS ,CSI Pixel Parser A Embedded Data Options" "Discard,Embedded,?..." textline " " bitfld.long 0x04 16.--19. " PPA_OUTPUT_FORMAT_OPTIONS ,CSI Pixel Parser A Output Format Options" "Arbitrary,Pixel,Pixel_Rep,Store,?..." bitfld.long 0x04 8. " PPA_WC_CHECK ,CSI Pixel Parser A Data WC Check" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PPA_CRC_CHECK ,CSI Pixel Parser A Data CRC Check" "Disabled,Enabled" bitfld.long 0x04 6. " PPA_WORD_COUNT_SELECT ,CSI Pixel Parser A Word Count Select" "REGISTER,HEADER" textline " " bitfld.long 0x04 5. " PPA_DATA_IDENTIFIER ,CSI Pixel Parser A Data Identifier byte processing" "Disabled,Enabled" bitfld.long 0x04 4. " PPA_PACKET_HEADER ,CSI Pixel Parser A Packet Header processing" "Not sent,Sent" textline " " bitfld.long 0x04 0.--2. " PPA_STREAM_SOURCE ,CSI Pixel Parser A Stream Source Host" "CSI Interface A,CSI Interface B,?..." line.long 0x08 "PIXEL_STREAM_A_CONTROL1_0,CSI Pixel Stream A Control 1" bitfld.long 0x08 4.--7. " PPA_TOP_FIELD_FRAME_MASK ,CSI Pixel Parser A Top Field Frame Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " PPA_TOP_FIELD_FRAME ,CSI Pixel Parser A Top Field Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PIXEL_STREAM_A_GAP_0,CSI Pixel Stream A Gap" hexmask.long.word 0x0C 16.--31. 1. " PPA_FRAME_MIN_GAP ,Minimum number of viclk cycles from end of frame to start of next frame" hexmask.long.word 0x0C 0.--15. 1. " PPA_LINE_MIN_GAP ,Minimum number of viclk cycles from end of previous line to start of next line" line.long 0x10 "PIXEL_STREAM_PPA_COMMAND_0,CSI Pixel Parser A Command" bitfld.long 0x10 12.--15. " PPA_START_MARKER_FRAME_MAX ,CSI Pixel Parser A Start Marker Maximum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " PPA_START_MARKER_FRAME_MIN ,CSI Pixel Parser A Start Marker Minimum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4. " PPA_VSYNC_START_MARKER ,CSI Pixel Parser A VSYNC Start Marker" "FSPKT,VSYNC" bitfld.long 0x10 2. " PPA_SINGLE_SHOT ,CSI Pixel Parser A Single Shot Mode" "Disabled,Enabled" textline " " bitfld.long 0x10 0.--1. " PPA_ENABLE ,CSI Pixel Parser A Enable" "No operation,Enabled,Disabled,RST" line.long 0x14 "PIXEL_STREAM_A_EXPECTED_FRAME_0,CSI Pixel Stream A Expected Frame" hexmask.long.word 0x14 4.--15. 1. " PPA_MAX_CLOCKS ,Maximum Number of viclk clock cycles between line start requests" bitfld.long 0x14 0. " PPA_ENABLE_LINE_TIMEOUT ,PPA_ENABLE_LINE_TIMEOUT" "Disabled,Enabled" line.long 0x18 "PIXEL_PARSER_A_INTERRUPT_MASK_0,CSI Pixel Parser A Interrupt Mask" bitfld.long 0x18 14. " HPA_UNC_HDR_ERR_INT_MASK ,Interrupt Mask for HPA_UNC_HDR_ERR" "Disabled,Enabled" bitfld.long 0x18 10. " PPA_SPARE_STATUS_1_INT_MASK ,Interrupt Mask for PPA_SPARE_STATUS_1" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " PPA_INTERFRAME_LINE_INT_MASK ,Interrupt Mask for PPA_INTERFRAME_LINE" "Disabled,Enabled" bitfld.long 0x18 8. " PPA_EXTRA_SF_INT_MASK ,Interrupt Mask for PPA_EXTRA_SF" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " PPA_SHORT_FRAME_INT_MASK ,Interrupt Mask for PPA_SHORT_FRAME" "Disabled,Enabled" bitfld.long 0x18 6. " PPA_STMERR_INT_MASK ,Interrupt Mask for PPA_STMERR" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " PPA_FIFO_OVRF_INT_MASK ,Interrupt Mask for PPA_FIFO_OVRF" "Disabled,Enabled" bitfld.long 0x18 4. " PPA_PL_CRC_ERR_INT_MASK ,Interrupt Mask for PPA_PL_CRC_ERR" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " PPA_SL_PKT_DROPPED_INT_MASK ,Interrupt Mask for PPA_SL_PKT_DROPPED" "Disabled,Enabled" bitfld.long 0x18 2. " PPA_SL_PROCESSED_INT_MASK ,Interrupt Mask for PPA_SL_PROCESSED" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PPA_ILL_WD_CNT_INT_MASK ,Interrupt Mask for PPA_ILL_WD_CNT" "Disabled,Enabled" bitfld.long 0x18 0. " PPA_HDR_ERR_COR_INT_MASK ,Interrupt Mask for PPA_HDR_ERR_COR" "Disabled,Enabled" rgroup.long (0x854+0x800)++0x03 line.long 0x00 "PIXEL_PARSER_A_STATUS_0,Pixel Parser A Status" bitfld.long 0x00 14. " HPA_UNC_HDR_ERR ,Uncorrectable Header Error" "No error,Error" bitfld.long 0x00 10. " PPA_SPARE_STATUS_1 ,PPA Spare Status bit" "No line timeout,Line timeout" textline " " bitfld.long 0x00 9. " PPA_INTERFRAME_LINE ,Set when CSI-PPA receives a request to output a line that is not in the active part of the frame output" "No active,Active" bitfld.long 0x00 8. " PPA_EXTRA_SF ,Set when CSI-PPA receives a SF when it is expecting an EF" "Not corrupted,corrupted" textline " " bitfld.long 0x00 7. " PPA_SHORT_FRAME ,Set when CSI-PPA receives a short frame" ",Short Frame" bitfld.long 0x00 6. " PPA_STMERR ,Stream Error" "No error,Error" textline " " bitfld.long 0x00 5. " PPA_FIFO_OVRF ,FIFO Overflow" "Not overflow,Overflow" bitfld.long 0x00 4. " PPA_PL_CRC_ERR ,PayLoad CRC Error" "No error,Error" textline " " bitfld.long 0x00 3. " PPA_SL_PKT_DROPPED ,Short Line Packet Dropped" "Not dropped,Dropped" bitfld.long 0x00 2. " PPA_SL_PROCESSED ,Short Line Processed" "Equal/longer,Shorter" textline " " bitfld.long 0x00 1. " PPA_ILL_WD_CNT ,Illegal Word Count" "No,Yes" bitfld.long 0x00 0. " PPA_HDR_ERR_COR ,Header Error Corrected" "No error,Error" group.long (0x858+0x800)++0x03 line.long 0x00 "SW_SENSOR_A_RESET_0,SW sensor A" bitfld.long 0x00 0. " SENSOR_A_RESET ,Reset CSI sensor A" "No reset,Reset" tree.end tree "Sensor B" group.long (0x86c+0x800)++0x1B line.long 0x00 "INPUT_STREAM_B_CONTROL_0,CSI Input Stream B Control" hexmask.long.word 0x00 16.--24. 1. " B_SKIP_PACKET_THRESHOLD ,CSI-B Skip Packet Threshold" bitfld.long 0x00 4. " B_SKIP_PACKET_THRESHOLD_ENABLE ,Enables skip packet threshold feature" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " B_BYPASS_ALIGN ,Bypass aligning CSIB lanes" "Not bypassed,Bypassed" bitfld.long 0x00 0.--1. " B_DATA_LANE ,CSI-B Data Lane" "1 data lane,2 data lanes,3 data lanes,4 data lanes" line.long 0x04 "PIXEL_STREAM_B_CONTROL0_0,CSI Pixel Stream B Control 0" bitfld.long 0x04 28.--29. " PPB_PAD_FRAME ,CSI Pixel Parser B Pad Frame" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 27. " PPB_HEADER_EC_ENABLE ,CSI Pixel Parser B Packet Header Error Correction Enable" "No,Yes" textline " " bitfld.long 0x04 24.--25. " PPB_PAD_SHORT_LINE ,CSI Pixel Parser B Pad Short Line" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 20.--21. " PPB_EMBEDDED_DATA_OPTIONS ,CSI Pixel Parser B Embedded Data Options" "Discard,Embedded,?..." textline " " bitfld.long 0x04 16.--19. " PPB_OUTPUT_FORMAT_OPTIONS ,CSI Pixel Parser B Output Format Options" "Arbitrary,Pixel,Pixel_Rep,Store,?..." bitfld.long 0x04 8. " PPB_WC_CHECK ,CSI Pixel Parser B Data WC Check" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PPB_CRC_CHECK ,CSI Pixel Parser B Data CRC Check" "Disabled,Enabled" bitfld.long 0x04 6. " PPB_WORD_COUNT_SELECT ,CSI Pixel Parser B Word Count Select" "REGISTER,HEADER" textline " " bitfld.long 0x04 5. " PPB_DATA_IDENTIFIER ,CSI Pixel Parser B Data Identifier byte processing" "Disabled,Enabled" bitfld.long 0x04 4. " PPB_PACKET_HEADER ,CSI Pixel Parser B Packet Header processing" "Not sent,Sent" textline " " bitfld.long 0x04 0.--2. " PPB_STREAM_SOURCE ,CSI Pixel Parser B Stream Source Host" "CSI Interface A,CSI Interface B,?..." line.long 0x08 "PIXEL_STREAM_B_CONTROL1_0,CSI Pixel Stream B Control 1" bitfld.long 0x08 4.--7. " PPB_TOP_FIELD_FRAME_MASK ,CSI Pixel Parser B Top Field Frame Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " PPB_TOP_FIELD_FRAME ,CSI Pixel Parser B Top Field Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PIXEL_STREAM_B_GAP_0,CSI Pixel Stream B Gap" hexmask.long.word 0x0C 16.--31. 1. " PPB_FRAME_MIN_GAP ,Minimum number of viclk cycles from end of frame to start of next frame" hexmask.long.word 0x0C 0.--15. 1. " PPB_LINE_MIN_GAP ,Minimum number of viclk cycles from end of previous line to start of next line" line.long 0x10 "PIXEL_STREAM_PPB_COMMAND_0,CSI Pixel Parser B Command" bitfld.long 0x10 12.--15. " PPB_START_MARKER_FRAME_MAX ,CSI Pixel Parser B Start Marker Maximum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " PPB_START_MARKER_FRAME_MIN ,CSI Pixel Parser B Start Marker Minimum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4. " PPB_VSYNC_START_MARKER ,CSI Pixel Parser B VSYNC Start Marker" "FSPKT,VSYNC" bitfld.long 0x10 2. " PPB_SINGLE_SHOT ,CSI Pixel Parser B Single Shot Mode" "Disabled,Enabled" textline " " bitfld.long 0x10 0.--1. " PPB_ENABLE ,CSI Pixel Parser B Enable" "No operation,Enabled,Disabled,RST" line.long 0x14 "PIXEL_STREAM_B_EXPECTED_FRAME_0,CSI Pixel Stream B Expected Frame" hexmask.long.word 0x14 4.--15. 1. " PPB_MAX_CLOCKS ,Maximum Number of viclk clock cycles between line start requests" bitfld.long 0x14 0. " PPB_ENABLE_LINE_TIMEOUT ,PPB_ENABLE_LINE_TIMEOUT" "Disabled,Enabled" line.long 0x18 "PIXEL_PARSER_B_INTERRUPT_MASK_0,CSI Pixel Parser B Interrupt Mask" bitfld.long 0x18 14. " HPB_UNC_HDR_ERR_INT_MASK ,Interrupt Mask for HPB_UNC_HDR_ERR" "Disabled,Enabled" bitfld.long 0x18 10. " PPB_SPARE_STATUS_1_INT_MASK ,Interrupt Mask for PPB_SPARE_STATUS_1" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " PPB_INTERFRAME_LINE_INT_MASK ,Interrupt Mask for PPB_INTERFRAME_LINE" "Disabled,Enabled" bitfld.long 0x18 8. " PPB_EXTRA_SF_INT_MASK ,Interrupt Mask for PPB_EXTRA_SF" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " PPB_SHORT_FRAME_INT_MASK ,Interrupt Mask for PPB_SHORT_FRAME" "Disabled,Enabled" bitfld.long 0x18 6. " PPB_STMERR_INT_MASK ,Interrupt Mask for PPB_STMERR" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " PPB_FIFO_OVRF_INT_MASK ,Interrupt Mask for PPB_FIFO_OVRF" "Disabled,Enabled" bitfld.long 0x18 4. " PPB_PL_CRC_ERR_INT_MASK ,Interrupt Mask for PPB_PL_CRC_ERR" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " PPB_SL_PKT_DROPPED_INT_MASK ,Interrupt Mask for PPB_SL_PKT_DROPPED" "Disabled,Enabled" bitfld.long 0x18 2. " PPB_SL_PROCESSED_INT_MASK ,Interrupt Mask for PPB_SL_PROCESSED" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PPB_ILL_WD_CNT_INT_MASK ,Interrupt Mask for PPB_ILL_WD_CNT" "Disabled,Enabled" bitfld.long 0x18 0. " PPB_HDR_ERR_COR_INT_MASK ,Interrupt Mask for PPB_HDR_ERR_COR" "Disabled,Enabled" rgroup.long (0x888+0x800)++0x03 line.long 0x00 "PIXEL_PARSER_B_STATUS_0,Pixel Parser B Status" bitfld.long 0x00 14. " HPB_UNC_HDR_ERR ,Uncorrectable Header Error" "No error,Error" bitfld.long 0x00 10. " PPB_SPARE_STATUS_1 ,PPB Spare Status bit" "No line timeout,Line timeout" textline " " bitfld.long 0x00 9. " PPB_INTERFRAME_LINE ,Set when CSI-PPB receives a request to output a line that is not in the active part of the frame output" "No active,Active" bitfld.long 0x00 8. " PPB_EXTRA_SF ,Set when CSI-PPB receives a SF when it is expecting an EF" "Not corrupted,corrupted" textline " " bitfld.long 0x00 7. " PPB_SHORT_FRAME ,Set when CSI-PPB receives a short frame" "0,Short Frame" bitfld.long 0x00 6. " PPB_STMERR ,Stream Error" "No error,Error" textline " " bitfld.long 0x00 5. " PPB_FIFO_OVRF ,FIFO Overflow" "Not overflow,Overflow" bitfld.long 0x00 4. " PPB_PL_CRC_ERR ,PayLoad CRC Error" "No error,Error" textline " " bitfld.long 0x00 3. " PPB_SL_PKT_DROPPED ,Short Line Packet Dropped" "Not dropped,Dropped" bitfld.long 0x00 2. " PPB_SL_PROCESSED ,Short Line Processed" "Equal/longer,Shorter" textline " " bitfld.long 0x00 1. " PPB_ILL_WD_CNT ,Illegal Word Count" "No,Yes" bitfld.long 0x00 0. " PPB_HDR_ERR_COR ,Header Error Corrected" "No error,Error" group.long (0x88C+0x800)++0x03 line.long 0x00 "SW_SENSOR_B_RESET_0,SW sensor B" bitfld.long 0x00 0. " SENSOR_B_RESET ,Reset CSI sensor B" "No reset,Reset" tree.end textline " " width 25. group.long (0x908+0x800)++0x07 line.long 0x00 "PHY_CIL_COMMAND_0,CSI Phy and CIL Command" bitfld.long 0x00 8.--9. " CSI_B_PHY_CIL_ENABLE ,CSI B PHY and CIL Enable" "No operation,Enable,Disable,?..." bitfld.long 0x00 0.--1. " CSI_A_PHY_CIL_ENABLE ,CSI A Phy and CIL" "No operation,Enable,Disable,?..." line.long 0x04 "CIL_PAD_CONFIG0_0,CIL Pad Configuration 0" hexmask.long.byte 0x04 8.--15. 1. " PAD_CIL_SPARE ,Spare bit for CIL BIAS Config" tree "CILA" width 28. group.long (0x92c+0x800)++0x0F line.long 0x00 "PAD_CONFIG0_0,CIL-A Pad Configuration 0" bitfld.long 0x00 31. " PAD_CILA_E_TXBW ,Enable VCLAMP regulator" "Enabled,Disabled" bitfld.long 0x00 28.--30. " PAD_CILA_SLEWDNADJ ,Pull down slew rate adjust" "0,1,2,3,0,-1,-2,-3" bitfld.long 0x00 24.--26. " PAD_CILA_SLEWUPADJ ,Pull up slew rate adjust" "0,1,2,3,0,-1,-2,-3" textline " " bitfld.long 0x00 21.--23. " PAD_CILA_LPDNADJ ,Driver pull down impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 18.--20. " PAD_CILA_LPUPADJ ,Driver pull up impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 16.--17. " PAD_AB_BK_MODE ,PAD_AB_BK_MODE" "two 2x bricks,one 4x brick (A),one 4x brick (B),Illegal" textline " " bitfld.long 0x00 15. " PAD_CILA_BANDWD_IN ,Increase bandwidth of differential receiver" "Disabled,Enabled" bitfld.long 0x00 12.--14. " PAD_CILA_INADJ1 ,bit 1 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 8.--10. " PAD_CILA_INADJ0 ,bit 0 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" textline " " bitfld.long 0x00 4.--6. " PAD_CILA_INADJCLK ,Clock bit input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 3. " PAD_CILA_PDVCLAMP ,Power down regulator which supplies current to serializer/deserializer logic" "Serializer,Deserializer" bitfld.long 0x00 2. " PAD_CILA_PDIO_CLK ,Power down for clock bit" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " PAD_CILA_PDIO ,Power down for each data bit" "0,1,2,3" line.long 0x04 "PAD_CONFIG1_0,CIL-A Pad Configuration 4" hexmask.long.word 0x04 16.--31. 1. " PAD_CILA_SPARE_RO ,Spare Read only bits for CILA Config" hexmask.long.byte 0x04 8.--15. 1. " PAD_CILA_SPARE ,Spare bits for CILA" bitfld.long 0x04 6.--7. " PAD_CILA_PEMPD_CLK ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" textline " " bitfld.long 0x04 4.--5. " PAD_CILA_PEMPU_CLK ,Enable data bit HS driver pull up pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 2.--3. " PAD_CILA_PEMPD ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 0.--1. " PAD_CILA_PEMPU ,Enable data bit HS driver pull up pre-emphasis," "No pre-emphasis,,,Max" line.long 0x08 "PHY_CILA_CONTROL0_0,CSI-A Phy and CIL Control" bitfld.long 0x08 8.--13. " CLK_SETTLE ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles,8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,?..." bitfld.long 0x08 6. " BYPASS_LP_SEQ ,CILA_BYPASS_LP_SEQ" "Not bypassed,Bypassed" textline " " bitfld.long 0x08 0.--5. " THS_SETTLE ,Settle time for data lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "INTERRUPT_MASK_0,CSI Control and Interface Logic A Interrupt Mask" bitfld.long 0x0C 9. " CLK_LANE_CTRL_ERR_INT_MASK ,Interrupt Mask for CILA_CLK_CTRL_ERR" "Disabled,Enabled" bitfld.long 0x0C 6. " ESC_DATA_REC_INT_MASK ,Interrupt Mask for CILA_ESC_DATA_REC" "Disabled,Enabled" bitfld.long 0x0C 5. " ESC_CMD_REC_INT_MASK ,Interrupt Mask for CILA_ESC_CMD_REC" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " CTRL_ERR_INT_MASK ,Interrupt Mask for CILA_CTRL_ERR" "Disabled,Enabled" bitfld.long 0x0C 2. " SYNC_ESC_ERR_INT_MASK ,Interrupt Mask for CILA_SYNC_ESC_ERR" "Disabled,Enabled" bitfld.long 0x0C 1. " SOT_MB_ERR_INT_MASK ,Interrupt Mask for CILA_SOT_MB_ERR" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " SOT_SB_ERR_INT_MASK ,Interrupt Mask for CILA_SOT_SB_ERR" "Disabled,Enabled" rgroup.long (0x93c+0x800)++0x07 line.long 0x00 "STATUS_0,CSI Control and Interface Logic A Status" bitfld.long 0x00 6. " CILA_ESC_DATA_REC ,Escape Mode Data Received" "No received,Received" bitfld.long 0x00 5. " ESC_CMD_REC ,Escape Mode Command Received" "No received,Received" bitfld.long 0x00 4. " CTRL_ERR ,Control Error" "No error,Error" textline " " bitfld.long 0x00 2. " CILA_SYNC_ESC_ERR ,Sync Escape Error" "No error,Error" bitfld.long 0x00 1. " SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x00 0. " SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" line.long 0x04 "STATUS_0,CSI-CILA Control and Interface Logic Status" bitfld.long 0x04 18. " DATA_LANE1_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 17. " DATA_LANE1_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 16. " DATA_LANE1_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 6. " DATA_LANE0_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 5. " DATA_LANE0_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 4. " DATA_LANE0_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 0. " CLK_LANE_CTRL_ERR ,Control Error" "No error,Error" if (((per.l(ad:0x54080000+0x93c+0x800))&0x20)==0x20) rgroup.long (0x944+0x800)++0x07 line.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hexmask.long.byte 0x00 0.--7. 1. " CILA_ESC_CMD_BYTE ,CIL-A Escape Mode Command Byte" line.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" hexmask.long.byte 0x04 0.--7. 1. " CILA_ESC_DATA_BYTE ,CIL-A Escape Mode Data Byte" else hgroup.long (0x944+0x800)++0x07 hide.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hide.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" endif group.long (0x94c+0x800)++0x03 line.long 0x00 "CSICIL_SW_SENSOR_A_RESET_0,Sensor A Reset" bitfld.long 0x00 0. " CSICIL_SENSOR_A_RESET ,Reset CSICIL sensor A" "No reset,Reset" tree.end tree "CILB" group.long (0x960+0x800)++0x0F line.long 0x00 "PAD_CONFIG0_0,CIL-B Pad Configuration 0" bitfld.long 0x00 31. " PAD_CILB_E_TXBW ,Enable VCLAMP regulator" "Enabled,Disabled" bitfld.long 0x00 28.--30. " PAD_CILB_SLEWDNADJ ,Pull down slew rate adjust" "0,1,2,3,0,-1,-2,-3" bitfld.long 0x00 24.--26. " PAD_CILB_SLEWUPADJ ,Pull up slew rate adjust" "0,1,2,3,0,-1,-2,-3" textline " " bitfld.long 0x00 21.--23. " PAD_CILB_LPDNADJ ,Driver pull down impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 18.--20. " PAD_CILB_LPUPADJ ,Driver pull up impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 15. " PAD_CILB_BANDWD_IN ,Increase bandwidth of differential receiver" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " PAD_CILB_INADJ1 ,bit 1 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 8.--10. " PAD_CILB_INADJ0 ,bit 0 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 4.--6. " PAD_CILB_INADJCLK ,Clock bit input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" textline " " bitfld.long 0x00 3. " PAD_CILB_PDVCLAMP ,Power down regulator which supplies current to serializer/deserializer logic" "Serializer,Deserializer" bitfld.long 0x00 2. " PAD_CILB_PDIO_CLK ,Power down for clock bit" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PAD_CILB_PDIO ,Power down for each data bit" "0,1,2,3" line.long 0x04 "PAD_CONFIG1_0,CIL-B Pad Configuration 4" hexmask.long.word 0x04 16.--31. 1. " PAD_CILB_SPARE_RO ,Spare Read only bits for CILB Config" hexmask.long.byte 0x04 8.--15. 1. " PAD_CILB_SPARE ,Spare bits for CILB" bitfld.long 0x04 6.--7. " PAD_CILB_PEMPD_CLK ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" textline " " bitfld.long 0x04 4.--5. " PAD_CILB_PEMPU_CLK ,Enable data bit HS driver pull up pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 2.--3. " PAD_CILB_PEMPD ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 0.--1. " PAD_CILB_PEMPU ,Enable data bit HS driver pull up pre-emphasis," "No pre-emphasis,,,Max" line.long 0x08 "PHY_CILB_CONTROL0_0,CSI-B Phy and CIL Control" bitfld.long 0x08 8.--13. " CLK_SETTLE ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles,8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,?..." bitfld.long 0x08 6. " BYPASS_LP_SEQ ,CILB_BYPASS_LP_SEQ" "Not bypassed,Bypassed" textline " " bitfld.long 0x08 0.--5. " THS_SETTLE ,Settle time for data lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "CIL_B_INTERRUPT_MASK_0,CSI Control and Interface Logic B Interrupt Mask" bitfld.long 0x0C 6. " ESC_DATA_REC_INT_MASK ,Interrupt Mask for CILB_ESC_DATA_REC" "Disabled,Enabled" bitfld.long 0x0C 5. " ESC_CMD_REC_INT_MASK ,Interrupt Mask for CILB_ESC_CMD_REC" "Disabled,Enabled" bitfld.long 0x0C 4. " CTRL_ERR_INT_MASK ,Interrupt Mask for CILB_CTRL_ERR" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " SYNC_ESC_ERR_INT_MASK ,Interrupt Mask for CILB_SYNC_ESC_ERR" "Disabled,Enabled" bitfld.long 0x0C 1. " SOT_MB_ERR_INT_MASK ,Interrupt Mask for CILB_SOT_MB_ERR" "Disabled,Enabled" bitfld.long 0x0C 0. " SOT_SB_ERR_INT_MASK ,Interrupt Mask for CILB_SOT_SB_ERR" "Disabled,Enabled" rgroup.long (0x970+0x800)++0x07 line.long 0x00 "STATUS_0,CSI Control and Interface Logic B Status" bitfld.long 0x00 6. " ESC_DATA_REC ,Escape Mode Data Received" "No received,Received" bitfld.long 0x00 5. " ESC_CMD_REC ,Escape Mode Command Received" "No received,Received" bitfld.long 0x00 4. " CTRL_ERR ,Control Error" "No error,Error" textline " " bitfld.long 0x00 2. " SYNC_ESC_ERR ,Sync Escape Error" "No error,Error" bitfld.long 0x00 1. " SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x00 0. " SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" line.long 0x04 "STATUS_0,CSI-CILB Control and Interface Logic Status" bitfld.long 0x04 18. " DATA_LANE1_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 17. " DATA_LANE1_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 16. " DATA_LANE1_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 6. " DATA_LANE0_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 5. " DATA_LANE0_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 4. " DATA_LANE0_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 0. " CLK_LANE_CTRL_ERR ,Control Error" "No error,Error" if (((per.l(ad:0x54080000+0x970+0x800))&0x20)==0x20) rgroup.long (0x978+0x800)++0x07 line.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hexmask.long.byte 0x00 0.--7. 1. " ESC_CMD_BYTE ,CIL-B Escape Mode Command Byte" line.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" hexmask.long.byte 0x04 0.--7. 1. " ESC_DATA_BYTE ,CIL-B Escape Mode Data Byte" else hgroup.long (0x978+0x800)++0x07 hide.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hide.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" endif group.long (0x980+0x800)++0x03 line.long 0x00 "CSICIL_SW_SENSOR_B_RESET_0,Sensor B Reset" bitfld.long 0x00 0. " CSICIL_SENSOR_B_RESET ,Reset CSICIL sensor B" "No reset,Reset" tree.end tree "PATTERN GENERATOR" width 21. group.long (0x9C4+0x800)++0x27 line.long 0x00 "CTRL_A_0,Generator Control A" bitfld.long 0x00 2.--3. " MODE_A ,Mode for Sensor A" "DIRECT,PATCH,?..." bitfld.long 0x00 1. " AUTO_INC_A ,Automatic phase increment mode for sensor A" "0,1" bitfld.long 0x00 0. " ENABLE_A ,Enable Pattern Generator for sensor A" "Disabled,Enabled" line.long 0x04 "BLANK_A_0,Blanking for PG" hexmask.long.word 0x04 16.--31. 1. " VBLANK_A ,Vertical Blanking for PG" hexmask.long.word 0x04 0.--15. 1. " HBLANK_A ,Horizontal Blanking for PG" line.long 0x08 "PHASE_A_0,Phase" hexmask.long.word 0x08 0.--13. 1. " PHASE_A ,Initial Phase" line.long 0x0C "RED_FREQ_A_0,Initial frequency" hexmask.long.word 0x0C 16.--29. 1. " RED_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x0C 0.--13. 1. " RED_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x10 "RED_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x10 8.--15. 1. " RED_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x10 0.--7. 1. " RED_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x14 "GREEN_FREQ_A_0,Initial frequency" hexmask.long.word 0x14 16.--29. 1. " GREEN_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x14 0.--13. 1. " GREEN_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x18 "GREEN_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x18 8.--15. 1. " GREEN_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x18 0.--7. 1. " GREEN_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x1C "BLUE_FREQ_A_0,Initial frequency" hexmask.long.word 0x1C 16.--29. 1. " BLUE_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x1C 0.--13. 1. " BLUE_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x20 "BLUE_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x20 8.--15. 1. " BLUE_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x20 0.--7. 1. " BLUE_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x24 "AOHDR_A_0,AOHDR" bitfld.long 0x24 1.--2. " GAIN_RATIO_A ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1" bitfld.long 0x24 0. " ENABLE_A ,AOHDR enable" "Disabled,Enabled" group.long (0x9F8+0x800)++0x27 line.long 0x00 "CTRL_B_0,Generator Control B" bitfld.long 0x00 2.--3. " MODE_B ,Mode for Sensor B" "DIRECT,PATCH,?..." bitfld.long 0x00 1. " AUTO_INC_B ,Automatic phase increment mode for sensor B" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE_B ,Enable Pattern Generator for sensor B" "Disabled,Enabled" line.long 0x04 "BLANK_B_0,Blanking for PG" hexmask.long.word 0x04 16.--31. 1. " VBLANK_B ,Vertical Blanking for PG" hexmask.long.word 0x04 0.--15. 1. " HBLANK_B ,Horizontal Blanking for PG" line.long 0x08 "PHASE_B_0,Phase" hexmask.long.word 0x08 0.--13. 1. " PHASE_B ,Initial Phase" line.long 0x0C "RED_FREQ_B_0,Initial frequency" hexmask.long.word 0x0C 16.--29. 1. " RED_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x0C 0.--13. 1. " RED_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x10 "RED_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x10 8.--15. 1. " RED_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x10 0.--7. 1. " RED_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x14 "GREEN_FREQ_B_0,Initial frequency" hexmask.long.word 0x14 16.--29. 1. " GREEN_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x14 0.--13. 1. " GREEN_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x18 "GREEN_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x18 8.--15. 1. " GREEN_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x18 0.--7. 1. " GREEN_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x1C "BLUE_FREQ_B_0,Initial frequency" hexmask.long.word 0x1C 16.--29. 1. " BLUE_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x1C 0.--13. 1. " BLUE_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x20 "BLUE_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x20 8.--15. 1. " BLUE_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x20 0.--7. 1. " BLUE_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x24 "AOHDR_B_0,AOHDR" bitfld.long 0x24 1.--2. " GAIN_RATIO_B ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1" bitfld.long 0x24 0. " ENABLE_B ,AOHDR enable" "Disabled,Enabled" tree.end textline "" width 20. group.long (0xa2C+0x800)++0x07 line.long 0x00 "DPCM_CTRL_A_0,DPCM control A" bitfld.long 0x00 8.--11. " DPCM_COMPRESSION_RATIO_A ,DPCM A compression ratio" "BYPASS,10_8_10,10_7_10,10_6_10,12_8_12,12_7_12,12_6_12,14_10_14,14_8_14,?..." bitfld.long 0x00 0. " DPCM_PREDICTOR_A ,DPCM A predictor" "Predictor1,Predictor2" line.long 0x04 "DPCM_CTRL_B_0,DPCM control B" bitfld.long 0x04 8.--11. " DPCM_COMPRESSION_RATIO_B ,DPCM B compression ratio" "BYPASS,10_8_10,10_7_10,10_6_10,12_8_12,12_7_12,12_6_12,14_10_14,14_8_14,?..." bitfld.long 0x04 0. " DPCM_PREDICTOR_B ,DPCM B predictor" "Predictor1,Predictor2" group.long (0xa44+0x800)++0x03 line.long 0x00 "STALL_COUNTER_0,Counter" hexmask.long.byte 0x00 8.--15. 1. " STALL_SENSOR_B_COUNT ,Number of cycles to stall sensor B after every EOF" hexmask.long.byte 0x00 0.--7. 1. " STALL_SENSOR_A_COUNT ,Number of cycles to stall sensor A after every EOF" rgroup.long (0xA48+0x800)++0x03 line.long 0x00 "READONLY_STATUS_0,CSI Read Only Status" bitfld.long 0x00 1. " CSI_PPB_ACTIVE ,One only when Pixel Parser B is capturing frame data" "No active,Active" bitfld.long 0x00 0. " CSI_PPA_ACTIVE ,One only when Pixel Parser A is capturing frame data" "No active,Active" group.long (0xA4C+0x800)++0x03 line.long 0x00 "SW_STATUS_RESET_0,Status reset" bitfld.long 0x00 0. " CSI_STATUS_RESET ,Reset CSI status and dbgcnt registers" "No reset,Reset" tree.end tree "CSI2" tree "CAP" width 7. group.long (0x808+0x1000)++0x03 line.long 0x00 "CIL_0,CIL Capability" bitfld.long 0x00 4.--6. " CIL_B_NUMLANES ,CIL B NUMLANES" "NONE,ONE,TWO,?..." bitfld.long 0x00 0.--2. " CIL_A_NUMLANES ,CIL A NUMLANES" "NONE,ONE,TWO,?..." group.long (0x818+0x1000)++0x03 line.long 0x00 "CSI_0,CSI Capability" bitfld.long 0x00 4.--7. " CSIB_EXISTS ,CSIB EXISTS" "NO,YES,?..." bitfld.long 0x00 0.--3. " CSIA_EXISTS ,CSIA EXISTS" "NO,YES,?..." group.long (0x828+0x1000)++0x03 line.long 0x00 "PP_0,PP Capability" bitfld.long 0x00 4.--7. " PPB_EXISTS ,PPB EXISTS" "NO,YES,?..." bitfld.long 0x00 0.--3. " PPA_EXISTS ,PPA EXISTS" "NO,YES,?..." tree.end width 33. tree "Sensor A" group.long (0x838+0x1000)++0x1B line.long 0x00 "INPUT_STREAM_A_CONTROL_0,CSI Input Stream A Control" hexmask.long.word 0x00 16.--24. 1. " CSI_A_SKIP_PACKET_THRESHOLD ,CSI-A Skip Packet Threshold" bitfld.long 0x00 4. " A_SKIP_PACKET_THRESHOLD_ENABLE ,Enables skip packet threshold feature" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " A_BYPASS_ALIGN ,Bypass aligning CSIA and CSIB lanes" "Not bypassed,Bypassed" bitfld.long 0x00 0.--1. " A_DATA_LANE ,CSI-A Data Lane" "1 data lane,2 data lanes,3 data lanes,4 data lanes" line.long 0x04 "PIXEL_STREAM_A_CONTROL0_0,CSI Pixel Stream A Control 0" bitfld.long 0x04 28.--29. " PPA_PAD_FRAME ,CSI Pixel Parser A Pad Frame" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 27. " PPA_HEADER_EC_ENABLE ,CSI Pixel Parser A Packet Header Error Correction Enable" "Enable,Disable" textline " " bitfld.long 0x04 24.--25. " PPA_PAD_SHORT_LINE ,CSI Pixel Parser A Pad Short Line" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 20.--21. " PPA_EMBEDDED_DATA_OPTIONS ,CSI Pixel Parser A Embedded Data Options" "Discard,Embedded,?..." textline " " bitfld.long 0x04 16.--19. " PPA_OUTPUT_FORMAT_OPTIONS ,CSI Pixel Parser A Output Format Options" "Arbitrary,Pixel,Pixel_Rep,Store,?..." bitfld.long 0x04 8. " PPA_WC_CHECK ,CSI Pixel Parser A Data WC Check" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PPA_CRC_CHECK ,CSI Pixel Parser A Data CRC Check" "Disabled,Enabled" bitfld.long 0x04 6. " PPA_WORD_COUNT_SELECT ,CSI Pixel Parser A Word Count Select" "REGISTER,HEADER" textline " " bitfld.long 0x04 5. " PPA_DATA_IDENTIFIER ,CSI Pixel Parser A Data Identifier byte processing" "Disabled,Enabled" bitfld.long 0x04 4. " PPA_PACKET_HEADER ,CSI Pixel Parser A Packet Header processing" "Not sent,Sent" textline " " bitfld.long 0x04 0.--2. " PPA_STREAM_SOURCE ,CSI Pixel Parser A Stream Source Host" "CSI Interface A,CSI Interface B,?..." line.long 0x08 "PIXEL_STREAM_A_CONTROL1_0,CSI Pixel Stream A Control 1" bitfld.long 0x08 4.--7. " PPA_TOP_FIELD_FRAME_MASK ,CSI Pixel Parser A Top Field Frame Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " PPA_TOP_FIELD_FRAME ,CSI Pixel Parser A Top Field Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PIXEL_STREAM_A_GAP_0,CSI Pixel Stream A Gap" hexmask.long.word 0x0C 16.--31. 1. " PPA_FRAME_MIN_GAP ,Minimum number of viclk cycles from end of frame to start of next frame" hexmask.long.word 0x0C 0.--15. 1. " PPA_LINE_MIN_GAP ,Minimum number of viclk cycles from end of previous line to start of next line" line.long 0x10 "PIXEL_STREAM_PPA_COMMAND_0,CSI Pixel Parser A Command" bitfld.long 0x10 12.--15. " PPA_START_MARKER_FRAME_MAX ,CSI Pixel Parser A Start Marker Maximum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " PPA_START_MARKER_FRAME_MIN ,CSI Pixel Parser A Start Marker Minimum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4. " PPA_VSYNC_START_MARKER ,CSI Pixel Parser A VSYNC Start Marker" "FSPKT,VSYNC" bitfld.long 0x10 2. " PPA_SINGLE_SHOT ,CSI Pixel Parser A Single Shot Mode" "Disabled,Enabled" textline " " bitfld.long 0x10 0.--1. " PPA_ENABLE ,CSI Pixel Parser A Enable" "No operation,Enabled,Disabled,RST" line.long 0x14 "PIXEL_STREAM_A_EXPECTED_FRAME_0,CSI Pixel Stream A Expected Frame" hexmask.long.word 0x14 4.--15. 1. " PPA_MAX_CLOCKS ,Maximum Number of viclk clock cycles between line start requests" bitfld.long 0x14 0. " PPA_ENABLE_LINE_TIMEOUT ,PPA_ENABLE_LINE_TIMEOUT" "Disabled,Enabled" line.long 0x18 "PIXEL_PARSER_A_INTERRUPT_MASK_0,CSI Pixel Parser A Interrupt Mask" bitfld.long 0x18 14. " HPA_UNC_HDR_ERR_INT_MASK ,Interrupt Mask for HPA_UNC_HDR_ERR" "Disabled,Enabled" bitfld.long 0x18 10. " PPA_SPARE_STATUS_1_INT_MASK ,Interrupt Mask for PPA_SPARE_STATUS_1" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " PPA_INTERFRAME_LINE_INT_MASK ,Interrupt Mask for PPA_INTERFRAME_LINE" "Disabled,Enabled" bitfld.long 0x18 8. " PPA_EXTRA_SF_INT_MASK ,Interrupt Mask for PPA_EXTRA_SF" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " PPA_SHORT_FRAME_INT_MASK ,Interrupt Mask for PPA_SHORT_FRAME" "Disabled,Enabled" bitfld.long 0x18 6. " PPA_STMERR_INT_MASK ,Interrupt Mask for PPA_STMERR" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " PPA_FIFO_OVRF_INT_MASK ,Interrupt Mask for PPA_FIFO_OVRF" "Disabled,Enabled" bitfld.long 0x18 4. " PPA_PL_CRC_ERR_INT_MASK ,Interrupt Mask for PPA_PL_CRC_ERR" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " PPA_SL_PKT_DROPPED_INT_MASK ,Interrupt Mask for PPA_SL_PKT_DROPPED" "Disabled,Enabled" bitfld.long 0x18 2. " PPA_SL_PROCESSED_INT_MASK ,Interrupt Mask for PPA_SL_PROCESSED" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PPA_ILL_WD_CNT_INT_MASK ,Interrupt Mask for PPA_ILL_WD_CNT" "Disabled,Enabled" bitfld.long 0x18 0. " PPA_HDR_ERR_COR_INT_MASK ,Interrupt Mask for PPA_HDR_ERR_COR" "Disabled,Enabled" rgroup.long (0x854+0x1000)++0x03 line.long 0x00 "PIXEL_PARSER_A_STATUS_0,Pixel Parser A Status" bitfld.long 0x00 14. " HPA_UNC_HDR_ERR ,Uncorrectable Header Error" "No error,Error" bitfld.long 0x00 10. " PPA_SPARE_STATUS_1 ,PPA Spare Status bit" "No line timeout,Line timeout" textline " " bitfld.long 0x00 9. " PPA_INTERFRAME_LINE ,Set when CSI-PPA receives a request to output a line that is not in the active part of the frame output" "No active,Active" bitfld.long 0x00 8. " PPA_EXTRA_SF ,Set when CSI-PPA receives a SF when it is expecting an EF" "Not corrupted,corrupted" textline " " bitfld.long 0x00 7. " PPA_SHORT_FRAME ,Set when CSI-PPA receives a short frame" ",Short Frame" bitfld.long 0x00 6. " PPA_STMERR ,Stream Error" "No error,Error" textline " " bitfld.long 0x00 5. " PPA_FIFO_OVRF ,FIFO Overflow" "Not overflow,Overflow" bitfld.long 0x00 4. " PPA_PL_CRC_ERR ,PayLoad CRC Error" "No error,Error" textline " " bitfld.long 0x00 3. " PPA_SL_PKT_DROPPED ,Short Line Packet Dropped" "Not dropped,Dropped" bitfld.long 0x00 2. " PPA_SL_PROCESSED ,Short Line Processed" "Equal/longer,Shorter" textline " " bitfld.long 0x00 1. " PPA_ILL_WD_CNT ,Illegal Word Count" "No,Yes" bitfld.long 0x00 0. " PPA_HDR_ERR_COR ,Header Error Corrected" "No error,Error" group.long (0x858+0x1000)++0x03 line.long 0x00 "SW_SENSOR_A_RESET_0,SW sensor A" bitfld.long 0x00 0. " SENSOR_A_RESET ,Reset CSI sensor A" "No reset,Reset" tree.end tree "Sensor B" group.long (0x86c+0x1000)++0x1B line.long 0x00 "INPUT_STREAM_B_CONTROL_0,CSI Input Stream B Control" hexmask.long.word 0x00 16.--24. 1. " B_SKIP_PACKET_THRESHOLD ,CSI-B Skip Packet Threshold" bitfld.long 0x00 4. " B_SKIP_PACKET_THRESHOLD_ENABLE ,Enables skip packet threshold feature" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " B_BYPASS_ALIGN ,Bypass aligning CSIB lanes" "Not bypassed,Bypassed" bitfld.long 0x00 0.--1. " B_DATA_LANE ,CSI-B Data Lane" "1 data lane,2 data lanes,3 data lanes,4 data lanes" line.long 0x04 "PIXEL_STREAM_B_CONTROL0_0,CSI Pixel Stream B Control 0" bitfld.long 0x04 28.--29. " PPB_PAD_FRAME ,CSI Pixel Parser B Pad Frame" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 27. " PPB_HEADER_EC_ENABLE ,CSI Pixel Parser B Packet Header Error Correction Enable" "No,Yes" textline " " bitfld.long 0x04 24.--25. " PPB_PAD_SHORT_LINE ,CSI Pixel Parser B Pad Short Line" "PAD0S,PAD1S,NOPAD,?..." bitfld.long 0x04 20.--21. " PPB_EMBEDDED_DATA_OPTIONS ,CSI Pixel Parser B Embedded Data Options" "Discard,Embedded,?..." textline " " bitfld.long 0x04 16.--19. " PPB_OUTPUT_FORMAT_OPTIONS ,CSI Pixel Parser B Output Format Options" "Arbitrary,Pixel,Pixel_Rep,Store,?..." bitfld.long 0x04 8. " PPB_WC_CHECK ,CSI Pixel Parser B Data WC Check" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " PPB_CRC_CHECK ,CSI Pixel Parser B Data CRC Check" "Disabled,Enabled" bitfld.long 0x04 6. " PPB_WORD_COUNT_SELECT ,CSI Pixel Parser B Word Count Select" "REGISTER,HEADER" textline " " bitfld.long 0x04 5. " PPB_DATA_IDENTIFIER ,CSI Pixel Parser B Data Identifier byte processing" "Disabled,Enabled" bitfld.long 0x04 4. " PPB_PACKET_HEADER ,CSI Pixel Parser B Packet Header processing" "Not sent,Sent" textline " " bitfld.long 0x04 0.--2. " PPB_STREAM_SOURCE ,CSI Pixel Parser B Stream Source Host" "CSI Interface A,CSI Interface B,?..." line.long 0x08 "PIXEL_STREAM_B_CONTROL1_0,CSI Pixel Stream B Control 1" bitfld.long 0x08 4.--7. " PPB_TOP_FIELD_FRAME_MASK ,CSI Pixel Parser B Top Field Frame Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " PPB_TOP_FIELD_FRAME ,CSI Pixel Parser B Top Field Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "PIXEL_STREAM_B_GAP_0,CSI Pixel Stream B Gap" hexmask.long.word 0x0C 16.--31. 1. " PPB_FRAME_MIN_GAP ,Minimum number of viclk cycles from end of frame to start of next frame" hexmask.long.word 0x0C 0.--15. 1. " PPB_LINE_MIN_GAP ,Minimum number of viclk cycles from end of previous line to start of next line" line.long 0x10 "PIXEL_STREAM_PPB_COMMAND_0,CSI Pixel Parser B Command" bitfld.long 0x10 12.--15. " PPB_START_MARKER_FRAME_MAX ,CSI Pixel Parser B Start Marker Maximum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. " PPB_START_MARKER_FRAME_MIN ,CSI Pixel Parser B Start Marker Minimum Start Frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 4. " PPB_VSYNC_START_MARKER ,CSI Pixel Parser B VSYNC Start Marker" "FSPKT,VSYNC" bitfld.long 0x10 2. " PPB_SINGLE_SHOT ,CSI Pixel Parser B Single Shot Mode" "Disabled,Enabled" textline " " bitfld.long 0x10 0.--1. " PPB_ENABLE ,CSI Pixel Parser B Enable" "No operation,Enabled,Disabled,RST" line.long 0x14 "PIXEL_STREAM_B_EXPECTED_FRAME_0,CSI Pixel Stream B Expected Frame" hexmask.long.word 0x14 4.--15. 1. " PPB_MAX_CLOCKS ,Maximum Number of viclk clock cycles between line start requests" bitfld.long 0x14 0. " PPB_ENABLE_LINE_TIMEOUT ,PPB_ENABLE_LINE_TIMEOUT" "Disabled,Enabled" line.long 0x18 "PIXEL_PARSER_B_INTERRUPT_MASK_0,CSI Pixel Parser B Interrupt Mask" bitfld.long 0x18 14. " HPB_UNC_HDR_ERR_INT_MASK ,Interrupt Mask for HPB_UNC_HDR_ERR" "Disabled,Enabled" bitfld.long 0x18 10. " PPB_SPARE_STATUS_1_INT_MASK ,Interrupt Mask for PPB_SPARE_STATUS_1" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " PPB_INTERFRAME_LINE_INT_MASK ,Interrupt Mask for PPB_INTERFRAME_LINE" "Disabled,Enabled" bitfld.long 0x18 8. " PPB_EXTRA_SF_INT_MASK ,Interrupt Mask for PPB_EXTRA_SF" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " PPB_SHORT_FRAME_INT_MASK ,Interrupt Mask for PPB_SHORT_FRAME" "Disabled,Enabled" bitfld.long 0x18 6. " PPB_STMERR_INT_MASK ,Interrupt Mask for PPB_STMERR" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " PPB_FIFO_OVRF_INT_MASK ,Interrupt Mask for PPB_FIFO_OVRF" "Disabled,Enabled" bitfld.long 0x18 4. " PPB_PL_CRC_ERR_INT_MASK ,Interrupt Mask for PPB_PL_CRC_ERR" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " PPB_SL_PKT_DROPPED_INT_MASK ,Interrupt Mask for PPB_SL_PKT_DROPPED" "Disabled,Enabled" bitfld.long 0x18 2. " PPB_SL_PROCESSED_INT_MASK ,Interrupt Mask for PPB_SL_PROCESSED" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PPB_ILL_WD_CNT_INT_MASK ,Interrupt Mask for PPB_ILL_WD_CNT" "Disabled,Enabled" bitfld.long 0x18 0. " PPB_HDR_ERR_COR_INT_MASK ,Interrupt Mask for PPB_HDR_ERR_COR" "Disabled,Enabled" rgroup.long (0x888+0x1000)++0x03 line.long 0x00 "PIXEL_PARSER_B_STATUS_0,Pixel Parser B Status" bitfld.long 0x00 14. " HPB_UNC_HDR_ERR ,Uncorrectable Header Error" "No error,Error" bitfld.long 0x00 10. " PPB_SPARE_STATUS_1 ,PPB Spare Status bit" "No line timeout,Line timeout" textline " " bitfld.long 0x00 9. " PPB_INTERFRAME_LINE ,Set when CSI-PPB receives a request to output a line that is not in the active part of the frame output" "No active,Active" bitfld.long 0x00 8. " PPB_EXTRA_SF ,Set when CSI-PPB receives a SF when it is expecting an EF" "Not corrupted,corrupted" textline " " bitfld.long 0x00 7. " PPB_SHORT_FRAME ,Set when CSI-PPB receives a short frame" "0,Short Frame" bitfld.long 0x00 6. " PPB_STMERR ,Stream Error" "No error,Error" textline " " bitfld.long 0x00 5. " PPB_FIFO_OVRF ,FIFO Overflow" "Not overflow,Overflow" bitfld.long 0x00 4. " PPB_PL_CRC_ERR ,PayLoad CRC Error" "No error,Error" textline " " bitfld.long 0x00 3. " PPB_SL_PKT_DROPPED ,Short Line Packet Dropped" "Not dropped,Dropped" bitfld.long 0x00 2. " PPB_SL_PROCESSED ,Short Line Processed" "Equal/longer,Shorter" textline " " bitfld.long 0x00 1. " PPB_ILL_WD_CNT ,Illegal Word Count" "No,Yes" bitfld.long 0x00 0. " PPB_HDR_ERR_COR ,Header Error Corrected" "No error,Error" group.long (0x88C+0x1000)++0x03 line.long 0x00 "SW_SENSOR_B_RESET_0,SW sensor B" bitfld.long 0x00 0. " SENSOR_B_RESET ,Reset CSI sensor B" "No reset,Reset" tree.end textline " " width 25. group.long (0x908+0x1000)++0x07 line.long 0x00 "PHY_CIL_COMMAND_0,CSI Phy and CIL Command" bitfld.long 0x00 8.--9. " CSI_B_PHY_CIL_ENABLE ,CSI B PHY and CIL Enable" "No operation,Enable,Disable,?..." bitfld.long 0x00 0.--1. " CSI_A_PHY_CIL_ENABLE ,CSI A Phy and CIL" "No operation,Enable,Disable,?..." line.long 0x04 "CIL_PAD_CONFIG0_0,CIL Pad Configuration 0" hexmask.long.byte 0x04 8.--15. 1. " PAD_CIL_SPARE ,Spare bit for CIL BIAS Config" tree "CILA" width 28. group.long (0x92c+0x1000)++0x0F line.long 0x00 "PAD_CONFIG0_0,CIL-A Pad Configuration 0" bitfld.long 0x00 31. " PAD_CILA_E_TXBW ,Enable VCLAMP regulator" "Enabled,Disabled" bitfld.long 0x00 28.--30. " PAD_CILA_SLEWDNADJ ,Pull down slew rate adjust" "0,1,2,3,0,-1,-2,-3" bitfld.long 0x00 24.--26. " PAD_CILA_SLEWUPADJ ,Pull up slew rate adjust" "0,1,2,3,0,-1,-2,-3" textline " " bitfld.long 0x00 21.--23. " PAD_CILA_LPDNADJ ,Driver pull down impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 18.--20. " PAD_CILA_LPUPADJ ,Driver pull up impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 16.--17. " PAD_AB_BK_MODE ,PAD_AB_BK_MODE" "two 2x bricks,one 4x brick (A),one 4x brick (B),Illegal" textline " " bitfld.long 0x00 15. " PAD_CILA_BANDWD_IN ,Increase bandwidth of differential receiver" "Disabled,Enabled" bitfld.long 0x00 12.--14. " PAD_CILA_INADJ1 ,bit 1 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 8.--10. " PAD_CILA_INADJ0 ,bit 0 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" textline " " bitfld.long 0x00 4.--6. " PAD_CILA_INADJCLK ,Clock bit input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 3. " PAD_CILA_PDVCLAMP ,Power down regulator which supplies current to serializer/deserializer logic" "Serializer,Deserializer" bitfld.long 0x00 2. " PAD_CILA_PDIO_CLK ,Power down for clock bit" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " PAD_CILA_PDIO ,Power down for each data bit" "0,1,2,3" line.long 0x04 "PAD_CONFIG1_0,CIL-A Pad Configuration 4" hexmask.long.word 0x04 16.--31. 1. " PAD_CILA_SPARE_RO ,Spare Read only bits for CILA Config" hexmask.long.byte 0x04 8.--15. 1. " PAD_CILA_SPARE ,Spare bits for CILA" bitfld.long 0x04 6.--7. " PAD_CILA_PEMPD_CLK ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" textline " " bitfld.long 0x04 4.--5. " PAD_CILA_PEMPU_CLK ,Enable data bit HS driver pull up pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 2.--3. " PAD_CILA_PEMPD ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 0.--1. " PAD_CILA_PEMPU ,Enable data bit HS driver pull up pre-emphasis," "No pre-emphasis,,,Max" line.long 0x08 "PHY_CILA_CONTROL0_0,CSI-A Phy and CIL Control" bitfld.long 0x08 8.--13. " CLK_SETTLE ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles,8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,?..." bitfld.long 0x08 6. " BYPASS_LP_SEQ ,CILA_BYPASS_LP_SEQ" "Not bypassed,Bypassed" textline " " bitfld.long 0x08 0.--5. " THS_SETTLE ,Settle time for data lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "INTERRUPT_MASK_0,CSI Control and Interface Logic A Interrupt Mask" bitfld.long 0x0C 9. " CLK_LANE_CTRL_ERR_INT_MASK ,Interrupt Mask for CILA_CLK_CTRL_ERR" "Disabled,Enabled" bitfld.long 0x0C 6. " ESC_DATA_REC_INT_MASK ,Interrupt Mask for CILA_ESC_DATA_REC" "Disabled,Enabled" bitfld.long 0x0C 5. " ESC_CMD_REC_INT_MASK ,Interrupt Mask for CILA_ESC_CMD_REC" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " CTRL_ERR_INT_MASK ,Interrupt Mask for CILA_CTRL_ERR" "Disabled,Enabled" bitfld.long 0x0C 2. " SYNC_ESC_ERR_INT_MASK ,Interrupt Mask for CILA_SYNC_ESC_ERR" "Disabled,Enabled" bitfld.long 0x0C 1. " SOT_MB_ERR_INT_MASK ,Interrupt Mask for CILA_SOT_MB_ERR" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " SOT_SB_ERR_INT_MASK ,Interrupt Mask for CILA_SOT_SB_ERR" "Disabled,Enabled" rgroup.long (0x93c+0x1000)++0x07 line.long 0x00 "STATUS_0,CSI Control and Interface Logic A Status" bitfld.long 0x00 6. " CILA_ESC_DATA_REC ,Escape Mode Data Received" "No received,Received" bitfld.long 0x00 5. " ESC_CMD_REC ,Escape Mode Command Received" "No received,Received" bitfld.long 0x00 4. " CTRL_ERR ,Control Error" "No error,Error" textline " " bitfld.long 0x00 2. " CILA_SYNC_ESC_ERR ,Sync Escape Error" "No error,Error" bitfld.long 0x00 1. " SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x00 0. " SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" line.long 0x04 "STATUS_0,CSI-CILA Control and Interface Logic Status" bitfld.long 0x04 18. " DATA_LANE1_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 17. " DATA_LANE1_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 16. " DATA_LANE1_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 6. " DATA_LANE0_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 5. " DATA_LANE0_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 4. " DATA_LANE0_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 0. " CLK_LANE_CTRL_ERR ,Control Error" "No error,Error" if (((per.l(ad:0x54080000+0x93c+0x1000))&0x20)==0x20) rgroup.long (0x944+0x1000)++0x07 line.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hexmask.long.byte 0x00 0.--7. 1. " CILA_ESC_CMD_BYTE ,CIL-A Escape Mode Command Byte" line.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" hexmask.long.byte 0x04 0.--7. 1. " CILA_ESC_DATA_BYTE ,CIL-A Escape Mode Data Byte" else hgroup.long (0x944+0x1000)++0x07 hide.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hide.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" endif group.long (0x94c+0x1000)++0x03 line.long 0x00 "CSICIL_SW_SENSOR_A_RESET_0,Sensor A Reset" bitfld.long 0x00 0. " CSICIL_SENSOR_A_RESET ,Reset CSICIL sensor A" "No reset,Reset" tree.end tree "CILB" group.long (0x960+0x1000)++0x0F line.long 0x00 "PAD_CONFIG0_0,CIL-B Pad Configuration 0" bitfld.long 0x00 31. " PAD_CILB_E_TXBW ,Enable VCLAMP regulator" "Enabled,Disabled" bitfld.long 0x00 28.--30. " PAD_CILB_SLEWDNADJ ,Pull down slew rate adjust" "0,1,2,3,0,-1,-2,-3" bitfld.long 0x00 24.--26. " PAD_CILB_SLEWUPADJ ,Pull up slew rate adjust" "0,1,2,3,0,-1,-2,-3" textline " " bitfld.long 0x00 21.--23. " PAD_CILB_LPDNADJ ,Driver pull down impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 18.--20. " PAD_CILB_LPUPADJ ,Driver pull up impedance control" "130ohm,110ohm,130ohm,150ohm,?..." bitfld.long 0x00 15. " PAD_CILB_BANDWD_IN ,Increase bandwidth of differential receiver" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " PAD_CILB_INADJ1 ,bit 1 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 8.--10. " PAD_CILB_INADJ0 ,bit 0 input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" bitfld.long 0x00 4.--6. " PAD_CILB_INADJCLK ,Clock bit input delay trimmer" "0,20ps,40ps,60ps,80ps,100ps,120ps,140ps" textline " " bitfld.long 0x00 3. " PAD_CILB_PDVCLAMP ,Power down regulator which supplies current to serializer/deserializer logic" "Serializer,Deserializer" bitfld.long 0x00 2. " PAD_CILB_PDIO_CLK ,Power down for clock bit" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PAD_CILB_PDIO ,Power down for each data bit" "0,1,2,3" line.long 0x04 "PAD_CONFIG1_0,CIL-B Pad Configuration 4" hexmask.long.word 0x04 16.--31. 1. " PAD_CILB_SPARE_RO ,Spare Read only bits for CILB Config" hexmask.long.byte 0x04 8.--15. 1. " PAD_CILB_SPARE ,Spare bits for CILB" bitfld.long 0x04 6.--7. " PAD_CILB_PEMPD_CLK ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" textline " " bitfld.long 0x04 4.--5. " PAD_CILB_PEMPU_CLK ,Enable data bit HS driver pull up pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 2.--3. " PAD_CILB_PEMPD ,Enable data bit HS driver pull down pre-emphasis" "No pre-emphasis,,,Max" bitfld.long 0x04 0.--1. " PAD_CILB_PEMPU ,Enable data bit HS driver pull up pre-emphasis," "No pre-emphasis,,,Max" line.long 0x08 "PHY_CILB_CONTROL0_0,CSI-B Phy and CIL Control" bitfld.long 0x08 8.--13. " CLK_SETTLE ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles,8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,?..." bitfld.long 0x08 6. " BYPASS_LP_SEQ ,CILB_BYPASS_LP_SEQ" "Not bypassed,Bypassed" textline " " bitfld.long 0x08 0.--5. " THS_SETTLE ,Settle time for data lane" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "CIL_B_INTERRUPT_MASK_0,CSI Control and Interface Logic B Interrupt Mask" bitfld.long 0x0C 6. " ESC_DATA_REC_INT_MASK ,Interrupt Mask for CILB_ESC_DATA_REC" "Disabled,Enabled" bitfld.long 0x0C 5. " ESC_CMD_REC_INT_MASK ,Interrupt Mask for CILB_ESC_CMD_REC" "Disabled,Enabled" bitfld.long 0x0C 4. " CTRL_ERR_INT_MASK ,Interrupt Mask for CILB_CTRL_ERR" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " SYNC_ESC_ERR_INT_MASK ,Interrupt Mask for CILB_SYNC_ESC_ERR" "Disabled,Enabled" bitfld.long 0x0C 1. " SOT_MB_ERR_INT_MASK ,Interrupt Mask for CILB_SOT_MB_ERR" "Disabled,Enabled" bitfld.long 0x0C 0. " SOT_SB_ERR_INT_MASK ,Interrupt Mask for CILB_SOT_SB_ERR" "Disabled,Enabled" rgroup.long (0x970+0x1000)++0x07 line.long 0x00 "STATUS_0,CSI Control and Interface Logic B Status" bitfld.long 0x00 6. " ESC_DATA_REC ,Escape Mode Data Received" "No received,Received" bitfld.long 0x00 5. " ESC_CMD_REC ,Escape Mode Command Received" "No received,Received" bitfld.long 0x00 4. " CTRL_ERR ,Control Error" "No error,Error" textline " " bitfld.long 0x00 2. " SYNC_ESC_ERR ,Sync Escape Error" "No error,Error" bitfld.long 0x00 1. " SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x00 0. " SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" line.long 0x04 "STATUS_0,CSI-CILB Control and Interface Logic Status" bitfld.long 0x04 18. " DATA_LANE1_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 17. " DATA_LANE1_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 16. " DATA_LANE1_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 6. " DATA_LANE0_CTRL_ERR ,Control Error" "No error,Error" bitfld.long 0x04 5. " DATA_LANE0_SOT_MB_ERR ,Start of Transmission Multi Bit Error" "No error,Error" bitfld.long 0x04 4. " DATA_LANE0_SOT_SB_ERR ,Start of Transmission Single Bit Error" "No error,Error" textline " " bitfld.long 0x04 0. " CLK_LANE_CTRL_ERR ,Control Error" "No error,Error" if (((per.l(ad:0x54080000+0x970+0x1000))&0x20)==0x20) rgroup.long (0x978+0x1000)++0x07 line.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hexmask.long.byte 0x00 0.--7. 1. " ESC_CMD_BYTE ,CIL-B Escape Mode Command Byte" line.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" hexmask.long.byte 0x04 0.--7. 1. " ESC_DATA_BYTE ,CIL-B Escape Mode Data Byte" else hgroup.long (0x978+0x1000)++0x07 hide.long 0x00 "ESCAPE_MODE_COMMAND_0,Escape Mode Command" hide.long 0x04 "ESCAPE_MODE_DATA_0,Escape Mode Data" endif group.long (0x980+0x1000)++0x03 line.long 0x00 "CSICIL_SW_SENSOR_B_RESET_0,Sensor B Reset" bitfld.long 0x00 0. " CSICIL_SENSOR_B_RESET ,Reset CSICIL sensor B" "No reset,Reset" tree.end tree "PATTERN GENERATOR" width 21. group.long (0x9C4+0x1000)++0x27 line.long 0x00 "CTRL_A_0,Generator Control A" bitfld.long 0x00 2.--3. " MODE_A ,Mode for Sensor A" "DIRECT,PATCH,?..." bitfld.long 0x00 1. " AUTO_INC_A ,Automatic phase increment mode for sensor A" "0,1" bitfld.long 0x00 0. " ENABLE_A ,Enable Pattern Generator for sensor A" "Disabled,Enabled" line.long 0x04 "BLANK_A_0,Blanking for PG" hexmask.long.word 0x04 16.--31. 1. " VBLANK_A ,Vertical Blanking for PG" hexmask.long.word 0x04 0.--15. 1. " HBLANK_A ,Horizontal Blanking for PG" line.long 0x08 "PHASE_A_0,Phase" hexmask.long.word 0x08 0.--13. 1. " PHASE_A ,Initial Phase" line.long 0x0C "RED_FREQ_A_0,Initial frequency" hexmask.long.word 0x0C 16.--29. 1. " RED_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x0C 0.--13. 1. " RED_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x10 "RED_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x10 8.--15. 1. " RED_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x10 0.--7. 1. " RED_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x14 "GREEN_FREQ_A_0,Initial frequency" hexmask.long.word 0x14 16.--29. 1. " GREEN_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x14 0.--13. 1. " GREEN_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x18 "GREEN_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x18 8.--15. 1. " GREEN_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x18 0.--7. 1. " GREEN_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x1C "BLUE_FREQ_A_0,Initial frequency" hexmask.long.word 0x1C 16.--29. 1. " BLUE_VERT_INIT_FREQ_A ,Initial vertical frequency" hexmask.long.word 0x1C 0.--13. 1. " BLUE_HOR_INIT_FREQ_A ,Initial horizontal frequency" line.long 0x20 "BLUE_FREQ_RATE_A_0,Rate of change frequency" hexmask.long.byte 0x20 8.--15. 1. " BLUE_VERT_FREQ_RATE_A ,Rate of change of vertical frequency" hexmask.long.byte 0x20 0.--7. 1. " BLUE_HOR_FREQ_RATE_A ,Rate of change of horizontal frequency" line.long 0x24 "AOHDR_A_0,AOHDR" bitfld.long 0x24 1.--2. " GAIN_RATIO_A ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1" bitfld.long 0x24 0. " ENABLE_A ,AOHDR enable" "Disabled,Enabled" group.long (0x9F8+0x1000)++0x27 line.long 0x00 "CTRL_B_0,Generator Control B" bitfld.long 0x00 2.--3. " MODE_B ,Mode for Sensor B" "DIRECT,PATCH,?..." bitfld.long 0x00 1. " AUTO_INC_B ,Automatic phase increment mode for sensor B" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE_B ,Enable Pattern Generator for sensor B" "Disabled,Enabled" line.long 0x04 "BLANK_B_0,Blanking for PG" hexmask.long.word 0x04 16.--31. 1. " VBLANK_B ,Vertical Blanking for PG" hexmask.long.word 0x04 0.--15. 1. " HBLANK_B ,Horizontal Blanking for PG" line.long 0x08 "PHASE_B_0,Phase" hexmask.long.word 0x08 0.--13. 1. " PHASE_B ,Initial Phase" line.long 0x0C "RED_FREQ_B_0,Initial frequency" hexmask.long.word 0x0C 16.--29. 1. " RED_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x0C 0.--13. 1. " RED_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x10 "RED_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x10 8.--15. 1. " RED_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x10 0.--7. 1. " RED_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x14 "GREEN_FREQ_B_0,Initial frequency" hexmask.long.word 0x14 16.--29. 1. " GREEN_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x14 0.--13. 1. " GREEN_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x18 "GREEN_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x18 8.--15. 1. " GREEN_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x18 0.--7. 1. " GREEN_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x1C "BLUE_FREQ_B_0,Initial frequency" hexmask.long.word 0x1C 16.--29. 1. " BLUE_VERT_INIT_FREQ_B ,Initial vertical frequency" hexmask.long.word 0x1C 0.--13. 1. " BLUE_HOR_INIT_FREQ_B ,Initial horizontal frequency" line.long 0x20 "BLUE_FREQ_RATE_B_0,Rate of change frequency" hexmask.long.byte 0x20 8.--15. 1. " BLUE_VERT_FREQ_RATE_B ,Rate of change of vertical frequency" hexmask.long.byte 0x20 0.--7. 1. " BLUE_HOR_FREQ_RATE_B ,Rate of change of horizontal frequency" line.long 0x24 "AOHDR_B_0,AOHDR" bitfld.long 0x24 1.--2. " GAIN_RATIO_B ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1" bitfld.long 0x24 0. " ENABLE_B ,AOHDR enable" "Disabled,Enabled" tree.end textline "" width 20. group.long (0xa2C+0x1000)++0x07 line.long 0x00 "DPCM_CTRL_A_0,DPCM control A" bitfld.long 0x00 8.--11. " DPCM_COMPRESSION_RATIO_A ,DPCM A compression ratio" "BYPASS,10_8_10,10_7_10,10_6_10,12_8_12,12_7_12,12_6_12,14_10_14,14_8_14,?..." bitfld.long 0x00 0. " DPCM_PREDICTOR_A ,DPCM A predictor" "Predictor1,Predictor2" line.long 0x04 "DPCM_CTRL_B_0,DPCM control B" bitfld.long 0x04 8.--11. " DPCM_COMPRESSION_RATIO_B ,DPCM B compression ratio" "BYPASS,10_8_10,10_7_10,10_6_10,12_8_12,12_7_12,12_6_12,14_10_14,14_8_14,?..." bitfld.long 0x04 0. " DPCM_PREDICTOR_B ,DPCM B predictor" "Predictor1,Predictor2" group.long (0xa44+0x1000)++0x03 line.long 0x00 "STALL_COUNTER_0,Counter" hexmask.long.byte 0x00 8.--15. 1. " STALL_SENSOR_B_COUNT ,Number of cycles to stall sensor B after every EOF" hexmask.long.byte 0x00 0.--7. 1. " STALL_SENSOR_A_COUNT ,Number of cycles to stall sensor A after every EOF" rgroup.long (0xA48+0x1000)++0x03 line.long 0x00 "READONLY_STATUS_0,CSI Read Only Status" bitfld.long 0x00 1. " CSI_PPB_ACTIVE ,One only when Pixel Parser B is capturing frame data" "No active,Active" bitfld.long 0x00 0. " CSI_PPA_ACTIVE ,One only when Pixel Parser A is capturing frame data" "No active,Active" group.long (0xA4C+0x1000)++0x03 line.long 0x00 "SW_STATUS_RESET_0,Status reset" bitfld.long 0x00 0. " CSI_STATUS_RESET ,Reset CSI status and dbgcnt registers" "No reset,Reset" tree.end width 0x0B tree.end tree "MIPI D-PHY CALIBRATION" base ad:0x700E3000 width 25. if (((per.l(ad:0x700E3000+0x00))&0x3000000)==0x00) group.long 0x00++0x07 line.long 0x00 "MIPI_CAL_CTRL_0,Calibration Control Register" bitfld.long 0x00 26.--29. " MIPI_CAL_NOISE_FLT ,Sensitivity of the noise filter" ",,2,3,4,5,?..." bitfld.long 0x00 24.--25. " MIPI_CAL_PRESCALE ,Auto-Cal calibration step prescale" "0.1us,0.5us,1.0us,1.5us" bitfld.long 0x00 4. " MIPI_CAL_CLKEN_OVR ,Clock enable overflow" "GATED,ALWAYS_ON" textline " " bitfld.long 0x00 1. " MIPI_CAL_AUTOCAL_EN ,Calibration is triggered periodically" "Disabled,Enabled" rbitfld.long 0x00 0. " MIPI_CAL_STARTCAL ,Starts the calibration state machine" "Disabled,Enabled" line.long 0x04 "AUTOCAL_CTRL0_0,Auto-calibration period in number of APB sys clk cycles" else group.long 0x00++0x07 line.long 0x00 "MIPI_CAL_CTRL_0,Calibration Control Register" bitfld.long 0x00 26.--29. " MIPI_CAL_NOISE_FLT ,Sensitivity of the noise filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--25. " MIPI_CAL_PRESCALE ,Auto-Cal calibration step prescale" "0.1us,0.5us,1.0us,1.5us" bitfld.long 0x00 4. " MIPI_CAL_CLKEN_OVR ,Clock enable overflow" "GATED,ALWAYS_ON" textline " " bitfld.long 0x00 1. " MIPI_CAL_AUTOCAL_EN ,Calibration is triggered periodically" "Disabled,Enabled" rbitfld.long 0x00 0. " MIPI_CAL_STARTCAL ,Starts the calibration state machine" "Disabled,Enabled" line.long 0x04 "AUTOCAL_CTRL0_0,Auto-calibration period in number of APB sys clk cycles" endif if (((per.l(ad:0x700E3000+0x08))&0x1)==0x00) group.long 0x08++0x03 line.long 0x00 "CIL_MIPI_CAL_STATUS_0,CIL MIPI Calibrate Status" eventfld.long 0x00 31. " MIPI_AUTO_CAL_DONE_DSID ,MIPI auto calibrate done for DSID" "In progress,Done" eventfld.long 0x00 30. " MIPI_AUTO_CAL_DONE_DSIC ,MIPI auto calibrate done for DSIC" "In progress,Done" eventfld.long 0x00 29. " MIPI_AUTO_CAL_DONE_DSIB ,MIPI auto calibrate done for DSIB" "In progress,Done" textline " " eventfld.long 0x00 28. " MIPI_AUTO_CAL_DONE_DSIA ,MIPI auto calibrate done for DSI" "In progress,Done" eventfld.long 0x00 25. " MIPI_AUTO_CAL_DONE_CSIF ,MIPI auto calibrate done for CSIF" "In progress,Done" eventfld.long 0x00 24. " MIPI_AUTO_CAL_DONE_CSIE ,MIPI auto calibrate done for CSIE" "In progress,Done" textline " " eventfld.long 0x00 23. " MIPI_AUTO_CAL_DONE_CSID ,MIPI auto calibrate done for CSI" "In progress,Done" eventfld.long 0x00 22. " MIPI_AUTO_CAL_DONE_CSIC ,Debug bit MIPI auto calibrate done for CSI" "In progress,Done" eventfld.long 0x00 21. " MIPI_AUTO_CAL_DONE_CSIB ,MIPI auto calibrate done for CSI" "In progress,Done" textline " " eventfld.long 0x00 20. " MIPI_AUTO_CAL_DONE_CSIA ,MIPI auto calibrate done for CSI" "In progress,Done" eventfld.long 0x00 16. " MIPI_AUTO_CAL_DONE ,MIPI auto calibrate done" "In progress,Done" rbitfld.long 0x00 12.--15. " MIPI_CAL_DRIV_DN_ADJ ,Driver Pull-down calibration code generated by MIPI auto calibrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x00 8.--11. " MIPI_CAL_DRIV_UP_ADJ ,Driver Pull up calibration code generated by MIPI auto calibrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 4.--7. " MIPI_CAL_TERMADJ ,Termination code generated by MIPI auto calibrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 0. " MIPI_CAL_ACTIVE ,Auto calibrate is active" "Not active,Active" else group.long 0x08++0x03 line.long 0x00 "CIL_MIPI_CAL_STATUS_0,CIL MIPI Calibrate Status" eventfld.long 0x00 31. " MIPI_AUTO_CAL_DONE_DSID ,MIPI auto calibrate done for DSID" "In progress,Done" eventfld.long 0x00 30. " MIPI_AUTO_CAL_DONE_DSIC ,MIPI auto calibrate done for DSIC" "In progress,Done" eventfld.long 0x00 29. " MIPI_AUTO_CAL_DONE_DSIB ,MIPI auto calibrate done for DSIB" "In progress,Done" textline " " eventfld.long 0x00 28. " MIPI_AUTO_CAL_DONE_DSIA ,MIPI auto calibrate done for DSI" "In progress,Done" eventfld.long 0x00 25. " MIPI_AUTO_CAL_DONE_CSIF ,MIPI auto calibrate done for CSIF" "In progress,Done" eventfld.long 0x00 24. " MIPI_AUTO_CAL_DONE_CSIE ,MIPI auto calibrate done for CSIE" "In progress,Done" textline " " eventfld.long 0x00 23. " MIPI_AUTO_CAL_DONE_CSID ,MIPI auto calibrate done for CSI" "In progress,Done" eventfld.long 0x00 22. " MIPI_AUTO_CAL_DONE_CSIC ,Debug bit MIPI auto calibrate done for CSI" "In progress,Done" eventfld.long 0x00 21. " MIPI_AUTO_CAL_DONE_CSIB ,MIPI auto calibrate done for CSI" "In progress,Done" textline " " eventfld.long 0x00 20. " MIPI_AUTO_CAL_DONE_CSIA ,MIPI auto calibrate done for CSI" "In progress,Done" eventfld.long 0x00 16. " MIPI_AUTO_CAL_DONE ,MIPI auto calibrate done" "In progress,Done" textline " " rbitfld.long 0x00 0. " MIPI_CAL_ACTIVE ,Auto calibrate is active" "Not active,Active" endif rgroup.long 0x0C++0x03 line.long 0x00 "CIL_MIPI_CAL_STATUS_2_0,MIPI CLK Calibration Status 2" bitfld.long 0x00 6. " MIPI_CLK_AUTO_CAL_DONE_DSID ,MIPI CLK auto calibration done for DSID" "In progress,Done" bitfld.long 0x00 5. " MIPI_CLK_AUTO_CAL_DONE_DSIC ,MIPI CLK auto calibration done for DSIC" "In progress,Done" bitfld.long 0x00 4. " MIPI_CLK_AUTO_CAL_DONE_DSIB ,MIPI CLK auto calibration done for DSIB" "In progress,Done" textline " " bitfld.long 0x00 3. " MIPI_CLK_AUTO_CAL_DONE_DSIA ,MIPI CLK auto calibration done for DSIA" "In progress,Done" textline " " width 27. group.long 0x14++0x03 line.long 0x00 "CILA_MIPI_CAL_CONFIG_0,Calibration Settings for CIL-A MIPI Pads" bitfld.long 0x00 30. " MIPI_CAL_OVERIDEA ,Calibration State machine setting for channel A" "Normal operation,Use the register values" bitfld.long 0x00 21. " MIPI_CAL_SELA ,Select the CSIA pads for auto calibration" "No selected,Selected" bitfld.long 0x00 0.--4. " MIPI_CAL_TERMOSA ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." group.long 0x18++0x03 line.long 0x00 "CILB_MIPI_CAL_CONFIG_0,Calibration Settings for CIL-B MIPI Pads" bitfld.long 0x00 30. " MIPI_CAL_OVERIDEB ,Calibration State machine setting for channel B" "Normal operation,Use the register values" bitfld.long 0x00 21. " MIPI_CAL_SELB ,Select the CSIB pads for auto calibration" "No selected,Selected" bitfld.long 0x00 0.--4. " MIPI_CAL_TERMOSB ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." group.long 0x1C++0x03 line.long 0x00 "CILC_MIPI_CAL_CONFIG_0,Calibration Settings for CIL-C MIPI Pads" bitfld.long 0x00 30. " MIPI_CAL_OVERIDEC ,Calibration State machine setting for channel C" "Normal operation,Use the register values" bitfld.long 0x00 21. " MIPI_CAL_SELC ,Select the CSIC pads for auto calibration" "No selected,Selected" bitfld.long 0x00 0.--4. " MIPI_CAL_TERMOSC ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." group.long 0x20++0x03 line.long 0x00 "CILD_MIPI_CAL_CONFIG_0,Calibration Settings for CIL-D MIPI Pads" bitfld.long 0x00 30. " MIPI_CAL_OVERIDED ,Calibration State machine setting for channel D" "Normal operation,Use the register values" bitfld.long 0x00 21. " MIPI_CAL_SELD ,Select the CSID pads for auto calibration" "No selected,Selected" bitfld.long 0x00 0.--4. " MIPI_CAL_TERMOSD ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." group.long 0x24++0x03 line.long 0x00 "CILE_MIPI_CAL_CONFIG_0,Calibration Settings for CIL-E MIPI Pads" bitfld.long 0x00 30. " MIPI_CAL_OVERIDEE ,Calibration State machine setting for channel E" "Normal operation,Use the register values" bitfld.long 0x00 21. " MIPI_CAL_SELE ,Select the CSIE pads for auto calibration" "No selected,Selected" bitfld.long 0x00 0.--4. " MIPI_CAL_TERMOSE ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." group.long 0x28++0x03 line.long 0x00 "CILF_MIPI_CAL_CONFIG_0,Calibration Settings for CIL-F MIPI Pads" bitfld.long 0x00 30. " MIPI_CAL_OVERIDEF ,Calibration State machine setting for channel F" "Normal operation,Use the register values" bitfld.long 0x00 21. " MIPI_CAL_SELF ,Select the CSIF pads for auto calibration" "No selected,Selected" bitfld.long 0x00 0.--4. " MIPI_CAL_TERMOSF ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." textline " " group.long 0x38++0x0F line.long 0x00 "DSIA_MIPI_CAL_CONFIG_0,Calibration Settings for DSIA MIPI Pad's Channel A (lower two data lanes)" bitfld.long 0x00 30. " MIPI_CAL_OVERIDEDSIA ,Calibration state machine setting for DSIA" "Normal operation,Use registers values" bitfld.long 0x00 21. " MIPI_CAL_SELDSIA ,Select the DSIA pad's for auto calibration" "No selected,Selected" bitfld.long 0x00 16.--20. " MIPI_CAL_HSPDOSDSIA ,Offset for HSPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." textline " " bitfld.long 0x00 8.--12. " MIPI_CAL_HSPUOSDSIA ,Offset for HSPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x00 0.--4. " MIPI_CAL_TERMOSDSIA ,Offset for TERMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." line.long 0x04 "DSIB_MIPI_CAL_CONFIG_0,Calibration Settings for DSIA MIPI Pad's Channel B (upper two data lanes)" bitfld.long 0x04 30. " MIPI_CAL_OVERIDEDSIB ,Calibration state machine setting for DSIA" "Normal operation,Use registers values" bitfld.long 0x04 21. " MIPI_CAL_SELDSIB ,Select the DSIA pad's data lanes for auto calibration" "No selected,Selected" bitfld.long 0x04 16.--20. " MIPI_CAL_HSPDOSDSIB ,Offset for HSPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." textline " " bitfld.long 0x04 8.--12. " MIPI_CAL_HSPUOSDSIB ,Offset for HSPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x04 0.--4. " MIPI_CAL_TERMOSDSIB ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." line.long 0x08 "DSIC_MIPI_CAL_CONFIG_0,Calibration settings for DSIB MIPI pad's Channel A (lower two data lanes)" bitfld.long 0x08 30. " MIPI_CAL_OVERIDEDSIC ,Calibration state machine setting for channel A" "Normal operation,Use registers values" bitfld.long 0x08 21. " MIPI_CAL_SELDSIC ,Select the DSIB pad's for auto calibration" "No selected,Selected" bitfld.long 0x08 16.--20. " MIPI_CAL_HSPDOSDSIC ,Offset for HSPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 8.--12. " MIPI_CAL_HSPUOSDSIC ,Offset for HSPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x08 0.--4. " MIPI_CAL_TERMOSDSIC ,Offset for TERMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." line.long 0x0C "DSID_MIPI_CAL_CONFIG_0,Calibration settings for DSIB MIPI pad's Channel B (upper two data lanes)" bitfld.long 0x0C 30. " MIPI_CAL_OVERIDEDSID ,Calibration state machine setting for channel B" "Normal operation,Use registers values" bitfld.long 0x0C 21. " MIPI_CAL_SELDSID ,Select the DSIB pad's for auto calibration" "No selected,Selected" bitfld.long 0x0C 16.--20. " MIPI_CAL_HSPDOSDSID ,Offset for HSPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." textline " " bitfld.long 0x0C 8.--12. " MIPI_CAL_HSPUOSDSID ,Offset for HSPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x0C 0.--4. " MIPI_CAL_TERMOSDSID ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." group.long 0x58++0x1F line.long 0x00 "BIAS_PAD_CFG0_0,MIPI Bias Pad Configuration Register" bitfld.long 0x00 1. " MIPI_BIAS_PAD_PDVCLAMP ,Power down regulator which supplies current to pre-driver logic" "Power Up,Power down" bitfld.long 0x00 0. " MIPI_BIAS_PAD_E_VCLAMP_REF ,Enable VCLAMP reference voltage" "Disabled,Enabled" line.long 0x04 "MIPI_BIAS_PAD_CFG1_0,MIPI Bias Pad Configuration Register" bitfld.long 0x04 24.--26. " PAD_TEST_SEL ,Controls which signal to be routed to TEST_OUT" "VAUXP,RUP,RDN,VREG,TBD,TBD,TBD,TBD" bitfld.long 0x04 16.--18. " PAD_DRIV_DN_REF ,Adjust internal reference level for drive pull-down calibration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. " PAD_DRIV_UP_REF ,Adjust internal reference level for drive pull-up calibration" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 0.--2. " PAD_TERM_REF ,Adjust internal reference level for termination calibration" "0,1,2,3,4,5,6,7" line.long 0x08 "CAL_MIPI_BIAS_PAD_CFG2_0,MIPI Bias Pad Configuration Register 2" bitfld.long 0x08 16.--18. " PAD_VCLAMP_LEVEL ,VCLAMP level adjustment" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " PAD_SPARE ,Spare bit for MIPI Bias Config" bitfld.long 0x08 4.--6. " PAD_VAUXP_LEVEL ,VAUXP level adjustment" "No adjustment,105%,110%,115%,No adjustment,95%,90%,85%" textline " " bitfld.long 0x08 1. " PAD_PDVREG ,Power down voltage regulator" "Power Up,Power down" bitfld.long 0x08 0. " PAD_VBYPASS ,Bypass bang gap voltage reference" "Not bypassed,Bypassed" line.long 0x0C "DSIA_MIPI_CAL_CONFIG_2_0,Calibration Settings for DSIA Pad Channel A" bitfld.long 0x0C 30. " MIPI_CAL_CLKSELDSIA ,Calibration state machine setting for channel A" "Normal operation,Use the register values" bitfld.long 0x0C 21. " MIPI_CAL_CLKSELDSIA ,Select the DSIA PAD channel A for clock lane auto calibration" "No selected,Selected" textline " " bitfld.long 0x0C 8.--12. " MIPI_CAL_HSCLKPDOSDSIA ,Offset for HSCLKPDADJ going to channel A (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x0C 0.--4. " MIPI_CAL_HSCLKPUOSDSIA ,Offset for HSCLKPUADJ going to channel A (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." line.long 0x10 "DSIB_MIPI_CAL_CONFIG_2_0,Calibration Settings for DSIA Pad Channel B" bitfld.long 0x10 30. " MIPI_CAL_CLKOVERIDEDSIB ,Calibration state machine setting for channel B" "Normal operation,Use the register values" bitfld.long 0x10 21. " MIPI_CAL_CLKSELDSIB ,Select the DSIB PAD channel B for clock lane auto calibration" "No selected,Selected" textline " " bitfld.long 0x10 8.--12. " MIPI_CAL_HSCLKPUOSDSIB ,Offset for HSCLKPDADJ going to channel B (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x10 0.--4. " MIPI_CAL_HSCLKPUOSDSIB ,Offset for HSCLKPUADJ going to channel B (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." line.long 0x14 "DSIC_MIPI_CAL_CONFIG_2_0,Calibration Settings for DSIB Pad Channel A" bitfld.long 0x14 30. " MIPI_CAL_CLKOVERIDEC ,Calibration state machine setting for channel A" "Normal operation,Use the register values" bitfld.long 0x14 21. " MIPI_CAL_CLKSELDSIC ,Select the DSIB PAD channel A for clock lane auto calibration" "No selected,Selected" textline " " bitfld.long 0x14 8.--12. " MIPI_CAL_HSCLKPDOSDSIC ,Offset for HSCLKPDADJ going to channel A (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x14 0.--4. " MIPI_CAL_HSCLKPUOSDSIC ,Offset for HSCLKPUADJ going to channel A (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." line.long 0x18 "DSID_MIPI_CAL_CONFIG_2_0,Calibration Settings for DSIB Pad Channel B" bitfld.long 0x18 30. " MIPI_CAL_CLKOVERIDED ,Calibration state machine setting for channel B" "Normal operation,Use the register values" bitfld.long 0x18 21. " MIPI_CAL_CLKSELDSID ,Select the DSIB PAD channel B for clock lane auto calibration" "No selected,Selected" textline " " bitfld.long 0x18 8.--12. " MIPI_CAL_HSCLKPDOSDSID ,Offset for HSCLKPDADJ going to channel B (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x18 0.--4. " MIPI_CAL_HSCLKPUOSDSID ,Offset for HSCLKPUADJ going to channel B (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." width 0x0B tree.end tree "Video Input" tree "VI Registers" base ad:0x54080000 tree "VI Configuration" width 28. group.long 0x00++0x0B line.long 0x00 "CFG_VI_INCR_SYNCPT_0,CFG_VI_INCR_SYNCPT_0" hexmask.long.byte 0x00 8.--15. 1. " VI_I2C_COND ,Condition mapped from raise/wait" hexmask.long.byte 0x00 0.--7. 1. " VI_I2C_INDX ,Syncpt index value" line.long 0x04 "CFG_VI_INCR_SYNCPT_CNTRL_0,CFG_VI_INCR_SYNCPT_CNTRL_0" bitfld.long 0x04 8. " VI_INCR_SYNCPT_NO_STALL ,VI INCR SYNCPT NO STALL" "Not running,Running" bitfld.long 0x04 0. " INCR_SYNCPT_SOFT_RESET ,Reset all internal state of the client syncpt block" "No reset,Reset" line.long 0x08 "CFG_VI_INCR_SYNCPT_ERROR_0,CFG_VI_INCR_SYNCPT_ERROR_0" textline " " width 25. group.long 0x20++0x07 line.long 0x00 "CTXSW_0,Context Switch Register" rbitfld.long 0x00 28.--31. " NEXT_CHANNEL ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--25. 1. " NEXT_CLASS ,Next requested class" bitfld.long 0x00 12.--15. " CURR_CHANNEL ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 11. " AUTO_ACK ,Automatically acknowledge any incoming context switch requests" "Manual,AutoACK" hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" line.long 0x04 "INTSTATUS_0,Context Switch Register" eventfld.long 0x04 0. " CTXSW_INT ,Context switch interrupt status" "No interrupt,Interrupt" group.long 0x38++0x0B line.long 0x00 "PWM_CONTROL_0,VI Pulse Width Modulation Control" hexmask.long.byte 0x00 24.--31. 1. " PWM_COUNTER ,PWM Counter 8-bit value" bitfld.long 0x00 20.--21. " PWM_MODE ,PWM Mode Continuous" "Continuous,Single,Counter,?..." bitfld.long 0x00 4. " PWM_DIRECTION ,PWM Direction" "Incrementing,Decrementing" textline " " bitfld.long 0x00 0. " PWM_ENABLE ,PWM Enable" "Disabled,Enabled" line.long 0x04 "CFG_PWM_HIGH_PULSE_0,PWM High Pulse Period" line.long 0x08 "CFG_PWM_LOW_PULSE_0,PWM Low Pulse Period" group.long 0x44++0x03 line.long 0x00 "PWM_SELECT_PULSE_A_0,PWM Pulse Select A" group.long 0x48++0x03 line.long 0x00 "PWM_SELECT_PULSE_B_0,PWM Pulse Select B" group.long 0x4C++0x03 line.long 0x00 "PWM_SELECT_PULSE_C_0,PWM Pulse Select C" group.long 0x50++0x03 line.long 0x00 "PWM_SELECT_PULSE_D_0,PWM Pulse Select D" if (((per.l(ad:0x54080000+0x64))&0x1030000)==0x1030000) group.long 0x64++0x03 line.long 0x00 "CFG_VGP1_0,VI VGP1 Input/Output Config/Data" bitfld.long 0x00 24. " VGP1_INPUT_ENABLE ,VGP1 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP1 ,Pin Output Select VGP1" "VGP1_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP1_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP1_INPUT_DATA ,VGP1 pin Input Data" "Low,High" bitfld.long 0x00 0. " VGP1_OUTPUT_DATA ,VGP1 pin Output Data" "Low,High" elif (((per.l(ad:0x54080000+0x64))&0x1030000)==(0x1000000||0x1010000||0x1020000)) group.long 0x64++0x03 line.long 0x00 "CFG_VGP1_0,VI VGP1 Input/Output Config/Data" bitfld.long 0x00 24. " VGP1_INPUT_ENABLE ,VGP1 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP1 ,Pin Output Select VGP1" "VGP1_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP1_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP1_INPUT_DATA ,VGP1 pin Input Data" "Low,High" elif (((per.l(ad:0x54080000+0x64))&0x1030000)==0x30000) group.long 0x64++0x03 line.long 0x00 "CFG_VGP1_0,VI VGP1 Input/Output Config/Data" bitfld.long 0x00 24. " VGP1_INPUT_ENABLE ,VGP1 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP1 ,Pin Output Select VGP1" "VGP1_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP1_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VGP1_OUTPUT_DATA ,VGP1 pin Output Data" "Low,High" else group.long 0x64++0x03 line.long 0x00 "CFG_VGP1_0,VI VGP1 Input/Output Config/Data" bitfld.long 0x00 24. " VGP1_INPUT_ENABLE ,VGP1 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP1 ,Pin Output Select VGP1" "VGP1_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP1_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" endif if (((per.l(ad:0x54080000+0x68))&0x1030000)==0x1030000) group.long 0x68++0x03 line.long 0x00 "CFG_VGP2_0,VI VGP2 Input/Output Config/Data" bitfld.long 0x00 24. " VGP2_INPUT_ENABLE ,VGP2 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP2 ,Pin Output Select VGP2" "VGP2_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP2_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP2_INPUT_DATA ,VGP2 pin Input Data" "Low,High" bitfld.long 0x00 0. " VGP2_OUTPUT_DATA ,VGP2 pin Output Data" "Low,High" elif (((per.l(ad:0x54080000+0x68))&0x1030000)==(0x1000000||0x1010000||0x1020000)) group.long 0x68++0x03 line.long 0x00 "CFG_VGP2_0,VI VGP2 Input/Output Config/Data" bitfld.long 0x00 24. " VGP2_INPUT_ENABLE ,VGP2 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP2 ,Pin Output Select VGP2" "VGP2_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP2_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP2_INPUT_DATA ,VGP2 pin Input Data" "Low,High" elif (((per.l(ad:0x54080000+0x68))&0x1030000)==0x30000) group.long 0x68++0x03 line.long 0x00 "CFG_VGP2_0,VI VGP2 Input/Output Config/Data" bitfld.long 0x00 24. " VGP2_INPUT_ENABLE ,VGP2 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP2 ,Pin Output Select VGP2" "VGP2_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP2_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VGP2_OUTPUT_DATA ,VGP2 pin Output Data" "Low,High" else group.long 0x68++0x03 line.long 0x00 "CFG_VGP2_0,VI VGP2 Input/Output Config/Data" bitfld.long 0x00 24. " VGP2_INPUT_ENABLE ,VGP2 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP2 ,Pin Output Select VGP2" "VGP2_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP2_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" endif if (((per.l(ad:0x54080000+0x6C))&0x1030000)==0x1030000) group.long 0x6C++0x03 line.long 0x00 "CFG_VGP3_0,VI VGP3 Input/Output Config/Data" bitfld.long 0x00 24. " VGP3_INPUT_ENABLE ,VGP3 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP3 ,Pin Output Select VGP3" "VGP3_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP3_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP3_INPUT_DATA ,VGP3 pin Input Data" "Low,High" bitfld.long 0x00 0. " VGP3_OUTPUT_DATA ,VGP3 pin Output Data" "Low,High" elif (((per.l(ad:0x54080000+0x6C))&0x1030000)==(0x1000000||0x1010000||0x1020000)) group.long 0x6C++0x03 line.long 0x00 "CFG_VGP3_0,VI VGP3 Input/Output Config/Data" bitfld.long 0x00 24. " VGP3_INPUT_ENABLE ,VGP3 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP3 ,Pin Output Select VGP3" "VGP3_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP3_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP3_INPUT_DATA ,VGP3 pin Input Data" "Low,High" elif (((per.l(ad:0x54080000+0x6C))&0x1030000)==0x30000) group.long 0x6C++0x03 line.long 0x00 "CFG_VGP3_0,VI VGP3 Input/Output Config/Data" bitfld.long 0x00 24. " VGP3_INPUT_ENABLE ,VGP3 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP3 ,Pin Output Select VGP3" "VGP3_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP3_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VGP3_OUTPUT_DATA ,VGP3 pin Output Data" "Low,High" else group.long 0x6C++0x03 line.long 0x00 "CFG_VGP3_0,VI VGP3 Input/Output Config/Data" bitfld.long 0x00 24. " VGP3_INPUT_ENABLE ,VGP3 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP3 ,Pin Output Select VGP3" "VGP3_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP3_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" endif if (((per.l(ad:0x54080000+0x70))&0x1030000)==0x1030000) group.long 0x70++0x03 line.long 0x00 "CFG_VGP4_0,VI VGP4 Input/Output Config/Data" bitfld.long 0x00 24. " VGP4_INPUT_ENABLE ,VGP4 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP4 ,Pin Output Select VGP4" "VGP4_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP4_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP4_INPUT_DATA ,VGP4 pin Input Data" "Low,High" bitfld.long 0x00 0. " VGP4_OUTPUT_DATA ,VGP4 pin Output Data" "Low,High" elif (((per.l(ad:0x54080000+0x70))&0x1030000)==(0x1000000||0x1010000||0x1020000)) group.long 0x70++0x03 line.long 0x00 "CFG_VGP4_0,VI VGP4 Input/Output Config/Data" bitfld.long 0x00 24. " VGP4_INPUT_ENABLE ,VGP4 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP4 ,Pin Output Select VGP4" "VGP4_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP4_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP4_INPUT_DATA ,VGP4 pin Input Data" "Low,High" elif (((per.l(ad:0x54080000+0x70))&0x1030000)==0x30000) group.long 0x70++0x03 line.long 0x00 "CFG_VGP4_0,VI VGP4 Input/Output Config/Data" bitfld.long 0x00 24. " VGP4_INPUT_ENABLE ,VGP4 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP4 ,Pin Output Select VGP4" "VGP4_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP4_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VGP4_OUTPUT_DATA ,VGP4 pin Output Data" "Low,High" else group.long 0x70++0x03 line.long 0x00 "CFG_VGP4_0,VI VGP4 Input/Output Config/Data" bitfld.long 0x00 24. " VGP4_INPUT_ENABLE ,VGP4 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP4 ,Pin Output Select VGP4" "VGP4_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP4_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" endif if (((per.l(ad:0x54080000+0x74))&0x1030000)==0x1030000) group.long 0x74++0x03 line.long 0x00 "CFG_VGP5_0,VI VGP5 Input/Output Config/Data" bitfld.long 0x00 24. " VGP5_INPUT_ENABLE ,VGP5 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP5 ,Pin Output Select VGP5" "VGP5_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP5_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP5_INPUT_DATA ,VGP5 pin Input Data" "Low,High" bitfld.long 0x00 0. " VGP5_OUTPUT_DATA ,VGP5 pin Output Data" "Low,High" elif (((per.l(ad:0x54080000+0x74))&0x1030000)==(0x1000000||0x1010000||0x1020000)) group.long 0x74++0x03 line.long 0x00 "CFG_VGP5_0,VI VGP5 Input/Output Config/Data" bitfld.long 0x00 24. " VGP5_INPUT_ENABLE ,VGP5 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP5 ,Pin Output Select VGP5" "VGP5_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP5_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP5_INPUT_DATA ,VGP5 pin Input Data" "Low,High" elif (((per.l(ad:0x54080000+0x74))&0x1030000)==0x30000) group.long 0x74++0x03 line.long 0x00 "CFG_VGP5_0,VI VGP5 Input/Output Config/Data" bitfld.long 0x00 24. " VGP5_INPUT_ENABLE ,VGP5 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP5 ,Pin Output Select VGP5" "VGP5_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP5_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VGP5_OUTPUT_DATA ,VGP5 pin Output Data" "Low,High" else group.long 0x74++0x03 line.long 0x00 "CFG_VGP5_0,VI VGP5 Input/Output Config/Data" bitfld.long 0x00 24. " VGP5_INPUT_ENABLE ,VGP5 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP5 ,Pin Output Select VGP5" "VGP5_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP5_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" endif if (((per.l(ad:0x54080000+0x78))&0x1030000)==0x1030000) group.long 0x78++0x03 line.long 0x00 "CFG_VGP6_0,VI VGP6 Input/Output Config/Data" bitfld.long 0x00 24. " VGP6_INPUT_ENABLE ,VGP6 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP6 ,Pin Output Select VGP6" "VGP6_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP6_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP6_INPUT_DATA ,VGP6 pin Input Data" "Low,High" bitfld.long 0x00 0. " VGP6_OUTPUT_DATA ,VGP6 pin Output Data" "Low,High" elif (((per.l(ad:0x54080000+0x78))&0x1030000)==(0x1000000||0x1010000||0x1020000)) group.long 0x78++0x03 line.long 0x00 "CFG_VGP6_0,VI VGP6 Input/Output Config/Data" bitfld.long 0x00 24. " VGP6_INPUT_ENABLE ,VGP6 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP6 ,Pin Output Select VGP6" "VGP6_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP6_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 8. " VGP6_INPUT_DATA ,VGP6 pin Input Data" "Low,High" elif (((per.l(ad:0x54080000+0x78))&0x1030000)==0x30000) group.long 0x78++0x03 line.long 0x00 "CFG_VGP6_0,VI VGP6 Input/Output Config/Data" bitfld.long 0x00 24. " VGP6_INPUT_ENABLE ,VGP6 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP6 ,Pin Output Select VGP6" "VGP6_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP6_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VGP6_OUTPUT_DATA ,VGP6 pin Output Data" "Low,High" else group.long 0x78++0x03 line.long 0x00 "CFG_VGP6_0,VI VGP6 Input/Output Config/Data" bitfld.long 0x00 24. " VGP6_INPUT_ENABLE ,VGP6 pin Input Enable" "Disabled,Enabled" bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP6 ,Pin Output Select VGP6" "VGP6_OUTPUT_DATA,1" bitfld.long 0x00 16. " VGP6_OUTPUT_ENABLE ,VGPn pin Output Enable" "Disabled,Enabled" endif textline " " width 33. group.long 0x8C++0x07 line.long 0x00 "CFG_INTERRUPT_MASK_0,Interrupt Mask" bitfld.long 0x00 6. " VGP6_INT_MASK ,VGP6 pin Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 5. " VGP5_INT_MASK ,VGP5 pin Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 4. " VGP4_INT_MASK ,VGP4 pin Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " VGP3_INT_MASK ,VGP3 pin Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 2. " VGP2_INT_MASK ,VGP2 pin Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 1. " VGP1_INT_MASK ,VGP1 pin Interrupt Mask" "Disabled,Enabled" line.long 0x04 "CFG_INTERRUPT_TYPE_SELECT_0,Interrupt Type Select" bitfld.long 0x04 6. " VGP6_INT_POLARITY ,VGP6 pin Interrupt Type" "Low,High" bitfld.long 0x04 5. " VGP5_INT_POLARITY ,VGP5 pin Interrupt Type" "Low,High" bitfld.long 0x04 4. " VGP4_INT_POLARITY ,VGP4 pin Interrupt Type" "Low,High" textline " " bitfld.long 0x04 3. " VGP3_INT_POLARITY ,VGP3 pin Interrupt Type" "Low,High" bitfld.long 0x04 2. " VGP2_INT_POLARITY ,VGP2 pin Interrupt Type" "Low,High" bitfld.long 0x04 1. " VGP1_INT_POLARITY ,VGP1 pin Interrupt Type" "Low,High" group.long 0x94++0x03 line.long 0x00 "CFG_INTERRUPT_POLARITY_SELECT_0,Interrupt Polarity Select" bitfld.long 0x00 6. " VGP6_INT_POLARITY ,VGP6 pin Interrupt Type" "Low,High" bitfld.long 0x00 5. " VGP5_INT_POLARITY ,VGP5 pin Interrupt Type" "Low,High" bitfld.long 0x00 4. " VGP4_INT_POLARITY ,VGP4 pin Interrupt Type" "Low,High" textline " " bitfld.long 0x00 3. " VGP3_INT_POLARITY ,VGP3 pin Interrupt Type" "Low,High" bitfld.long 0x00 2. " VGP2_INT_POLARITY ,VGP2 pin Interrupt Type" "Low,High" bitfld.long 0x00 1. " VGP1_INT_POLARITY ,VGP1 pin Interrupt Type" "Low,High" rgroup.long 0x98++0x03 line.long 0x00 "CFG_INTERRUPT_STATUS_0,Interrupt Enable" bitfld.long 0x00 6. " VGP6_INT_STATUS ,VGP6 pin Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGP5_INT_STATUS ,VGP5 pin Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 4. " VGP4_INT_STATUS ,VGP4 pin Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " VGP3_INT_STATUS ,VGP3 pin Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 2. " VGP2_INT_STATUS ,VGP2 pin Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 1. " VGP1_INT_STATUS ,VGP1 pin Interrupt Status" "No interrupt,Interrupt" group.long 0xac++0x03 line.long 0x00 "CFG_VGP_SYNCPT_CONFIG_0,VGP syncpt config" bitfld.long 0x00 4.--6. " SYNCPT_VGPY_SELECT ,Selects the VGP for SYNCPT condition VGP_1_RECD" "1,2,3,4,5,6,?..." bitfld.long 0x00 0.--2. " SYNCPT_VGPX_SELECT ,Selects the VGP for SYNCPT condition VGP_0_RECD" "1,2,3,4,5,6,?..." group.long 0xb4++0x07 line.long 0x00 "CFG_VI_SW_RESET_0,SW Reset" bitfld.long 0x00 0. " MCCIF_RESET ,Resets the MCCIF interface" "No reset,Reset" line.long 0x04 "CFG_CG_CTRL_0,CG Control" bitfld.long 0x04 0. " CG_2ND_LEVEL_EN ,Second-level clock gating control" "Disabled,Enabled" sif (cpu()=="TEGRAX1") group.long 0xDC++0x07 line.long 0x00 "CFG_VI_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control Register" bitfld.long 0x00 20. " VI_RCLK_OVR_MODE ,VI_RCLK_OVR_MODE" "LEGACY,ON" bitfld.long 0x00 19. " VI_WCLK_OVR_MODE ,VI_WCLK_OVR_MODE" "LEGACY,ON" bitfld.long 0x00 18. " VI_CCLK_OVERRIDE ,VI_CCLK_OVERRIDE" "Not override,Override" textline " " bitfld.long 0x00 17. " VI_RCLK_OVERRIDE ,VI_RCLK_OVERRIDE" "Not override,Override" bitfld.long 0x00 16. " VI_WCLK_OVERRIDE ,VI_WCLK_OVERRIDE" "Not override,Override" bitfld.long 0x00 1. " VI_MCCIF_RDMC_RDFAST ,VI_MCCIF_RDMC_RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VI_MCCIF_WRCL_MCLE2X ,VI_MCCIF_WRCL_MCLE2X" "Disabled,Enabled" line.long 0x04 "CFG_TIMEOUT_WCOAL_VI_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x04 0.--7. 1. " VIWSB_WCOAL_TMVAL ,VIWSB_WCOAL_TMVAL" group.long 0xE8++0x03 line.long 0x00 "CFG_DVFS_0,Dynamic Voltage Frequency Shift Register" hexmask.long.byte 0x00 24.--30. 1. " SENSORB_LB_THRESHOLD ,Defines the DVFS threshold for the VI Line buffer for Sensor B" hexmask.long.byte 0x00 16.--22. 1. " SENSORA_LB_THRESHOLD ,Defines the DVFS threshold for the VI Line buffer for Sensor A" hexmask.long.word 0x00 0.--8. 1. " MCCIF_THRESHOLD ,This field defines the DVFS threshold for the MCCIF FIFO" group.long 0xF0++0x07 line.long 0x00 "CFG_DVFS_1_0,Dynamic Voltage Frequency Shift Register" hexmask.long.byte 0x00 24.--30. 1. " SENSORF_LB_THRESHOLD ,Defines the DVFS threshold for VI Line buffer for Sensor B" hexmask.long.byte 0x00 16.--22. 1. " SENSORE_LB_THRESHOLD ,Defines the DVFS threshold for VI Line buffer for Sensor B" hexmask.long.byte 0x00 8.--14. 1. " SENSORD_LB_THRESHOLD ,Defines the DVFS threshold for VI Line buffer for Sensor B" textline " " hexmask.long.byte 0x00 0.--6. 1. " SENSORC_LB_THRESHOLD ,Defines the DVFS threshold for VI Line buffer for Sensor A" line.long 0x04 "CFG_DVFSFIFO_CNTRL_0,CFG DVFSFIFO CNTRL 0" hexmask.long.word 0x04 0.--8. 1. " DVFS_WR_LIMIT_VAL ,DVFS_WR_LIMIT_VAL" else group.long 0xE4++0x03 line.long 0x00 "CFG_VI_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control Register and Clock Gating Control" bitfld.long 0x00 20. " VI_RCLK_OVR_MODE ,VI_RCLK_OVR_MODE" "LEGANCY,ON" bitfld.long 0x00 19. " VI_WCLK_OVR_MODE ,VI_WCLK_OVR_MODE" "LEGANCY,ON" bitfld.long 0x00 18. " VI_CCLK_OVERRIDE ,VI_CCLK_OVERRIDE" "Not override,Override" textline " " bitfld.long 0x00 17. " VI_RCLK_OVERRIDE ,VI_RCLK_OVERRIDE" "Not override,Override" bitfld.long 0x00 16. " VI_WCLK_OVERRIDE ,VI_WCLK_OVERRIDE" "Not override,Override" bitfld.long 0x00 1. " VI_MCCIF_RDMC_RDFAST ,VI_MCCIF_RDMC_RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VI_MCCIF_WRCL_MCLE2X ,VI_MCCIF_WRCL_MCLE2X" "Disabled,Enabled" group.long 0xF0++0x03 line.long 0x00 "CFG_DVFS_0,Dynamic Voltage Frequency Shift Register" hexmask.long.byte 0x00 24.--30. 1. " SENSORB_LB_THRESHOLD ,Defines the DVFS threshold for the VI Line buffer for Sensor B" hexmask.long.byte 0x00 16.--22. 1. " SENSORA_LB_THRESHOLD ,Defines the DVFS threshold for the VI Line buffer for Sensor A" hexmask.long.byte 0x00 0.--6. 1. " MCCIF_THRESHOLD ,Defines the DVFS threshold for the MCCIF FIFO" endif tree.end tree "VI Input CSI Interface Registers" tree "CSI 0" width 18. group.long 0x100++0x03 line.long 0x00 "CSI_0_SW_RESET_0,SW reset" bitfld.long 0x00 4. " ISPINTF_RESET ,Reset ISP interface" "No reset,Reset" bitfld.long 0x00 3. " MCINTF_RESET ,Reset Memory Client i/f logic" "No reset,Reset" bitfld.long 0x00 2. " PF_RESET ,Reset Pixel format logic" "No reset,Reset" textline " " bitfld.long 0x00 1. " SENSORCTL_RESET ,Reset Sensor control logic" "No reset,Reset" bitfld.long 0x00 0. " SHADOW_RESET ,Reset Shadow copy logic" "No reset,Reset" textline " " width 34. rgroup.long 0x104++0x03 line.long 0x00 "CSI_0_SINGLE_SHOT_0,Single shot state" bitfld.long 0x00 0. " CAPTURE ,single shot capture for the VI channel" "No active,Active" group.long 0x108++0x1B line.long 0x00 "CSI_0_SINGLE_SHOT_STATE_UPDATE_0,Single shot state update" bitfld.long 0x00 0. " CAPTURE_GOOD_FRAME ,State of previous frame" "Not correct,Correct" line.long 0x04 "CSI_0_IMAGE_DEF_0,CSI 0 IMAGE DEF 0" bitfld.long 0x04 24. " BYPASS_PXL_TRANSFORM ,Bypass pixel transformation VI" "Not bypassed,Bypassed" hexmask.long.byte 0x04 16.--23. 1. " FORMAT ,Pixel memory format for the VI channel In the enums below" bitfld.long 0x04 8. " INTERLEAVING_MODE ,Enable Inverting Mode" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " DEST_ISPB ,Send VI channel data to ISPB" "Disabled,Enabled" bitfld.long 0x04 1. " DEST_ISPA ,Send VI channel data to ISPA" "Disabled,Enabled" bitfld.long 0x04 0. " DEST_MEM ,Send VI channel data to MEM" "Disabled,Enabled" line.long 0x08 "CSI_0_RGB2Y_CTRL_0,RGB Control" bitfld.long 0x08 18.--23. " B2Y_COEFF ,Blue coefficient used to convert RGB pixel data to Y for writing to Memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 10.--15. " G2Y_COEFF ,Green coefficient used to convert RGB pixel data to Y for writing to Memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 2.--7. " R2Y_COEFF ,Red coefficient used to convert RGB pixel data to Y for writing to Memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "CSI_0_MEM_TILING_0,Memory Tiling" hexmask.long.byte 0x0C 0.--7. 1. " TILING_FORMAT ,VI channel memory surface tiling format" line.long 0x10 "CSI_0_CSI_IMAGE_SIZE_0,Image size" hexmask.long.word 0x10 16.--31. 1. " HEIGHT ,Height of VI channel frame in Lines" hexmask.long.word 0x10 0.--15. 1. " WIDTH ,Width of VI channel frame in Lines" line.long 0x14 "CSI_0_CSI_IMAGE_SIZE_WC_0,Image size" hexmask.long.word 0x14 0.--15. 1. " WORDCOUNT ,VI channel word count for the Image" line.long 0x18 "CSI_0_CSI_IMAGE_DT_0,CSI 0 CSI IMAGE DT 0" bitfld.long 0x18 12. " INTERLACED_VIDEO ,VI channel interlaced video format enable" "Disabled,Enabled" bitfld.long 0x18 8.--9. " VC ,VI channel virtual channel ID" "0,1,2,3" bitfld.long 0x18 0.--5. " DATA_TYPE ,VI channel input data type" ",,,,,,,,,,,,,,,,,,EMBED,,,,,,YUV420_8,YUV420_10,LEG_YUV420_8,,YUV420CSPS_8,YUV420CSPS_10,YUV422_8,YUV422_10,RGB444,RGB555,RGB565,RGB666,RGB888,,,,RAW6,RAW7,RAW8,RAW10,RAW12,RAW14,,,ARB_DT1,ARB_DT2,ARB_DT3,ARB_DT4,,,,,,,,,,,," group.long 0x124++0x07 line.long 0x00 "CSI_0_SURFACE0_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_0_SURFACE0_OFFSET_LSB_0,Base address LSB" group.long 0x12C++0x07 line.long 0x00 "CSI_0_SURFACE1_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_0_SURFACE1_OFFSET_LSB_0,Base address LSB" group.long 0x134++0x07 line.long 0x00 "CSI_0_SURFACE2_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_0_SURFACE2_OFFSET_LSB_0,Base address LSB" group.long 0x13C++0x07 line.long 0x00 "CSI_0_SURFACE0_BF_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_0_SURFACE0_BF_OFFSET_LSB_0,Base address LSB" group.long 0x144++0x07 line.long 0x00 "CSI_0_SURFACE1_BF_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_0_SURFACE1_BF_OFFSET_LSB_0,Base address LSB" group.long 0x14C++0x07 line.long 0x00 "CSI_0_SURFACE2_BF_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_0_SURFACE2_BF_OFFSET_LSB_0,Base address LSB" textline " " width 25. group.long 0x154++0x03 line.long 0x00 "CSI_0_SURFACE0_STRIDE_0,CSI_0_SURFACE0_STRIDE_0" hexmask.long.word 0x00 0.--15. 1. " STRIDE_0 ,Stride for Surface 0 in Memory" group.long 0x158++0x03 line.long 0x00 "CSI_0_SURFACE1_STRIDE_0,CSI_0_SURFACE1_STRIDE_0" hexmask.long.word 0x00 0.--15. 1. " STRIDE_1 ,Stride for Surface 1 in Memory" group.long 0x15C++0x03 line.long 0x00 "CSI_0_SURFACE2_STRIDE_0,CSI_0_SURFACE2_STRIDE_0" hexmask.long.word 0x00 0.--15. 1. " STRIDE_2 ,Stride for Surface 2 in Memory" group.long 0x160++0x07 line.long 0x00 "CSI_0_SURFACE_HEIGHT0_0,Surface Height" bitfld.long 0x00 0.--3. " GOBS ,Number of GOBs stacked verically to form a block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CSI_0_ISPINTF_CONFIG_0,ISP Configure" bitfld.long 0x04 1.--2. " CHROMA_POS ,Stream format" "MPEG1,MPEG2,," bitfld.long 0x04 0. " DO_YUV_INTERP ,Chroma Interpolator" "Bypass,Run YUV" textline " " width 24. group.long 0x184++0x03 line.long 0x00 "CSI_1_ERROR_STATUS_0,Error Status" eventfld.long 0x00 5. " WATCHDOG_INT ,Occurs when Watchdog timer expires" "Not occurred,Occurred" eventfld.long 0x00 4. " CSI_FRAME_ERROR ,Flagged if EOF field from CSI has FRAME_ERROR" "No error,Error" eventfld.long 0x00 3. " FRAME_HEIGHT_LONG_ERROR ,Flagged if frame height is larger than HEIGHT" "No error,Error" textline " " eventfld.long 0x00 2. " FRAME_HEIGHT_SHORT_ERROR ,Flagged if frame height is smaller than HEIGHT" "No error,Error" eventfld.long 0x00 1. " LINE_WIDTH_LONG_ERROR ,Flagged if frame line width is larger than WIDTH" "No error,Error" eventfld.long 0x00 0. " LINE_WIDTH_SHORT_ERROR ,Flagged if frame line width is smaller than WIDTH" "No error,Error" rgroup.long 0x188++0x0B line.long 0x00 "CSI_0_ERROR_INT_MASK_0,Error Interrupt Mask" bitfld.long 0x00 5. " WATCHDOG_INT_MASK ,Watchdog Timer 0 Interrupt Mask This controls interrupt when WATCHDOG trigger event occurs" "Disabled,Enabled" bitfld.long 0x00 4. " CSI_FRAME_INT_MASK ,CSI error interrupt mask" "No error,Error" bitfld.long 0x00 3. " FRAME_HEIGHT_LONG_INT_MASK ,Frame height long error interrupt mask" "No error,Error" textline " " bitfld.long 0x00 2. " FRAME_HEIGHT_SHORT_INT_MASK ,Frame height short error interrupt mask" "No error,Error" bitfld.long 0x00 1. " LINE_WIDTH_LONG_INT_MASK ,Line width long error interrupt mask" "No error,Error" bitfld.long 0x00 0. " LINE_WIDTH_SHORT_INT_MASK ,Line width short error interrupt mask" "No error,Error" line.long 0x04 "CSI_0_WD_CTRL_0,Watch Dog Timer Control Register" bitfld.long 0x04 0. " WD_ENABLE ,Watch Dog Timer Enable" "Disabled,Enabled" line.long 0x08 "CSI_0_WD_PERIOD_0,Watch Dog Timer Period" tree.end tree "CSI 1" width 18. group.long 0x200++0x03 line.long 0x00 "CSI_1_SW_RESET_0,SW reset" bitfld.long 0x00 4. " ISPINTF_RESET ,Reset ISP interface" "No reset,Reset" bitfld.long 0x00 3. " MCINTF_RESET ,Reset Memory Client i/f logic" "No reset,Reset" bitfld.long 0x00 2. " PF_RESET ,Reset Pixel format logic" "No reset,Reset" textline " " bitfld.long 0x00 1. " SENSORCTL_RESET ,Reset Sensor control logic" "No reset,Reset" bitfld.long 0x00 0. " SHADOW_RESET ,Reset Shadow copy logic" "No reset,Reset" textline " " width 34. rgroup.long 0x204++0x03 line.long 0x00 "CSI_1_SINGLE_SHOT_0,Single shot state" bitfld.long 0x00 0. " CAPTURE ,single shot capture for the VI channel" "No active,Active" group.long 0x208++0x1B line.long 0x00 "CSI_1_SINGLE_SHOT_STATE_UPDATE_0,Single shot state update" bitfld.long 0x00 0. " CAPTURE_GOOD_FRAME ,State of previous frame" "Not correct,Correct" line.long 0x04 "CSI_1_IMAGE_DEF_0,CSI_1_IMAGE_DEF_0" bitfld.long 0x04 24. " BYPASS_PXL_TRANSFORM ,Bypass pixel transformation VI" "Not bypassed,Bypassed" hexmask.long.byte 0x04 16.--23. 1. " FORMAT ,Pixel memory format for the VI channel In the enums below" bitfld.long 0x04 8. " INTERLEAVING_MODE ,Enable Inverting Mode" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " DEST_ISPB ,Send VI channel data to ISPB" "Disabled,Enabled" bitfld.long 0x04 1. " DEST_ISPA ,Send VI channel data to ISPA" "Disabled,Enabled" bitfld.long 0x04 0. " DEST_MEM ,Send VI channel data to MEM" "Disabled,Enabled" line.long 0x08 "CSI_1_RGB2Y_CTRL_0,RGB Control" bitfld.long 0x08 18.--23. " B2Y_COEFF ,Blue coefficient used to convert RGB pixel data to Y for writing to Memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 10.--15. " G2Y_COEFF ,Green coefficient used to convert RGB pixel data to Y for writing to Memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 2.--7. " R2Y_COEFF ,Red coefficient used to convert RGB pixel data to Y for writing to Memory" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "CSI_1_MEM_TILING_0,Memory Tiling" hexmask.long.byte 0x0C 0.--7. 1. " TILING_FORMAT ,VI channel memory surface tiling format" line.long 0x10 "CSI_1_CSI_IMAGE_SIZE_0,Image size" hexmask.long.word 0x10 16.--31. 1. " HEIGHT ,Height of VI channel frame in Lines" hexmask.long.word 0x10 0.--15. 1. " WIDTH ,Width of VI channel frame in Lines" line.long 0x14 "CSI_1_CSI_IMAGE_SIZE_WC_0,Image size" hexmask.long.word 0x14 0.--15. 1. " WORDCOUNT ,VI channel word count for the Image" line.long 0x18 "CSI_1_CSI_IMAGE_DT_0,CSI_1_CSI_IMAGE_DT_0" bitfld.long 0x18 12. " INTERLACED_VIDEO ,VI channel interlaced video format enable" "Disabled,Enabled" bitfld.long 0x18 8.--9. " VC ,VI channel virtual channel ID" "0,1,2,3" bitfld.long 0x18 0.--5. " DATA_TYPE ,VI channel input data type" ",,,,,,,,,,,,,,,,,,EMBED,,,,,,YUV420_8,YUV420_10,LEG_YUV420_8,,YUV420CSPS_8,YUV420CSPS_10,YUV422_8,YUV422_10,RGB444,RGB555,RGB565,RGB666,RGB888,,,,RAW6,RAW7,RAW8,RAW10,RAW12,RAW14,,,ARB_DT1,ARB_DT2,ARB_DT3,ARB_DT4,,,,,,,,,,,," group.long 0x224++0x07 line.long 0x00 "CSI_1_SURFACE0_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_1_SURFACE0_OFFSET_LSB_0,Base address LSB" group.long 0x22C++0x07 line.long 0x00 "CSI_1_SURFACE1_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_1_SURFACE1_OFFSET_LSB_0,Base address LSB" group.long 0x234++0x07 line.long 0x00 "CSI_1_SURFACE2_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_1_SURFACE2_OFFSET_LSB_0,Base address LSB" group.long 0x23C++0x07 line.long 0x00 "CSI_1_SURFACE0_BF_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_1_SURFACE0_BF_OFFSET_LSB_0,Base address LSB" group.long 0x244++0x07 line.long 0x00 "CSI_1_SURFACE1_BF_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_1_SURFACE1_BF_OFFSET_LSB_0,Base address LSB" group.long 0x24C++0x07 line.long 0x00 "CSI_1_SURFACE2_BF_OFFSET_MSB_0,Base address MSB" bitfld.long 0x00 0.--1. " OFFSET_MSB_0 ,Base address MSB for Surface 0 in Memory" "0,1,2,3" line.long 0x04 "CSI_1_SURFACE2_BF_OFFSET_LSB_0,Base address LSB" textline " " width 25. group.long 0x254++0x03 line.long 0x00 "CSI_1_SURFACE0_STRIDE_0,CSI_1_SURFACE0_STRIDE_0" hexmask.long.word 0x00 0.--15. 1. " STRIDE_0 ,Stride for Surface 0 in Memory" group.long 0x258++0x03 line.long 0x00 "CSI_1_SURFACE1_STRIDE_0,CSI_1_SURFACE1_STRIDE_0" hexmask.long.word 0x00 0.--15. 1. " STRIDE_1 ,Stride for Surface 1 in Memory" group.long 0x25C++0x03 line.long 0x00 "CSI_1_SURFACE2_STRIDE_0,CSI_1_SURFACE2_STRIDE_0" hexmask.long.word 0x00 0.--15. 1. " STRIDE_2 ,Stride for Surface 2 in Memory" group.long 0x260++0x07 line.long 0x00 "CSI_1_SURFACE_HEIGHT0_0,Surface Height" bitfld.long 0x00 0.--3. " GOBS ,Number of GOBs stacked verically to form a block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CSI_1_ISPINTF_CONFIG_0,ISP Configure" bitfld.long 0x04 1.--2. " CHROMA_POS ,Stream format" "MPEG1,MPEG2,," bitfld.long 0x04 0. " DO_YUV_INTERP ,Chroma Interpolator" "Bypass,Run YUV" textline " " width 24. group.long 0x284++0x03 line.long 0x00 "CSI_1_ERROR_STATUS_0,Error Status" rbitfld.long 0x00 5. " WATCHDOG_INT ,Occurs when Watchdog timer expires" "Not occurred,Occurred" rbitfld.long 0x00 4. " CSI_FRAME_ERROR ,Flagged if EOF field from CSI has FRAME_ERROR" "No error,Error" eventfld.long 0x00 3. " FRAME_HEIGHT_LONG_ERROR ,Flagged if frame height is larger than HEIGHT" "No error,Error" textline " " eventfld.long 0x00 2. " FRAME_HEIGHT_SHORT_ERROR ,Flagged if frame height is smaller than HEIGHT" "No error,Error" eventfld.long 0x00 1. " LINE_WIDTH_LONG_ERROR ,Flagged if frame line width is larger than WIDTH" "No error,Error" eventfld.long 0x00 0. " LINE_WIDTH_SHORT_ERROR ,Flagged if frame line width is smaller than WIDTH" "No error,Error" rgroup.long 0x288++0x0B line.long 0x00 "CSI_1_ERROR_INT_MASK_0,Error Interrupt Mask" bitfld.long 0x00 5. " WATCHDOG_INT_MASK ,Watchdog Timer 0 Interrupt Mask This controls interrupt when WATCHDOG trigger event occurs" "Disabled,Enabled" bitfld.long 0x00 4. " CSI_FRAME_INT_MASK ,CSI error interrupt mask" "No error,Error" bitfld.long 0x00 3. " FRAME_HEIGHT_LONG_INT_MASK ,Frame height long error interrupt mask" "No error,Error" textline " " bitfld.long 0x00 2. " FRAME_HEIGHT_SHORT_INT_MASK ,Frame height short error interrupt mask" "No error,Error" bitfld.long 0x00 1. " LINE_WIDTH_LONG_INT_MASK ,Line width long error interrupt mask" "No error,Error" bitfld.long 0x00 0. " LINE_WIDTH_SHORT_INT_MASK ,Line width short error interrupt mask" "No error,Error" line.long 0x04 "CSI_1_WD_CTRL_0,Watch Dog Timer Control Register" bitfld.long 0x04 0. " WD_ENABLE ,Watch Dog Timer Enable" "Disabled,Enabled" line.long 0x08 "CSI_1_WD_PERIOD_0,Watch Dog Timer Period" tree.end tree.end width 0x0B tree.end tree "VI I2C Registers" base ad:0x546C0000 width 38. group.long 0x00++0x0B line.long 0x00 "INCR_SYNCPT_0,VI I2C INCR SYNCPT 0" hexmask.long.byte 0x00 8.--15. 1. " COND ,Condition mapped from raise/wait" hexmask.long.byte 0x00 0.--7. 1. " INDX ,Syncpt index value" line.long 0x04 "INCR_SYNCPT_CNTRL_0,INCR SYNCPT CNTRL 0" bitfld.long 0x04 8. " INCR_SYNCPT_NO_STALL ,INCR_SYNCPT_NO_STALL" "0,1" bitfld.long 0x04 0. " INCR_SYNCPT_SOFT_RESET ,INCR_SYNCPT_SOFT_RESET" "Not reset,Reset" line.long 0x08 "INCR_SYNCPT_ERROR_0,INCR SYNCPT ERROR 0" group.long 0x20++0x03 line.long 0x00 "CTXSW_0,Context switch register" rbitfld.long 0x00 28.--31. " NEXT_CHANNEL ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--25. 1. " NEXT_CLASS ,Next requested class" textline " " bitfld.long 0x00 12.--15. " CURR_CHANNEL ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " AUTO_ACK ,Automatically acknowledge any incoming context switch requests" "MANUAL,AUTOACK" textline " " hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS ,Current working class" rgroup.long 0x2C++0x03 line.long 0x00 "INTSTATUS_0,INTSTATUS 0" bitfld.long 0x00 29. " SLV_ACK_WITHHELD ,SLV_ACK_WITHHELD" "0,1" bitfld.long 0x00 28. " SLV_RD2WR ,SLV_RD2WR" "0,1" textline " " bitfld.long 0x00 27. " SLV_WR2RD ,SLV_WR2RD" "0,1" bitfld.long 0x00 26. " SLV_PKT_XFER_ERR ,SLV_PKT_XFER_ERR" "0,1" textline " " bitfld.long 0x00 25. " SLV_TX_BUFFER_REQ ,SLV_TX_BUFFER_REQ" "0,1" bitfld.long 0x00 24. " SLV_RX_BUFFER_FILLED ,SLV_RX_BUFFER_FILLED" "0,1" textline " " bitfld.long 0x00 23. " SLV_PACKET_XFER_COMPLETE ,SLV_PACKET_XFER_COMPLETE" "0,1" bitfld.long 0x00 22. " SLV_TFIFO_OVF ,SLV_TFIFO_OVF" "0,1" textline " " bitfld.long 0x00 21. " SLV_RFIFO_UNF ,SLV_RFIFO_UNF" "0,1" bitfld.long 0x00 20. " SLV_TFIFO_DATA_REQ ,SLV_TFIFO_DATA_REQ" "0,1" textline " " bitfld.long 0x00 19. " SLV_RFIFO_DATA_REQ ,SLV_RFIFO_DATA_REQ" "0,1" bitfld.long 0x00 18. " BUS_CLEAR_DONE ,BUS_CLEAR_DONE" "0,1" textline " " bitfld.long 0x00 17. " TLOW_MEXT_TIMEOUT ,TLOW_MEXT_TIMEOUT" "0,1" bitfld.long 0x00 16. " TLOW_SEXT_TIMEOUT ,TLOW_SEXT_TIMEOUT" "0,1" textline " " bitfld.long 0x00 15. " TIMEOUT ,TIMEOUT" "0,1" bitfld.long 0x00 14. " PACKET_XFER_COMPLETE ,PACKET_XFER_COMPLETE" "0,1" textline " " bitfld.long 0x00 13. " ALL_PACKETS_XFER_COMPLETE ,ALL_PACKETS_XFER_COMPLETE" "0,1" bitfld.long 0x00 12. " TFIFO_OVF ,TFIFO_OVF" "0,1" textline " " bitfld.long 0x00 11. " RFIFO_UNF ,RFIFO_UNF" "0,1" bitfld.long 0x00 10. " NOACK ,NOACK" "0,1" textline " " bitfld.long 0x00 9. " ARB_LOST ,ARB_LOST" "0,1" bitfld.long 0x00 8. " TFIFO_DATA_REQ ,TFIFO_DATA_REQ" "0,1" textline " " bitfld.long 0x00 7. " RFIFO_DATA_REQ ,RFIFO_DATA_REQ" "0,1" bitfld.long 0x00 4. " DIRECT_FIFO_OVERFLOW_ERROR ,DIRECT_FIFO_OVERFLOW_ERROR" "0,1" textline " " bitfld.long 0x00 3. " ERECOVERY_FIFO_OVERFLOW_ERROR ,ERECOVERY_FIFO_OVERFLOW_ERROR" "0,1" eventfld.long 0x00 0. " CTXSW_INT ,Context switch interrupt status" "0,1" group.long 0x30++0x03 line.long 0x00 "INT_MASK_0,INT MASK 0" bitfld.long 0x00 3. " DIRECT_FIFO_OVERFLOW_ERROR_MASK ,DIRECT_FIFO_OVERFLOW_ERROR_MASK" "Not masked,Masked" bitfld.long 0x00 2. " ERECOVERY_FIFO_OVERFLOW_ERROR_MASK ,ERECOVERY_FIFO_OVERFLOW_ERROR_MASK" "Not masked,Masked" rgroup.long 0x34++0x03 line.long 0x00 "IP_INTSTATUS_0,IP INTSTATUS 0" hexmask.long 0x00 0.--28. 1. " INT_VALUES ,INT_VALUES" group.long 0x38++0x03 line.long 0x00 "ERECOVERY_ERROR_MASK_0,ERECOVERY ERROR MASK 0" bitfld.long 0x00 29. " SLV_ACK_WITHHELD ,SLV_ACK_WITHHELD" "0,1" bitfld.long 0x00 28. " SLV_RD2WR ,SLV_RD2WR" "0,1" textline " " bitfld.long 0x00 27. " SLV_WR2RD ,SLV_WR2RD" "0,1" bitfld.long 0x00 26. " SLV_PKT_XFER_ERR ,SLV_PKT_XFER_ERR" "0,1" textline " " bitfld.long 0x00 25. " SLV_TX_BUFFER_REQ ,SLV_TX_BUFFER_REQ" "0,1" bitfld.long 0x00 24. " SLV_RX_BUFFER_FILLED ,SLV_RX_BUFFER_FILLED" "0,1" textline " " bitfld.long 0x00 23. " SLV_PACKET_XFER_COMPLETE ,SLV_PACKET_XFER_COMPLETE" "0,1" bitfld.long 0x00 22. " SLV_TFIFO_OVF ,SLV_TFIFO_OVF" "0,1" textline " " bitfld.long 0x00 21. " SLV_RFIFO_UNF ,SLV_RFIFO_UNF" "0,1" bitfld.long 0x00 20. " SLV_TFIFO_DATA_REQ ,SLV_TFIFO_DATA_REQ" "0,1" textline " " bitfld.long 0x00 19. " SLV_RFIFO_DATA_REQ ,SLV_RFIFO_DATA_REQ" "0,1" bitfld.long 0x00 18. " BUS_CLEAR_DONE ,BUS_CLEAR_DONE" "0,1" textline " " bitfld.long 0x00 17. " TLOW_MEXT_TIMEOUT ,TLOW_MEXT_TIMEOUT" "0,1" bitfld.long 0x00 16. " TLOW_SEXT_TIMEOUT ,TLOW_SEXT_TIMEOUT" "0,1" textline " " bitfld.long 0x00 15. " TIMEOUT ,TIMEOUT" "0,1" bitfld.long 0x00 14. " PACKET_XFER_COMPLETE ,PACKET_XFER_COMPLETE" "0,1" textline " " bitfld.long 0x00 13. " ALL_PACKETS_XFER_COMPLETE ,ALL_PACKETS_XFER_COMPLETE" "0,1" bitfld.long 0x00 12. " TFIFO_OVF ,TFIFO_OVF" "0,1" textline " " bitfld.long 0x00 11. " RFIFO_UNF ,RFIFO_UNF" "0,1" bitfld.long 0x00 10. " NOACK ,NOACK" "0,1" textline " " bitfld.long 0x00 9. " ARB_LOST ,ARB_LOST" "0,1" bitfld.long 0x00 8. " TFIFO_DATA_REQ ,TFIFO_DATA_REQ" "0,1" textline " " bitfld.long 0x00 7. " RFIFO_DATA_REQ ,RFIFO_DATA_REQ" "0,1" bitfld.long 0x00 4. " DIRECT_FIFO_OVERFLOW_ERROR ,DIRECT_FIFO_OVERFLOW_ERROR" "0,1" textline " " bitfld.long 0x00 3. " ERECOVERY_FIFO_OVERFLOW_ERROR ,ERECOVERY_FIFO_OVERFLOW_ERROR" "0,1" bitfld.long 0x00 0. " CTXSW_INT ,CTXSW_INT" "0,1" rgroup.long 0x4C++0x0F line.long 0x00 "STREAM_DIRECT_FENCE_STATUS_0,VII2C STREAM DIRECT FENCE STATUS 0" line.long 0x04 "STREAM_DIRECT_INIT_FENCE_STATUS_0,VII2C STREAM DIRECT INIT FENCE STATUS 0" line.long 0x08 "STREAM_ERECOVERY_FENCE_STATUS_0,VII2C STREAM ERECOVERY FENCE STATUS 0" line.long 0x0C "STREAM_ERECOVERY_INIT_FENCE_STATUS_0,VII2C STREAM ERECOVERY INIT FENCE STATUS 0" tree "STREAM DIRECT Registers" width 33. if (((per.l(ad:0x546C0000+0x300))&0x10)==0x10) group.long 0x300++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Used to select single or multi master mode" "Single,Master" bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,MSTR_CLR_BUS_ON_TIMEOUT" "Not cleared,Cleared" textline " " bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,Debounce period for sda and scl lines" "No debounce,2T,4T,6T,8T,10T,12T,14T" bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility purposes" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PACKET_MODE_EN ,Write 1 to initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Causes the master to initiate the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,Enable mode to handle devices that do not generate ACK" "Disabled,Enabled" bitfld.long 0x00 7. " CMD2 ,Read/Write Command for Slave 2" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Disabled,Enabled" bitfld.long 0x00 5. " START ,Start byte" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SLV2 ,SLV2" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,The number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,Address mode defines whether a 7-bit or a 10-bit slave address is programmed" "SEVEN_BIT_DEVICE,TEN_BIT_DEVICE" else group.long 0x300++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Used to select single or multi master mode" "Single,Master" bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,MSTR_CLR_BUS_ON_TIMEOUT" "Not cleared,Cleared" textline " " bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,Debounce period for sda and scl lines" "No debounce,2T,4T,6T,8T,10T,12T,14T" bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility purposes" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PACKET_MODE_EN ,Write 1 to initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Causes the master to initiate the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,Enable mode to handle devices that do not generate ACK" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Disabled,Enabled" bitfld.long 0x00 5. " START ,Start byte" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SLV2 ,SLV2" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,The number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,Address mode defines whether a 7-bit or a 10-bit slave address is programmed" "SEVEN_BIT_DEVICE,TEN_BIT_DEVICE" endif if (((per.l(ad:0x546C0000+0x300))&0x01)==0x01) group.long 0x304++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.word 0x00 0.--9. 0x01 " ADDR0 ,I2C_CMD_ADDR0[9:0]" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.word 0x04 0.--9. 0x01 " ADDR1 ,I2C_CMD_ADDR1[9:0]" else group.long 0x304++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.byte 0x00 1.--7. 0x02 " ADDR0 ,I2C_CMD_ADDR0[1:7]" bitfld.long 0x00 0. " I2C_CMD_ADDR0 ,Indicates the read/write transaction" "0,1" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.byte 0x04 1.--7. 0x02 " ADDR1 ,I2C_CMD_ADDR0[1:7]" bitfld.long 0x04 0. " I2C_CMD_ADDR1 ,Indicates the read/write transaction" "0,1" endif group.long 0x30C++0x07 line.long 0x00 "CMD_DATA1_0,IC Controller Data 1: Transmit/Receive" hexmask.long.byte 0x00 24.--31. 1. " DATA4 ,Fourth data byte to be sent/received" hexmask.long.byte 0x00 16.--23. 1. " DATA3 ,Third data byte to be sent/received" textline " " hexmask.long.byte 0x00 8.--15. 1. " DATA2 ,Second data byte to be sent/received" hexmask.long.byte 0x00 0.--7. 1. " DATA1 ,First data byte to be sent/received" line.long 0x04 "CMD_DATA2_0,IC Controller Data 2: Transmit/Receive" hexmask.long.byte 0x04 24.--31. 1. " DATA8 ,Eighth data byte to be sent/received" hexmask.long.byte 0x04 16.--23. 1. " DATA7 ,Seventh data byte to be sent/received" textline " " hexmask.long.byte 0x04 8.--15. 1. " DATA6 ,Sixth data byte to be sent/received" hexmask.long.byte 0x04 0.--7. 1. " DATA5 ,Fifth data byte to be sent/received" rgroup.long 0x31C++0x03 line.long 0x00 "STATUS_0,IC Controller Status (Master)" bitfld.long 0x00 8. " BUSY ,BUSY" "Not busy,Busy" bitfld.long 0x00 4.--7. " CMD2_STAT ,Transaction for Slave2 for x byte failed" "SUCCESSFUL,BYTE1,BYTE2,BYTE3,BYTE4,BYTE5,BYTE6,BYTE7,BYTE8,BYTE9,BYTE10,?..." textline " " bitfld.long 0x00 0.--3. " CMD1_STAT ,Transaction for Slave1 for x byte failed" "SUCCESSFUL,BYTE1,BYTE2,BYTE3,BYTE4,BYTE5,BYTE6,BYTE7,BYTE8,BYTE9,BYTE10,?..." group.long 0x320++0x17 line.long 0x00 "SL_CNFG_0,IC Controller Configuration(Slave)" bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO_XFER_EN" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" textline " " bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid" "Disabled,Enabled" bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,ACK Withhold Feature Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,ENABLE_SL" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,New Slave" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NACK ,Disable Slave ACK" "Disabled,Enabled" bitfld.long 0x00 0. " RESP , Slave response to general call address" "Disabled,Enabled" line.long 0x04 "SL_RCVD_0,IC Controller Slave Receive/Transmit Data (Slave)" hexmask.long.byte 0x04 0.--7. 1. " SL_DATA ,Slave Received data" line.long 0x08 "SL_STATUS_0,IC Controller Slave Status (Slave)" hexmask.long.byte 0x08 8.--14. 0x01 " HW_MSTR_ADR , HW master addr received via general call addressing" bitfld.long 0x08 7. " HW_MSTR_INT ,HW_MSTR_INT" "Not interrupt,Interrupt" textline " " bitfld.long 0x08 6. " REPROG_SL ,REPROG_SL" "No effect,Reprogram" bitfld.long 0x08 5. " RST_SL ,RST_SL" "No effect,Reset" textline " " bitfld.long 0x08 4. " END_TRANS ,END_TRANS" "Not ended,Ended" bitfld.long 0x08 3. " SL_IRQ ,SL_IRQ" "UNSET,SET" textline " " bitfld.long 0x08 2. " RCVD ,New Transaction Received status" "Not occurred,Occurred" rbitfld.long 0x08 1. " RNW ,Slave Transaction status" "WRITE,READ" textline " " bitfld.long 0x08 0. " ZA ,Zero Address Status" "NO_SLAVE_RESPONSE,SLAVE_RESPONSE" line.long 0x0C "SL_ADDR1_0,IC Controller Slave Address 1 Register (Slave)" hexmask.long.byte 0x0C 8.--15. 1. " SL_ADDR1 ,Slave address 0" hexmask.long.byte 0x0C 0.--7. 1. " SL_ADDR0 ,Slave address 1" line.long 0x10 "SL_ADDR2_0,IC Controller Slave Address 2 Register (Slave)" bitfld.long 0x10 16. " SELECT_SLAVE ,SELECT_SLAVE" "ADDR0,ADDR1" bitfld.long 0x10 9.--10. " SL1_ADDR_HI ,Represent the 2 MSB of the address" "0,1,2,3" textline " " bitfld.long 0x10 8. " SL1_VLD ,SL1_VLD" "SEVEN_BIT,TEN_BIT" bitfld.long 0x10 1.--2. " SL_ADDR_HI ,Represent the 2 MSB of the address" "0,1,2,3" textline " " bitfld.long 0x10 0. " VLD ,VLD" "SEVEN_BIT,TEN_BIT" line.long 0x14 "TLOW_SEXT_0,IC Controller SMBUS timeout thresholds" bitfld.long 0x14 27. " RST_SL_ON_TIMEOUT ,Reset Slave state machine on time-out" "Not reset,Reset" bitfld.long 0x14 26. " TLOW_MEXT_EN ,Enable TLOW_MEXT counter" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " TLOW_SEXT_EN ,Enable TLOW_SEXT counter" "Disabled,Enabled" bitfld.long 0x14 24. " TIMEOUT_EN ,Enable TIMEOUT counter" "Disabled,Enabled" textline " " hexmask.long.byte 0x14 16.--23. 1. " TLOW_MEXT ,Cumulative clock low extend time(master device)" hexmask.long.byte 0x14 8.--15. 1. " TLOW_SEXT ,Cumulative clock low extend time(slave device)" textline " " hexmask.long.byte 0x14 0.--7. 1. " TIMEOUT ,Clock low timeout period in milliseconds" group.long 0x33C++0x07 line.long 0x00 "SL_DELAY_COUNT_0,IC Slave Controller Delay Count" hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT ,The value determines the timing between an address cycle and a subsequent data cycle" line.long 0x04 "SL_INT_MASK_0,IC Controller Slave Mask (Slave)" bitfld.long 0x04 7. " HW_MSTR_INT ,HW_MSTR_INT" "Disabled,Enabled" bitfld.long 0x04 6. " REPROG_SL ,REPROG_SL" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " RST_SL ,RST_SL" "Disabled,Enabled" bitfld.long 0x04 4. " END_TRANS ,END_TRANS" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " SL_IRQ ,SL_IRQ" "Disabled,Enabled" bitfld.long 0x04 2. " RCVD ,RCVD" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ZA ,ZA" "Disabled,Enabled" rgroup.long 0x344++0x03 line.long 0x00 "SL_INT_SOURCE_0,IC Controller Slave Source (Slave)" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT" "UNSET,SET" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL" "UNSET,SET" textline " " bitfld.long 0x00 5. " RST_SL ,RST_SL" "UNSET,SET" bitfld.long 0x00 4. " END_TRANS ,END_TRANS" "UNSET,SET" textline " " bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ" "UNSET,SET" bitfld.long 0x00 2. " RCVD ,RCVD" "UNSET,SET" textline " " bitfld.long 0x00 0. " ZA ,ZA" "UNSET,SET" group.long 0x348++0x03 line.long 0x00 "SL_INT_SET_0,IC Controller Slave Source (Slave)" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT" "UNSET,SET" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL" "UNSET,SET" textline " " bitfld.long 0x00 5. " RST_SL ,RST_SL" "UNSET,SET" bitfld.long 0x00 4. " END_TRANS ,END_TRANS" "UNSET,SET" textline " " bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ" "UNSET,SET" bitfld.long 0x00 2. " RCVD ,RCVD" "UNSET,SET" textline " " bitfld.long 0x00 0. " ZA ,ZA" "UNSET,SET" group.long 0x350++0x03 line.long 0x00 "TX_PACKET_FIFO_0,I2C TX PACKET FIFO 0" rgroup.long 0x354++0x07 line.long 0x00 "RX_FIFO_0,I2C RX FIFO 0" line.long 0x04 "PACKET_TRANSFER_STATUS_0,PACKET TRANSFER STATUS 0" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,The packet transfer for which last packet is set has been completed" "UNSET,SET" hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" textline " " hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" bitfld.long 0x04 3. " NOACK_FOR_ADDR ,No ack received for the address byte" "UNSET,SET" textline " " bitfld.long 0x04 2. " NOACK_FOR_DATA ,No ack received for the data byte" "UNSET,SET" bitfld.long 0x04 1. " ARB_LOST ,Arbitration lost for the current byte" "UNSET,SET" textline " " bitfld.long 0x04 0. " CONTROLLER_BUSY ,CONTROLLER BUSY" "UNSET,SET" group.long 0x35C++0x03 line.long 0x00 "FIFO_CONTROL_0,FIFO CONTROL 0" bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG ,Slave Transmit FIFO trigger level" "1 word,2 word,?..." bitfld.long 0x00 10.--12. " SLV_RX_FIFO_TRIG ,Slave Receive FIFO trigger level" "1 word,2 word,?..." textline " " bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH ,SLV_TX_FIFO_FLUSH" "UNSET,SET" bitfld.long 0x00 8. " SLV_RX_FIFO_FLUSH ,SLV_RX_FIFO_FLUSH" "UNSET,SET" textline " " bitfld.long 0x00 5.--7. " TX_FIFO_TRIG ,Transmit FIFO trigger level" "1 word,2 word,?..." bitfld.long 0x00 2.--4. " RX_FIFO_TRIG ,Receive FIFO trigger level" "1 word,2 word,?..." textline " " bitfld.long 0x00 1. " TX_FIFO_FLUSH ,TX_FIFO_FLUSH" "UNSET,SET" bitfld.long 0x00 0. " RX_FIFO_FLUSH ,RX_FIFO_FLUSH" "UNSET,SET" rgroup.long 0x360++0x03 line.long 0x00 "FIFO_STATUS_0,FIFO STATUS 0" bitfld.long 0x00 25. " SLV_XFER_ERR_REASON ,Describes the nature of the packet transfer error" "Terminated,Didn't terminate" bitfld.long 0x00 20.--23. " SLV_TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the slave Tx FIFO" "tx_fifo full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT ,The number of slots to be read from the Slave Rx FIFO" "tx_fifo full,1 slot empty,2 slots empty,?..." bitfld.long 0x00 4.--7. " TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the Tx FIFO" "tx_fifo full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT ,The number of slots to be read from the Rx FIFO" "tx_fifo full,1 slot empty,2 slots empty,?..." group.long 0x364++0x0B line.long 0x00 "INTERRUPT_MASK_REGISTER_0,INTERRUPT MASK REGISTER 0" bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN ,SLV_ACK_WITHHELD_INT_EN" "Disabled,Enabled" bitfld.long 0x00 27. " SLV_RD2WR_INT_EN ,SLV_RD2WR_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SLV_WR2RD_INT_EN ,SLV_WR2RD_INT_EN" "Disabled,Enabled" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR_INT_EN ,SLV_PKT_XFER_ERR_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ_INT_EN" "Disabled,Enabled" bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN ,SLV_PACKET_XFER_COMPLETE_INT_EN" "Disabled,Enabled" bitfld.long 0x00 21. " SLV_TFIFO_OVF_REQ_INT_EN ,SLV_TFIFO_OVF_REQ_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN ,SLV_RFIFO_UNF_REQ_INT_EN" "Disabled,Enabled" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ_INT_EN ,SLV_TFIFO_DATA_REQ_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN ,SLV_RFIFO_DATA_REQ_INT_EN" "Disabled,Enabled" bitfld.long 0x00 11. " BUS_CLEAR_DONE_INT_EN ,BUS_CLEAR_DONE_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,TLOW_MEXT_TIMEOUT_EN" "Disabled,Enabled" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,TLOW_SEXT_TIMEOUT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TIMEOUT_INT_EN ,TIMEOUT_INT_EN" "Disabled,Enabled" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE_INT_EN" "Disabled,Enabled" bitfld.long 0x00 5. " TFIFO_OVF_INT_EN ,TFIFO_OVF_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFIFO_UNF_INT_EN ,RFIFO_UNF_INT_EN" "Disabled,Enabled" bitfld.long 0x00 3. " NOACK_INT_EN ,NOACK_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARB_LOST_INT_EN ,ARB_LOST_INT_EN" "Disabled,Enabled" bitfld.long 0x00 1. " TFIFO_DATA_REQ_INT_EN ,TFIFO_DATA_REQ_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN ,RFIFO_DATA_REQ_INT_EN" "Disabled,Enabled" line.long 0x04 "INTERRUPT_STATUS_REGISTER_0,INTERRUPT STATUS REGISTER 0" bitfld.long 0x04 28. " SLV_ACK_WITHHELD ,ACK is withheld" "UNSET,SET" bitfld.long 0x04 27. " SLV_RD2WR ,Transaction switching from rd to wr" "UNSET,SET" textline " " bitfld.long 0x04 26. " SLV_WR2RD ,Transaction switching from wr to rd" "UNSET,SET" bitfld.long 0x04 25. " SLV_PKT_XFER_ERR ,SLV_PKT_XFER_ERR" "UNSET,SET" textline " " bitfld.long 0x04 24. " SLV_TX_BUFFER_REQ ,Slave Tx buffer is full" "UNSET,SET" bitfld.long 0x04 23. " SLV_RX_BUFFER_FILLED ,Slave Rx buffer is full" "UNSET,SET" textline " " bitfld.long 0x04 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "UNSET,SET" bitfld.long 0x04 21. " SLV_TFIFO_OVF_REQ ,Slave Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x04 20. " SLV_RFIFO_UNF_REQ ,Slave Rx FIFO underflow" "UNSET,SET" rbitfld.long 0x04 17. " SLV_TFIFO_DATA_REQ ,Slave Tx FIFO data req" "UNSET,SET" textline " " rbitfld.long 0x04 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data req" "UNSET,SET" bitfld.long 0x04 11. " BUS_CLEAR_DONE ,Bus clear done status" "UNSET,SET" textline " " bitfld.long 0x04 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "UNSET,SET" bitfld.long 0x04 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "UNSET,SET" textline " " bitfld.long 0x04 8. " TIMEOUT ,SMBUS time-out" "UNSET,SET" bitfld.long 0x04 7. " PACKET_XFER_COMPLETE ,A packet has been transferred successfully" "UNSET,SET" textline " " bitfld.long 0x04 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "UNSET,SET" bitfld.long 0x04 5. " TFIFO_OVF , Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x04 4. " RFIFO_UNF , Rx FIFO underflow" "UNSET,SET" bitfld.long 0x04 3. " NOACK ,No ACK from slave" "UNSET,SET" textline " " bitfld.long 0x04 2. " ARB_LOST ,Arbitration lost" "UNSET,SET" rbitfld.long 0x04 1. " TFIFO_DATA_REQ ,Tx FIFO data req" "UNSET,SET" textline " " rbitfld.long 0x04 0. " RFIFO_DATA_REQ ,Rx FIFO data req" "UNSET,SET" line.long 0x08 "CLK_DIVISOR_REGISTER_0,CLK DIVISOR REGISTER 0" hexmask.long.word 0x08 16.--31. 1. " CLK_DIVISOR_STD_FAST_MODE ,I2C_CLK_DIVISOR_STD_FAST_MODE" hexmask.long.word 0x08 0.--15. 1. " CLK_DIVISOR_HSMODE ,I2C_CLK_DIVISOR_HSMODE" rgroup.long 0x370++0x03 line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,INTERRUPT SOURCE REGISTER 0" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,SLV_ACK_WITHHELD" "UNSET,SET" bitfld.long 0x00 27. " SLV_RD2WR ,SLV_RD2WR" "UNSET,SET" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,SLV_WR2RD" "UNSET,SET" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave transfer" "UNSET,SET" textline " " bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave Tx buffer is full" "UNSET,SET" bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave Rx buffer is full" "UNSET,SET" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "UNSET,SET" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave Rx FIFO underflow" "UNSET,SET" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave Tx FIFO data req" "UNSET,SET" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data req" "UNSET,SET" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done" "UNSET,SET" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "UNSET,SET" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "UNSET,SET" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "UNSET,SET" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,A packet has been transferred successfully" "UNSET,SET" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "UNSET,SET" bitfld.long 0x00 5. " TFIFO_OVF , Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x00 4. " RFIFO_UNF , Rx FIFO underflow" "UNSET,SET" bitfld.long 0x00 3. " NOACK ,No ACK from slave" "UNSET,SET" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "UNSET,SET" bitfld.long 0x00 1. " TFIFO_DATA_REQ ,Tx FIFO data req" "UNSET,SET" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ ,Rx FIFO data req" "UNSET,SET" wgroup.long 0x374++0x07 line.long 0x00 "I2C_INTERRUPT_SET_REGISTER_0,INTERRUPT SET REGISTER 0" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,SLV_ACK_WITHHELD" "UNSET,SET" bitfld.long 0x00 27. " SLV_RD2WR ,SLV_RD2WR" "UNSET,SET" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,SLV_WR2RD" "UNSET,SET" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave transfer" "UNSET,SET" textline " " bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave Tx buffer is full" "UNSET,SET" bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave Rx buffer is full" "UNSET,SET" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "UNSET,SET" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave Rx FIFO underflow" "UNSET,SET" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done" "UNSET,SET" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "UNSET,SET" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "UNSET,SET" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "UNSET,SET" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,A packet has been transferred successfully" "UNSET,SET" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "UNSET,SET" bitfld.long 0x00 5. " TFIFO_OVF , Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x00 4. " RFIFO_UNF , Rx FIFO underflow" "UNSET,SET" bitfld.long 0x00 3. " NOACK ,No ACK from slave" "UNSET,SET" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "UNSET,SET" line.long 0x04 "SLV_TX_PACKET_FIFO_0,SLV TX PACKET FIFO 0" rgroup.long 0x37C++0x07 line.long 0x00 "SLV_RX_FIFO_0,SLV RX FIFO 0" line.long 0x04 "SLV_PACKET_STATUS_0,I2C SLV PACKET STATUS 0" bitfld.long 0x04 25. " ACK_WITHHELD ,Indicates that ack is withheld for last byte" "Bus is released,ACK is withheld" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,ALL the packets have been transferred successfully" "0,1" textline " " hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" group.long 0x384++0x1F line.long 0x00 "BUS_CLEAR_CONFIG_0,BUS CLEAR CONFIG 0" hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD ,Send the clock pulses until this threshold is met" bitfld.long 0x00 2. " BC_STOP_COND ,BC_STOP_COND" "NO_STOP,STOP" textline " " bitfld.long 0x00 1. " BC_TERMINATE ,BC_TERMINATE" "THRESHOLD,IMMEDIATE" bitfld.long 0x00 0. " BC_ENABLE ,Starts bus clear operation" "Disabled,Enabled" line.long 0x04 "BUS_CLEAR_STATUS_0,I2C BUS CLEAR STATUS 0" bitfld.long 0x04 0. " BC_STATUS ,BC_STATUS" "Not cleared,Cleared" line.long 0x08 "CONFIG_LOAD_0,CONFIG LOAD 0" bitfld.long 0x08 2. " TIMEOUT_CONFIG_LOAD ,Loads the timeout configuration from pclk domain to the receive domain" "Disabled,Enabled" bitfld.long 0x08 1. " SLV_CONFIG_LOAD ,Loads the slave configuration from pclk domain to the receive domain" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " MSTR_CONFIG_LOAD ,Loads the master configuration from pclk domain to the receive domain" "Disabled,Enabled" line.long 0x0C "CLKEN_OVERRIDE_0,I2C CLKEN OVERRIDE 0" bitfld.long 0x0C 4. " BUS_CLEAR_CLKEN_OVR ,Override for 2nd-level clock enable for I2C bus clear logic" "GATED,ALWAYS_ON" bitfld.long 0x0C 3. " SLV_HIF_CLKEN_OVR ,Override for 2nd-level clock enable for I2C slave to host interface logic" "GATED,ALWAYS_ON" textline " " bitfld.long 0x0C 2. " SLV_CORE_CLKEN_OVR ,Override for 2nd-level clock enable for I2C slave core logic" "GATED,ALWAYS_ON" bitfld.long 0x0C 0. " MST_CORE_CLKEN_OVR ,Override for 2nd-level clock enable for I2C master core logic" "GATED,ALWAYS_ON" line.long 0x10 "INTERFACE_TIMING_0_0,I2C INTERFACE TIMING 0 0" bitfld.long 0x10 8.--13. " THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--5. " TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "I2C_INTERFACE_TIMING_1_0,I2C INTERFACE TIMING 1 0" bitfld.long 0x14 24.--29. " TBUF ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 16.--21. " TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 8.--13. " THD_STA ,Hold time for a (repeated) START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 0.--5. " TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "HS_INTERFACE_TIMING_0_0,I2C HS INTERFACE TIMING 0 0" bitfld.long 0x18 8.--13. " HS_THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " HS_TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "HS_INTERFACE_TIMING_1_0,I2C HS INTERFACE TIMING 1 0" bitfld.long 0x1C 16.--21. " HS_TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 8.--13. " HS_THD_STA ,Hold time for a (repeated) START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x1C 0.--5. " HS_TSU_STA , Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end tree "STREAM ERECOVERY" if (((per.l(ad:0x546C0000+0x400))&0x10)==0x10) group.long 0x400++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Used to select single or multi master mode" "Single,Master" bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,MSTR_CLR_BUS_ON_TIMEOUT" "Not cleared,Cleared" textline " " bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,Debounce period for sda and scl lines" "No debounce,2T,4T,6T,8T,10T,12T,14T" bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility purposes" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PACKET_MODE_EN ,Write 1 to initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Causes the master to initiate the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,Enable mode to handle devices that do not generate ACK" "Disabled,Enabled" bitfld.long 0x00 7. " CMD2 ,Read/Write Command for Slave 2" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Disabled,Enabled" bitfld.long 0x00 5. " START ,Start byte" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SLV2 ,SLV2" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,The number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,Address mode defines whether a 7-bit or a 10-bit slave address is programmed" "SEVEN_BIT_DEVICE,TEN_BIT_DEVICE" else group.long 0x400++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Used to select single or multi master mode" "Single,Master" bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,MSTR_CLR_BUS_ON_TIMEOUT" "Not cleared,Cleared" textline " " bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,Debounce period for sda and scl lines" "No debounce,2T,4T,6T,8T,10T,12T,14T" bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility purposes" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PACKET_MODE_EN ,Write 1 to initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Causes the master to initiate the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,Enable mode to handle devices that do not generate ACK" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Disabled,Enabled" bitfld.long 0x00 5. " START ,Start byte" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SLV2 ,SLV2" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,The number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,Address mode defines whether a 7-bit or a 10-bit slave address is programmed" "SEVEN_BIT_DEVICE,TEN_BIT_DEVICE" endif if (((per.l(ad:0x546C0000+0x400))&0x01)==0x01) group.long 0x404++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.word 0x00 0.--9. 0x01 " ADDR0 ,I2C_CMD_ADDR0[9:0]" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.word 0x04 0.--9. 0x01 " ADDR1 ,I2C_CMD_ADDR1[9:0]" else group.long 0x404++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.byte 0x00 1.--7. 0x02 " ADDR0 ,I2C_CMD_ADDR0[1:7]" bitfld.long 0x00 0. " CMD_ADDR0 ,Indicates the read/write transaction" "0,1" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.byte 0x04 1.--7. 0x02 " ADDR1 ,I2C_CMD_ADDR0[1:7]" bitfld.long 0x04 0. " CMD_ADDR1 ,Indicates the read/write transaction" "0,1" endif group.long 0x40C++0x07 line.long 0x00 "CMD_DATA1_0,IC Controller Data 1: Transmit/Receive" hexmask.long.byte 0x00 24.--31. 1. " DATA4 ,Fourth data byte to be sent/received" hexmask.long.byte 0x00 16.--23. 1. " DATA3 ,Third data byte to be sent/received" textline " " hexmask.long.byte 0x00 8.--15. 1. " DATA2 ,Second data byte to be sent/received" hexmask.long.byte 0x00 0.--7. 1. " DATA1 ,First data byte to be sent/received" line.long 0x04 "CMD_DATA2_0,IC Controller Data 2: Transmit/Receive" hexmask.long.byte 0x04 24.--31. 1. " DATA8 ,Eighth data byte to be sent/received" hexmask.long.byte 0x04 16.--23. 1. " DATA7 ,Seventh data byte to be sent/received" textline " " hexmask.long.byte 0x04 8.--15. 1. " DATA6 ,Sixth data byte to be sent/received" hexmask.long.byte 0x04 0.--7. 1. " DATA5 ,Fifth data byte to be sent/received" rgroup.long 0x41C++0x03 line.long 0x00 "STATUS_0,IC Controller Status (Master)" bitfld.long 0x00 8. " BUSY ,BUSY" "Not busy,Busy" bitfld.long 0x00 4.--7. " CMD2_STAT ,Transaction for Slave2 for x byte failed" "SUCCESSFUL,BYTE1,BYTE2,BYTE3,BYTE4,BYTE5,BYTE6,BYTE7,BYTE8,BYTE9,BYTE10,?..." textline " " bitfld.long 0x00 0.--3. " CMD1_STAT ,Transaction for Slave1 for x byte failed" "SUCCESSFUL,BYTE1,BYTE2,BYTE3,BYTE4,BYTE5,BYTE6,BYTE7,BYTE8,BYTE9,BYTE10,?..." group.long 0x420++0x17 line.long 0x00 "SL_CNFG_0,IC Controller Configuration(Slave)" bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO_XFER_EN" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" textline " " bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid" "Disabled,Enabled" bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,ACK Withhold Feature Enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,ENABLE_SL" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,New Slave" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NACK ,Disable Slave ACK" "Disabled,Enabled" bitfld.long 0x00 0. " RESP , Slave response to general call address" "Disabled,Enabled" line.long 0x04 "SL_RCVD_0,IC Controller Slave Receive/Transmit Data (Slave)" hexmask.long.byte 0x04 0.--7. 1. " SL_DATA ,Slave Received data" line.long 0x08 "SL_STATUS_0,IC Controller Slave Status (Slave)" hexmask.long.byte 0x08 8.--14. 0x01 " HW_MSTR_ADR , HW master addr received via general call addressing" bitfld.long 0x08 7. " HW_MSTR_INT ,HW_MSTR_INT" "Not interrupt,Interrupt" textline " " bitfld.long 0x08 6. " REPROG_SL ,HW_MSTR_INT" "No effect,Reprogram" bitfld.long 0x08 5. " RST_SL ,RST_SL" "No effect,Reset" textline " " bitfld.long 0x08 4. " END_TRANS ,END_TRANS" "Not ended,Ended" bitfld.long 0x08 3. " SL_IRQ ,SL_IRQ" "UNSET,SET" textline " " bitfld.long 0x08 2. " RCVD ,New Transaction Received status" "Not occurred,Occurred" rbitfld.long 0x08 1. " RNW ,Slave Transaction status" "WRITE,READ" textline " " bitfld.long 0x08 0. " ZA ,Zero Address Status" "NO_SLAVE_RESPONSE,SLAVE_RESPONSE" line.long 0x0C "SL_ADDR1_0,IC Controller Slave Address 1 Register (Slave)" hexmask.long.byte 0x0C 8.--15. 1. " SL_ADDR1 ,Slave address 0" hexmask.long.byte 0x0C 0.--7. 1. " SL_ADDR0 ,Slave address 1" line.long 0x10 "SL_ADDR2_0,IC Controller Slave Address 2 Register (Slave)" bitfld.long 0x10 16. " SELECT_SLAVE ,SELECT_SLAVE" "ADDR0,ADDR1" bitfld.long 0x10 9.--10. " SL1_ADDR_HI ,Represent the 2 MSB of the address" "0,1,2,3" textline " " bitfld.long 0x10 8. " SL1_VLD ,SL1_VLD" "SEVEN_BIT,TEN_BIT" bitfld.long 0x10 1.--2. " SL_ADDR_HI ,Represent the 2 MSB of the address" "0,1,2,3" textline " " bitfld.long 0x10 0. " VLD ,VLD" "SEVEN_BIT,TEN_BIT" line.long 0x14 "TLOW_SEXT_0,IC Controller SMBUS timeout thresholds" bitfld.long 0x14 27. " RST_SL_ON_TIMEOUT ,Reset Slave state machine on time-out" "Not reset,Reset" bitfld.long 0x14 26. " TLOW_MEXT_EN ,Enable TLOW_MEXT counter" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " TLOW_SEXT_EN ,Enable TLOW_SEXT counter" "Disabled,Enabled" bitfld.long 0x14 24. " TIMEOUT_EN ,Enable TIMEOUT counter" "Disabled,Enabled" textline " " hexmask.long.byte 0x14 16.--23. 1. " TLOW_MEXT ,Cumulative clock low extend time(master device)" hexmask.long.byte 0x14 8.--15. 1. " TLOW_SEXT ,Cumulative clock low extend time(slave device)" textline " " hexmask.long.byte 0x14 0.--7. 1. " TIMEOUT ,Clock low timeout period in milliseconds" group.long 0x43C++0x07 line.long 0x00 "SL_DELAY_COUNT_0,IC Slave Controller Delay Count" hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT ,The value determines the timing between an address cycle and a subsequent data cycle" line.long 0x04 "SL_INT_MASK_0,IC Controller Slave Mask (Slave)" bitfld.long 0x04 7. " HW_MSTR_INT ,HW_MSTR_INT" "Disabled,Enabled" bitfld.long 0x04 6. " REPROG_SL ,REPROG_SL" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " RST_SL ,RST_SL" "Disabled,Enabled" bitfld.long 0x04 4. " END_TRANS ,END_TRANS" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " SL_IRQ ,SL_IRQ" "Disabled,Enabled" bitfld.long 0x04 2. " RCVD ,RCVD" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ZA ,ZA" "Disabled,Enabled" rgroup.long 0x444++0x03 line.long 0x00 "SL_INT_SOURCE_0,IC Controller Slave Source (Slave)" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT" "UNSET,SET" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL" "UNSET,SET" textline " " bitfld.long 0x00 5. " RST_SL ,RST_SL" "UNSET,SET" bitfld.long 0x00 4. " END_TRANS ,END_TRANS" "UNSET,SET" textline " " bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ" "UNSET,SET" bitfld.long 0x00 2. " RCVD ,RCVD" "UNSET,SET" textline " " bitfld.long 0x00 0. " ZA ,ZA" "UNSET,SET" group.long 0x448++0x03 line.long 0x00 "SL_INT_SET_0,IC Controller Slave Source (Slave)" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT" "UNSET,SET" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL" "UNSET,SET" textline " " bitfld.long 0x00 5. " RST_SL ,RST_SL" "UNSET,SET" bitfld.long 0x00 4. " END_TRANS ,END_TRANS" "UNSET,SET" textline " " bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ" "UNSET,SET" bitfld.long 0x00 2. " RCVD ,RCVD" "UNSET,SET" textline " " bitfld.long 0x00 0. " ZA ,ZA" "UNSET,SET" group.long 0x450++0x03 line.long 0x00 "TX_PACKET_FIFO_0,I2C TX PACKET FIFO 0" rgroup.long 0x454++0x07 line.long 0x00 "RX_FIFO_0,I2C RX FIFO 0" line.long 0x04 "PACKET_TRANSFER_STATUS_0,PACKET TRANSFER STATUS 0" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,The packet transfer for which last packet is set has been completed" "UNSET,SET" hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" textline " " hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" bitfld.long 0x04 3. " NOACK_FOR_ADDR ,No ack received for the address byte" "UNSET,SET" textline " " bitfld.long 0x04 2. " NOACK_FOR_DATA ,No ack received for the data byte" "UNSET,SET" bitfld.long 0x04 1. " ARB_LOST ,Arbitration lost for the current byte" "UNSET,SET" textline " " bitfld.long 0x04 0. " CONTROLLER_BUSY ,CONTROLLER BUSY" "UNSET,SET" group.long 0x45C++0x03 line.long 0x00 "FIFO_CONTROL_0,FIFO CONTROL 0" bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG ,Slave Transmit FIFO trigger level" "1 word,2 word,?..." bitfld.long 0x00 10.--12. " SLV_RX_FIFO_TRIG ,Slave Receive FIFO trigger level" "1 word,2 word,?..." textline " " bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH ,SLV_TX_FIFO_FLUSH" "UNSET,SET" bitfld.long 0x00 8. " SLV_RX_FIFO_FLUSH ,SLV_RX_FIFO_FLUSH" "UNSET,SET" textline " " bitfld.long 0x00 5.--7. " TX_FIFO_TRIG ,Transmit FIFO trigger level" "1 word,2 word,?..." bitfld.long 0x00 2.--4. " RX_FIFO_TRIG ,Receive FIFO trigger level" "1 word,2 word,?..." textline " " bitfld.long 0x00 1. " TX_FIFO_FLUSH ,TX_FIFO_FLUSH" "UNSET,SET" bitfld.long 0x00 0. " RX_FIFO_FLUSH ,RX_FIFO_FLUSH" "UNSET,SET" rgroup.long 0x460++0x03 line.long 0x00 "FIFO_STATUS_0,FIFO STATUS 0" bitfld.long 0x00 25. " SLV_XFER_ERR_REASON ,Describes the nature of the packet transfer error" "Terminated,Didn't terminate" bitfld.long 0x00 20.--23. " SLV_TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the slave Tx FIFO" "tx_fifo full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT ,The number of slots to be read from the Slave Rx FIFO" "tx_fifo full,1 slot empty,2 slots empty,?..." bitfld.long 0x00 4.--7. " TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the Tx FIFO" "tx_fifo full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT ,The number of slots to be read from the Rx FIFO" "tx_fifo full,1 slot empty,2 slots empty,?..." group.long 0x464++0x0F line.long 0x00 "INTERRUPT_MASK_REGISTER_0,INTERRUPT MASK REGISTER 0" bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN ,SLV_ACK_WITHHELD_INT_EN" "Disabled,Enabled" bitfld.long 0x00 27. " SLV_RD2WR_INT_EN ,SLV_RD2WR_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SLV_WR2RD_INT_EN ,SLV_WR2RD_INT_EN" "Disabled,Enabled" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR_INT_EN ,SLV_PKT_XFER_ERR_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ_INT_EN" "Disabled,Enabled" bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN ,SLV_PACKET_XFER_COMPLETE_INT_EN" "Disabled,Enabled" bitfld.long 0x00 21. " SLV_TFIFO_OVF_REQ_INT_EN ,SLV_TFIFO_OVF_REQ_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN ,SLV_RFIFO_UNF_REQ_INT_EN" "Disabled,Enabled" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ_INT_EN ,SLV_TFIFO_DATA_REQ_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN ,SLV_RFIFO_DATA_REQ_INT_EN" "Disabled,Enabled" bitfld.long 0x00 11. " BUS_CLEAR_DONE_INT_EN ,BUS_CLEAR_DONE_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,TLOW_MEXT_TIMEOUT_EN" "Disabled,Enabled" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,TLOW_SEXT_TIMEOUT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TIMEOUT_INT_EN ,TIMEOUT_INT_EN" "Disabled,Enabled" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE_INT_EN" "Disabled,Enabled" bitfld.long 0x00 5. " TFIFO_OVF_INT_EN ,TFIFO_OVF_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFIFO_UNF_INT_EN ,RFIFO_UNF_INT_EN" "Disabled,Enabled" bitfld.long 0x00 3. " NOACK_INT_EN ,NOACK_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARB_LOST_INT_EN ,ARB_LOST_INT_EN" "Disabled,Enabled" bitfld.long 0x00 1. " TFIFO_DATA_REQ_INT_EN ,TFIFO_DATA_REQ_INT_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN ,RFIFO_DATA_REQ_INT_EN" "Disabled,Enabled" line.long 0x04 "INTERRUPT_STATUS_REGISTER_0,INTERRUPT STATUS REGISTER 0" bitfld.long 0x04 28. " SLV_ACK_WITHHELD ,ACK is withheld" "UNSET,SET" bitfld.long 0x04 27. " SLV_RD2WR ,Transaction switching from rd to wr" "UNSET,SET" textline " " bitfld.long 0x04 26. " SLV_WR2RD ,Transaction switching from wr to rd" "UNSET,SET" bitfld.long 0x04 25. " SLV_PKT_XFER_ERR ,SLV_PKT_XFER_ERR" "UNSET,SET" textline " " bitfld.long 0x04 24. " SLV_TX_BUFFER_REQ ,Slave Tx buffer is full" "UNSET,SET" bitfld.long 0x04 23. " SLV_RX_BUFFER_FILLED ,Slave Rx buffer is full" "UNSET,SET" textline " " bitfld.long 0x04 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "UNSET,SET" bitfld.long 0x04 21. " SLV_TFIFO_OVF_REQ ,Slave Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x04 20. " SLV_RFIFO_UNF_REQ ,Slave Rx FIFO underflow" "UNSET,SET" rbitfld.long 0x04 17. " SLV_TFIFO_DATA_REQ ,Slave Tx FIFO data req" "UNSET,SET" textline " " rbitfld.long 0x04 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data req" "UNSET,SET" bitfld.long 0x04 11. " BUS_CLEAR_DONE ,Bus clear done status" "UNSET,SET" textline " " bitfld.long 0x04 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "UNSET,SET" bitfld.long 0x04 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "UNSET,SET" textline " " bitfld.long 0x04 8. " TIMEOUT ,SMBUS time-out" "UNSET,SET" bitfld.long 0x04 7. " PACKET_XFER_COMPLETE ,A packet has been transferred successfully" "UNSET,SET" textline " " bitfld.long 0x04 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "UNSET,SET" bitfld.long 0x04 5. " TFIFO_OVF , Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x04 4. " RFIFO_UNF , Rx FIFO underflow" "UNSET,SET" bitfld.long 0x04 3. " NOACK ,No ACK from slave" "UNSET,SET" textline " " bitfld.long 0x04 2. " ARB_LOST ,Arbitration lost" "UNSET,SET" rbitfld.long 0x04 1. " TFIFO_DATA_REQ ,Tx FIFO data req" "UNSET,SET" textline " " rbitfld.long 0x04 0. " RFIFO_DATA_REQ ,Rx FIFO data req" "UNSET,SET" line.long 0x08 "CLK_DIVISOR_REGISTER_0,I2C CLK DIVISOR REGISTER 0" hexmask.long.word 0x08 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE ,I2C_CLK_DIVISOR_STD_FAST_MODE" hexmask.long.word 0x08 0.--15. 1. " I2C_CLK_DIVISOR_HSMODE ,I2C_CLK_DIVISOR_HSMODE" line.long 0x0C "INTERRUPT_SOURCE_REGISTER_0,I2C INTERRUPT SOURCE REGISTER 0" bitfld.long 0x0C 28. " SLV_ACK_WITHHELD ,SLV_ACK_WITHHELD" "UNSET,SET" bitfld.long 0x0C 27. " SLV_RD2WR ,SLV_RD2WR" "UNSET,SET" textline " " bitfld.long 0x0C 26. " SLV_WR2RD ,SLV_WR2RD" "UNSET,SET" bitfld.long 0x0C 25. " SLV_PKT_XFER_ERR ,Error occurred during slave transfer" "UNSET,SET" textline " " bitfld.long 0x0C 24. " SLV_TX_BUFFER_REQ ,Slave Tx buffer is full" "UNSET,SET" bitfld.long 0x0C 23. " SLV_RX_BUFFER_FILLED ,Slave Rx buffer is full" "UNSET,SET" textline " " bitfld.long 0x0C 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "UNSET,SET" bitfld.long 0x0C 21. " SLV_TFIFO_OVF ,Slave Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x0C 20. " SLV_RFIFO_UNF ,Slave Rx FIFO underflow" "UNSET,SET" bitfld.long 0x0C 17. " SLV_TFIFO_DATA_REQ ,Slave Tx FIFO data req" "UNSET,SET" textline " " bitfld.long 0x0C 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data req" "UNSET,SET" bitfld.long 0x0C 11. " BUS_CLEAR_DONE ,Bus clear done" "UNSET,SET" textline " " bitfld.long 0x0C 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "UNSET,SET" bitfld.long 0x0C 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "UNSET,SET" textline " " bitfld.long 0x0C 8. " TIMEOUT ,SMBUS time-out" "UNSET,SET" bitfld.long 0x0C 7. " PACKET_XFER_COMPLETE ,A packet has been transferred successfully" "UNSET,SET" textline " " bitfld.long 0x0C 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "UNSET,SET" bitfld.long 0x0C 5. " TFIFO_OVF , Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x0C 4. " RFIFO_UNF , Rx FIFO underflow" "UNSET,SET" bitfld.long 0x0C 3. " NOACK ,No ACK from slave" "UNSET,SET" textline " " bitfld.long 0x0C 2. " ARB_LOST ,Arbitration lost" "UNSET,SET" bitfld.long 0x0C 1. " TFIFO_DATA_REQ ,Tx FIFO data req" "UNSET,SET" textline " " bitfld.long 0x0C 0. " RFIFO_DATA_REQ ,Rx FIFO data req" "UNSET,SET" wgroup.long 0x474++0x07 line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C INTERRUPT SET REGISTER 0" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,SLV_ACK_WITHHELD" "UNSET,SET" bitfld.long 0x00 27. " SLV_RD2WR ,SLV_RD2WR" "UNSET,SET" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,SLV_WR2RD" "UNSET,SET" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave transfer" "UNSET,SET" textline " " bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave Tx buffer is full" "UNSET,SET" bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave Rx buffer is full" "UNSET,SET" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "UNSET,SET" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave Rx FIFO underflow" "UNSET,SET" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done" "UNSET,SET" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "UNSET,SET" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "UNSET,SET" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "UNSET,SET" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,A packet has been transferred successfully" "UNSET,SET" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "UNSET,SET" bitfld.long 0x00 5. " TFIFO_OVF , Tx FIFO overflow" "UNSET,SET" textline " " bitfld.long 0x00 4. " RFIFO_UNF , Rx FIFO underflow" "UNSET,SET" bitfld.long 0x00 3. " NOACK ,No ACK from slave" "UNSET,SET" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "UNSET,SET" line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C SLV TX PACKET FIFO 0" rgroup.long 0x47C++0x07 line.long 0x00 "SLV_RX_FIFO_0,I2C SLV RX FIFO 0" line.long 0x04 "SLV_PACKET_STATUS_0,I2C SLV PACKET STATUS 0" bitfld.long 0x04 25. " ACK_WITHHELD ,Indicates that ack is withheld for last byte" "Bus is released,ACK is withheld" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,ALL the packets have been transferred successfully" "0,1" textline " " hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" group.long 0x484++0x1F line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C BUS CLEAR CONFIG 0" hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD ,Send the clock pulses until this threshold is met" bitfld.long 0x00 2. " BC_STOP_COND ,BC_STOP_COND" "NO_STOP,STOP" textline " " bitfld.long 0x00 1. " BC_TERMINATE ,BC_TERMINATE" "THRESHOLD,IMMEDIATE" bitfld.long 0x00 0. " BC_ENABLE ,Starts bus clear operation" "Disabled,Enabled" line.long 0x04 "BUS_CLEAR_STATUS_0,I2C BUS CLEAR STATUS 0" bitfld.long 0x04 0. " BC_STATUS ,BC_STATUS" "Not cleared,Cleared" line.long 0x08 "CONFIG_LOAD_0,I2C CONFIG LOAD 0" bitfld.long 0x08 2. " TIMEOUT_CONFIG_LOAD ,Loads the timeout configuration from pclk domain to the receive domain" "Disabled,Enabled" bitfld.long 0x08 1. " SLV_CONFIG_LOAD ,Loads the slave configuration from pclk domain to the receive domain" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " MSTR_CONFIG_LOAD ,Loads the master configuration from pclk domain to the receive domain" "Disabled,Enabled" line.long 0x0C "CLKEN_OVERRIDE_0,I2C CLKEN OVERRIDE 0" bitfld.long 0x0C 4. " BUS_CLEAR_CLKEN_OVR ,Override for 2nd-level clock enable for I2C bus clear logic" "GATED,ALWAYS_ON" bitfld.long 0x0C 3. " SLV_HIF_CLKEN_OVR ,Override for 2nd-level clock enable for I2C slave to host interface logic" "GATED,ALWAYS_ON" textline " " bitfld.long 0x0C 2. " SLV_CORE_CLKEN_OVR ,Override for 2nd-level clock enable for I2C slave core logic" "GATED,ALWAYS_ON" bitfld.long 0x0C 0. " MST_CORE_CLKEN_OVR ,Override for 2nd-level clock enable for I2C master core logic" "GATED,ALWAYS_ON" line.long 0x10 "INTERFACE_TIMING_0_0,I2C INTERFACE TIMING 0 0" bitfld.long 0x10 8.--13. " THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 0.--5. " TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "INTERFACE_TIMING_1_0,I2C INTERFACE TIMING 1 0" bitfld.long 0x14 24.--29. " TBUF ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 16.--21. " TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 8.--13. " THD_STA ,Hold time for a (repeated) START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 0.--5. " TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "HS_INTERFACE_TIMING_0_0,I2C HS INTERFACE TIMING 0 0" bitfld.long 0x18 8.--13. " HS_THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " HS_TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "HS_INTERFACE_TIMING_1_0,I2C HS INTERFACE TIMING 1 0" bitfld.long 0x1C 16.--21. " HS_TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 8.--13. " HS_THD_STA ,Hold time for a (repeated) START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x1C 0.--5. " HS_TSU_STA , Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end width 0x0B tree.end tree.end tree.open "SD/MMC Controller" tree "SDMMC-1" base ad:0x700B0000 tree.open "Standard Registers" width 27. sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2") rgroup.long 0x24++0x03 line.long 0x00 "PSR,Present State Register" bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif sif !cpuis("TEGRAX2") group.long 0x30++0x0B line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 31. " BOOT_ACK_ERR ,Boot ack status" "Not occurred,Occurred" bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR ,Boot Ack is not received" "Not occurred,Occurred" line.long 0x04 "ISTAER,Interrupt Status Enable Register" bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both" line.long 0x08 "ISIGR,Interrupt Signal Enable Register" bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both" else group.long 0x30++0x0B line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 31. " BOOT_ACK_ERR ,Boot ack status" "Not occurred,Occurred" bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR ,Boot Ack is not received" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " BUFFER_READ_READY ,Buffer read ready" "NO_INT,GEN_INT" line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register" bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both" textline " " bitfld.long 0x04 5. " BUFFER_READ_READY ,Buffer read ready" "Disabled,Enabled" line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register" bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both" textline " " bitfld.long 0x08 5. " BUFFER_READ_READY ,Buffer read ready" "Disabled,Enabled" endif sif cpuis("TEGRAX1") group.long 0x3C++0x0B line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0" bitfld.long 0x00 16.--18. " UHS_MODE_SEL ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..." endif sif !cpuis("TEGRAX2") group.long 0x50++0x03 line.long 0x00 "FER,Force Event Register" bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both" endif tree.end tree.open "Vendor-Specific Registers" width 27. group.long 0x100++0x03 line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 29. " DIFF_CLK_SEL ,Selects differential CLK and DQS" "0,1" bitfld.long 0x00 24.--28. " TRIM_VAL ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " endif hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL ,Tap value for input data path trimmer" hexmask.long.byte 0x00 8.--15. 1. " BASE_CLK_FREQ ,SD/MMC clock frequency" textline " " sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE ,Override for sdmmc_legacy_g_clk clken" "Normal,Override" textline " " endif bitfld.long 0x00 5. " SDR50_TUNING_OVERRIDE ,Override the SDR50_TUNING capabilities bit" "Normal,Override" textline " " sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE ,Override the UHS-II capabilities bit" "Normal,Override" textline " " endif bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE ,Override for padmacro and pipemacro clken" "Normal,Override" textline " " bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override" bitfld.long 0x00 1. " INPUT_IO_CLK ,Input I/O clock" "Feedback,Internal" textline " " bitfld.long 0x00 0. " SDMMC_CLK ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") if (((d.l(ad:0x700B0000+0x104))&0x40000000)==0x40000000) group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 31. " ENHANCED_STROBE_MODE ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled" bitfld.long 0x00 30. " USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled" bitfld.long 0x00 28. " USE_TMCLK_FOR_DATA_TIMEOUT ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif bitfld.long 0x00 23. " ALLOW_CARD_CLK_STALLS_IN_WR ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled" bitfld.long 0x00 21. " QUALIFY_WITH_RD_DATA_VLD ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,TUNING_SYS interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8.--11. " TUNING_ASYNC_FIFO_ADDNL_DELAY ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,VOLT_SWITCH interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,TUNING_SYS interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IO_TRIM_BYPASS ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" else group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 31. " ENHANCED_STROBE_MODE ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled" bitfld.long 0x00 30. " USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " USE_TMCLK_FOR_DATA_TIMEOUT ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif bitfld.long 0x00 23. " ALLOW_CARD_CLK_STALLS_IN_WR ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled" bitfld.long 0x00 21. " QUALIFY_WITH_RD_DATA_VLD ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,TUNING_SYS interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8.--11. " TUNING_ASYNC_FIFO_ADDNL_DELAY ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,VOLT_SWITCH interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,TUNING_SYS interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IO_TRIM_BYPASS ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" endif rgroup.long 0x108++0x03 line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register" bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE ,Indicates legacy SD interface controller is idle" "0,1" bitfld.long 0x00 17. " READ_DATA_TIMEOUT ,Valid when a data timeout error occurs" "0,1" textline " " bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT ,Valid when a data timeout error occurs" "0,1" bitfld.long 0x00 15. " WRITE_BUSY_TIMEOUT ,Valid when a data timeout error occurs" "0,1" textline " " bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT ,Valid when a data timeout error occurs" "0,1" bitfld.long 0x00 13. " SPI_WRITE_BUSY_TIMEOUT ,SPI_WRITE_BUSY timeout" "0,1" textline " " bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT ,SPI_RX_START_TOKEN timeout" "0,1" bitfld.long 0x00 5.--8. " SPI_DAT_ERR_TOKEN ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..." else group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER was changed" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN was changed" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt" bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" endif group.long 0x10C++0x17 line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") sif !cpuis("TEGRAX2") bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN ,Useful for eMMC5.x devices which support CMD queuing" "0,1" textline " " endif bitfld.long 0x00 8.--13. " DQS_TRIM_VAL ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE ,Loopback trimmed clock will be driven onto cmd line" "0,1" textline " " endif bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE ,Voltage support 3_3_V override" "Disabled,Enabled" bitfld.long 0x00 1. " VOLTAGE_3_0_V_SUPPORT_OVERRIDE ,Voltage support 3_0_V override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE ,Voltage support 1_8_V override" "Disabled,Enabled" line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register" bitfld.long 0x04 1. " BOOT_ACK ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled" bitfld.long 0x04 0. " BOOT ,Boot Option 1" "Disabled,Enabled" line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register" hexmask.long.tbyte 0x08 0.--19. 1. " VALUE ,Boot Acknowledgment timeout value" line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register" hexmask.long 0x0C 0.--24. 1. " VALUE ,Boot Data timeout value" line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register" hexmask.long.tbyte 0x10 0.--23. 1. " VALUE ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot" line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register" hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1 ,Spare register bits with reset value of 1" hexmask.long.word 0x14 1.--15. 1. " SDMMC_SPARE_0 ,Spare register bits with reset value of 0x40" textline " " bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT ,Erase timeout value" "Finite,Infinite" sif cpuis("TEGRAX2") group.long 0x124++0x1F line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1" hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V ,Maximum override for 1.8V VDD1" hexmask.long.byte 0x00 8.--15. 1. " OVERRIDE_FOR_3_0V ,Maximum override for 3.0V VDD1" textline " " hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V ,Maximum override for 3.3V VDD1" line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2" bitfld.long 0x04 31. " VGPIO_MODE_EN ,VGPIO_MODE enable" "Disabled,Enabled" bitfld.long 0x04 30. " SDMMC_CLK_OVR_ON ,Master clk en Override bit for all SLCGs" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N ,SD card detect status n" "Detected,Not detected" bitfld.long 0x04 28. " SD_CARD_WP_STATUS ,SD card wp status" "Not protected,Protected" textline " " bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET ,CMD TFIFO hot reset" "No reset,Reset" bitfld.long 0x04 26. " DAT_TFIFO_HOT_RESET ,DAT TFIFO hot reset" "No reset,Reset" textline " " bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE ,Override for sdmmc_adma3_g_clk clken" "Normal,Override" textline " " bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN ,ADMA3 descriptors prefetch enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN ,ADMA2 descriptors prefetch enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " DATA_TIMEOUT_VAL_MULTIPLIER ,Data timeout value multiplier" "No multiplier,?..." textline " " bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " ADDITIONAL_NCR_CYCLES ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2 ,Maximum override for 1.8V VDD2" textline " " else group.long 0x124++0x1F line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register" hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V ,Maximum override for 1.8V VDD1" hexmask.long.byte 0x00 8.--15. 1. " OVERRIDE_FOR_3_0V ,Maximum override for 3.0V VDD1" textline " " hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V ,Maximum override for 3.3V VDD1" line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register" hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2 ,Maximum override for 1.8V VDD2" textline " " endif sif cpuis("TEGRAX1")||cpuis("TEGRAX2") group.long 0x1AC++0x03 line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register" sif cpuis("TEGRAX2") bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux" textline " " endif bitfld.long 0x00 5. " TRIM_PWRSAVE ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes" bitfld.long 0x00 3.--4. " SEL_VREF_LEVEL ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV" textline " " bitfld.long 0x00 2. " SEL_VREG ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC" bitfld.long 0x00 1. " SEL_VREF ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage" sif cpuis("TEGRAX2") else endif group.long 0x1C0++0x07 line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register" bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled" bitfld.long 0x00 29. " WR_DATA_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CMD_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled" bitfld.long 0x00 27. " RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated" textline " " bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION ,Generates tuning error" "Not generated,Generated" hexmask.long.byte 0x00 18.--25. 1. " START_TAP_VAL ,Start tap value to be used by tuning" textline " " bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW ,Software can choose to update the tap value by itself" "Not updated,Updated" bitfld.long 0x00 13.--15. " NUM_TUNING_ITERATIONS ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..." textline " " hexmask.long.byte 0x00 6.--12. 1. " MUL_M ,Implements a multiplier" bitfld.long 0x00 3.--5. " DIV_N ,Implements a divider" "1,2,4,8,16,32,64,128" textline " " bitfld.long 0x00 0.--2. " TUNING_WORD_SEL ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7" line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register" bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " STEP_SIZE_SDR50 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7" rgroup.long 0x1C8++0x07 line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register" line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register" hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING , End tap value of best PASS window found by scan FSM" hexmask.long.byte 0x04 16.--23. 1. " PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM" textline " " hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING ,End tap value of best PASS window after fine tuning" hexmask.long.byte 0x04 0.--7. 1. " PASS_WINDOW_START_AFTER_FINE_TUNING ,Start tap value of best PASS window after fine tuning" textline " " endif width 28. group.long 0x1D0++0x0F line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value" bitfld.long 0x00 0.--5. " CLK_COUNT ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0" hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)" hexmask.long.word 0x04 10.--19. 1. " SDCLK_FREQ_SEL_DEFAULT ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)" textline " " hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT ,10-bit divider value to generate the desired SD clock frequency during initialization" line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1" hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50 ,10-bit divider value to generate the SD clock in SDR50 mode" hexmask.long.word 0x08 10.--19. 1. " SDCLK_FREQ_SEL_SDR25 ,10-bit divider value to generate the SD clock in SDR25 mode" textline " " hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12 ,10-bit divider value to generate the SD clock in SDR12 mode" line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2" hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50 ,10-bit divider value to generate the SD clock in DDR50 mode" hexmask.long.word 0x0C 0.--9. 1. " SDCLK_FREQ_SEL_SDR104 ,10-bit divider value to generate the SD clock in SDR104 mode" sif cpuis("TEGRAX2") if (((d.l(ad:0x700B0000+0x1E4))&0x20000000)==0x20000000) group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_E_PBIAS_BUF ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" textline " " textline " " bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_E_PBIAS_BUF ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" hexmask.long.byte 0x00 20.--26. 1. " COMP_PAD_DRVUP_OVR ,Used to drive DRVUP input of COMP pad" textline " " hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR ,Used to drive DRVDN input of COMP pad" textline " " bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif elif cpuis("TEGRAX1") group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_REG_ON ,Turns ON regulator in comp pad" "0,1" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" textline " " bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else if (((d.l(ad:0x700B0000+0x1E4))&0x20000000)==0x20000000) group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 29.--30. " PU_PAD_DRV_TYPE ,Pu pad drv type" "0,1,2,3" textline " " bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE ,Pd pad drv type" "0,1,2,3" bitfld.long 0x00 11. " PU_PAD_E_TEST_OUT ,Pu pad E test out" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT ,Pd pad E test out" "Disabled,Enabled" bitfld.long 0x00 7.--9. " PU_PAD_TEST_SEL ,pu pad test sel" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL ,Pd pad test sel" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 29.--30. " PU_PAD_DRV_TYPE ,PU PAD DRV TYPE" "0,1,2,3" textline " " bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE ,PD PAD DRV TYPE" "0,1,2,3" hexmask.long.byte 0x00 20.--26. 1. " CFG_SDMEMCOMP_DRVUP ,SDMMC pads drive up/down control" textline " " hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN ,SDMMC pads drive up/down control" bitfld.long 0x00 11. " PU_PAD_E_TEST_OUT ,PU PAD E TEST OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT ,PD_PAD_E_TEST_OUT" "Disabled,Enabled" bitfld.long 0x00 7.--9. " PU_PAD_TEST_SEL ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x1E4++0x07 line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings" bitfld.long 0x00 31. " AUTO_CAL_START ,Calibration state machine" "Disabled,Enabled" bitfld.long 0x00 30. " AUTO_CAL_OVERRIDE ,AUTOCAL override" "Normal,Override" textline " " bitfld.long 0x00 29. " AUTO_CAL_ENABLE ,AUTOCAL enable" "Disabled,Enabled" bitfld.long 0x00 28. " AUTO_CAL_SLW_OVERRIDE ,AUTOCAL slew rate override" "Normal,Override" textline " " bitfld.long 0x00 16.--18. " AUTO_CAL_STEP ,Calibration step interval" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_OFFSET ,2's complement offset for pull-down value" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET ,2's complement offset for pull-up value" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") group.long 0x1E8++0x07 line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval" rgroup.long 0x1EC++0x03 line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status" bitfld.long 0x00 31. " AUTO_CAL_ACTIVE ,Auto cal active" "Inactive,Active" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PULLDOWN_ADJ ,Pulldown code sent to pads" textline " " hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ ,Pullup code sent to pads" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PULLDOWN ,Pulldown code generated by auto-calibration" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP ,Pullup code generated by auto-calibration" else group.long 0x1E8++0x07 line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval" rgroup.long 0x1EC++0x03 line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status" bitfld.long 0x00 31. " AUTO_CAL_ACTIVE ,Auto cal active" "Inactive,Active" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PULLDOWN_ADJ ,Pulldown code sent to pads" textline " " hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ ,Pullup code sent to pads" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PULLDOWN ,Pulldown code generated by auto-calibration" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP ,Pullup code generated by auto-calibration" endif sif cpuis("TEGRAX1") group.long 0x1F0++0x07 line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control" hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT ,PROD value" hexmask.long.word 0x00 0.--15. 1. " SPARE_IN ,PROD value" endif sif cpuis("TEGRAX2") textline " " group.long 0x1FC++0x0B line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register" hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID ,MC write transaction stream ID" hexmask.long.byte 0x00 0.--7. 1. " MC_READ_REQ_STREAM_ID ,MC read transaction stream ID" group.long 0x200++0x07 line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register" bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled" bitfld.long 0x00 0. " MC_READ_REQ_TZ_ACCESS_EN ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled" line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3" bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped" bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ , Diff/Vref rx selection for DAT[7:0]" bitfld.long 0x04 4. " E_DIFF_CMD ,Diff/Vref rx selection for CMD" "Stopped,Not stopped" textline " " bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN ,DAT pads output driver one cycle after disable" "Disabled,Enabled" bitfld.long 0x04 2. " DAT_OE_PREAMBLE_EN ,DAT pads output driver one cycle before enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN ,CMD pad output driver one cycle after disable" "Disabled,Enabled" bitfld.long 0x04 0. " CMD_OE_PREAMBLE_EN ,CMD pad output driver one cycle before enable" "Disabled,Enabled" group.long 0x20C++0x07 line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4" hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3 ,Spare register bits with reset value of 1" hexmask.long.word 0x00 0.--15. 1. " SDMMC_SPARE2 ,Spare register bits with reset value of 0" else group.long 0x1F4++0x07 line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control" bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE ,SDMMC RCLK OVR MODE" "Disabled,Enabled" bitfld.long 0x00 19. " SDMMC_WCLK_OVR_MODE ,SDMMC WCLK OVR MODE" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE ,SDMMC CCLK OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 17. " SDMMC_RCLK_OVERRIDE ,SDMMC RCLK OVERRIDE" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE ,SDMMC WCLK OVERRIDE" "Disabled,Enabled" line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL ,SDMMCW WCOAL TMVAL" endif tree.end width 0x0B tree.end tree "SDMMC-2" base ad:0x700B0200 tree.open "Standard Registers" width 27. sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2") rgroup.long 0x24++0x03 line.long 0x00 "PSR,Present State Register" bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif sif !cpuis("TEGRAX2") group.long 0x30++0x0B line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 31. " BOOT_ACK_ERR ,Boot ack status" "Not occurred,Occurred" bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR ,Boot Ack is not received" "Not occurred,Occurred" line.long 0x04 "ISTAER,Interrupt Status Enable Register" bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both" line.long 0x08 "ISIGR,Interrupt Signal Enable Register" bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both" else group.long 0x30++0x0B line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 31. " BOOT_ACK_ERR ,Boot ack status" "Not occurred,Occurred" bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR ,Boot Ack is not received" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " BUFFER_READ_READY ,Buffer read ready" "NO_INT,GEN_INT" line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register" bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both" textline " " bitfld.long 0x04 5. " BUFFER_READ_READY ,Buffer read ready" "Disabled,Enabled" line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register" bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both" textline " " bitfld.long 0x08 5. " BUFFER_READ_READY ,Buffer read ready" "Disabled,Enabled" endif sif cpuis("TEGRAX1") group.long 0x3C++0x0B line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0" bitfld.long 0x00 16.--18. " UHS_MODE_SEL ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..." endif sif !cpuis("TEGRAX2") group.long 0x50++0x03 line.long 0x00 "FER,Force Event Register" bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both" endif tree.end tree.open "Vendor-Specific Registers" width 27. group.long 0x100++0x03 line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 29. " DIFF_CLK_SEL ,Selects differential CLK and DQS" "0,1" bitfld.long 0x00 24.--28. " TRIM_VAL ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " endif hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL ,Tap value for input data path trimmer" hexmask.long.byte 0x00 8.--15. 1. " BASE_CLK_FREQ ,SD/MMC clock frequency" textline " " sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE ,Override for sdmmc_legacy_g_clk clken" "Normal,Override" textline " " endif sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE ,Override the UHS-II capabilities bit" "Normal,Override" textline " " endif bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE ,Override for padmacro and pipemacro clken" "Normal,Override" textline " " bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override" bitfld.long 0x00 1. " INPUT_IO_CLK ,Input I/O clock" "Feedback,Internal" textline " " bitfld.long 0x00 0. " SDMMC_CLK ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") if (((d.l(ad:0x700B0200+0x104))&0x40000000)==0x40000000) group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 31. " ENHANCED_STROBE_MODE ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled" bitfld.long 0x00 30. " USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled" bitfld.long 0x00 28. " USE_TMCLK_FOR_DATA_TIMEOUT ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif bitfld.long 0x00 23. " ALLOW_CARD_CLK_STALLS_IN_WR ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled" bitfld.long 0x00 21. " QUALIFY_WITH_RD_DATA_VLD ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,TUNING_SYS interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8.--11. " TUNING_ASYNC_FIFO_ADDNL_DELAY ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,VOLT_SWITCH interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,TUNING_SYS interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IO_TRIM_BYPASS ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" else group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 31. " ENHANCED_STROBE_MODE ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled" bitfld.long 0x00 30. " USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " USE_TMCLK_FOR_DATA_TIMEOUT ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif bitfld.long 0x00 23. " ALLOW_CARD_CLK_STALLS_IN_WR ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled" bitfld.long 0x00 21. " QUALIFY_WITH_RD_DATA_VLD ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,TUNING_SYS interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8.--11. " TUNING_ASYNC_FIFO_ADDNL_DELAY ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,VOLT_SWITCH interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,TUNING_SYS interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IO_TRIM_BYPASS ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" endif rgroup.long 0x108++0x03 line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register" bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE ,Indicates legacy SD interface controller is idle" "0,1" bitfld.long 0x00 17. " READ_DATA_TIMEOUT ,Valid when a data timeout error occurs" "0,1" textline " " bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT ,Valid when a data timeout error occurs" "0,1" bitfld.long 0x00 15. " WRITE_BUSY_TIMEOUT ,Valid when a data timeout error occurs" "0,1" textline " " bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT ,Valid when a data timeout error occurs" "0,1" bitfld.long 0x00 13. " SPI_WRITE_BUSY_TIMEOUT ,SPI_WRITE_BUSY timeout" "0,1" textline " " bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT ,SPI_RX_START_TOKEN timeout" "0,1" bitfld.long 0x00 5.--8. " SPI_DAT_ERR_TOKEN ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..." else group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER was changed" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN was changed" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt" bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" endif group.long 0x10C++0x17 line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") sif !cpuis("TEGRAX2") bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN ,Useful for eMMC5.x devices which support CMD queuing" "0,1" textline " " endif bitfld.long 0x00 8.--13. " DQS_TRIM_VAL ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE ,Loopback trimmed clock will be driven onto cmd line" "0,1" textline " " endif bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE ,Voltage support 3_3_V override" "Disabled,Enabled" bitfld.long 0x00 1. " VOLTAGE_3_0_V_SUPPORT_OVERRIDE ,Voltage support 3_0_V override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE ,Voltage support 1_8_V override" "Disabled,Enabled" line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register" bitfld.long 0x04 1. " BOOT_ACK ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled" bitfld.long 0x04 0. " BOOT ,Boot Option 1" "Disabled,Enabled" line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register" hexmask.long.tbyte 0x08 0.--19. 1. " VALUE ,Boot Acknowledgment timeout value" line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register" hexmask.long 0x0C 0.--24. 1. " VALUE ,Boot Data timeout value" line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register" hexmask.long.tbyte 0x10 0.--23. 1. " VALUE ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot" line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register" hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1 ,Spare register bits with reset value of 1" hexmask.long.word 0x14 1.--15. 1. " SDMMC_SPARE_0 ,Spare register bits with reset value of 0x40" textline " " bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT ,Erase timeout value" "Finite,Infinite" sif cpuis("TEGRAX2") group.long 0x124++0x1F line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1" hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V ,Maximum override for 1.8V VDD1" hexmask.long.byte 0x00 8.--15. 1. " OVERRIDE_FOR_3_0V ,Maximum override for 3.0V VDD1" textline " " hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V ,Maximum override for 3.3V VDD1" line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2" bitfld.long 0x04 31. " VGPIO_MODE_EN ,VGPIO_MODE enable" "Disabled,Enabled" bitfld.long 0x04 30. " SDMMC_CLK_OVR_ON ,Master clk en Override bit for all SLCGs" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N ,SD card detect status n" "Detected,Not detected" bitfld.long 0x04 28. " SD_CARD_WP_STATUS ,SD card wp status" "Not protected,Protected" textline " " bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET ,CMD TFIFO hot reset" "No reset,Reset" bitfld.long 0x04 26. " DAT_TFIFO_HOT_RESET ,DAT TFIFO hot reset" "No reset,Reset" textline " " bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE ,Override for sdmmc_adma3_g_clk clken" "Normal,Override" textline " " bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN ,ADMA3 descriptors prefetch enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN ,ADMA2 descriptors prefetch enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " DATA_TIMEOUT_VAL_MULTIPLIER ,Data timeout value multiplier" "No multiplier,?..." textline " " bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " ADDITIONAL_NCR_CYCLES ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2 ,Maximum override for 1.8V VDD2" textline " " else group.long 0x124++0x1F line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register" hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V ,Maximum override for 1.8V VDD1" hexmask.long.byte 0x00 8.--15. 1. " OVERRIDE_FOR_3_0V ,Maximum override for 3.0V VDD1" textline " " hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V ,Maximum override for 3.3V VDD1" line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register" hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2 ,Maximum override for 1.8V VDD2" textline " " endif sif cpuis("TEGRAX1")||cpuis("TEGRAX2") group.long 0x1AC++0x03 line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register" sif cpuis("TEGRAX2") bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux" textline " " endif bitfld.long 0x00 5. " TRIM_PWRSAVE ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes" bitfld.long 0x00 3.--4. " SEL_VREF_LEVEL ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV" textline " " bitfld.long 0x00 2. " SEL_VREG ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC" bitfld.long 0x00 1. " SEL_VREF ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage" sif cpuis("TEGRAX2") else group.long 0x1B0++0x0F line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register" bitfld.long 0x00 31. " CALIBRATE ,Used to start a DLL calibration process" "Not started,Started" bitfld.long 0x00 25.--29. " END_COUNT ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 24. " USE_STATIC_CYCLES ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped" bitfld.long 0x00 23. " IGNORE_START_TRIM ,Used to ignore the START_TRM value" "Not ignored,Ignored" textline " " hexmask.long.byte 0x00 16.--22. 1. " START_TRIM ,Specifies the starting trimmer value to calibrate the with" bitfld.long 0x00 12.--15. " FILTER_BITS ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " SAMPLE_COUNT ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 0.--7. 1. " SAMPLE_DELAY ,Number of SDMMC host clks from changing the trimmer value" line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0" bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE ,Master DLL CLK_IN enable override" "Normal,Override" bitfld.long 0x04 30. " TX_SLV_DLL_PWRSAVE ,Active low signal" "No clock,Clock" textline " " bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE ,Active low signal" "No clock,Clock" hexmask.long.byte 0x04 22.--28. 1. " TX_SLV_DLL_DLY_CODE ,7-bit delay code to be applied to TX slave DLL" textline " " hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE ,7-bit delay code to be applied to RX slave DLL" bitfld.long 0x04 14. " DLLCAL_BYPASS ,DLL calibration bypass enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL" hexmask.long.byte 0x04 0.--6. 1. " RX_DLY_CODE_OFFSET ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL" line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1" hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked" hexmask.long.byte 0x08 16.--22. 1. " REQD_DELAY_STEPS_RX ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked" textline " " bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME ,Master DLL CLK_IN enable override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 7.--10. " SLV_DLL_SETTLE_TIME ,Slave DLL requires 4 cycles settle time when dly code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE ,7-bit delay code (128 taps) to be applied to master DLL" line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Configuration Register" bitfld.long 0x0C 31. " DLL_CAL_ACTIVE ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running" bitfld.long 0x0C 30. " DLL_PD ,Master DLL Phase detector output" "0,1" textline " " bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN ,Master DLL reset is controlled by programming MST_DLL_RST/DLL controller" "Disabled,Enabled" bitfld.long 0x0C 28. " MST_DLL_RST ,Master DLL reset" "No reset,Reset" textline " " bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN ,Slave DLL clk_out_dis is controlled by programming SLV_DLL_CLK_OUT_DIS/DLL controller" "Disabled,Enabled" bitfld.long 0x0C 26. " SLV_DLL_CLK_OUT_DIS ,Slave DLL clock out disable" "No,Yes" textline " " bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN ,Master DLL can be kept in power down mode by programming MST_DLL_PWRDN field" "Disabled,Enabled" bitfld.long 0x0C 24. " MST_DLL_PWRDN ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down" textline " " hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ ,Delay code sent to TX slave DLL after applying offset" hexmask.long.byte 0x0C 8.--14. 1. " RX_DLY_CODE_ADJ ,Delay code sent to RX slave DLL after applying offset" textline " " hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE ,Holds delay code determined by calibration process which is sent to MST DLL during calibration" endif group.long 0x1C0++0x07 line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register" bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled" bitfld.long 0x00 29. " WR_DATA_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CMD_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled" bitfld.long 0x00 27. " RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated" textline " " bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION ,Generates tuning error" "Not generated,Generated" hexmask.long.byte 0x00 18.--25. 1. " START_TAP_VAL ,Start tap value to be used by tuning" textline " " bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW ,Software can choose to update the tap value by itself" "Not updated,Updated" bitfld.long 0x00 13.--15. " NUM_TUNING_ITERATIONS ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..." textline " " hexmask.long.byte 0x00 6.--12. 1. " MUL_M ,Implements a multiplier" bitfld.long 0x00 3.--5. " DIV_N ,Implements a divider" "1,2,4,8,16,32,64,128" textline " " bitfld.long 0x00 0.--2. " TUNING_WORD_SEL ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7" line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register" bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " STEP_SIZE_SDR50 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7" rgroup.long 0x1C8++0x07 line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register" line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register" hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING , End tap value of best PASS window found by scan FSM" hexmask.long.byte 0x04 16.--23. 1. " PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM" textline " " hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING ,End tap value of best PASS window after fine tuning" hexmask.long.byte 0x04 0.--7. 1. " PASS_WINDOW_START_AFTER_FINE_TUNING ,Start tap value of best PASS window after fine tuning" textline " " endif width 28. group.long 0x1D0++0x0F line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value" bitfld.long 0x00 0.--5. " CLK_COUNT ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0" hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)" hexmask.long.word 0x04 10.--19. 1. " SDCLK_FREQ_SEL_DEFAULT ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)" textline " " hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT ,10-bit divider value to generate the desired SD clock frequency during initialization" line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1" hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50 ,10-bit divider value to generate the SD clock in SDR50 mode" hexmask.long.word 0x08 10.--19. 1. " SDCLK_FREQ_SEL_SDR25 ,10-bit divider value to generate the SD clock in SDR25 mode" textline " " hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12 ,10-bit divider value to generate the SD clock in SDR12 mode" line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2" hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50 ,10-bit divider value to generate the SD clock in DDR50 mode" hexmask.long.word 0x0C 0.--9. 1. " SDCLK_FREQ_SEL_SDR104 ,10-bit divider value to generate the SD clock in SDR104 mode" sif cpuis("TEGRAX2") if (((d.l(ad:0x700B0200+0x1E4))&0x20000000)==0x20000000) group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_E_PBIAS_BUF ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" textline " " textline " " bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_E_PBIAS_BUF ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" hexmask.long.byte 0x00 20.--26. 1. " COMP_PAD_DRVUP_OVR ,Used to drive DRVUP input of COMP pad" textline " " hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR ,Used to drive DRVDN input of COMP pad" textline " " bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif elif cpuis("TEGRAX1") group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_REG_ON ,Turns ON regulator in comp pad" "0,1" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" textline " " bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else if (((d.l(ad:0x700B0200+0x1E4))&0x20000000)==0x20000000) group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 29.--30. " PU_PAD_DRV_TYPE ,Pu pad drv type" "0,1,2,3" textline " " bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE ,Pd pad drv type" "0,1,2,3" bitfld.long 0x00 11. " PU_PAD_E_TEST_OUT ,Pu pad E test out" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT ,Pd pad E test out" "Disabled,Enabled" bitfld.long 0x00 7.--9. " PU_PAD_TEST_SEL ,pu pad test sel" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL ,Pd pad test sel" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 29.--30. " PU_PAD_DRV_TYPE ,PU PAD DRV TYPE" "0,1,2,3" textline " " bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE ,PD PAD DRV TYPE" "0,1,2,3" hexmask.long.byte 0x00 20.--26. 1. " CFG_SDMEMCOMP_DRVUP ,SDMMC pads drive up/down control" textline " " hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN ,SDMMC pads drive up/down control" bitfld.long 0x00 11. " PU_PAD_E_TEST_OUT ,PU PAD E TEST OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT ,PD_PAD_E_TEST_OUT" "Disabled,Enabled" bitfld.long 0x00 7.--9. " PU_PAD_TEST_SEL ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x1E4++0x07 line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings" bitfld.long 0x00 31. " AUTO_CAL_START ,Calibration state machine" "Disabled,Enabled" bitfld.long 0x00 30. " AUTO_CAL_OVERRIDE ,AUTOCAL override" "Normal,Override" textline " " bitfld.long 0x00 29. " AUTO_CAL_ENABLE ,AUTOCAL enable" "Disabled,Enabled" bitfld.long 0x00 28. " AUTO_CAL_SLW_OVERRIDE ,AUTOCAL slew rate override" "Normal,Override" textline " " bitfld.long 0x00 16.--18. " AUTO_CAL_STEP ,Calibration step interval" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_OFFSET ,2's complement offset for pull-down value" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET ,2's complement offset for pull-up value" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") else group.long 0x1E8++0x07 line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval" rgroup.long 0x1EC++0x03 line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status" bitfld.long 0x00 31. " AUTO_CAL_ACTIVE ,Auto cal active" "Inactive,Active" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PULLDOWN_ADJ ,Pulldown code sent to pads" textline " " hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ ,Pullup code sent to pads" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PULLDOWN ,Pulldown code generated by auto-calibration" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP ,Pullup code generated by auto-calibration" endif sif cpuis("TEGRAX1") group.long 0x1F0++0x07 line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control" hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT ,PROD value" hexmask.long.word 0x00 0.--15. 1. " SPARE_IN ,PROD value" endif sif cpuis("TEGRAX2") textline " " group.long 0x1FC++0x0B line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register" hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID ,MC write transaction stream ID" hexmask.long.byte 0x00 0.--7. 1. " MC_READ_REQ_STREAM_ID ,MC read transaction stream ID" group.long 0x200++0x07 line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register" bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled" bitfld.long 0x00 0. " MC_READ_REQ_TZ_ACCESS_EN ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled" line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3" bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped" bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ , Diff/Vref rx selection for DAT[7:0]" bitfld.long 0x04 4. " E_DIFF_CMD ,Diff/Vref rx selection for CMD" "Stopped,Not stopped" textline " " bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN ,DAT pads output driver one cycle after disable" "Disabled,Enabled" bitfld.long 0x04 2. " DAT_OE_PREAMBLE_EN ,DAT pads output driver one cycle before enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN ,CMD pad output driver one cycle after disable" "Disabled,Enabled" bitfld.long 0x04 0. " CMD_OE_PREAMBLE_EN ,CMD pad output driver one cycle before enable" "Disabled,Enabled" group.long 0x20C++0x07 line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4" hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3 ,Spare register bits with reset value of 1" hexmask.long.word 0x00 0.--15. 1. " SDMMC_SPARE2 ,Spare register bits with reset value of 0" else group.long 0x1F4++0x07 line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control" bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE ,SDMMC RCLK OVR MODE" "Disabled,Enabled" bitfld.long 0x00 19. " SDMMC_WCLK_OVR_MODE ,SDMMC WCLK OVR MODE" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE ,SDMMC CCLK OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 17. " SDMMC_RCLK_OVERRIDE ,SDMMC RCLK OVERRIDE" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE ,SDMMC WCLK OVERRIDE" "Disabled,Enabled" line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL ,SDMMCW WCOAL TMVAL" endif tree.end width 0x0B tree.end tree "SDMMC-3" base ad:0x700B0400 tree.open "Standard Registers" width 27. sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2") rgroup.long 0x24++0x03 line.long 0x00 "PSR,Present State Register" bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif sif !cpuis("TEGRAX2") group.long 0x30++0x0B line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 31. " BOOT_ACK_ERR ,Boot ack status" "Not occurred,Occurred" bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR ,Boot Ack is not received" "Not occurred,Occurred" line.long 0x04 "ISTAER,Interrupt Status Enable Register" bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both" line.long 0x08 "ISIGR,Interrupt Signal Enable Register" bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both" else group.long 0x30++0x0B line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 31. " BOOT_ACK_ERR ,Boot ack status" "Not occurred,Occurred" bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR ,Boot Ack is not received" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " BUFFER_READ_READY ,Buffer read ready" "NO_INT,GEN_INT" line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register" bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both" textline " " bitfld.long 0x04 5. " BUFFER_READ_READY ,Buffer read ready" "Disabled,Enabled" line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register" bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both" textline " " bitfld.long 0x08 5. " BUFFER_READ_READY ,Buffer read ready" "Disabled,Enabled" endif sif cpuis("TEGRAX1") group.long 0x3C++0x0B line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0" bitfld.long 0x00 16.--18. " UHS_MODE_SEL ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..." endif sif !cpuis("TEGRAX2") group.long 0x50++0x03 line.long 0x00 "FER,Force Event Register" bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both" endif tree.end tree.open "Vendor-Specific Registers" width 27. group.long 0x100++0x03 line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 29. " DIFF_CLK_SEL ,Selects differential CLK and DQS" "0,1" bitfld.long 0x00 24.--28. " TRIM_VAL ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " endif hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL ,Tap value for input data path trimmer" hexmask.long.byte 0x00 8.--15. 1. " BASE_CLK_FREQ ,SD/MMC clock frequency" textline " " sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE ,Override for sdmmc_legacy_g_clk clken" "Normal,Override" textline " " endif bitfld.long 0x00 5. " SDR50_TUNING_OVERRIDE ,Override the SDR50_TUNING capabilities bit" "Normal,Override" textline " " sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE ,Override the UHS-II capabilities bit" "Normal,Override" textline " " endif bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE ,Override for padmacro and pipemacro clken" "Normal,Override" textline " " bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override" bitfld.long 0x00 1. " INPUT_IO_CLK ,Input I/O clock" "Feedback,Internal" textline " " bitfld.long 0x00 0. " SDMMC_CLK ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") if (((d.l(ad:0x700B0400+0x104))&0x40000000)==0x40000000) group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 31. " ENHANCED_STROBE_MODE ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled" bitfld.long 0x00 30. " USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled" bitfld.long 0x00 28. " USE_TMCLK_FOR_DATA_TIMEOUT ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif bitfld.long 0x00 23. " ALLOW_CARD_CLK_STALLS_IN_WR ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled" bitfld.long 0x00 21. " QUALIFY_WITH_RD_DATA_VLD ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,TUNING_SYS interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8.--11. " TUNING_ASYNC_FIFO_ADDNL_DELAY ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,VOLT_SWITCH interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,TUNING_SYS interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IO_TRIM_BYPASS ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" else group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 31. " ENHANCED_STROBE_MODE ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled" bitfld.long 0x00 30. " USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " USE_TMCLK_FOR_DATA_TIMEOUT ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif bitfld.long 0x00 23. " ALLOW_CARD_CLK_STALLS_IN_WR ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled" bitfld.long 0x00 21. " QUALIFY_WITH_RD_DATA_VLD ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,TUNING_SYS interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8.--11. " TUNING_ASYNC_FIFO_ADDNL_DELAY ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,VOLT_SWITCH interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,TUNING_SYS interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IO_TRIM_BYPASS ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" endif rgroup.long 0x108++0x03 line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register" bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE ,Indicates legacy SD interface controller is idle" "0,1" bitfld.long 0x00 17. " READ_DATA_TIMEOUT ,Valid when a data timeout error occurs" "0,1" textline " " bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT ,Valid when a data timeout error occurs" "0,1" bitfld.long 0x00 15. " WRITE_BUSY_TIMEOUT ,Valid when a data timeout error occurs" "0,1" textline " " bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT ,Valid when a data timeout error occurs" "0,1" bitfld.long 0x00 13. " SPI_WRITE_BUSY_TIMEOUT ,SPI_WRITE_BUSY timeout" "0,1" textline " " bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT ,SPI_RX_START_TOKEN timeout" "0,1" bitfld.long 0x00 5.--8. " SPI_DAT_ERR_TOKEN ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..." else group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER was changed" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN was changed" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt" bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" endif group.long 0x10C++0x17 line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") sif !cpuis("TEGRAX2") bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN ,Useful for eMMC5.x devices which support CMD queuing" "0,1" textline " " endif bitfld.long 0x00 8.--13. " DQS_TRIM_VAL ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE ,Loopback trimmed clock will be driven onto cmd line" "0,1" textline " " endif bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE ,Voltage support 3_3_V override" "Disabled,Enabled" bitfld.long 0x00 1. " VOLTAGE_3_0_V_SUPPORT_OVERRIDE ,Voltage support 3_0_V override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE ,Voltage support 1_8_V override" "Disabled,Enabled" line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register" bitfld.long 0x04 1. " BOOT_ACK ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled" bitfld.long 0x04 0. " BOOT ,Boot Option 1" "Disabled,Enabled" line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register" hexmask.long.tbyte 0x08 0.--19. 1. " VALUE ,Boot Acknowledgment timeout value" line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register" hexmask.long 0x0C 0.--24. 1. " VALUE ,Boot Data timeout value" line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register" hexmask.long.tbyte 0x10 0.--23. 1. " VALUE ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot" line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register" hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1 ,Spare register bits with reset value of 1" hexmask.long.word 0x14 1.--15. 1. " SDMMC_SPARE_0 ,Spare register bits with reset value of 0x40" textline " " bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT ,Erase timeout value" "Finite,Infinite" sif cpuis("TEGRAX2") group.long 0x124++0x1F line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1" hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V ,Maximum override for 1.8V VDD1" hexmask.long.byte 0x00 8.--15. 1. " OVERRIDE_FOR_3_0V ,Maximum override for 3.0V VDD1" textline " " hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V ,Maximum override for 3.3V VDD1" line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2" bitfld.long 0x04 31. " VGPIO_MODE_EN ,VGPIO_MODE enable" "Disabled,Enabled" bitfld.long 0x04 30. " SDMMC_CLK_OVR_ON ,Master clk en Override bit for all SLCGs" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N ,SD card detect status n" "Detected,Not detected" bitfld.long 0x04 28. " SD_CARD_WP_STATUS ,SD card wp status" "Not protected,Protected" textline " " bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET ,CMD TFIFO hot reset" "No reset,Reset" bitfld.long 0x04 26. " DAT_TFIFO_HOT_RESET ,DAT TFIFO hot reset" "No reset,Reset" textline " " bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE ,Override for sdmmc_adma3_g_clk clken" "Normal,Override" textline " " bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN ,ADMA3 descriptors prefetch enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN ,ADMA2 descriptors prefetch enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " DATA_TIMEOUT_VAL_MULTIPLIER ,Data timeout value multiplier" "No multiplier,?..." textline " " bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " ADDITIONAL_NCR_CYCLES ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2 ,Maximum override for 1.8V VDD2" textline " " else group.long 0x124++0x1F line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register" hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V ,Maximum override for 1.8V VDD1" hexmask.long.byte 0x00 8.--15. 1. " OVERRIDE_FOR_3_0V ,Maximum override for 3.0V VDD1" textline " " hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V ,Maximum override for 3.3V VDD1" line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register" hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2 ,Maximum override for 1.8V VDD2" textline " " endif sif cpuis("TEGRAX1")||cpuis("TEGRAX2") group.long 0x1AC++0x03 line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register" sif cpuis("TEGRAX2") bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux" textline " " endif bitfld.long 0x00 5. " TRIM_PWRSAVE ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes" bitfld.long 0x00 3.--4. " SEL_VREF_LEVEL ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV" textline " " bitfld.long 0x00 2. " SEL_VREG ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC" bitfld.long 0x00 1. " SEL_VREF ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage" sif cpuis("TEGRAX2") else endif group.long 0x1C0++0x07 line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register" bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled" bitfld.long 0x00 29. " WR_DATA_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CMD_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled" bitfld.long 0x00 27. " RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated" textline " " bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION ,Generates tuning error" "Not generated,Generated" hexmask.long.byte 0x00 18.--25. 1. " START_TAP_VAL ,Start tap value to be used by tuning" textline " " bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW ,Software can choose to update the tap value by itself" "Not updated,Updated" bitfld.long 0x00 13.--15. " NUM_TUNING_ITERATIONS ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..." textline " " hexmask.long.byte 0x00 6.--12. 1. " MUL_M ,Implements a multiplier" bitfld.long 0x00 3.--5. " DIV_N ,Implements a divider" "1,2,4,8,16,32,64,128" textline " " bitfld.long 0x00 0.--2. " TUNING_WORD_SEL ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7" line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register" bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " STEP_SIZE_SDR50 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7" rgroup.long 0x1C8++0x07 line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register" line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register" hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING , End tap value of best PASS window found by scan FSM" hexmask.long.byte 0x04 16.--23. 1. " PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM" textline " " hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING ,End tap value of best PASS window after fine tuning" hexmask.long.byte 0x04 0.--7. 1. " PASS_WINDOW_START_AFTER_FINE_TUNING ,Start tap value of best PASS window after fine tuning" textline " " endif width 28. group.long 0x1D0++0x0F line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value" bitfld.long 0x00 0.--5. " CLK_COUNT ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0" hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)" hexmask.long.word 0x04 10.--19. 1. " SDCLK_FREQ_SEL_DEFAULT ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)" textline " " hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT ,10-bit divider value to generate the desired SD clock frequency during initialization" line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1" hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50 ,10-bit divider value to generate the SD clock in SDR50 mode" hexmask.long.word 0x08 10.--19. 1. " SDCLK_FREQ_SEL_SDR25 ,10-bit divider value to generate the SD clock in SDR25 mode" textline " " hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12 ,10-bit divider value to generate the SD clock in SDR12 mode" line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2" hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50 ,10-bit divider value to generate the SD clock in DDR50 mode" hexmask.long.word 0x0C 0.--9. 1. " SDCLK_FREQ_SEL_SDR104 ,10-bit divider value to generate the SD clock in SDR104 mode" sif cpuis("TEGRAX2") if (((d.l(ad:0x700B0400+0x1E4))&0x20000000)==0x20000000) group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_E_PBIAS_BUF ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" textline " " textline " " bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_E_PBIAS_BUF ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" hexmask.long.byte 0x00 20.--26. 1. " COMP_PAD_DRVUP_OVR ,Used to drive DRVUP input of COMP pad" textline " " hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR ,Used to drive DRVDN input of COMP pad" textline " " bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif elif cpuis("TEGRAX1") group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_REG_ON ,Turns ON regulator in comp pad" "0,1" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" textline " " bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else if (((d.l(ad:0x700B0400+0x1E4))&0x20000000)==0x20000000) group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 29.--30. " PU_PAD_DRV_TYPE ,Pu pad drv type" "0,1,2,3" textline " " bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE ,Pd pad drv type" "0,1,2,3" bitfld.long 0x00 11. " PU_PAD_E_TEST_OUT ,Pu pad E test out" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT ,Pd pad E test out" "Disabled,Enabled" bitfld.long 0x00 7.--9. " PU_PAD_TEST_SEL ,pu pad test sel" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL ,Pd pad test sel" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 29.--30. " PU_PAD_DRV_TYPE ,PU PAD DRV TYPE" "0,1,2,3" textline " " bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE ,PD PAD DRV TYPE" "0,1,2,3" hexmask.long.byte 0x00 20.--26. 1. " CFG_SDMEMCOMP_DRVUP ,SDMMC pads drive up/down control" textline " " hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN ,SDMMC pads drive up/down control" bitfld.long 0x00 11. " PU_PAD_E_TEST_OUT ,PU PAD E TEST OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT ,PD_PAD_E_TEST_OUT" "Disabled,Enabled" bitfld.long 0x00 7.--9. " PU_PAD_TEST_SEL ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x1E4++0x07 line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings" bitfld.long 0x00 31. " AUTO_CAL_START ,Calibration state machine" "Disabled,Enabled" bitfld.long 0x00 30. " AUTO_CAL_OVERRIDE ,AUTOCAL override" "Normal,Override" textline " " bitfld.long 0x00 29. " AUTO_CAL_ENABLE ,AUTOCAL enable" "Disabled,Enabled" bitfld.long 0x00 28. " AUTO_CAL_SLW_OVERRIDE ,AUTOCAL slew rate override" "Normal,Override" textline " " bitfld.long 0x00 16.--18. " AUTO_CAL_STEP ,Calibration step interval" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_OFFSET ,2's complement offset for pull-down value" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET ,2's complement offset for pull-up value" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") group.long 0x1E8++0x07 line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval" rgroup.long 0x1EC++0x03 line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status" bitfld.long 0x00 31. " AUTO_CAL_ACTIVE ,Auto cal active" "Inactive,Active" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PULLDOWN_ADJ ,Pulldown code sent to pads" textline " " hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ ,Pullup code sent to pads" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PULLDOWN ,Pulldown code generated by auto-calibration" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP ,Pullup code generated by auto-calibration" else group.long 0x1E8++0x07 line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval" rgroup.long 0x1EC++0x03 line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status" bitfld.long 0x00 31. " AUTO_CAL_ACTIVE ,Auto cal active" "Inactive,Active" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PULLDOWN_ADJ ,Pulldown code sent to pads" textline " " hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ ,Pullup code sent to pads" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PULLDOWN ,Pulldown code generated by auto-calibration" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP ,Pullup code generated by auto-calibration" endif sif cpuis("TEGRAX1") group.long 0x1F0++0x07 line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control" hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT ,PROD value" hexmask.long.word 0x00 0.--15. 1. " SPARE_IN ,PROD value" endif sif cpuis("TEGRAX2") textline " " group.long 0x1FC++0x0B line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register" hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID ,MC write transaction stream ID" hexmask.long.byte 0x00 0.--7. 1. " MC_READ_REQ_STREAM_ID ,MC read transaction stream ID" group.long 0x200++0x07 line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register" bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled" bitfld.long 0x00 0. " MC_READ_REQ_TZ_ACCESS_EN ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled" line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3" bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped" bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ , Diff/Vref rx selection for DAT[7:0]" bitfld.long 0x04 4. " E_DIFF_CMD ,Diff/Vref rx selection for CMD" "Stopped,Not stopped" textline " " bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN ,DAT pads output driver one cycle after disable" "Disabled,Enabled" bitfld.long 0x04 2. " DAT_OE_PREAMBLE_EN ,DAT pads output driver one cycle before enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN ,CMD pad output driver one cycle after disable" "Disabled,Enabled" bitfld.long 0x04 0. " CMD_OE_PREAMBLE_EN ,CMD pad output driver one cycle before enable" "Disabled,Enabled" group.long 0x20C++0x07 line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4" hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3 ,Spare register bits with reset value of 1" hexmask.long.word 0x00 0.--15. 1. " SDMMC_SPARE2 ,Spare register bits with reset value of 0" else group.long 0x1F4++0x07 line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control" bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE ,SDMMC RCLK OVR MODE" "Disabled,Enabled" bitfld.long 0x00 19. " SDMMC_WCLK_OVR_MODE ,SDMMC WCLK OVR MODE" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE ,SDMMC CCLK OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 17. " SDMMC_RCLK_OVERRIDE ,SDMMC RCLK OVERRIDE" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE ,SDMMC WCLK OVERRIDE" "Disabled,Enabled" line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL ,SDMMCW WCOAL TMVAL" endif tree.end width 0x0B tree.end tree "SDMMC-4" base ad:0x700B0600 tree.open "Standard Registers" width 27. sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2") rgroup.long 0x24++0x03 line.long 0x00 "PSR,Present State Register" bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif sif !cpuis("TEGRAX2") group.long 0x30++0x0B line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 31. " BOOT_ACK_ERR ,Boot ack status" "Not occurred,Occurred" bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR ,Boot Ack is not received" "Not occurred,Occurred" line.long 0x04 "ISTAER,Interrupt Status Enable Register" bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both" line.long 0x08 "ISIGR,Interrupt Signal Enable Register" bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both" else group.long 0x30++0x0B line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register" bitfld.long 0x00 31. " BOOT_ACK_ERR ,Boot ack status" "Not occurred,Occurred" bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR ,Boot Ack is not received" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " BUFFER_READ_READY ,Buffer read ready" "NO_INT,GEN_INT" line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register" bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both" textline " " bitfld.long 0x04 5. " BUFFER_READ_READY ,Buffer read ready" "Disabled,Enabled" line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register" bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both" textline " " bitfld.long 0x08 5. " BUFFER_READ_READY ,Buffer read ready" "Disabled,Enabled" endif sif cpuis("TEGRAX1") group.long 0x3C++0x0B line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0" bitfld.long 0x00 16.--18. " UHS_MODE_SEL ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..." endif sif !cpuis("TEGRAX2") group.long 0x50++0x03 line.long 0x00 "FER,Force Event Register" bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both" endif tree.end tree.open "Vendor-Specific Registers" width 27. group.long 0x100++0x03 line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 29. " DIFF_CLK_SEL ,Selects differential CLK and DQS" "0,1" bitfld.long 0x00 24.--28. " TRIM_VAL ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " endif hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL ,Tap value for input data path trimmer" hexmask.long.byte 0x00 8.--15. 1. " BASE_CLK_FREQ ,SD/MMC clock frequency" textline " " sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE ,Override for sdmmc_legacy_g_clk clken" "Normal,Override" textline " " endif sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE ,Override the UHS-II capabilities bit" "Normal,Override" textline " " endif bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE ,Override for padmacro and pipemacro clken" "Normal,Override" textline " " bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override" bitfld.long 0x00 1. " INPUT_IO_CLK ,Input I/O clock" "Feedback,Internal" textline " " bitfld.long 0x00 0. " SDMMC_CLK ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") if (((d.l(ad:0x700B0600+0x104))&0x40000000)==0x40000000) group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 31. " ENHANCED_STROBE_MODE ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled" bitfld.long 0x00 30. " USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled" bitfld.long 0x00 28. " USE_TMCLK_FOR_DATA_TIMEOUT ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif bitfld.long 0x00 23. " ALLOW_CARD_CLK_STALLS_IN_WR ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled" bitfld.long 0x00 21. " QUALIFY_WITH_RD_DATA_VLD ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,TUNING_SYS interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8.--11. " TUNING_ASYNC_FIFO_ADDNL_DELAY ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,VOLT_SWITCH interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,TUNING_SYS interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IO_TRIM_BYPASS ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" else group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 31. " ENHANCED_STROBE_MODE ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled" bitfld.long 0x00 30. " USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " USE_TMCLK_FOR_DATA_TIMEOUT ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif bitfld.long 0x00 23. " ALLOW_CARD_CLK_STALLS_IN_WR ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled" bitfld.long 0x00 21. " QUALIFY_WITH_RD_DATA_VLD ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,TUNING_SYS interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8.--11. " TUNING_ASYNC_FIFO_ADDNL_DELAY ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,VOLT_SWITCH interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,TUNING_SYS interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IO_TRIM_BYPASS ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" endif rgroup.long 0x108++0x03 line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register" bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE ,Indicates legacy SD interface controller is idle" "0,1" bitfld.long 0x00 17. " READ_DATA_TIMEOUT ,Valid when a data timeout error occurs" "0,1" textline " " bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT ,Valid when a data timeout error occurs" "0,1" bitfld.long 0x00 15. " WRITE_BUSY_TIMEOUT ,Valid when a data timeout error occurs" "0,1" textline " " bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT ,Valid when a data timeout error occurs" "0,1" bitfld.long 0x00 13. " SPI_WRITE_BUSY_TIMEOUT ,SPI_WRITE_BUSY timeout" "0,1" textline " " bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT ,SPI_RX_START_TOKEN timeout" "0,1" bitfld.long 0x00 5.--8. " SPI_DAT_ERR_TOKEN ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..." else group.long 0x104++0x03 line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register" bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS ,SD_BUS_POWER was changed" "No interrupt,Interrupt" bitfld.long 0x00 13. " VOLT_SWITCH_INT_STATUS ,VOLT_18_EN was changed" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt" bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE ,Enables a separate system interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled" bitfld.long 0x00 1. " INT_MASK_WHILE_TUNING ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPI_MODE ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled" endif group.long 0x10C++0x17 line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") sif !cpuis("TEGRAX2") bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN ,Useful for eMMC5.x devices which support CMD queuing" "0,1" textline " " endif bitfld.long 0x00 8.--13. " DQS_TRIM_VAL ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE ,Loopback trimmed clock will be driven onto cmd line" "0,1" textline " " endif bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE ,Voltage support 3_3_V override" "Disabled,Enabled" bitfld.long 0x00 1. " VOLTAGE_3_0_V_SUPPORT_OVERRIDE ,Voltage support 3_0_V override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE ,Voltage support 1_8_V override" "Disabled,Enabled" line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register" bitfld.long 0x04 1. " BOOT_ACK ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled" bitfld.long 0x04 0. " BOOT ,Boot Option 1" "Disabled,Enabled" line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register" hexmask.long.tbyte 0x08 0.--19. 1. " VALUE ,Boot Acknowledgment timeout value" line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register" hexmask.long 0x0C 0.--24. 1. " VALUE ,Boot Data timeout value" line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register" hexmask.long.tbyte 0x10 0.--23. 1. " VALUE ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot" line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register" hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1 ,Spare register bits with reset value of 1" hexmask.long.word 0x14 1.--15. 1. " SDMMC_SPARE_0 ,Spare register bits with reset value of 0x40" textline " " bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT ,Erase timeout value" "Finite,Infinite" sif cpuis("TEGRAX2") group.long 0x124++0x1F line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1" hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V ,Maximum override for 1.8V VDD1" hexmask.long.byte 0x00 8.--15. 1. " OVERRIDE_FOR_3_0V ,Maximum override for 3.0V VDD1" textline " " hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V ,Maximum override for 3.3V VDD1" line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2" bitfld.long 0x04 31. " VGPIO_MODE_EN ,VGPIO_MODE enable" "Disabled,Enabled" bitfld.long 0x04 30. " SDMMC_CLK_OVR_ON ,Master clk en Override bit for all SLCGs" "Disabled,Enabled" textline " " bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N ,SD card detect status n" "Detected,Not detected" bitfld.long 0x04 28. " SD_CARD_WP_STATUS ,SD card wp status" "Not protected,Protected" textline " " bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET ,CMD TFIFO hot reset" "No reset,Reset" bitfld.long 0x04 26. " DAT_TFIFO_HOT_RESET ,DAT TFIFO hot reset" "No reset,Reset" textline " " bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE ,Override for sdmmc_adma3_g_clk clken" "Normal,Override" textline " " bitfld.long 0x04 24. " CQE_CLKEN_OVERRIDE ,Override for sdmmc_cqe_g_clk clken" "Normal,Override" bitfld.long 0x04 23. " CQE_DESC_PREFETCH_EN ,Enables CQE task descriptors pre-fetch feature" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN ,ADMA3 descriptors prefetch enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN ,ADMA2 descriptors prefetch enable" "Disabled,Enabled" bitfld.long 0x04 16.--19. " DATA_TIMEOUT_VAL_MULTIPLIER ,Data timeout value multiplier" "No multiplier,?..." textline " " bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " ADDITIONAL_NCR_CYCLES ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2 ,Maximum override for 1.8V VDD2" textline " " else group.long 0x124++0x1F line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register" hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V ,Maximum override for 1.8V VDD1" hexmask.long.byte 0x00 8.--15. 1. " OVERRIDE_FOR_3_0V ,Maximum override for 3.0V VDD1" textline " " hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V ,Maximum override for 3.3V VDD1" line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register" hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2 ,Maximum override for 1.8V VDD2" textline " " endif sif cpuis("TEGRAX1")||cpuis("TEGRAX2") group.long 0x1AC++0x03 line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register" sif cpuis("TEGRAX2") bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux" textline " " endif bitfld.long 0x00 5. " TRIM_PWRSAVE ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes" bitfld.long 0x00 3.--4. " SEL_VREF_LEVEL ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV" textline " " bitfld.long 0x00 2. " SEL_VREG ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC" bitfld.long 0x00 1. " SEL_VREF ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage" sif cpuis("TEGRAX2") group.long 0x1B0++0x0F line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register" bitfld.long 0x00 31. " CALIBRATE ,Used to start a DLL calibration process" "Not started,Started" bitfld.long 0x00 25.--29. " END_COUNT ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 24. " USE_STATIC_CYCLES ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped" bitfld.long 0x00 23. " IGNORE_START_TRIM ,Used to ignore the START_TRM value" "Not ignored,Ignored" textline " " hexmask.long.byte 0x00 16.--22. 1. " START_TRIM ,Specifies the starting trimmer value to calibrate the with" bitfld.long 0x00 12.--15. " FILTER_BITS ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " SAMPLE_COUNT ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 0.--7. 1. " SAMPLE_DELAY ,Number of SDMMC host clks from changing the trimmer value" line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0" bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE ,Master DLL CLK_IN enable override" "Normal,Override" bitfld.long 0x04 30. " TX_SLV_DLL_PWRSAVE ,Active low signal" "No clock,Clock" textline " " bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE ,Active low signal" "No clock,Clock" hexmask.long.byte 0x04 22.--28. 1. " TX_SLV_DLL_DLY_CODE ,7-bit delay code to be applied to TX slave DLL" textline " " hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE ,7-bit delay code to be applied to RX slave DLL" bitfld.long 0x04 14. " DLLCAL_BYPASS ,DLL calibration bypass enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL" hexmask.long.byte 0x04 0.--6. 1. " RX_DLY_CODE_OFFSET ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL" line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1" hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked" hexmask.long.byte 0x08 16.--22. 1. " REQD_DELAY_STEPS_RX ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked" textline " " bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME ,Master DLL reset duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 7.--10. " SLV_DLL_SETTLE_TIME ,Slave DLL requires 4 cycles settle time when delay code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE ,7-bit delay code (128 taps) to be applied to master DLL" line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Config and Status Register" rbitfld.long 0x0C 31. " DLL_CAL_ACTIVE ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running" rbitfld.long 0x0C 30. " DLL_PD ,Master DLL Phase detector output" "0,1" textline " " bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN ,MST_DLL_RST override enable" "Disabled,Enabled" bitfld.long 0x0C 28. " MST_DLL_RST ,Master DLL reset" "No reset,Reset" textline " " bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN ,SLV_DLL_CLK_OUT_DIS override enable" "Disabled,Enabled" bitfld.long 0x0C 26. " SLV_DLL_CLK_OUT_DIS ,Slave DLL clock out disable" "No,Yes" textline " " bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN ,MST_DLL_PWRDN override enable" "Disabled,Enabled" bitfld.long 0x0C 24. " MST_DLL_PWRDN ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down" textline " " hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ ,Delay code sent to TX slave DLL after applying offset" hexmask.long.byte 0x0C 8.--14. 1. " RX_DLY_CODE_ADJ ,Delay code sent to RX slave DLL after applying offset" textline " " hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE ,Holds delay code determined by calibration process which is sent to MST DLL during calibration" else group.long 0x1B0++0x0F line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register" bitfld.long 0x00 31. " CALIBRATE ,Used to start a DLL calibration process" "Not started,Started" bitfld.long 0x00 25.--29. " END_COUNT ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 24. " USE_STATIC_CYCLES ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped" bitfld.long 0x00 23. " IGNORE_START_TRIM ,Used to ignore the START_TRM value" "Not ignored,Ignored" textline " " hexmask.long.byte 0x00 16.--22. 1. " START_TRIM ,Specifies the starting trimmer value to calibrate the with" bitfld.long 0x00 12.--15. " FILTER_BITS ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " SAMPLE_COUNT ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 0.--7. 1. " SAMPLE_DELAY ,Number of SDMMC host clks from changing the trimmer value" line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0" bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE ,Master DLL CLK_IN enable override" "Normal,Override" bitfld.long 0x04 30. " TX_SLV_DLL_PWRSAVE ,Active low signal" "No clock,Clock" textline " " bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE ,Active low signal" "No clock,Clock" hexmask.long.byte 0x04 22.--28. 1. " TX_SLV_DLL_DLY_CODE ,7-bit delay code to be applied to TX slave DLL" textline " " hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE ,7-bit delay code to be applied to RX slave DLL" bitfld.long 0x04 14. " DLLCAL_BYPASS ,DLL calibration bypass enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL" hexmask.long.byte 0x04 0.--6. 1. " RX_DLY_CODE_OFFSET ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL" line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1" hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked" hexmask.long.byte 0x08 16.--22. 1. " REQD_DELAY_STEPS_RX ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked" textline " " bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME ,Master DLL CLK_IN enable override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 7.--10. " SLV_DLL_SETTLE_TIME ,Slave DLL requires 4 cycles settle time when dly code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE ,7-bit delay code (128 taps) to be applied to master DLL" line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Configuration Register" bitfld.long 0x0C 31. " DLL_CAL_ACTIVE ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running" bitfld.long 0x0C 30. " DLL_PD ,Master DLL Phase detector output" "0,1" textline " " bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN ,Master DLL reset is controlled by programming MST_DLL_RST/DLL controller" "Disabled,Enabled" bitfld.long 0x0C 28. " MST_DLL_RST ,Master DLL reset" "No reset,Reset" textline " " bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN ,Slave DLL clk_out_dis is controlled by programming SLV_DLL_CLK_OUT_DIS/DLL controller" "Disabled,Enabled" bitfld.long 0x0C 26. " SLV_DLL_CLK_OUT_DIS ,Slave DLL clock out disable" "No,Yes" textline " " bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN ,Master DLL can be kept in power down mode by programming MST_DLL_PWRDN field" "Disabled,Enabled" bitfld.long 0x0C 24. " MST_DLL_PWRDN ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down" textline " " hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ ,Delay code sent to TX slave DLL after applying offset" hexmask.long.byte 0x0C 8.--14. 1. " RX_DLY_CODE_ADJ ,Delay code sent to RX slave DLL after applying offset" textline " " hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE ,Holds delay code determined by calibration process which is sent to MST DLL during calibration" endif group.long 0x1C0++0x07 line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register" bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled" bitfld.long 0x00 29. " WR_DATA_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " CMD_CRC_ERR_EN ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled" bitfld.long 0x00 27. " RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated" textline " " bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION ,Generates tuning error" "Not generated,Generated" hexmask.long.byte 0x00 18.--25. 1. " START_TAP_VAL ,Start tap value to be used by tuning" textline " " bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW ,Software can choose to update the tap value by itself" "Not updated,Updated" bitfld.long 0x00 13.--15. " NUM_TUNING_ITERATIONS ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..." textline " " hexmask.long.byte 0x00 6.--12. 1. " MUL_M ,Implements a multiplier" bitfld.long 0x00 3.--5. " DIV_N ,Implements a divider" "1,2,4,8,16,32,64,128" textline " " bitfld.long 0x00 0.--2. " TUNING_WORD_SEL ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7" line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register" bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " STEP_SIZE_SDR50 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7" rgroup.long 0x1C8++0x07 line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register" line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register" hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING , End tap value of best PASS window found by scan FSM" hexmask.long.byte 0x04 16.--23. 1. " PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM" textline " " hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING ,End tap value of best PASS window after fine tuning" hexmask.long.byte 0x04 0.--7. 1. " PASS_WINDOW_START_AFTER_FINE_TUNING ,Start tap value of best PASS window after fine tuning" textline " " endif width 28. group.long 0x1D0++0x0F line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value" bitfld.long 0x00 0.--5. " CLK_COUNT ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0" hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)" hexmask.long.word 0x04 10.--19. 1. " SDCLK_FREQ_SEL_DEFAULT ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)" textline " " hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT ,10-bit divider value to generate the desired SD clock frequency during initialization" line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1" hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50 ,10-bit divider value to generate the SD clock in SDR50 mode" hexmask.long.word 0x08 10.--19. 1. " SDCLK_FREQ_SEL_SDR25 ,10-bit divider value to generate the SD clock in SDR25 mode" textline " " hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12 ,10-bit divider value to generate the SD clock in SDR12 mode" line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2" hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50 ,10-bit divider value to generate the SD clock in DDR50 mode" hexmask.long.word 0x0C 0.--9. 1. " SDCLK_FREQ_SEL_SDR104 ,10-bit divider value to generate the SD clock in SDR104 mode" sif cpuis("TEGRAX2") if (((d.l(ad:0x700B0600+0x1E4))&0x20000000)==0x20000000) group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_E_PBIAS_BUF ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" textline " " textline " " bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_E_PBIAS_BUF ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" hexmask.long.byte 0x00 20.--26. 1. " COMP_PAD_DRVUP_OVR ,Used to drive DRVUP input of COMP pad" textline " " hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR ,Used to drive DRVDN input of COMP pad" textline " " bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif elif cpuis("TEGRAX1") group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 30. " COMP_PAD_REG_ON ,Turns ON regulator in comp pad" "0,1" textline " " bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3" textline " " bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT ,Used to control e_test_out input of COMP pad" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else if (((d.l(ad:0x700B0600+0x1E4))&0x20000000)==0x20000000) group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 29.--30. " PU_PAD_DRV_TYPE ,Pu pad drv type" "0,1,2,3" textline " " bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE ,Pd pad drv type" "0,1,2,3" bitfld.long 0x00 11. " PU_PAD_E_TEST_OUT ,Pu pad E test out" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT ,Pd pad E test out" "Disabled,Enabled" bitfld.long 0x00 7.--9. " PU_PAD_TEST_SEL ,pu pad test sel" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL ,Pd pad test sel" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x1E0++0x03 line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register" bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD ,Used to control E_INPUT" "Disabled,Enabled" bitfld.long 0x00 29.--30. " PU_PAD_DRV_TYPE ,PU PAD DRV TYPE" "0,1,2,3" textline " " bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE ,PD PAD DRV TYPE" "0,1,2,3" hexmask.long.byte 0x00 20.--26. 1. " CFG_SDMEMCOMP_DRVUP ,SDMMC pads drive up/down control" textline " " hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN ,SDMMC pads drive up/down control" bitfld.long 0x00 11. " PU_PAD_E_TEST_OUT ,PU PAD E TEST OUT" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT ,PD_PAD_E_TEST_OUT" "Disabled,Enabled" bitfld.long 0x00 7.--9. " PU_PAD_TEST_SEL ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x1E4++0x07 line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings" bitfld.long 0x00 31. " AUTO_CAL_START ,Calibration state machine" "Disabled,Enabled" bitfld.long 0x00 30. " AUTO_CAL_OVERRIDE ,AUTOCAL override" "Normal,Override" textline " " bitfld.long 0x00 29. " AUTO_CAL_ENABLE ,AUTOCAL enable" "Disabled,Enabled" bitfld.long 0x00 28. " AUTO_CAL_SLW_OVERRIDE ,AUTOCAL slew rate override" "Normal,Override" textline " " bitfld.long 0x00 16.--18. " AUTO_CAL_STEP ,Calibration step interval" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PD_OFFSET ,2's complement offset for pull-down value" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET ,2's complement offset for pull-up value" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") else group.long 0x1E8++0x07 line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval" rgroup.long 0x1EC++0x03 line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status" bitfld.long 0x00 31. " AUTO_CAL_ACTIVE ,Auto cal active" "Inactive,Active" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PULLDOWN_ADJ ,Pulldown code sent to pads" textline " " hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ ,Pullup code sent to pads" hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PULLDOWN ,Pulldown code generated by auto-calibration" textline " " hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP ,Pullup code generated by auto-calibration" endif sif cpuis("TEGRAX1") group.long 0x1F0++0x07 line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control" hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT ,PROD value" hexmask.long.word 0x00 0.--15. 1. " SPARE_IN ,PROD value" endif sif cpuis("TEGRAX2") textline " " group.long 0x1FC++0x0B line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register" hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID ,MC write transaction stream ID" hexmask.long.byte 0x00 0.--7. 1. " MC_READ_REQ_STREAM_ID ,MC read transaction stream ID" group.long 0x200++0x07 line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register" bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled" bitfld.long 0x00 0. " MC_READ_REQ_TZ_ACCESS_EN ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled" line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3" bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped" bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ , Diff/Vref rx selection for DAT[7:0]" bitfld.long 0x04 4. " E_DIFF_CMD ,Diff/Vref rx selection for CMD" "Stopped,Not stopped" textline " " bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN ,DAT pads output driver one cycle after disable" "Disabled,Enabled" bitfld.long 0x04 2. " DAT_OE_PREAMBLE_EN ,DAT pads output driver one cycle before enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN ,CMD pad output driver one cycle after disable" "Disabled,Enabled" bitfld.long 0x04 0. " CMD_OE_PREAMBLE_EN ,CMD pad output driver one cycle before enable" "Disabled,Enabled" group.long 0x20C++0x07 line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4" hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3 ,Spare register bits with reset value of 1" hexmask.long.word 0x00 0.--15. 1. " SDMMC_SPARE2 ,Spare register bits with reset value of 0" else group.long 0x1F4++0x07 line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control" bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE ,SDMMC RCLK OVR MODE" "Disabled,Enabled" bitfld.long 0x00 19. " SDMMC_WCLK_OVR_MODE ,SDMMC WCLK OVR MODE" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE ,SDMMC CCLK OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 17. " SDMMC_RCLK_OVERRIDE ,SDMMC RCLK OVERRIDE" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE ,SDMMC WCLK OVERRIDE" "Disabled,Enabled" line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register" hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL ,SDMMCW WCOAL TMVAL" endif tree.end width 0x0B tree.end tree.end tree "SATA Controller" tree "IPFS registers" base ad:0x70020000 width 19. tree "Vectors" group.long 0x0++0x03 line.long 0x00 "AXI_BAR0_SZ_0,The Size Of The Address Range Associated With BAR0" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR0_SIZE ,The size of the address range associated with BAR0 in 4K increments" group.long 0x4++0x03 line.long 0x00 "AXI_BAR1_SZ_0,The Size Of The Address Range Associated With BAR1" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR1_SIZE ,The size of the address range associated with BAR1 in 4K increments" group.long 0x8++0x03 line.long 0x00 "AXI_BAR2_SZ_0,The Size Of The Address Range Associated With BAR2" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR2_SIZE ,The size of the address range associated with BAR2 in 4K increments" group.long 0xC++0x03 line.long 0x00 "AXI_BAR3_SZ_0,The Size Of The Address Range Associated With BAR3" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR3_SIZE ,The size of the address range associated with BAR3 in 4K increments" group.long 0x10++0x03 line.long 0x00 "AXI_BAR4_SZ_0,The Size Of The Address Range Associated With BAR4" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR4_SIZE ,The size of the address range associated with BAR4 in 4K increments" group.long 0x14++0x03 line.long 0x00 "AXI_BAR5_SZ_0,The Size Of The Address Range Associated With BAR5" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR5_SIZE ,The size of the address range associated with BAR5 in 4K increments" group.long 0x18++0x03 line.long 0x00 "AXI_BAR6_SZ_0,The Size Of The Address Range Associated With BAR6" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR6_SIZE ,The size of the address range associated with BAR6 in 4K increments" group.long 0x1C++0x03 line.long 0x00 "AXI_BAR7_SZ_0,The Size Of The Address Range Associated With BAR7" hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR7_SIZE ,The size of the address range associated with BAR7 in 4K increments" group.long 0x40++0x03 line.long 0x00 "AXI_BAR0_START_0,The Start Of AXI Address Space For BAR0" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR0_START ,The start of the AXI address space for BAR0" group.long 0x44++0x03 line.long 0x00 "AXI_BAR1_START_0,The Start Of AXI Address Space For BAR1" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR1_START ,The start of the AXI address space for BAR1" group.long 0x48++0x03 line.long 0x00 "AXI_BAR2_START_0,The Start Of AXI Address Space For BAR2" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR2_START ,The start of the AXI address space for BAR2" group.long 0x4C++0x03 line.long 0x00 "AXI_BAR3_START_0,The Start Of AXI Address Space For BAR3" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR3_START ,The start of the AXI address space for BAR3" group.long 0x50++0x03 line.long 0x00 "AXI_BAR4_START_0,The Start Of AXI Address Space For BAR4" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR4_START ,The start of the AXI address space for BAR4" group.long 0x54++0x03 line.long 0x00 "AXI_BAR5_START_0,The Start Of AXI Address Space For BAR5" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR5_START ,The start of the AXI address space for BAR5" group.long 0x58++0x03 line.long 0x00 "AXI_BAR6_START_0,The Start Of AXI Address Space For BAR6" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR6_START ,The start of the AXI address space for BAR6" group.long 0x5C++0x03 line.long 0x00 "AXI_BAR7_START_0,The Start Of AXI Address Space For BAR7" hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR7_START ,The start of the AXI address space for BAR7" group.long 0x80++0x03 line.long 0x00 "FPCI_BAR0_0,FPCI BAR0" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR0_START ,The start of FPCI address space mapped into the BAR0 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR0_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x84++0x03 line.long 0x00 "FPCI_BAR1_0,FPCI BAR1" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR1_START ,The start of FPCI address space mapped into the BAR1 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR1_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x88++0x03 line.long 0x00 "FPCI_BAR2_0,FPCI BAR2" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR2_START ,The start of FPCI address space mapped into the BAR2 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR2_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x8C++0x03 line.long 0x00 "FPCI_BAR3_0,FPCI BAR3" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR3_START ,The start of FPCI address space mapped into the BAR3 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR3_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x90++0x03 line.long 0x00 "FPCI_BAR4_0,FPCI BAR4" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR4_START ,The start of FPCI address space mapped into the BAR4 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR4_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x94++0x03 line.long 0x00 "FPCI_BAR5_0,FPCI BAR5" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR5_START ,The start of FPCI address space mapped into the BAR5 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR5_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x98++0x03 line.long 0x00 "FPCI_BAR6_0,FPCI BAR6" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR6_START ,The start of FPCI address space mapped into the BAR6 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR6_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0x9C++0x03 line.long 0x00 "FPCI_BAR7_0,FPCI BAR7" hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR7_START ,The start of FPCI address space mapped into the BAR7 range of PCI memory space" bitfld.long 0x00 0. " FPCI_BAR7_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config" group.long 0xC0++0x0B line.long 0x00 "MSI_BAR_SZ_0,MSI BAR Size" hexmask.long.tbyte 0x00 0.--19. 1. " MSI_BAR_SIZE ,The size of the address range associated with MSI BAR is in 4K increments" line.long 0x04 "MSI_AXI_BAR_ST_0,MSI AXI BAR Start" hexmask.long.tbyte 0x04 12.--31. 0x10 " MSI_AXI_BAR_START ,The start of the upstream AXI address space for MSI BAR" line.long 0x08 "MSI_FPCI_BAR_ST_0,MSI FPCI BAR Start" hexmask.long 0x08 4.--31. 0x10 " MSI_FPCI_BAR_START ,The start of the upstream FPCI address space for MSI BAR" tree.end width 12. tree "MSI Vector registers" width 12. group.long 0x100++0x1F line.long 0x00 "MSI_VEC0_0,SATA MSI Vector Register 0" eventfld.long 0x00 31. " MSI_VECTOR[31] ,MSI vector 31" "No MSI,MSI sent" eventfld.long 0x00 30. " [30] ,MSI vector 30" "No MSI,MSI sent" eventfld.long 0x00 29. " [29] ,MSI vector 29" "No MSI,MSI sent" eventfld.long 0x00 28. " [28] ,MSI vector 28" "No MSI,MSI sent" eventfld.long 0x00 27. " [27] ,MSI vector 27" "No MSI,MSI sent" eventfld.long 0x00 26. " [26] ,MSI vector 26" "No MSI,MSI sent" textline " " eventfld.long 0x00 25. " [25] ,MSI vector 25" "No MSI,MSI sent" eventfld.long 0x00 24. " [24] ,MSI vector 24" "No MSI,MSI sent" eventfld.long 0x00 23. " [23] ,MSI vector 23" "No MSI,MSI sent" eventfld.long 0x00 22. " [22] ,MSI vector 22" "No MSI,MSI sent" eventfld.long 0x00 21. " [21] ,MSI vector 21" "No MSI,MSI sent" eventfld.long 0x00 20. " [20] ,MSI vector 20" "No MSI,MSI sent" textline " " eventfld.long 0x00 19. " [19] ,MSI vector 19" "No MSI,MSI sent" eventfld.long 0x00 18. " [18] ,MSI vector 18" "No MSI,MSI sent" eventfld.long 0x00 17. " [17] ,MSI vector 17" "No MSI,MSI sent" eventfld.long 0x00 16. " [16] ,MSI vector 16" "No MSI,MSI sent" eventfld.long 0x00 15. " [15] ,MSI vector 15" "No MSI,MSI sent" eventfld.long 0x00 14. " [14] ,MSI vector 14" "No MSI,MSI sent" textline " " eventfld.long 0x00 13. " [13] ,MSI vector 13" "No MSI,MSI sent" eventfld.long 0x00 12. " [12] ,MSI vector 12" "No MSI,MSI sent" eventfld.long 0x00 11. " [11] ,MSI vector 11" "No MSI,MSI sent" eventfld.long 0x00 10. " [10] ,MSI vector 10" "No MSI,MSI sent" eventfld.long 0x00 9. " [9] ,MSI vector 9" "No MSI,MSI sent" eventfld.long 0x00 8. " [8] ,MSI vector 8" "No MSI,MSI sent" textline " " eventfld.long 0x00 7. " [7] ,MSI vector 7" "No MSI,MSI sent" eventfld.long 0x00 6. " [6] ,MSI vector 6" "No MSI,MSI sent" eventfld.long 0x00 5. " [5] ,MSI vector 5" "No MSI,MSI sent" eventfld.long 0x00 4. " [4] ,MSI vector 4" "No MSI,MSI sent" eventfld.long 0x00 3. " [3] ,MSI vector 3" "No MSI,MSI sent" eventfld.long 0x00 2. " [2] ,MSI vector 2" "No MSI,MSI sent" textline " " eventfld.long 0x00 1. " [1] ,MSI vector 1" "No MSI,MSI sent" eventfld.long 0x00 0. " [0] ,MSI vector 0" "No MSI,MSI sent" line.long 0x04 "MSI_VEC1_0,SATA MSI Vector Register 1" eventfld.long 0x04 31. " MSI_VECTOR[63] ,MSI vector 63" "No MSI,MSI sent" eventfld.long 0x04 30. " [62] ,MSI vector 62" "No MSI,MSI sent" eventfld.long 0x04 29. " [61] ,MSI vector 61" "No MSI,MSI sent" eventfld.long 0x04 28. " [60] ,MSI vector 60" "No MSI,MSI sent" eventfld.long 0x04 27. " [59] ,MSI vector 59" "No MSI,MSI sent" eventfld.long 0x04 26. " [58] ,MSI vector 58" "No MSI,MSI sent" textline " " eventfld.long 0x04 25. " [57] ,MSI vector 57" "No MSI,MSI sent" eventfld.long 0x04 24. " [56] ,MSI vector 56" "No MSI,MSI sent" eventfld.long 0x04 23. " [55] ,MSI vector 55" "No MSI,MSI sent" eventfld.long 0x04 22. " [54] ,MSI vector 54" "No MSI,MSI sent" eventfld.long 0x04 21. " [53] ,MSI vector 53" "No MSI,MSI sent" eventfld.long 0x04 20. " [52] ,MSI vector 52" "No MSI,MSI sent" textline " " eventfld.long 0x04 19. " [51] ,MSI vector 51" "No MSI,MSI sent" eventfld.long 0x04 18. " [50] ,MSI vector 50" "No MSI,MSI sent" eventfld.long 0x04 17. " [49] ,MSI vector 49" "No MSI,MSI sent" eventfld.long 0x04 16. " [48] ,MSI vector 48" "No MSI,MSI sent" eventfld.long 0x04 15. " [47] ,MSI vector 47" "No MSI,MSI sent" eventfld.long 0x04 14. " [46] ,MSI vector 46" "No MSI,MSI sent" textline " " eventfld.long 0x04 13. " [45] ,MSI vector 45" "No MSI,MSI sent" eventfld.long 0x04 12. " [44] ,MSI vector 44" "No MSI,MSI sent" eventfld.long 0x04 11. " [43] ,MSI vector 43" "No MSI,MSI sent" eventfld.long 0x04 10. " [42] ,MSI vector 42" "No MSI,MSI sent" eventfld.long 0x04 9. " [41] ,MSI vector 41" "No MSI,MSI sent" eventfld.long 0x04 8. " [40] ,MSI vector 40" "No MSI,MSI sent" textline " " eventfld.long 0x04 7. " [39] ,MSI vector 39" "No MSI,MSI sent" eventfld.long 0x04 6. " [38] ,MSI vector 38" "No MSI,MSI sent" eventfld.long 0x04 5. " [37] ,MSI vector 37" "No MSI,MSI sent" eventfld.long 0x04 4. " [36] ,MSI vector 36" "No MSI,MSI sent" eventfld.long 0x04 3. " [35] ,MSI vector 35" "No MSI,MSI sent" eventfld.long 0x04 2. " [34] ,MSI vector 34" "No MSI,MSI sent" textline " " eventfld.long 0x04 1. " [33] ,MSI vector 33" "No MSI,MSI sent" eventfld.long 0x04 0. " [32] ,MSI vector 32" "No MSI,MSI sent" line.long 0x08 "MSI_VEC2_0,SATA MSI Vector Register 2" eventfld.long 0x08 31. " MSI_VECTOR[95] ,MSI vector 95" "No MSI,MSI sent" eventfld.long 0x08 30. " [94] ,MSI vector 94" "No MSI,MSI sent" eventfld.long 0x08 29. " [93] ,MSI vector 93" "No MSI,MSI sent" eventfld.long 0x08 28. " [92] ,MSI vector 92" "No MSI,MSI sent" eventfld.long 0x08 27. " [91] ,MSI vector 91" "No MSI,MSI sent" eventfld.long 0x08 26. " [90] ,MSI vector 90" "No MSI,MSI sent" textline " " eventfld.long 0x08 25. " [89] ,MSI vector 89" "No MSI,MSI sent" eventfld.long 0x08 24. " [88] ,MSI vector 88" "No MSI,MSI sent" eventfld.long 0x08 23. " [87] ,MSI vector 87" "No MSI,MSI sent" eventfld.long 0x08 22. " [86] ,MSI vector 86" "No MSI,MSI sent" eventfld.long 0x08 21. " [85] ,MSI vector 85" "No MSI,MSI sent" eventfld.long 0x08 20. " [84] ,MSI vector 84" "No MSI,MSI sent" textline " " eventfld.long 0x08 19. " [83] ,MSI vector 83" "No MSI,MSI sent" eventfld.long 0x08 18. " [82] ,MSI vector 82" "No MSI,MSI sent" eventfld.long 0x08 17. " [81] ,MSI vector 81" "No MSI,MSI sent" eventfld.long 0x08 16. " [80] ,MSI vector 80" "No MSI,MSI sent" eventfld.long 0x08 15. " [79] ,MSI vector 79" "No MSI,MSI sent" eventfld.long 0x08 14. " [78] ,MSI vector 78" "No MSI,MSI sent" textline " " eventfld.long 0x08 13. " [77] ,MSI vector 77" "No MSI,MSI sent" eventfld.long 0x08 12. " [76] ,MSI vector 76" "No MSI,MSI sent" eventfld.long 0x08 11. " [75] ,MSI vector 75" "No MSI,MSI sent" eventfld.long 0x08 10. " [74] ,MSI vector 74" "No MSI,MSI sent" eventfld.long 0x08 9. " [73] ,MSI vector 73" "No MSI,MSI sent" eventfld.long 0x08 8. " [72] ,MSI vector 72" "No MSI,MSI sent" textline " " eventfld.long 0x08 7. " [71] ,MSI vector 71" "No MSI,MSI sent" eventfld.long 0x08 6. " [70] ,MSI vector 70" "No MSI,MSI sent" eventfld.long 0x08 5. " [69] ,MSI vector 69" "No MSI,MSI sent" eventfld.long 0x08 4. " [68] ,MSI vector 68" "No MSI,MSI sent" eventfld.long 0x08 3. " [67] ,MSI vector 67" "No MSI,MSI sent" eventfld.long 0x08 2. " [66] ,MSI vector 66" "No MSI,MSI sent" textline " " eventfld.long 0x08 1. " [65] ,MSI vector 65" "No MSI,MSI sent" eventfld.long 0x08 0. " [64] ,MSI vector 64" "No MSI,MSI sent" line.long 0x0C "MSI_VEC3_0,SATA MSI Vector Register 3" eventfld.long 0x0C 31. " MSI_VECTOR[127] ,MSI vector 127" "No MSI,MSI sent" eventfld.long 0x0C 30. " [126] ,MSI vector 126" "No MSI,MSI sent" eventfld.long 0x0C 29. " [125] ,MSI vector 125" "No MSI,MSI sent" eventfld.long 0x0C 28. " [124] ,MSI vector 124" "No MSI,MSI sent" eventfld.long 0x0C 27. " [123] ,MSI vector 123" "No MSI,MSI sent" eventfld.long 0x0C 26. " [122] ,MSI vector 122" "No MSI,MSI sent" textline " " eventfld.long 0x0C 25. " [121] ,MSI vector 121" "No MSI,MSI sent" eventfld.long 0x0C 24. " [120] ,MSI vector 120" "No MSI,MSI sent" eventfld.long 0x0C 23. " [119] ,MSI vector 119" "No MSI,MSI sent" eventfld.long 0x0C 22. " [118] ,MSI vector 118" "No MSI,MSI sent" eventfld.long 0x0C 21. " [117] ,MSI vector 117" "No MSI,MSI sent" eventfld.long 0x0C 20. " [116] ,MSI vector 116" "No MSI,MSI sent" textline " " eventfld.long 0x0C 19. " [115] ,MSI vector 115" "No MSI,MSI sent" eventfld.long 0x0C 18. " [114] ,MSI vector 114" "No MSI,MSI sent" eventfld.long 0x0C 17. " [113] ,MSI vector 113" "No MSI,MSI sent" eventfld.long 0x0C 16. " [112] ,MSI vector 112" "No MSI,MSI sent" eventfld.long 0x0C 15. " [111] ,MSI vector 111" "No MSI,MSI sent" eventfld.long 0x0C 14. " [110] ,MSI vector 110" "No MSI,MSI sent" textline " " eventfld.long 0x0C 13. " [109] ,MSI vector 109" "No MSI,MSI sent" eventfld.long 0x0C 12. " [108] ,MSI vector 108" "No MSI,MSI sent" eventfld.long 0x0C 11. " [107] ,MSI vector 107" "No MSI,MSI sent" eventfld.long 0x0C 10. " [106] ,MSI vector 106" "No MSI,MSI sent" eventfld.long 0x0C 9. " [105] ,MSI vector 105" "No MSI,MSI sent" eventfld.long 0x0C 8. " [104] ,MSI vector 104" "No MSI,MSI sent" textline " " eventfld.long 0x0C 7. " [103] ,MSI vector 103" "No MSI,MSI sent" eventfld.long 0x0C 6. " [102] ,MSI vector 102" "No MSI,MSI sent" eventfld.long 0x0C 5. " [101] ,MSI vector 101" "No MSI,MSI sent" eventfld.long 0x0C 4. " [100] ,MSI vector 100" "No MSI,MSI sent" eventfld.long 0x0C 3. " [99] ,MSI vector 99" "No MSI,MSI sent" eventfld.long 0x0C 2. " [98] ,MSI vector 98" "No MSI,MSI sent" textline " " eventfld.long 0x0C 1. " [97] ,MSI vector 97" "No MSI,MSI sent" eventfld.long 0x0C 0. " [96] ,MSI vector 96" "No MSI,MSI sent" line.long 0x10 "MSI_VEC4_0,SATA MSI Vector Register 4" eventfld.long 0x10 31. " MSI_VECTOR[159] ,MSI vector 159" "No MSI,MSI sent" eventfld.long 0x10 30. " [158] ,MSI vector 158" "No MSI,MSI sent" eventfld.long 0x10 29. " [157] ,MSI vector 157" "No MSI,MSI sent" eventfld.long 0x10 28. " [156] ,MSI vector 156" "No MSI,MSI sent" eventfld.long 0x10 27. " [155] ,MSI vector 155" "No MSI,MSI sent" eventfld.long 0x10 26. " [154] ,MSI vector 154" "No MSI,MSI sent" textline " " eventfld.long 0x10 25. " [153] ,MSI vector 153" "No MSI,MSI sent" eventfld.long 0x10 24. " [152] ,MSI vector 152" "No MSI,MSI sent" eventfld.long 0x10 23. " [151] ,MSI vector 151" "No MSI,MSI sent" eventfld.long 0x10 22. " [150] ,MSI vector 150" "No MSI,MSI sent" eventfld.long 0x10 21. " [149] ,MSI vector 149" "No MSI,MSI sent" eventfld.long 0x10 20. " [148] ,MSI vector 148" "No MSI,MSI sent" textline " " eventfld.long 0x10 19. " [147] ,MSI vector 147" "No MSI,MSI sent" eventfld.long 0x10 18. " [146] ,MSI vector 146" "No MSI,MSI sent" eventfld.long 0x10 17. " [145] ,MSI vector 145" "No MSI,MSI sent" eventfld.long 0x10 16. " [144] ,MSI vector 144" "No MSI,MSI sent" eventfld.long 0x10 15. " [143] ,MSI vector 143" "No MSI,MSI sent" eventfld.long 0x10 14. " [142] ,MSI vector 142" "No MSI,MSI sent" textline " " eventfld.long 0x10 13. " [141] ,MSI vector 141" "No MSI,MSI sent" eventfld.long 0x10 12. " [140] ,MSI vector 140" "No MSI,MSI sent" eventfld.long 0x10 11. " [139] ,MSI vector 139" "No MSI,MSI sent" eventfld.long 0x10 10. " [138] ,MSI vector 138" "No MSI,MSI sent" eventfld.long 0x10 9. " [137] ,MSI vector 137" "No MSI,MSI sent" eventfld.long 0x10 8. " [136] ,MSI vector 136" "No MSI,MSI sent" textline " " eventfld.long 0x10 7. " [135] ,MSI vector 135" "No MSI,MSI sent" eventfld.long 0x10 6. " [134] ,MSI vector 134" "No MSI,MSI sent" eventfld.long 0x10 5. " [133] ,MSI vector 133" "No MSI,MSI sent" eventfld.long 0x10 4. " [132] ,MSI vector 132" "No MSI,MSI sent" eventfld.long 0x10 3. " [131] ,MSI vector 131" "No MSI,MSI sent" eventfld.long 0x10 2. " [130] ,MSI vector 130" "No MSI,MSI sent" textline " " eventfld.long 0x10 1. " [129] ,MSI vector 129" "No MSI,MSI sent" eventfld.long 0x10 0. " [128] ,MSI vector 128" "No MSI,MSI sent" line.long 0x14 "MSI_VEC5_0,SATA MSI Vector Register 5" eventfld.long 0x14 31. " MSI_VECTOR[191] ,MSI vector 191" "No MSI,MSI sent" eventfld.long 0x14 30. " [190] ,MSI vector 190" "No MSI,MSI sent" eventfld.long 0x14 29. " [189] ,MSI vector 189" "No MSI,MSI sent" eventfld.long 0x14 28. " [188] ,MSI vector 188" "No MSI,MSI sent" eventfld.long 0x14 27. " [187] ,MSI vector 187" "No MSI,MSI sent" eventfld.long 0x14 26. " [186] ,MSI vector 186" "No MSI,MSI sent" textline " " eventfld.long 0x14 25. " [185] ,MSI vector 185" "No MSI,MSI sent" eventfld.long 0x14 24. " [184] ,MSI vector 184" "No MSI,MSI sent" eventfld.long 0x14 23. " [183] ,MSI vector 183" "No MSI,MSI sent" eventfld.long 0x14 22. " [182] ,MSI vector 182" "No MSI,MSI sent" eventfld.long 0x14 21. " [181] ,MSI vector 181" "No MSI,MSI sent" eventfld.long 0x14 20. " [180] ,MSI vector 180" "No MSI,MSI sent" textline " " eventfld.long 0x14 19. " [179] ,MSI vector 179" "No MSI,MSI sent" eventfld.long 0x14 18. " [178] ,MSI vector 178" "No MSI,MSI sent" eventfld.long 0x14 17. " [177] ,MSI vector 177" "No MSI,MSI sent" eventfld.long 0x14 16. " [176] ,MSI vector 176" "No MSI,MSI sent" eventfld.long 0x14 15. " [175] ,MSI vector 175" "No MSI,MSI sent" eventfld.long 0x14 14. " [174] ,MSI vector 174" "No MSI,MSI sent" textline " " eventfld.long 0x14 13. " [173] ,MSI vector 173" "No MSI,MSI sent" eventfld.long 0x14 12. " [172] ,MSI vector 172" "No MSI,MSI sent" eventfld.long 0x14 11. " [171] ,MSI vector 171" "No MSI,MSI sent" eventfld.long 0x14 10. " [170] ,MSI vector 170" "No MSI,MSI sent" eventfld.long 0x14 9. " [169] ,MSI vector 169" "No MSI,MSI sent" eventfld.long 0x14 8. " [168] ,MSI vector 168" "No MSI,MSI sent" textline " " eventfld.long 0x14 7. " [167] ,MSI vector 167" "No MSI,MSI sent" eventfld.long 0x14 6. " [166] ,MSI vector 166" "No MSI,MSI sent" eventfld.long 0x14 5. " [165] ,MSI vector 165" "No MSI,MSI sent" eventfld.long 0x14 4. " [164] ,MSI vector 164" "No MSI,MSI sent" eventfld.long 0x14 3. " [163] ,MSI vector 163" "No MSI,MSI sent" eventfld.long 0x14 2. " [162] ,MSI vector 162" "No MSI,MSI sent" textline " " eventfld.long 0x14 1. " [161] ,MSI vector 161" "No MSI,MSI sent" eventfld.long 0x14 0. " [160] ,MSI vector 160" "No MSI,MSI sent" line.long 0x18 "MSI_VEC6_0,SATA MSI Vector Register 6" eventfld.long 0x18 31. " MSI_VECTOR[223] ,MSI vector 223" "No MSI,MSI sent" eventfld.long 0x18 30. " [222] ,MSI vector 222" "No MSI,MSI sent" eventfld.long 0x18 29. " [221] ,MSI vector 221" "No MSI,MSI sent" eventfld.long 0x18 28. " [220] ,MSI vector 220" "No MSI,MSI sent" eventfld.long 0x18 27. " [219] ,MSI vector 219" "No MSI,MSI sent" eventfld.long 0x18 26. " [218] ,MSI vector 218" "No MSI,MSI sent" textline " " eventfld.long 0x18 25. " [217] ,MSI vector 217" "No MSI,MSI sent" eventfld.long 0x18 24. " [216] ,MSI vector 216" "No MSI,MSI sent" eventfld.long 0x18 23. " [215] ,MSI vector 215" "No MSI,MSI sent" eventfld.long 0x18 22. " [214] ,MSI vector 214" "No MSI,MSI sent" eventfld.long 0x18 21. " [213] ,MSI vector 213" "No MSI,MSI sent" eventfld.long 0x18 20. " [212] ,MSI vector 212" "No MSI,MSI sent" textline " " eventfld.long 0x18 19. " [211] ,MSI vector 211" "No MSI,MSI sent" eventfld.long 0x18 18. " [210] ,MSI vector 210" "No MSI,MSI sent" eventfld.long 0x18 17. " [209] ,MSI vector 209" "No MSI,MSI sent" eventfld.long 0x18 16. " [208] ,MSI vector 208" "No MSI,MSI sent" eventfld.long 0x18 15. " [207] ,MSI vector 207" "No MSI,MSI sent" eventfld.long 0x18 14. " [206] ,MSI vector 206" "No MSI,MSI sent" textline " " eventfld.long 0x18 13. " [205] ,MSI vector 205" "No MSI,MSI sent" eventfld.long 0x18 12. " [204] ,MSI vector 204" "No MSI,MSI sent" eventfld.long 0x18 11. " [203] ,MSI vector 203" "No MSI,MSI sent" eventfld.long 0x18 10. " [202] ,MSI vector 202" "No MSI,MSI sent" eventfld.long 0x18 9. " [201] ,MSI vector 201" "No MSI,MSI sent" eventfld.long 0x18 8. " [200] ,MSI vector 200" "No MSI,MSI sent" textline " " eventfld.long 0x18 7. " [199] ,MSI vector 199" "No MSI,MSI sent" eventfld.long 0x18 6. " [198] ,MSI vector 198" "No MSI,MSI sent" eventfld.long 0x18 5. " [197] ,MSI vector 197" "No MSI,MSI sent" eventfld.long 0x18 4. " [196] ,MSI vector 196" "No MSI,MSI sent" eventfld.long 0x18 3. " [195] ,MSI vector 195" "No MSI,MSI sent" eventfld.long 0x18 2. " [194] ,MSI vector 194" "No MSI,MSI sent" textline " " eventfld.long 0x18 1. " [193] ,MSI vector 193" "No MSI,MSI sent" eventfld.long 0x18 0. " [192] ,MSI vector 192" "No MSI,MSI sent" line.long 0x1C "MSI_VEC7_0,SATA MSI Vector Register 7" eventfld.long 0x1C 31. " MSI_VECTOR[255] ,MSI vector 255" "No MSI,MSI sent" eventfld.long 0x1C 30. " [254] ,MSI vector 254" "No MSI,MSI sent" eventfld.long 0x1C 29. " [253] ,MSI vector 253" "No MSI,MSI sent" eventfld.long 0x1C 28. " [252] ,MSI vector 252" "No MSI,MSI sent" eventfld.long 0x1C 27. " [251] ,MSI vector 251" "No MSI,MSI sent" eventfld.long 0x1C 26. " [250] ,MSI vector 250" "No MSI,MSI sent" textline " " eventfld.long 0x1C 25. " [249] ,MSI vector 249" "No MSI,MSI sent" eventfld.long 0x1C 24. " [248] ,MSI vector 248" "No MSI,MSI sent" eventfld.long 0x1C 23. " [247] ,MSI vector 247" "No MSI,MSI sent" eventfld.long 0x1C 22. " [246] ,MSI vector 246" "No MSI,MSI sent" eventfld.long 0x1C 21. " [245] ,MSI vector 245" "No MSI,MSI sent" eventfld.long 0x1C 20. " [244] ,MSI vector 244" "No MSI,MSI sent" textline " " eventfld.long 0x1C 19. " [243] ,MSI vector 243" "No MSI,MSI sent" eventfld.long 0x1C 18. " [242] ,MSI vector 242" "No MSI,MSI sent" eventfld.long 0x1C 17. " [241] ,MSI vector 241" "No MSI,MSI sent" eventfld.long 0x1C 16. " [240] ,MSI vector 240" "No MSI,MSI sent" eventfld.long 0x1C 15. " [239] ,MSI vector 239" "No MSI,MSI sent" eventfld.long 0x1C 14. " [238] ,MSI vector 238" "No MSI,MSI sent" textline " " eventfld.long 0x1C 13. " [237] ,MSI vector 237" "No MSI,MSI sent" eventfld.long 0x1C 12. " [236] ,MSI vector 236" "No MSI,MSI sent" eventfld.long 0x1C 11. " [235] ,MSI vector 235" "No MSI,MSI sent" eventfld.long 0x1C 10. " [234] ,MSI vector 234" "No MSI,MSI sent" eventfld.long 0x1C 9. " [233] ,MSI vector 233" "No MSI,MSI sent" eventfld.long 0x1C 8. " [232] ,MSI vector 232" "No MSI,MSI sent" textline " " eventfld.long 0x1C 7. " [231] ,MSI vector 231" "No MSI,MSI sent" eventfld.long 0x1C 6. " [230] ,MSI vector 230" "No MSI,MSI sent" eventfld.long 0x1C 5. " [229] ,MSI vector 229" "No MSI,MSI sent" eventfld.long 0x1C 4. " [228] ,MSI vector 228" "No MSI,MSI sent" eventfld.long 0x1C 3. " [227] ,MSI vector 227" "No MSI,MSI sent" eventfld.long 0x1C 2. " [226] ,MSI vector 226" "No MSI,MSI sent" textline " " eventfld.long 0x1C 1. " [225] ,MSI vector 225" "No MSI,MSI sent" eventfld.long 0x1C 0. " [224] ,MSI vector 224" "No MSI,MSI sent" textline " " width 15. group.long 0x140++0x1F line.long 0x00 "MSI_EN_VEC0_0,SATA MSI Vector Enable Register 0" bitfld.long 0x00 31. " MSI_ENABLE_VECTOR[31] ,MSI vector enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,MSI vector enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,MSI vector enable 29" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,MSI vector enable 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,MSI vector enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,MSI vector enable 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,MSI vector enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,MSI vector enable 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,MSI vector enable 23" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,MSI vector enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,MSI vector enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,MSI vector enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,MSI vector enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,MSI vector enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,MSI vector enable 17" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,MSI vector enable 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,MSI vector enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,MSI vector enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,MSI vector enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,MSI vector enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,MSI vector enable 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,MSI vector enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,MSI vector enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,MSI vector enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,MSI vector enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,MSI vector enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,MSI vector enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,MSI vector enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,MSI vector enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,MSI vector enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,MSI vector enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,MSI vector enable 0" "Disabled,Enabled" line.long 0x04 "MSI_EN_VEC1_0,SATA MSI Vector Enable Register 1" bitfld.long 0x04 31. " MSI_ENABLE_VECTOR[63] ,MSI vector enable 63" "Disabled,Enabled" bitfld.long 0x04 30. " [62] ,MSI vector enable 62" "Disabled,Enabled" bitfld.long 0x04 29. " [61] ,MSI vector enable 61" "Disabled,Enabled" bitfld.long 0x04 28. " [60] ,MSI vector enable 60" "Disabled,Enabled" bitfld.long 0x04 27. " [59] ,MSI vector enable 59" "Disabled,Enabled" bitfld.long 0x04 26. " [58] ,MSI vector enable 58" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " [57] ,MSI vector enable 57" "Disabled,Enabled" bitfld.long 0x04 24. " [56] ,MSI vector enable 56" "Disabled,Enabled" bitfld.long 0x04 23. " [55] ,MSI vector enable 55" "Disabled,Enabled" bitfld.long 0x04 22. " [54] ,MSI vector enable 54" "Disabled,Enabled" bitfld.long 0x04 21. " [53] ,MSI vector enable 53" "Disabled,Enabled" bitfld.long 0x04 20. " [52] ,MSI vector enable 52" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [51] ,MSI vector enable 51" "Disabled,Enabled" bitfld.long 0x04 18. " [50] ,MSI vector enable 50" "Disabled,Enabled" bitfld.long 0x04 17. " [49] ,MSI vector enable 49" "Disabled,Enabled" bitfld.long 0x04 16. " [48] ,MSI vector enable 48" "Disabled,Enabled" bitfld.long 0x04 15. " [47] ,MSI vector enable 47" "Disabled,Enabled" bitfld.long 0x04 14. " [46] ,MSI vector enable 46" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [45] ,MSI vector enable 45" "Disabled,Enabled" bitfld.long 0x04 12. " [44] ,MSI vector enable 44" "Disabled,Enabled" bitfld.long 0x04 11. " [43] ,MSI vector enable 43" "Disabled,Enabled" bitfld.long 0x04 10. " [42] ,MSI vector enable 42" "Disabled,Enabled" bitfld.long 0x04 9. " [41] ,MSI vector enable 41" "Disabled,Enabled" bitfld.long 0x04 8. " [40] ,MSI vector enable 40" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [39] ,MSI vector enable 39" "Disabled,Enabled" bitfld.long 0x04 6. " [38] ,MSI vector enable 38" "Disabled,Enabled" bitfld.long 0x04 5. " [37] ,MSI vector enable 37" "Disabled,Enabled" bitfld.long 0x04 4. " [36] ,MSI vector enable 36" "Disabled,Enabled" bitfld.long 0x04 3. " [35] ,MSI vector enable 35" "Disabled,Enabled" bitfld.long 0x04 2. " [34] ,MSI vector enable 34" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [33] ,MSI vector enable 33" "Disabled,Enabled" bitfld.long 0x04 0. " [32] ,MSI vector enable 32" "Disabled,Enabled" line.long 0x08 "MSI_EN_VEC2_0,SATA MSI Vector Enable Register 2" bitfld.long 0x08 31. " MSI_ENABLE_VECTOR[95] ,MSI vector enable 95" "Disabled,Enabled" bitfld.long 0x08 30. " [94] ,MSI vector enable 94" "Disabled,Enabled" bitfld.long 0x08 29. " [93] ,MSI vector enable 93" "Disabled,Enabled" bitfld.long 0x08 28. " [92] ,MSI vector enable 92" "Disabled,Enabled" bitfld.long 0x08 27. " [91] ,MSI vector enable 91" "Disabled,Enabled" bitfld.long 0x08 26. " [90] ,MSI vector enable 90" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " [89] ,MSI vector enable 89" "Disabled,Enabled" bitfld.long 0x08 24. " [88] ,MSI vector enable 88" "Disabled,Enabled" bitfld.long 0x08 23. " [87] ,MSI vector enable 87" "Disabled,Enabled" bitfld.long 0x08 22. " [86] ,MSI vector enable 86" "Disabled,Enabled" bitfld.long 0x08 21. " [85] ,MSI vector enable 85" "Disabled,Enabled" bitfld.long 0x08 20. " [84] ,MSI vector enable 84" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " [83] ,MSI vector enable 83" "Disabled,Enabled" bitfld.long 0x08 18. " [82] ,MSI vector enable 82" "Disabled,Enabled" bitfld.long 0x08 17. " [81] ,MSI vector enable 81" "Disabled,Enabled" bitfld.long 0x08 16. " [80] ,MSI vector enable 80" "Disabled,Enabled" bitfld.long 0x08 15. " [79] ,MSI vector enable 79" "Disabled,Enabled" bitfld.long 0x08 14. " [78] ,MSI vector enable 78" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " [77] ,MSI vector enable 77" "Disabled,Enabled" bitfld.long 0x08 12. " [76] ,MSI vector enable 76" "Disabled,Enabled" bitfld.long 0x08 11. " [75] ,MSI vector enable 75" "Disabled,Enabled" bitfld.long 0x08 10. " [74] ,MSI vector enable 74" "Disabled,Enabled" bitfld.long 0x08 9. " [73] ,MSI vector enable 73" "Disabled,Enabled" bitfld.long 0x08 8. " [72] ,MSI vector enable 72" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " [71] ,MSI vector enable 71" "Disabled,Enabled" bitfld.long 0x08 6. " [70] ,MSI vector enable 70" "Disabled,Enabled" bitfld.long 0x08 5. " [69] ,MSI vector enable 69" "Disabled,Enabled" bitfld.long 0x08 4. " [68] ,MSI vector enable 68" "Disabled,Enabled" bitfld.long 0x08 3. " [67] ,MSI vector enable 67" "Disabled,Enabled" bitfld.long 0x08 2. " [66] ,MSI vector enable 66" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " [65] ,MSI vector enable 65" "Disabled,Enabled" bitfld.long 0x08 0. " [64] ,MSI vector enable 64" "Disabled,Enabled" line.long 0x0C "MSI_EN_VEC3_0,SATA MSI Vector Enable Register 3" bitfld.long 0x0C 31. " MSI_ENABLE_VECTOR[127] ,MSI vector enable 127" "Disabled,Enabled" bitfld.long 0x0C 30. " [126] ,MSI vector enable 126" "Disabled,Enabled" bitfld.long 0x0C 29. " [125] ,MSI vector enable 125" "Disabled,Enabled" bitfld.long 0x0C 28. " [124] ,MSI vector enable 124" "Disabled,Enabled" bitfld.long 0x0C 27. " [123] ,MSI vector enable 123" "Disabled,Enabled" bitfld.long 0x0C 26. " [122] ,MSI vector enable 122" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " [121] ,MSI vector enable 121" "Disabled,Enabled" bitfld.long 0x0C 24. " [120] ,MSI vector enable 120" "Disabled,Enabled" bitfld.long 0x0C 23. " [119] ,MSI vector enable 119" "Disabled,Enabled" bitfld.long 0x0C 22. " [118] ,MSI vector enable 118" "Disabled,Enabled" bitfld.long 0x0C 21. " [117] ,MSI vector enable 117" "Disabled,Enabled" bitfld.long 0x0C 20. " [116] ,MSI vector enable 116" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " [115] ,MSI vector enable 115" "Disabled,Enabled" bitfld.long 0x0C 18. " [114] ,MSI vector enable 114" "Disabled,Enabled" bitfld.long 0x0C 17. " [113] ,MSI vector enable 113" "Disabled,Enabled" bitfld.long 0x0C 16. " [112] ,MSI vector enable 112" "Disabled,Enabled" bitfld.long 0x0C 15. " [111] ,MSI vector enable 111" "Disabled,Enabled" bitfld.long 0x0C 14. " [110] ,MSI vector enable 110" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " [109] ,MSI vector enable 109" "Disabled,Enabled" bitfld.long 0x0C 12. " [108] ,MSI vector enable 108" "Disabled,Enabled" bitfld.long 0x0C 11. " [107] ,MSI vector enable 107" "Disabled,Enabled" bitfld.long 0x0C 10. " [106] ,MSI vector enable 106" "Disabled,Enabled" bitfld.long 0x0C 9. " [105] ,MSI vector enable 105" "Disabled,Enabled" bitfld.long 0x0C 8. " [104] ,MSI vector enable 104" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " [103] ,MSI vector enable 103" "Disabled,Enabled" bitfld.long 0x0C 6. " [102] ,MSI vector enable 102" "Disabled,Enabled" bitfld.long 0x0C 5. " [101] ,MSI vector enable 101" "Disabled,Enabled" bitfld.long 0x0C 4. " [100] ,MSI vector enable 100" "Disabled,Enabled" bitfld.long 0x0C 3. " [99] ,MSI vector enable 99" "Disabled,Enabled" bitfld.long 0x0C 2. " [98] ,MSI vector enable 98" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " [97] ,MSI vector enable 97" "Disabled,Enabled" bitfld.long 0x0C 0. " [96] ,MSI vector enable 96" "Disabled,Enabled" line.long 0x10 "MSI_EN_VEC4_0,SATA MSI Vector Enable Register 4" bitfld.long 0x10 31. " MSI_ENABLE_VECTOR[159] ,MSI vector enable 159" "Disabled,Enabled" bitfld.long 0x10 30. " [158] ,MSI vector enable 158" "Disabled,Enabled" bitfld.long 0x10 29. " [157] ,MSI vector enable 157" "Disabled,Enabled" bitfld.long 0x10 28. " [156] ,MSI vector enable 156" "Disabled,Enabled" bitfld.long 0x10 27. " [155] ,MSI vector enable 155" "Disabled,Enabled" bitfld.long 0x10 26. " [154] ,MSI vector enable 154" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " [153] ,MSI vector enable 153" "Disabled,Enabled" bitfld.long 0x10 24. " [152] ,MSI vector enable 152" "Disabled,Enabled" bitfld.long 0x10 23. " [151] ,MSI vector enable 151" "Disabled,Enabled" bitfld.long 0x10 22. " [150] ,MSI vector enable 150" "Disabled,Enabled" bitfld.long 0x10 21. " [149] ,MSI vector enable 149" "Disabled,Enabled" bitfld.long 0x10 20. " [148] ,MSI vector enable 148" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " [147] ,MSI vector enable 147" "Disabled,Enabled" bitfld.long 0x10 18. " [146] ,MSI vector enable 146" "Disabled,Enabled" bitfld.long 0x10 17. " [145] ,MSI vector enable 145" "Disabled,Enabled" bitfld.long 0x10 16. " [144] ,MSI vector enable 144" "Disabled,Enabled" bitfld.long 0x10 15. " [143] ,MSI vector enable 143" "Disabled,Enabled" bitfld.long 0x10 14. " [142] ,MSI vector enable 142" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " [141] ,MSI vector enable 141" "Disabled,Enabled" bitfld.long 0x10 12. " [140] ,MSI vector enable 140" "Disabled,Enabled" bitfld.long 0x10 11. " [139] ,MSI vector enable 139" "Disabled,Enabled" bitfld.long 0x10 10. " [138] ,MSI vector enable 138" "Disabled,Enabled" bitfld.long 0x10 9. " [137] ,MSI vector enable 137" "Disabled,Enabled" bitfld.long 0x10 8. " [136] ,MSI vector enable 136" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " [135] ,MSI vector enable 135" "Disabled,Enabled" bitfld.long 0x10 6. " [134] ,MSI vector enable 134" "Disabled,Enabled" bitfld.long 0x10 5. " [133] ,MSI vector enable 133" "Disabled,Enabled" bitfld.long 0x10 4. " [132] ,MSI vector enable 132" "Disabled,Enabled" bitfld.long 0x10 3. " [131] ,MSI vector enable 131" "Disabled,Enabled" bitfld.long 0x10 2. " [130] ,MSI vector enable 130" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " [129] ,MSI vector enable 129" "Disabled,Enabled" bitfld.long 0x10 0. " [128] ,MSI vector enable 128" "Disabled,Enabled" line.long 0x14 "MSI_EN_VEC5_0,SATA MSI Vector Enable Register 5" bitfld.long 0x14 31. " MSI_ENABLE_VECTOR[191] ,MSI vector enable 191" "Disabled,Enabled" bitfld.long 0x14 30. " [190] ,MSI vector enable 190" "Disabled,Enabled" bitfld.long 0x14 29. " [189] ,MSI vector enable 189" "Disabled,Enabled" bitfld.long 0x14 28. " [188] ,MSI vector enable 188" "Disabled,Enabled" bitfld.long 0x14 27. " [187] ,MSI vector enable 187" "Disabled,Enabled" bitfld.long 0x14 26. " [186] ,MSI vector enable 186" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " [185] ,MSI vector enable 185" "Disabled,Enabled" bitfld.long 0x14 24. " [184] ,MSI vector enable 184" "Disabled,Enabled" bitfld.long 0x14 23. " [183] ,MSI vector enable 183" "Disabled,Enabled" bitfld.long 0x14 22. " [182] ,MSI vector enable 182" "Disabled,Enabled" bitfld.long 0x14 21. " [181] ,MSI vector enable 181" "Disabled,Enabled" bitfld.long 0x14 20. " [180] ,MSI vector enable 180" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " [179] ,MSI vector enable 179" "Disabled,Enabled" bitfld.long 0x14 18. " [178] ,MSI vector enable 178" "Disabled,Enabled" bitfld.long 0x14 17. " [177] ,MSI vector enable 177" "Disabled,Enabled" bitfld.long 0x14 16. " [176] ,MSI vector enable 176" "Disabled,Enabled" bitfld.long 0x14 15. " [175] ,MSI vector enable 175" "Disabled,Enabled" bitfld.long 0x14 14. " [174] ,MSI vector enable 174" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " [173] ,MSI vector enable 173" "Disabled,Enabled" bitfld.long 0x14 12. " [172] ,MSI vector enable 172" "Disabled,Enabled" bitfld.long 0x14 11. " [171] ,MSI vector enable 171" "Disabled,Enabled" bitfld.long 0x14 10. " [170] ,MSI vector enable 170" "Disabled,Enabled" bitfld.long 0x14 9. " [169] ,MSI vector enable 169" "Disabled,Enabled" bitfld.long 0x14 8. " [168] ,MSI vector enable 168" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " [167] ,MSI vector enable 167" "Disabled,Enabled" bitfld.long 0x14 6. " [166] ,MSI vector enable 166" "Disabled,Enabled" bitfld.long 0x14 5. " [165] ,MSI vector enable 165" "Disabled,Enabled" bitfld.long 0x14 4. " [164] ,MSI vector enable 164" "Disabled,Enabled" bitfld.long 0x14 3. " [163] ,MSI vector enable 163" "Disabled,Enabled" bitfld.long 0x14 2. " [162] ,MSI vector enable 162" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " [161] ,MSI vector enable 161" "Disabled,Enabled" bitfld.long 0x14 0. " [160] ,MSI vector enable 160" "Disabled,Enabled" line.long 0x18 "MSI_EN_VEC6_0,SATA MSI Vector Enable Register 6" bitfld.long 0x18 31. " MSI_ENABLE_VECTOR[223] ,MSI vector enable 223" "Disabled,Enabled" bitfld.long 0x18 30. " [222] ,MSI vector enable 222" "Disabled,Enabled" bitfld.long 0x18 29. " [221] ,MSI vector enable 221" "Disabled,Enabled" bitfld.long 0x18 28. " [220] ,MSI vector enable 220" "Disabled,Enabled" bitfld.long 0x18 27. " [219] ,MSI vector enable 219" "Disabled,Enabled" bitfld.long 0x18 26. " [218] ,MSI vector enable 218" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " [217] ,MSI vector enable 217" "Disabled,Enabled" bitfld.long 0x18 24. " [216] ,MSI vector enable 216" "Disabled,Enabled" bitfld.long 0x18 23. " [215] ,MSI vector enable 215" "Disabled,Enabled" bitfld.long 0x18 22. " [214] ,MSI vector enable 214" "Disabled,Enabled" bitfld.long 0x18 21. " [213] ,MSI vector enable 213" "Disabled,Enabled" bitfld.long 0x18 20. " [212] ,MSI vector enable 212" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " [211] ,MSI vector enable 211" "Disabled,Enabled" bitfld.long 0x18 18. " [210] ,MSI vector enable 210" "Disabled,Enabled" bitfld.long 0x18 17. " [209] ,MSI vector enable 209" "Disabled,Enabled" bitfld.long 0x18 16. " [208] ,MSI vector enable 208" "Disabled,Enabled" bitfld.long 0x18 15. " [207] ,MSI vector enable 207" "Disabled,Enabled" bitfld.long 0x18 14. " [206] ,MSI vector enable 206" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " [205] ,MSI vector enable 205" "Disabled,Enabled" bitfld.long 0x18 12. " [204] ,MSI vector enable 204" "Disabled,Enabled" bitfld.long 0x18 11. " [203] ,MSI vector enable 203" "Disabled,Enabled" bitfld.long 0x18 10. " [202] ,MSI vector enable 202" "Disabled,Enabled" bitfld.long 0x18 9. " [201] ,MSI vector enable 201" "Disabled,Enabled" bitfld.long 0x18 8. " [200] ,MSI vector enable 200" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " [199] ,MSI vector enable 199" "Disabled,Enabled" bitfld.long 0x18 6. " [198] ,MSI vector enable 198" "Disabled,Enabled" bitfld.long 0x18 5. " [197] ,MSI vector enable 197" "Disabled,Enabled" bitfld.long 0x18 4. " [196] ,MSI vector enable 196" "Disabled,Enabled" bitfld.long 0x18 3. " [195] ,MSI vector enable 195" "Disabled,Enabled" bitfld.long 0x18 2. " [194] ,MSI vector enable 194" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " [193] ,MSI vector enable 193" "Disabled,Enabled" bitfld.long 0x18 0. " [192] ,MSI vector enable 192" "Disabled,Enabled" line.long 0x1C "MSI_EN_VEC7_0,SATA MSI Vector Enable Register 7" bitfld.long 0x1C 31. " MSI_ENABLE_VECTOR[255] ,MSI vector enable 255" "Disabled,Enabled" bitfld.long 0x1C 30. " [254] ,MSI vector enable 254" "Disabled,Enabled" bitfld.long 0x1C 29. " [253] ,MSI vector enable 253" "Disabled,Enabled" bitfld.long 0x1C 28. " [252] ,MSI vector enable 252" "Disabled,Enabled" bitfld.long 0x1C 27. " [251] ,MSI vector enable 251" "Disabled,Enabled" bitfld.long 0x1C 26. " [250] ,MSI vector enable 250" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " [249] ,MSI vector enable 249" "Disabled,Enabled" bitfld.long 0x1C 24. " [248] ,MSI vector enable 248" "Disabled,Enabled" bitfld.long 0x1C 23. " [247] ,MSI vector enable 247" "Disabled,Enabled" bitfld.long 0x1C 22. " [246] ,MSI vector enable 246" "Disabled,Enabled" bitfld.long 0x1C 21. " [245] ,MSI vector enable 245" "Disabled,Enabled" bitfld.long 0x1C 20. " [244] ,MSI vector enable 244" "Disabled,Enabled" textline " " bitfld.long 0x1C 19. " [243] ,MSI vector enable 243" "Disabled,Enabled" bitfld.long 0x1C 18. " [242] ,MSI vector enable 242" "Disabled,Enabled" bitfld.long 0x1C 17. " [241] ,MSI vector enable 241" "Disabled,Enabled" bitfld.long 0x1C 16. " [240] ,MSI vector enable 240" "Disabled,Enabled" bitfld.long 0x1C 15. " [239] ,MSI vector enable 239" "Disabled,Enabled" bitfld.long 0x1C 14. " [238] ,MSI vector enable 238" "Disabled,Enabled" textline " " bitfld.long 0x1C 13. " [237] ,MSI vector enable 237" "Disabled,Enabled" bitfld.long 0x1C 12. " [236] ,MSI vector enable 236" "Disabled,Enabled" bitfld.long 0x1C 11. " [235] ,MSI vector enable 235" "Disabled,Enabled" bitfld.long 0x1C 10. " [234] ,MSI vector enable 234" "Disabled,Enabled" bitfld.long 0x1C 9. " [233] ,MSI vector enable 233" "Disabled,Enabled" bitfld.long 0x1C 8. " [232] ,MSI vector enable 232" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " [231] ,MSI vector enable 231" "Disabled,Enabled" bitfld.long 0x1C 6. " [230] ,MSI vector enable 230" "Disabled,Enabled" bitfld.long 0x1C 5. " [229] ,MSI vector enable 229" "Disabled,Enabled" bitfld.long 0x1C 4. " [228] ,MSI vector enable 228" "Disabled,Enabled" bitfld.long 0x1C 3. " [227] ,MSI vector enable 227" "Disabled,Enabled" bitfld.long 0x1C 2. " [226] ,MSI vector enable 226" "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " [225] ,MSI vector enable 225" "Disabled,Enabled" bitfld.long 0x1C 0. " [224] ,MSI vector enable 224" "Disabled,Enabled" width 0x0B tree.end width 20. tree "Configuration registers" group.long 0x180++0x1F line.long 0x00 "CONFIGURATION_0,Configuration" bitfld.long 0x00 31. " CLKEN_OVERRIDE ,Override the clock enable in case of a malfunction" "Disabled,Enabled" sif cpuis("TEGRAX1") else bitfld.long 0x00 19. " PW_NO_DEVSEL_ERR_CYA ,Disable detection of DECERR due to no DEVSEL" "No,Yes" endif textline " " rbitfld.long 0x00 18. " INITIATOR_READ_IDLE ,AFI upstream read status" "Busy,Idle" rbitfld.long 0x00 17. " INITIATOR_WRITE_IDLE ,AFI upstream write status" "Busy,Idle" textline " " bitfld.long 0x00 15. " WDATA_LEAD_CYA ,Enable the handling of write data ahead of requests on IPFS AXI" "Disabled,Enabled" bitfld.long 0x00 14. " WR_INTRLV_CYA ,Disable the handling of interleaved write requests on IPFS AXI" "Disabled,Enabled" textline " " rbitfld.long 0x00 11. " TARGET_READ_IDLE ,IPFS target read status" "Busy,Idle" rbitfld.long 0x00 10. " TARGET_WRITE_IDLE ,IPFS target write status" "Busy,Idle" textline " " rbitfld.long 0x00 9. " MSI_VEC_EMPTY ,MSI Vector registers status" "No empty,Empty" bitfld.long 0x00 7. " UFPCI_MSIAW ,MSI After Write ordering rule" "Default behavior (MSIAW ordering),Interrupt whenever MSI is ready" textline " " bitfld.long 0x00 6. " UFPCI_PWPASSPW ,Send input to the upstream FPCI" "Whenever write is ready,Only when PW has retired" bitfld.long 0x00 5. " UFPCI_PASSPW ,Allows the upstream FPCI reads to pass writes" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " UFPCI_PWPASSNPW ,Allows the upstream FPCI PWs to pass NPW" "Not allowed,Allowed" bitfld.long 0x00 3. " DFPCI_PWPASSNPW ,Allows the downstream FPCI PWs to pass NPW" "Not allowed,Allowed" textline " " bitfld.long 0x00 2. " DFPCI_RSPPASSPW ,Allows the downstream FPCI responses to pass writes" "Not allowed,Allowed" bitfld.long 0x00 1. " DFPCI_PASSPW ,Allow the downstream FPCI reads to pass writes" "Not allowed,Allowed" textline " " bitfld.long 0x00 0. " EN_FPCI ,Enable FPCI" "Disabled,Enabled" line.long 0x04 "FPCI_ERROR_MASKS_0,SATAFPCI Error Masks" bitfld.long 0x04 2. " MASK_FPCI_MASTER_ABORT ,Allows an FPCI error response indicates a Master Abort" "Return AXI OK,Forward error" bitfld.long 0x04 1. " MASK_FPCI_DATA_ERROR ,Allows an FPCI error response indicates a Data Error" "Return AXI OK,Forward error" bitfld.long 0x04 0. " MASK_FPCI_TARGET_ABORT ,Allows an FPCI error response indicates a Target Abort" "Return AXI OK,Forward error" line.long 0x08 "INTR_MASK_0,Interrupt Masks" bitfld.long 0x08 16. " IP_INT_MASK ,IP interrupt to the CPU complex gated by the mask" "0,1" bitfld.long 0x08 8. " MSI_MASK ,MSI to the CPU complex gated by the mask" "0,1" bitfld.long 0x08 0. " INT_MASK ,Interrupt to the CPU complex gated by the mask" "0,1" line.long 0x0C "INTR_CODE_0,Interrupt Control" bitfld.long 0x0C 0.--4. " INT_CODE ,Eight interrupt codes" "CLEAR,INI_SLVERR,INI_DECERR,TGT_SLVERR,TGT_DECERR,TGT_WRERR,,DFPCI_DECERR,AXI_DECERR,TIMEOUT,,,,,,SM_FATAL_ERROR,SM_NON_FATAL_ERROR,?..." line.long 0x10 "INTR_SIGNATURE_0,Interrupt Signature" hexmask.long 0x10 2.--31. 0x4 " INT_INFO ,Interrupt info (Address bits for interrupt codes)" bitfld.long 0x10 0. " DIR ,Direction of the AXI/FPCI transaction" "Write,Read" line.long 0x14 "UPPER_FPCI_ADDR_0,Upper FPCI Address" hexmask.long.byte 0x14 0.--7. 0x01 " INT_INFO_UPPER ,Upper byte of the captured FPCI address (for interrupt code: 3, 4 or 7)" line.long 0x18 "IPFS_INTR_ENABLE_0,IPFS Interrupt Enable" bitfld.long 0x18 13. " EN_SM_NON_FATAL_ERROR ,Enable bit for interrupt code 15" "Disabled,Enabled" bitfld.long 0x18 12. " EN_SM_FATAL_ERROR ,Enable bit for interrupt code 14" "Disabled,Enabled" bitfld.long 0x18 7. " EN_FPCI_TIMEOUT ,Enable bit for interrupt code 9" "Disabled,Enabled" textline " " bitfld.long 0x18 6. " EN_AXI_DECERR ,Enable bit for interrupt code 8" "Disabled,Enabled" bitfld.long 0x18 5. " EN_DFPCI_DECERR ,Enable bit for interrupt code 7" "Disabled,Enabled" bitfld.long 0x18 4. " EN_TGT_WRERR ,Enable bit for interrupt code 5" "Disabled,Enabled" textline " " bitfld.long 0x18 3. " EN_TGT_DECERR ,Enable bit for interrupt code 4" "Disabled,Enabled" bitfld.long 0x18 2. " EN_TGT_SLVERR ,Enable bit for interrupt code 3" "Disabled,Enabled" bitfld.long 0x18 1. " EN_INI_DECERR ,Enable bit for interrupt code 2" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " EN_INI_SLVERR ,Enable bit for interrupt code 1" "Disabled,Enabled" line.long 0x1C "UFPCI_CONFIG_0,Upstream FPCI Configuration" bitfld.long 0x1C 0.--4. " UNITID_T0C0 ,Upstream FPCI Unit ID for controller 0. HyperTransport (Upstream FPCI request)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x1A0++0x0B line.long 0x00 "CFG_REVID_0,CFG_REVID Register" rbitfld.long 0x00 19. " DEV2SM_NONISO_REQUEST_PEND ,There is a non-ISO request pending" "Not pending,Pending" rbitfld.long 0x00 18. " DEV2SM_ISO_REQUEST_PEND ,There is an ISO request pending" "Not pending,Pending" bitfld.long 0x00 12.--13. " STRAP_CPU_MODE ,MCP: Mode to send MSI" "NB_INTEL,NB_AMD,AMD,TMTA" textline " " bitfld.long 0x00 11. " CFG_REVID_WRITE_ENABLE ,Enable to override the rev ID" "Clear,Set" bitfld.long 0x00 10. " CFG_REVID_OVERRIDE ,Provides a way to override the current revision ID" "Disabled,Enabled" rbitfld.long 0x00 4. " DEV2LEG_NONCOH_REQUEST_PEND ,Tells the leg block that a non-coherent request is pending" "Not pending,Pending" textline " " rbitfld.long 0x00 3. " DEV2LEG_COH_REQUEST_PEND ,Tells the leg block that a coherent request is pending" "Not pending,Pending" bitfld.long 0x00 2. " SM2DEV_FPCI_TIMEOUT_EN ,FPCI timeout enable bit for Controller" "Disabled,Enabled" line.long 0x04 "FPCI_TIMEOUT_0,FPCI_TIMEOUT Register" hexmask.long.tbyte 0x04 0.--19. 1. " SM2ALL_FPCI_TIMEOUT_THRESH ,Timeout threshold value for the FPCI bus" line.long 0x08 "TOM_0,Top Of Memory Limit" hexmask.long.word 0x08 16.--29. 1. " LEG2ALL_TOM2 ,Top of Memory Limit 2" hexmask.long.word 0x08 0.--11. 1. " LEG2ALL_TOM1 ,Top of Memory Limit 1" textline " " width 33. rgroup.long 0x1AC++0x0B line.long 0x00 "INITIATOR_ISO_PW_RESP_PENDING_0,Initiator ISO PW Response Pending" hexmask.long.byte 0x00 0.--7. 1. " NUM_INITIATOR_ISO_PW_RESP_PEND ,Number of pending initiator ISO PW responses" line.long 0x04 "INITIATOR_NISO_PW_RESP_PENDING_0,Initiator Non-ISO PW Response Pending" hexmask.long.byte 0x04 0.--7. 1. " NUM_INITIATOR_NISO_PW_RESP_PEND ,Number of pending initiator NISO PW responses" line.long 0x08 "INTR_STATUS_0,IPFS Interrupt Status" bitfld.long 0x08 2. " IP_INTR_STATUS ,Status of IP interrupt" "No interrupt,Interrupt" bitfld.long 0x08 1. " MSI_INTR_STATUS ,Status of MSI interrupt" "No interrupt,Interrupt" bitfld.long 0x08 0. " IPFS_INTR_STATUS ,Status of IPFS interrupt" "No interrupt,Interrupt" textline " " width 22. group.long 0x1B8++0x07 line.long 0x00 "DFPCI_BEN_0,Downstream FPCI Byte Enables" bitfld.long 0x00 31. " EN_DFPCI_BEN ,Enable bit for BEN" "Disabled,Enabled" bitfld.long 0x00 0.--3. " DFPCI_BYTE_ENABLE_N ,Active low byte enables" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CLKGATE_HYSTERESIS_0,CLKGATE HYSTERESIS 0" hexmask.long.byte 0x04 0.--7. 1. " CLK_DISABLE_CNT ,Number of IPFS clock cycles to wait after clock gating criteria is met to disable IPFS/FPCI clocks" sif !cpuis("TEGRAX2") group.long 0x1DC++0x03 line.long 0x00 "MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control Register" bitfld.long 0x00 20. " RCLK_OVR_MODE ,RCLK OVR MODE" "Legacy,On" bitfld.long 0x00 19. " WCLK_OVR_MODE ,RCLK OVR MODE" "Legacy,On" bitfld.long 0x00 18. " CCLK_OVERRIDE ,CCLK OVERRIDE" "No override,Override" textline " " bitfld.long 0x00 17. " RCLK_OVERRIDE ,RCLK OVERRIDE" "No override,Override" bitfld.long 0x00 16. " WCLK_OVERRIDE ,WCLK OVERRIDE" "No override,Override" bitfld.long 0x00 3. " MCCIF_RDCL_RDFAST ,MCCIF RDCL RDFAST" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MCCIF_WRMC_CLLE2X ,MCCIF WRMC CLLE2X" "Disabled,Enabled" bitfld.long 0x00 1. " MCCIF_RDMC_RDFAST ,MCCIF RDMC RDFAST" "Disabled,Enabled" bitfld.long 0x00 0. " MCCIF_WRCL_MCLE2X ,MCCIF WRCL MCLE2X" "Disabled,Enabled" endif textline " " width 18. group.long 0x1E0++0x0B line.long 0x00 "ORDERING_RULES_0,ORDERING RULES" sif cpuis("TEGRAX1") bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Tegra X1,Tegra 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Tegra X1,Tegra 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Tegra X1,Tegra 3" elif cpuis("TEGRAX2") bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Parker,Parker 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Parker,Parker 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Parker,Parker 3" else bitfld.long 0x00 3. " UPSTREAM_MSIAW ,Modified Upstream MSIAW ordering" "Tegra K1,Tegra 3" bitfld.long 0x00 2. " UPSTREAM_RESPAW ,Modified RespAW ordering." "Tegra K1,Tegra 3" bitfld.long 0x00 1. " UPSTREAM_RAW ,Modified RAW ordering" "Tegra K1,Tegra 3" endif line.long 0x04 "A2F_UFPCI_CFG0_0,A2F UFPCI CFG0" hexmask.long.byte 0x04 24.--31. 1. " STATIC_WAIT_IDLE_CNTR ,Static wait idle control" bitfld.long 0x04 16.--18. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI1 ,Static UFPCI UFA starve Control PRI1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--15. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI0 ,Static UFPCI UFA starve control PRI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 10.--11. " STATIC_UFPCI_RR_BURST_SZ_PRI1 ,Static UFPCI RR burst SZ PRI1" "0,1,2,3" bitfld.long 0x04 8.--9. " STATIC_UFPCI_RR_BURST_SZ_PRI0 ,Static UFPCI RR burst SZ PRI0" "0,1,2,3" bitfld.long 0x04 7. " STATIC_WAIT_CLAMP_EN ,Static wait clamp enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " STATIC_UFPCI_UFA_DYN_BLOCK_EN ,Static UFPCI UFA DYN block enable" "Disabled,Enabled" bitfld.long 0x04 5. " STATIC_UFPCI_UFA_BLK_COHERENT ,Static UFPCI UFA BLK coherent" "No coherent,Coherent" bitfld.long 0x04 2.--4. " STATIC_UFPCI_BLOCK_CMD_THRESHOLD ,Static UFPCI block CMD threshold" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 1. " STATIC_CYA_UFA_ARB ,Static CYA UFA ARB" "0,1" bitfld.long 0x04 0. " STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK ,Static CYA back to back upstream block" "0,1" line.long 0x08 "A2F_UFPCI_CFG1_0,A2F UFPCI CFG1" hexmask.long.byte 0x08 0.--7. 1. " STATIC_WAIT_UNCLAMP_CNTR ,Static wait unclamp control" tree.end width 0x0B tree.end ; ; tree "AHCI registers" ; base ; %include ; tree.end tree "SATA Configuration space" base ad:0x70021000 width 8. tree "PCI Configuration Registers" rgroup.long 0x00++0x03 line.long 0x00 "CFG_0,PCI Vendor and Device ID Register" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID_UNIT ,Identify the particular device" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,Identify the manufacturer of the device" group.long 0x04++0x03 line.long 0x00 "CFG_1,PCI Device Control Register" rbitfld.long 0x00 31. " DETECTED_PERR ,Indicates that the device has detected a parity error" "Not active,Active" eventfld.long 0x00 30. " SIGNALED_SERR ,Indicates that the device has asserted SERR" "Not active,Active" eventfld.long 0x00 29. " RECEIVED_MASTER ,Indicates that a master device's transaction (except for Special Cycle) was terminated with a master-abort" "Not aborted,Aborted" textline " " eventfld.long 0x00 28. " RECEIVED_TARGET ,Indicates that a master device's transaction was terminated with a target-abort" "Not aborted,Aborted" rbitfld.long 0x00 27. " SIGNALED_TARGET ,Indicates that the device has terminated a transaction with target-abort" "Not aborted,Aborted" rbitfld.long 0x00 25.--26. " DEVSEL_TIMING ,The timing of DEVSEL" "Fast,Medium,Slow,?..." textline " " rbitfld.long 0x00 24. " CFG_1_MASTER_DATA_PERR ,MASTER_DATA_PERR" "Not active,?..." rbitfld.long 0x00 23. " FAST_BACK2BACK ,Back-to-back transfers handling capability" "Not supported,Supported" rbitfld.long 0x00 21. " 66MHZ ,66 MHz PCI Bus operation capability" "Not supported,Supported" textline " " rbitfld.long 0x00 20. " CAPLIST ,Capabilities list presence" "Not present,Present" rbitfld.long 0x00 19. " INTR_STATUS ,State of the interrupt in the device/function" "0,1" bitfld.long 0x00 10. " INTR_DISABLE ,Disables the assertion of INTx# signal" "No,Yes" textline " " rbitfld.long 0x00 9. " BACK2BACK ,BACK2BACK Enable" "Disabled,Enabled" bitfld.long 0x00 8. " SERR ,SERR Enable" "Disabled,Enabled" rbitfld.long 0x00 7. " STEP ,STEP Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 6. " PERR ,PERR Enable" "Disabled,Enabled" rbitfld.long 0x00 5. " PALETTE_SNOOP ,Special palette snooping behaviour enable" "Disabled,Enabled" rbitfld.long 0x00 4. " WRITE_AND_INVAL ,Memory Write and Invalidate command usage enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 3. " SPECIAL_CYCLE ,SPECIAL_CYCLE Enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUS_MASTER ,Bus master behaviour Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MEMORY_SPACE ,Memory space addresses Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " IO_SPACE ,IO Space addresses Enable" "Disabled,Enabled" rgroup.long 0x08++0x07 line.long 0x00 "CFG_2,PCI Revision ID and Class Code Register" hexmask.long.word 0x00 16.--31. 1. " CLASS_CODE ,Identifies generic function of the device" bitfld.long 0x00 15. " BUS_MASTER ,Bus mastering capability" ",Yes" textline " " hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,Device specific revision identifier" line.long 0x04 "CFG_3,PCI Configuration Register" bitfld.long 0x04 23. " HEADER_TYPE_FUNC ,CFG_3_HEADER_TYPE_FUNC" "Single,Multi" hexmask.long.byte 0x04 16.--22. 1. " HEADER_TYPE_DEVICE ,Layout of the bytes [3F:10] in configuration space and single/multiple function capability identification" bitfld.long 0x04 11.--15. " LATENCY_TIMER ,Latency Timer value" "0_CLOCKS,8_CLOCKS,16_CLOCKS,24_CLOCKS,32_CLOCKS,40_CLOCKS,48_CLOCKS,56_CLOCKS,64_CLOCKS,72_CLOCKS,80_CLOCKS,88_CLOCKS,96_CLOCKS,104_CLOCKS,112_CLOCKS,120_CLOCKS,128_CLOCKS,136_CLOCKS,144_CLOCKS,152_CLOCKS,160_CLOCKS,168_CLOCKS,176_CLOCKS,184_CLOCKS,192_CLOCKS,200_CLOCKS,208_CLOCKS,216_CLOCKS,224_CLOCKS,232_CLOCKS,240_CLOCKS,248_CLOCKS" textline " " hexmask.long.byte 0x04 0.--7. 1. " CACHE_LINE_SIZE ,CFG_3_CACHE_LINE_SIZE" group.long 0x10++0x17 line.long 0x00 "CFG_4,PCI Configuration Register" hexmask.long 0x00 3.--31. 0x08 " BASE_ADDRESS ,Base Address" line.long 0x04 "CFG_5,PCI Configuration Register" hexmask.long 0x04 3.--31. 0x08 " BASE_ADDRESS ,Base Address" line.long 0x08 "CFG_6,PCI Configuration Register" hexmask.long 0x08 3.--31. 0x08 " BASE_ADDRESS ,Base Address" line.long 0x0C "CFG_7,PCI Configuration Register" hexmask.long 0x0C 2.--31. 0x04 " BASE_ADDRESS ,Base Address" line.long 0x10 "CFG_8,PCI Configuration Register" hexmask.long 0x10 4.--31. 0x10 " BASE_ADDRESS ,Base Address" rbitfld.long 0x10 0. " SPACE_TYPE ,Space Type" "Memory,IO" line.long 0x14 "CFG_9,PCI Memory BAR for AHCI Register" hexmask.long.tbyte 0x14 13.--31. 0x20 " BASE_ADDRESS ,Base Address" rbitfld.long 0x14 0. " SPACE_TYPE ,Space Type" "Memory,IO" rgroup.long 0x2C++0x03 line.long 0x00 "CFG_11,PCI Subsystem Vendor ID and Subsystem ID Register" hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID ,SUBSYSTEM ID" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,VENDOR ID" rgroup.long 0x34++0x03 line.long 0x00 "CFG_13,PCI Capability Pointer Register" hexmask.long.byte 0x00 0.--7. 1. " CAP_PTR ,Offset into configuration space where the capabilities list begins" group.long 0x3C++0x03 line.long 0x00 "CFG_15,PCI Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT ,Maximum time required to gain access to the PCI" hexmask.long.byte 0x00 16.--23. 1. " MIN_GNT ,Burst period assuming 33MHz CLK rate" textline " " hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Interrupt routing information" tree.end tree "Device Specific Configuration Registers" width 15. group.long 0x40++0x03 line.long 0x00 "CFG_16,Write Subsystem Vendor ID and Subsystem ID Register" hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID ,SUBSYSTEM ID" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,VENDOR ID" group.long 0x54++0x03 line.long 0x00 "FPCI_SW,FPCI_SW" bitfld.long 0x00 8. " WAKEUP_PLL ,WAKEUP_PLL" "0,1" bitfld.long 0x00 0. " IDDQ_PG ,IDDQ_PG" "0,1" group.long 0xC0++0x03 line.long 0x00 "MSI_QUEUE,MSI Message Queue Configuration Register" bitfld.long 0x00 3. " MSI_QUEUE3 ,MSI message to VC queue 3 send enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSI_QUEUE2 ,MSI message to VC queue 2 send enable" "Disabled,Enabled" bitfld.long 0x00 1. " MSI_QUEUE1 ,MSI message to VC queue 1 send enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSI_QUEUE0 ,MSI message to VC queue 0 send enable" "Disabled,Enabled" group.long 0xF0++0x07 line.long 0x00 "INDIRECT_IDP0,IDP pair to access 257-4K address space - Address register" hexmask.long.word 0x00 2.--11. 1. " IDP_INDEX ,IDP_INDEX" line.long 0x04 "INDIRECT_IDP1,IDP pair to access 257-4K address space - DATA register" group.long 0xF8++0x07 line.long 0x00 "FPCICFG,FPCI Debug register" bitfld.long 0x00 28.--31. " DEVID_OVERRIDE_ID ,DEVID_OVERRIDE_ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 27. " DEVID_OVERRIDE_ENABLE ,DEVID_OVERRIDE_ENABLE: Indicates a Linux system when set" "Off,On" bitfld.long 0x00 26. " DROP_ON_TA_ERR_ENABLE ,DROP_ON_TA_ERR_ENABLE" "Off,On" textline " " bitfld.long 0x00 25. " DROP_ON_MA_ERR_ENABLE ,DROP_ON_MA_ERR_ENABLE" "Off,On" bitfld.long 0x00 24. " DROP_ON_ERR_ENABLE ,DROP_ON_ERR_ENABLE" "Off,On" bitfld.long 0x00 23. " FIX_DEADLOCK_ENABLE ,FIX_DEADLOCK_ENABLE" "Off,On" textline " " bitfld.long 0x00 22. " PASSIVE_UID_CLMP_ENABLE ,PASSIVE_UID_CLMP_ENABLE" "Off,On" rbitfld.long 0x00 21. " PASSIVE_UID_CLMP ,PASSIVE_UID_CLMP" "Not support,Support" bitfld.long 0x00 16.--20. " NONISO_READ_CREDITS ,NONISO_READ_CREDITS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 15. " ERR_SEVERITY , ERR_SEVERITY" "Non fatal,Fatal" bitfld.long 0x00 14. " TGTDONE_PASSPW ,TGTDONE_PASSPW" "CLR,SET" bitfld.long 0x00 8. " CREDIT_SYS_ENABLE ,Read credit system enable" "Off,On" textline " " bitfld.long 0x00 6.--7. " COHCMD ,COHCMD" "TOY,COH,NONCOH,?..." bitfld.long 0x00 4.--5. " RSPPASSPW ,Issue of non-posted commands" "TOY,PASS,NOPASS,?..." bitfld.long 0x00 2.--3. " PASSPW ,Issue of non-broadcast commands" "TOY,PASS,NOPASS,?..." textline " " bitfld.long 0x00 0.--1. " ISOCMD ,Issue of ISO/NONISO-counterparts influenced commands issue" "TOY,ISO,NONISO,?..." line.long 0x04 "SCRATCH_1,General purpose scratch register used for communication between the storage SW and the SBIOS" textline " " width 17. group.long 0x114++0x0F line.long 0x00 "NVOOB,Serial ATA internal PHY control register used in nvoob" bitfld.long 0x00 31. " RETIMED_FAREND_LOOPBACK_EN ,SATA controller farend retimed loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 28.--30. " COMMA_CNT ,The number of comma characters seen for the phy_rdy to go high after going through OOB signalling" "0,16,32,48,64,80,96,112" textline " " bitfld.long 0x00 26.--27. " SQUELCH_FILTER_LENGTH ,Amount of glitch duration that are filtered out" "6.66ns,13.32ns,19.98ns,26.64ns" bitfld.long 0x00 24.--25. " SQUELCH_FILTER_MODE ,Squelch signal filtering mode selection" "None,Low,High,?..." line.long 0x04 "CROSS_BAR,SATA CROSS BAR: contains the phy_select" line.long 0x08 "PMUCTL,SATA PHY Control Register" rbitfld.long 0x08 24.--27. " CORE_STS ,Current core_act_sts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 16.--23. 1. " DEV_STS_HOLD ,Number of TXCLK cycles to hold the dev_act_tog and dev_act_sts" textline " " bitfld.long 0x08 8. " HOLD_SEND_ALIGN_DIS ,HOLD_SEND_ALIGN_DIS" "No,Yes" bitfld.long 0x08 2. " FORCE_CORE_CLAMP ,Core clock clamp enable" "Disabled,Enabled" line.long 0x0C "CFG_PHY_0,CFG_PHY_0" bitfld.long 0x0C 6. " PLL_IDDQ_OVERRIDE_VAL ,PLL_IDDQ_OVERRIDE_VAL" "No,Yes" bitfld.long 0x0C 5. " PLL_IDDQ_OVERRIDE ,PLL_IDDQ_OVERRIDE" "No,Yes" textline " " bitfld.long 0x0C 0.--4. " RBC_RESET_DELAY ,Number of tx_clk ticks (300MHz) between the deassertion of sata2phy_ch{1,2}_cdr_reset and the release of CH{1,2}_rbc_reset_" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x12C++0x0F line.long 0x00 "CFG_PHY_1,CFG_PHY_1" bitfld.long 0x00 26. " DONT_CHK_PHY_RESET ,DONT_CHK_PHY_RESET" "0,1" bitfld.long 0x00 25. " COMWAKE_GLOBAL ,COMWAKE_GLOBAL" "0,1" textline " " bitfld.long 0x00 24. " PLL_PD_NO_CMDS ,PLL_PD_NO_CMDS" "0,1" bitfld.long 0x00 23. " PADS_IDDQ_EN ,PADS_IDDQ_EN" "0,1" textline " " bitfld.long 0x00 22. " PAD_PLL_IDDQ_EN ,PAD_PLL_IDDQ_EN" "0,1" bitfld.long 0x00 21. " SEND_OOB_DATA_IN_LOW_POWER ,SEND_OOB_DATA_IN_LOW_POWER" "0,1" textline " " bitfld.long 0x00 20. " NO_OVERRIDE_STAT_IDLE_PHYRDY ,NO_OVERRIDE_STAT_IDLE_PHYRDY" "0,1" bitfld.long 0x00 16.--19. " NUMBER_OF_COMMA_WINDOWS ,NUMBER_OF_COMMA_WINDOWS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " COUNT_FOR_COMMA_WAIT ,COUNT_FOR_COMMA_WAIT" bitfld.long 0x00 3. " DONT_USE_COMMA_FOR_PHYRDY_LOW ,DONT_USE_COMMA_FOR_PHYRDY_LOW" "0,1" textline " " bitfld.long 0x00 2. " EN_ASYNC_REC_ARC_IN_HRRDY ,EN_ASYNC_REC_ARC_IN_HRRDY" "0,1" bitfld.long 0x00 1. " HOLD_RBC_RESET_IN_BIST ,HOLD_RBC_RESET_IN_BIST" "0,1" textline " " bitfld.long 0x00 0. " ASSERT_PHYRDY_FOR_ALL_BIST ,ASSERT_PHYRDY_FOR_ALL_BIST" "0,1" line.long 0x04 "CFG2NVOOB_1,CFG2NVOOB_1" hexmask.long.word 0x04 18.--26. 1. " COMINIT_IDLE_CNT_HIGH ,COMINIT_IDLE_CNT_HIGH" hexmask.long.word 0x04 9.--17. 1. " ACTIVE_CNT_LOW ,ACTIVE_CNT_LOW" textline " " hexmask.long.word 0x04 0.--8. 1. " ACTIVE_CNT_HIGH ,ACTIVE_CNT_HIGH" line.long 0x08 "CFG2NVOOB_2,CFG2NVOOB_2" hexmask.long.word 0x08 18.--26. 1. " COMWAKE_IDLE_CNT_LOW ,COMWAKE_IDLE_CNT_LOW" hexmask.long.word 0x08 9.--17. 1. " COMWAKE_IDLE_CNT_HIGH ,COMWAKE_IDLE_CNT_HIGH" textline " " hexmask.long.word 0x08 0.--8. 1. " COMINIT_IDLE_CNT_LOW ,COMINIT_IDLE_CNT_LOW" line.long 0x0C "CFG_PHY_ACTIVE,CFG_PHY_ACTIVE" hexmask.long.tbyte 0x0C 10.--31. 1. " FROM_SLUMBER ,Time to be in SLUMEBR state after we receive a COMWAKE from the device or the Link Layer lowers the slumber flag" hexmask.long.word 0x0C 0.--9. 1. " FROM_PARTIAL ,Time to be in PARTIAL state after we receive a COMWAKE from the device or the Link Layer lowers the partial flag" group.long 0x170++0x13 line.long 0x00 "FIFO,FIFO" bitfld.long 0x00 16.--19. " P2L_FIFO_DEPTH ,Effective depth of p2l FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " L2P_FIFO_DEPTH ,Effective depth of l2p FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CFG_LINK_0,CFG_LINK_0" bitfld.long 0x04 7. " GOTO_SEND_SYNC_P ,Sending Link SM to L_SEND_SYNC_P in BIST" "No,Yes" bitfld.long 0x04 6. " AUTO_REPEAT_PRIMS ,AUTO_REPEAT_PRIMS" "No,Yes" textline " " bitfld.long 0x04 5. " DEBOUNCE_PHYRDY_PERIOD ,Hysteresis period" "Short,Long" bitfld.long 0x04 4. " DEBOUNCE_PHYRDY ,PHYRDY debounce behaviour" "No,Yes" textline " " bitfld.long 0x04 3. " DELAY_HOTPLUG_INTR ,Generation of hot plug interrupts when we get PHYRDY" "No,Yes" bitfld.long 0x04 2. " SET_BSY_BIT_MTHD ,SET_BSY_BIT_MTHD" "COMINIT,PHYRDY" textline " " bitfld.long 0x04 0.--1. " LED_MIN_ON_TIME ,LED blinking" "OFF,20MS,40MS,80MS" line.long 0x08 "CFG_LINK_1,CFG_LINK_1" hexmask.long.word 0x08 16.--31. 1. " GEN3_DWRD_WAIT_CNT ,Number of generation3 ALIGN DWORDS the controller sends to drive while waiting for gen3 align from drive" hexmask.long.word 0x08 0.--15. 1. " GEN2_DWRD_WAIT_CNT ,Number of generation2 ALIGN DWORDS the controller sends to drive while waiting for gen2 align from drive" line.long 0x0C "CFG_LINK_2,CFG_LINK_2" bitfld.long 0x0C 12.--15. " PHYRDY_USE_ITH_BIT ,PHYRDY_USE_ITH_BIT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 11. " USE_BIT_FOR_DEBOUNCE ,USE_BIT_FOR_DEBOUNCE" "0,1" textline " " hexmask.long.word 0x0C 0.--10. 1. " PHYRDY_DBNC_MUX ,Debounced version of PHYRDY which has two options: 10 ms and 10 us" group.long 0x1d0++0x03 line.long 0x00 "CFG_TRANS_0,CFG_TRANS_0" bitfld.long 0x00 1. " USE_RISE_EDGE_STATUS_RESET ,USE_RISE_EDGE_STATUS_RESET" "No,Yes" bitfld.long 0x00 0. " F2I_FIFO_FLUSH_FIX , F2I_FIFO_FLUSH_FIX" "No,Yes" textline " " width 19. width 16. group.long 0x370++0x03 line.long 0x00 "CFG,Config" hexmask.long.byte 0x00 24.--31. 1. " CTRL_TICKS_FOR_MASTER_TO ,Control ticks used in Master-slave emulation" group.long 0x490++0x03 line.long 0x00 "IDE1,OLD IDE TIMING" rgroup.long 0x498++0x03 line.long 0x00 "FEATURE,Feature Register" bitfld.long 0x00 18.--23. " FEATURE_AHCI_ESATA_DIS ,FEATURE_AHCI_ESATA_DIS" "No,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,Yes" bitfld.long 0x00 10.--12. " RAID_FUNCTION_DIS ,RAID_FUNCTION_DIS" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " PORTS_2_3_DIS ,PORTS_2_3_DIS" "No,Yes" bitfld.long 0x00 8. " PORTS_0_1_DIS ,PORTS_0_1_DIS" "No,Yes" textline " " bitfld.long 0x00 4. " AHCI_POWER_DIS ,AHCI_POWER_DIS" "No,Yes" bitfld.long 0x00 3. " FBS_DIS ,FBS_DIS" "No,Yes" textline " " bitfld.long 0x00 2. " GEN3_EN ,GEN3_EN" "NO,YES" bitfld.long 0x00 1. " GEN2_EN ,GEN2_EN" "No,Yes" group.long 0x4A0++0x0B line.long 0x00 "CTL1,Miscellaneous CTL1" bitfld.long 0x00 9. " BLK_NONPIO_IDP ,NONPIO read in the case of IDP read suppression (second read block)" "Not blocked,Blocked" bitfld.long 0x00 0. " SATA_ADNVCD_SPD_NEGO ,Advanced way of detecting SATA speeds" "No,Yes" line.long 0x04 "BKDOOR_CC,Backdoor update of the programming interface field and class code of the CFG2[15:8] register" hexmask.long.word 0x04 16.--31. 1. " CLASS_CODE ,CLASS_CODE" hexmask.long.byte 0x04 8.--15. 1. " PROG_IF ,PROG_IF" line.long 0x08 "CFG_CTRL_1,CFG_CTRL_1" bitfld.long 0x08 1. " SATA_CAP ,SATA capability enable" "Disabled,Enabled" bitfld.long 0x08 0. " 48BIT_ADDRESS_DISABLE ,48-bit addressing mode disable" "Not disabled,Disabled" textline " " width 20. group.long 0x4F0++0x07 line.long 0x00 "PERF0,SATA implementation options" bitfld.long 0x00 28. " DONT_DELAY_ROK ,Optimization feature on DMA reads" "False,True" bitfld.long 0x00 25.--26. " SATA_PLL_POWERDOWN ,SATA_PLL_POWERDOWN" "No,Yes,?..." bitfld.long 0x00 7.--11. " MIN_FPCI_CLK_FREQ ,Minimum frequency at which the fpci_clk should run in increments of 1/16th" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "PERF1,SATA implementation options" hexmask.long.byte 0x04 24.--31. 1. " MAX_WATER_MARK ,Maximum occupancy of the two i2f_fifos" hexmask.long.byte 0x04 8.--15. 1. " HIGH_WATER_MARK_PIO ,PIO reads high water mark" hexmask.long.byte 0x04 0.--7. 1. " HIGH_WATER_MARK ,Configures the read FIFO limit at which point the host starts sending HOLD primitives to back-off the data transfer from device" textline " " group.long 0x530++0x07 line.long 0x00 "CHXCFG1,CHXCFG1" bitfld.long 0x00 12.--15. " PHY_CHX_RX_CTL ,PHY_CHX_RX_CTL" "0,1,2,3,,,,,,,,,,,,15" bitfld.long 0x00 8.--11. " PHY_CHX_TX_CTL ,PHY_CHX_TX_CTL" "0,1,2,3,,,,,,,,,,,,15" bitfld.long 0x00 1. " CHX_NEAR_LOOP_BACK ,CHX_NEAR_LOOP_BACK" "Inactive,Active" textline " " bitfld.long 0x00 0. " CHX_RESET ,CHX_RESET" "Inactive,Active" line.long 0x04 "PHY_CTRL,PHY_CTRL" bitfld.long 0x04 3.--4. " PLL_SLEEP ,Power setting of SATA2 internal PHY" "ACTIVE,3G_DISABLED,ALL_CLKS_DISABLED,PLL_DISABLED" bitfld.long 0x04 0. " SLUMBER_DURING_D3 ,Slumber During D3 Enable" "Disabled,Enabled" group.long 0x53C++0x07 line.long 0x00 "LDT,LDT Unit ID Register" bitfld.long 0x00 8.--12. " NON_ISO_UNIT_ID ,Non-ISO Unit ID" "0,1,2,,,,,,,9,,,,,,,,,,,,,,,,,,,,,,31" bitfld.long 0x00 0.--4. " ISO_UNIT_ID ,ISO Unit ID. Hard-wired to 0" "0,1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31" line.long 0x04 "CTRL,CTRL" bitfld.long 0x04 30. " ENABLE_CH2_CH4_INTR ,ENABLE_CH2_CH4_INTR" "No,Yes" bitfld.long 0x04 29. " ENABLE_CH1_CH3_INTR ,ENABLE_CH1_CH3_INTR" "No,Yes" bitfld.long 0x04 27. " NP_RSP_ERROR_INTR ,NP_RSP_ERROR_INTR" "No,Yes" textline " " bitfld.long 0x04 26. " PW_CMD_ERROR_INTR ,PW_CMD_ERROR_INTR" "No,Yes" bitfld.long 0x04 25. " NP_RSP_ERROR_INTR_EN ,NP_RSP_ERROR_INTR_EN" "No,Yes" bitfld.long 0x04 24. " PW_CMD_ERROR_INTR_EN ,PW_CMD_ERROR_INTR_EN" "No,Yes" textline " " bitfld.long 0x04 21. " CH4_EN ,CH4_EN" "No,Yes" bitfld.long 0x04 20. " CH3_EN ,CH3_EN" "No,Yes" bitfld.long 0x04 3. " INTF_ERR_HANDLING_EN ,SATA interface errors advanced error handling feature enable" "No,Yes" textline " " bitfld.long 0x04 2. " BAR5_SPACE_EN ,BAR5 space usage enable" "No,Yes" bitfld.long 0x04 1. " PRI_CHANNEL_EN ,Primary SATA channel enable" "No,Yes" bitfld.long 0x04 0. " SEC_CHANNEL_EN ,Secondary SATA channel enable" "No,Yes" textline " " group.long 0x54C++0x0F line.long 0x00 "CFG_SATA,CFG_SATA" bitfld.long 0x00 16. " FORCE_NATIVE ,FORCE_NATIVE enable" "Disabled,Enabled" bitfld.long 0x00 15. " CTRL_ALT_UID_SCHEME ,CTRL_ALT_UID_SCHEME" "0,1" rbitfld.long 0x00 14. " CTRL_SATA_GEN3_CAPABLE ,CTRL_SATA_GEN3_CAPABLE" "No,Yes" textline " " rbitfld.long 0x00 13. " CTRL_SATA_GEN2_CAPABLE ,CTRL_SATA_GEN2_CAPABLE" "No,Yes" bitfld.long 0x00 12. " BACKDOOR_PROG_IF_EN ,BACKDOOR_PROG_IF_EN" "No,Yes" bitfld.long 0x00 7.--11. " PORT2UNITID_MAPPING ,PORT2UNITID_MAPPING" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 6. " MSI_CAP_DISABLE , MSI_CAP_DISABLE" "No,Yes" bitfld.long 0x00 5. " MSIX_CAP_DISABLE ,MSIX_CAP_DISABLE" "No,Yes" bitfld.long 0x00 4. " USE_40B_ADDR ,NVIDIA style 40b addressing while DMAing data" "No,Yes" textline " " bitfld.long 0x00 3. " ERROR_HANDLING ,ERROR_HANDLING" "No,Yes" bitfld.long 0x00 2. " CTRL_RAID_MODE_CTRL ,RAID Controller mode" "OEM,CHANNEL" bitfld.long 0x00 1. " CTRL_STORAGE_FEATURE ,General purpose bit that SW can use to distinguish between Advanced and Basic storage controller modes" "Advanced,Basic" line.long 0x04 "CFG_MISC,CFG_MISC" bitfld.long 0x04 10. " PHY_RESET_USAGE_MODE[2] ,Lockdet or CFG bit select for pi_reset" "0,1" bitfld.long 0x04 9. " [1] ,ATA status register quick update during PIO writes enable" "Disabled,Enabled" bitfld.long 0x04 8. " [0] ,Lockdet use as PHY reset" "0,1" textline " " bitfld.long 0x04 6.--7. " CFG_MISC_LINK_SM_MODE[2:3] ,L_IDLE features" "0,1,2,3" bitfld.long 0x04 4. " [0] ,Hold bypass enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " PHY_OOB_SEQ_MODE[1] ,Comreset behavior control" "0,1" bitfld.long 0x04 0. " [0] ,Comwake send back off on comwake received from drive" "0,1" line.long 0x08 "LOWPOWER_COUNT ,LOWPOWER_COUNT" bitfld.long 0x08 4.--7. " LOWPOWER_COUNT_SLUMBER ,LOWPOWER_COUNT_SLUMBER" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " LOWPOWER_COUNT_PARTIAL ,LOWPOWER_COUNT_PARTIAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x680++0x07 line.long 0x00 "INDEX,Index Mask Register" bitfld.long 0x00 3. " CH04 ,CH04" "Unselected,Selected" bitfld.long 0x00 2. " CH03 ,CH03" "Unselected,Selected" bitfld.long 0x00 1. " CH02 ,CH02" "Unselected,Selected" textline " " bitfld.long 0x00 0. " CH01 ,CH01" "Unselected,Selected" line.long 0x04 "CHX_MISC ,SATA Miscellaneous Control Register" bitfld.long 0x04 0. " LED_DISABLE ,LED_DISABLE" "0,1" group.long 0x690++0x0F line.long 0x00 "CHX_PHY_CTRL1_GEN1,SATA PHY Control Register (GEN1)" bitfld.long 0x00 26.--29. " TX_DRV_CNTL ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--25. " TX_PEAK_PRE ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--19. " TX_CMADJ ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 8.--15. 1. " TX_PEAK ,PEAK values for GEN1" hexmask.long.byte 0x00 0.--7. 1. " TX_AMP ,AMP values for GEN1" line.long 0x04 "CHX_PHY_CTRL1_GEN2,SATA PHY Control Register (GEN2)" bitfld.long 0x04 26.--29. " TX_DRV_CNTL ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--25. " TX_PEAK_PRE ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x04 12.--19. 1. " TX_PEAK ,PEAK values for GEN2" textline " " bitfld.long 0x04 8.--11. " TX_CMADJ ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 0.--7. 1. " TX_AMP ,AMP values for GEN2" line.long 0x08 "CHX_PHY_CTRL1_GEN3,SATA PHY Control Register (GEN3)" bitfld.long 0x08 26.--29. " TX_DRV_CNTL ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--25. " TX_PEAK_PRE ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x08 12.--19. 1. " TX_PEAK ,PEAK values for GEN3" textline " " bitfld.long 0x08 8.--11. " TX_CMADJ ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 0.--7. 1. " TX_AMP ,AMP values for GEN3" line.long 0x0C "CHX_PHY_CTRL2,SATA PHY Control Register" hexmask.long.word 0x0C 16.--31. 1. " CDR_CNTL_GEN2 ,CDR_CNTL_GEN2" hexmask.long.word 0x0C 0.--15. 1. " CDR_CNTL_GEN1 ,CDR_CNTL_GEN1" group.long 0x6A0++0x0B line.long 0x00 "CHX_PHY_CTRL24,SATA PHY Control Register" hexmask.long.word 0x00 0.--15. 1. " CDR_CNTL_GEN3 ,CDR_CNTL_GEN3" line.long 0x04 "CHX_PHY_CTRL25,SATA PHY Control Register" line.long 0x08 "CHX_PHY_CTRL26,SATA PHY Control Register" group.long 0x6B0++0x4F line.long 0x00 "CHX_PHY_CTRL3,SATA PHY Control Register" rbitfld.long 0x00 29. " STATUS_RX_STAT_IDLE ,STATUS_RX_STAT_IDLE" "0,1" rbitfld.long 0x00 28. " STATUS_TX_STAT_PRESENT ,STATUS_TX_STAT_PRESENT" "0,1" rbitfld.long 0x00 26.--27. " STATUS_RX_RATE ,STATUS_RX_RATE" "GEN1,GEN2,GEN3,?..." textline " " rbitfld.long 0x00 24.--25. " STATUS_TX_RATE ,STATUS_TX_RATE" "GEN1,GEN2,GEN3,?..." bitfld.long 0x00 23. " RX_RATE_OVERRIDE ,RX_RATE_OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 20.--21. " RX_RATE ,RX_RATE" "GEN1,GEN2,GEN3,?..." textline " " bitfld.long 0x00 19. " TX_RATE_OVERRIDE ,TX_RATE_OVERRIDE" "Disabled,Enabled" bitfld.long 0x00 16.--17. " TX_RATE ,TX_RATE" "GEN1,GEN2,GEN3,?..." bitfld.long 0x00 15. " RX_DATA_READY ,RX_DATA_READY" "No,Yes" textline " " bitfld.long 0x00 14. " RX_DATA_EN ,RX_DATA_EN" "Disabled,Enabled" bitfld.long 0x00 13. " TX_DATA_EN_OVERRIDE ,TX_DATA_EN_OVERRIDE" "No,Yes" bitfld.long 0x00 12. " TX_DATA_EN ,TX_DATA Enable (manually)" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RX_SLEEP_OVERRIDE ,RX_SLEEP_OVERRIDE" "No,Yes" bitfld.long 0x00 10. " TX_DATA_READY ,TX_DATA_READY" "Not ready,Ready" bitfld.long 0x00 8.--9. " RX_SLEEP ,Sleep mode on the SATA port selection" "Active,Partial,Slumber,Disabled" textline " " bitfld.long 0x00 7. " TX_SLEEP_OVERRIDE ,Enable a forced sleep mode on the SATA port" "No,Yes" bitfld.long 0x00 4.--5. " TX_SLEEP ,Sleep mode on the SATA port selection" "Active,Partial,Slumber,Disabled" bitfld.long 0x00 3. " CKBUFPD_OVRD ,CKBUFPD_OVRD" "0,1" textline " " bitfld.long 0x00 2. " CKBUFPD ,CKBUFPD" "0,1" bitfld.long 0x00 0. " IDDQ ,IDDQ" "0,1" line.long 0x04 "CHX_PHY_CTRL4,SATA PHY Control Register" rbitfld.long 0x04 30.--31. " SPARE_OUT ,SPARE_OUT" "0,1,2,3" bitfld.long 0x04 28.--29. " SPARE_IN ,SPARE_IN" "0,1,2,3" bitfld.long 0x04 27. " PRBS_CHK_EN ,PRBS_CHK_EN" "0,1" textline " " bitfld.long 0x04 26. " TEST_EN ,TEST_EN" "0,1" bitfld.long 0x04 24. " RATE_MODE ,RATE_MODE" "0,1" bitfld.long 0x04 20.--21. " RX_DIV ,RX_DIV" "0,1,2,3" textline " " bitfld.long 0x04 16.--17. " TX_DIV ,TX_DIV" "0,1,2,3" bitfld.long 0x04 13. " RX_CDR_RESET ,RX_CDR_RESET" "0,1" bitfld.long 0x04 12. " TX_SYNC ,TX_SYNC" "Idle,Now" textline " " bitfld.long 0x04 11. " FED_LOOP ,FED_LOOP" "0,1" bitfld.long 0x04 8.--10. " TX_DATA_MODE ,TX_DATA_MODE" "NORMAL,PRBS_2_7,0101010101,1100110011,0000011111,0101111100,?..." bitfld.long 0x04 7. " FEA_LOOP ,FEA_LOOP" "0,1" textline " " bitfld.long 0x04 4.--6. " FEA_MODE ,FEA_MODE" "0,1,2,3,4,5,6,7" bitfld.long 0x04 3. " NEA_LOOP ,NEA_LOOP" "0,1" bitfld.long 0x04 2. " NED_LOOP ,NED_LOOP" "0,1" textline " " bitfld.long 0x04 0.--1. " NED_MODE ,NED_MODE" "0,1,2,3" line.long 0x08 "CHX_PHY_CTRL5,SATA PHY Control Register" bitfld.long 0x08 24.--27. " CDR_MODE ,CDR_MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 19. " TX_RDET ,TX_RDET" "Idle,Start" bitfld.long 0x08 18. " RX_IDLE_MODE ,RX_IDLE_MODE" "0,1" textline " " bitfld.long 0x08 17. " RX_IDLE_BYP ,RX_IDLE_BYP" "Disabled,Enabled" bitfld.long 0x08 16. " TX_RDET_BYP ,TX_RDET_BYP" "Disabled,Enabled" bitfld.long 0x08 14.--15. " RX_IDLE_T ,RX_IDLE_T" "0,1,2,3" textline " " bitfld.long 0x08 12.--13. " TX_RDET_T ,TX_RDET_T" "0,1,2,3" bitfld.long 0x08 8.--11. " TX_SEL_LOAD ,TX_SEL_LOAD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " MISC_CNTL ,MISC_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "CHX_PHY_CTRL6,SATA PHY Control Register" rbitfld.long 0x0C 27.--28. " RX_BYP_DATA ,RX_BYP_DATA" "0,1,2,3" bitfld.long 0x0C 26. " RX_TERM_MODE ,RX_TERM_MODE" "False,True" bitfld.long 0x0C 25. " RX_TERM_EN ,RX_TERM_EN" "False,True" textline " " bitfld.long 0x0C 24. " TX_TERM_MODE ,TX_TERM_MODE" "False,True" hexmask.long.byte 0x0C 16.--23. 1. " MISC_OUT ,MISC_OUT" rbitfld.long 0x0C 14. " RX_BYP_IN ,RX_BYP_IN" "0,1" textline " " rbitfld.long 0x0C 12. " TX_BYP_IN ,TX_BYP_IN" "0,1" bitfld.long 0x0C 9.--10. " RX_BYP_MODE ,RX_BYP_MODE" "False,True,?..." bitfld.long 0x0C 7. " RX_BYP_EN ,RX_BYP_EN" "False,True" textline " " bitfld.long 0x0C 6. " RX_BYP_DIR ,RX_BYP_DIR" "False,True" bitfld.long 0x0C 4. " RX_BYP_OUT ,RX_BYP_OUT" "False,True" bitfld.long 0x0C 3. " TX_BYP_EN ,TX_BYP_EN" "False,True" textline " " bitfld.long 0x0C 2. " TX_BYP_DIR ,TX_BYP_DIR" "False,True" bitfld.long 0x0C 0.--1. " TX_BYP_OUT ,TX_BYP_OUT" "False,True,?..." line.long 0x10 "CHX_PHY_CTRL7,SATA PHY Control Register" bitfld.long 0x10 20.--23. " RX_WANDER_GEN3 ,RX_WANDER_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 18.--19. " RX_TERM_CNTL_GEN3 ,RX_TERM_CNTL_GEN3" "0,1,2,3" bitfld.long 0x10 16.--17. " TX_TERM_CNTL_GEN3 ,TX_TERM_CNTL_GEN3" "0,1,2,3" textline " " bitfld.long 0x10 12.--15. " RX_WANDER_GEN2 ,RX_WANDER_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 10.--11. " RX_TERM_CNTL_GEN2 ,RX_TERM_CNTL_GEN2" "0,1,2,3" bitfld.long 0x10 8.--9. " TX_TERM_CNTL_GEN2 ,TX_TERM_CNTL_GEN2" "0,1,2,3" textline " " bitfld.long 0x10 4.--7. " RX_WANDER_GEN1 ,RX_WANDER_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 2.--3. " RX_TERM_CNTL_GEN1 ,RX_TERM_CNTL_GEN1" "0,1,2,3" bitfld.long 0x10 0.--1. " TX_TERM_CNTL_GEN1 ,TX_TERM_CNTL_GEN1" "0,1,2,3" line.long 0x14 "CHX_PHY_CTRL8,SATA PHY Control Register" rbitfld.long 0x14 16.--21. " RX_QEYE_OUT ,RX_QEYE_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 8. " RX_QEYE_EN_GEN3 ,RX_QEYE_EN_GEN3" "0,1" bitfld.long 0x14 4. " RX_QEYE_EN_GEN2 ,RX_QEYE_EN_GEN2" "0,1" textline " " bitfld.long 0x14 0. " RX_QEYE_EN_GEN1 ,RX_QEYE_EN_GEN1" "0,1" line.long 0x18 "CHX_PHY_CTRL9,SATA PHY Control Register" hexmask.long.word 0x18 16.--31. 1. " MISC_TEST ,MISC_TEST" hexmask.long.byte 0x18 8.--15. 1. " MISC_OUT_SEL ,MISC_OUT_SEL" bitfld.long 0x18 2. " DFE_RESET ,DFE_RESET" "0,1" textline " " rbitfld.long 0x18 1. " DFE_TRAIN_DONE ,DFE_TRAIN_DONE" "0,1" bitfld.long 0x18 0. " DFE_TRAIN_EN ,DFE_TRAIN_EN" "0,1" line.long 0x1C "CHX_PHY_CTRL10,SATA PHY Control Register" hexmask.long.word 0x1C 16.--31. 1. " EOM_CNTL ,EOM_CNTL" bitfld.long 0x1C 8. " OOB_RX_CAL_EN ,OOB_RX_CAL_EN" "Disabled,Enabled" bitfld.long 0x1C 2. " EOM_EN ,EOM_EN" "0,1" textline " " rbitfld.long 0x1C 1. " EOM_TRAIN_DONE ,EOM_TRAIN_DONE" "0,1" bitfld.long 0x1C 0. " EOM_TRAIN_EN ,EOM_TRAIN_EN" "0,1" line.long 0x20 "CHX_PHY_CTRL11,SATA PHY Control Register" hexmask.long.word 0x20 16.--31. 1. " GEN2_RX_EQ ,GEN2_RX_EQ" hexmask.long.word 0x20 0.--15. 1. " GEN1_RX_EQ ,GEN1_RX_EQ" line.long 0x24 "CHX_PHY_CTRL12,SATA PHY Control Register" hexmask.long.word 0x24 0.--15. 1. " GEN3_RX_EQ ,GEN3_RX_EQ" line.long 0x28 "CHX_PHY_CTRL13,SATA PHY Control Register" bitfld.long 0x28 20.--23. " RX_IQ_CTRL_GEN3 ,RX_IQ_CTRL_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 16.--19. " RX_IQ_CTRL_GEN2 ,RX_IQ_CTRL_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 12.--15. " RX_IQ_CTRL_GEN1 ,RX_IQ_CTRL_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x28 0.--11. 1. " CDR_TEST ,CDR_TEST" line.long 0x2C "CHX_PHY_CTRL14,SATA PHY Control Register: DFE_CNTL_GEN1" line.long 0x30 "CHX_PHY_CTRL15,SATA PHY Control Register" bitfld.long 0x30 20.--23. " RX_FELS_GEN3 ,RX_FELS_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 16.--19. " RX_FELS_GEN2 ,RX_FELS_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 12.--15. " RX_FELS_GEN1 ,RX_FELS_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 8.--11. " DRV_SLEW_GEN3 ,DRV_SLEW_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 4.--7. " DRV_SLEW_GEN2 ,DRV_SLEW_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " DRV_SLEW_GEN1 ,DRV_SLEW_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "CHX_PHY_CTRL16,SATA PHY Control Register" hexmask.long.byte 0x34 16.--23. 1. " RX_PI_CTRL_GEN3 ,RX_PI_CTRL_GEN3" hexmask.long.byte 0x34 8.--15. 1. " RX_PI_CTRL_GEN2 ,RX_PI_CTRL_GEN2" hexmask.long.byte 0x34 0.--7. 1. " RX_PI_CTRL_GEN1 ,RX_PI_CTRL_GEN1" line.long 0x38 "CHX_PHY_CTRL17,SATA PHY Control Register:RX_EQ_CTRL_L_GEN1" line.long 0x3C "CHX_PHY_CTRL18,SATA PHY Control Register:RX_EQ_CTRL_L_GEN2" line.long 0x40 "CHX_PHY_CTRL19,SATA PHY Control Register:RX_EQ_CTRL_L_GEN3" line.long 0x44 "CHX_PHY_CTRL20,SATA PHY Control Register:RX_EQ_CTRL_H_GEN1" line.long 0x48 "CHX_PHY_CTRL21,SATA PHY Control Register:RX_EQ_CTRL_H_GEN2" line.long 0x4C "CHX_PHY_CTRL22,SATA PHY Control Register:RX_EQ_CTRL_H_GEN3" group.long 0x700++0x07 line.long 0x00 "CHXCFG3,Serial ATA Control Register" hexmask.long.word 0x00 16.--31. 1. " CHX_PRBS_ERROR_CNT ,CHX_PRBS_ERROR_CNT" hexmask.long.byte 0x00 8.--15. 1. " CHX_BIST_CODE ,CHX_BIST_CODE" rbitfld.long 0x00 1. " CHX_BIST_STAT ,CHX_BIST_STAT" "NOT_BUSY,BUSY" textline " " eventfld.long 0x00 0. " CHX_BIST_SEND ,CHX_BIST_SEND" "INIT,NOW" line.long 0x04 "CHXCFG4_CHX,CHXCFG4_CHX" bitfld.long 0x04 12. " CHX_SW_COMWAKE_PI ,CHX_SW_COMWAKE_PI" "0,1" bitfld.long 0x04 8.--11. " CHX_PHY_ALIGN_NUM_CNT ,Number of ALIGN primitive pairs that are inserted by the PHY interface block into the output stream" "1 pair,2 pairs,3 pairs,4 pairs,5 pairs,6 pairs,7 pairs,8 pairs,9 pairs,10 pairs,11 pairs,12 pairs,13 pairs,14 pairs,15 pairs,16 pairs" hexmask.long.byte 0x04 0.--7. 1. " CHX_PHY_ALIGN_DWORD_CNT ,Number of DWORDs sent before the required align pairs" group.long 0x714++0x03 line.long 0x00 "PRBS_CHX,Control bits for the IOBIST PRBS generator and checker" hexmask.long.word 0x00 16.--31. 1. " ERROR_COUNT ,ERROR_COUNT" rbitfld.long 0x00 15. " LOCKED ,LOCKED" "0,1" rbitfld.long 0x00 14. " ERROR ,ERROR" "0,1" textline " " bitfld.long 0x00 12. " HOT_RESET ,HOT_RESET" "0,1" bitfld.long 0x00 10. " PI_LOOPBACK ,PI_LOOPBACK" "0,1" hexmask.long.word 0x00 0.--9. 1. " SEED ,SEED" rgroup.long 0x718++0x03 line.long 0x00 "CHX_PHY_CTRL23,SATA PHY Control Register" bitfld.long 0x00 16. " RX_EOM_DONE ,RX_EOM_DONE" "In progress,Done" hexmask.long.word 0x00 0.--15. 1. " RX_EOM_STATUS ,RX_EOM_STATUS" group.long 0x750++0x03 line.long 0x00 "CHX_LINK0,CHX_LINK0" bitfld.long 0x00 2. " IDDQ_ON_OFFLINE ,IDDQ_ON_OFFLINE" "NO,YES" bitfld.long 0x00 1. " CONT_DISABLE ,CONT primitive in the SATA TX disable" "No,Yes" bitfld.long 0x00 0. " SCRAM_DIS ,Data scrambling in the SATA Link layer disable" "No,Yes" textline " " width 27. group.long 0x790++0x0B line.long 0x00 "CHX_AHCI_PORT_PXTFD_BKDR,Back-door register for PXTFD of the PSM registers" hexmask.long.byte 0x00 8.--15. 1. " ERR ,ERR" bitfld.long 0x00 7. " STS_BSY ,STS_BSY" "Cleared,Set" bitfld.long 0x00 6. " STS_DRDY ,STS_DRDY" "Cleared,Set" textline " " bitfld.long 0x00 5. " STS_DF ,STS_DF" "Cleared,Set" bitfld.long 0x00 4. " STS_CS ,STS_CS" "Cleared,Set" bitfld.long 0x00 3. " STS_DRQ ,STS_DRQ" "Cleared,Set" textline " " bitfld.long 0x00 1.--2. " STS_2_1 ,STS_2_1" "0,1,2,3" bitfld.long 0x00 0. " STS_ERR ,STS_ERR" "Cleared,Set" line.long 0x04 "CHX_AHCI_PORT_PXSIG_BKDR,Back-door register for PXSIG of the PSM registers" hexmask.long.byte 0x04 24.--31. 1. " LBA_HIGH ,LBA_HIGH" hexmask.long.byte 0x04 16.--23. 1. " LBA_MID ,LBA_MID" hexmask.long.byte 0x04 8.--15. 1. " LBA_LOW ,LBA_LOW" textline " " hexmask.long.byte 0x04 0.--7. 1. " SECTOR_CNT ,SECTOR_CNT" line.long 0x08 "CHX_AHCI_PORT_PXSSTS_BKDR,Back-door register for PXSSTS_SPD of the PSM registers" bitfld.long 0x08 8.--11. " IPM ,IPM" "NO_DEV,,,,,,SLUMBER,?..." bitfld.long 0x08 4.--7. " SPD ,SPD" "NO_DEV,GEN1,GEN2,GEN3,?..." bitfld.long 0x08 0.--3. " DET ,DET" "NO_DEV,?..." group.long 0x7F0++0x03 line.long 0x00 "CHX_GLUE,CHX_GLUE" bitfld.long 0x00 0. " ATAPI_BLINK_EN ,led_active signal qualifier" "Disabled,Enabled" rgroup.long 0xAC0++0x03 line.long 0x00 "INTR,Serial ATA Reserved Register" bitfld.long 0x00 31. " SEC_INTR ,Secondary Interrupt pending status" "Not pending,Pending" bitfld.long 0x00 30. " PRI_INTR ,Primary Interrupt pending status" "Not pending,Pending" group.long 0xC00++0x07 line.long 0x00 "EMU1,Serial ATA Control Register" bitfld.long 0x00 28.--31. " PHY_UART_TIMEOUT ,PHY_UART_TIMEOUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 26. " PHY_USE_RBC1 ,PHY_USE_RBC1" "No,Yes" bitfld.long 0x00 25. " PHY_ABSORB_ALIGN_PRIM ,PHY_ABSORB_ALIGN_PRIM" "No,Yes" textline " " bitfld.long 0x00 24. " PHY_BYPASS_EN ,PHY_BYPASS_EN" "No,Yes" hexmask.long.byte 0x00 16.--23. 1. " PHY_UART_SAMPLE ,PHY_UART_SAMPLE" hexmask.long.byte 0x00 8.--15. 1. " PHY_UART_DIV ,PHY_UART_DIV" textline " " bitfld.long 0x00 6. " PHY_PM_EN ,PHY_PM_EN" "NO,YES" bitfld.long 0x00 5. " PHY_TXCLK_EARLY ,PHY_TXCLK_EARLY" "No,Yes" bitfld.long 0x00 4. " PHY_DATA_EARLY ,PHY_DATA_EARLY" "No,Yes" textline " " rbitfld.long 0x00 1.--3. " PHY_SEL ,PHY_SEL" "NOTHING,MARVELL,SI,NVDA_EXT,NVDA_INT,?..." bitfld.long 0x00 0. " RESET_ON_COMRESET ,RESET_ON_COMRESET" "No,Yes" line.long 0x04 "EMU2,Serial ATA Back-door Class Code Register" bitfld.long 0x04 31. " RETRY_CTL_FIS_SRST ,RETRY_CTL_FIS_SRST" "0,1" bitfld.long 0x04 24.--26. " AHCI_DEBUG_PORT_SEL ,AHCI_DEBUG_PORT_SEL" "ZERO,ONE,TWO,THREE,?..." tree.end width 0x0B tree.end ; tree "SATA0 Configuration space" ; base ad:0x70021000 ; %include tegrak1/sataconf.ph ad:0x70021000 SATA0 ; tree.end tree "DMA Control Registers" base ad:0x70006C00 width 15. group.byte 0x00++0x00 line.byte 0x00 "PRI_CMD,Bus Master SATA Primary Channel Command Register" bitfld.byte 0x00 3. " BM_RW ,Read or Write Control" "Read,Write" eventfld.byte 0x00 0. " BM_SS ,Start/Stop Bus Master" "Stop,Start" group.byte 0x02++0x00 line.byte 0x00 "PRI_STS,Bus Master SATA Primary Channel Status Register" rbitfld.byte 0x00 7. " SMPLX ,Simplex only" "No,Yes" bitfld.byte 0x00 6. " DMA1 ,Drive 1 DMA Capable" "No,Yes" bitfld.byte 0x00 5. " DMA0 ,Drive 0 DMA Capable" "No,Yes" eventfld.byte 0x00 2. " INTR ,Interrupt" "No,Yes" textline " " rbitfld.byte 0x00 1. " ERR , Error status" "No error,Error" rbitfld.byte 0x00 0. " BMSATAA ,Bus Master SATA Active" "NACTV,ACTV" group.long 0x04++0x07 line.long 0x00 "PRI_PRD_ADD,Primary Channel Descriptor Table Pointer Register" hexmask.long 0x00 2.--31. 1. " DW ,Base address of Descriptor table" group.byte 0x08++0x00 line.byte 0x00 "SEC_CMD,Bus Master SATA Secondary Channel Command Register" bitfld.byte 0x00 3. " BM_RW ,Read or Write Control" "Read,Write" eventfld.byte 0x00 0. " BM_SS ,Start/Stop Bus Master" "Stop,Start" group.byte 0x0A++0x00 line.byte 0x00 "SEC_STS,Bus Master SATA Secondary Channel Status Register" rbitfld.byte 0x00 7. " SMPLX ,Simplex only" "No,Yes" bitfld.byte 0x00 6. " DMA1 ,Drive 1 DMA Capable" "No,Yes" bitfld.byte 0x00 5. " DMA0 ,Drive 0 DMA Capable" "No,Yes" eventfld.byte 0x00 2. " INTR ,Interrupt" "No,Yes" textline " " rbitfld.byte 0x00 1. " ERR , Error status" "No error,Error" rbitfld.byte 0x00 0. " BMSATAA ,Bus Master SATA Active" "NACTV,ACTV" group.long 0x0C++0x03 line.long 0x00 "SEC_PRD_ADD,Secondary Channel Descriptor Table Pointer Register" hexmask.long 0x00 2.--31. 0x4 " DW ,Base address of Descriptor table" group.long 0x1F0++0x07 line.long 0x00 "PRI_COMMAND_0,PRI_COMMAND_0" hexmask.long.byte 0x00 24.--31. 1. " LBA_LOW ,LBA_LOW" hexmask.long.byte 0x00 16.--23. 1. " SECTOR_COUNT ,SECTOR_COUNT" hexmask.long.byte 0x00 8.--15. 1. " FEATURE_ERR ,FEATURE_ERR" hexmask.long.byte 0x00 0.--7. 1. " DATA ,DATA" line.long 0x04 "PRI_COMMAND_1,PRI_COMMAND_1" hexmask.long.byte 0x04 24.--31. 1. " COMMAND_STATUS ,COMMAND_STATUS" hexmask.long.byte 0x04 16.--23. 1. " DEVICE ,DEVICE" hexmask.long.byte 0x04 8.--15. 1. " LBA_HIGH ,LBA_HIGH" hexmask.long.byte 0x04 0.--7. 1. " LBA_MID ,LBA_MID" group.long 0x3F4++0x03 line.long 0x00 "PRI_CONTROL,PRI_CONTROL" hexmask.long.byte 0x00 16.--23. 1. " DEVICE_ALTERNATE_STATUS ,DEVICE_ALTERNATE_STATUS" group.long 0x170++0x07 line.long 0x00 "SEC_COMMAND_0,SEC_COMMAND_0" hexmask.long.byte 0x00 24.--31. 1. " LBA_LOW ,LBA_LOW" hexmask.long.byte 0x00 16.--23. 1. " SECTOR_COUNT ,SECTOR_COUNT" hexmask.long.byte 0x00 8.--15. 1. " FEATURE_ERR ,FEATURE_ERR" hexmask.long.byte 0x00 0.--7. 1. " DATA ,DATA" line.long 0x04 "SEC_COMMAND_1,SEC_COMMAND_1" hexmask.long.byte 0x04 24.--31. 1. " COMMAND_STATUS ,COMMAND_STATUS" hexmask.long.byte 0x04 16.--23. 1. " DEVICE ,DEVICE" hexmask.long.byte 0x04 8.--15. 1. " LBA_HIGH ,LBA_HIGH" hexmask.long.byte 0x04 0.--7. 1. " LBA_MID ,LBA_MID" group.long 0x374++0x03 line.long 0x00 "SEC_CONTROL,SEC_CONTROL" hexmask.long.byte 0x00 16.--23. 1. " DEVICE_ALTERNATE_STATUS ,DEVICE_ALTERNATE_STATUS" width 0x0B tree.end tree "AUX Registers" base ad:0x70001100 width 17. group.long 0x08++0x07 line.long 0x00 "MISC_CNTL_1,Misc Control 1 Register" bitfld.long 0x00 19. " AUX_RX_IDLE_STATUS_MASK ,AUX Rx idle status input mask" "Not masked,Masked" bitfld.long 0x00 18. " AUX_OR_CORE_IDLE_STATUS_SEL ,Interrupt generation Rx idle status source select" "AUX,CORE" sif !cpuis("TEGRAX1") textline " " bitfld.long 0x00 17. " DEVSLP_OVERRIDE ,SATA core DEVSLP output override enable" "Disabled,Enabled" bitfld.long 0x00 16. " DSP_SUPPORT ,Device sleep support" "Not supported,Supported" textline " " bitfld.long 0x00 15. " DESO_SUPPORT ,Capability to enter DEVSLP from state" "Any,Slumber" bitfld.long 0x00 14. " SADM_SUPPORT ,SATA core capability to support hardware assertion of the DEVSLP" "Not supported,Supported" endif textline " " bitfld.long 0x00 13. " SDS_SUPPORT ,SATA core device sleep support" "Not supported,Supported" bitfld.long 0x00 12. " RX_STAT_IDLE_MASK ,Mask the Rx stat idle input to the SATA core" "Not masked,Masked" sif !cpuis("TEGRAX1") textline " " rbitfld.long 0x00 11. " SATA2IPSM_DEVSLP ,SATA link DEVSLP state" "Disabled,Enabled" endif textline " " rbitfld.long 0x00 9.--10. " SATA2IPSM_ST ,SATA link partial/slumber modes indication" "0,1,2,3" bitfld.long 0x00 8. " NVA2SATA_OOB_ON_SCONTROL_SPD_WR ,OOB and through speed negotiation on SCONTROL SPD write" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " NVA2SATA_OOB_ON_POR ,Automatic OOB sequence on coming out of reset" "Disabled,Enabled" rbitfld.long 0x00 5.--6. " L0_RX_IDLE_T_SAX ,L0 Rx idle T value from the SATA controller" "0,1,2,3" textline " " bitfld.long 0x00 3.--4. " L0_RX_IDLE_T_NPG ,L0 Rx idle T value for the SATA PHY from APB misc" "0,1,2,3" bitfld.long 0x00 2. " L0_RX_IDLE_T_MUX ,Select L0 Rx idle T driving source for SATA PHY" "SATA controller,APB misc" textline " " bitfld.long 0x00 1. " PMU2SATA_ACCLMTR_TRIG ,External accelerometer trigger enable" "Disabled,Enabled" bitfld.long 0x00 0. " DEVICE_DIS_SATA0 ,Serial ATA interface 0 disable" "No,Yes" line.long 0x04 "RX_STAT_INT,Rx Stat Int Register" sif cpuis("TEGRAX2") bitfld.long 0x04 11. " SATA_AUX_RX_STAT_INT_DISABLE ,SATA AUX Rx stat interrupt disable" "No,Yes" rbitfld.long 0x04 10. " SATA_L0_AUX_RX_STAT_IDLE ,SATA PAD L0 AUX Rx idle status status" "Active,Idle" textline " " setclrfld.long 0x04 9. 0x08 3. 0x0C 3. " SATA_AUX_RX_STAT_INT_STATUS_SET/CLR ,SATA Rx stat interrupt status from SATA PAD VAUX portion" "No interrupt,Interrupt" textline " " endif sif !cpuis("TEGRAX1") bitfld.long 0x04 8. " SATA_DEVSLP_INT_DISABLE ,SATA DEVSLP interrupt disable" "No,Yes" rbitfld.long 0x04 7. " SATA_DEVSLP ,SATA DEVSLP state interrupt status" "No interrupt,Interrupt" textline " " setclrfld.long 0x04 6. 0x08 2. 0x0C 2. " SATA_DEVSLP_INT_STATUS_SET/CLR ,SATA DEVSLP state interrupt status" "No interrupt,Interrupt" endif textline " " bitfld.long 0x04 5. " SATA_DEV_ATTEN_INT_DISABLE ,SATA device attention interrupt disable" "No,Yes" rbitfld.long 0x04 4. " SATA_DEVICE_ATTENTION ,SATA device attention status" "Cleared,Asserted" setclrfld.long 0x04 3. 0x08 1. 0x0C 1. " SATA_DEV_ATTEN_INT_STATUS_SET/CLR ,SATA device attention interrupt status from GPIO" "No interrupt,Interrupt" textline " " sif !cpuis("TEGRAX2") bitfld.long 0x04 2. " SATA_RX_STAT_INT_DISABLE ,SATA Rx stat interrupt disable" "No,Yes" textline " " rbitfld.long 0x04 1. " SATA_L0_RX_STAT_IDLE ,SATA PAD L0 Rx stat idle status" "Idle,Active" endif setclrfld.long 0x04 0. 0x08 0. 0x0C 0. " SATA_RX_STAT_INT_STATUS_SET/CLR ,SATA Rx stat interrupt status from the SATA PAD" "No interrupt,Interrupt" group.long 0x18++0x1B line.long 0x00 "SPARE_CFG0,Spare CFG0 Register" bitfld.long 0x00 14. " MDAT_TIMER_AFTER_PG_VALID ,MDAT timer value valid" "Invalid,Valid" bitfld.long 0x00 8.--13. " MDAT_TIMER_AFTER_PG ,MDAT timer value to be updated by the SW before power-ungating SATA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.long 0x00 0.--5. " MDAT_TIMER_BEFORE_PG ,MDAT timer value to be updated by the SW before power-gating SATA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "SPARE_CFG1,Spare CFG1 Register" line.long 0x08 "PAD_PLL_CTRL,SATA PAD PLL Control Register" bitfld.long 0x08 28.--29. " PLL1_REFCLK_NDIV ,Select feedback divider for PLL" "0,1,2,3" rbitfld.long 0x08 27. " PLL1_LOCKDET ,PLL1 locked" "Not locked,Locked" bitfld.long 0x08 24. " PLL1_MODE ,PLL1 mode" "0,1" textline " " bitfld.long 0x08 20.--21. " PLL0_REFCLK_NDIV ,Select feedback divider for PLL" "0,1,2,3" rbitfld.long 0x08 19. " PLL0_LOCKDET ,PLL0 locked" "Not locked,Locked" bitfld.long 0x08 16. " PLL0_MODE ,PLL0 mode" "0,1" textline " " bitfld.long 0x08 12.--15. " REFCLK_SEL ,Reference clock select" "Internal CML,Internal CMOS,External,External,?..." bitfld.long 0x08 11. " REFCLK_TERM100 ,REFCLK TERM100" "0,1" bitfld.long 0x08 9. " PLL_CKBUFPD_OVRD ,PLL CKBUFPD override" "No override,Override" textline " " bitfld.long 0x08 8. " PLL_CKBUFPD_M ,PLL CKBUFPD M" "0,1" bitfld.long 0x08 7. " PLL_CKBUFPD_BL ,PLL CKBUFPD BL" "0,1" bitfld.long 0x08 6. " PLL_CKBUFPD_BR ,PLL CKBUFPD BR" "0,1" textline " " bitfld.long 0x08 5. " PLL_CKBUFPD_TL ,PLL CKBUFPD TL" "0,1" bitfld.long 0x08 4. " PLL_CKBUFPD_TR ,PLL CKBUFPD TR" "0,1" bitfld.long 0x08 2. " PLL_EMULATION_RSTN ,Digital reset for clock divider during emulation mode" "Reset,No reset" line.long 0x0C "PAD_PLL_CTRL_1,PAD PLL Control 1 Register" bitfld.long 0x0C 20.--23. " PLL1_CP_CNTL ,Charge-pump current control for PLL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. " PLL0_CP_CNTL ,Charge-pump current control for PLL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 15. " PLL_BYPASS_EN ,Bypass PLL serial output clocks with input reference clock" "Not bypassed,Bypassed" textline " " bitfld.long 0x0C 13. " PLL_EMULATION_ON ,Enable clock bypass for emulation mode" "Disabled,Enabled" bitfld.long 0x0C 12. " TCLKOUT_EN ,Enable test clock output PADs TSTCLKP/N" "Disabled,Enabled" bitfld.long 0x0C 8.--11. " TCLKOUT_SEL ,Select internal clock source to bring out through the TSTCLKP/N PADs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 7. " XDIGCLK4P5_EN ,Enable XDIGCLK4P5 clock output to core" "Disabled,Enabled" bitfld.long 0x0C 6. " REFCLKBUF_EN ,Enable REFCLKBUF clock output to core" "Disabled,Enabled" bitfld.long 0x0C 5. " TXCLKREF_EN ,Enable TXCLKREF clock to core" "Disabled,Enabled" textline " " bitfld.long 0x0C 4. " TXCLKREF_SEL ,Select the post divider for TXCLKREF clock" "0,1" bitfld.long 0x0C 3. " XDIGCLK_EN ,Enable XDIGCLK output clock" "Disabled,Enabled" bitfld.long 0x0C 0.--2. " XDIGCLK_SEL ,Select the output frequency of XDIGCLK" "0,1,2,3,4,5,6,7" line.long 0x10 "PAD_PLL_CTRL_2,PAD PLL Control 2 Register" bitfld.long 0x10 28.--31. " PLL_TEMP_CNTL ,PLL TEMP control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 18.--23. " PLL_BW_CNTL ,PLL BW control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 16.--17. " PLL_BGAP_CNTL ,PLL BGAP control" "0,1,2,3" textline " " rbitfld.long 0x10 15. " RCAL_DONE ,Status signal to indicate calibration status" "Not done,Done" bitfld.long 0x10 14. " RCAL_RESET ,Reset the resistor calibration logic" "No reset,Reset" rbitfld.long 0x10 8.--12. " RCAL_VAL ,Setting of current active resistor calibration code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x10 7. " RCAL_BYPASS ,Bypass resistor calibration logic" "Not bypassed,Bypassed" bitfld.long 0x10 0.--4. " RCAL_CODE ,Sets resistor calibration code when logic is bypassed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "PAD_PLL_CTRL_3,PAD PLL Control 3 Register" hexmask.long.word 0x14 0.--11. 1. " PLL_MISC_CNTL ,PLL MISC control" line.long 0x18 "PAD_L0_AUX_CTRL,PAD L0 AUX Control Register" rbitfld.long 0x18 9. " AUX_RX_IDLE_STATUS ,AUX Rx idle status" "0,1" rbitfld.long 0x18 8. " AUX_TX_RDET_STATUS ,AUX Tx RDET status" "0,1" bitfld.long 0x18 5. " AUX_HOLD_EN ,AUX hold enable" "Disabled,Enabled" textline " " bitfld.long 0x18 4. " AUX_RX_IDLE_MODE ,AUX Rx idle mode" "0,1" bitfld.long 0x18 3. " AUX_RX_IDLE_EN ,AUX Rx idle enable" "Disabled,Enabled" bitfld.long 0x18 2. " AUX_RX_TERM_EN ,AUX Rx term enable" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " AUX_TX_RDET_EN ,AUX Tx RDET enable" "Disabled,Enabled" bitfld.long 0x18 0. " AUX_TX_TERM_EN ,AUX Tx term enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree "PCIe" tree "PCIE_A1 Registers" base ad:0x01000000 width 11. tree "PCI Compatible Configuration Registers" rgroup.long 0x00++0x03 line.long 0x00 "DEV_ID,Device ID And Vendor ID Register" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID ,Identify the particular device" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,Identify manufacturer of the device" group.long 0x04++0x03 line.long 0x00 "DEV_CTRL,Command And Status Register" eventfld.long 0x00 31. " DETECTED_PERR ,Primary side device receives a poisoned TLP" "Not active,Active" eventfld.long 0x00 30. " SIGNALED_SERR ,ERR_FATAL or ERR_NONFATAL message from primary side device" "Not active,Active" eventfld.long 0x00 29. " RECEIVED_MASTER ,Primary side requestor receives a completion with unsupported request completion status" "Not aborted,Aborted" textline " " eventfld.long 0x00 28. " RECEIVED_TARGET ,Primary side requestor receives a completion with completer abort completion status" "Not aborted,Aborted" eventfld.long 0x00 27. " SIGNALED_TARGET ,Primary side device completes a request using completer abort completion status" "Not aborted,Aborted" eventfld.long 0x00 24. " MASTER_DATA_PERR ,Master data parity error bit" "Not active,Active" textline " " rbitfld.long 0x00 20. " CAPLIST ,Device configuration space includes a capabilities list" "Not present,Present" rbitfld.long 0x00 19. " INTR_STATUS ,INTx interrupt message is pending internally to the device" "Not active,Active" bitfld.long 0x00 10. " INTR_DISABLE ,Ability of the device to generate INTx interrupt messages" "No,Yes" textline " " bitfld.long 0x00 8. " SERR ,SERR enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " PERR ,Parity Error Response bit" "Disabled,Enabled" bitfld.long 0x00 2. " BUS_MASTER ,Ability of the root complex to issue memory and I/O read/write requests" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MEMORY_SPACE ,Respond to memory space accesses on the primary interface" "Disabled,Enabled" bitfld.long 0x00 0. " IO_SPACE ,Respond to I/O space accesses on the primary interface" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "REV_CC,Revision ID And Class Code Registers" hexmask.long.tbyte 0x00 8.--31. 1. " CLASS_CODE ,Generic function of the device" hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,Device specific revision identifier" group.long 0x0C++0x03 line.long 0x00 "MISC_1,MISC 1 Register" rbitfld.long 0x00 23. " HEADER_TYPE1 ,Identifies a multi-function device" "Single function,Multi function" hexmask.long.byte 0x00 16.--22. 1. " HEADER_TYPE0 ,Specifies the layout of bytes 10h through 3Fh" hexmask.long.byte 0x00 0.--7. 1. " CACHE_LINE_SIZE ,Cache line size" group.long 0x18++0x1B line.long 0x00 "BN_LT,Bus Number And Latency Timer Register" hexmask.long.byte 0x00 16.--23. 1. " SUB_BUS_NUMBER ,Subordinate bus number" hexmask.long.byte 0x00 8.--15. 1. " SEC_BUS_NUMBER ,The secondary bus number" hexmask.long.byte 0x00 0.--7. 1. " PRI_BUS_NUMBER ,The primary bus number" line.long 0x04 "IO_BL_SS,I/O Base/Limit And Secondary Status Register" eventfld.long 0x04 31. " DETECTED_PERR ,Secondary side device receives a poisoned TLP" "Not active,Active" eventfld.long 0x04 30. " RECEIVED_SERR ,Secondary side device receives an ERR_FATAL or ERR_NONFATAL message" "Not active,Active" eventfld.long 0x04 29. " RECEIVED_MASTER ,Secondary side device receives a completion with unsupported request completion status" "Not aborted,Aborted" textline " " eventfld.long 0x04 28. " RECEIVED_TARGET ,Secondary side device receives a completion with completer abort completion status" "Not aborted,Aborted" eventfld.long 0x04 27. " SIGNALED_TARGET ,Secondary side device completes a request using completer abort completion status" "Not aborted,Aborted" eventfld.long 0x04 24. " MASTER_DATA_PERR ,Master data parity error bit" "Not active,Active" textline " " bitfld.long 0x04 12.--15. " IO_LIMIT ,Corresponds to address bits AD[15:12] of the I/O limit" "0,256,512,,,,,,,,,,,,,64k" rbitfld.long 0x04 8.--11. " IO_LIMIT_SUPPORT ,Identifies the I/O addressing support" "16,32,?..." bitfld.long 0x04 4.--7. " IO_BASE ,Corresponds to address bits AD[15:12] of the I/O base address" "0,256,512,,,,,,,,,,,,,64k" textline " " rbitfld.long 0x04 0.--3. " IO_BASE_SUPPORT ,Identifies the I/O addressing support" "16,32,?..." line.long 0x08 "MEM_BL,Memory Base And Memory Limit Register" hexmask.long.word 0x08 20.--31. 0x10 " MEM_LIMIT ,Corresponds to address bits AD[31:20] of the memory-mapped I/O limit" hexmask.long.word 0x08 4.--15. 0x10 " MEM_BASE ,Corresponds to address bits AD[31:20] of the memory-mapped I/O base address" line.long 0x0C "PRE_BL,Prefetchable Memory Base/Limit Register" hexmask.long.word 0x0C 20.--31. 0x10 " PREFETCH_MEM_LIMIT ,Corresponds to address bits AD[31:20] of the prefetchable memory limit" rbitfld.long 0x0C 16.--19. " L64BIT ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..." hexmask.long.word 0x0C 4.--15. 0x10 " PREFETCH_MEM_BASE ,corresponds to address bits AD[31:20] of the prefetchable memory base address" textline " " bitfld.long 0x0C 0.--3. " B64BIT ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..." line.long 0x10 "PRE_BU32,Prefetchable Memory Base Upper 32 Bits Register" line.long 0x14 "PRE_LU32,Prefetchable Memory Limit Upper 32 Bits Register" line.long 0x18 "IO_BL_U16,I/O Base/Limit Upper 16 Bits Register" hexmask.long.word 0x18 16.--31. 1. " LIMIT_UPPER_BITS ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O limit" hexmask.long.word 0x18 0.--15. 1. " BASE_UPPER_BITS ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O base address" rgroup.long 0x34++0x07 line.long 0x00 "CAP_PTR,Capabilities Pointer" hexmask.long.byte 0x00 0.--7. 0x01 " CAP_PTR_CAP_PTR ,Offset into configuration space where the capabilities list begins" group.long 0x3C++0x03 line.long 0x00 "INTR_BCR,Interrupt Bridge Control Registers" bitfld.long 0x00 22. " SB_RESET ,Triggers a hot reset on the corresponding PCI express port" "Disabled,Enabled" bitfld.long 0x00 20. " VGA_16BITIO ,Full 16-bit decode of IO address range for VGA" "Disabled,Enabled" bitfld.long 0x00 19. " VGA_ADDRESS ,P2P bridge will claim all of the legacy VGA addresses" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ISA_ADDRESS ,Modifies the response by the bridge to ISA I/O addresses" "Disabled,Enabled" bitfld.long 0x00 17. " SERR_FORWARD ,Forwarding of ERR_COR/ERR_NONFATAL and ERR_FATAL from secondary to primary" "Disabled,Enabled" bitfld.long 0x00 16. " PERR_RESP ,Response to poisoned TLPs" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN ,Contains the interrupt pin the device (or device function) uses" hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Contains the interrupt routing information" tree.end tree "PCI Subsystem ID And Subsystem Vendor ID Capability Registers" width 6. rgroup.long 0x40++0x07 line.long 0x00 "SS_0,Subsystem ID/Vendor ID Capability Register 0" hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next capabilities list item" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the SSID/SSVID registers in a PCI-to-PCI bridge" line.long 0x04 "SS_1,Subsystem ID/Vendor ID Capability Register 1" hexmask.long.word 0x04 16.--31. 1. " SSID ,Identifies the particular add-in card or subsystem" hexmask.long.word 0x04 0.--15. 1. " SSVID ,Identifies the manufacturer of the add-in card or subsystem" tree.end tree "PCI Power Management Capability Structure Registers" rgroup.long 0x48++0x03 line.long 0x00 "PM_0,Power Management Register 0" bitfld.long 0x00 31. " D3_COLD_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 30. " D3_HOT_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 29. " D2_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 28. " D1_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" textline " " bitfld.long 0x00 27. " D0_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 26. " D2_SUPPORT ,D2 power management state support" "Not supported,Supported" bitfld.long 0x00 25. " D1_SUPPORT ,D1 power management state support" "Not supported,Supported" bitfld.long 0x00 22.--24. " AUX_CURRENT ,3.3Vaux auxiliary current requirements for the PCI function" "0,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA" textline " " bitfld.long 0x00 21. " DEV_SPEC_INIT ,Device specific initialization bit" "Not needed,Needed" bitfld.long 0x00 16.--18. " PCIPM_REV ,Revision of the PCI power management interface specification" ",,Rev 1.1,Rev 1.2,?..." hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next capabilities list item" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the power management capability registers in a PCI to PCI bridge" group.long 0x4C++0x03 line.long 0x00 "PM_1,Power Management Register 1" eventfld.long 0x00 15. " PME_STATUS ,Assert the PME# signal independent of the state of the PME_En bit" "Not active,Active" bitfld.long 0x00 8. " PME ,Assert PME?..." "Disabled,Enabled" bitfld.long 0x00 0.--1. " PWR_STATE ,Determine the current power state of a function and to set the function into a new power state" "D0,D1,D2,D3hot" tree.end tree "PCI MSI Capability Structure Registers" width 16. group.long 0x50++0x0F line.long 0x00 "MSI_CTRL,MSI Control Registers" rbitfld.long 0x00 23. " 64BIT_CAP ,Capability of generating a 64-bit message address" "Not capable,Capable" bitfld.long 0x00 20.--22. " MULT_EN ,Number of allocated messages" "0,2,4,8,?..." rbitfld.long 0x00 17.--19. " MULT_CAP ,Number of requested messages" "0,2,?..." bitfld.long 0x00 16. " CTRL_MSI ,Permission to use message signaled interrupt to request service" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next item in the capabilities list" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the Message Signaled Interrupt Capability registers in a PCI-to-PCI bridge" line.long 0x04 "MSI_LOW_ADDR,MSI Message Lower Address Register" hexmask.long 0x04 2.--31. 0x04 " DWORD ,Bits 31:2 of the address" line.long 0x08 "MSI_UPPER_ADDR,MSI Message Upper Address Register" line.long 0x0C "MSI_DATA,MSI Message Data Register" hexmask.long.word 0x0C 0.--15. 1. " DATA ,MSI message data" tree.end sif (cpuis("TEGRAX2")) tree "PCI MSI Map Register" group.long 0x60++0x0B line.long 0x00 "MSI_MAP_0,MSI MAP Capability Register" rbitfld.long 0x00 27.--31. " CAP_TYPE ,Capability type for MSI Mapping Capability block" ",,,,,,,,,,,,,,,,,,,,,CAP_TYPE_MSI,?..." bitfld.long 0x00 16. " XLATE_ENABLE ,Global enable for MSI translation" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 0x01 " CAP_PTR ,Pointer to the next capability in the list" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Capability ID for HyperTransport technology devices" line.long 0x04 "MSI_MAP_1,MSI MAP Lower Address Register" hexmask.long.word 0x04 20.--31. 0x10 " ADDRESS_LOWER ,Lower [31:0] bit address field" line.long 0x08 "MSI_MAP_2,MSI MAP Upper Address Register" tree.end endif tree "PCI Express Capability Structure Registers" width 26. rgroup.long 0x80++0x07 line.long 0x00 "PCI_EXPRESS_CAPABILITY,PCI Express Capability List Register" bitfld.long 0x00 25.--29. " INTERRUPT_MESSAGE_NUMBER ,PCI express capability interrupt message number " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 24. " SLOT_IMPLEMENTED ,PCI express capability slot implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 20.--23. " DEVICE_PORT_TYPE ,PCI express capability device port type" "PCI express endpoint device,Legacy PCI express endpoint device,,,Root port of PCI express root complex,Upstream port of PCI express switch,Downstream port of PCI express switch,PCI express to PCI/PCI-X bridge,PCI/PCI-X to PCI express bridge,?..." textline " " bitfld.long 0x00 16.--19. " VERSION ,PCI express capability version number" ",Version 1,Version 2,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " LIST_NEXT_CAPABILITY_PTR ,The offset to the next PCI capability structure" textline " " hexmask.long.byte 0x00 0.--7. 1. " LIST_CAPABILITY_ID ,Indicates PCI express capability structure" line.long 0x04 "DEVICE_CAPABILITY,Device Capabilities Register" bitfld.long 0x04 26.--27. " CAPTURED_SLOT_POWER_LIMIT_SCALE ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x" textline " " hexmask.long.byte 0x04 18.--25. 1. " CAPTURED_SLOT_POWER_LIMIT_VALUE ,Specifies the upper limit on power supplied by slot" textline " " bitfld.long 0x04 15. " ROLE_BASED_ERR_REPORTING ,Device implements the functionality originally defined in the error reporting ECN" "Not implemented,Implemented" textline " " bitfld.long 0x04 14. " POWER_INDICATOR_PRESENT ,Power indicator" "Not implemented,Implemented" textline " " bitfld.long 0x04 13. " ATTENTION_INDICATOR_PRESENT ,Attention indicator" "Not implemented,Implemented" textline " " bitfld.long 0x04 12. " ATTENTION_BUTTON_PRESENT ,Attention button" "Not implemented,Implemented" textline " " bitfld.long 0x04 9.--11. " ENDPOINT_L1_ACCEPTABLE_LATENCY ,Acceptable latency due to the transition from L1 state to the L0 state" "<1 us,1 us - 2 us,2 us -4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us-64 us,> 64 us" textline " " bitfld.long 0x04 6.--8. " ENDPOINT_L0S_ACCEPTABLE_LATENCY ,Acceptable total latency due to the transition from L1 state to the L0 state" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1. us,1 us - 2 us,2 us-4us,> 4 us" textline " " bitfld.long 0x04 5. " EXTENDED_TAG_FIELD_SIZE ,Maximum supported size of the tag field" "5-bit tag field,8-bit tag field" textline " " bitfld.long 0x04 3.--4. " PHANTOM_FUNCTIONS_SUPPORTED ,Phantom functions support" "No bits used,First MSB used,First two MSB used,Three bits" textline " " bitfld.long 0x04 0.--2. " MAX_PAYLOAD_SIZE ,Maximum payload size" "128B,256B,512B,1024B,2048B,4096B,?..." group.long 0x88++0x03 line.long 0x00 "DEVICE_CONTROL_STATUS,Device Control/Status Registers" rbitfld.long 0x00 21. " TRANSACTIONS_PENDING ,Transactions pending" "Completed,Pending" textline " " rbitfld.long 0x00 20. " AUX_POWER_DETECTED ,AUX power detected" "Not detected,Detected" textline " " eventfld.long 0x00 19. " UNSUPP_REQUEST_DETECTED ,Unsupported request" "Not detected,Detected" textline " " eventfld.long 0x00 18. " FATAL_ERROR_DETECTED ,Fatal error" "Not detected,Detected" textline " " eventfld.long 0x00 17. " NON_FATAL_ERROR_DETECTED ,Non-fatal error" "Not detected,Detected" textline " " eventfld.long 0x00 16. " CORR_ERROR_DETECTED ,Correctable errors" "Not detected,Detected" textline " " bitfld.long 0x00 12.--14. " MAX_READ_REQUEST_SIZE ,Maximum read request size" "128B,256B,512B,1024B,2048B,4096B,?..." textline " " bitfld.long 0x00 11. " ENABLE_NO_SNOOP ,No snoop bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " AUXILLARY_POWER_PM_ENABLE ,AUX power PM enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 9. " PHANTOM_FUNCTIONS_ENABLE ,Phantom functions" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " EXTENDED_TAG_FIELD_ENABLE ,8-bit tag field" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--7. " MAX_PAYLOAD_SIZE ,Maximum TLP payload size" "128B,256B,512B,1024B,2048B,4096B,?..." textline " " bitfld.long 0x00 4. " ENABLE_RELAXED_ORDERING ,Relaxed ordering bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " UNSUPP_REQ_REPORTING_ENABLE ,Reporting of unsupported requests" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FATAL_ERROR_REPORTING_ENABLE ,Reporting of fatal errors" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NON_FATAL_ERROR_REPORTING_ENABLE ,Reporting of non-fatal errors" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CORR_ERROR_REPORTING_ENABLE ,Reporting of correctable errors" "Disabled,Enabled" textline " " rgroup.long 0x8C++0x03 line.long 0x00 "LINK_CAPABILITIES,Link Capabilities Register" hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER ,PCI express port number" textline " " bitfld.long 0x00 21. " BW_NOTIFY ,Bandwidth notify" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " LINKACTV_REPORTING ,Link active reporting" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SURPRISE_DOWN_ERPT_CAP ,Detecting and reporting a surprise down error condition" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CLOCK_PM ,Component tolerates the removal of any reference clock" "Disabled,Enabled" textline " " bitfld.long 0x00 15.--17. " L1_EXIT_LATENCY ,L1 exit latency" "< 1 us,1 us - 2 us,2 us - 4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us - 64 us,> 64 us" textline " " bitfld.long 0x00 12.--14. " L0S_EXIT_LATENCY ,L0s exit latency" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1 us,1 us - 2 us,2 us - 4us,?..." textline " " bitfld.long 0x00 10.--11. " ACTIVE_STATE_LINK_PM_SUPPORT ,Level of active state power management supported" ",L0s Entry,,L0s and L1" textline " " bitfld.long 0x00 4.--9. " MAX_LINK_WIDTH ,Maximum width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--3. " MAX_LINK_SPEED ,Maximum Link speed" ",2.5 Gb/s Link,?..." else bitfld.long 0x00 0.--3. " MAX_LINK_SPEED ,Maximum Link speed" ",2.5 Gb/s Link,5.0 Gb/s Link,?..." endif textline " " group.long 0x90++0x03 line.long 0x00 "LINK_CONTROL_STATUS,Link Control/Status Register" eventfld.long 0x00 31. " AUTO_BANDWIDTH ,Auto bandwidth" "Disabled,Enabled" textline " " eventfld.long 0x00 30. " BW_MANAGEMENT ,Bandwidth management" "Disabled,Enabled" textline " " rbitfld.long 0x00 29. " DL_LINK_ACTIVE ,Data link control and management state machine" "Not active,Active" textline " " rbitfld.long 0x00 28. " SLOT_CLOCK_CONFIG ,Component uses platform reference clock" "Platform clock,Independent" textline " " rbitfld.long 0x00 27. " LINK_TRAINING ,Link training" "Completed,In progress" textline " " rbitfld.long 0x00 20.--25. " NEG_LINK_WIDTH ,Negotiated width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " LINK_SPEED ,Negotiated Link Speed" ",2.5 Gb/s,5.0 Gb/s,?..." textline " " bitfld.long 0x00 11. " AUTO_BANDWIDTH_INT_EN ,Auto bandwidth interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " BW_MANAGEMENT_INT_EN ,Bandwidth management interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " HW_AUTO_WIDTH_DISABLE ,Hardware auto width disable" "No,Yes" textline " " rbitfld.long 0x00 8. " CLOCK_PM ,Clock PM" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXTENDED_SYNCH ,Forces extended transmission" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMON_CLOCK_CONFIGURATION ,Common clock configuration" "Common reference clock,Asynchrous reference clock" textline " " rbitfld.long 0x00 5. " RETRAIN_LINK ,Link retraining" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LINK_DISABLE ,Disabling the Link" "No,Yes" textline " " rbitfld.long 0x00 3. " READ_COMPLETION_BOUNDARY ,RCB support capabilities" "64 byte,128 byte" textline " " bitfld.long 0x00 0.--1. " ACTIVE_STATE_LINK_PM_CONTROL ,Level of active state PM supported" ",L0s Entry,,L0s and L1" rgroup.long 0x94++0x03 line.long 0x00 "SLOT_CAPABILITIES,Slot Capabilities Register" hexmask.long.word 0x00 19.--31. 0x08 " PHYSICAL_SLOT_NUMBER ,Physical slot number attached to this port" textline " " bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT ,Notification when an issued command is completed by the hot plug controller" "Supported,Not supported" textline " " bitfld.long 0x00 17. " ELECTROMECHANICAL_INTERLOCK_PRESENT ,Electro mechanical interlock mechanism" "Not implemented,Implemented" textline " " bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Upper limit on power supplied by slot" textline " " bitfld.long 0x00 6. " HOT_PLUG_CAPABLE ,Supporting Hot-plug operations" "Not capable,Capable" textline " " bitfld.long 0x00 5. " HOT_PLUG_SURPRISE ,Hot-plug surprise" "Not capable,Capable" textline " " bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT ,Power indicator" "Not Implemented,Implemented" textline " " bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT ,Attention indicator" "Not Implemented,Implemented" textline " " bitfld.long 0x00 2. " MRL_SENSOR_PRESENT ,MRL sensor" "Not Implemented,Implemented" textline " " bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT ,Power controller" "Not Implemented,Implemented" textline " " bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT ,Attention button" "Not Implemented,Implemented" group.long 0x98++0x0B line.long 0x00 "SLOT_CONTROL_STATUS,Slot Control/Status Register" eventfld.long 0x00 24. " DL_LAYER_STATE_CHANGED ,Notification when Data Link Layer Active field is changed" "Disabled,Enabled" textline " " rbitfld.long 0x00 23. " ELECTROMECHANICAL_INTERLOCK_STATE ,Electromechanical interlock" "Disengaged,Engaged" textline " " rbitfld.long 0x00 22. " PRESENCE_DETECT_STATE ,Presence of a card in the slot" "Slot empty,Card present" textline " " rbitfld.long 0x00 21. " MRL_SENSOR_STATE ,MRL sensor status" "MRL Closed,MRL Open" textline " " eventfld.long 0x00 20. " COMMAND_COMPLETED ,Hot-plug controller completed an issued command" "Not completed,Completed" textline " " eventfld.long 0x00 19. " PRESENCE_DETECT_CHANGED ,Presence Detect change" "Not detected,Detected" textline " " eventfld.long 0x00 18. " MRL_SENSOR_CHANGED ,MRL Sensor state change" "Not detected,Detected" textline " " eventfld.long 0x00 17. " POWER_FAULT_DETECTED ,Power fault" "Not detected,Detected" textline " " eventfld.long 0x00 16. " ATTN_BUTTON_PRESSED ,Attention button" "Not pressed,Pressed" textline " " bitfld.long 0x00 12. " DL_LAYER_STATE_CHANGED_ENABLE ,Data Link Layer Link Active field" "Not changed,Changed" textline " " rbitfld.long 0x00 11. " ELECTROMECHANICAL_INTERLOCK_CONTROL ,Electromechanical interlock mechanism" "Not supported,Supported" textline " " bitfld.long 0x00 10. " POWER_CONTROLLER_CONTROL ,Power state of the slot" "Power on,Power off" textline " " bitfld.long 0x00 8.--9. " POWER_INDICATOR_CONTROL ,Current state of the Power Indicator" ",On,Blink,Off" textline " " bitfld.long 0x00 6.--7. " ATTN_INDICATOR_CONTROL ,Current state of the Attention Indicator" ",On,Blink,Off" textline " " bitfld.long 0x00 5. " HOT_PLUG_INTERRUPT_ENABLE ,Generation of hot plug interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMAND_COMPLETED_INTERRUPT_ENABLE ,Generation of hot plug interrupt when a command is completed" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PRESENCE_DETECT_CHANGED_ENABLE ,Presence detect changed event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " STATUS_MRL_SENSOR_CHANGED_ENABLE ,MRL sensor changed event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " POWER_FAULT_DETECTED_ENABLE ,Power fault event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ATTN_BUTTON_PRESSED_ENABLE ,Attention button pressed event interrupt" "Disabled,Enabled" line.long 0x04 "RCR,Root Control Register" bitfld.long 0x04 3. " PME_INT ,PME interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " SERR_FAT ,Generating system error if a fatal error is reported" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SERR_NONFAT ,Generating system error if a non-fatal error is reported" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " SERR_COR ,System error if a correctable error is reported" "Disabled,Enabled" line.long 0x08 "RSR,Root Status Register" rbitfld.long 0x08 17. " PMEPEND ,Another PME is pending when the PMESTAT bit is set" "Not pending,Pending" textline " " eventfld.long 0x08 16. " PMESTAT ,PME was asserted by the requester ID" "Not active,Active" textline " " hexmask.long.word 0x08 0.--15. 1. " REQID ,PCI requester ID of the last PME requester" rgroup.long 0xA4++0x03 line.long 0x00 "DEVICE_CAPABILITIES_2,Root Capabilities Register 2" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) bitfld.long 0x00 11. " LTR_MECH_SUP ,LTR Capability support" "Unsupported,Supported" textline " " endif bitfld.long 0x00 4. " CPL_TO_DIS_SUP ,Support disabling the completion timeout mechanism" "Unsupported,Supported" textline " " bitfld.long 0x00 0.--3. " CPL_TO_RANGES_SUP ,Completion timeout ranges supported by the root port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xA8++0x03 line.long 0x00 "DEVICE_CONTROL_STATUS_2,Device Control/Status Register 2" bitfld.long 0x00 4. " CPL_TO_DISABLE ,Disables completion timeout" "No,Yes" textline " " bitfld.long 0x00 0.--3. " CPL_TO_VALUE ,Completion timeout ranges supported by the root port" "Default,Range A LO,Range A HI,,,Range B LO,Range B HI,?..." group.long 0xB0++0x03 line.long 0x00 "LINK_CONTROL_STATUS_2,Link Control Status Register" rbitfld.long 0x00 16. " CURRENT_DEEMPHASIS_LEVEL ,Current deemphasis level" "6,3.5" textline " " bitfld.long 0x00 12. " COMPLIANCE_DEEMPHASIS ,Compliance deemphasis" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " COMPLIANCE_SOS ,Compliance SOS" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ENTER_MODIFIED_COMPLIANCE ,Transmission of the modified compliance pattern" "Disabled,Enabled" textline " " bitfld.long 0x00 7.--9. " TRANSMIT_MARGIN ,Value of the non-deemphasized voltage level (Full-swing/Half swing)" "800-1200mV/400-600mV,600-800mV/300-400mV,400-600mV/200-300mV,200-400mV/100-200mV,?..." textline " " rbitfld.long 0x00 6. " SELECTABLE_DEEMPHASIS ,Level of de-emphasis" "-6dB,-3.5dB" textline " " rbitfld.long 0x00 5. " HW_AUTO_SPEED_DISABLE ,Link speed change disable" "No,Yes" textline " " bitfld.long 0x00 4. " ENTER_COMPLIANCE ,Forces link to enter compliance mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " TARGET_LINK_SPEED ,Upper limit on the link operational speed" ",2.5Gb/s,5Gb/s,?..." tree.end tree "Error Reporting Capability Registers" width 20. sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) rgroup.long 0x100++0x03 line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register" hexmask.long.word 0x00 20.--31. 1. " NEXT_PTR ,Next PTR" bitfld.long 0x00 16.--19. " VERSION ,Version" "Version 0,Version 1,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " ID ,ID" else rgroup.long 0x100++0x03 line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register" hexmask.long.word 0x00 20.--31. 1. " ID ,ID" bitfld.long 0x00 16.--19. " VERSION ,Version" "Version 0,Version 1,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " NEXT_PTR ,Next PTR" endif group.long 0x104++0x0B line.long 0x00 "ERPTCAP_UCERR,Uncorrectable Error Status Register" eventfld.long 0x00 20. " UNSUP_REQ_ERR ,Unsupported request error status" "No error,Error" eventfld.long 0x00 19. " ECRC_ERR ,ECRC error status" "No error,Error" textline " " eventfld.long 0x00 18. " MF_TLP ,Malformed TLP status" "False,True" eventfld.long 0x00 17. " RCV_OVFL ,Receiver overflow status" "No overflow,Overflow" textline " " eventfld.long 0x00 16. " UNEXP_COMP ,Unexpected completion status" "False,True" eventfld.long 0x00 15. " COMP_ABORT ,Completion abort status" "Not aborted,Aborted" textline " " eventfld.long 0x00 14. " COMP_TO ,Completion timeout status" "No timeout,Timeout" eventfld.long 0x00 13. " FC_PROTO_ERR ,Flow control protocol error status" "No error,Error" textline " " eventfld.long 0x00 12. " POS_TLP ,Poisoned TLP status" "False,True" eventfld.long 0x00 4. " DLINK_PROTO_ERR ,Data link protocol error status" "No error,Error" textline " " rbitfld.long 0x00 0. " TRAINING_ERR ,Training error status" "No error,Error" line.long 0x04 "ERPTCAP_UCERR_MK,Uncorrectable Error Mask Register" bitfld.long 0x04 20. " UNSUP_REQ_ERR ,Unsupported request error mask" "Not masked,Masked" bitfld.long 0x04 19. " ECRC_ERR ,ECRC error mask" "Not masked,Masked" textline " " bitfld.long 0x04 18. " MF_TLP ,Malformed TLP mask" "Not masked,Masked" bitfld.long 0x04 17. " RCV_OVFL ,Receiver overflow mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " UNEXP_COMP ,Unexpected completion mask" "Not masked,Masked" bitfld.long 0x04 15. " COMP_ABORT ,Completion abort mask" "Not masked,Masked" textline " " bitfld.long 0x04 14. " COMP_TO ,Completion timeout mask" "Not masked,Masked" bitfld.long 0x04 13. " PROTO_ERR ,Flow control protocol error mask" "Not masked,Masked" textline " " bitfld.long 0x04 12. " POS_TLP ,Poisoned TLP mask" "Not masked,Masked" bitfld.long 0x04 4. " DLINK_PROTO_ERR ,Data link protocol error mask" "Not masked,Masked" textline " " rbitfld.long 0x04 0. " TRAINING_ERR ,Training error mask" "Not masked,Masked" line.long 0x08 "ERPTCAP_UCERR_SEVR,Correctable Error Severity Register" bitfld.long 0x08 20. " UNSUP_REQ_ERR ,Unsupported request error" "Non-fatal,Fatal" bitfld.long 0x08 19. " ECRC_ERR ,ECRC error" "Non-fatal,Fatal" textline " " bitfld.long 0x08 18. " MF_TLP ,Malformed TLP" "Non-fatal,Fatal" bitfld.long 0x08 17. " RCV_OVFL ,Receiver overflow" "Non-fatal,Fatal" textline " " bitfld.long 0x08 16. " UNEXP_COMP ,Unexpected completion" "Non-fatal,Fatal" bitfld.long 0x08 15. " COMP_ABORT ,Completion abort" "Non-fatal,Fatal" textline " " bitfld.long 0x08 14. " COMP_TO ,Completion timeout" "Non-fatal,Fatal" bitfld.long 0x08 13. " PROTO_ERR ,Flow control protocol error" "Non-fatal,Fatal" textline " " bitfld.long 0x08 12. " POS_TLP ,Poisoned TLP" "Non-fatal,Fatal" bitfld.long 0x08 4. " DLINK_PROTO_ERR ,Data link protocol error" "Non-fatal,Fatal" textline " " rbitfld.long 0x08 0. " TRAINING_ERR ,Training error" "Non-fatal,Fatal" group.long 0x110++0x03 line.long 0x00 "ERPTCAP_CERR,Correctable Error Status Register" eventfld.long 0x00 13. " ADVISORY_NF ,ADVISORY NF status" "Not masked,Masked" eventfld.long 0x00 12. " RPLY_TO ,Replay timer timeout status" "Not masked,Masked" textline " " eventfld.long 0x00 8. " RPLY_RLOV ,Replay NUM rollover status" "Not masked,Masked" eventfld.long 0x00 7. " BAD_DLLP ,Bad DLLP status" "Not masked,Masked" textline " " eventfld.long 0x00 6. " BAD_TLP ,Bad TLP status" "Not masked,Masked" eventfld.long 0x00 0. " RCV_ERR ,Receiver error status" "Not masked,Masked" group.long 0x114++0x03 line.long 0x00 "ERPTCAP_CERR_MK,Correctable Error Mask Register" bitfld.long 0x00 13. " ADVISORY_NF ,ADVISORY NF mask" "Not masked,Masked" bitfld.long 0x00 12. " RPLY_TO ,Replay timer timeout mask" "Not masked,Masked" textline " " bitfld.long 0x00 8. " RPLY_RLOV ,Replay NUM rollover mask" "Not masked,Masked" bitfld.long 0x00 7. " BAD_DLLP ,Bad DLLP mask" "Not masked,Masked" textline " " bitfld.long 0x00 6. " BAD_TLP ,Bad TLP mask" "Not masked,Masked" bitfld.long 0x00 0. " RCV_ERR ,Receiver error mask" "Not masked,Masked" textline " " width 26. group.long 0x118++0x03 line.long 0x00 "ERPTCAP_ADV_ERR_CAP_CNTL,Advanced Error Capabilities And Control Register" bitfld.long 0x00 8. " ECRC_CHK_EN ,ECRC CHK EN" "Disabled,Enabled" rbitfld.long 0x00 7. " ECRC_CHK_CAP ,ECRC CHK CAP" "False,True" textline " " bitfld.long 0x00 6. " ECRC_GEN_EN ,ECRC GEN EN" "Disabled,Enabled" rbitfld.long 0x00 5. " ECRC_GEN_CAP ,ECRC GEN CAP" "False,True" textline " " rbitfld.long 0x00 0.--4. " ERR_PTR ,ERR PTR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x11C++0xF line.long 0x00 "ERPTCAP_HDR_LOG_DW0,Header Log Dword 0 Register" line.long 0x04 "ERPTCAP_HDR_LOG_DW1,Header Log Dword 1 Register" line.long 0x08 "ERPTCAP_HDR_LOG_DW2,Header Log Dword 2 Register" line.long 0x0C "ERPTCAP_HDR_LOG_DW3,Header Log Dword 3 Register" textline " " width 20. group.long 0x12C++0x0B line.long 0x00 "ERPTCAP_ERR_CMD,Root Error Command Register" bitfld.long 0x00 2. " FATAL_ERR_RPT_EN ,Fatal error RPT enable" "Disabled,Enabled" bitfld.long 0x00 1. " NONFATAL_ERR_RPT_EN ,Non fatal error RPT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " COR_ERR_RPT_EN ,Correctable error RPT enable" "Disabled,Enabled" line.long 0x04 "ERPTCAP_ERR_STS,Root Error Status Register" rbitfld.long 0x04 27.--31. " ADV_ERR_INTR_MSG_NUM ,Base and MSI message data offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" eventfld.long 0x04 6. " FATAL_RCVD ,Fatal uncorrectable error messages" "Not received,Received" textline " " eventfld.long 0x04 5. " NONFATAL_RCVD ,Non-fatal uncorrectable error messages" "Not received,Received" eventfld.long 0x04 4. " FIRST_FATAL_RCVD ,First uncorrectable error message" "Not received,Received" textline " " eventfld.long 0x04 3. " MULT_UNCOR_RCVD ,Error is received and UNCOR_RCVD is already set" "False,True" eventfld.long 0x04 2. " STS_UNCOR_RCVD ,Error message" "Not received,Received" textline " " eventfld.long 0x04 1. " MULT_COR_RCVD ,Correctable error message is received and COR_RCVD is already set" "False,True" eventfld.long 0x04 0. " COR_RCVD ,Correctable error" "Not received,Received" line.long 0x08 "ERPTCAP_ERR_ID,Error Source Identification Register" hexmask.long.word 0x08 16.--31. 1. " ERR_COR ,Requestor ID of first correctable error in root error status register " hexmask.long.word 0x08 0.--15. 1. " ERR_UNCOR ,Requestor ID of first uncorrectable error in root error status register " textline " " tree.end width 20. sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) tree "PCI L1 PM Substate Capability Registers" rgroup.long 0x140++0x07 line.long 0x00 "EXT_CAP,Extended Capability Header Register" hexmask.long.word 0x00 20.--31. 0x10 " EXT_CAP_NEXT_CAP ,Offset to the next PCI express capability structure" bitfld.long 0x00 16.--19. " EXT_CAP_VERSION ,PCI-SIG defined version number that indicates the version of the capability structure present" ",L1_SUBSTATES,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " EXT_CAP_ID ,PCI-SIG defined ID number that indicates the nature and format of the extended capability" line.long 0x04 "CAP,Capability Register" bitfld.long 0x04 19.--23. " CAP_T_PWRON_VALUE ,Time (in us) that this Port requires the port on the opposite side of the link to wait" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--17. " CAP_T_PWRON_SCALE ,Specifies the scale used for this port" "2 us,10 us,100 us,?..." textline " " hexmask.long.byte 0x04 8.--15. 1. " CAP_CM_RESTORE_TIME ,Time (in us) required for this port to re-establish common mode" bitfld.long 0x04 4. " CAP_L1_PM_SUBSTATES_SUPPORTED ,L1 PM Substates is supported" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " CAP_ASPM_L1_1_SUPPORTED ,ASPM L1.1 is supported" "Disabled,Enabled" bitfld.long 0x04 2. " CAP_ASPM_L1_2_SUPPORTED ,ASPM L1.2 is is supported" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CAP_PCI_PM_L1_1_SUPPORTED ,PCI-PM L1.1 is supported" "Disabled,Enabled" bitfld.long 0x04 0. " CAP_PCI_PM_L1_2_SUPPORTED ,PCI-PM L1.2 is supported" "Disabled,Enabled" group.long 0x148++0x07 line.long 0x00 "CTRL1,Control 1 Register" bitfld.long 0x00 29.--31. " LTR_L1_2_THRES_SCALE ,Scale for value contained within the LTR_L1.2_THRESHOLD_Value" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 16.--25. 1. " LTR1_2_THRESH_VAL ,Threshold value" textline " " hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME ,Restore time" bitfld.long 0x00 3. " ASPM_L1_1_EN ,ASPM L1.1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ASPM_L1_2_EN ,ASPM L1.2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " PCIPM_L1_1_EN ,PCIPM L1.1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PCIPM_L1_2_EN ,PCIPM L1.2 enable" "Disabled,Enabled" line.long 0x04 "CTRL2,Control 2 Register" bitfld.long 0x04 3.--7. " T_PWRON_VALUE ,Minimum amount of time (in us) that the Port must wait in L1.2.Exit after sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--1. " T_PWRON_SCALE ,Scale used for the port T_POWER_ON Valuse field in the L1 PM Substates Capabilities register" "2 us,10 us,100 us,?..." tree.end endif tree "NVIDIA Private Registers" width 20. group.long 0x494++0x03 line.long 0x00 "PRIV_XP_DL_0,Various Configurable Registers In The Data Link layer" hexmask.long.word 0x00 19.--29. 1. " GEN2_REPLAY_TIMER_LIMIT ,Replay timer limit" hexmask.long.word 0x00 10.--18. 1. " GEN2_ACK_TIMER_LIMIT ,ACK timer limit" textline " " hexmask.long.word 0x00 1.--9. 1. " GEN2_UPDATE_FC_THRESHOLD ,Update FC frequency" bitfld.long 0x00 0. " GEN2_DL_TIMERS_DISABLE ,Enables the Gen2 DL timer settings" "No,Yes" textline " " width 34. sif (cpuis("TEGRAX1")) rgroup.long 0xC10++0x0F line.long 0x00 "T_PCIE2_RP_LTR_REP_VAL,T_PCIE2_RP_LTR_REP_VAL" hexmask.long.word 0x00 16.--31. 1. " T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP ,T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP" textline " " hexmask.long.word 0x00 0.--15. 1. " T_PCIE2_RP_LTR_REP_VAL_SNOOP ,T_PCIE2_RP_LTR_REP_VAL_SNOOP" line.long 0x04 "T_PCIE2_RP_L1_1_ENTRY_COUNT,T_PCIE2_RP_L1_1_ENTRY_COUNT" bitfld.long 0x04 31. " T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET ,T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x04 30. " T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE" line.long 0x08 "T_PCIE2_RP_L1_2_ENTRY_COUNT,T_PCIE2_RP_L1_2_ENTRY_COUNT" bitfld.long 0x08 31. " T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET ,T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x08 30. " T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x08 0.--15. 1. " T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE" line.long 0x0C "T_PCIE2_RP_L1_2_ABORT_COUNT,T_PCIE2_RP_L1_2_ABORT_COUNT" bitfld.long 0x0C 31. " T_PCIE2_RP_L1_2_ABORT_COUNT_RESET ,T_PCIE2_RP_L1_2_ABORT_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x0C 30. " T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x0C 0.--15. 1. " T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE ,0 T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE" textline " " elif cpuis("TEGRAX2") width 27. group.long 0xC00++0x0F line.long 0x00 "L1_PM_SUBSTATES_CYA,L1 PM Substates CYA Register" bitfld.long 0x00 26. " REFCLK_ON_WITH_PAD_PLL_LOCK ,Refclk on with pad PLL lock" "Not locked,Locked" bitfld.long 0x00 25. " REFCLK_ON_WITH_PLLE_LOCK ,Refclk on with PLLE lock" "Not locked,Locked" textline " " bitfld.long 0x00 24. " HIDE_CAP ,Hide capability of L1 PM substates" "Not hidden,Hidden" bitfld.long 0x00 19.--23. " T_PWRON_VALUE ,Time (in us) that this port requires the port on the opposite side of link to wait in L1.2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--17. " T_PWRON_SCALE ,Specifies the scale used for the port T_POWER_ON value field in the L1 PM substates capabilities register" "2 us,10 us,100 us,?..." hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME ,Time (in us) required for this port to re-establish common mode as described in table in the L1 PM substates ECN" textline " " bitfld.long 0x00 4. " L1_PM_SUBSTATES ,L1 PM Substates support enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASPM_L1_1 ,ASPM L1.1 support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ASPM_L1_2 ,ASPM L1.2 support enable" "Disabled,Enabled" bitfld.long 0x00 1. " PCI_PM_L1_1 ,PCI-PM L1.1 support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PCI_PM_L1_2 ,PCI-PM L1.2 support enable" "Disabled,Enabled" line.long 0x04 "L1_PM_SUBSTATES_1_CYA,L1 PM Substates 1 CYA Register" bitfld.long 0x04 22. " RX_TERM_EN_IN_L1_2 ,Receiver PAD termination when in L1.2 enable" "Disabled,Enabled" hexmask.long.word 0x04 13.--21. 1. " CHK_CLKREQ_ASSERTED_DLY ,Amount of time the DUT waits in L1.2" textline " " hexmask.long.word 0x04 0.--12. 1. " T_PWR_OFF_DLY ,T POWER ON DELY diagnostic amount of time the DUT waits in L1.2_entry before it enters L1.2_idle" line.long 0x08 "L1_PM_SUBSTATES_2_CYA,L1 PM Substates 2 CYA Register" bitfld.long 0x08 21.--24. " MICROSECOND_COMP ,Compensation value of the crystal oscillator frequency in microsecond tick generator used for REFCLK_ON time and common-mode turn ON time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 13.--20. 1. " MICROSECOND ,Microsecond diagnostic bit number of clocks in a microsecond in clk25m" textline " " hexmask.long.word 0x08 0.--12. 1. " T_L1_2_DLY ,T L1.2 delay diagnostic" line.long 0x0C "L1_PM_SUBSTATES_3_CYA,L1 PM Substates 3 CYA Register" hexmask.long.word 0x0C 18.--30. 1. " L11_T_REFCLK_ON ,Number of microseconds the port must wait in L1.1 to enable refclk after clkreq# has been asserted" bitfld.long 0x0C 17. " L11_T_REFCLK_ON_ENABLE ,Refclk clock timer logic when in L1.1 after seeing deassertion of clkreq# enable" "Disabled,Enabled" textline " " hexmask.long.word 0x0C 4.--16. 1. " L12_T_REFCLK_ON ,Number of microseconds the port must wait to enable refclk after clkreq# has been asserted" bitfld.long 0x0C 3. " PCIPM_L1_2 ,PCIMPM L1.2 functionality enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " ASPM_L1_2 ,ASPM L1.2 functionality enable" "Disabled,Enabled" bitfld.long 0x0C 1. " PCIPM_L1_1 ,PCIPM L1.1 functionality enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " ASPM_L1_1 ,ASPM L1.1 functionality enable" "Disabled,Enabled" rgroup.long 0xC10++0x03 line.long 0x00 "LTR_REP_VAL,LTR Reported Value Register" hexmask.long.word 0x00 16.--31. 1. " NO_SNOOP ,Value for no snoop" hexmask.long.word 0x00 0.--15. 1. " SNOOP ,Value for snoop" group.long 0xC14++0x17 line.long 0x00 "L1_1_ENTRY_COUNT,L1.1 Entry Count Register" bitfld.long 0x00 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x00 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x00 0.--15. 1. " VALUE ,Number of times the link entered the L1.1 state" line.long 0x04 "L1_2_ENTRY_COUNT,L1.2 Entry Count Register" bitfld.long 0x04 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x04 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x04 0.--15. 1. " VALUE ,Number of times the link entered L1.2 ENTRY state" line.long 0x08 "L1_2_ABORT_COUNT,L1.2 Abort Count Register" bitfld.long 0x08 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x08 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x08 0.--15. 1. " VALUE ,Number of times the link entered the L1.2 ENTRY state" line.long 0x0C "LTR_OVERRIDE,LTR Override Register" hexmask.long.word 0x0C 16.--31. 1. " NO_SNOOP ,LTR override no snoop value" hexmask.long.word 0x0C 0.--15. 1. " SNOOP ,LTR override snoop value" line.long 0x10 "L1SS_SPARE,L1SS Spare Register" hexmask.long.word 0x10 18.--31. 1. " SPARE2 ,Spare 2" eventfld.long 0x10 17. " LTR_MSG_RCV_STS ,LTR MSG RCV STS" "No effect,Cleared" textline " " bitfld.long 0x10 16. " LTR_MSG_INT_EN ,LTR MSG INT enable" "Disabled,Enabled" hexmask.long.word 0x10 2.--15. 1. " SPARE1 ,Spare 1" textline " " bitfld.long 0x10 1. " LTR_OVERRIDE_NO_SNOOP_EN ,LTR override no snoop enable" "Disabled,Enabled" bitfld.long 0x10 0. " LTR_OVERRIDE_SNOOP_EN ,LTR override snoop enable" "Disabled,Enabled" line.long 0x14 "SLCG_OVERRIDE_DIS_SLCG,SLCG Override Disable SLCG Register" bitfld.long 0x14 22. " PRI_CLK ,PRI CLK enable" "Disabled,Enabled" bitfld.long 0x14 21. " TMS0_UFPCI_CLK ,TMS0 UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 20. " TMS0_DFPCI_CLK ,TMS0 DFPCI CLK enable" "Disabled,Enabled" bitfld.long 0x14 19. " TMS0C2_XTXCLK1X ,TMS0C2 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 18. " TMS0C2_XCLK ,TMS0C2 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 17. " TMS0C1_XTXCLK1X ,TMS0C1 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " TMS0C1_XCLK ,TMS0C1 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 15. " TMS0C0_XTXCLK1X ,TMS0C0 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " TMS0C0_XCLK ,TMS0C0 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 13. " TMSC0_XCLK ,TMSC0 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " T0C2_PCA_XCLK ,T0C2 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 11. " T0C2_PCA_UFPCI_CLK ,T0C2 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " T0C1_PCA_XCLK ,T0C1 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 9. " T0C1_PCA_UFPCI_CLK ,T0C1 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " T0C0_PCA_XCLK ,T0C0 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 7. " T0C0_PCA_UFPCI_CLK ,T0C0 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 6. " GRP2_XTXCLK1X ,GRP2 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 5. " GRP2_XCLK ,GRP2 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " GRP1_XTXCLK1X ,GRP1 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 3. " GRP1_XCLK ,GRP1 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " GRP0_XTXCLK1X ,GRP0 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 1. " GRP0_XCLK ,GRP0 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " CLK25M ,CLK25M enable" "Disabled,Enabled" group.long 0xD00++0x1B line.long 0x00 "DBG0,Debug 0" line.long 0x04 "DBG1,Debug 1" line.long 0x08 "DBG2,Debug 2" line.long 0x0C "DBG3,Debug 3" line.long 0x10 "DBG4,Debug 4" line.long 0x14 "DBG5,Debug 5" line.long 0x18 "DBG6,Debug 6" bitfld.long 0x18 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x18 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " hexmask.long 0x18 0.--29. 1. " CTL ,Control" rgroup.long 0xD1C++0x03 line.long 0x00 "DBG_RD_BACK_LO,Debug RD Back LO" group.long 0xD20++0x1B line.long 0x00 "DBG_RD_BACK_HI,Debug RD Back HI" line.long 0x04 "LANE_DBG0,Lane Debug 0" line.long 0x08 "LANE_DBG1,Lane Debug 1" line.long 0x0C "LANE_DBG2,Lane Debug 2" line.long 0x10 "LANE_DBG3,Lane Debug 3" line.long 0x14 "LANE_DBG4,Lane Debug 4" line.long 0x18 "LANE_DBG5,Lane Debug 5" bitfld.long 0x18 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x18 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " hexmask.long 0x18 0.--29. 1. " CTL ,Control" rgroup.long 0xD3C++0x07 line.long 0x00 "LANE_DBG_RD_BACK_LO_VALUE,Lane Debug RD Back LO Value" line.long 0x04 "LANE_DBG_RD_BACK_HI_VALUE,Lane Debug RD Back HI Value" group.long 0xD44++0x0B line.long 0x00 "LINK_DBG0,Link Debug 0" line.long 0x04 "LINK_DBG1,Link Debug 1" line.long 0x08 "LINK_DBG2,Link Debug 2" bitfld.long 0x08 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x08 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " CTL ,Control" "0,1" rgroup.long 0xD50++0x07 line.long 0x00 "LINK_DBG_RD_BACK_LO_VALUE,Link Debug RD Back LO Value" line.long 0x04 "LINK_DBG_RD_BACK_HI_VALUE,Link Debug RD Back HI Value" endif width 27. group.long 0xD5C++0x03 line.long 0x00 "PIPE_CTL,Controls (enabling /disabling) the pipelines added to meet timing on various interfaces" bitfld.long 0x00 8. " UFA2WRR_PWTOP ,UFA2WRR PWTOP enable" "Disabled,Enabled" bitfld.long 0x00 7. " UBFI2DFI_P2P ,UBFI2DFI P2P enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TXBA2DFI_WR ,TXBA2DFI WR enable" "Disabled,Enabled" bitfld.long 0x00 5. " CMDQ2UFARB ,CMDQ2UFARB enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " UBFI2DFI_NTT ,UBFI2DFI NTT enable" "Disabled,Enabled" bitfld.long 0x00 3. " PCA ,PCA enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DFIREQ ,DFIREQ enable" "Disabled,Enabled" bitfld.long 0x00 1. " DFIRSP ,DFIRSP enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DFI2UBFI ,DFI2UBFI enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0xD60++0x07 line.long 0x00 "XP_BUST_TRIG1,XP Bust Trigger 1" bitfld.long 0x00 25. " L02RCVRY_L0S_FTS_TO ,Allows bus tracer trigger when getting FTS timeout in L0.0s" "Not allowed,Allowed" bitfld.long 0x00 24. " L02RCVRY_TS_DET ,Allows bus tracer trigger when receiving TS in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 23. " L02RCVRY_SURPRISE_EIDLE ,Allows bus tracer trigger when seeing surprise eidle in L0" "Not allowed,Allowed" bitfld.long 0x00 22. " L02RCVRY_8B10B_ERR ,Allows bus tracer trigger when receiving 8b10b error in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 21. " L02RCVRY_ADVERTISEDRATECHANGE ,Allows bus tracer trigger at advertised rate change in L0" "Not allowed,Allowed" bitfld.long 0x00 20. " L02RCVRY_DL_RETRAIN ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " L02RCVRY_LPBK ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed" bitfld.long 0x00 18. " L02RCVRY_SPEEDCHANGE ,Allows bus tracer trigger at speed change in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 17. " L02RCVRY_WIDTHCHANGE ,Allows bus tracer trigger at width change in L0" "Not allowed,Allowed" bitfld.long 0x00 16. " L02RCVRY_LINK_RETRAIN ,Allows bus tracer trigger at link retraining in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 13.--15. " CUST_TRANSITION_TO_MINOR_ST ,Mirror TO state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-" textline " " bitfld.long 0x00 10.--12. " CUST_TRANSITION_FROM_MINOR_ST ,Mirror FROM state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-" textline " " bitfld.long 0x00 6.--9. " CUST_TRANSITION_TO_MAJOR_ST ,Major TO state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..." bitfld.long 0x00 2.--5. " CUST_TRANSITION_FROM_MAJOR_ST ,Major FROM state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..." textline " " bitfld.long 0x00 1. " RX_EN ,Bus tracer trigger receive enable" "Disabled,Enabled" bitfld.long 0x00 0. " TX_EN ,Bus tracer trigger receive enable" "Disabled,Enabled" line.long 0x04 "XP_BUST_TRIG2,XP BUST Trigger 2" bitfld.long 0x04 31. " REPLAY_TIMER_EXPIRED_ERR ,REPLA timer expired error" "No error,Error" bitfld.long 0x04 30. " SA_ERR ,SA error" "No error,Error" textline " " bitfld.long 0x04 29. " DESKEW_ERR ,DESKEW error" "No error,Error" bitfld.long 0x04 28. " TRAINING_ERR ,Training error" "No error,Error" textline " " bitfld.long 0x04 27. " DPLLP_CRC_ERR ,DPLLP CRC error" "No error,Error" bitfld.long 0x04 26. " 8B10B_ERR ,8B10B error" "No error,Error" textline " " bitfld.long 0x04 25. " REPLAY_STARTED_ERR ,REPLAY started error" "No error,Error" bitfld.long 0x04 24. " ROLLOVER_ERR ,ROLLOVER error" "No error,Error" textline " " bitfld.long 0x04 23. " PWH_UPDATE_FC_ERR ,PWH update FC error" "No error,Error" bitfld.long 0x04 22. " PWH_TOO_MANY_CREDITS_ERR ,PWH too many credits error" "No error,Error" textline " " bitfld.long 0x04 21. " PWD_UPDATE_FC_ERR ,PWD update FC error" "No error,Error" bitfld.long 0x04 20. " PWD_TOO_MANY_CREDITS_ERR ,PWD too many credits error" "No error,Error" textline " " bitfld.long 0x04 19. " NPH_UPDATE_FC_ERR ,NPH update FC error" "No error,Error" bitfld.long 0x04 18. " NPH_TOO_MANY_CREDITS_ERR ,NPH too many credits error" "No error,Error" textline " " bitfld.long 0x04 17. " NPD_UPDATE_FC_ERR ,NPD update FC error" "No error,Error" bitfld.long 0x04 16. " NPD_TOO_MANY_CREDITS_ERR ,NPD too many credits error" "No error,Error" textline " " bitfld.long 0x04 15. " CH_UPDATE_FC_ERR ,CH update FC error" "No error,Error" bitfld.long 0x04 14. " CH_TOO_MANY_CREDITS_ERR ,CH too many credits error" "No error,Error" textline " " bitfld.long 0x04 13. " CD_UPDATE_FC_ERR ,CD update FC error" "No error,Error" bitfld.long 0x04 12. " CD_TOO_MANY_CREDITS_ERR ,CD too many credits error" "No error,Error" textline " " bitfld.long 0x04 11. " REC_OVFL_ISOPW_DATA_ERR ,REC overflow ISOPW data error" "No error,Error" bitfld.long 0x04 10. " REC_OVFL_ISOPW_HDR_ERR ,REC overflow ISOPW HDR error" "No error,Error" textline " " bitfld.long 0x04 9. " REC_OVFL_ISONP_HDR_ERR ,REC overflow ISONP HDR error" "No error,Error" bitfld.long 0x04 8. " REC_OVFL_CPL_DATA_ERR ,REC overflow CPL data error" "No error,Error" textline " " bitfld.long 0x04 7. " REC_OVFL_PW_DATA_ERR ,REC overflow PW data error" "No error,Error" bitfld.long 0x04 6. " REC_OVFL_NP_DATA_ERR ,REC overflow NP data error" "No error,Error" textline " " bitfld.long 0x04 5. " REC_OVFL_CPL_HDR_ERR ,REC overflow CPL HDR error" "No error,Error" bitfld.long 0x04 4. " REC_OVFL_PW_HDR_ERR ,REC overflow PW HDR error" "No error,Error" textline " " bitfld.long 0x04 3. " REC_OVFL_NP_HDR_ERR ,REC_OVFL_NP_HDR_ERR error" "No error,Error" bitfld.long 0x04 2. " FRAMING_ERR ,Framing error" "No error,Error" textline " " bitfld.long 0x04 1. " SEQ_ERR ,SEQ error" "No error,Error" bitfld.long 0x04 0. " LCRC_ERR ,LCRC error" "No error,Error" rgroup.long 0xD68++0x03 line.long 0x00 "XP_DEBUG,XP Debug" bitfld.long 0x00 0.--1. " RX_CAL_STATUS ,Receiver CAL status" "Idle,Pending,Done,Disabled" endif tree.end tree "Vendor-Defined Registers" width 20. group.long 0xE00++0x2B line.long 0x00 "RX_HDR_LIMIT,RX HDR Limit" hexmask.long.byte 0x00 16.--23. 1. " CPL ,Completion header buffer size" hexmask.long.byte 0x00 8.--15. 1. " PW ,Posted write header buffer size" textline " " hexmask.long.byte 0x00 0.--7. 1. " NP ,Non-posted header buffer size" line.long 0x04 "RX_DATA_LIMIT,RX Data Limit" hexmask.long.byte 0x04 20.--27. 1. " CPL ,Completion data buffer size" hexmask.long.word 0x04 8.--19. 1. " PW ,Posted write data buffer size" textline " " hexmask.long.byte 0x04 0.--7. 1. " NP ,Non-posted write header buffer size" line.long 0x08 "TX_HDR_LIMIT,TX HDR Limit" sif (cpuis("TEGRAX2")) hexmask.long.byte 0x08 24.--31. 1. " NPT ,TX HDR limit NPT" textline " " hexmask.long.byte 0x08 16.--23. 1. " CPL ,Size of the downstream completions header buffer" else hexmask.long.byte 0x08 16.--23. 1. " NP ,Size of the downstream non posted header buffer" endif hexmask.long.byte 0x08 8.--15. 1. " PW ,Size of the downstream posted writes header buffer" textline " " hexmask.long.byte 0x08 0.--7. 1. " NP ,Size of the downstream non posted header buffer" line.long 0x0C "TX_DATA_LIMIT,TX Data Limit" hexmask.long.byte 0x0C 8.--15. 1. " PW ,Size of the downstream Posted Writes Data Buffer" hexmask.long.byte 0x0C 0.--7. 1. " NP ,Size of the downstream Non Posted Data Buffer" line.long 0x10 "UFPCI,Upstream FPCI Control Register" bitfld.long 0x10 23.--27. " ISO_WEIGHT ,ISO weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 22. " ISO_CONTROL_ENABLE ,ISO control enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " ISOPW2HPISO ,Convert posted writes" "Disabled,Enabled" bitfld.long 0x10 20. " ISONP2HPISO ,Convert non-posted reads" "Disabled,Enabled" textline " " hexmask.long.byte 0x10 12.--19. 1. " REQ_PEND_PERIOD ,Timers are reset when they hit the value" bitfld.long 0x10 10.--11. " WRR_GRANT_BURST ,Time for arbitration within a TMS" "0,1,2,3" textline " " bitfld.long 0x10 5.--9. " PW_PRI_OVR_COUNT ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. " PW_STARV_COUNT ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "MISC0,Miscellaneous Register 0" bitfld.long 0x14 31. " SHORT_RXL_TIMER ,Completion timeout feature in RXL test" "Disabled,Enabled" bitfld.long 0x14 30. " P2P_SMALL_ISA_HOLE ,P2P settings control" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " P2P_F ,Transactions (64'hF_XXXX)" "0,1" bitfld.long 0x14 28. " P2P_E ,Transactions (64'hE_XXXX)" "0,1" textline " " bitfld.long 0x14 27. " P2P_D ,Transactions (64'hD_XXXX)" "0,1" bitfld.long 0x14 26. " P2P_C ,Transactions (64'hC_XXXX)" "0,1" textline " " bitfld.long 0x14 25. " P2P_B ,Transactions (64'hB_XXXX)" "0,1" bitfld.long 0x14 24. " P2P_A ,Transactions (64'hA_XXXX)" "0,1" textline " " bitfld.long 0x14 23. " NISONC2HPISO ,Upgrade to HPISO Read" "Disabled,Enabled" bitfld.long 0x14 21. " AUTO_XCLK_FREQ_EN ,XCLK frequency dynamic switch" "Disabled,Enabled" textline " " bitfld.long 0x14 20. " RXL_CLEAR_DROP ,Receiver DROP ALL status clear" "Disabled,Enabled" sif (cpuis("TEGRAX2")) hexmask.long.word 0x14 4.--19. 1. " ISO_PW_ENABLE[1] ,Enables ISO PW [1] transactions for packets with TC >= TC2ISOMAP" endif textline " " bitfld.long 0x14 3. " ISO_PW_ENABLE ,Enables ISO PW transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " ISO_NP_ENABLE ,Enables ISO NP transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled" bitfld.long 0x14 1. " NATIVE_P2P_ENABLE ,Enables native peer2peer transactions" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " ENABLE_CLUMPING ,Enables unitid clumping" "Disabled,Enabled" line.long 0x18 "TXBA0,TXBA0 Register" hexmask.long.word 0x18 16.--31. 1. " REPLAY_TIMER_EXPIRY ,Replay timer expiry" bitfld.long 0x18 12. " USE_REPLAY_TIMER_OFFSET ,Use replay timer offset" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " CMPL_MERGE_UPTO_64DW ,Merge completions upto 64DW payloads" "Disabled,Enabled" bitfld.long 0x18 10. " CMPL_MERGE_UPTO_32DW ,Merge completions upto 32DW payloads" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " CMPL_MERGE_DISABLE ,Disables completion merging" "No,Yes" hexmask.long.word 0x18 0.--8. 1. " REPLAY_BUF_LIMIT ,Replay buffer limit" line.long 0x1C "TXBA1,TXBA1 Register" sif (cpuis("TEGRAX2")) hexmask.long.word 0x1C 8.--16. 1. " MERGE_THRESHOLD ,Merge threshold" else hexmask.long.byte 0x1C 8.--15. 1. " MERGE_THRESHOLD ,Merge threshold" textfld " " endif bitfld.long 0x1C 4.--7. " CM_OVER_PW_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rbitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x20 "FORCEFC,FC Priority Flip Threshold Register" hexmask.long.byte 0x20 24.--31. 1. " NPD_UNRET_THRESH ,NPD UNRET THRESH" hexmask.long.byte 0x20 16.--23. 1. " NPH_UNRET_THRESH ,NPH UNRET THRESH" textline " " hexmask.long.byte 0x20 8.--15. 1. " PWD_UNRET_THRESH ,PWD UNRET THRESH" hexmask.long.byte 0x20 0.--7. 1. " PWH_UNRET_THRESH ,PWH UNRET THRESH" line.long 0x24 "TIMEOUT0,LINK LTSSM Timeout 0 Register" hexmask.long.byte 0x24 24.--31. 1. " PAD_SPDCHNG_GEN2 ,Time to wait for pads to change speed from Gen1 to Gen2" hexmask.long.word 0x24 8.--23. 1. " PAD_PWRUP_CM ,Time to power up pads (no common-mode voltage during power down)" textline " " hexmask.long.byte 0x24 0.--7. 1. " PAD_PWRUP ,Time to power up pads (common-mode voltage during power down)" line.long 0x28 "TIMEOUT1,LINK LTSSM Timeout 1. Register" hexmask.long.byte 0x28 24.--31. 1. " RCVRY_SPD_UNSUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change" hexmask.long.byte 0x28 16.--23. 1. " RCVRY_SPD_SUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change" textline " " hexmask.long.word 0x28 0.--15. 1. " PAD_SPDCHNG_GEN1 ,Wait time for pads to change speed from Gen2 to Gen1" rgroup.long 0xE34++0x03 line.long 0x00 "PRBS,PRBS Results Register" hexmask.long.word 0x00 16.--31. 1. " LOCKED ,Locks lanes onto the incoming PRBS pattern" hexmask.long.word 0x00 0.--15. 1. " ERR_COUNT_OVERFLOW ,Number of bit mismatches during PRBS run" group.long 0xE38++0x03 line.long 0x00 "PRBS_ERR,PRBS Results Register" hexmask.long.word 0x00 16.--31. 1. " COUNT ,Number of bit errors detected in the incoming PRBS stream" bitfld.long 0x00 0.--3. " SELECT ,Selects which lane number's Error Count shows up in the ERR_COUNT register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " width 22. group.long 0xE3C++0x27 line.long 0x00 "EIDLE_INFER_TO_0,EIDLE Inference Timeout Register 0" hexmask.long.word 0x00 16.--31. 1. " RCVRCFG_SUC_SPEED ,Infer E-Idle after this amount of time while in recovery" hexmask.long.word 0x00 0.--15. 1. " L0_LPBK ,Infer E-Idle after this amount of time while in L0 or loopback" line.long 0x04 "EIDLE_INFER_TO_1,EIDLE Inference Timeout Register 1" hexmask.long.word 0x04 16.--31. 1. " UNSUC_SPEED_GEN2 ,Infer E-Idle after this amount of time while in recovery" hexmask.long.word 0x04 0.--15. 1. " UNSUC_SPEED_GEN1 ,Infer E-Idle after this amount of time while in recovery" line.long 0x08 "LTSSM_DBGREG,LTSSM Debug Register" eventfld.long 0x08 31. " LINKFSM[31] ,LINKFSM31" "Init,Clear" eventfld.long 0x08 30. " [30] ,LINKFSM30" "Init,Clear" textline " " eventfld.long 0x08 29. " [29] ,LINKFSM29" "Init,Clear" eventfld.long 0x08 28. " [28] ,LINKFSM28" "Init,Clear" textline " " eventfld.long 0x08 27. " [27] ,LINKFSM27" "Init,Clear" eventfld.long 0x08 26. " [26] ,LINKFSM26" "Init,Clear" textline " " eventfld.long 0x08 25. " [25] ,LINKFSM25" "Init,Clear" eventfld.long 0x08 24. " [24] ,LINKFSM24" "Init,Clear" textline " " eventfld.long 0x08 23. " [23] ,LINKFSM23" "Init,Clear" eventfld.long 0x08 22. " [22] ,LINKFSM22" "Init,Clear" textline " " eventfld.long 0x08 21. " [21] ,LINKFSM21" "Init,Clear" eventfld.long 0x08 20. " [20] ,LINKFSM20" "Init,Clear" textline " " eventfld.long 0x08 19. " [19] ,LINKFSM19" "Init,Clear" eventfld.long 0x08 18. " [18] ,LINKFSM18" "Init,Clear" textline " " eventfld.long 0x08 17. " [17] ,LINKFSM17" "Init,Clear" eventfld.long 0x08 16. " [16] ,LINKFSM16" "Init,Clear" textline " " eventfld.long 0x08 15. " [15] ,LINKFSM15" "Init,Clear" eventfld.long 0x08 14. " [14] ,LINKFSM14" "Init,Clear" textline " " eventfld.long 0x08 13. " [13] ,LINKFSM13" "Init,Clear" eventfld.long 0x08 12. " [12] ,LINKFSM12" "Init,Clear" textline " " eventfld.long 0x08 11. " [11] ,LINKFSM11" "Init,Clear" eventfld.long 0x08 10. " [10] ,LINKFSM10" "Init,Clear" textline " " eventfld.long 0x08 9. " [9] ,LINKFSM9" "Init,Clear" eventfld.long 0x08 8. " [8] ,LINKFSM8" "Init,Clear" textline " " eventfld.long 0x08 7. " [7] ,LINKFSM7" "Init,Clear" eventfld.long 0x08 6. " [6] ,LINKFSM6" "Init,Clear" textline " " eventfld.long 0x08 5. " [5] ,LINKFSM5" "Init,Clear" eventfld.long 0x08 4. " [4] ,LINKFSM4" "Init,Clear" textline " " eventfld.long 0x08 3. " [3] ,LINKFSM3" "Init,Clear" eventfld.long 0x08 2. " [2] ,LINKFSM2" "Init,Clear" textline " " eventfld.long 0x08 1. " [1] ,LINKFSM1" "Init,Clear" eventfld.long 0x08 0. " [0] ,LINKFSM0" "Init,Clear" line.long 0x0C "PRIV_ERRSTS,Detailed Private Error Status Register" eventfld.long 0x0C 31. " REPLAY_TIMER_EXPIRED_ERR ,Replay timer expired error" "No error,Error" eventfld.long 0x0C 30. " SA_ERR ,SA error" "No error,Error" textline " " eventfld.long 0x0C 29. " DESKEW_ERR ,DESKEW error" "No error,Error" eventfld.long 0x0C 28. " TRAINING_ERR ,Training error" "No error,Error" textline " " eventfld.long 0x0C 27. " DLLP_CRC_ERR ,DLLP CRC error" "No error,Error" eventfld.long 0x0C 26. " 8B10B_ERR ,8B10B error" "No error,Error" textline " " eventfld.long 0x0C 25. " REPLAY_STARTED_ERR ,Replay started error" "No error,Error" eventfld.long 0x0C 24. " REPLAY_ROLLOVER_ERR ,Replay rollover error" "No error,Error" textline " " eventfld.long 0x0C 23. " PWH_UPDATE_FC_ERR ,PWH update FC error" "No error,Error" eventfld.long 0x0C 22. " PWH_TOO_MANY_CREDITS_ERR ,PWH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 21. " PWD_UPDATE_FC_ERR ,PWD update FC error" "No error,Error" eventfld.long 0x0C 20. " PWD_TOO_MANY_CREDITS_ERR ,PWD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 19. " NPH_UPDATE_FC_ERR ,NPH update FC error" "No error,Error" eventfld.long 0x0C 18. " NPH_TOO_MANY_CREDITS_ERR ,NPH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 17. " NPD_UPDATE_FC_ERR ,NPD update FC error" "No error,Error" eventfld.long 0x0C 16. " NPD_TOO_MANY_CREDITS_ERR ,NPD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 15. " CH_UPDATE_FC_ERR ,CH update FC error" "No error,Error" eventfld.long 0x0C 14. " CH_TOO_MANY_CREDITS_ERR ,CH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 13. " CD_UPDATE_FC_ERR ,CD update FC error" "No error,Error" eventfld.long 0x0C 12. " CD_TOO_MANY_CREDITS_ERR ,CD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 11. " REC_OVFL_ISOPW_DATA_ERR ,REC overflow ISOPW data error" "No error,Error" eventfld.long 0x0C 10. " REC_OVFL_ISOPW_HDR_ERR ,REC overflow ISOPW HDR error" "No error,Error" textline " " eventfld.long 0x0C 9. " REC_OVFL_ISONP_HDR_ERR ,REC overflow ISONP HDR error" "No error,Error" eventfld.long 0x0C 8. " REC_OVFL_CPL_DATA_ERR ,REC overflow CPL data error" "No error,Error" textline " " eventfld.long 0x0C 7. " REC_OVFL_PW_DATA_ERR ,REC overflow PW data error" "No error,Error" eventfld.long 0x0C 6. " REC_OVFL_NP_DATA_ERR ,REC overflow NP data error" "No error,Error" textline " " eventfld.long 0x0C 5. " REC_OVFL_CPL_HDR_ERR ,REC overflow CPL HDR error" "No error,Error" eventfld.long 0x0C 4. " REC_OVFL_PW_HDR_ERR ,REC overflow PW HDR error" "No error,Error" textline " " eventfld.long 0x0C 3. " REC_OVFL_NP_HDR_ERR ,REC overflow NP HDR error" "No error,Error" eventfld.long 0x0C 2. " FRAMING_ERR ,Framing error" "No error,Error" textline " " eventfld.long 0x0C 1. " SEQ_ERR ,SEQ error" "No error,Error" eventfld.long 0x0C 0. " LCRC_ERR ,LCRC error" "No error,Error" line.long 0x10 "PRIV_ERRMSK,Detailed Private Error Mask Register" bitfld.long 0x10 31. " REPLAY_TIMER_EXPIRED_ERR_EN ,Replay timer expired error enable" "Disabled,Enabled" bitfld.long 0x10 30. " SA_ERR_EN ,SA error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " DLLP_CRC_ERR_EN ,DLLP CRC error enable" "Disabled,Enabled" bitfld.long 0x10 26. " 8B10B_ERR_EN ,8B10B error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 24. " REPLAY_ROLLOVER_ERR_EN ,Replay rollover error enable" "Disabled,Enabled" bitfld.long 0x10 23. " PWH_UPDATE_FC_ERR_EN ,PWH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " PWD_TOO_MANY_CREDITS_ERR_EN ,PWD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 21. " PWD_UPDATE_FC_ERR_EN ,PWD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 20. " PWD_TOO_MANY_CREDITS_ERR_EN ,PWD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 19. " NPH_UPDATE_FC_ERR_EN ,NPH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 18. " NPH_TOO_MANY_CREDITS_ERR_EN ,NPH too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 17. " NPD_UPDATE_FC_ERR_EN ,NPD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " NPD_TOO_MANY_CREDITS_ERR_EN ,NPD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 15. " CH_UPDATE_FC_ERR_EN ,CH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " CH_TOO_MANY_CREDITS_ERR_EN ,CH too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 13. " CD_UPDATE_FC_ERR_EN ,CD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 12. " CD_TOO_MANY_CREDITS_ERR_EN ,CD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 11. " DLL_PROTOCOL_ERR_EN ,DLL protocol error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " FRAMING_ERR_EN ,Framing error enable" "Disabled,Enabled" bitfld.long 0x10 1. " SEQ_ERR_EN ,SEQ error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " LCRC_ERR_EN ,LCRC error enable" "Disabled,Enabled" line.long 0x14 "LTSSM_TRACE_CONTROL,LTSSM Trace Control Register" bitfld.long 0x14 11.--13. " TRIG_PRX_LTSSM_MINOR ,Trigger PRX LTSSM minor" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. " TRIG_PTX_LTSSM_MINOR ,Trigger PTX LTSSM minor" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 4.--7. " TRIG_LTSSM_MAJOR ,Trigger LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 3. " TRIG_ON_EVENT ,Trigger on event" "Not triggered,Triggered" textline " " bitfld.long 0x14 2. " CLEAR_RAM ,Clear RAM" "Not cleared,Cleared" bitfld.long 0x14 1. " WRAP_EN ,Wrap enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " STORE_EN ,Store enable" "Disabled,Enabled" line.long 0x18 "LTSSM_TRACE_STATUS,LTSSM Trace Status Register" rbitfld.long 0x18 19.--21. " PRX_LTSSM_MINOR ,PRX LTSSM minor" "0,1,2,3,4,5,6,7" rbitfld.long 0x18 16.--18. " PTX_LTSSM_MINOR ,PTX LTSSM minor" "0,1,2,3,4,5,6,7" textline " " rbitfld.long 0x18 12.--15. " LTSSM_MAJOR ,LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x18 11. " READ_DATA_VALID ,Read data valid" "Invalid,Valid" textline " " bitfld.long 0x18 6.--10. " READ_ADDR ,Read address to LTSSM trace RAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 1.--5. " WRITE_PTR ,Current location of write pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rbitfld.long 0x18 0. " RAM_FULL ,All entries in RAM has been written" "Not full,Full" line.long 0x1C "PG,PCIe Power Gate Register" bitfld.long 0x1C 2. " RCVD_PME_TO_ACK_INTR_EN ,Generation of interrupt on reception of PME TO ACK TLP" "Disabled,Enabled" eventfld.long 0x1C 1. " RCVD_PME_TO_ACK ,Root port received a PME TO ACK TLP" "Init,Clear" textline " " bitfld.long 0x1C 0. " SEND_PME_TO_MSG ,Send a PME TO message downstream" "Idle,Send now" line.long 0x20 "VAR_RANGE0,PCIe Legacy I/O Decode Range Control Register 0" hexmask.long.word 0x20 18.--31. 0x04 " LIMIT ,Top address for the variable range positive decode addresses" hexmask.long.word 0x20 2.--15. 0x04 " BASE ,Base address for the variable range positive decode addresses" textline " " bitfld.long 0x20 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x24 "VAR_RANGE1,PCIe Legacy I/O Decode Range Control Register 1" hexmask.long.word 0x24 18.--31. 0x04 " LIMIT ,Top address for the variable range positive decode addresses" textline " " hexmask.long.word 0x24 2.--15. 0x04 " BASE ,Base address for the variable range positive decode addresses" bitfld.long 0x24 0. " ENABLE ,Enable" "Disabled,Enabled" sif (cpuis("TEGRAX1")) group.long 0xE80++0x1F line.long 0x00 "T_PCIE2_RP_ECTL_1_R1,T_PCIE2_RP_ECTL_1_R1" bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C ,T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--19. " T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C" "DEFAULT,1,2,3" textline " " bitfld.long 0x00 16.--17. " T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C" "DEFAULT,1,2,3" bitfld.long 0x00 12.--15. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "T_PCIE2_RP_ECTL_2_R1,T_PCIE2_RP_ECTL_1_R2" bitfld.long 0x04 18.--19. " T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C ,T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C" "DEFAULT,1,2,3" hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C ,T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C" line.long 0x08 "T_PCIE2_RP_ECTL_3_R1,T_PCIE2_RP_ECTL_3_R1" line.long 0x0C "T_PCIE2_RP_ECTL_4_R1,T_PCIE2_RP_ECTL_4_R1" hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C ,T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C" hexmask.long.byte 0x0C 0.--7. 1. " T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C ,T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C" line.long 0x10 "T_PCIE2_RP_ECTL_5_R1,T_PCIE2_RP_ECTL_5_R1" line.long 0x14 "T_PCIE2_RP_ECTL_6_R1,T_PCIE2_RP_ECTL_6_R1" line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1" bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xEA0++0x1B line.long 0x00 "T_PCIE2_RP_ECTL_1_R2,T_PCIE2_RP_ECTL_1_R2" bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C ,T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "T_PCIE2_RP_ECTL_2_R2,T_PCIE2_RP_ECTL_2_R2" hexmask.long.word 0x04 16.--31. 1. " T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C ,T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C" hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C ,T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C" line.long 0x08 "T_PCIE2_RP_ECTL_3_R2,T_PCIE2_RP_ECTL_3_R2" line.long 0x0C "T_PCIE2_RP_ECTL_4_R2,T_PCIE2_RP_ECTL_4_R2" hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C ,T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C" hexmask.long.byte 0x0C 0.--7. 1. " T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C ,T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C" line.long 0x10 "T_PCIE2_RP_ECTL_5_R2,T_PCIE2_RP_ECTL_5_R2" line.long 0x14 "T_PCIE2_RP_ECTL_6_R2,T_PCIE2_RP_ECTL_6_R2" line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1" bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C" "Default,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Default,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0xF00++0x0B line.long 0x00 "VEND_XP,Vendor XP Register (NVIDIA's Implementation)" bitfld.long 0x00 31. " FORCE_COMPLIANCE ,Force compliance" "Disabled,Enabled" rbitfld.long 0x00 30. " DL_UP ,Status of data link layer in XP" "Down,Up" textline " " bitfld.long 0x00 29. " INTERLEAVE_DLLPS ,Interleave DLLPS" "Disabled,Enabled" bitfld.long 0x00 28. " OPPORTUNISTIC_UPDATEFC ,DL will send any pending UpdateFC packet" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " OPPORTUNISTIC_ACK ,DL will send pending Acks" "Disabled,Enabled" bitfld.long 0x00 26. " TRAIN_ERR_ENABLE ,Enables reporting of training errors" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 18.--25. 1. " UPDATE_FC_THRESHOLD ,Override for the UpdateFC frequency" hexmask.long.word 0x00 2.--17. 1. " PRBS_STAT ,Results of loopback mode testing" textline " " bitfld.long 0x00 1. " PRBS_EN ,Enables the root port as loopback master" "Disabled,Enabled" sif (!cpuis("TEGRAX1")&&!cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " EMULATION ,Enables emulation mode operation" "Disabled,Enabled" endif line.long 0x04 "VEND_XP1,Vendor XP Register 1 (NVIDIA's Implementation)" bitfld.long 0x04 29.--31. " L1_EXIT_LATENCY ,L1 exit latency for the given PCI express link" "< 1us,1us - 2us,2us - 4us,4us - 8us,8us - 16us,16us -32us,32us-64us,> 64us" bitfld.long 0x04 28. " FORCE_DOWNSTREAM_NO_SNOOP ,Force downstream no snoop" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " FORCE_UPSTREAM_NONCOH ,Force upstream non-coherent" "Disabled,Enabled" bitfld.long 0x04 26. " NP_REQ_TIMEOUT ,Disable downstream NP request timeout" "No,Yes" textline " " bitfld.long 0x04 23. " IGNORE_L0S ,Ignore L0S" "No,Yes" bitfld.long 0x04 22. " DONT_MERGE_PMASNAK ,Don't merge PMASNAK" "Merged,Not merged" textline " " bitfld.long 0x04 21. " L1_ASPM_SUPPORT ,Link capability register L1 ASPM support" "Not supported,Supported" bitfld.long 0x04 20. " L23_READY_NO_D3 ,L23 ready no D3" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " ACK_L1_NO_WAIT ,ACK L1 no wait" "Disabled,Enabled" hexmask.long.word 0x04 10.--18. 1. " ACK_TIMER_LIMIT ,Overrides the Ack timer limit for this root port" textline " " bitfld.long 0x04 8. " RNCTRL_GEN2_WAIT_FOR_FIRST_EIES ,RNCTRL GEN2 wait for first EIES" "Disabled,Enabled" rbitfld.long 0x04 7. " RNCTRL_EN ,Dynamic link width re-negotiation procedure in XP" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " GEN2_LINK_UPGRADE ,Selects the 2.0-compliant link width upgrade protocol" "Disabled,Enabled" bitfld.long 0x04 0.--5. " RNCTRL_MAXWIDTH ,Maximum link width required at the end of dynamic link width renegotiation process" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "VEND_XP2,Vendor XP Register 2 (NVIDIA's Implementation)" hexmask.long.byte 0x08 24.--31. 1. " L0S_UPDATE_WAKE ,L0S update wake" hexmask.long.word 0x08 8.--17. 1. " L0S_THRESHOLD ,Controls the idle time required for TxL0s entry from L0" textline " " hexmask.long.byte 0x08 0.--7. 1. " L0S_ACK_WAKE ,L0S ACK wake" sif (cpuis("TEGRAX1")) group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices" hexmask.long.word 0x00 20.--31. 1. " N100MS_DFPCI ,N100MS_DFPCI" hexmask.long.word 0x00 0.--9. 1. " MICROSECOND ,MICROSECOND" elif (cpuis("TEGRAX2")) group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Vendor XV Timeout Register (NVIDIA's Implementation)" hexmask.long.word 0x00 20.--31. 1. " 100MS_DFPCI ,Number of Dfpci_clk clocks in a given 100ms interval" hexmask.long.word 0x00 0.--9. 1. " MICROSECOND ,Various timers required by PCI-express specification" group.long 0xF14++0x07 line.long 0x00 "VEND_XV_CMN,Vendor XV CMN Register (NVIDIA's Implementation)" bitfld.long 0x00 29.--31. " ISO2TC_MAP ,TC to be used for FPCI ISO transactions" "0,1,2,3,4,5,6,7" line.long 0x04 "VEND_THERM_MGMT,Vendor THERM MGMT" hexmask.long.word 0x04 4.--15. 1. " PERIOD ,Defines period (in microseconds) for the purpose of throttling" bitfld.long 0x04 1.--3. " DUTY_CYCLE ,Defines fraction of PERIOD throttling is applied" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 0. " ENABLE ,Enables throttling of PCIe traffic" "Disabled,Enabled" else group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices" hexmask.long.tbyte 0x00 0.--23. 1. " VEND_XV_TIMEOUT ,VEND_XV_TIMEOUT" endif group.long 0xF20++0x03 line.long 0x00 "VEND_SLOT_STRAP,Vendor Slot Capabilities Register" sif (cpuis("TEGRAX2")) hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER ,Physical slot number" bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT ,No CMD completed support" "Not supported,Supported" textline " " bitfld.long 0x00 17. " ELECTROMECH_INTERLOCK_PRESENT ,Electromechanical interlock present" "Not present,Present" bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Slot power limit scale" "0,1,2,3" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Slot power limit value" bitfld.long 0x00 6. " HOT_PLUG_CAPABLE ,Supporting hot-plug operations" "Not capable,Capable" textline " " bitfld.long 0x00 5. " HOT_PLUG_SURPRISE ,Hot-plug surprise" "Disabled,Enabled" bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT ,Power indicator" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT ,Attention Indicator" "Not implemented,Implemented" bitfld.long 0x00 2. " MRL_SENSOR_PRESENT ,MRL Sensor" "Not implemented,Implemented" textline " " bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT ,Power Controller" "Not implemented,Implemented" bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT ,Attention Button" "Not implemented,Implemented" else hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER ,Physical slot number" bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Slot power limit scale" "0,1,2,3" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Slot power limit value" endif sif (cpuis("TEGRAX1")) group.long 0xF30++0x03 line.long 0x00 "RP_XP_REF,This register contains diagnostic bits used in XP" hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE ,User-specified value to use for completion timeout" bitfld.long 0x00 13. " CPL_TO_OVERRIDE ,Enables the user override mode for completion timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ADVANCE_BY_2_CYA ,ADVANCE_BY_2_CYA" "Disabled,Enabled" bitfld.long 0x00 11. " NAK_SCHEDULE_CYA ,NAK_SCHEDULE_CYA" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA ,RXL2LINK_NPT_EMPTY_CYA" "Disabled,Enabled" bitfld.long 0x00 9. " L2_READ_FIX_EN ,L2_READ_FIX_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MICROSECOND_ENABLE ,MICROSECOND_ENABLE" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " MICROSECOND_LIMIT ,MICROSECOND_LIMIT" elif (cpuis("TEGRAX2")) group.long 0xF30++0x03 line.long 0x00 "RP_XP_REF,RP XP Reference Register" hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE ,User-specified value to use for completion timeout" bitfld.long 0x00 13. " CPL_TO_OVERRIDE ,Enables the user override mode for completion timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ADVANCE_BY_2_CYA ,Advanced by 2 CYA" "Disabled,Enabled" bitfld.long 0x00 11. " NAK_SCHEDULE_CYA ,NAK schedule CYA" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA ,RXL2LINK NPT empty CYA" "Disabled,Enabled" bitfld.long 0x00 9. " L2_READ_FIX_EN ,L2 read fix enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MICROSECOND_ENABLE ,Microsecond enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " MICROSECOND_LIMIT ,Counter value to be used to reset the one microsecond counter used for update FC scheduling" group.long 0xF44++0x03 line.long 0x00 "VEND_CYA0,Vendor CYA0 Register" bitfld.long 0x00 30. " FORCE_RETRY_POSSIBLE ,Force retry possible" "No,Yes" bitfld.long 0x00 29. " UP_NC2C ,Forces all upstream non-coherent traffic to coherent" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " DROP_VDM_TYPE1 ,VDM messages with vendor ID other than NVIDIA drop enable" "Disabled,Enabled" bitfld.long 0x00 27. " DROP_NV_VDM_TYPE1 ,VDM messages with vendor ID NVIDIA(0x10DE) drop enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " REL_CRDT_4PKT_DRP_RXL ,Credits for the VDM packet dropped release enable" "Disabled,Enabled" bitfld.long 0x00 25. " LTR_EN ,Hide LTR capability enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ALLOW_ALL_DS_RO ,Allow all DS RO" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " NATIVE_P2P_STARVE_COUNT ,Native P2P starve count" textline " " bitfld.long 0x00 12.--15. " DSK_RESET_PULSE_WIDTH ,Number of symbol times Deskewer should hold RX fifos in hot_reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " FINISH_PKT_ON_RCVRY_EN ,Finish packet on recovery enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " UR_PW_DROP_ALL_MODE ,UR PW drop all mode" "No,Yes" bitfld.long 0x00 9. " DROP_ALL_MODE ,Drop all mode" "No,Yes" textline " " bitfld.long 0x00 6.--8. " MAX_PAYLOAD_SIZE ,Max payload size" "INIT,,,,,4KB,,Auto" bitfld.long 0x00 5. " ADR64 ,64-bit addressing mode" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IGNORE_BME ,Ignores BMS and accepts upstream PCIe transactions" "Not ignored,Ignored" bitfld.long 0x00 3. " UFPCI_BLOCK_B2B_NP ,UFPCI block back-to-back NP" "No,Yes" textline " " bitfld.long 0x00 2. " GPU_NISONC2HPISO ,GPU NISONC2HPISO" "Disabled,Enabled" bitfld.long 0x00 1. " PASSPW_RO ,PASSPW RO" "No,Yes" textline " " bitfld.long 0x00 0. " REL_CREDIT_UR_PW ,Credits for the ur_pw received release" "No,Yes" else group.long 0xF34++0x0F line.long 0x00 "ECTL_2_R1,ECTL_2_R1" hexmask.long.word 0x00 16.--31. 1. " RX_DFE_1C ,RX_DFE_1C" hexmask.long.byte 0x00 8.--15. 1. " RX_EQ_1C ,RX_EQ_1C" textline " " hexmask.long.byte 0x00 0.--7. 1. " CDR_CNTL_1C ,CDR_CNTL_1C" line.long 0x04 "ECTL_3_R1,ECTL_3_R1" bitfld.long 0x04 8.--11. " TX_PEAK_PRE_1C ,TX_PEAK_PRE_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--4. " TX_PEAK_1C ,TX_PEAK_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "ECTL_2_R2,ECTL_2_R2" hexmask.long.word 0x08 16.--31. 1. " RX_DFE_1C ,RX_DFE_1C" hexmask.long.word 0x08 0.--15. 1. " RX_EQ_1C ,RX_EQ_1C" line.long 0x0C "ECTL_3_R2,ECTL_3_R2" bitfld.long 0x0C 24.--27. " PRE_SEL1_1C ,PRE_SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--20. " SEL1_1C ,SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 8.--11. " PRE_SEL0_1C ,PRE_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--4. " SEL0_1C ,SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.long 0xF48++0x07 line.long 0x00 "VEND_CTL1,Vendor Control Register 1 (NVIDIA's Implementation)" bitfld.long 0x00 21. " POLLING_RESET_FIX_EN ,Polling reset fix enable" "Disabled,Enabled" bitfld.long 0x00 20. " HOTPLUG_IN_TRAFFIC_EN ,Hotplug in traffic enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " NISO2ISO ,All upstream non-ISO-PW and non-ISO-NP will be upgraded to ISO" "Disabled,Enabled" bitfld.long 0x00 18. " ALLOW_UPSTREAM_CMPL_OVERTAKE_PW ,UBFI allows CPL bypass PW regardless of RO bit" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " SPLIT_ARB_BLOCK_COH ,Split ARB block coherent" "Disabled,Enabled" bitfld.long 0x00 16. " HIDE_MSIMAP ,Hide MSIMAP" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " LINKACTV_REPORTING ,Setting the data link layer link active reporting capable bit" "Disabled,Enabled" bitfld.long 0x00 14. " P2P_ISO2NIS ,Forces upstream peer-to-peer ISO requests to be peer-to-peer NONISO" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ERPT ,ERPT" "Disabled,Enabled" bitfld.long 0x00 12. " HIDE_MSI_CAP ,Hides the entire MSI capability structure from the capabilities list" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ACCEPT_MSGD1 ,Allows acceptance of NVIDIA specific vendor type message with data" "Disabled,Enabled" bitfld.long 0x00 1.--3. " TC2ISO_MAP ,TC2ISO MAP" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0. " P2P_BLOCK_P2P_ONLY ,P2P block P2P only" "Disabled,Enabled" line.long 0x04 "VEND_XP_BIST,IOBIST And Characterization Control Register (NVIDIA's Implementation)" bitfld.long 0x04 30. " GOTO_DETECT_ON_SURPRISE_EIDLE ,Goto detect on surprise EIDLE" "Disabled,Enabled" bitfld.long 0x04 29. " ENABLE_SERR_REPORTING ,Enable SERR reporting" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " GOTO_L1_L2_AFTER_DLLP_DONE ,Goto L1 L2 after DLLP done" "Disabled,Enabled" bitfld.long 0x04 27. " CTRL_IGNORE_LPBK_EXIT ,Control ignore LPBK exit" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " CTRL_RELAX_LPBK_ENTRY ,Control relax LPBK entry" "Disabled,Enabled" bitfld.long 0x04 25. " CTRL_FORCE_PRBS_RST ,Control force PRBS reset" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " FORCE_DEEMPHASIS_ADVERTISED_EN ,Force Deemphasis advertised enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 23. " POWER_UP_BYPASS ,Power up bypass" "No bypass,Bypass" endif textline " " bitfld.long 0x04 22. " FORCE_RECEIVER_COMPLIANCE_EN ,Force reciver compliance enable" "Disabled,Enabled" bitfld.long 0x04 21. " FORCE_COMPLIANCE_GEN2_SPEED_EN ,Force compliance GEN2 speed enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " FORCE_COMPLIANCE_AND_ADVERTISE_MODE ,Force compliance and advertise mode" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 19. " PRESERVE_TX_PACKET_DURING_SPEED_CHANGE ,Preserve TX packet during speed change" "Not preserved,Preserved" bitfld.long 0x04 18. " GEN2_EXIT_USE_STAT_IDLE ,GEN2 exit use status idle" "Not idle,Idle" textline " " bitfld.long 0x04 17. " GEN2_LOOPBACK ,GEN2 loopback" "0,1" bitfld.long 0x04 16. " SA_EXTRA_RESET_EN_RANGE ,SA extra reset enable range" "Disabled,Enabled" textline " " hexmask.long.word 0x04 6.--15. 1. " CTRL_TX_PTRN_RANGE ,Control TX PTRN range" bitfld.long 0x04 4.--5. " TEST_MODE_RANGE ,Test mode range" "0,1,2,3" textline " " bitfld.long 0x04 3. " NOSCRAMBLE_RANGE ,No scramble range" "0,1" bitfld.long 0x04 2. " EIDLE_DATA_RANGE ,EIDLE data range" "0,1" textline " " bitfld.long 0x04 1. " EIDLE_OVERRIDE_RANGE ,EIDLE override range" "0,1" bitfld.long 0x04 0. " RDET_BYPASS_RANGE ,RDET bypass range" "0,1" endif textline " " sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) width 22. group.long 0xF50++0x03 line.long 0x00 "VEND_XP_PAD_PWRDN,Vendor XP PAD Powerdown (NVIDIA's Implementation)" bitfld.long 0x00 31. " IDLE_MODE_L1_CLKREQ ,Idle mode L1 clock request" "0,1" bitfld.long 0x00 30. " IDLE_MODE_DYNAMIC ,Idle mode dynamic" "0,1" textline " " bitfld.long 0x00 29. " IDLE_MODE_L1 ,Idle mode L1" "0,1" bitfld.long 0x00 28. " XVR_USE_DFPCI_DATA_UNINTR ,XVR use DFPCI data UNINTR" "Disabled,Enabled" textline " " hexmask.long.word 0x00 18.--27. 1. " MICROSECOND ,Various timers required by PCI-express specification" bitfld.long 0x00 16.--17. " SLEEP_MODE_L1_CLKREQ ,Defines the 2-bit sleep-mode coding when clkreq is deasserted in L1" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 15. " L1_CLKREQ ,Power down to SLEEP_MODE_L1_REQ enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--14. 1. " MINIMUM ,Minimum number of Gen1 xclks(4ns) that analog pads must remain powered down (or up) before the LTSSM attempts to power them back up/down again" textline " " bitfld.long 0x00 5.--6. " SLEEP_MODE_DYNAMIC ,2-bit sleep-mode coding in the pad when the lane shut down due to dynamic link downsizing" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 3.--4. " SLEEP_MODE_L1 ,2-bit sleep-mode coding in the pad when LTSSM is in the L1 state or DISABLED state" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 2. " DISABLED ,Enable analog pads to power down in the DISABLED_DOWN state" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DYNAMIC ,Enable unused analog pads to power down after dynamic link width re-negotiation takes place" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " L1 ,Enable analog pads to power down when in L1 state" "Disabled,Enabled" endif textline " " width 22. group.long 0xF54++0x07 line.long 0x00 "VEND_XP_FTS,Vendor XP FTS (NVIDIA's Implementation)" hexmask.long.byte 0x00 24.--31. 1. " TS_DETECT_START ,TS detect start" hexmask.long.byte 0x00 16.--23. 1. " FTS_DETECT_START ,Number of symbol times we wait before the root port begins looking at FTS ordered sets when exiting L0s" textline " " hexmask.long.byte 0x00 8.--15. 1. " N_FTS_REMOTE ,N_FTS value advertised by the remote device" hexmask.long.byte 0x00 0.--7. 1. " N_FTS ,N_FTS value that we advertise to the device on the other side of the link" line.long 0x04 "VEND_XP_STATS0,Vendor XP States Register 0" bitfld.long 0x04 28. " FAILED_L0S_EXITS_INF ,Failed L0s exit counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 24. " FAILED_L0S_EXITS_LC ,Failed L0S exits LC" "No effect,Clear" textline " " bitfld.long 0x04 20. " NAKS_RCVD_INF ,NAKs received counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 16. " NAKS_RCVD_LC ,NAKS received LC" "No effect,Clear" textline " " bitfld.long 0x04 12. " CRC_ERRORS_INF ,CRC error counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 8. " CRC_ERRORS_LC ,Current value from the CRC error counter" "No effect,Clear" textline " " bitfld.long 0x04 4. " 8B10B_ERRORS_INF ,8b/10b error counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 0. " 8B10B_ERRORS_LC ,Current value from the 8b/10b error counter" "No effect,Clear" rgroup.long 0xF5C++0x07 line.long 0x00 "VEND_XP_STATS1,Vendor XP States Register 1" sif (cpuis("TEGRAX2")) hexmask.long.byte 0x00 24.--31. 1. " FAILED_L0S_EXITS ,Counts the number of times the RX side of the XP went into Recovery in one millisecond" hexmask.long.byte 0x00 16.--23. 1. " NAKS_RCVD ,Counts the number of NAKs received from the endpoint in 64 microseconds" textline " " hexmask.long.byte 0x00 8.--15. 1. " CRC_ERRORS ,Counts the number of CRC errors detected in 64 microseconds" hexmask.long.byte 0x00 0.--7. 1. " 8B10B_ERRORS ,Counts the number of 8b/10b errors detected in one microsecond" else hexmask.long.byte 0x00 24.--31. 1. " 8B10B_ERRORS ,Counts the number of 8b/10b errors detected in one microsecond" hexmask.long.byte 0x00 16.--23. 1. " CRC_ERRORS ,Counts the number of CRC errors detected in 64 microseconds" textline " " hexmask.long.byte 0x00 8.--15. 1. " NAKS_RCVD ,Counts the number of NAKs received from the endpoint in 64 microseconds" hexmask.long.byte 0x00 0.--7. 1. " FAILED_L0S_EXITS ,Counts the number of times the RX side of the XP went into Recovery in one millisecond" endif line.long 0x04 "VEND_ERROR_COUNT,Vendor Error Count Register" hexmask.long.byte 0x04 16.--23. 1. " REPLAY ,Counts number of times TXBA replays" hexmask.long.byte 0x04 8.--15. 1. " BAD_TLP ,Counts bad tlps reported by RXL" textline " " hexmask.long.byte 0x04 0.--7. 1. " LCRC_ERR ,Counts LCRCL Errors reported by RXL" textline " " width 28. group.long 0xF64++0x0B line.long 0x00 "CFG_MISC,Config Miscellaneous Register (NVIDIA's Implementation)" hexmask.long.byte 0x00 0.--7. 1. " MUTE_IDLE ,Mute idle" line.long 0x04 "PRIV_XP_INIT_RECOVERY,Private XP Initialize Recovery Register (NVIDIA's Implementation)" bitfld.long 0x04 31. " 8B10B_ERROR_ENABLE ,8B10B feature enable" "Disabled,Enabled" hexmask.long.word 0x04 20.--30. 1. " 8B10B_ERROR_WINDOW ,CPrograms the time frame in multiples of 1 microsecond" textline " " hexmask.long.tbyte 0x04 0.--19. 1. " 8B10B_ERROR_THRESHOLD ,Programs the 8b10b error threshold" line.long 0x08 "PRIV_XP_LCTRL_2,Private XP LCTRL (NVIDIA's Implementation)" rbitfld.long 0x08 31. " UPCONFIGURE_CAPABLE ,Gen2 link width up-configure capability" "Not capable,Capable" bitfld.long 0x08 30. " REV2P0_COMPLIANCE_DIS ,Disable advertising rev2.0 support and link width up-configure capability" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " EIDLE_INFERENCE_EN ,Disable electrical idle inference" "No,Yes" bitfld.long 0x08 28. " SURPRISE_IDLE_USE_STAT_IDLE ,Surprise idle use status idle" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " ALLOW_SPEED_CHANGE_FROM_L1 ,Allow speed change to be initiated from the L1 or Rx_L0s link states" "Disabled,Enabled" bitfld.long 0x08 24.--26. " RECOVERY_SPEED_TIMEOUT_ADJ ,Adjust minimum length of time the transmitter stays in idle in the Recover Sped state" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 20.--23. " N_EIE_SYMBOLS ,Number of K28.7 symbols" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 19. " DEEMPHASIS_STRAP ,DEEMPHASIS_STRAP" "-6db,-3.5db" textline " " bitfld.long 0x08 18. " ENFORCE_DEEMPHASIS ,Forces root port to use de-emphasis value" "Disabled,Enabled" bitfld.long 0x08 17. " POLLING_PREDETERMINED_LANES ,Polling predetermined lanes" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " AUTONOMOUS_CHANGE ,Autonomous change" "No,Yes" rbitfld.long 0x08 12.--15. " DATA_RATE_SUPPORTED_REMOTE ,Gen2 data rate supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 8.--11. " DATA_RATE_SUPPORTED ,Supported link speed reported in the link capabilities" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " TARGET_LINK_SPEED ,Specifies the link rate to change to" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 3. " TX_MARGIN_OVERRIDE ,TX_MARGIN_OVERRIDE" "Disabled,Enabled" sif (cpuis("TEGRAX2")) bitfld.long 0x08 2. " CYA_DEEMPHASIS_OVERRIDE ,CYA deemphasis override" "No override,Override" endif bitfld.long 0x08 1. " ADVERTISED_RATE_CHANGE ,ADVERTISED_RATE_CHANGE" "No effect,Change" textline " " bitfld.long 0x08 0. " SPEED_CHANGE ,Link speed negotiation procedure" "No effect,Change" group.long 0xF74++0x03 line.long 0x00 "PRIV_XP_PAD_PWRUP,Private XP PAD_Powerup" hexmask.long.byte 0x00 16.--23. 1. " PMRX_PWRUP_THRESHOLD ,Time to hold CDR at reset in Recovery" sif (cpuis("TEGRAX2")) group.long 0xF78++0x03 line.long 0x00 "PRIV_XP_PAD_GEN2_PAD_PWRDN,Private XP PAD GEN2 PAD Powerdown" hexmask.long.byte 0x00 16.--23. 1. " MICROSECOND ,Number of xclks in 1 microsecond when running at gen2 speed" endif group.long 0xF84++0x03 line.long 0x00 "PRIV_XP_RECOVERY_REASONS,Register Records The Reasons We Went Into Recovery" textline " " width 30. sif (cpuis("TEGRAX2")) rgroup.long 0xF88++0x07 line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number Of RECOVERY STATE Entries In XP By The XVR" line.long 0x04 "PRIV_XP_L0S_ENTRY_COUNT,Number Of Entries From L0 To L0s At ltssm Side" rgroup.long 0xF94++0x0B line.long 0x00 "PRIV_XP_L1_ENTRY_COUNT,Number Of Entries From L0 To L1 It Is Reset Whenever It Is Read" line.long 0x04 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number Of Entries From L1 To Recovery" line.long 0x08 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number Of Entries From L0 To Recovery" bitfld.long 0x08 8. " REASON ,Reason" "All,Error" textline " " hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Value" else rgroup.long 0xF88++0x13 line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number of RECOVERY STATE entries in XP by the XVR" line.long 0x04 "PRIV_XP_RX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm RX side" line.long 0x08 "PRIV_XP_TX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm TX side" line.long 0x0C "PRIV_XP_L1_ENTRY_COUNT,Number of entries from L0 to L1 It is reset whenever it is read" line.long 0x10 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number of entries from L1 to Recovery" group.long 0xF9C++0x03 line.long 0x00 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number of entries from L0 to Recovery" bitfld.long 0x00 8. " REASON ,REASON" "All,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " VALUE ,VALUE" endif rgroup.long 0xFA0++0x07 line.long 0x00 "PRIV_XP_L1P_ENTRY_COUNT,Number Of Entries From L0 To Deep L1" line.long 0x04 "PRIV_XP_ASLM_COUNT,Number Of Switching Between X1 And X16 for Gen2 Only" group.long 0xFA8++0x07 line.long 0x00 "VEND_CTL2,Vendor Control Register (Miscellaneous)" bitfld.long 0x00 24. " COMPLIANCE_X8_DELAY ,CTL for compliance delay pattern" "Wrap on n-1,Wrap on 8/16 mod 8" textline " " bitfld.long 0x00 23. " IGNORE_ATTENTION_BUTTON_MSG ,Ignore upstream attention button" "Not ignored,Ignored" textline " " bitfld.long 0x00 22. " UNBLOCK_UP_TRANSACTIONS ,Unblock up transaction" "Blocked,Unblocked" textline " " bitfld.long 0x00 21. " BLOCK_UP_TRANSACTIONS_ON_ERR ,Block all upstream transaction after an error" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " HW_AUTO_WIDTH_DISABLE_DIS ,HW auto width disable disable" "False,True" textline " " bitfld.long 0x00 19. " BW_MANAGEMENT_INT_EN_DIS ,BW management INT enable disable" "False,True" textline " " bitfld.long 0x00 18. " AUTO_BANDWIDTH_INT_EN_DIS ,Auto bandwidth INT enable disable" "False,True" textline " " bitfld.long 0x00 17. " AUTO_BANDWIDTH_DIS ,Auto bandwidth disable" "False,True" textline " " bitfld.long 0x00 16. " BW_MANAGEMENT_DIS ,BW management disable" "False,True" textline " " bitfld.long 0x00 13. " SHADOW_LINK_BW_NOTIFY_CAP ,Shadow link BW notify capable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE ,GEN2 protocol disable" "No,Yes" else rbitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE ,GEN2 protocol disable" "No,Yes" endif textline " " bitfld.long 0x00 11. " SLOT_IMPLEMENTED ,Slot implemented" "Not implemented,Implemented" textline " " eventfld.long 0x00 9. " ERR_STS_HOTPLUG_PME ,Error STS hotplug PME" "No error,Error" textline " " eventfld.long 0x00 8. " ERR_STS_HOTPLUG_NMI ,Error STS hotplug NMI" "No error,Error" textline " " bitfld.long 0x00 7. " PCA_ENABLE ,Enable/disable the PCA in any TMS" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " GEN2_SPEED_DISABLE ,Gen 2 protocol speed disable" "No,Yes" textline " " bitfld.long 0x00 4. " GEN2_PROTOCOL_DISABLE ,Disable gen2 protocol and will force the use of Gen 1.1 protocol" "No,Yes" textline " " bitfld.long 0x00 2. " DEV_CAP_EXTENDED_TAG_FIELD_SIZE ,DEV capable extended tag field size" "5bit,8bit" textline " " bitfld.long 0x00 1. " DIS_MA_TA_EP_MERGE ,Disables the logic which takes care of merging of EP/MA/TA" "No,Yes" line.long 0x04 "PRIV_XP_CONFIG,Private XP Config" bitfld.long 0x04 0.--1. " LOW_PWR_DURATION ,information logging for the health and performance counters" "TX_L0S,RX_L0S,L1,Idle" textline " " width 35. rgroup.long 0xFB0++0x03 line.long 0x00 "PRIV_XP_DURATION_IN_LOW_PWR_100NS,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" textline " " sif (cpuis("TEGRAX2")) rgroup.long 0xFB4++0x03 line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2" hexmask.long.word 0x00 0.--12. 1. " THRESHOLD ,Threshold" else group.long 0xFB4++0x03 line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2" hexmask.long.word 0x00 0.--12. 1. " THRESHOLD ,Threshold" endif textline " " group.long 0xFB8++0x03 line.long 0x00 "PRIV_XP_EIDLE_INFERENCE_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 16.--31. 1. " TIMEOUT_B ,UI window for electrical idle exit not detected in the Recover" textline " " hexmask.long.word 0x00 0.--15. 1. " TIMEOUT_A ,UI window for COM not detected in the Recovery" textline " " width 25. sif (cpuis("TEGRAX2")) group.long 0xFBC++0x03 line.long 0x00 "SLOT_CONTROL_STATUS_HPC,Slot Control Status HPC Register" hexmask.long.word 0x00 16.--31. 1. " COMMAND ,Command" hexmask.long.byte 0x00 8.--15. 1. " STATE ,State" textline " " eventfld.long 0x00 7. " STATE_CHANGE7 ,State change 7" "Not changed,Changed" eventfld.long 0x00 6. " STATE_CHANGE6 ,State change 6" "Not changed,Changed" textline " " eventfld.long 0x00 5. " STATE_CHANGE5 ,State change 5" "Not changed,Changed" eventfld.long 0x00 4. " STATE_CHANGE4 ,State change 4" "Not changed,Changed" textline " " eventfld.long 0x00 3. " STATE_CHANGE3 ,State change 3" "Not changed,Changed" eventfld.long 0x00 2. " STATE_CHANGE2 ,State change 2" "Not changed,Changed" textline " " eventfld.long 0x00 1. " STATE_CHANGE1 ,State change 1" "Not changed,Changed" eventfld.long 0x00 0. " STATE_CHANGE0 ,State change 0" "Not changed,Changed" group.long 0xFC4++0x07 line.long 0x00 "VEND_XP_LANEMAP1,Vendor XP Lane MAP 1" bitfld.long 0x00 28.--31. " LANE_15 ,Lane 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " LANE_14 ,Lane 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " LANE_13 ,Lane 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " LANE_12 ,Lane 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " LANE_11 ,Lane 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " LANE_10 ,Lane 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " LANE_9 ,Lane 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " LANE_8 ,Lane 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "VEND_SS_1,Shadow Register Of SS 1" hexmask.long.word 0x04 16.--31. 1. " SSID ,SSID" hexmask.long.word 0x04 0.--15. 1. " SSVID ,SSVID" endif sif (!cpuis("TEGRAX2")) group.long 0xFC8++0x0B line.long 0x00 "VEND_SHADOW,Shadow register of SS_1" hexmask.long.word 0x00 16.--31. 1. " SS_1_SSID ,SS_1_SSID" textline " " hexmask.long.word 0x00 0.--15. 1. " SS_1_SSVID ,SS_1_SSVID" line.long 0x04 "TX_MARGIN_MAP0_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register" bitfld.long 0x04 30.--31. " CTL ,CTL" "0,1,2,3" textline " " bitfld.long 0x04 24.--29. " CODE3 ,CODE3" "Init,,,,,,,,Mobile,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 16.--21. " CODE2 ,CODE2" "Init,,,,,,,,,,Mobile,,,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 8.--13. " CODE1 ,CODE1" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 0.--5. " CODE0 ,CODE0" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,,,,,Desktop,?..." line.long 0x08 "TX_MARGIN_MAP1_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register" bitfld.long 0x08 30.--31. " CTL ,CTL" "0,1,2,3" textline " " bitfld.long 0x08 24.--29. " CODE7 ,CODE7" "Mobile,,,,Desktop,?..." textline " " bitfld.long 0x08 16.--21. " CODE6 ,CODE6" "Init,,Mobile,,,,,,Desktop,?..." textline " " bitfld.long 0x08 8.--13. " CODE5 ,CODE5" "Init,,,,Mobile,,,,,,,,Desktop,?..." textline " " bitfld.long 0x08 0.--5. " CODE4 ,CODE4" "Init,,,,,,Mobile,,,,,,,,,,Desktop,?..." endif textline " " sif (cpuis("TEGRAK1")) group.long 0xFD4++0x03 line.long 0x00 "ECTL_1_R1,ECTL_1_R1" bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20. " RX_QEYE_EN_1C ,RX_ QEYE_EN_1C" "0,1" textline " " bitfld.long 0x00 16.--18. " RX_WANDER_1C ,RX_WANDER_1C" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C ,_RX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C ,TX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 8.--11. " TX_CMADJ_1C ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--5. " TX_AMP_1C ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFD8++0x03 line.long 0x00 "ECTL_1_R2,ECTL_1_R2" bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20. " RX_QEYE_EN_1C ,RX_ QEYE_EN_1C" "0,1" textline " " bitfld.long 0x00 16.--18. " RX_WANDER_1C ,RX_WANDER_1C" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C ,_RX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C ,TX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 8.--11. " TX_CMADJ_1C ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--5. " TX_AMP_1C ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0xFDC++0x07 line.long 0x00 "TIMEOUT2,Timeout 2 Register" bitfld.long 0x00 0.--4. " MIN_L1_L2_IDLE_TIME ,Sets minimum amount of time we stay in L1/L2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "PRIV_MISC,Private Miscellaneous Register" bitfld.long 0x04 31. " TMS_CLK_CLAMP_ENABLE ,Enables per-TMS XCLK/XTXCLK clamping" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 24.--30. 1. " CLK_CLAMP_THRESHOLD ,Number of contiguous nbref_clks (25MHz) after clamping" textline " " bitfld.long 0x04 23. " CTLR_CLK_CLAMP_ENABLE ,Enables per-controller XCLK/XTXCLK clamping" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 16.--22. 1. " CTLR_CLK_CLAMP_THRESHOLD ,Number of contiguous nbref_clks (12MHz) after clamping" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 4. " USE_EXT_CLKREQ ,Use EXT CLKREQ" "Not used,Used" endif textline " " bitfld.long 0x04 0.--3. " PRSNT_MAP ,PRSNT MAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpuis("TEGRAX2")) group.long 0xFE4++0x03 line.long 0x00 "BIST_CTRL_2,BIST Control 2 Register" bitfld.long 0x00 31. " OVERRIDE_JTAG ,Internal JTAG register override" "No override,Override" textline " " bitfld.long 0x00 4.--7. " TX_CHAR_SPEED ,Speed of TXCHAR output" ",2.5Gbps,5.0Gbps,?..." textline " " bitfld.long 0x00 3. " TXCHAR_MIN_EIDLE ,Force LTSSM to spend minimum time in E-idle" "Not forced,Forced" textline " " bitfld.long 0x00 2. " TXCHAR_EIDLE_EXIT ,Transition from E-idle to compliance pattern" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXCHAR_EIDLE_ENTRY ,Transition from compliance pattern to E-idle" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SHORT_LINK_TIMERS ,Shortened timers in LINK" "Disabled,Enabled" endif group.long 0xFE8++0x03 line.long 0x00 "VEND_XP3,Symbol Alignment Error Handling Register" hexmask.long.byte 0x00 0.--7. 1. " SA_ERROR_LIMIT ,Specifies number of misaligned COM symbols" group.long 0xFEC++0x03 line.long 0x00 "XP_CTL_1,Control Registers Used In XP" sif (cpuis("TEGRAX2")) bitfld.long 0x00 31. " CYA_RP_INITIATED_WAKE_ON_TLP ,Initiated wake one TLP" "Disabled,Enabled" textline " " endif sif (cpuis("TEGRAX1")) bitfld.long 0x00 29.--30. " SPARE ,SPARE" "0,1,2,3" textline " " else bitfld.long 0x00 28.--30. " SPARE ,Spare" "0,1,2,3,4,5,6,7" textline " " endif bitfld.long 0x00 27. " EXIT_L1_AT_CLKREQ_ASSERTION ,When set,ltssm will exit L1 when clkreq assertion happens" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " NEW_IOBIST_CTRL ,Enable control signals from iobist" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " OLD_IOBIST_EN ,When set will enable old iobist,else it will enable new iobist" "New,Old" textline " " bitfld.long 0x00 19.--24. " EIOS_DEBOUNCE_TIMER ,Number of xclk for which rx_data_en signals need to be deasserted before asserting it again" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 18. " DISABLE_RX_LANE_AFTER_EIOS ,Disable rx_lane_en after EIOS is seen in any of the enabled lane during recovery" "No,Yes" textline " " bitfld.long 0x00 17. " ENABLE_DESKEW_FOR_SPDCH_NEGOTIATION ,LTSSM enable deskew in recovery" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BYPASS_CONFIG_PWRUP ,Bypass config powerup" "0,1" textline " " bitfld.long 0x00 15. " RESET_TS_CTRL_ON_ERROR ,Reset TS control on error" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " RX_EIDLE_EXIT_TIMER_IN_CONFIG ,RX EIDLE exit timer in config" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " FORCE_RESET_IN_CONFIG ,Force reset in config" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " LINK_RESIZE_PWRDN_CTL ,Link resize powerdown control" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ALLOW_SPEED_CHANGE_FROM_L0S ,When set,LTSSM will initiate link speed/width/advertised rate change" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PRESERVE_TX_PACKET_ON_DL_RETRAIN ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PRESERVE_TX_PACKET_ON_RECOVERY ,Preserve TX packet on recovery" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " PRESERVE_TX_PACKET_ON_WIDTH_CHANGE ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PRESERVE_TX_PACKET_ON_SPEED_CHANGE ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RESET_LANE_ENABLE_ORIG_IN_DETECT ,allow lane_enable_original to be reset in Detect state" "Not allowed,Allowed" textline " " bitfld.long 0x00 2.--5. " IDLE_TO_L0_DELAY ,Number of clocks that the LTSSM will delay the transition from Recovery" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " LWLO_HUNT_ON_BAD_TS1 ,LWLO HUNT on bad TS1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FORCE_SA_IN_CONFIG ,Enables symbol alignment" "Disabled,Enabled" group.long 0xFF0++0x0F line.long 0x00 "PRIV_XP_L1BEACON,Private XP L1 Beacon" hexmask.long.byte 0x00 2.--9. 1. " N_EIE_SYMBOLS ,Number of EIE symbols sent in L1 Beacon Entry/Exist state" textline " " bitfld.long 0x00 1. " TX_BYP_CTRL ,TX bypass control" "Only L0,All Lanes" textline " " bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" line.long 0x04 "TIMEOUT3,Timeout 3 Register" hexmask.long.byte 0x04 24.--31. 1. " RX_L0S_IDLE_TIME_GEN2 ,Controls the amount of time LTSSM delays" textline " " hexmask.long.byte 0x04 16.--23. 1. " RX_L0S_IDLE_TIME_GEN1 ,Controls the amount of time LTSSM delays" textline " " hexmask.long.byte 0x04 8.--15. 1. " TX_L0S_IDLE_TIME ,Controls the minimum amount of time LTSSM stays in TX_L0S_IDLE state" textline " " bitfld.long 0x04 4.--7. " RX_EIDLE_EXIT_DELAY ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " TX_EIDLE_EXIT_DELAY ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RP_XP_CTL_2,XP Control 2 Register" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) sif cpuis("TEGRAX2") bitfld.long 0x08 24. " LOOPBACK_RATE_DEEMPH_CHECK_DIS ,Loopback rate deemph check disable" "No,Yes" textline " " endif bitfld.long 0x08 23. " RX_CAL_EN ,Hardware RX calibration in UPHY enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " AUX_RX_IDLE_EN ,RX idle enable" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " OVERRIDE_AUX_RX_IDLE_EN ,Override for bit for AUX_RX_IDLE_EN enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WAIT_FOR_LOCKDET_DURING_L1_EXIT ,Wait for lockdet during L1 exit" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 12.--19. 1. " ECO351987_HOLDOFF_CNTR_LIMIT ,Holdoff counter limit for counter that was added in ECO 351987" textline " " bitfld.long 0x08 11. " USE_QUALIFIED_TS_CTL_BITS ,Qualifies the training control bits in the transmitted TS1s/TS2s with the LTSSM state" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " RELAXED_UNEXP_CPL_CHECK ,Relaxed unexpected completion" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " LOOPBACK_FORCE_NOSCRAMBLE ,Loopback force nonscramble enable" "Disabled,Enabled" textline " " endif bitfld.long 0x08 8. " CONFIG_LINKSTART_REQUIRE_PAD_LANE_NUM ,Config link start require PAD lane num" "0,1" textline " " hexmask.long.byte 0x08 0.--7. 1. " LOOPBACK_EXIT_THRESHOLD ,Maximum amount of time spent in loopback" line.long 0x0C "VEND_XP_STATS2,Vendor XP States (NVIDIAs Implementation)" hexmask.long.word 0x0C 0.--15. 1. " 8B10B_ERR_LANEMASK ,Each bit represent the corresponding logical lane" tree.end width 0x0B tree.end tree "PCIE_A2 Registers" base ad:0x02000000 width 11. tree "PCI Compatible Configuration Registers" rgroup.long 0x00++0x03 line.long 0x00 "DEV_ID,Device ID And Vendor ID Register" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID ,Identify the particular device" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,Identify manufacturer of the device" group.long 0x04++0x03 line.long 0x00 "DEV_CTRL,Command And Status Register" eventfld.long 0x00 31. " DETECTED_PERR ,Primary side device receives a poisoned TLP" "Not active,Active" eventfld.long 0x00 30. " SIGNALED_SERR ,ERR_FATAL or ERR_NONFATAL message from primary side device" "Not active,Active" eventfld.long 0x00 29. " RECEIVED_MASTER ,Primary side requestor receives a completion with unsupported request completion status" "Not aborted,Aborted" textline " " eventfld.long 0x00 28. " RECEIVED_TARGET ,Primary side requestor receives a completion with completer abort completion status" "Not aborted,Aborted" eventfld.long 0x00 27. " SIGNALED_TARGET ,Primary side device completes a request using completer abort completion status" "Not aborted,Aborted" eventfld.long 0x00 24. " MASTER_DATA_PERR ,Master data parity error bit" "Not active,Active" textline " " rbitfld.long 0x00 20. " CAPLIST ,Device configuration space includes a capabilities list" "Not present,Present" rbitfld.long 0x00 19. " INTR_STATUS ,INTx interrupt message is pending internally to the device" "Not active,Active" bitfld.long 0x00 10. " INTR_DISABLE ,Ability of the device to generate INTx interrupt messages" "No,Yes" textline " " bitfld.long 0x00 8. " SERR ,SERR enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " PERR ,Parity Error Response bit" "Disabled,Enabled" bitfld.long 0x00 2. " BUS_MASTER ,Ability of the root complex to issue memory and I/O read/write requests" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MEMORY_SPACE ,Respond to memory space accesses on the primary interface" "Disabled,Enabled" bitfld.long 0x00 0. " IO_SPACE ,Respond to I/O space accesses on the primary interface" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "REV_CC,Revision ID And Class Code Registers" hexmask.long.tbyte 0x00 8.--31. 1. " CLASS_CODE ,Generic function of the device" hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,Device specific revision identifier" group.long 0x0C++0x03 line.long 0x00 "MISC_1,MISC 1 Register" rbitfld.long 0x00 23. " HEADER_TYPE1 ,Identifies a multi-function device" "Single function,Multi function" hexmask.long.byte 0x00 16.--22. 1. " HEADER_TYPE0 ,Specifies the layout of bytes 10h through 3Fh" hexmask.long.byte 0x00 0.--7. 1. " CACHE_LINE_SIZE ,Cache line size" group.long 0x18++0x1B line.long 0x00 "BN_LT,Bus Number And Latency Timer Register" hexmask.long.byte 0x00 16.--23. 1. " SUB_BUS_NUMBER ,Subordinate bus number" hexmask.long.byte 0x00 8.--15. 1. " SEC_BUS_NUMBER ,The secondary bus number" hexmask.long.byte 0x00 0.--7. 1. " PRI_BUS_NUMBER ,The primary bus number" line.long 0x04 "IO_BL_SS,I/O Base/Limit And Secondary Status Register" eventfld.long 0x04 31. " DETECTED_PERR ,Secondary side device receives a poisoned TLP" "Not active,Active" eventfld.long 0x04 30. " RECEIVED_SERR ,Secondary side device receives an ERR_FATAL or ERR_NONFATAL message" "Not active,Active" eventfld.long 0x04 29. " RECEIVED_MASTER ,Secondary side device receives a completion with unsupported request completion status" "Not aborted,Aborted" textline " " eventfld.long 0x04 28. " RECEIVED_TARGET ,Secondary side device receives a completion with completer abort completion status" "Not aborted,Aborted" eventfld.long 0x04 27. " SIGNALED_TARGET ,Secondary side device completes a request using completer abort completion status" "Not aborted,Aborted" eventfld.long 0x04 24. " MASTER_DATA_PERR ,Master data parity error bit" "Not active,Active" textline " " bitfld.long 0x04 12.--15. " IO_LIMIT ,Corresponds to address bits AD[15:12] of the I/O limit" "0,256,512,,,,,,,,,,,,,64k" rbitfld.long 0x04 8.--11. " IO_LIMIT_SUPPORT ,Identifies the I/O addressing support" "16,32,?..." bitfld.long 0x04 4.--7. " IO_BASE ,Corresponds to address bits AD[15:12] of the I/O base address" "0,256,512,,,,,,,,,,,,,64k" textline " " rbitfld.long 0x04 0.--3. " IO_BASE_SUPPORT ,Identifies the I/O addressing support" "16,32,?..." line.long 0x08 "MEM_BL,Memory Base And Memory Limit Register" hexmask.long.word 0x08 20.--31. 0x10 " MEM_LIMIT ,Corresponds to address bits AD[31:20] of the memory-mapped I/O limit" hexmask.long.word 0x08 4.--15. 0x10 " MEM_BASE ,Corresponds to address bits AD[31:20] of the memory-mapped I/O base address" line.long 0x0C "PRE_BL,Prefetchable Memory Base/Limit Register" hexmask.long.word 0x0C 20.--31. 0x10 " PREFETCH_MEM_LIMIT ,Corresponds to address bits AD[31:20] of the prefetchable memory limit" rbitfld.long 0x0C 16.--19. " L64BIT ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..." hexmask.long.word 0x0C 4.--15. 0x10 " PREFETCH_MEM_BASE ,corresponds to address bits AD[31:20] of the prefetchable memory base address" textline " " bitfld.long 0x0C 0.--3. " B64BIT ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..." line.long 0x10 "PRE_BU32,Prefetchable Memory Base Upper 32 Bits Register" line.long 0x14 "PRE_LU32,Prefetchable Memory Limit Upper 32 Bits Register" line.long 0x18 "IO_BL_U16,I/O Base/Limit Upper 16 Bits Register" hexmask.long.word 0x18 16.--31. 1. " LIMIT_UPPER_BITS ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O limit" hexmask.long.word 0x18 0.--15. 1. " BASE_UPPER_BITS ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O base address" rgroup.long 0x34++0x07 line.long 0x00 "CAP_PTR,Capabilities Pointer" hexmask.long.byte 0x00 0.--7. 0x01 " CAP_PTR_CAP_PTR ,Offset into configuration space where the capabilities list begins" group.long 0x3C++0x03 line.long 0x00 "INTR_BCR,Interrupt Bridge Control Registers" bitfld.long 0x00 22. " SB_RESET ,Triggers a hot reset on the corresponding PCI express port" "Disabled,Enabled" bitfld.long 0x00 20. " VGA_16BITIO ,Full 16-bit decode of IO address range for VGA" "Disabled,Enabled" bitfld.long 0x00 19. " VGA_ADDRESS ,P2P bridge will claim all of the legacy VGA addresses" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ISA_ADDRESS ,Modifies the response by the bridge to ISA I/O addresses" "Disabled,Enabled" bitfld.long 0x00 17. " SERR_FORWARD ,Forwarding of ERR_COR/ERR_NONFATAL and ERR_FATAL from secondary to primary" "Disabled,Enabled" bitfld.long 0x00 16. " PERR_RESP ,Response to poisoned TLPs" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN ,Contains the interrupt pin the device (or device function) uses" hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Contains the interrupt routing information" tree.end tree "PCI Subsystem ID And Subsystem Vendor ID Capability Registers" width 6. rgroup.long 0x40++0x07 line.long 0x00 "SS_0,Subsystem ID/Vendor ID Capability Register 0" hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next capabilities list item" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the SSID/SSVID registers in a PCI-to-PCI bridge" line.long 0x04 "SS_1,Subsystem ID/Vendor ID Capability Register 1" hexmask.long.word 0x04 16.--31. 1. " SSID ,Identifies the particular add-in card or subsystem" hexmask.long.word 0x04 0.--15. 1. " SSVID ,Identifies the manufacturer of the add-in card or subsystem" tree.end tree "PCI Power Management Capability Structure Registers" rgroup.long 0x48++0x03 line.long 0x00 "PM_0,Power Management Register 0" bitfld.long 0x00 31. " D3_COLD_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 30. " D3_HOT_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 29. " D2_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 28. " D1_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" textline " " bitfld.long 0x00 27. " D0_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 26. " D2_SUPPORT ,D2 power management state support" "Not supported,Supported" bitfld.long 0x00 25. " D1_SUPPORT ,D1 power management state support" "Not supported,Supported" bitfld.long 0x00 22.--24. " AUX_CURRENT ,3.3Vaux auxiliary current requirements for the PCI function" "0,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA" textline " " bitfld.long 0x00 21. " DEV_SPEC_INIT ,Device specific initialization bit" "Not needed,Needed" bitfld.long 0x00 16.--18. " PCIPM_REV ,Revision of the PCI power management interface specification" ",,Rev 1.1,Rev 1.2,?..." hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next capabilities list item" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the power management capability registers in a PCI to PCI bridge" group.long 0x4C++0x03 line.long 0x00 "PM_1,Power Management Register 1" eventfld.long 0x00 15. " PME_STATUS ,Assert the PME# signal independent of the state of the PME_En bit" "Not active,Active" bitfld.long 0x00 8. " PME ,Assert PME?..." "Disabled,Enabled" bitfld.long 0x00 0.--1. " PWR_STATE ,Determine the current power state of a function and to set the function into a new power state" "D0,D1,D2,D3hot" tree.end tree "PCI MSI Capability Structure Registers" width 16. group.long 0x50++0x0F line.long 0x00 "MSI_CTRL,MSI Control Registers" rbitfld.long 0x00 23. " 64BIT_CAP ,Capability of generating a 64-bit message address" "Not capable,Capable" bitfld.long 0x00 20.--22. " MULT_EN ,Number of allocated messages" "0,2,4,8,?..." rbitfld.long 0x00 17.--19. " MULT_CAP ,Number of requested messages" "0,2,?..." bitfld.long 0x00 16. " CTRL_MSI ,Permission to use message signaled interrupt to request service" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next item in the capabilities list" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the Message Signaled Interrupt Capability registers in a PCI-to-PCI bridge" line.long 0x04 "MSI_LOW_ADDR,MSI Message Lower Address Register" hexmask.long 0x04 2.--31. 0x04 " DWORD ,Bits 31:2 of the address" line.long 0x08 "MSI_UPPER_ADDR,MSI Message Upper Address Register" line.long 0x0C "MSI_DATA,MSI Message Data Register" hexmask.long.word 0x0C 0.--15. 1. " DATA ,MSI message data" tree.end sif (cpuis("TEGRAX2")) tree "PCI MSI Map Register" group.long 0x60++0x0B line.long 0x00 "MSI_MAP_0,MSI MAP Capability Register" rbitfld.long 0x00 27.--31. " CAP_TYPE ,Capability type for MSI Mapping Capability block" ",,,,,,,,,,,,,,,,,,,,,CAP_TYPE_MSI,?..." bitfld.long 0x00 16. " XLATE_ENABLE ,Global enable for MSI translation" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 0x01 " CAP_PTR ,Pointer to the next capability in the list" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Capability ID for HyperTransport technology devices" line.long 0x04 "MSI_MAP_1,MSI MAP Lower Address Register" hexmask.long.word 0x04 20.--31. 0x10 " ADDRESS_LOWER ,Lower [31:0] bit address field" line.long 0x08 "MSI_MAP_2,MSI MAP Upper Address Register" tree.end endif tree "PCI Express Capability Structure Registers" width 26. rgroup.long 0x80++0x07 line.long 0x00 "PCI_EXPRESS_CAPABILITY,PCI Express Capability List Register" bitfld.long 0x00 25.--29. " INTERRUPT_MESSAGE_NUMBER ,PCI express capability interrupt message number " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 24. " SLOT_IMPLEMENTED ,PCI express capability slot implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 20.--23. " DEVICE_PORT_TYPE ,PCI express capability device port type" "PCI express endpoint device,Legacy PCI express endpoint device,,,Root port of PCI express root complex,Upstream port of PCI express switch,Downstream port of PCI express switch,PCI express to PCI/PCI-X bridge,PCI/PCI-X to PCI express bridge,?..." textline " " bitfld.long 0x00 16.--19. " VERSION ,PCI express capability version number" ",Version 1,Version 2,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " LIST_NEXT_CAPABILITY_PTR ,The offset to the next PCI capability structure" textline " " hexmask.long.byte 0x00 0.--7. 1. " LIST_CAPABILITY_ID ,Indicates PCI express capability structure" line.long 0x04 "DEVICE_CAPABILITY,Device Capabilities Register" bitfld.long 0x04 26.--27. " CAPTURED_SLOT_POWER_LIMIT_SCALE ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x" textline " " hexmask.long.byte 0x04 18.--25. 1. " CAPTURED_SLOT_POWER_LIMIT_VALUE ,Specifies the upper limit on power supplied by slot" textline " " bitfld.long 0x04 15. " ROLE_BASED_ERR_REPORTING ,Device implements the functionality originally defined in the error reporting ECN" "Not implemented,Implemented" textline " " bitfld.long 0x04 14. " POWER_INDICATOR_PRESENT ,Power indicator" "Not implemented,Implemented" textline " " bitfld.long 0x04 13. " ATTENTION_INDICATOR_PRESENT ,Attention indicator" "Not implemented,Implemented" textline " " bitfld.long 0x04 12. " ATTENTION_BUTTON_PRESENT ,Attention button" "Not implemented,Implemented" textline " " bitfld.long 0x04 9.--11. " ENDPOINT_L1_ACCEPTABLE_LATENCY ,Acceptable latency due to the transition from L1 state to the L0 state" "<1 us,1 us - 2 us,2 us -4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us-64 us,> 64 us" textline " " bitfld.long 0x04 6.--8. " ENDPOINT_L0S_ACCEPTABLE_LATENCY ,Acceptable total latency due to the transition from L1 state to the L0 state" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1. us,1 us - 2 us,2 us-4us,> 4 us" textline " " bitfld.long 0x04 5. " EXTENDED_TAG_FIELD_SIZE ,Maximum supported size of the tag field" "5-bit tag field,8-bit tag field" textline " " bitfld.long 0x04 3.--4. " PHANTOM_FUNCTIONS_SUPPORTED ,Phantom functions support" "No bits used,First MSB used,First two MSB used,Three bits" textline " " bitfld.long 0x04 0.--2. " MAX_PAYLOAD_SIZE ,Maximum payload size" "128B,256B,512B,1024B,2048B,4096B,?..." group.long 0x88++0x03 line.long 0x00 "DEVICE_CONTROL_STATUS,Device Control/Status Registers" rbitfld.long 0x00 21. " TRANSACTIONS_PENDING ,Transactions pending" "Completed,Pending" textline " " rbitfld.long 0x00 20. " AUX_POWER_DETECTED ,AUX power detected" "Not detected,Detected" textline " " eventfld.long 0x00 19. " UNSUPP_REQUEST_DETECTED ,Unsupported request" "Not detected,Detected" textline " " eventfld.long 0x00 18. " FATAL_ERROR_DETECTED ,Fatal error" "Not detected,Detected" textline " " eventfld.long 0x00 17. " NON_FATAL_ERROR_DETECTED ,Non-fatal error" "Not detected,Detected" textline " " eventfld.long 0x00 16. " CORR_ERROR_DETECTED ,Correctable errors" "Not detected,Detected" textline " " bitfld.long 0x00 12.--14. " MAX_READ_REQUEST_SIZE ,Maximum read request size" "128B,256B,512B,1024B,2048B,4096B,?..." textline " " bitfld.long 0x00 11. " ENABLE_NO_SNOOP ,No snoop bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " AUXILLARY_POWER_PM_ENABLE ,AUX power PM enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 9. " PHANTOM_FUNCTIONS_ENABLE ,Phantom functions" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " EXTENDED_TAG_FIELD_ENABLE ,8-bit tag field" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--7. " MAX_PAYLOAD_SIZE ,Maximum TLP payload size" "128B,256B,512B,1024B,2048B,4096B,?..." textline " " bitfld.long 0x00 4. " ENABLE_RELAXED_ORDERING ,Relaxed ordering bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " UNSUPP_REQ_REPORTING_ENABLE ,Reporting of unsupported requests" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FATAL_ERROR_REPORTING_ENABLE ,Reporting of fatal errors" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NON_FATAL_ERROR_REPORTING_ENABLE ,Reporting of non-fatal errors" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CORR_ERROR_REPORTING_ENABLE ,Reporting of correctable errors" "Disabled,Enabled" textline " " rgroup.long 0x8C++0x03 line.long 0x00 "LINK_CAPABILITIES,Link Capabilities Register" hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER ,PCI express port number" textline " " bitfld.long 0x00 21. " BW_NOTIFY ,Bandwidth notify" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " LINKACTV_REPORTING ,Link active reporting" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SURPRISE_DOWN_ERPT_CAP ,Detecting and reporting a surprise down error condition" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CLOCK_PM ,Component tolerates the removal of any reference clock" "Disabled,Enabled" textline " " bitfld.long 0x00 15.--17. " L1_EXIT_LATENCY ,L1 exit latency" "< 1 us,1 us - 2 us,2 us - 4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us - 64 us,> 64 us" textline " " bitfld.long 0x00 12.--14. " L0S_EXIT_LATENCY ,L0s exit latency" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1 us,1 us - 2 us,2 us - 4us,?..." textline " " bitfld.long 0x00 10.--11. " ACTIVE_STATE_LINK_PM_SUPPORT ,Level of active state power management supported" ",L0s Entry,,L0s and L1" textline " " bitfld.long 0x00 4.--9. " MAX_LINK_WIDTH ,Maximum width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--3. " MAX_LINK_SPEED ,Maximum Link speed" ",2.5 Gb/s Link,?..." else bitfld.long 0x00 0.--3. " MAX_LINK_SPEED ,Maximum Link speed" ",2.5 Gb/s Link,5.0 Gb/s Link,?..." endif textline " " group.long 0x90++0x03 line.long 0x00 "LINK_CONTROL_STATUS,Link Control/Status Register" eventfld.long 0x00 31. " AUTO_BANDWIDTH ,Auto bandwidth" "Disabled,Enabled" textline " " eventfld.long 0x00 30. " BW_MANAGEMENT ,Bandwidth management" "Disabled,Enabled" textline " " rbitfld.long 0x00 29. " DL_LINK_ACTIVE ,Data link control and management state machine" "Not active,Active" textline " " rbitfld.long 0x00 28. " SLOT_CLOCK_CONFIG ,Component uses platform reference clock" "Platform clock,Independent" textline " " rbitfld.long 0x00 27. " LINK_TRAINING ,Link training" "Completed,In progress" textline " " rbitfld.long 0x00 20.--25. " NEG_LINK_WIDTH ,Negotiated width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " LINK_SPEED ,Negotiated Link Speed" ",2.5 Gb/s,5.0 Gb/s,?..." textline " " bitfld.long 0x00 11. " AUTO_BANDWIDTH_INT_EN ,Auto bandwidth interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " BW_MANAGEMENT_INT_EN ,Bandwidth management interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " HW_AUTO_WIDTH_DISABLE ,Hardware auto width disable" "No,Yes" textline " " rbitfld.long 0x00 8. " CLOCK_PM ,Clock PM" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXTENDED_SYNCH ,Forces extended transmission" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMON_CLOCK_CONFIGURATION ,Common clock configuration" "Common reference clock,Asynchrous reference clock" textline " " rbitfld.long 0x00 5. " RETRAIN_LINK ,Link retraining" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LINK_DISABLE ,Disabling the Link" "No,Yes" textline " " rbitfld.long 0x00 3. " READ_COMPLETION_BOUNDARY ,RCB support capabilities" "64 byte,128 byte" textline " " bitfld.long 0x00 0.--1. " ACTIVE_STATE_LINK_PM_CONTROL ,Level of active state PM supported" ",L0s Entry,,L0s and L1" rgroup.long 0x94++0x03 line.long 0x00 "SLOT_CAPABILITIES,Slot Capabilities Register" hexmask.long.word 0x00 19.--31. 0x08 " PHYSICAL_SLOT_NUMBER ,Physical slot number attached to this port" textline " " bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT ,Notification when an issued command is completed by the hot plug controller" "Supported,Not supported" textline " " bitfld.long 0x00 17. " ELECTROMECHANICAL_INTERLOCK_PRESENT ,Electro mechanical interlock mechanism" "Not implemented,Implemented" textline " " bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Upper limit on power supplied by slot" textline " " bitfld.long 0x00 6. " HOT_PLUG_CAPABLE ,Supporting Hot-plug operations" "Not capable,Capable" textline " " bitfld.long 0x00 5. " HOT_PLUG_SURPRISE ,Hot-plug surprise" "Not capable,Capable" textline " " bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT ,Power indicator" "Not Implemented,Implemented" textline " " bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT ,Attention indicator" "Not Implemented,Implemented" textline " " bitfld.long 0x00 2. " MRL_SENSOR_PRESENT ,MRL sensor" "Not Implemented,Implemented" textline " " bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT ,Power controller" "Not Implemented,Implemented" textline " " bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT ,Attention button" "Not Implemented,Implemented" group.long 0x98++0x0B line.long 0x00 "SLOT_CONTROL_STATUS,Slot Control/Status Register" eventfld.long 0x00 24. " DL_LAYER_STATE_CHANGED ,Notification when Data Link Layer Active field is changed" "Disabled,Enabled" textline " " rbitfld.long 0x00 23. " ELECTROMECHANICAL_INTERLOCK_STATE ,Electromechanical interlock" "Disengaged,Engaged" textline " " rbitfld.long 0x00 22. " PRESENCE_DETECT_STATE ,Presence of a card in the slot" "Slot empty,Card present" textline " " rbitfld.long 0x00 21. " MRL_SENSOR_STATE ,MRL sensor status" "MRL Closed,MRL Open" textline " " eventfld.long 0x00 20. " COMMAND_COMPLETED ,Hot-plug controller completed an issued command" "Not completed,Completed" textline " " eventfld.long 0x00 19. " PRESENCE_DETECT_CHANGED ,Presence Detect change" "Not detected,Detected" textline " " eventfld.long 0x00 18. " MRL_SENSOR_CHANGED ,MRL Sensor state change" "Not detected,Detected" textline " " eventfld.long 0x00 17. " POWER_FAULT_DETECTED ,Power fault" "Not detected,Detected" textline " " eventfld.long 0x00 16. " ATTN_BUTTON_PRESSED ,Attention button" "Not pressed,Pressed" textline " " bitfld.long 0x00 12. " DL_LAYER_STATE_CHANGED_ENABLE ,Data Link Layer Link Active field" "Not changed,Changed" textline " " rbitfld.long 0x00 11. " ELECTROMECHANICAL_INTERLOCK_CONTROL ,Electromechanical interlock mechanism" "Not supported,Supported" textline " " bitfld.long 0x00 10. " POWER_CONTROLLER_CONTROL ,Power state of the slot" "Power on,Power off" textline " " bitfld.long 0x00 8.--9. " POWER_INDICATOR_CONTROL ,Current state of the Power Indicator" ",On,Blink,Off" textline " " bitfld.long 0x00 6.--7. " ATTN_INDICATOR_CONTROL ,Current state of the Attention Indicator" ",On,Blink,Off" textline " " bitfld.long 0x00 5. " HOT_PLUG_INTERRUPT_ENABLE ,Generation of hot plug interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMAND_COMPLETED_INTERRUPT_ENABLE ,Generation of hot plug interrupt when a command is completed" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PRESENCE_DETECT_CHANGED_ENABLE ,Presence detect changed event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " STATUS_MRL_SENSOR_CHANGED_ENABLE ,MRL sensor changed event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " POWER_FAULT_DETECTED_ENABLE ,Power fault event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ATTN_BUTTON_PRESSED_ENABLE ,Attention button pressed event interrupt" "Disabled,Enabled" line.long 0x04 "RCR,Root Control Register" bitfld.long 0x04 3. " PME_INT ,PME interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " SERR_FAT ,Generating system error if a fatal error is reported" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SERR_NONFAT ,Generating system error if a non-fatal error is reported" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " SERR_COR ,System error if a correctable error is reported" "Disabled,Enabled" line.long 0x08 "RSR,Root Status Register" rbitfld.long 0x08 17. " PMEPEND ,Another PME is pending when the PMESTAT bit is set" "Not pending,Pending" textline " " eventfld.long 0x08 16. " PMESTAT ,PME was asserted by the requester ID" "Not active,Active" textline " " hexmask.long.word 0x08 0.--15. 1. " REQID ,PCI requester ID of the last PME requester" rgroup.long 0xA4++0x03 line.long 0x00 "DEVICE_CAPABILITIES_2,Root Capabilities Register 2" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) bitfld.long 0x00 11. " LTR_MECH_SUP ,LTR Capability support" "Unsupported,Supported" textline " " endif bitfld.long 0x00 4. " CPL_TO_DIS_SUP ,Support disabling the completion timeout mechanism" "Unsupported,Supported" textline " " bitfld.long 0x00 0.--3. " CPL_TO_RANGES_SUP ,Completion timeout ranges supported by the root port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xA8++0x03 line.long 0x00 "DEVICE_CONTROL_STATUS_2,Device Control/Status Register 2" bitfld.long 0x00 4. " CPL_TO_DISABLE ,Disables completion timeout" "No,Yes" textline " " bitfld.long 0x00 0.--3. " CPL_TO_VALUE ,Completion timeout ranges supported by the root port" "Default,Range A LO,Range A HI,,,Range B LO,Range B HI,?..." group.long 0xB0++0x03 line.long 0x00 "LINK_CONTROL_STATUS_2,Link Control Status Register" rbitfld.long 0x00 16. " CURRENT_DEEMPHASIS_LEVEL ,Current deemphasis level" "6,3.5" textline " " bitfld.long 0x00 12. " COMPLIANCE_DEEMPHASIS ,Compliance deemphasis" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " COMPLIANCE_SOS ,Compliance SOS" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ENTER_MODIFIED_COMPLIANCE ,Transmission of the modified compliance pattern" "Disabled,Enabled" textline " " bitfld.long 0x00 7.--9. " TRANSMIT_MARGIN ,Value of the non-deemphasized voltage level (Full-swing/Half swing)" "800-1200mV/400-600mV,600-800mV/300-400mV,400-600mV/200-300mV,200-400mV/100-200mV,?..." textline " " rbitfld.long 0x00 6. " SELECTABLE_DEEMPHASIS ,Level of de-emphasis" "-6dB,-3.5dB" textline " " rbitfld.long 0x00 5. " HW_AUTO_SPEED_DISABLE ,Link speed change disable" "No,Yes" textline " " bitfld.long 0x00 4. " ENTER_COMPLIANCE ,Forces link to enter compliance mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " TARGET_LINK_SPEED ,Upper limit on the link operational speed" ",2.5Gb/s,5Gb/s,?..." tree.end tree "Error Reporting Capability Registers" width 20. sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) rgroup.long 0x100++0x03 line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register" hexmask.long.word 0x00 20.--31. 1. " NEXT_PTR ,Next PTR" bitfld.long 0x00 16.--19. " VERSION ,Version" "Version 0,Version 1,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " ID ,ID" else rgroup.long 0x100++0x03 line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register" hexmask.long.word 0x00 20.--31. 1. " ID ,ID" bitfld.long 0x00 16.--19. " VERSION ,Version" "Version 0,Version 1,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " NEXT_PTR ,Next PTR" endif group.long 0x104++0x0B line.long 0x00 "ERPTCAP_UCERR,Uncorrectable Error Status Register" eventfld.long 0x00 20. " UNSUP_REQ_ERR ,Unsupported request error status" "No error,Error" eventfld.long 0x00 19. " ECRC_ERR ,ECRC error status" "No error,Error" textline " " eventfld.long 0x00 18. " MF_TLP ,Malformed TLP status" "False,True" eventfld.long 0x00 17. " RCV_OVFL ,Receiver overflow status" "No overflow,Overflow" textline " " eventfld.long 0x00 16. " UNEXP_COMP ,Unexpected completion status" "False,True" eventfld.long 0x00 15. " COMP_ABORT ,Completion abort status" "Not aborted,Aborted" textline " " eventfld.long 0x00 14. " COMP_TO ,Completion timeout status" "No timeout,Timeout" eventfld.long 0x00 13. " FC_PROTO_ERR ,Flow control protocol error status" "No error,Error" textline " " eventfld.long 0x00 12. " POS_TLP ,Poisoned TLP status" "False,True" eventfld.long 0x00 4. " DLINK_PROTO_ERR ,Data link protocol error status" "No error,Error" textline " " rbitfld.long 0x00 0. " TRAINING_ERR ,Training error status" "No error,Error" line.long 0x04 "ERPTCAP_UCERR_MK,Uncorrectable Error Mask Register" bitfld.long 0x04 20. " UNSUP_REQ_ERR ,Unsupported request error mask" "Not masked,Masked" bitfld.long 0x04 19. " ECRC_ERR ,ECRC error mask" "Not masked,Masked" textline " " bitfld.long 0x04 18. " MF_TLP ,Malformed TLP mask" "Not masked,Masked" bitfld.long 0x04 17. " RCV_OVFL ,Receiver overflow mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " UNEXP_COMP ,Unexpected completion mask" "Not masked,Masked" bitfld.long 0x04 15. " COMP_ABORT ,Completion abort mask" "Not masked,Masked" textline " " bitfld.long 0x04 14. " COMP_TO ,Completion timeout mask" "Not masked,Masked" bitfld.long 0x04 13. " PROTO_ERR ,Flow control protocol error mask" "Not masked,Masked" textline " " bitfld.long 0x04 12. " POS_TLP ,Poisoned TLP mask" "Not masked,Masked" bitfld.long 0x04 4. " DLINK_PROTO_ERR ,Data link protocol error mask" "Not masked,Masked" textline " " rbitfld.long 0x04 0. " TRAINING_ERR ,Training error mask" "Not masked,Masked" line.long 0x08 "ERPTCAP_UCERR_SEVR,Correctable Error Severity Register" bitfld.long 0x08 20. " UNSUP_REQ_ERR ,Unsupported request error" "Non-fatal,Fatal" bitfld.long 0x08 19. " ECRC_ERR ,ECRC error" "Non-fatal,Fatal" textline " " bitfld.long 0x08 18. " MF_TLP ,Malformed TLP" "Non-fatal,Fatal" bitfld.long 0x08 17. " RCV_OVFL ,Receiver overflow" "Non-fatal,Fatal" textline " " bitfld.long 0x08 16. " UNEXP_COMP ,Unexpected completion" "Non-fatal,Fatal" bitfld.long 0x08 15. " COMP_ABORT ,Completion abort" "Non-fatal,Fatal" textline " " bitfld.long 0x08 14. " COMP_TO ,Completion timeout" "Non-fatal,Fatal" bitfld.long 0x08 13. " PROTO_ERR ,Flow control protocol error" "Non-fatal,Fatal" textline " " bitfld.long 0x08 12. " POS_TLP ,Poisoned TLP" "Non-fatal,Fatal" bitfld.long 0x08 4. " DLINK_PROTO_ERR ,Data link protocol error" "Non-fatal,Fatal" textline " " rbitfld.long 0x08 0. " TRAINING_ERR ,Training error" "Non-fatal,Fatal" group.long 0x110++0x03 line.long 0x00 "ERPTCAP_CERR,Correctable Error Status Register" eventfld.long 0x00 13. " ADVISORY_NF ,ADVISORY NF status" "Not masked,Masked" eventfld.long 0x00 12. " RPLY_TO ,Replay timer timeout status" "Not masked,Masked" textline " " eventfld.long 0x00 8. " RPLY_RLOV ,Replay NUM rollover status" "Not masked,Masked" eventfld.long 0x00 7. " BAD_DLLP ,Bad DLLP status" "Not masked,Masked" textline " " eventfld.long 0x00 6. " BAD_TLP ,Bad TLP status" "Not masked,Masked" eventfld.long 0x00 0. " RCV_ERR ,Receiver error status" "Not masked,Masked" group.long 0x114++0x03 line.long 0x00 "ERPTCAP_CERR_MK,Correctable Error Mask Register" bitfld.long 0x00 13. " ADVISORY_NF ,ADVISORY NF mask" "Not masked,Masked" bitfld.long 0x00 12. " RPLY_TO ,Replay timer timeout mask" "Not masked,Masked" textline " " bitfld.long 0x00 8. " RPLY_RLOV ,Replay NUM rollover mask" "Not masked,Masked" bitfld.long 0x00 7. " BAD_DLLP ,Bad DLLP mask" "Not masked,Masked" textline " " bitfld.long 0x00 6. " BAD_TLP ,Bad TLP mask" "Not masked,Masked" bitfld.long 0x00 0. " RCV_ERR ,Receiver error mask" "Not masked,Masked" textline " " width 26. group.long 0x118++0x03 line.long 0x00 "ERPTCAP_ADV_ERR_CAP_CNTL,Advanced Error Capabilities And Control Register" bitfld.long 0x00 8. " ECRC_CHK_EN ,ECRC CHK EN" "Disabled,Enabled" rbitfld.long 0x00 7. " ECRC_CHK_CAP ,ECRC CHK CAP" "False,True" textline " " bitfld.long 0x00 6. " ECRC_GEN_EN ,ECRC GEN EN" "Disabled,Enabled" rbitfld.long 0x00 5. " ECRC_GEN_CAP ,ECRC GEN CAP" "False,True" textline " " rbitfld.long 0x00 0.--4. " ERR_PTR ,ERR PTR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x11C++0xF line.long 0x00 "ERPTCAP_HDR_LOG_DW0,Header Log Dword 0 Register" line.long 0x04 "ERPTCAP_HDR_LOG_DW1,Header Log Dword 1 Register" line.long 0x08 "ERPTCAP_HDR_LOG_DW2,Header Log Dword 2 Register" line.long 0x0C "ERPTCAP_HDR_LOG_DW3,Header Log Dword 3 Register" textline " " width 20. group.long 0x12C++0x0B line.long 0x00 "ERPTCAP_ERR_CMD,Root Error Command Register" bitfld.long 0x00 2. " FATAL_ERR_RPT_EN ,Fatal error RPT enable" "Disabled,Enabled" bitfld.long 0x00 1. " NONFATAL_ERR_RPT_EN ,Non fatal error RPT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " COR_ERR_RPT_EN ,Correctable error RPT enable" "Disabled,Enabled" line.long 0x04 "ERPTCAP_ERR_STS,Root Error Status Register" rbitfld.long 0x04 27.--31. " ADV_ERR_INTR_MSG_NUM ,Base and MSI message data offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" eventfld.long 0x04 6. " FATAL_RCVD ,Fatal uncorrectable error messages" "Not received,Received" textline " " eventfld.long 0x04 5. " NONFATAL_RCVD ,Non-fatal uncorrectable error messages" "Not received,Received" eventfld.long 0x04 4. " FIRST_FATAL_RCVD ,First uncorrectable error message" "Not received,Received" textline " " eventfld.long 0x04 3. " MULT_UNCOR_RCVD ,Error is received and UNCOR_RCVD is already set" "False,True" eventfld.long 0x04 2. " STS_UNCOR_RCVD ,Error message" "Not received,Received" textline " " eventfld.long 0x04 1. " MULT_COR_RCVD ,Correctable error message is received and COR_RCVD is already set" "False,True" eventfld.long 0x04 0. " COR_RCVD ,Correctable error" "Not received,Received" line.long 0x08 "ERPTCAP_ERR_ID,Error Source Identification Register" hexmask.long.word 0x08 16.--31. 1. " ERR_COR ,Requestor ID of first correctable error in root error status register " hexmask.long.word 0x08 0.--15. 1. " ERR_UNCOR ,Requestor ID of first uncorrectable error in root error status register " textline " " tree.end width 20. sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) tree "PCI L1 PM Substate Capability Registers" rgroup.long 0x140++0x07 line.long 0x00 "EXT_CAP,Extended Capability Header Register" hexmask.long.word 0x00 20.--31. 0x10 " EXT_CAP_NEXT_CAP ,Offset to the next PCI express capability structure" bitfld.long 0x00 16.--19. " EXT_CAP_VERSION ,PCI-SIG defined version number that indicates the version of the capability structure present" ",L1_SUBSTATES,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " EXT_CAP_ID ,PCI-SIG defined ID number that indicates the nature and format of the extended capability" line.long 0x04 "CAP,Capability Register" bitfld.long 0x04 19.--23. " CAP_T_PWRON_VALUE ,Time (in us) that this Port requires the port on the opposite side of the link to wait" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--17. " CAP_T_PWRON_SCALE ,Specifies the scale used for this port" "2 us,10 us,100 us,?..." textline " " hexmask.long.byte 0x04 8.--15. 1. " CAP_CM_RESTORE_TIME ,Time (in us) required for this port to re-establish common mode" bitfld.long 0x04 4. " CAP_L1_PM_SUBSTATES_SUPPORTED ,L1 PM Substates is supported" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " CAP_ASPM_L1_1_SUPPORTED ,ASPM L1.1 is supported" "Disabled,Enabled" bitfld.long 0x04 2. " CAP_ASPM_L1_2_SUPPORTED ,ASPM L1.2 is is supported" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CAP_PCI_PM_L1_1_SUPPORTED ,PCI-PM L1.1 is supported" "Disabled,Enabled" bitfld.long 0x04 0. " CAP_PCI_PM_L1_2_SUPPORTED ,PCI-PM L1.2 is supported" "Disabled,Enabled" group.long 0x148++0x07 line.long 0x00 "CTRL1,Control 1 Register" bitfld.long 0x00 29.--31. " LTR_L1_2_THRES_SCALE ,Scale for value contained within the LTR_L1.2_THRESHOLD_Value" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 16.--25. 1. " LTR1_2_THRESH_VAL ,Threshold value" textline " " hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME ,Restore time" bitfld.long 0x00 3. " ASPM_L1_1_EN ,ASPM L1.1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ASPM_L1_2_EN ,ASPM L1.2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " PCIPM_L1_1_EN ,PCIPM L1.1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PCIPM_L1_2_EN ,PCIPM L1.2 enable" "Disabled,Enabled" line.long 0x04 "CTRL2,Control 2 Register" bitfld.long 0x04 3.--7. " T_PWRON_VALUE ,Minimum amount of time (in us) that the Port must wait in L1.2.Exit after sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--1. " T_PWRON_SCALE ,Scale used for the port T_POWER_ON Valuse field in the L1 PM Substates Capabilities register" "2 us,10 us,100 us,?..." tree.end endif tree "NVIDIA Private Registers" width 20. group.long 0x494++0x03 line.long 0x00 "PRIV_XP_DL_0,Various Configurable Registers In The Data Link layer" hexmask.long.word 0x00 19.--29. 1. " GEN2_REPLAY_TIMER_LIMIT ,Replay timer limit" hexmask.long.word 0x00 10.--18. 1. " GEN2_ACK_TIMER_LIMIT ,ACK timer limit" textline " " hexmask.long.word 0x00 1.--9. 1. " GEN2_UPDATE_FC_THRESHOLD ,Update FC frequency" bitfld.long 0x00 0. " GEN2_DL_TIMERS_DISABLE ,Enables the Gen2 DL timer settings" "No,Yes" textline " " width 34. sif (cpuis("TEGRAX1")) rgroup.long 0xC10++0x0F line.long 0x00 "T_PCIE2_RP_LTR_REP_VAL,T_PCIE2_RP_LTR_REP_VAL" hexmask.long.word 0x00 16.--31. 1. " T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP ,T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP" textline " " hexmask.long.word 0x00 0.--15. 1. " T_PCIE2_RP_LTR_REP_VAL_SNOOP ,T_PCIE2_RP_LTR_REP_VAL_SNOOP" line.long 0x04 "T_PCIE2_RP_L1_1_ENTRY_COUNT,T_PCIE2_RP_L1_1_ENTRY_COUNT" bitfld.long 0x04 31. " T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET ,T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x04 30. " T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE" line.long 0x08 "T_PCIE2_RP_L1_2_ENTRY_COUNT,T_PCIE2_RP_L1_2_ENTRY_COUNT" bitfld.long 0x08 31. " T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET ,T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x08 30. " T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x08 0.--15. 1. " T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE" line.long 0x0C "T_PCIE2_RP_L1_2_ABORT_COUNT,T_PCIE2_RP_L1_2_ABORT_COUNT" bitfld.long 0x0C 31. " T_PCIE2_RP_L1_2_ABORT_COUNT_RESET ,T_PCIE2_RP_L1_2_ABORT_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x0C 30. " T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x0C 0.--15. 1. " T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE ,0 T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE" textline " " elif cpuis("TEGRAX2") width 27. group.long 0xC00++0x0F line.long 0x00 "L1_PM_SUBSTATES_CYA,L1 PM Substates CYA Register" bitfld.long 0x00 26. " REFCLK_ON_WITH_PAD_PLL_LOCK ,Refclk on with pad PLL lock" "Not locked,Locked" bitfld.long 0x00 25. " REFCLK_ON_WITH_PLLE_LOCK ,Refclk on with PLLE lock" "Not locked,Locked" textline " " bitfld.long 0x00 24. " HIDE_CAP ,Hide capability of L1 PM substates" "Not hidden,Hidden" bitfld.long 0x00 19.--23. " T_PWRON_VALUE ,Time (in us) that this port requires the port on the opposite side of link to wait in L1.2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--17. " T_PWRON_SCALE ,Specifies the scale used for the port T_POWER_ON value field in the L1 PM substates capabilities register" "2 us,10 us,100 us,?..." hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME ,Time (in us) required for this port to re-establish common mode as described in table in the L1 PM substates ECN" textline " " bitfld.long 0x00 4. " L1_PM_SUBSTATES ,L1 PM Substates support enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASPM_L1_1 ,ASPM L1.1 support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ASPM_L1_2 ,ASPM L1.2 support enable" "Disabled,Enabled" bitfld.long 0x00 1. " PCI_PM_L1_1 ,PCI-PM L1.1 support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PCI_PM_L1_2 ,PCI-PM L1.2 support enable" "Disabled,Enabled" line.long 0x04 "L1_PM_SUBSTATES_1_CYA,L1 PM Substates 1 CYA Register" bitfld.long 0x04 22. " RX_TERM_EN_IN_L1_2 ,Receiver PAD termination when in L1.2 enable" "Disabled,Enabled" hexmask.long.word 0x04 13.--21. 1. " CHK_CLKREQ_ASSERTED_DLY ,Amount of time the DUT waits in L1.2" textline " " hexmask.long.word 0x04 0.--12. 1. " T_PWR_OFF_DLY ,T POWER ON DELY diagnostic amount of time the DUT waits in L1.2_entry before it enters L1.2_idle" line.long 0x08 "L1_PM_SUBSTATES_2_CYA,L1 PM Substates 2 CYA Register" bitfld.long 0x08 21.--24. " MICROSECOND_COMP ,Compensation value of the crystal oscillator frequency in microsecond tick generator used for REFCLK_ON time and common-mode turn ON time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 13.--20. 1. " MICROSECOND ,Microsecond diagnostic bit number of clocks in a microsecond in clk25m" textline " " hexmask.long.word 0x08 0.--12. 1. " T_L1_2_DLY ,T L1.2 delay diagnostic" line.long 0x0C "L1_PM_SUBSTATES_3_CYA,L1 PM Substates 3 CYA Register" hexmask.long.word 0x0C 18.--30. 1. " L11_T_REFCLK_ON ,Number of microseconds the port must wait in L1.1 to enable refclk after clkreq# has been asserted" bitfld.long 0x0C 17. " L11_T_REFCLK_ON_ENABLE ,Refclk clock timer logic when in L1.1 after seeing deassertion of clkreq# enable" "Disabled,Enabled" textline " " hexmask.long.word 0x0C 4.--16. 1. " L12_T_REFCLK_ON ,Number of microseconds the port must wait to enable refclk after clkreq# has been asserted" bitfld.long 0x0C 3. " PCIPM_L1_2 ,PCIMPM L1.2 functionality enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " ASPM_L1_2 ,ASPM L1.2 functionality enable" "Disabled,Enabled" bitfld.long 0x0C 1. " PCIPM_L1_1 ,PCIPM L1.1 functionality enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " ASPM_L1_1 ,ASPM L1.1 functionality enable" "Disabled,Enabled" rgroup.long 0xC10++0x03 line.long 0x00 "LTR_REP_VAL,LTR Reported Value Register" hexmask.long.word 0x00 16.--31. 1. " NO_SNOOP ,Value for no snoop" hexmask.long.word 0x00 0.--15. 1. " SNOOP ,Value for snoop" group.long 0xC14++0x17 line.long 0x00 "L1_1_ENTRY_COUNT,L1.1 Entry Count Register" bitfld.long 0x00 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x00 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x00 0.--15. 1. " VALUE ,Number of times the link entered the L1.1 state" line.long 0x04 "L1_2_ENTRY_COUNT,L1.2 Entry Count Register" bitfld.long 0x04 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x04 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x04 0.--15. 1. " VALUE ,Number of times the link entered L1.2 ENTRY state" line.long 0x08 "L1_2_ABORT_COUNT,L1.2 Abort Count Register" bitfld.long 0x08 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x08 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x08 0.--15. 1. " VALUE ,Number of times the link entered the L1.2 ENTRY state" line.long 0x0C "LTR_OVERRIDE,LTR Override Register" hexmask.long.word 0x0C 16.--31. 1. " NO_SNOOP ,LTR override no snoop value" hexmask.long.word 0x0C 0.--15. 1. " SNOOP ,LTR override snoop value" line.long 0x10 "L1SS_SPARE,L1SS Spare Register" hexmask.long.word 0x10 18.--31. 1. " SPARE2 ,Spare 2" eventfld.long 0x10 17. " LTR_MSG_RCV_STS ,LTR MSG RCV STS" "No effect,Cleared" textline " " bitfld.long 0x10 16. " LTR_MSG_INT_EN ,LTR MSG INT enable" "Disabled,Enabled" hexmask.long.word 0x10 2.--15. 1. " SPARE1 ,Spare 1" textline " " bitfld.long 0x10 1. " LTR_OVERRIDE_NO_SNOOP_EN ,LTR override no snoop enable" "Disabled,Enabled" bitfld.long 0x10 0. " LTR_OVERRIDE_SNOOP_EN ,LTR override snoop enable" "Disabled,Enabled" line.long 0x14 "SLCG_OVERRIDE_DIS_SLCG,SLCG Override Disable SLCG Register" bitfld.long 0x14 22. " PRI_CLK ,PRI CLK enable" "Disabled,Enabled" bitfld.long 0x14 21. " TMS0_UFPCI_CLK ,TMS0 UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 20. " TMS0_DFPCI_CLK ,TMS0 DFPCI CLK enable" "Disabled,Enabled" bitfld.long 0x14 19. " TMS0C2_XTXCLK1X ,TMS0C2 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 18. " TMS0C2_XCLK ,TMS0C2 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 17. " TMS0C1_XTXCLK1X ,TMS0C1 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " TMS0C1_XCLK ,TMS0C1 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 15. " TMS0C0_XTXCLK1X ,TMS0C0 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " TMS0C0_XCLK ,TMS0C0 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 13. " TMSC0_XCLK ,TMSC0 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " T0C2_PCA_XCLK ,T0C2 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 11. " T0C2_PCA_UFPCI_CLK ,T0C2 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " T0C1_PCA_XCLK ,T0C1 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 9. " T0C1_PCA_UFPCI_CLK ,T0C1 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " T0C0_PCA_XCLK ,T0C0 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 7. " T0C0_PCA_UFPCI_CLK ,T0C0 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 6. " GRP2_XTXCLK1X ,GRP2 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 5. " GRP2_XCLK ,GRP2 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " GRP1_XTXCLK1X ,GRP1 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 3. " GRP1_XCLK ,GRP1 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " GRP0_XTXCLK1X ,GRP0 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 1. " GRP0_XCLK ,GRP0 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " CLK25M ,CLK25M enable" "Disabled,Enabled" group.long 0xD00++0x1B line.long 0x00 "DBG0,Debug 0" line.long 0x04 "DBG1,Debug 1" line.long 0x08 "DBG2,Debug 2" line.long 0x0C "DBG3,Debug 3" line.long 0x10 "DBG4,Debug 4" line.long 0x14 "DBG5,Debug 5" line.long 0x18 "DBG6,Debug 6" bitfld.long 0x18 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x18 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " hexmask.long 0x18 0.--29. 1. " CTL ,Control" rgroup.long 0xD1C++0x03 line.long 0x00 "DBG_RD_BACK_LO,Debug RD Back LO" group.long 0xD20++0x1B line.long 0x00 "DBG_RD_BACK_HI,Debug RD Back HI" line.long 0x04 "LANE_DBG0,Lane Debug 0" line.long 0x08 "LANE_DBG1,Lane Debug 1" line.long 0x0C "LANE_DBG2,Lane Debug 2" line.long 0x10 "LANE_DBG3,Lane Debug 3" line.long 0x14 "LANE_DBG4,Lane Debug 4" line.long 0x18 "LANE_DBG5,Lane Debug 5" bitfld.long 0x18 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x18 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " hexmask.long 0x18 0.--29. 1. " CTL ,Control" rgroup.long 0xD3C++0x07 line.long 0x00 "LANE_DBG_RD_BACK_LO_VALUE,Lane Debug RD Back LO Value" line.long 0x04 "LANE_DBG_RD_BACK_HI_VALUE,Lane Debug RD Back HI Value" group.long 0xD44++0x0B line.long 0x00 "LINK_DBG0,Link Debug 0" line.long 0x04 "LINK_DBG1,Link Debug 1" line.long 0x08 "LINK_DBG2,Link Debug 2" bitfld.long 0x08 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x08 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " CTL ,Control" "0,1" rgroup.long 0xD50++0x07 line.long 0x00 "LINK_DBG_RD_BACK_LO_VALUE,Link Debug RD Back LO Value" line.long 0x04 "LINK_DBG_RD_BACK_HI_VALUE,Link Debug RD Back HI Value" endif width 27. group.long 0xD5C++0x03 line.long 0x00 "PIPE_CTL,Controls (enabling /disabling) the pipelines added to meet timing on various interfaces" bitfld.long 0x00 8. " UFA2WRR_PWTOP ,UFA2WRR PWTOP enable" "Disabled,Enabled" bitfld.long 0x00 7. " UBFI2DFI_P2P ,UBFI2DFI P2P enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TXBA2DFI_WR ,TXBA2DFI WR enable" "Disabled,Enabled" bitfld.long 0x00 5. " CMDQ2UFARB ,CMDQ2UFARB enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " UBFI2DFI_NTT ,UBFI2DFI NTT enable" "Disabled,Enabled" bitfld.long 0x00 3. " PCA ,PCA enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DFIREQ ,DFIREQ enable" "Disabled,Enabled" bitfld.long 0x00 1. " DFIRSP ,DFIRSP enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DFI2UBFI ,DFI2UBFI enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0xD60++0x07 line.long 0x00 "XP_BUST_TRIG1,XP Bust Trigger 1" bitfld.long 0x00 25. " L02RCVRY_L0S_FTS_TO ,Allows bus tracer trigger when getting FTS timeout in L0.0s" "Not allowed,Allowed" bitfld.long 0x00 24. " L02RCVRY_TS_DET ,Allows bus tracer trigger when receiving TS in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 23. " L02RCVRY_SURPRISE_EIDLE ,Allows bus tracer trigger when seeing surprise eidle in L0" "Not allowed,Allowed" bitfld.long 0x00 22. " L02RCVRY_8B10B_ERR ,Allows bus tracer trigger when receiving 8b10b error in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 21. " L02RCVRY_ADVERTISEDRATECHANGE ,Allows bus tracer trigger at advertised rate change in L0" "Not allowed,Allowed" bitfld.long 0x00 20. " L02RCVRY_DL_RETRAIN ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " L02RCVRY_LPBK ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed" bitfld.long 0x00 18. " L02RCVRY_SPEEDCHANGE ,Allows bus tracer trigger at speed change in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 17. " L02RCVRY_WIDTHCHANGE ,Allows bus tracer trigger at width change in L0" "Not allowed,Allowed" bitfld.long 0x00 16. " L02RCVRY_LINK_RETRAIN ,Allows bus tracer trigger at link retraining in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 13.--15. " CUST_TRANSITION_TO_MINOR_ST ,Mirror TO state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-" textline " " bitfld.long 0x00 10.--12. " CUST_TRANSITION_FROM_MINOR_ST ,Mirror FROM state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-" textline " " bitfld.long 0x00 6.--9. " CUST_TRANSITION_TO_MAJOR_ST ,Major TO state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..." bitfld.long 0x00 2.--5. " CUST_TRANSITION_FROM_MAJOR_ST ,Major FROM state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..." textline " " bitfld.long 0x00 1. " RX_EN ,Bus tracer trigger receive enable" "Disabled,Enabled" bitfld.long 0x00 0. " TX_EN ,Bus tracer trigger receive enable" "Disabled,Enabled" line.long 0x04 "XP_BUST_TRIG2,XP BUST Trigger 2" bitfld.long 0x04 31. " REPLAY_TIMER_EXPIRED_ERR ,REPLA timer expired error" "No error,Error" bitfld.long 0x04 30. " SA_ERR ,SA error" "No error,Error" textline " " bitfld.long 0x04 29. " DESKEW_ERR ,DESKEW error" "No error,Error" bitfld.long 0x04 28. " TRAINING_ERR ,Training error" "No error,Error" textline " " bitfld.long 0x04 27. " DPLLP_CRC_ERR ,DPLLP CRC error" "No error,Error" bitfld.long 0x04 26. " 8B10B_ERR ,8B10B error" "No error,Error" textline " " bitfld.long 0x04 25. " REPLAY_STARTED_ERR ,REPLAY started error" "No error,Error" bitfld.long 0x04 24. " ROLLOVER_ERR ,ROLLOVER error" "No error,Error" textline " " bitfld.long 0x04 23. " PWH_UPDATE_FC_ERR ,PWH update FC error" "No error,Error" bitfld.long 0x04 22. " PWH_TOO_MANY_CREDITS_ERR ,PWH too many credits error" "No error,Error" textline " " bitfld.long 0x04 21. " PWD_UPDATE_FC_ERR ,PWD update FC error" "No error,Error" bitfld.long 0x04 20. " PWD_TOO_MANY_CREDITS_ERR ,PWD too many credits error" "No error,Error" textline " " bitfld.long 0x04 19. " NPH_UPDATE_FC_ERR ,NPH update FC error" "No error,Error" bitfld.long 0x04 18. " NPH_TOO_MANY_CREDITS_ERR ,NPH too many credits error" "No error,Error" textline " " bitfld.long 0x04 17. " NPD_UPDATE_FC_ERR ,NPD update FC error" "No error,Error" bitfld.long 0x04 16. " NPD_TOO_MANY_CREDITS_ERR ,NPD too many credits error" "No error,Error" textline " " bitfld.long 0x04 15. " CH_UPDATE_FC_ERR ,CH update FC error" "No error,Error" bitfld.long 0x04 14. " CH_TOO_MANY_CREDITS_ERR ,CH too many credits error" "No error,Error" textline " " bitfld.long 0x04 13. " CD_UPDATE_FC_ERR ,CD update FC error" "No error,Error" bitfld.long 0x04 12. " CD_TOO_MANY_CREDITS_ERR ,CD too many credits error" "No error,Error" textline " " bitfld.long 0x04 11. " REC_OVFL_ISOPW_DATA_ERR ,REC overflow ISOPW data error" "No error,Error" bitfld.long 0x04 10. " REC_OVFL_ISOPW_HDR_ERR ,REC overflow ISOPW HDR error" "No error,Error" textline " " bitfld.long 0x04 9. " REC_OVFL_ISONP_HDR_ERR ,REC overflow ISONP HDR error" "No error,Error" bitfld.long 0x04 8. " REC_OVFL_CPL_DATA_ERR ,REC overflow CPL data error" "No error,Error" textline " " bitfld.long 0x04 7. " REC_OVFL_PW_DATA_ERR ,REC overflow PW data error" "No error,Error" bitfld.long 0x04 6. " REC_OVFL_NP_DATA_ERR ,REC overflow NP data error" "No error,Error" textline " " bitfld.long 0x04 5. " REC_OVFL_CPL_HDR_ERR ,REC overflow CPL HDR error" "No error,Error" bitfld.long 0x04 4. " REC_OVFL_PW_HDR_ERR ,REC overflow PW HDR error" "No error,Error" textline " " bitfld.long 0x04 3. " REC_OVFL_NP_HDR_ERR ,REC_OVFL_NP_HDR_ERR error" "No error,Error" bitfld.long 0x04 2. " FRAMING_ERR ,Framing error" "No error,Error" textline " " bitfld.long 0x04 1. " SEQ_ERR ,SEQ error" "No error,Error" bitfld.long 0x04 0. " LCRC_ERR ,LCRC error" "No error,Error" rgroup.long 0xD68++0x03 line.long 0x00 "XP_DEBUG,XP Debug" bitfld.long 0x00 0.--1. " RX_CAL_STATUS ,Receiver CAL status" "Idle,Pending,Done,Disabled" endif tree.end tree "Vendor-Defined Registers" width 20. group.long 0xE00++0x2B line.long 0x00 "RX_HDR_LIMIT,RX HDR Limit" hexmask.long.byte 0x00 16.--23. 1. " CPL ,Completion header buffer size" hexmask.long.byte 0x00 8.--15. 1. " PW ,Posted write header buffer size" textline " " hexmask.long.byte 0x00 0.--7. 1. " NP ,Non-posted header buffer size" line.long 0x04 "RX_DATA_LIMIT,RX Data Limit" hexmask.long.byte 0x04 20.--27. 1. " CPL ,Completion data buffer size" hexmask.long.word 0x04 8.--19. 1. " PW ,Posted write data buffer size" textline " " hexmask.long.byte 0x04 0.--7. 1. " NP ,Non-posted write header buffer size" line.long 0x08 "TX_HDR_LIMIT,TX HDR Limit" sif (cpuis("TEGRAX2")) hexmask.long.byte 0x08 24.--31. 1. " NPT ,TX HDR limit NPT" textline " " hexmask.long.byte 0x08 16.--23. 1. " CPL ,Size of the downstream completions header buffer" else hexmask.long.byte 0x08 16.--23. 1. " NP ,Size of the downstream non posted header buffer" endif hexmask.long.byte 0x08 8.--15. 1. " PW ,Size of the downstream posted writes header buffer" textline " " hexmask.long.byte 0x08 0.--7. 1. " NP ,Size of the downstream non posted header buffer" line.long 0x0C "TX_DATA_LIMIT,TX Data Limit" hexmask.long.byte 0x0C 8.--15. 1. " PW ,Size of the downstream Posted Writes Data Buffer" hexmask.long.byte 0x0C 0.--7. 1. " NP ,Size of the downstream Non Posted Data Buffer" line.long 0x10 "UFPCI,Upstream FPCI Control Register" bitfld.long 0x10 23.--27. " ISO_WEIGHT ,ISO weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 22. " ISO_CONTROL_ENABLE ,ISO control enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " ISOPW2HPISO ,Convert posted writes" "Disabled,Enabled" bitfld.long 0x10 20. " ISONP2HPISO ,Convert non-posted reads" "Disabled,Enabled" textline " " hexmask.long.byte 0x10 12.--19. 1. " REQ_PEND_PERIOD ,Timers are reset when they hit the value" bitfld.long 0x10 10.--11. " WRR_GRANT_BURST ,Time for arbitration within a TMS" "0,1,2,3" textline " " bitfld.long 0x10 5.--9. " PW_PRI_OVR_COUNT ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. " PW_STARV_COUNT ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "MISC0,Miscellaneous Register 0" bitfld.long 0x14 31. " SHORT_RXL_TIMER ,Completion timeout feature in RXL test" "Disabled,Enabled" bitfld.long 0x14 30. " P2P_SMALL_ISA_HOLE ,P2P settings control" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " P2P_F ,Transactions (64'hF_XXXX)" "0,1" bitfld.long 0x14 28. " P2P_E ,Transactions (64'hE_XXXX)" "0,1" textline " " bitfld.long 0x14 27. " P2P_D ,Transactions (64'hD_XXXX)" "0,1" bitfld.long 0x14 26. " P2P_C ,Transactions (64'hC_XXXX)" "0,1" textline " " bitfld.long 0x14 25. " P2P_B ,Transactions (64'hB_XXXX)" "0,1" bitfld.long 0x14 24. " P2P_A ,Transactions (64'hA_XXXX)" "0,1" textline " " bitfld.long 0x14 23. " NISONC2HPISO ,Upgrade to HPISO Read" "Disabled,Enabled" bitfld.long 0x14 21. " AUTO_XCLK_FREQ_EN ,XCLK frequency dynamic switch" "Disabled,Enabled" textline " " bitfld.long 0x14 20. " RXL_CLEAR_DROP ,Receiver DROP ALL status clear" "Disabled,Enabled" sif (cpuis("TEGRAX2")) hexmask.long.word 0x14 4.--19. 1. " ISO_PW_ENABLE[1] ,Enables ISO PW [1] transactions for packets with TC >= TC2ISOMAP" endif textline " " bitfld.long 0x14 3. " ISO_PW_ENABLE ,Enables ISO PW transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " ISO_NP_ENABLE ,Enables ISO NP transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled" bitfld.long 0x14 1. " NATIVE_P2P_ENABLE ,Enables native peer2peer transactions" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " ENABLE_CLUMPING ,Enables unitid clumping" "Disabled,Enabled" line.long 0x18 "TXBA0,TXBA0 Register" hexmask.long.word 0x18 16.--31. 1. " REPLAY_TIMER_EXPIRY ,Replay timer expiry" bitfld.long 0x18 12. " USE_REPLAY_TIMER_OFFSET ,Use replay timer offset" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " CMPL_MERGE_UPTO_64DW ,Merge completions upto 64DW payloads" "Disabled,Enabled" bitfld.long 0x18 10. " CMPL_MERGE_UPTO_32DW ,Merge completions upto 32DW payloads" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " CMPL_MERGE_DISABLE ,Disables completion merging" "No,Yes" hexmask.long.word 0x18 0.--8. 1. " REPLAY_BUF_LIMIT ,Replay buffer limit" line.long 0x1C "TXBA1,TXBA1 Register" sif (cpuis("TEGRAX2")) hexmask.long.word 0x1C 8.--16. 1. " MERGE_THRESHOLD ,Merge threshold" else hexmask.long.byte 0x1C 8.--15. 1. " MERGE_THRESHOLD ,Merge threshold" textfld " " endif bitfld.long 0x1C 4.--7. " CM_OVER_PW_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rbitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x20 "FORCEFC,FC Priority Flip Threshold Register" hexmask.long.byte 0x20 24.--31. 1. " NPD_UNRET_THRESH ,NPD UNRET THRESH" hexmask.long.byte 0x20 16.--23. 1. " NPH_UNRET_THRESH ,NPH UNRET THRESH" textline " " hexmask.long.byte 0x20 8.--15. 1. " PWD_UNRET_THRESH ,PWD UNRET THRESH" hexmask.long.byte 0x20 0.--7. 1. " PWH_UNRET_THRESH ,PWH UNRET THRESH" line.long 0x24 "TIMEOUT0,LINK LTSSM Timeout 0 Register" hexmask.long.byte 0x24 24.--31. 1. " PAD_SPDCHNG_GEN2 ,Time to wait for pads to change speed from Gen1 to Gen2" hexmask.long.word 0x24 8.--23. 1. " PAD_PWRUP_CM ,Time to power up pads (no common-mode voltage during power down)" textline " " hexmask.long.byte 0x24 0.--7. 1. " PAD_PWRUP ,Time to power up pads (common-mode voltage during power down)" line.long 0x28 "TIMEOUT1,LINK LTSSM Timeout 1. Register" hexmask.long.byte 0x28 24.--31. 1. " RCVRY_SPD_UNSUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change" hexmask.long.byte 0x28 16.--23. 1. " RCVRY_SPD_SUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change" textline " " hexmask.long.word 0x28 0.--15. 1. " PAD_SPDCHNG_GEN1 ,Wait time for pads to change speed from Gen2 to Gen1" rgroup.long 0xE34++0x03 line.long 0x00 "PRBS,PRBS Results Register" hexmask.long.word 0x00 16.--31. 1. " LOCKED ,Locks lanes onto the incoming PRBS pattern" hexmask.long.word 0x00 0.--15. 1. " ERR_COUNT_OVERFLOW ,Number of bit mismatches during PRBS run" group.long 0xE38++0x03 line.long 0x00 "PRBS_ERR,PRBS Results Register" hexmask.long.word 0x00 16.--31. 1. " COUNT ,Number of bit errors detected in the incoming PRBS stream" bitfld.long 0x00 0.--3. " SELECT ,Selects which lane number's Error Count shows up in the ERR_COUNT register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " width 22. group.long 0xE3C++0x27 line.long 0x00 "EIDLE_INFER_TO_0,EIDLE Inference Timeout Register 0" hexmask.long.word 0x00 16.--31. 1. " RCVRCFG_SUC_SPEED ,Infer E-Idle after this amount of time while in recovery" hexmask.long.word 0x00 0.--15. 1. " L0_LPBK ,Infer E-Idle after this amount of time while in L0 or loopback" line.long 0x04 "EIDLE_INFER_TO_1,EIDLE Inference Timeout Register 1" hexmask.long.word 0x04 16.--31. 1. " UNSUC_SPEED_GEN2 ,Infer E-Idle after this amount of time while in recovery" hexmask.long.word 0x04 0.--15. 1. " UNSUC_SPEED_GEN1 ,Infer E-Idle after this amount of time while in recovery" line.long 0x08 "LTSSM_DBGREG,LTSSM Debug Register" eventfld.long 0x08 31. " LINKFSM[31] ,LINKFSM31" "Init,Clear" eventfld.long 0x08 30. " [30] ,LINKFSM30" "Init,Clear" textline " " eventfld.long 0x08 29. " [29] ,LINKFSM29" "Init,Clear" eventfld.long 0x08 28. " [28] ,LINKFSM28" "Init,Clear" textline " " eventfld.long 0x08 27. " [27] ,LINKFSM27" "Init,Clear" eventfld.long 0x08 26. " [26] ,LINKFSM26" "Init,Clear" textline " " eventfld.long 0x08 25. " [25] ,LINKFSM25" "Init,Clear" eventfld.long 0x08 24. " [24] ,LINKFSM24" "Init,Clear" textline " " eventfld.long 0x08 23. " [23] ,LINKFSM23" "Init,Clear" eventfld.long 0x08 22. " [22] ,LINKFSM22" "Init,Clear" textline " " eventfld.long 0x08 21. " [21] ,LINKFSM21" "Init,Clear" eventfld.long 0x08 20. " [20] ,LINKFSM20" "Init,Clear" textline " " eventfld.long 0x08 19. " [19] ,LINKFSM19" "Init,Clear" eventfld.long 0x08 18. " [18] ,LINKFSM18" "Init,Clear" textline " " eventfld.long 0x08 17. " [17] ,LINKFSM17" "Init,Clear" eventfld.long 0x08 16. " [16] ,LINKFSM16" "Init,Clear" textline " " eventfld.long 0x08 15. " [15] ,LINKFSM15" "Init,Clear" eventfld.long 0x08 14. " [14] ,LINKFSM14" "Init,Clear" textline " " eventfld.long 0x08 13. " [13] ,LINKFSM13" "Init,Clear" eventfld.long 0x08 12. " [12] ,LINKFSM12" "Init,Clear" textline " " eventfld.long 0x08 11. " [11] ,LINKFSM11" "Init,Clear" eventfld.long 0x08 10. " [10] ,LINKFSM10" "Init,Clear" textline " " eventfld.long 0x08 9. " [9] ,LINKFSM9" "Init,Clear" eventfld.long 0x08 8. " [8] ,LINKFSM8" "Init,Clear" textline " " eventfld.long 0x08 7. " [7] ,LINKFSM7" "Init,Clear" eventfld.long 0x08 6. " [6] ,LINKFSM6" "Init,Clear" textline " " eventfld.long 0x08 5. " [5] ,LINKFSM5" "Init,Clear" eventfld.long 0x08 4. " [4] ,LINKFSM4" "Init,Clear" textline " " eventfld.long 0x08 3. " [3] ,LINKFSM3" "Init,Clear" eventfld.long 0x08 2. " [2] ,LINKFSM2" "Init,Clear" textline " " eventfld.long 0x08 1. " [1] ,LINKFSM1" "Init,Clear" eventfld.long 0x08 0. " [0] ,LINKFSM0" "Init,Clear" line.long 0x0C "PRIV_ERRSTS,Detailed Private Error Status Register" eventfld.long 0x0C 31. " REPLAY_TIMER_EXPIRED_ERR ,Replay timer expired error" "No error,Error" eventfld.long 0x0C 30. " SA_ERR ,SA error" "No error,Error" textline " " eventfld.long 0x0C 29. " DESKEW_ERR ,DESKEW error" "No error,Error" eventfld.long 0x0C 28. " TRAINING_ERR ,Training error" "No error,Error" textline " " eventfld.long 0x0C 27. " DLLP_CRC_ERR ,DLLP CRC error" "No error,Error" eventfld.long 0x0C 26. " 8B10B_ERR ,8B10B error" "No error,Error" textline " " eventfld.long 0x0C 25. " REPLAY_STARTED_ERR ,Replay started error" "No error,Error" eventfld.long 0x0C 24. " REPLAY_ROLLOVER_ERR ,Replay rollover error" "No error,Error" textline " " eventfld.long 0x0C 23. " PWH_UPDATE_FC_ERR ,PWH update FC error" "No error,Error" eventfld.long 0x0C 22. " PWH_TOO_MANY_CREDITS_ERR ,PWH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 21. " PWD_UPDATE_FC_ERR ,PWD update FC error" "No error,Error" eventfld.long 0x0C 20. " PWD_TOO_MANY_CREDITS_ERR ,PWD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 19. " NPH_UPDATE_FC_ERR ,NPH update FC error" "No error,Error" eventfld.long 0x0C 18. " NPH_TOO_MANY_CREDITS_ERR ,NPH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 17. " NPD_UPDATE_FC_ERR ,NPD update FC error" "No error,Error" eventfld.long 0x0C 16. " NPD_TOO_MANY_CREDITS_ERR ,NPD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 15. " CH_UPDATE_FC_ERR ,CH update FC error" "No error,Error" eventfld.long 0x0C 14. " CH_TOO_MANY_CREDITS_ERR ,CH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 13. " CD_UPDATE_FC_ERR ,CD update FC error" "No error,Error" eventfld.long 0x0C 12. " CD_TOO_MANY_CREDITS_ERR ,CD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 11. " REC_OVFL_ISOPW_DATA_ERR ,REC overflow ISOPW data error" "No error,Error" eventfld.long 0x0C 10. " REC_OVFL_ISOPW_HDR_ERR ,REC overflow ISOPW HDR error" "No error,Error" textline " " eventfld.long 0x0C 9. " REC_OVFL_ISONP_HDR_ERR ,REC overflow ISONP HDR error" "No error,Error" eventfld.long 0x0C 8. " REC_OVFL_CPL_DATA_ERR ,REC overflow CPL data error" "No error,Error" textline " " eventfld.long 0x0C 7. " REC_OVFL_PW_DATA_ERR ,REC overflow PW data error" "No error,Error" eventfld.long 0x0C 6. " REC_OVFL_NP_DATA_ERR ,REC overflow NP data error" "No error,Error" textline " " eventfld.long 0x0C 5. " REC_OVFL_CPL_HDR_ERR ,REC overflow CPL HDR error" "No error,Error" eventfld.long 0x0C 4. " REC_OVFL_PW_HDR_ERR ,REC overflow PW HDR error" "No error,Error" textline " " eventfld.long 0x0C 3. " REC_OVFL_NP_HDR_ERR ,REC overflow NP HDR error" "No error,Error" eventfld.long 0x0C 2. " FRAMING_ERR ,Framing error" "No error,Error" textline " " eventfld.long 0x0C 1. " SEQ_ERR ,SEQ error" "No error,Error" eventfld.long 0x0C 0. " LCRC_ERR ,LCRC error" "No error,Error" line.long 0x10 "PRIV_ERRMSK,Detailed Private Error Mask Register" bitfld.long 0x10 31. " REPLAY_TIMER_EXPIRED_ERR_EN ,Replay timer expired error enable" "Disabled,Enabled" bitfld.long 0x10 30. " SA_ERR_EN ,SA error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " DLLP_CRC_ERR_EN ,DLLP CRC error enable" "Disabled,Enabled" bitfld.long 0x10 26. " 8B10B_ERR_EN ,8B10B error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 24. " REPLAY_ROLLOVER_ERR_EN ,Replay rollover error enable" "Disabled,Enabled" bitfld.long 0x10 23. " PWH_UPDATE_FC_ERR_EN ,PWH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " PWD_TOO_MANY_CREDITS_ERR_EN ,PWD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 21. " PWD_UPDATE_FC_ERR_EN ,PWD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 20. " PWD_TOO_MANY_CREDITS_ERR_EN ,PWD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 19. " NPH_UPDATE_FC_ERR_EN ,NPH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 18. " NPH_TOO_MANY_CREDITS_ERR_EN ,NPH too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 17. " NPD_UPDATE_FC_ERR_EN ,NPD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " NPD_TOO_MANY_CREDITS_ERR_EN ,NPD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 15. " CH_UPDATE_FC_ERR_EN ,CH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " CH_TOO_MANY_CREDITS_ERR_EN ,CH too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 13. " CD_UPDATE_FC_ERR_EN ,CD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 12. " CD_TOO_MANY_CREDITS_ERR_EN ,CD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 11. " DLL_PROTOCOL_ERR_EN ,DLL protocol error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " FRAMING_ERR_EN ,Framing error enable" "Disabled,Enabled" bitfld.long 0x10 1. " SEQ_ERR_EN ,SEQ error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " LCRC_ERR_EN ,LCRC error enable" "Disabled,Enabled" line.long 0x14 "LTSSM_TRACE_CONTROL,LTSSM Trace Control Register" bitfld.long 0x14 11.--13. " TRIG_PRX_LTSSM_MINOR ,Trigger PRX LTSSM minor" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. " TRIG_PTX_LTSSM_MINOR ,Trigger PTX LTSSM minor" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 4.--7. " TRIG_LTSSM_MAJOR ,Trigger LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 3. " TRIG_ON_EVENT ,Trigger on event" "Not triggered,Triggered" textline " " bitfld.long 0x14 2. " CLEAR_RAM ,Clear RAM" "Not cleared,Cleared" bitfld.long 0x14 1. " WRAP_EN ,Wrap enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " STORE_EN ,Store enable" "Disabled,Enabled" line.long 0x18 "LTSSM_TRACE_STATUS,LTSSM Trace Status Register" rbitfld.long 0x18 19.--21. " PRX_LTSSM_MINOR ,PRX LTSSM minor" "0,1,2,3,4,5,6,7" rbitfld.long 0x18 16.--18. " PTX_LTSSM_MINOR ,PTX LTSSM minor" "0,1,2,3,4,5,6,7" textline " " rbitfld.long 0x18 12.--15. " LTSSM_MAJOR ,LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x18 11. " READ_DATA_VALID ,Read data valid" "Invalid,Valid" textline " " bitfld.long 0x18 6.--10. " READ_ADDR ,Read address to LTSSM trace RAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 1.--5. " WRITE_PTR ,Current location of write pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rbitfld.long 0x18 0. " RAM_FULL ,All entries in RAM has been written" "Not full,Full" line.long 0x1C "PG,PCIe Power Gate Register" bitfld.long 0x1C 2. " RCVD_PME_TO_ACK_INTR_EN ,Generation of interrupt on reception of PME TO ACK TLP" "Disabled,Enabled" eventfld.long 0x1C 1. " RCVD_PME_TO_ACK ,Root port received a PME TO ACK TLP" "Init,Clear" textline " " bitfld.long 0x1C 0. " SEND_PME_TO_MSG ,Send a PME TO message downstream" "Idle,Send now" line.long 0x20 "VAR_RANGE0,PCIe Legacy I/O Decode Range Control Register 0" hexmask.long.word 0x20 18.--31. 0x04 " LIMIT ,Top address for the variable range positive decode addresses" hexmask.long.word 0x20 2.--15. 0x04 " BASE ,Base address for the variable range positive decode addresses" textline " " bitfld.long 0x20 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x24 "VAR_RANGE1,PCIe Legacy I/O Decode Range Control Register 1" hexmask.long.word 0x24 18.--31. 0x04 " LIMIT ,Top address for the variable range positive decode addresses" textline " " hexmask.long.word 0x24 2.--15. 0x04 " BASE ,Base address for the variable range positive decode addresses" bitfld.long 0x24 0. " ENABLE ,Enable" "Disabled,Enabled" sif (cpuis("TEGRAX1")) group.long 0xE80++0x1F line.long 0x00 "T_PCIE2_RP_ECTL_1_R1,T_PCIE2_RP_ECTL_1_R1" bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C ,T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--19. " T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C" "DEFAULT,1,2,3" textline " " bitfld.long 0x00 16.--17. " T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C" "DEFAULT,1,2,3" bitfld.long 0x00 12.--15. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "T_PCIE2_RP_ECTL_2_R1,T_PCIE2_RP_ECTL_1_R2" bitfld.long 0x04 18.--19. " T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C ,T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C" "DEFAULT,1,2,3" hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C ,T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C" line.long 0x08 "T_PCIE2_RP_ECTL_3_R1,T_PCIE2_RP_ECTL_3_R1" line.long 0x0C "T_PCIE2_RP_ECTL_4_R1,T_PCIE2_RP_ECTL_4_R1" hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C ,T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C" hexmask.long.byte 0x0C 0.--7. 1. " T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C ,T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C" line.long 0x10 "T_PCIE2_RP_ECTL_5_R1,T_PCIE2_RP_ECTL_5_R1" line.long 0x14 "T_PCIE2_RP_ECTL_6_R1,T_PCIE2_RP_ECTL_6_R1" line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1" bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xEA0++0x1B line.long 0x00 "T_PCIE2_RP_ECTL_1_R2,T_PCIE2_RP_ECTL_1_R2" bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C ,T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "T_PCIE2_RP_ECTL_2_R2,T_PCIE2_RP_ECTL_2_R2" hexmask.long.word 0x04 16.--31. 1. " T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C ,T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C" hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C ,T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C" line.long 0x08 "T_PCIE2_RP_ECTL_3_R2,T_PCIE2_RP_ECTL_3_R2" line.long 0x0C "T_PCIE2_RP_ECTL_4_R2,T_PCIE2_RP_ECTL_4_R2" hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C ,T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C" hexmask.long.byte 0x0C 0.--7. 1. " T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C ,T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C" line.long 0x10 "T_PCIE2_RP_ECTL_5_R2,T_PCIE2_RP_ECTL_5_R2" line.long 0x14 "T_PCIE2_RP_ECTL_6_R2,T_PCIE2_RP_ECTL_6_R2" line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1" bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C" "Default,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Default,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0xF00++0x0B line.long 0x00 "VEND_XP,Vendor XP Register (NVIDIA's Implementation)" bitfld.long 0x00 31. " FORCE_COMPLIANCE ,Force compliance" "Disabled,Enabled" rbitfld.long 0x00 30. " DL_UP ,Status of data link layer in XP" "Down,Up" textline " " bitfld.long 0x00 29. " INTERLEAVE_DLLPS ,Interleave DLLPS" "Disabled,Enabled" bitfld.long 0x00 28. " OPPORTUNISTIC_UPDATEFC ,DL will send any pending UpdateFC packet" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " OPPORTUNISTIC_ACK ,DL will send pending Acks" "Disabled,Enabled" bitfld.long 0x00 26. " TRAIN_ERR_ENABLE ,Enables reporting of training errors" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 18.--25. 1. " UPDATE_FC_THRESHOLD ,Override for the UpdateFC frequency" hexmask.long.word 0x00 2.--17. 1. " PRBS_STAT ,Results of loopback mode testing" textline " " bitfld.long 0x00 1. " PRBS_EN ,Enables the root port as loopback master" "Disabled,Enabled" sif (!cpuis("TEGRAX1")&&!cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " EMULATION ,Enables emulation mode operation" "Disabled,Enabled" endif line.long 0x04 "VEND_XP1,Vendor XP Register 1 (NVIDIA's Implementation)" bitfld.long 0x04 29.--31. " L1_EXIT_LATENCY ,L1 exit latency for the given PCI express link" "< 1us,1us - 2us,2us - 4us,4us - 8us,8us - 16us,16us -32us,32us-64us,> 64us" bitfld.long 0x04 28. " FORCE_DOWNSTREAM_NO_SNOOP ,Force downstream no snoop" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " FORCE_UPSTREAM_NONCOH ,Force upstream non-coherent" "Disabled,Enabled" bitfld.long 0x04 26. " NP_REQ_TIMEOUT ,Disable downstream NP request timeout" "No,Yes" textline " " bitfld.long 0x04 23. " IGNORE_L0S ,Ignore L0S" "No,Yes" bitfld.long 0x04 22. " DONT_MERGE_PMASNAK ,Don't merge PMASNAK" "Merged,Not merged" textline " " bitfld.long 0x04 21. " L1_ASPM_SUPPORT ,Link capability register L1 ASPM support" "Not supported,Supported" bitfld.long 0x04 20. " L23_READY_NO_D3 ,L23 ready no D3" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " ACK_L1_NO_WAIT ,ACK L1 no wait" "Disabled,Enabled" hexmask.long.word 0x04 10.--18. 1. " ACK_TIMER_LIMIT ,Overrides the Ack timer limit for this root port" textline " " bitfld.long 0x04 8. " RNCTRL_GEN2_WAIT_FOR_FIRST_EIES ,RNCTRL GEN2 wait for first EIES" "Disabled,Enabled" rbitfld.long 0x04 7. " RNCTRL_EN ,Dynamic link width re-negotiation procedure in XP" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " GEN2_LINK_UPGRADE ,Selects the 2.0-compliant link width upgrade protocol" "Disabled,Enabled" bitfld.long 0x04 0.--5. " RNCTRL_MAXWIDTH ,Maximum link width required at the end of dynamic link width renegotiation process" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "VEND_XP2,Vendor XP Register 2 (NVIDIA's Implementation)" hexmask.long.byte 0x08 24.--31. 1. " L0S_UPDATE_WAKE ,L0S update wake" hexmask.long.word 0x08 8.--17. 1. " L0S_THRESHOLD ,Controls the idle time required for TxL0s entry from L0" textline " " hexmask.long.byte 0x08 0.--7. 1. " L0S_ACK_WAKE ,L0S ACK wake" sif (cpuis("TEGRAX1")) group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices" hexmask.long.word 0x00 20.--31. 1. " N100MS_DFPCI ,N100MS_DFPCI" hexmask.long.word 0x00 0.--9. 1. " MICROSECOND ,MICROSECOND" elif (cpuis("TEGRAX2")) group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Vendor XV Timeout Register (NVIDIA's Implementation)" hexmask.long.word 0x00 20.--31. 1. " 100MS_DFPCI ,Number of Dfpci_clk clocks in a given 100ms interval" hexmask.long.word 0x00 0.--9. 1. " MICROSECOND ,Various timers required by PCI-express specification" group.long 0xF14++0x07 line.long 0x00 "VEND_XV_CMN,Vendor XV CMN Register (NVIDIA's Implementation)" bitfld.long 0x00 29.--31. " ISO2TC_MAP ,TC to be used for FPCI ISO transactions" "0,1,2,3,4,5,6,7" line.long 0x04 "VEND_THERM_MGMT,Vendor THERM MGMT" hexmask.long.word 0x04 4.--15. 1. " PERIOD ,Defines period (in microseconds) for the purpose of throttling" bitfld.long 0x04 1.--3. " DUTY_CYCLE ,Defines fraction of PERIOD throttling is applied" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 0. " ENABLE ,Enables throttling of PCIe traffic" "Disabled,Enabled" else group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices" hexmask.long.tbyte 0x00 0.--23. 1. " VEND_XV_TIMEOUT ,VEND_XV_TIMEOUT" endif group.long 0xF20++0x03 line.long 0x00 "VEND_SLOT_STRAP,Vendor Slot Capabilities Register" sif (cpuis("TEGRAX2")) hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER ,Physical slot number" bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT ,No CMD completed support" "Not supported,Supported" textline " " bitfld.long 0x00 17. " ELECTROMECH_INTERLOCK_PRESENT ,Electromechanical interlock present" "Not present,Present" bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Slot power limit scale" "0,1,2,3" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Slot power limit value" bitfld.long 0x00 6. " HOT_PLUG_CAPABLE ,Supporting hot-plug operations" "Not capable,Capable" textline " " bitfld.long 0x00 5. " HOT_PLUG_SURPRISE ,Hot-plug surprise" "Disabled,Enabled" bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT ,Power indicator" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT ,Attention Indicator" "Not implemented,Implemented" bitfld.long 0x00 2. " MRL_SENSOR_PRESENT ,MRL Sensor" "Not implemented,Implemented" textline " " bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT ,Power Controller" "Not implemented,Implemented" bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT ,Attention Button" "Not implemented,Implemented" else hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER ,Physical slot number" bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Slot power limit scale" "0,1,2,3" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Slot power limit value" endif sif (cpuis("TEGRAX1")) group.long 0xF30++0x03 line.long 0x00 "RP_XP_REF,This register contains diagnostic bits used in XP" hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE ,User-specified value to use for completion timeout" bitfld.long 0x00 13. " CPL_TO_OVERRIDE ,Enables the user override mode for completion timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ADVANCE_BY_2_CYA ,ADVANCE_BY_2_CYA" "Disabled,Enabled" bitfld.long 0x00 11. " NAK_SCHEDULE_CYA ,NAK_SCHEDULE_CYA" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA ,RXL2LINK_NPT_EMPTY_CYA" "Disabled,Enabled" bitfld.long 0x00 9. " L2_READ_FIX_EN ,L2_READ_FIX_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MICROSECOND_ENABLE ,MICROSECOND_ENABLE" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " MICROSECOND_LIMIT ,MICROSECOND_LIMIT" elif (cpuis("TEGRAX2")) group.long 0xF30++0x03 line.long 0x00 "RP_XP_REF,RP XP Reference Register" hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE ,User-specified value to use for completion timeout" bitfld.long 0x00 13. " CPL_TO_OVERRIDE ,Enables the user override mode for completion timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ADVANCE_BY_2_CYA ,Advanced by 2 CYA" "Disabled,Enabled" bitfld.long 0x00 11. " NAK_SCHEDULE_CYA ,NAK schedule CYA" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA ,RXL2LINK NPT empty CYA" "Disabled,Enabled" bitfld.long 0x00 9. " L2_READ_FIX_EN ,L2 read fix enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MICROSECOND_ENABLE ,Microsecond enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " MICROSECOND_LIMIT ,Counter value to be used to reset the one microsecond counter used for update FC scheduling" group.long 0xF44++0x03 line.long 0x00 "VEND_CYA0,Vendor CYA0 Register" bitfld.long 0x00 30. " FORCE_RETRY_POSSIBLE ,Force retry possible" "No,Yes" bitfld.long 0x00 29. " UP_NC2C ,Forces all upstream non-coherent traffic to coherent" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " DROP_VDM_TYPE1 ,VDM messages with vendor ID other than NVIDIA drop enable" "Disabled,Enabled" bitfld.long 0x00 27. " DROP_NV_VDM_TYPE1 ,VDM messages with vendor ID NVIDIA(0x10DE) drop enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " REL_CRDT_4PKT_DRP_RXL ,Credits for the VDM packet dropped release enable" "Disabled,Enabled" bitfld.long 0x00 25. " LTR_EN ,Hide LTR capability enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ALLOW_ALL_DS_RO ,Allow all DS RO" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " NATIVE_P2P_STARVE_COUNT ,Native P2P starve count" textline " " bitfld.long 0x00 12.--15. " DSK_RESET_PULSE_WIDTH ,Number of symbol times Deskewer should hold RX fifos in hot_reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " FINISH_PKT_ON_RCVRY_EN ,Finish packet on recovery enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " UR_PW_DROP_ALL_MODE ,UR PW drop all mode" "No,Yes" bitfld.long 0x00 9. " DROP_ALL_MODE ,Drop all mode" "No,Yes" textline " " bitfld.long 0x00 6.--8. " MAX_PAYLOAD_SIZE ,Max payload size" "INIT,,,,,4KB,,Auto" bitfld.long 0x00 5. " ADR64 ,64-bit addressing mode" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IGNORE_BME ,Ignores BMS and accepts upstream PCIe transactions" "Not ignored,Ignored" bitfld.long 0x00 3. " UFPCI_BLOCK_B2B_NP ,UFPCI block back-to-back NP" "No,Yes" textline " " bitfld.long 0x00 2. " GPU_NISONC2HPISO ,GPU NISONC2HPISO" "Disabled,Enabled" bitfld.long 0x00 1. " PASSPW_RO ,PASSPW RO" "No,Yes" textline " " bitfld.long 0x00 0. " REL_CREDIT_UR_PW ,Credits for the ur_pw received release" "No,Yes" else group.long 0xF34++0x0F line.long 0x00 "ECTL_2_R1,ECTL_2_R1" hexmask.long.word 0x00 16.--31. 1. " RX_DFE_1C ,RX_DFE_1C" hexmask.long.byte 0x00 8.--15. 1. " RX_EQ_1C ,RX_EQ_1C" textline " " hexmask.long.byte 0x00 0.--7. 1. " CDR_CNTL_1C ,CDR_CNTL_1C" line.long 0x04 "ECTL_3_R1,ECTL_3_R1" bitfld.long 0x04 8.--11. " TX_PEAK_PRE_1C ,TX_PEAK_PRE_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--4. " TX_PEAK_1C ,TX_PEAK_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "ECTL_2_R2,ECTL_2_R2" hexmask.long.word 0x08 16.--31. 1. " RX_DFE_1C ,RX_DFE_1C" hexmask.long.word 0x08 0.--15. 1. " RX_EQ_1C ,RX_EQ_1C" line.long 0x0C "ECTL_3_R2,ECTL_3_R2" bitfld.long 0x0C 24.--27. " PRE_SEL1_1C ,PRE_SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--20. " SEL1_1C ,SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 8.--11. " PRE_SEL0_1C ,PRE_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--4. " SEL0_1C ,SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.long 0xF48++0x07 line.long 0x00 "VEND_CTL1,Vendor Control Register 1 (NVIDIA's Implementation)" bitfld.long 0x00 21. " POLLING_RESET_FIX_EN ,Polling reset fix enable" "Disabled,Enabled" bitfld.long 0x00 20. " HOTPLUG_IN_TRAFFIC_EN ,Hotplug in traffic enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " NISO2ISO ,All upstream non-ISO-PW and non-ISO-NP will be upgraded to ISO" "Disabled,Enabled" bitfld.long 0x00 18. " ALLOW_UPSTREAM_CMPL_OVERTAKE_PW ,UBFI allows CPL bypass PW regardless of RO bit" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " SPLIT_ARB_BLOCK_COH ,Split ARB block coherent" "Disabled,Enabled" bitfld.long 0x00 16. " HIDE_MSIMAP ,Hide MSIMAP" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " LINKACTV_REPORTING ,Setting the data link layer link active reporting capable bit" "Disabled,Enabled" bitfld.long 0x00 14. " P2P_ISO2NIS ,Forces upstream peer-to-peer ISO requests to be peer-to-peer NONISO" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ERPT ,ERPT" "Disabled,Enabled" bitfld.long 0x00 12. " HIDE_MSI_CAP ,Hides the entire MSI capability structure from the capabilities list" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ACCEPT_MSGD1 ,Allows acceptance of NVIDIA specific vendor type message with data" "Disabled,Enabled" bitfld.long 0x00 1.--3. " TC2ISO_MAP ,TC2ISO MAP" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0. " P2P_BLOCK_P2P_ONLY ,P2P block P2P only" "Disabled,Enabled" line.long 0x04 "VEND_XP_BIST,IOBIST And Characterization Control Register (NVIDIA's Implementation)" bitfld.long 0x04 30. " GOTO_DETECT_ON_SURPRISE_EIDLE ,Goto detect on surprise EIDLE" "Disabled,Enabled" bitfld.long 0x04 29. " ENABLE_SERR_REPORTING ,Enable SERR reporting" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " GOTO_L1_L2_AFTER_DLLP_DONE ,Goto L1 L2 after DLLP done" "Disabled,Enabled" bitfld.long 0x04 27. " CTRL_IGNORE_LPBK_EXIT ,Control ignore LPBK exit" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " CTRL_RELAX_LPBK_ENTRY ,Control relax LPBK entry" "Disabled,Enabled" bitfld.long 0x04 25. " CTRL_FORCE_PRBS_RST ,Control force PRBS reset" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " FORCE_DEEMPHASIS_ADVERTISED_EN ,Force Deemphasis advertised enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 23. " POWER_UP_BYPASS ,Power up bypass" "No bypass,Bypass" endif textline " " bitfld.long 0x04 22. " FORCE_RECEIVER_COMPLIANCE_EN ,Force reciver compliance enable" "Disabled,Enabled" bitfld.long 0x04 21. " FORCE_COMPLIANCE_GEN2_SPEED_EN ,Force compliance GEN2 speed enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " FORCE_COMPLIANCE_AND_ADVERTISE_MODE ,Force compliance and advertise mode" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 19. " PRESERVE_TX_PACKET_DURING_SPEED_CHANGE ,Preserve TX packet during speed change" "Not preserved,Preserved" bitfld.long 0x04 18. " GEN2_EXIT_USE_STAT_IDLE ,GEN2 exit use status idle" "Not idle,Idle" textline " " bitfld.long 0x04 17. " GEN2_LOOPBACK ,GEN2 loopback" "0,1" bitfld.long 0x04 16. " SA_EXTRA_RESET_EN_RANGE ,SA extra reset enable range" "Disabled,Enabled" textline " " hexmask.long.word 0x04 6.--15. 1. " CTRL_TX_PTRN_RANGE ,Control TX PTRN range" bitfld.long 0x04 4.--5. " TEST_MODE_RANGE ,Test mode range" "0,1,2,3" textline " " bitfld.long 0x04 3. " NOSCRAMBLE_RANGE ,No scramble range" "0,1" bitfld.long 0x04 2. " EIDLE_DATA_RANGE ,EIDLE data range" "0,1" textline " " bitfld.long 0x04 1. " EIDLE_OVERRIDE_RANGE ,EIDLE override range" "0,1" bitfld.long 0x04 0. " RDET_BYPASS_RANGE ,RDET bypass range" "0,1" endif textline " " sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) width 22. group.long 0xF50++0x03 line.long 0x00 "VEND_XP_PAD_PWRDN,Vendor XP PAD Powerdown (NVIDIA's Implementation)" bitfld.long 0x00 31. " IDLE_MODE_L1_CLKREQ ,Idle mode L1 clock request" "0,1" bitfld.long 0x00 30. " IDLE_MODE_DYNAMIC ,Idle mode dynamic" "0,1" textline " " bitfld.long 0x00 29. " IDLE_MODE_L1 ,Idle mode L1" "0,1" bitfld.long 0x00 28. " XVR_USE_DFPCI_DATA_UNINTR ,XVR use DFPCI data UNINTR" "Disabled,Enabled" textline " " hexmask.long.word 0x00 18.--27. 1. " MICROSECOND ,Various timers required by PCI-express specification" bitfld.long 0x00 16.--17. " SLEEP_MODE_L1_CLKREQ ,Defines the 2-bit sleep-mode coding when clkreq is deasserted in L1" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 15. " L1_CLKREQ ,Power down to SLEEP_MODE_L1_REQ enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--14. 1. " MINIMUM ,Minimum number of Gen1 xclks(4ns) that analog pads must remain powered down (or up) before the LTSSM attempts to power them back up/down again" textline " " bitfld.long 0x00 5.--6. " SLEEP_MODE_DYNAMIC ,2-bit sleep-mode coding in the pad when the lane shut down due to dynamic link downsizing" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 3.--4. " SLEEP_MODE_L1 ,2-bit sleep-mode coding in the pad when LTSSM is in the L1 state or DISABLED state" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 2. " DISABLED ,Enable analog pads to power down in the DISABLED_DOWN state" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DYNAMIC ,Enable unused analog pads to power down after dynamic link width re-negotiation takes place" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " L1 ,Enable analog pads to power down when in L1 state" "Disabled,Enabled" endif textline " " width 22. group.long 0xF54++0x07 line.long 0x00 "VEND_XP_FTS,Vendor XP FTS (NVIDIA's Implementation)" hexmask.long.byte 0x00 24.--31. 1. " TS_DETECT_START ,TS detect start" hexmask.long.byte 0x00 16.--23. 1. " FTS_DETECT_START ,Number of symbol times we wait before the root port begins looking at FTS ordered sets when exiting L0s" textline " " hexmask.long.byte 0x00 8.--15. 1. " N_FTS_REMOTE ,N_FTS value advertised by the remote device" hexmask.long.byte 0x00 0.--7. 1. " N_FTS ,N_FTS value that we advertise to the device on the other side of the link" line.long 0x04 "VEND_XP_STATS0,Vendor XP States Register 0" bitfld.long 0x04 28. " FAILED_L0S_EXITS_INF ,Failed L0s exit counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 24. " FAILED_L0S_EXITS_LC ,Failed L0S exits LC" "No effect,Clear" textline " " bitfld.long 0x04 20. " NAKS_RCVD_INF ,NAKs received counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 16. " NAKS_RCVD_LC ,NAKS received LC" "No effect,Clear" textline " " bitfld.long 0x04 12. " CRC_ERRORS_INF ,CRC error counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 8. " CRC_ERRORS_LC ,Current value from the CRC error counter" "No effect,Clear" textline " " bitfld.long 0x04 4. " 8B10B_ERRORS_INF ,8b/10b error counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 0. " 8B10B_ERRORS_LC ,Current value from the 8b/10b error counter" "No effect,Clear" rgroup.long 0xF5C++0x07 line.long 0x00 "VEND_XP_STATS1,Vendor XP States Register 1" sif (cpuis("TEGRAX2")) hexmask.long.byte 0x00 24.--31. 1. " FAILED_L0S_EXITS ,Counts the number of times the RX side of the XP went into Recovery in one millisecond" hexmask.long.byte 0x00 16.--23. 1. " NAKS_RCVD ,Counts the number of NAKs received from the endpoint in 64 microseconds" textline " " hexmask.long.byte 0x00 8.--15. 1. " CRC_ERRORS ,Counts the number of CRC errors detected in 64 microseconds" hexmask.long.byte 0x00 0.--7. 1. " 8B10B_ERRORS ,Counts the number of 8b/10b errors detected in one microsecond" else hexmask.long.byte 0x00 24.--31. 1. " 8B10B_ERRORS ,Counts the number of 8b/10b errors detected in one microsecond" hexmask.long.byte 0x00 16.--23. 1. " CRC_ERRORS ,Counts the number of CRC errors detected in 64 microseconds" textline " " hexmask.long.byte 0x00 8.--15. 1. " NAKS_RCVD ,Counts the number of NAKs received from the endpoint in 64 microseconds" hexmask.long.byte 0x00 0.--7. 1. " FAILED_L0S_EXITS ,Counts the number of times the RX side of the XP went into Recovery in one millisecond" endif line.long 0x04 "VEND_ERROR_COUNT,Vendor Error Count Register" hexmask.long.byte 0x04 16.--23. 1. " REPLAY ,Counts number of times TXBA replays" hexmask.long.byte 0x04 8.--15. 1. " BAD_TLP ,Counts bad tlps reported by RXL" textline " " hexmask.long.byte 0x04 0.--7. 1. " LCRC_ERR ,Counts LCRCL Errors reported by RXL" textline " " width 28. group.long 0xF64++0x0B line.long 0x00 "CFG_MISC,Config Miscellaneous Register (NVIDIA's Implementation)" hexmask.long.byte 0x00 0.--7. 1. " MUTE_IDLE ,Mute idle" line.long 0x04 "PRIV_XP_INIT_RECOVERY,Private XP Initialize Recovery Register (NVIDIA's Implementation)" bitfld.long 0x04 31. " 8B10B_ERROR_ENABLE ,8B10B feature enable" "Disabled,Enabled" hexmask.long.word 0x04 20.--30. 1. " 8B10B_ERROR_WINDOW ,CPrograms the time frame in multiples of 1 microsecond" textline " " hexmask.long.tbyte 0x04 0.--19. 1. " 8B10B_ERROR_THRESHOLD ,Programs the 8b10b error threshold" line.long 0x08 "PRIV_XP_LCTRL_2,Private XP LCTRL (NVIDIA's Implementation)" rbitfld.long 0x08 31. " UPCONFIGURE_CAPABLE ,Gen2 link width up-configure capability" "Not capable,Capable" bitfld.long 0x08 30. " REV2P0_COMPLIANCE_DIS ,Disable advertising rev2.0 support and link width up-configure capability" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " EIDLE_INFERENCE_EN ,Disable electrical idle inference" "No,Yes" bitfld.long 0x08 28. " SURPRISE_IDLE_USE_STAT_IDLE ,Surprise idle use status idle" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " ALLOW_SPEED_CHANGE_FROM_L1 ,Allow speed change to be initiated from the L1 or Rx_L0s link states" "Disabled,Enabled" bitfld.long 0x08 24.--26. " RECOVERY_SPEED_TIMEOUT_ADJ ,Adjust minimum length of time the transmitter stays in idle in the Recover Sped state" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 20.--23. " N_EIE_SYMBOLS ,Number of K28.7 symbols" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 19. " DEEMPHASIS_STRAP ,DEEMPHASIS_STRAP" "-6db,-3.5db" textline " " bitfld.long 0x08 18. " ENFORCE_DEEMPHASIS ,Forces root port to use de-emphasis value" "Disabled,Enabled" bitfld.long 0x08 17. " POLLING_PREDETERMINED_LANES ,Polling predetermined lanes" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " AUTONOMOUS_CHANGE ,Autonomous change" "No,Yes" rbitfld.long 0x08 12.--15. " DATA_RATE_SUPPORTED_REMOTE ,Gen2 data rate supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 8.--11. " DATA_RATE_SUPPORTED ,Supported link speed reported in the link capabilities" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " TARGET_LINK_SPEED ,Specifies the link rate to change to" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 3. " TX_MARGIN_OVERRIDE ,TX_MARGIN_OVERRIDE" "Disabled,Enabled" sif (cpuis("TEGRAX2")) bitfld.long 0x08 2. " CYA_DEEMPHASIS_OVERRIDE ,CYA deemphasis override" "No override,Override" endif bitfld.long 0x08 1. " ADVERTISED_RATE_CHANGE ,ADVERTISED_RATE_CHANGE" "No effect,Change" textline " " bitfld.long 0x08 0. " SPEED_CHANGE ,Link speed negotiation procedure" "No effect,Change" group.long 0xF74++0x03 line.long 0x00 "PRIV_XP_PAD_PWRUP,Private XP PAD_Powerup" hexmask.long.byte 0x00 16.--23. 1. " PMRX_PWRUP_THRESHOLD ,Time to hold CDR at reset in Recovery" sif (cpuis("TEGRAX2")) group.long 0xF78++0x03 line.long 0x00 "PRIV_XP_PAD_GEN2_PAD_PWRDN,Private XP PAD GEN2 PAD Powerdown" hexmask.long.byte 0x00 16.--23. 1. " MICROSECOND ,Number of xclks in 1 microsecond when running at gen2 speed" endif group.long 0xF84++0x03 line.long 0x00 "PRIV_XP_RECOVERY_REASONS,Register Records The Reasons We Went Into Recovery" textline " " width 30. sif (cpuis("TEGRAX2")) rgroup.long 0xF88++0x07 line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number Of RECOVERY STATE Entries In XP By The XVR" line.long 0x04 "PRIV_XP_L0S_ENTRY_COUNT,Number Of Entries From L0 To L0s At ltssm Side" rgroup.long 0xF94++0x0B line.long 0x00 "PRIV_XP_L1_ENTRY_COUNT,Number Of Entries From L0 To L1 It Is Reset Whenever It Is Read" line.long 0x04 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number Of Entries From L1 To Recovery" line.long 0x08 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number Of Entries From L0 To Recovery" bitfld.long 0x08 8. " REASON ,Reason" "All,Error" textline " " hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Value" else rgroup.long 0xF88++0x13 line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number of RECOVERY STATE entries in XP by the XVR" line.long 0x04 "PRIV_XP_RX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm RX side" line.long 0x08 "PRIV_XP_TX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm TX side" line.long 0x0C "PRIV_XP_L1_ENTRY_COUNT,Number of entries from L0 to L1 It is reset whenever it is read" line.long 0x10 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number of entries from L1 to Recovery" group.long 0xF9C++0x03 line.long 0x00 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number of entries from L0 to Recovery" bitfld.long 0x00 8. " REASON ,REASON" "All,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " VALUE ,VALUE" endif rgroup.long 0xFA0++0x07 line.long 0x00 "PRIV_XP_L1P_ENTRY_COUNT,Number Of Entries From L0 To Deep L1" line.long 0x04 "PRIV_XP_ASLM_COUNT,Number Of Switching Between X1 And X16 for Gen2 Only" group.long 0xFA8++0x07 line.long 0x00 "VEND_CTL2,Vendor Control Register (Miscellaneous)" bitfld.long 0x00 24. " COMPLIANCE_X8_DELAY ,CTL for compliance delay pattern" "Wrap on n-1,Wrap on 8/16 mod 8" textline " " bitfld.long 0x00 23. " IGNORE_ATTENTION_BUTTON_MSG ,Ignore upstream attention button" "Not ignored,Ignored" textline " " bitfld.long 0x00 22. " UNBLOCK_UP_TRANSACTIONS ,Unblock up transaction" "Blocked,Unblocked" textline " " bitfld.long 0x00 21. " BLOCK_UP_TRANSACTIONS_ON_ERR ,Block all upstream transaction after an error" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " HW_AUTO_WIDTH_DISABLE_DIS ,HW auto width disable disable" "False,True" textline " " bitfld.long 0x00 19. " BW_MANAGEMENT_INT_EN_DIS ,BW management INT enable disable" "False,True" textline " " bitfld.long 0x00 18. " AUTO_BANDWIDTH_INT_EN_DIS ,Auto bandwidth INT enable disable" "False,True" textline " " bitfld.long 0x00 17. " AUTO_BANDWIDTH_DIS ,Auto bandwidth disable" "False,True" textline " " bitfld.long 0x00 16. " BW_MANAGEMENT_DIS ,BW management disable" "False,True" textline " " bitfld.long 0x00 13. " SHADOW_LINK_BW_NOTIFY_CAP ,Shadow link BW notify capable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE ,GEN2 protocol disable" "No,Yes" else rbitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE ,GEN2 protocol disable" "No,Yes" endif textline " " bitfld.long 0x00 11. " SLOT_IMPLEMENTED ,Slot implemented" "Not implemented,Implemented" textline " " eventfld.long 0x00 9. " ERR_STS_HOTPLUG_PME ,Error STS hotplug PME" "No error,Error" textline " " eventfld.long 0x00 8. " ERR_STS_HOTPLUG_NMI ,Error STS hotplug NMI" "No error,Error" textline " " bitfld.long 0x00 7. " PCA_ENABLE ,Enable/disable the PCA in any TMS" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " GEN2_SPEED_DISABLE ,Gen 2 protocol speed disable" "No,Yes" textline " " bitfld.long 0x00 4. " GEN2_PROTOCOL_DISABLE ,Disable gen2 protocol and will force the use of Gen 1.1 protocol" "No,Yes" textline " " bitfld.long 0x00 2. " DEV_CAP_EXTENDED_TAG_FIELD_SIZE ,DEV capable extended tag field size" "5bit,8bit" textline " " bitfld.long 0x00 1. " DIS_MA_TA_EP_MERGE ,Disables the logic which takes care of merging of EP/MA/TA" "No,Yes" line.long 0x04 "PRIV_XP_CONFIG,Private XP Config" bitfld.long 0x04 0.--1. " LOW_PWR_DURATION ,information logging for the health and performance counters" "TX_L0S,RX_L0S,L1,Idle" textline " " width 35. rgroup.long 0xFB0++0x03 line.long 0x00 "PRIV_XP_DURATION_IN_LOW_PWR_100NS,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" textline " " sif (cpuis("TEGRAX2")) rgroup.long 0xFB4++0x03 line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2" hexmask.long.word 0x00 0.--12. 1. " THRESHOLD ,Threshold" else group.long 0xFB4++0x03 line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2" hexmask.long.word 0x00 0.--12. 1. " THRESHOLD ,Threshold" endif textline " " group.long 0xFB8++0x03 line.long 0x00 "PRIV_XP_EIDLE_INFERENCE_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 16.--31. 1. " TIMEOUT_B ,UI window for electrical idle exit not detected in the Recover" textline " " hexmask.long.word 0x00 0.--15. 1. " TIMEOUT_A ,UI window for COM not detected in the Recovery" textline " " width 25. sif (cpuis("TEGRAX2")) group.long 0xFBC++0x03 line.long 0x00 "SLOT_CONTROL_STATUS_HPC,Slot Control Status HPC Register" hexmask.long.word 0x00 16.--31. 1. " COMMAND ,Command" hexmask.long.byte 0x00 8.--15. 1. " STATE ,State" textline " " eventfld.long 0x00 7. " STATE_CHANGE7 ,State change 7" "Not changed,Changed" eventfld.long 0x00 6. " STATE_CHANGE6 ,State change 6" "Not changed,Changed" textline " " eventfld.long 0x00 5. " STATE_CHANGE5 ,State change 5" "Not changed,Changed" eventfld.long 0x00 4. " STATE_CHANGE4 ,State change 4" "Not changed,Changed" textline " " eventfld.long 0x00 3. " STATE_CHANGE3 ,State change 3" "Not changed,Changed" eventfld.long 0x00 2. " STATE_CHANGE2 ,State change 2" "Not changed,Changed" textline " " eventfld.long 0x00 1. " STATE_CHANGE1 ,State change 1" "Not changed,Changed" eventfld.long 0x00 0. " STATE_CHANGE0 ,State change 0" "Not changed,Changed" group.long 0xFC4++0x07 line.long 0x00 "VEND_XP_LANEMAP1,Vendor XP Lane MAP 1" bitfld.long 0x00 28.--31. " LANE_15 ,Lane 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " LANE_14 ,Lane 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " LANE_13 ,Lane 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " LANE_12 ,Lane 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " LANE_11 ,Lane 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " LANE_10 ,Lane 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " LANE_9 ,Lane 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " LANE_8 ,Lane 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "VEND_SS_1,Shadow Register Of SS 1" hexmask.long.word 0x04 16.--31. 1. " SSID ,SSID" hexmask.long.word 0x04 0.--15. 1. " SSVID ,SSVID" endif sif (!cpuis("TEGRAX2")) group.long 0xFC8++0x0B line.long 0x00 "VEND_SHADOW,Shadow register of SS_1" hexmask.long.word 0x00 16.--31. 1. " SS_1_SSID ,SS_1_SSID" textline " " hexmask.long.word 0x00 0.--15. 1. " SS_1_SSVID ,SS_1_SSVID" line.long 0x04 "TX_MARGIN_MAP0_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register" bitfld.long 0x04 30.--31. " CTL ,CTL" "0,1,2,3" textline " " bitfld.long 0x04 24.--29. " CODE3 ,CODE3" "Init,,,,,,,,Mobile,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 16.--21. " CODE2 ,CODE2" "Init,,,,,,,,,,Mobile,,,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 8.--13. " CODE1 ,CODE1" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 0.--5. " CODE0 ,CODE0" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,,,,,Desktop,?..." line.long 0x08 "TX_MARGIN_MAP1_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register" bitfld.long 0x08 30.--31. " CTL ,CTL" "0,1,2,3" textline " " bitfld.long 0x08 24.--29. " CODE7 ,CODE7" "Mobile,,,,Desktop,?..." textline " " bitfld.long 0x08 16.--21. " CODE6 ,CODE6" "Init,,Mobile,,,,,,Desktop,?..." textline " " bitfld.long 0x08 8.--13. " CODE5 ,CODE5" "Init,,,,Mobile,,,,,,,,Desktop,?..." textline " " bitfld.long 0x08 0.--5. " CODE4 ,CODE4" "Init,,,,,,Mobile,,,,,,,,,,Desktop,?..." endif textline " " sif (cpuis("TEGRAK1")) group.long 0xFD4++0x03 line.long 0x00 "ECTL_1_R1,ECTL_1_R1" bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20. " RX_QEYE_EN_1C ,RX_ QEYE_EN_1C" "0,1" textline " " bitfld.long 0x00 16.--18. " RX_WANDER_1C ,RX_WANDER_1C" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C ,_RX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C ,TX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 8.--11. " TX_CMADJ_1C ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--5. " TX_AMP_1C ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFD8++0x03 line.long 0x00 "ECTL_1_R2,ECTL_1_R2" bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20. " RX_QEYE_EN_1C ,RX_ QEYE_EN_1C" "0,1" textline " " bitfld.long 0x00 16.--18. " RX_WANDER_1C ,RX_WANDER_1C" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C ,_RX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C ,TX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 8.--11. " TX_CMADJ_1C ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--5. " TX_AMP_1C ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0xFDC++0x07 line.long 0x00 "TIMEOUT2,Timeout 2 Register" bitfld.long 0x00 0.--4. " MIN_L1_L2_IDLE_TIME ,Sets minimum amount of time we stay in L1/L2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "PRIV_MISC,Private Miscellaneous Register" bitfld.long 0x04 31. " TMS_CLK_CLAMP_ENABLE ,Enables per-TMS XCLK/XTXCLK clamping" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 24.--30. 1. " CLK_CLAMP_THRESHOLD ,Number of contiguous nbref_clks (25MHz) after clamping" textline " " bitfld.long 0x04 23. " CTLR_CLK_CLAMP_ENABLE ,Enables per-controller XCLK/XTXCLK clamping" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 16.--22. 1. " CTLR_CLK_CLAMP_THRESHOLD ,Number of contiguous nbref_clks (12MHz) after clamping" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 4. " USE_EXT_CLKREQ ,Use EXT CLKREQ" "Not used,Used" endif textline " " bitfld.long 0x04 0.--3. " PRSNT_MAP ,PRSNT MAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpuis("TEGRAX2")) group.long 0xFE4++0x03 line.long 0x00 "BIST_CTRL_2,BIST Control 2 Register" bitfld.long 0x00 31. " OVERRIDE_JTAG ,Internal JTAG register override" "No override,Override" textline " " bitfld.long 0x00 4.--7. " TX_CHAR_SPEED ,Speed of TXCHAR output" ",2.5Gbps,5.0Gbps,?..." textline " " bitfld.long 0x00 3. " TXCHAR_MIN_EIDLE ,Force LTSSM to spend minimum time in E-idle" "Not forced,Forced" textline " " bitfld.long 0x00 2. " TXCHAR_EIDLE_EXIT ,Transition from E-idle to compliance pattern" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXCHAR_EIDLE_ENTRY ,Transition from compliance pattern to E-idle" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SHORT_LINK_TIMERS ,Shortened timers in LINK" "Disabled,Enabled" endif group.long 0xFE8++0x03 line.long 0x00 "VEND_XP3,Symbol Alignment Error Handling Register" hexmask.long.byte 0x00 0.--7. 1. " SA_ERROR_LIMIT ,Specifies number of misaligned COM symbols" group.long 0xFEC++0x03 line.long 0x00 "XP_CTL_1,Control Registers Used In XP" sif (cpuis("TEGRAX2")) bitfld.long 0x00 31. " CYA_RP_INITIATED_WAKE_ON_TLP ,Initiated wake one TLP" "Disabled,Enabled" textline " " endif sif (cpuis("TEGRAX1")) bitfld.long 0x00 29.--30. " SPARE ,SPARE" "0,1,2,3" textline " " else bitfld.long 0x00 28.--30. " SPARE ,Spare" "0,1,2,3,4,5,6,7" textline " " endif bitfld.long 0x00 27. " EXIT_L1_AT_CLKREQ_ASSERTION ,When set,ltssm will exit L1 when clkreq assertion happens" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " NEW_IOBIST_CTRL ,Enable control signals from iobist" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " OLD_IOBIST_EN ,When set will enable old iobist,else it will enable new iobist" "New,Old" textline " " bitfld.long 0x00 19.--24. " EIOS_DEBOUNCE_TIMER ,Number of xclk for which rx_data_en signals need to be deasserted before asserting it again" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 18. " DISABLE_RX_LANE_AFTER_EIOS ,Disable rx_lane_en after EIOS is seen in any of the enabled lane during recovery" "No,Yes" textline " " bitfld.long 0x00 17. " ENABLE_DESKEW_FOR_SPDCH_NEGOTIATION ,LTSSM enable deskew in recovery" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BYPASS_CONFIG_PWRUP ,Bypass config powerup" "0,1" textline " " bitfld.long 0x00 15. " RESET_TS_CTRL_ON_ERROR ,Reset TS control on error" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " RX_EIDLE_EXIT_TIMER_IN_CONFIG ,RX EIDLE exit timer in config" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " FORCE_RESET_IN_CONFIG ,Force reset in config" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " LINK_RESIZE_PWRDN_CTL ,Link resize powerdown control" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ALLOW_SPEED_CHANGE_FROM_L0S ,When set,LTSSM will initiate link speed/width/advertised rate change" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PRESERVE_TX_PACKET_ON_DL_RETRAIN ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PRESERVE_TX_PACKET_ON_RECOVERY ,Preserve TX packet on recovery" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " PRESERVE_TX_PACKET_ON_WIDTH_CHANGE ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PRESERVE_TX_PACKET_ON_SPEED_CHANGE ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RESET_LANE_ENABLE_ORIG_IN_DETECT ,allow lane_enable_original to be reset in Detect state" "Not allowed,Allowed" textline " " bitfld.long 0x00 2.--5. " IDLE_TO_L0_DELAY ,Number of clocks that the LTSSM will delay the transition from Recovery" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " LWLO_HUNT_ON_BAD_TS1 ,LWLO HUNT on bad TS1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FORCE_SA_IN_CONFIG ,Enables symbol alignment" "Disabled,Enabled" group.long 0xFF0++0x0F line.long 0x00 "PRIV_XP_L1BEACON,Private XP L1 Beacon" hexmask.long.byte 0x00 2.--9. 1. " N_EIE_SYMBOLS ,Number of EIE symbols sent in L1 Beacon Entry/Exist state" textline " " bitfld.long 0x00 1. " TX_BYP_CTRL ,TX bypass control" "Only L0,All Lanes" textline " " bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" line.long 0x04 "TIMEOUT3,Timeout 3 Register" hexmask.long.byte 0x04 24.--31. 1. " RX_L0S_IDLE_TIME_GEN2 ,Controls the amount of time LTSSM delays" textline " " hexmask.long.byte 0x04 16.--23. 1. " RX_L0S_IDLE_TIME_GEN1 ,Controls the amount of time LTSSM delays" textline " " hexmask.long.byte 0x04 8.--15. 1. " TX_L0S_IDLE_TIME ,Controls the minimum amount of time LTSSM stays in TX_L0S_IDLE state" textline " " bitfld.long 0x04 4.--7. " RX_EIDLE_EXIT_DELAY ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " TX_EIDLE_EXIT_DELAY ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RP_XP_CTL_2,XP Control 2 Register" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) sif cpuis("TEGRAX2") bitfld.long 0x08 24. " LOOPBACK_RATE_DEEMPH_CHECK_DIS ,Loopback rate deemph check disable" "No,Yes" textline " " endif bitfld.long 0x08 23. " RX_CAL_EN ,Hardware RX calibration in UPHY enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " AUX_RX_IDLE_EN ,RX idle enable" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " OVERRIDE_AUX_RX_IDLE_EN ,Override for bit for AUX_RX_IDLE_EN enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WAIT_FOR_LOCKDET_DURING_L1_EXIT ,Wait for lockdet during L1 exit" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 12.--19. 1. " ECO351987_HOLDOFF_CNTR_LIMIT ,Holdoff counter limit for counter that was added in ECO 351987" textline " " bitfld.long 0x08 11. " USE_QUALIFIED_TS_CTL_BITS ,Qualifies the training control bits in the transmitted TS1s/TS2s with the LTSSM state" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " RELAXED_UNEXP_CPL_CHECK ,Relaxed unexpected completion" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " LOOPBACK_FORCE_NOSCRAMBLE ,Loopback force nonscramble enable" "Disabled,Enabled" textline " " endif bitfld.long 0x08 8. " CONFIG_LINKSTART_REQUIRE_PAD_LANE_NUM ,Config link start require PAD lane num" "0,1" textline " " hexmask.long.byte 0x08 0.--7. 1. " LOOPBACK_EXIT_THRESHOLD ,Maximum amount of time spent in loopback" line.long 0x0C "VEND_XP_STATS2,Vendor XP States (NVIDIAs Implementation)" hexmask.long.word 0x0C 0.--15. 1. " 8B10B_ERR_LANEMASK ,Each bit represent the corresponding logical lane" tree.end width 0x0B tree.end tree "PCIE_A3 Registers" base ad:0x020000000 width 11. tree "PCI Compatible Configuration Registers" rgroup.long 0x00++0x03 line.long 0x00 "DEV_ID,Device ID And Vendor ID Register" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID ,Identify the particular device" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,Identify manufacturer of the device" group.long 0x04++0x03 line.long 0x00 "DEV_CTRL,Command And Status Register" eventfld.long 0x00 31. " DETECTED_PERR ,Primary side device receives a poisoned TLP" "Not active,Active" eventfld.long 0x00 30. " SIGNALED_SERR ,ERR_FATAL or ERR_NONFATAL message from primary side device" "Not active,Active" eventfld.long 0x00 29. " RECEIVED_MASTER ,Primary side requestor receives a completion with unsupported request completion status" "Not aborted,Aborted" textline " " eventfld.long 0x00 28. " RECEIVED_TARGET ,Primary side requestor receives a completion with completer abort completion status" "Not aborted,Aborted" eventfld.long 0x00 27. " SIGNALED_TARGET ,Primary side device completes a request using completer abort completion status" "Not aborted,Aborted" eventfld.long 0x00 24. " MASTER_DATA_PERR ,Master data parity error bit" "Not active,Active" textline " " rbitfld.long 0x00 20. " CAPLIST ,Device configuration space includes a capabilities list" "Not present,Present" rbitfld.long 0x00 19. " INTR_STATUS ,INTx interrupt message is pending internally to the device" "Not active,Active" bitfld.long 0x00 10. " INTR_DISABLE ,Ability of the device to generate INTx interrupt messages" "No,Yes" textline " " bitfld.long 0x00 8. " SERR ,SERR enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " PERR ,Parity Error Response bit" "Disabled,Enabled" bitfld.long 0x00 2. " BUS_MASTER ,Ability of the root complex to issue memory and I/O read/write requests" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MEMORY_SPACE ,Respond to memory space accesses on the primary interface" "Disabled,Enabled" bitfld.long 0x00 0. " IO_SPACE ,Respond to I/O space accesses on the primary interface" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "REV_CC,Revision ID And Class Code Registers" hexmask.long.tbyte 0x00 8.--31. 1. " CLASS_CODE ,Generic function of the device" hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,Device specific revision identifier" group.long 0x0C++0x03 line.long 0x00 "MISC_1,MISC 1 Register" rbitfld.long 0x00 23. " HEADER_TYPE1 ,Identifies a multi-function device" "Single function,Multi function" hexmask.long.byte 0x00 16.--22. 1. " HEADER_TYPE0 ,Specifies the layout of bytes 10h through 3Fh" hexmask.long.byte 0x00 0.--7. 1. " CACHE_LINE_SIZE ,Cache line size" group.long 0x18++0x1B line.long 0x00 "BN_LT,Bus Number And Latency Timer Register" hexmask.long.byte 0x00 16.--23. 1. " SUB_BUS_NUMBER ,Subordinate bus number" hexmask.long.byte 0x00 8.--15. 1. " SEC_BUS_NUMBER ,The secondary bus number" hexmask.long.byte 0x00 0.--7. 1. " PRI_BUS_NUMBER ,The primary bus number" line.long 0x04 "IO_BL_SS,I/O Base/Limit And Secondary Status Register" eventfld.long 0x04 31. " DETECTED_PERR ,Secondary side device receives a poisoned TLP" "Not active,Active" eventfld.long 0x04 30. " RECEIVED_SERR ,Secondary side device receives an ERR_FATAL or ERR_NONFATAL message" "Not active,Active" eventfld.long 0x04 29. " RECEIVED_MASTER ,Secondary side device receives a completion with unsupported request completion status" "Not aborted,Aborted" textline " " eventfld.long 0x04 28. " RECEIVED_TARGET ,Secondary side device receives a completion with completer abort completion status" "Not aborted,Aborted" eventfld.long 0x04 27. " SIGNALED_TARGET ,Secondary side device completes a request using completer abort completion status" "Not aborted,Aborted" eventfld.long 0x04 24. " MASTER_DATA_PERR ,Master data parity error bit" "Not active,Active" textline " " bitfld.long 0x04 12.--15. " IO_LIMIT ,Corresponds to address bits AD[15:12] of the I/O limit" "0,256,512,,,,,,,,,,,,,64k" rbitfld.long 0x04 8.--11. " IO_LIMIT_SUPPORT ,Identifies the I/O addressing support" "16,32,?..." bitfld.long 0x04 4.--7. " IO_BASE ,Corresponds to address bits AD[15:12] of the I/O base address" "0,256,512,,,,,,,,,,,,,64k" textline " " rbitfld.long 0x04 0.--3. " IO_BASE_SUPPORT ,Identifies the I/O addressing support" "16,32,?..." line.long 0x08 "MEM_BL,Memory Base And Memory Limit Register" hexmask.long.word 0x08 20.--31. 0x10 " MEM_LIMIT ,Corresponds to address bits AD[31:20] of the memory-mapped I/O limit" hexmask.long.word 0x08 4.--15. 0x10 " MEM_BASE ,Corresponds to address bits AD[31:20] of the memory-mapped I/O base address" line.long 0x0C "PRE_BL,Prefetchable Memory Base/Limit Register" hexmask.long.word 0x0C 20.--31. 0x10 " PREFETCH_MEM_LIMIT ,Corresponds to address bits AD[31:20] of the prefetchable memory limit" rbitfld.long 0x0C 16.--19. " L64BIT ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..." hexmask.long.word 0x0C 4.--15. 0x10 " PREFETCH_MEM_BASE ,corresponds to address bits AD[31:20] of the prefetchable memory base address" textline " " bitfld.long 0x0C 0.--3. " B64BIT ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..." line.long 0x10 "PRE_BU32,Prefetchable Memory Base Upper 32 Bits Register" line.long 0x14 "PRE_LU32,Prefetchable Memory Limit Upper 32 Bits Register" line.long 0x18 "IO_BL_U16,I/O Base/Limit Upper 16 Bits Register" hexmask.long.word 0x18 16.--31. 1. " LIMIT_UPPER_BITS ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O limit" hexmask.long.word 0x18 0.--15. 1. " BASE_UPPER_BITS ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O base address" rgroup.long 0x34++0x07 line.long 0x00 "CAP_PTR,Capabilities Pointer" hexmask.long.byte 0x00 0.--7. 0x01 " CAP_PTR_CAP_PTR ,Offset into configuration space where the capabilities list begins" group.long 0x3C++0x03 line.long 0x00 "INTR_BCR,Interrupt Bridge Control Registers" bitfld.long 0x00 22. " SB_RESET ,Triggers a hot reset on the corresponding PCI express port" "Disabled,Enabled" bitfld.long 0x00 20. " VGA_16BITIO ,Full 16-bit decode of IO address range for VGA" "Disabled,Enabled" bitfld.long 0x00 19. " VGA_ADDRESS ,P2P bridge will claim all of the legacy VGA addresses" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ISA_ADDRESS ,Modifies the response by the bridge to ISA I/O addresses" "Disabled,Enabled" bitfld.long 0x00 17. " SERR_FORWARD ,Forwarding of ERR_COR/ERR_NONFATAL and ERR_FATAL from secondary to primary" "Disabled,Enabled" bitfld.long 0x00 16. " PERR_RESP ,Response to poisoned TLPs" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN ,Contains the interrupt pin the device (or device function) uses" hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE ,Contains the interrupt routing information" tree.end tree "PCI Subsystem ID And Subsystem Vendor ID Capability Registers" width 6. rgroup.long 0x40++0x07 line.long 0x00 "SS_0,Subsystem ID/Vendor ID Capability Register 0" hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next capabilities list item" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the SSID/SSVID registers in a PCI-to-PCI bridge" line.long 0x04 "SS_1,Subsystem ID/Vendor ID Capability Register 1" hexmask.long.word 0x04 16.--31. 1. " SSID ,Identifies the particular add-in card or subsystem" hexmask.long.word 0x04 0.--15. 1. " SSVID ,Identifies the manufacturer of the add-in card or subsystem" tree.end tree "PCI Power Management Capability Structure Registers" rgroup.long 0x48++0x03 line.long 0x00 "PM_0,Power Management Register 0" bitfld.long 0x00 31. " D3_COLD_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 30. " D3_HOT_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 29. " D2_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 28. " D1_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" textline " " bitfld.long 0x00 27. " D0_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported" bitfld.long 0x00 26. " D2_SUPPORT ,D2 power management state support" "Not supported,Supported" bitfld.long 0x00 25. " D1_SUPPORT ,D1 power management state support" "Not supported,Supported" bitfld.long 0x00 22.--24. " AUX_CURRENT ,3.3Vaux auxiliary current requirements for the PCI function" "0,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA" textline " " bitfld.long 0x00 21. " DEV_SPEC_INIT ,Device specific initialization bit" "Not needed,Needed" bitfld.long 0x00 16.--18. " PCIPM_REV ,Revision of the PCI power management interface specification" ",,Rev 1.1,Rev 1.2,?..." hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next capabilities list item" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the power management capability registers in a PCI to PCI bridge" group.long 0x4C++0x03 line.long 0x00 "PM_1,Power Management Register 1" eventfld.long 0x00 15. " PME_STATUS ,Assert the PME# signal independent of the state of the PME_En bit" "Not active,Active" bitfld.long 0x00 8. " PME ,Assert PME?..." "Disabled,Enabled" bitfld.long 0x00 0.--1. " PWR_STATE ,Determine the current power state of a function and to set the function into a new power state" "D0,D1,D2,D3hot" tree.end tree "PCI MSI Capability Structure Registers" width 16. group.long 0x50++0x0F line.long 0x00 "MSI_CTRL,MSI Control Registers" rbitfld.long 0x00 23. " 64BIT_CAP ,Capability of generating a 64-bit message address" "Not capable,Capable" bitfld.long 0x00 20.--22. " MULT_EN ,Number of allocated messages" "0,2,4,8,?..." rbitfld.long 0x00 17.--19. " MULT_CAP ,Number of requested messages" "0,2,?..." bitfld.long 0x00 16. " CTRL_MSI ,Permission to use message signaled interrupt to request service" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR ,Points to the next item in the capabilities list" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Detect the presence of the Message Signaled Interrupt Capability registers in a PCI-to-PCI bridge" line.long 0x04 "MSI_LOW_ADDR,MSI Message Lower Address Register" hexmask.long 0x04 2.--31. 0x04 " DWORD ,Bits 31:2 of the address" line.long 0x08 "MSI_UPPER_ADDR,MSI Message Upper Address Register" line.long 0x0C "MSI_DATA,MSI Message Data Register" hexmask.long.word 0x0C 0.--15. 1. " DATA ,MSI message data" tree.end sif (cpuis("TEGRAX2")) tree "PCI MSI Map Register" group.long 0x60++0x0B line.long 0x00 "MSI_MAP_0,MSI MAP Capability Register" rbitfld.long 0x00 27.--31. " CAP_TYPE ,Capability type for MSI Mapping Capability block" ",,,,,,,,,,,,,,,,,,,,,CAP_TYPE_MSI,?..." bitfld.long 0x00 16. " XLATE_ENABLE ,Global enable for MSI translation" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 0x01 " CAP_PTR ,Pointer to the next capability in the list" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Capability ID for HyperTransport technology devices" line.long 0x04 "MSI_MAP_1,MSI MAP Lower Address Register" hexmask.long.word 0x04 20.--31. 0x10 " ADDRESS_LOWER ,Lower [31:0] bit address field" line.long 0x08 "MSI_MAP_2,MSI MAP Upper Address Register" tree.end endif tree "PCI Express Capability Structure Registers" width 26. rgroup.long 0x80++0x07 line.long 0x00 "PCI_EXPRESS_CAPABILITY,PCI Express Capability List Register" bitfld.long 0x00 25.--29. " INTERRUPT_MESSAGE_NUMBER ,PCI express capability interrupt message number " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 24. " SLOT_IMPLEMENTED ,PCI express capability slot implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 20.--23. " DEVICE_PORT_TYPE ,PCI express capability device port type" "PCI express endpoint device,Legacy PCI express endpoint device,,,Root port of PCI express root complex,Upstream port of PCI express switch,Downstream port of PCI express switch,PCI express to PCI/PCI-X bridge,PCI/PCI-X to PCI express bridge,?..." textline " " bitfld.long 0x00 16.--19. " VERSION ,PCI express capability version number" ",Version 1,Version 2,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " LIST_NEXT_CAPABILITY_PTR ,The offset to the next PCI capability structure" textline " " hexmask.long.byte 0x00 0.--7. 1. " LIST_CAPABILITY_ID ,Indicates PCI express capability structure" line.long 0x04 "DEVICE_CAPABILITY,Device Capabilities Register" bitfld.long 0x04 26.--27. " CAPTURED_SLOT_POWER_LIMIT_SCALE ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x" textline " " hexmask.long.byte 0x04 18.--25. 1. " CAPTURED_SLOT_POWER_LIMIT_VALUE ,Specifies the upper limit on power supplied by slot" textline " " bitfld.long 0x04 15. " ROLE_BASED_ERR_REPORTING ,Device implements the functionality originally defined in the error reporting ECN" "Not implemented,Implemented" textline " " bitfld.long 0x04 14. " POWER_INDICATOR_PRESENT ,Power indicator" "Not implemented,Implemented" textline " " bitfld.long 0x04 13. " ATTENTION_INDICATOR_PRESENT ,Attention indicator" "Not implemented,Implemented" textline " " bitfld.long 0x04 12. " ATTENTION_BUTTON_PRESENT ,Attention button" "Not implemented,Implemented" textline " " bitfld.long 0x04 9.--11. " ENDPOINT_L1_ACCEPTABLE_LATENCY ,Acceptable latency due to the transition from L1 state to the L0 state" "<1 us,1 us - 2 us,2 us -4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us-64 us,> 64 us" textline " " bitfld.long 0x04 6.--8. " ENDPOINT_L0S_ACCEPTABLE_LATENCY ,Acceptable total latency due to the transition from L1 state to the L0 state" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1. us,1 us - 2 us,2 us-4us,> 4 us" textline " " bitfld.long 0x04 5. " EXTENDED_TAG_FIELD_SIZE ,Maximum supported size of the tag field" "5-bit tag field,8-bit tag field" textline " " bitfld.long 0x04 3.--4. " PHANTOM_FUNCTIONS_SUPPORTED ,Phantom functions support" "No bits used,First MSB used,First two MSB used,Three bits" textline " " bitfld.long 0x04 0.--2. " MAX_PAYLOAD_SIZE ,Maximum payload size" "128B,256B,512B,1024B,2048B,4096B,?..." group.long 0x88++0x03 line.long 0x00 "DEVICE_CONTROL_STATUS,Device Control/Status Registers" rbitfld.long 0x00 21. " TRANSACTIONS_PENDING ,Transactions pending" "Completed,Pending" textline " " rbitfld.long 0x00 20. " AUX_POWER_DETECTED ,AUX power detected" "Not detected,Detected" textline " " eventfld.long 0x00 19. " UNSUPP_REQUEST_DETECTED ,Unsupported request" "Not detected,Detected" textline " " eventfld.long 0x00 18. " FATAL_ERROR_DETECTED ,Fatal error" "Not detected,Detected" textline " " eventfld.long 0x00 17. " NON_FATAL_ERROR_DETECTED ,Non-fatal error" "Not detected,Detected" textline " " eventfld.long 0x00 16. " CORR_ERROR_DETECTED ,Correctable errors" "Not detected,Detected" textline " " bitfld.long 0x00 12.--14. " MAX_READ_REQUEST_SIZE ,Maximum read request size" "128B,256B,512B,1024B,2048B,4096B,?..." textline " " bitfld.long 0x00 11. " ENABLE_NO_SNOOP ,No snoop bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " AUXILLARY_POWER_PM_ENABLE ,AUX power PM enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 9. " PHANTOM_FUNCTIONS_ENABLE ,Phantom functions" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " EXTENDED_TAG_FIELD_ENABLE ,8-bit tag field" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--7. " MAX_PAYLOAD_SIZE ,Maximum TLP payload size" "128B,256B,512B,1024B,2048B,4096B,?..." textline " " bitfld.long 0x00 4. " ENABLE_RELAXED_ORDERING ,Relaxed ordering bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " UNSUPP_REQ_REPORTING_ENABLE ,Reporting of unsupported requests" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " FATAL_ERROR_REPORTING_ENABLE ,Reporting of fatal errors" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NON_FATAL_ERROR_REPORTING_ENABLE ,Reporting of non-fatal errors" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CORR_ERROR_REPORTING_ENABLE ,Reporting of correctable errors" "Disabled,Enabled" textline " " rgroup.long 0x8C++0x03 line.long 0x00 "LINK_CAPABILITIES,Link Capabilities Register" hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER ,PCI express port number" textline " " bitfld.long 0x00 21. " BW_NOTIFY ,Bandwidth notify" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " LINKACTV_REPORTING ,Link active reporting" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " SURPRISE_DOWN_ERPT_CAP ,Detecting and reporting a surprise down error condition" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " CLOCK_PM ,Component tolerates the removal of any reference clock" "Disabled,Enabled" textline " " bitfld.long 0x00 15.--17. " L1_EXIT_LATENCY ,L1 exit latency" "< 1 us,1 us - 2 us,2 us - 4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us - 64 us,> 64 us" textline " " bitfld.long 0x00 12.--14. " L0S_EXIT_LATENCY ,L0s exit latency" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1 us,1 us - 2 us,2 us - 4us,?..." textline " " bitfld.long 0x00 10.--11. " ACTIVE_STATE_LINK_PM_SUPPORT ,Level of active state power management supported" ",L0s Entry,,L0s and L1" textline " " bitfld.long 0x00 4.--9. " MAX_LINK_WIDTH ,Maximum width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--3. " MAX_LINK_SPEED ,Maximum Link speed" ",2.5 Gb/s Link,?..." else bitfld.long 0x00 0.--3. " MAX_LINK_SPEED ,Maximum Link speed" ",2.5 Gb/s Link,5.0 Gb/s Link,?..." endif textline " " group.long 0x90++0x03 line.long 0x00 "LINK_CONTROL_STATUS,Link Control/Status Register" eventfld.long 0x00 31. " AUTO_BANDWIDTH ,Auto bandwidth" "Disabled,Enabled" textline " " eventfld.long 0x00 30. " BW_MANAGEMENT ,Bandwidth management" "Disabled,Enabled" textline " " rbitfld.long 0x00 29. " DL_LINK_ACTIVE ,Data link control and management state machine" "Not active,Active" textline " " rbitfld.long 0x00 28. " SLOT_CLOCK_CONFIG ,Component uses platform reference clock" "Platform clock,Independent" textline " " rbitfld.long 0x00 27. " LINK_TRAINING ,Link training" "Completed,In progress" textline " " rbitfld.long 0x00 20.--25. " NEG_LINK_WIDTH ,Negotiated width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..." textline " " rbitfld.long 0x00 16.--19. " LINK_SPEED ,Negotiated Link Speed" ",2.5 Gb/s,5.0 Gb/s,?..." textline " " bitfld.long 0x00 11. " AUTO_BANDWIDTH_INT_EN ,Auto bandwidth interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " BW_MANAGEMENT_INT_EN ,Bandwidth management interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " HW_AUTO_WIDTH_DISABLE ,Hardware auto width disable" "No,Yes" textline " " rbitfld.long 0x00 8. " CLOCK_PM ,Clock PM" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EXTENDED_SYNCH ,Forces extended transmission" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " COMMON_CLOCK_CONFIGURATION ,Common clock configuration" "Common reference clock,Asynchrous reference clock" textline " " rbitfld.long 0x00 5. " RETRAIN_LINK ,Link retraining" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " LINK_DISABLE ,Disabling the Link" "No,Yes" textline " " rbitfld.long 0x00 3. " READ_COMPLETION_BOUNDARY ,RCB support capabilities" "64 byte,128 byte" textline " " bitfld.long 0x00 0.--1. " ACTIVE_STATE_LINK_PM_CONTROL ,Level of active state PM supported" ",L0s Entry,,L0s and L1" rgroup.long 0x94++0x03 line.long 0x00 "SLOT_CAPABILITIES,Slot Capabilities Register" hexmask.long.word 0x00 19.--31. 0x08 " PHYSICAL_SLOT_NUMBER ,Physical slot number attached to this port" textline " " bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT ,Notification when an issued command is completed by the hot plug controller" "Supported,Not supported" textline " " bitfld.long 0x00 17. " ELECTROMECHANICAL_INTERLOCK_PRESENT ,Electro mechanical interlock mechanism" "Not implemented,Implemented" textline " " bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Upper limit on power supplied by slot" textline " " bitfld.long 0x00 6. " HOT_PLUG_CAPABLE ,Supporting Hot-plug operations" "Not capable,Capable" textline " " bitfld.long 0x00 5. " HOT_PLUG_SURPRISE ,Hot-plug surprise" "Not capable,Capable" textline " " bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT ,Power indicator" "Not Implemented,Implemented" textline " " bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT ,Attention indicator" "Not Implemented,Implemented" textline " " bitfld.long 0x00 2. " MRL_SENSOR_PRESENT ,MRL sensor" "Not Implemented,Implemented" textline " " bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT ,Power controller" "Not Implemented,Implemented" textline " " bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT ,Attention button" "Not Implemented,Implemented" group.long 0x98++0x0B line.long 0x00 "SLOT_CONTROL_STATUS,Slot Control/Status Register" eventfld.long 0x00 24. " DL_LAYER_STATE_CHANGED ,Notification when Data Link Layer Active field is changed" "Disabled,Enabled" textline " " rbitfld.long 0x00 23. " ELECTROMECHANICAL_INTERLOCK_STATE ,Electromechanical interlock" "Disengaged,Engaged" textline " " rbitfld.long 0x00 22. " PRESENCE_DETECT_STATE ,Presence of a card in the slot" "Slot empty,Card present" textline " " rbitfld.long 0x00 21. " MRL_SENSOR_STATE ,MRL sensor status" "MRL Closed,MRL Open" textline " " eventfld.long 0x00 20. " COMMAND_COMPLETED ,Hot-plug controller completed an issued command" "Not completed,Completed" textline " " eventfld.long 0x00 19. " PRESENCE_DETECT_CHANGED ,Presence Detect change" "Not detected,Detected" textline " " eventfld.long 0x00 18. " MRL_SENSOR_CHANGED ,MRL Sensor state change" "Not detected,Detected" textline " " eventfld.long 0x00 17. " POWER_FAULT_DETECTED ,Power fault" "Not detected,Detected" textline " " eventfld.long 0x00 16. " ATTN_BUTTON_PRESSED ,Attention button" "Not pressed,Pressed" textline " " bitfld.long 0x00 12. " DL_LAYER_STATE_CHANGED_ENABLE ,Data Link Layer Link Active field" "Not changed,Changed" textline " " rbitfld.long 0x00 11. " ELECTROMECHANICAL_INTERLOCK_CONTROL ,Electromechanical interlock mechanism" "Not supported,Supported" textline " " bitfld.long 0x00 10. " POWER_CONTROLLER_CONTROL ,Power state of the slot" "Power on,Power off" textline " " bitfld.long 0x00 8.--9. " POWER_INDICATOR_CONTROL ,Current state of the Power Indicator" ",On,Blink,Off" textline " " bitfld.long 0x00 6.--7. " ATTN_INDICATOR_CONTROL ,Current state of the Attention Indicator" ",On,Blink,Off" textline " " bitfld.long 0x00 5. " HOT_PLUG_INTERRUPT_ENABLE ,Generation of hot plug interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " COMMAND_COMPLETED_INTERRUPT_ENABLE ,Generation of hot plug interrupt when a command is completed" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PRESENCE_DETECT_CHANGED_ENABLE ,Presence detect changed event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " STATUS_MRL_SENSOR_CHANGED_ENABLE ,MRL sensor changed event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " POWER_FAULT_DETECTED_ENABLE ,Power fault event interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ATTN_BUTTON_PRESSED_ENABLE ,Attention button pressed event interrupt" "Disabled,Enabled" line.long 0x04 "RCR,Root Control Register" bitfld.long 0x04 3. " PME_INT ,PME interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " SERR_FAT ,Generating system error if a fatal error is reported" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SERR_NONFAT ,Generating system error if a non-fatal error is reported" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " SERR_COR ,System error if a correctable error is reported" "Disabled,Enabled" line.long 0x08 "RSR,Root Status Register" rbitfld.long 0x08 17. " PMEPEND ,Another PME is pending when the PMESTAT bit is set" "Not pending,Pending" textline " " eventfld.long 0x08 16. " PMESTAT ,PME was asserted by the requester ID" "Not active,Active" textline " " hexmask.long.word 0x08 0.--15. 1. " REQID ,PCI requester ID of the last PME requester" rgroup.long 0xA4++0x03 line.long 0x00 "DEVICE_CAPABILITIES_2,Root Capabilities Register 2" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) bitfld.long 0x00 11. " LTR_MECH_SUP ,LTR Capability support" "Unsupported,Supported" textline " " endif bitfld.long 0x00 4. " CPL_TO_DIS_SUP ,Support disabling the completion timeout mechanism" "Unsupported,Supported" textline " " bitfld.long 0x00 0.--3. " CPL_TO_RANGES_SUP ,Completion timeout ranges supported by the root port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xA8++0x03 line.long 0x00 "DEVICE_CONTROL_STATUS_2,Device Control/Status Register 2" bitfld.long 0x00 4. " CPL_TO_DISABLE ,Disables completion timeout" "No,Yes" textline " " bitfld.long 0x00 0.--3. " CPL_TO_VALUE ,Completion timeout ranges supported by the root port" "Default,Range A LO,Range A HI,,,Range B LO,Range B HI,?..." group.long 0xB0++0x03 line.long 0x00 "LINK_CONTROL_STATUS_2,Link Control Status Register" rbitfld.long 0x00 16. " CURRENT_DEEMPHASIS_LEVEL ,Current deemphasis level" "6,3.5" textline " " bitfld.long 0x00 12. " COMPLIANCE_DEEMPHASIS ,Compliance deemphasis" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " COMPLIANCE_SOS ,Compliance SOS" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ENTER_MODIFIED_COMPLIANCE ,Transmission of the modified compliance pattern" "Disabled,Enabled" textline " " bitfld.long 0x00 7.--9. " TRANSMIT_MARGIN ,Value of the non-deemphasized voltage level (Full-swing/Half swing)" "800-1200mV/400-600mV,600-800mV/300-400mV,400-600mV/200-300mV,200-400mV/100-200mV,?..." textline " " rbitfld.long 0x00 6. " SELECTABLE_DEEMPHASIS ,Level of de-emphasis" "-6dB,-3.5dB" textline " " rbitfld.long 0x00 5. " HW_AUTO_SPEED_DISABLE ,Link speed change disable" "No,Yes" textline " " bitfld.long 0x00 4. " ENTER_COMPLIANCE ,Forces link to enter compliance mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " TARGET_LINK_SPEED ,Upper limit on the link operational speed" ",2.5Gb/s,5Gb/s,?..." tree.end tree "Error Reporting Capability Registers" width 20. sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) rgroup.long 0x100++0x03 line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register" hexmask.long.word 0x00 20.--31. 1. " NEXT_PTR ,Next PTR" bitfld.long 0x00 16.--19. " VERSION ,Version" "Version 0,Version 1,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " ID ,ID" else rgroup.long 0x100++0x03 line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register" hexmask.long.word 0x00 20.--31. 1. " ID ,ID" bitfld.long 0x00 16.--19. " VERSION ,Version" "Version 0,Version 1,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " NEXT_PTR ,Next PTR" endif group.long 0x104++0x0B line.long 0x00 "ERPTCAP_UCERR,Uncorrectable Error Status Register" eventfld.long 0x00 20. " UNSUP_REQ_ERR ,Unsupported request error status" "No error,Error" eventfld.long 0x00 19. " ECRC_ERR ,ECRC error status" "No error,Error" textline " " eventfld.long 0x00 18. " MF_TLP ,Malformed TLP status" "False,True" eventfld.long 0x00 17. " RCV_OVFL ,Receiver overflow status" "No overflow,Overflow" textline " " eventfld.long 0x00 16. " UNEXP_COMP ,Unexpected completion status" "False,True" eventfld.long 0x00 15. " COMP_ABORT ,Completion abort status" "Not aborted,Aborted" textline " " eventfld.long 0x00 14. " COMP_TO ,Completion timeout status" "No timeout,Timeout" eventfld.long 0x00 13. " FC_PROTO_ERR ,Flow control protocol error status" "No error,Error" textline " " eventfld.long 0x00 12. " POS_TLP ,Poisoned TLP status" "False,True" eventfld.long 0x00 4. " DLINK_PROTO_ERR ,Data link protocol error status" "No error,Error" textline " " rbitfld.long 0x00 0. " TRAINING_ERR ,Training error status" "No error,Error" line.long 0x04 "ERPTCAP_UCERR_MK,Uncorrectable Error Mask Register" bitfld.long 0x04 20. " UNSUP_REQ_ERR ,Unsupported request error mask" "Not masked,Masked" bitfld.long 0x04 19. " ECRC_ERR ,ECRC error mask" "Not masked,Masked" textline " " bitfld.long 0x04 18. " MF_TLP ,Malformed TLP mask" "Not masked,Masked" bitfld.long 0x04 17. " RCV_OVFL ,Receiver overflow mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " UNEXP_COMP ,Unexpected completion mask" "Not masked,Masked" bitfld.long 0x04 15. " COMP_ABORT ,Completion abort mask" "Not masked,Masked" textline " " bitfld.long 0x04 14. " COMP_TO ,Completion timeout mask" "Not masked,Masked" bitfld.long 0x04 13. " PROTO_ERR ,Flow control protocol error mask" "Not masked,Masked" textline " " bitfld.long 0x04 12. " POS_TLP ,Poisoned TLP mask" "Not masked,Masked" bitfld.long 0x04 4. " DLINK_PROTO_ERR ,Data link protocol error mask" "Not masked,Masked" textline " " rbitfld.long 0x04 0. " TRAINING_ERR ,Training error mask" "Not masked,Masked" line.long 0x08 "ERPTCAP_UCERR_SEVR,Correctable Error Severity Register" bitfld.long 0x08 20. " UNSUP_REQ_ERR ,Unsupported request error" "Non-fatal,Fatal" bitfld.long 0x08 19. " ECRC_ERR ,ECRC error" "Non-fatal,Fatal" textline " " bitfld.long 0x08 18. " MF_TLP ,Malformed TLP" "Non-fatal,Fatal" bitfld.long 0x08 17. " RCV_OVFL ,Receiver overflow" "Non-fatal,Fatal" textline " " bitfld.long 0x08 16. " UNEXP_COMP ,Unexpected completion" "Non-fatal,Fatal" bitfld.long 0x08 15. " COMP_ABORT ,Completion abort" "Non-fatal,Fatal" textline " " bitfld.long 0x08 14. " COMP_TO ,Completion timeout" "Non-fatal,Fatal" bitfld.long 0x08 13. " PROTO_ERR ,Flow control protocol error" "Non-fatal,Fatal" textline " " bitfld.long 0x08 12. " POS_TLP ,Poisoned TLP" "Non-fatal,Fatal" bitfld.long 0x08 4. " DLINK_PROTO_ERR ,Data link protocol error" "Non-fatal,Fatal" textline " " rbitfld.long 0x08 0. " TRAINING_ERR ,Training error" "Non-fatal,Fatal" group.long 0x110++0x03 line.long 0x00 "ERPTCAP_CERR,Correctable Error Status Register" eventfld.long 0x00 13. " ADVISORY_NF ,ADVISORY NF status" "Not masked,Masked" eventfld.long 0x00 12. " RPLY_TO ,Replay timer timeout status" "Not masked,Masked" textline " " eventfld.long 0x00 8. " RPLY_RLOV ,Replay NUM rollover status" "Not masked,Masked" eventfld.long 0x00 7. " BAD_DLLP ,Bad DLLP status" "Not masked,Masked" textline " " eventfld.long 0x00 6. " BAD_TLP ,Bad TLP status" "Not masked,Masked" eventfld.long 0x00 0. " RCV_ERR ,Receiver error status" "Not masked,Masked" group.long 0x114++0x03 line.long 0x00 "ERPTCAP_CERR_MK,Correctable Error Mask Register" bitfld.long 0x00 13. " ADVISORY_NF ,ADVISORY NF mask" "Not masked,Masked" bitfld.long 0x00 12. " RPLY_TO ,Replay timer timeout mask" "Not masked,Masked" textline " " bitfld.long 0x00 8. " RPLY_RLOV ,Replay NUM rollover mask" "Not masked,Masked" bitfld.long 0x00 7. " BAD_DLLP ,Bad DLLP mask" "Not masked,Masked" textline " " bitfld.long 0x00 6. " BAD_TLP ,Bad TLP mask" "Not masked,Masked" bitfld.long 0x00 0. " RCV_ERR ,Receiver error mask" "Not masked,Masked" textline " " width 26. group.long 0x118++0x03 line.long 0x00 "ERPTCAP_ADV_ERR_CAP_CNTL,Advanced Error Capabilities And Control Register" bitfld.long 0x00 8. " ECRC_CHK_EN ,ECRC CHK EN" "Disabled,Enabled" rbitfld.long 0x00 7. " ECRC_CHK_CAP ,ECRC CHK CAP" "False,True" textline " " bitfld.long 0x00 6. " ECRC_GEN_EN ,ECRC GEN EN" "Disabled,Enabled" rbitfld.long 0x00 5. " ECRC_GEN_CAP ,ECRC GEN CAP" "False,True" textline " " rbitfld.long 0x00 0.--4. " ERR_PTR ,ERR PTR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x11C++0xF line.long 0x00 "ERPTCAP_HDR_LOG_DW0,Header Log Dword 0 Register" line.long 0x04 "ERPTCAP_HDR_LOG_DW1,Header Log Dword 1 Register" line.long 0x08 "ERPTCAP_HDR_LOG_DW2,Header Log Dword 2 Register" line.long 0x0C "ERPTCAP_HDR_LOG_DW3,Header Log Dword 3 Register" textline " " width 20. group.long 0x12C++0x0B line.long 0x00 "ERPTCAP_ERR_CMD,Root Error Command Register" bitfld.long 0x00 2. " FATAL_ERR_RPT_EN ,Fatal error RPT enable" "Disabled,Enabled" bitfld.long 0x00 1. " NONFATAL_ERR_RPT_EN ,Non fatal error RPT enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " COR_ERR_RPT_EN ,Correctable error RPT enable" "Disabled,Enabled" line.long 0x04 "ERPTCAP_ERR_STS,Root Error Status Register" rbitfld.long 0x04 27.--31. " ADV_ERR_INTR_MSG_NUM ,Base and MSI message data offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" eventfld.long 0x04 6. " FATAL_RCVD ,Fatal uncorrectable error messages" "Not received,Received" textline " " eventfld.long 0x04 5. " NONFATAL_RCVD ,Non-fatal uncorrectable error messages" "Not received,Received" eventfld.long 0x04 4. " FIRST_FATAL_RCVD ,First uncorrectable error message" "Not received,Received" textline " " eventfld.long 0x04 3. " MULT_UNCOR_RCVD ,Error is received and UNCOR_RCVD is already set" "False,True" eventfld.long 0x04 2. " STS_UNCOR_RCVD ,Error message" "Not received,Received" textline " " eventfld.long 0x04 1. " MULT_COR_RCVD ,Correctable error message is received and COR_RCVD is already set" "False,True" eventfld.long 0x04 0. " COR_RCVD ,Correctable error" "Not received,Received" line.long 0x08 "ERPTCAP_ERR_ID,Error Source Identification Register" hexmask.long.word 0x08 16.--31. 1. " ERR_COR ,Requestor ID of first correctable error in root error status register " hexmask.long.word 0x08 0.--15. 1. " ERR_UNCOR ,Requestor ID of first uncorrectable error in root error status register " textline " " tree.end width 20. sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) tree "PCI L1 PM Substate Capability Registers" rgroup.long 0x140++0x07 line.long 0x00 "EXT_CAP,Extended Capability Header Register" hexmask.long.word 0x00 20.--31. 0x10 " EXT_CAP_NEXT_CAP ,Offset to the next PCI express capability structure" bitfld.long 0x00 16.--19. " EXT_CAP_VERSION ,PCI-SIG defined version number that indicates the version of the capability structure present" ",L1_SUBSTATES,?..." textline " " hexmask.long.word 0x00 0.--15. 1. " EXT_CAP_ID ,PCI-SIG defined ID number that indicates the nature and format of the extended capability" line.long 0x04 "CAP,Capability Register" bitfld.long 0x04 19.--23. " CAP_T_PWRON_VALUE ,Time (in us) that this Port requires the port on the opposite side of the link to wait" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--17. " CAP_T_PWRON_SCALE ,Specifies the scale used for this port" "2 us,10 us,100 us,?..." textline " " hexmask.long.byte 0x04 8.--15. 1. " CAP_CM_RESTORE_TIME ,Time (in us) required for this port to re-establish common mode" bitfld.long 0x04 4. " CAP_L1_PM_SUBSTATES_SUPPORTED ,L1 PM Substates is supported" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " CAP_ASPM_L1_1_SUPPORTED ,ASPM L1.1 is supported" "Disabled,Enabled" bitfld.long 0x04 2. " CAP_ASPM_L1_2_SUPPORTED ,ASPM L1.2 is is supported" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CAP_PCI_PM_L1_1_SUPPORTED ,PCI-PM L1.1 is supported" "Disabled,Enabled" bitfld.long 0x04 0. " CAP_PCI_PM_L1_2_SUPPORTED ,PCI-PM L1.2 is supported" "Disabled,Enabled" group.long 0x148++0x07 line.long 0x00 "CTRL1,Control 1 Register" bitfld.long 0x00 29.--31. " LTR_L1_2_THRES_SCALE ,Scale for value contained within the LTR_L1.2_THRESHOLD_Value" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 16.--25. 1. " LTR1_2_THRESH_VAL ,Threshold value" textline " " hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME ,Restore time" bitfld.long 0x00 3. " ASPM_L1_1_EN ,ASPM L1.1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ASPM_L1_2_EN ,ASPM L1.2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " PCIPM_L1_1_EN ,PCIPM L1.1 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PCIPM_L1_2_EN ,PCIPM L1.2 enable" "Disabled,Enabled" line.long 0x04 "CTRL2,Control 2 Register" bitfld.long 0x04 3.--7. " T_PWRON_VALUE ,Minimum amount of time (in us) that the Port must wait in L1.2.Exit after sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--1. " T_PWRON_SCALE ,Scale used for the port T_POWER_ON Valuse field in the L1 PM Substates Capabilities register" "2 us,10 us,100 us,?..." tree.end endif tree "NVIDIA Private Registers" width 20. group.long 0x494++0x03 line.long 0x00 "PRIV_XP_DL_0,Various Configurable Registers In The Data Link layer" hexmask.long.word 0x00 19.--29. 1. " GEN2_REPLAY_TIMER_LIMIT ,Replay timer limit" hexmask.long.word 0x00 10.--18. 1. " GEN2_ACK_TIMER_LIMIT ,ACK timer limit" textline " " hexmask.long.word 0x00 1.--9. 1. " GEN2_UPDATE_FC_THRESHOLD ,Update FC frequency" bitfld.long 0x00 0. " GEN2_DL_TIMERS_DISABLE ,Enables the Gen2 DL timer settings" "No,Yes" textline " " width 34. sif (cpuis("TEGRAX1")) rgroup.long 0xC10++0x0F line.long 0x00 "T_PCIE2_RP_LTR_REP_VAL,T_PCIE2_RP_LTR_REP_VAL" hexmask.long.word 0x00 16.--31. 1. " T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP ,T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP" textline " " hexmask.long.word 0x00 0.--15. 1. " T_PCIE2_RP_LTR_REP_VAL_SNOOP ,T_PCIE2_RP_LTR_REP_VAL_SNOOP" line.long 0x04 "T_PCIE2_RP_L1_1_ENTRY_COUNT,T_PCIE2_RP_L1_1_ENTRY_COUNT" bitfld.long 0x04 31. " T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET ,T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x04 30. " T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE" line.long 0x08 "T_PCIE2_RP_L1_2_ENTRY_COUNT,T_PCIE2_RP_L1_2_ENTRY_COUNT" bitfld.long 0x08 31. " T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET ,T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x08 30. " T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x08 0.--15. 1. " T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE" line.long 0x0C "T_PCIE2_RP_L1_2_ABORT_COUNT,T_PCIE2_RP_L1_2_ABORT_COUNT" bitfld.long 0x0C 31. " T_PCIE2_RP_L1_2_ABORT_COUNT_RESET ,T_PCIE2_RP_L1_2_ABORT_COUNT_RESET" "Done,Pending" textline " " bitfld.long 0x0C 30. " T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE" "Done,Pending" textline " " hexmask.long.word 0x0C 0.--15. 1. " T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE ,0 T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE" textline " " elif cpuis("TEGRAX2") width 27. group.long 0xC00++0x0F line.long 0x00 "L1_PM_SUBSTATES_CYA,L1 PM Substates CYA Register" bitfld.long 0x00 26. " REFCLK_ON_WITH_PAD_PLL_LOCK ,Refclk on with pad PLL lock" "Not locked,Locked" bitfld.long 0x00 25. " REFCLK_ON_WITH_PLLE_LOCK ,Refclk on with PLLE lock" "Not locked,Locked" textline " " bitfld.long 0x00 24. " HIDE_CAP ,Hide capability of L1 PM substates" "Not hidden,Hidden" bitfld.long 0x00 19.--23. " T_PWRON_VALUE ,Time (in us) that this port requires the port on the opposite side of link to wait in L1.2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--17. " T_PWRON_SCALE ,Specifies the scale used for the port T_POWER_ON value field in the L1 PM substates capabilities register" "2 us,10 us,100 us,?..." hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME ,Time (in us) required for this port to re-establish common mode as described in table in the L1 PM substates ECN" textline " " bitfld.long 0x00 4. " L1_PM_SUBSTATES ,L1 PM Substates support enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASPM_L1_1 ,ASPM L1.1 support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ASPM_L1_2 ,ASPM L1.2 support enable" "Disabled,Enabled" bitfld.long 0x00 1. " PCI_PM_L1_1 ,PCI-PM L1.1 support enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PCI_PM_L1_2 ,PCI-PM L1.2 support enable" "Disabled,Enabled" line.long 0x04 "L1_PM_SUBSTATES_1_CYA,L1 PM Substates 1 CYA Register" bitfld.long 0x04 22. " RX_TERM_EN_IN_L1_2 ,Receiver PAD termination when in L1.2 enable" "Disabled,Enabled" hexmask.long.word 0x04 13.--21. 1. " CHK_CLKREQ_ASSERTED_DLY ,Amount of time the DUT waits in L1.2" textline " " hexmask.long.word 0x04 0.--12. 1. " T_PWR_OFF_DLY ,T POWER ON DELY diagnostic amount of time the DUT waits in L1.2_entry before it enters L1.2_idle" line.long 0x08 "L1_PM_SUBSTATES_2_CYA,L1 PM Substates 2 CYA Register" bitfld.long 0x08 21.--24. " MICROSECOND_COMP ,Compensation value of the crystal oscillator frequency in microsecond tick generator used for REFCLK_ON time and common-mode turn ON time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 13.--20. 1. " MICROSECOND ,Microsecond diagnostic bit number of clocks in a microsecond in clk25m" textline " " hexmask.long.word 0x08 0.--12. 1. " T_L1_2_DLY ,T L1.2 delay diagnostic" line.long 0x0C "L1_PM_SUBSTATES_3_CYA,L1 PM Substates 3 CYA Register" hexmask.long.word 0x0C 18.--30. 1. " L11_T_REFCLK_ON ,Number of microseconds the port must wait in L1.1 to enable refclk after clkreq# has been asserted" bitfld.long 0x0C 17. " L11_T_REFCLK_ON_ENABLE ,Refclk clock timer logic when in L1.1 after seeing deassertion of clkreq# enable" "Disabled,Enabled" textline " " hexmask.long.word 0x0C 4.--16. 1. " L12_T_REFCLK_ON ,Number of microseconds the port must wait to enable refclk after clkreq# has been asserted" bitfld.long 0x0C 3. " PCIPM_L1_2 ,PCIMPM L1.2 functionality enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " ASPM_L1_2 ,ASPM L1.2 functionality enable" "Disabled,Enabled" bitfld.long 0x0C 1. " PCIPM_L1_1 ,PCIPM L1.1 functionality enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " ASPM_L1_1 ,ASPM L1.1 functionality enable" "Disabled,Enabled" rgroup.long 0xC10++0x03 line.long 0x00 "LTR_REP_VAL,LTR Reported Value Register" hexmask.long.word 0x00 16.--31. 1. " NO_SNOOP ,Value for no snoop" hexmask.long.word 0x00 0.--15. 1. " SNOOP ,Value for snoop" group.long 0xC14++0x17 line.long 0x00 "L1_1_ENTRY_COUNT,L1.1 Entry Count Register" bitfld.long 0x00 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x00 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x00 0.--15. 1. " VALUE ,Number of times the link entered the L1.1 state" line.long 0x04 "L1_2_ENTRY_COUNT,L1.2 Entry Count Register" bitfld.long 0x04 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x04 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x04 0.--15. 1. " VALUE ,Number of times the link entered L1.2 ENTRY state" line.long 0x08 "L1_2_ABORT_COUNT,L1.2 Abort Count Register" bitfld.long 0x08 31. " RESET ,VALUE reset" "No reset,Reset" bitfld.long 0x08 30. " FREEZE ,Freeze" "No freeze,Freeze" textline " " hexmask.long.word 0x08 0.--15. 1. " VALUE ,Number of times the link entered the L1.2 ENTRY state" line.long 0x0C "LTR_OVERRIDE,LTR Override Register" hexmask.long.word 0x0C 16.--31. 1. " NO_SNOOP ,LTR override no snoop value" hexmask.long.word 0x0C 0.--15. 1. " SNOOP ,LTR override snoop value" line.long 0x10 "L1SS_SPARE,L1SS Spare Register" hexmask.long.word 0x10 18.--31. 1. " SPARE2 ,Spare 2" eventfld.long 0x10 17. " LTR_MSG_RCV_STS ,LTR MSG RCV STS" "No effect,Cleared" textline " " bitfld.long 0x10 16. " LTR_MSG_INT_EN ,LTR MSG INT enable" "Disabled,Enabled" hexmask.long.word 0x10 2.--15. 1. " SPARE1 ,Spare 1" textline " " bitfld.long 0x10 1. " LTR_OVERRIDE_NO_SNOOP_EN ,LTR override no snoop enable" "Disabled,Enabled" bitfld.long 0x10 0. " LTR_OVERRIDE_SNOOP_EN ,LTR override snoop enable" "Disabled,Enabled" line.long 0x14 "SLCG_OVERRIDE_DIS_SLCG,SLCG Override Disable SLCG Register" bitfld.long 0x14 22. " PRI_CLK ,PRI CLK enable" "Disabled,Enabled" bitfld.long 0x14 21. " TMS0_UFPCI_CLK ,TMS0 UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 20. " TMS0_DFPCI_CLK ,TMS0 DFPCI CLK enable" "Disabled,Enabled" bitfld.long 0x14 19. " TMS0C2_XTXCLK1X ,TMS0C2 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 18. " TMS0C2_XCLK ,TMS0C2 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 17. " TMS0C1_XTXCLK1X ,TMS0C1 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " TMS0C1_XCLK ,TMS0C1 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 15. " TMS0C0_XTXCLK1X ,TMS0C0 XTXCLK1X enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " TMS0C0_XCLK ,TMS0C0 XCLK enable" "Disabled,Enabled" bitfld.long 0x14 13. " TMSC0_XCLK ,TMSC0 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " T0C2_PCA_XCLK ,T0C2 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 11. " T0C2_PCA_UFPCI_CLK ,T0C2 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " T0C1_PCA_XCLK ,T0C1 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 9. " T0C1_PCA_UFPCI_CLK ,T0C1 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " T0C0_PCA_XCLK ,T0C0 PCA XCLK enable" "Disabled,Enabled" bitfld.long 0x14 7. " T0C0_PCA_UFPCI_CLK ,T0C0 PCA UFPCI CLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 6. " GRP2_XTXCLK1X ,GRP2 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 5. " GRP2_XCLK ,GRP2 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " GRP1_XTXCLK1X ,GRP1 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 3. " GRP1_XCLK ,GRP1 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " GRP0_XTXCLK1X ,GRP0 XTXCLK1X enable" "Disabled,Enabled" bitfld.long 0x14 1. " GRP0_XCLK ,GRP0 XCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " CLK25M ,CLK25M enable" "Disabled,Enabled" group.long 0xD00++0x1B line.long 0x00 "DBG0,Debug 0" line.long 0x04 "DBG1,Debug 1" line.long 0x08 "DBG2,Debug 2" line.long 0x0C "DBG3,Debug 3" line.long 0x10 "DBG4,Debug 4" line.long 0x14 "DBG5,Debug 5" line.long 0x18 "DBG6,Debug 6" bitfld.long 0x18 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x18 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " hexmask.long 0x18 0.--29. 1. " CTL ,Control" rgroup.long 0xD1C++0x03 line.long 0x00 "DBG_RD_BACK_LO,Debug RD Back LO" group.long 0xD20++0x1B line.long 0x00 "DBG_RD_BACK_HI,Debug RD Back HI" line.long 0x04 "LANE_DBG0,Lane Debug 0" line.long 0x08 "LANE_DBG1,Lane Debug 1" line.long 0x0C "LANE_DBG2,Lane Debug 2" line.long 0x10 "LANE_DBG3,Lane Debug 3" line.long 0x14 "LANE_DBG4,Lane Debug 4" line.long 0x18 "LANE_DBG5,Lane Debug 5" bitfld.long 0x18 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x18 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " hexmask.long 0x18 0.--29. 1. " CTL ,Control" rgroup.long 0xD3C++0x07 line.long 0x00 "LANE_DBG_RD_BACK_LO_VALUE,Lane Debug RD Back LO Value" line.long 0x04 "LANE_DBG_RD_BACK_HI_VALUE,Lane Debug RD Back HI Value" group.long 0xD44++0x0B line.long 0x00 "LINK_DBG0,Link Debug 0" line.long 0x04 "LINK_DBG1,Link Debug 1" line.long 0x08 "LINK_DBG2,Link Debug 2" bitfld.long 0x08 31. " LOW_POWER_MODE ,Low power mode" "Disabled,Enabled" bitfld.long 0x08 30. " CG_EN ,CG enable" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " CTL ,Control" "0,1" rgroup.long 0xD50++0x07 line.long 0x00 "LINK_DBG_RD_BACK_LO_VALUE,Link Debug RD Back LO Value" line.long 0x04 "LINK_DBG_RD_BACK_HI_VALUE,Link Debug RD Back HI Value" endif width 27. group.long 0xD5C++0x03 line.long 0x00 "PIPE_CTL,Controls (enabling /disabling) the pipelines added to meet timing on various interfaces" bitfld.long 0x00 8. " UFA2WRR_PWTOP ,UFA2WRR PWTOP enable" "Disabled,Enabled" bitfld.long 0x00 7. " UBFI2DFI_P2P ,UBFI2DFI P2P enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TXBA2DFI_WR ,TXBA2DFI WR enable" "Disabled,Enabled" bitfld.long 0x00 5. " CMDQ2UFARB ,CMDQ2UFARB enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " UBFI2DFI_NTT ,UBFI2DFI NTT enable" "Disabled,Enabled" bitfld.long 0x00 3. " PCA ,PCA enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DFIREQ ,DFIREQ enable" "Disabled,Enabled" bitfld.long 0x00 1. " DFIRSP ,DFIRSP enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DFI2UBFI ,DFI2UBFI enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0xD60++0x07 line.long 0x00 "XP_BUST_TRIG1,XP Bust Trigger 1" bitfld.long 0x00 25. " L02RCVRY_L0S_FTS_TO ,Allows bus tracer trigger when getting FTS timeout in L0.0s" "Not allowed,Allowed" bitfld.long 0x00 24. " L02RCVRY_TS_DET ,Allows bus tracer trigger when receiving TS in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 23. " L02RCVRY_SURPRISE_EIDLE ,Allows bus tracer trigger when seeing surprise eidle in L0" "Not allowed,Allowed" bitfld.long 0x00 22. " L02RCVRY_8B10B_ERR ,Allows bus tracer trigger when receiving 8b10b error in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 21. " L02RCVRY_ADVERTISEDRATECHANGE ,Allows bus tracer trigger at advertised rate change in L0" "Not allowed,Allowed" bitfld.long 0x00 20. " L02RCVRY_DL_RETRAIN ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " L02RCVRY_LPBK ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed" bitfld.long 0x00 18. " L02RCVRY_SPEEDCHANGE ,Allows bus tracer trigger at speed change in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 17. " L02RCVRY_WIDTHCHANGE ,Allows bus tracer trigger at width change in L0" "Not allowed,Allowed" bitfld.long 0x00 16. " L02RCVRY_LINK_RETRAIN ,Allows bus tracer trigger at link retraining in L0" "Not allowed,Allowed" textline " " bitfld.long 0x00 13.--15. " CUST_TRANSITION_TO_MINOR_ST ,Mirror TO state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-" textline " " bitfld.long 0x00 10.--12. " CUST_TRANSITION_FROM_MINOR_ST ,Mirror FROM state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-" textline " " bitfld.long 0x00 6.--9. " CUST_TRANSITION_TO_MAJOR_ST ,Major TO state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..." bitfld.long 0x00 2.--5. " CUST_TRANSITION_FROM_MAJOR_ST ,Major FROM state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..." textline " " bitfld.long 0x00 1. " RX_EN ,Bus tracer trigger receive enable" "Disabled,Enabled" bitfld.long 0x00 0. " TX_EN ,Bus tracer trigger receive enable" "Disabled,Enabled" line.long 0x04 "XP_BUST_TRIG2,XP BUST Trigger 2" bitfld.long 0x04 31. " REPLAY_TIMER_EXPIRED_ERR ,REPLA timer expired error" "No error,Error" bitfld.long 0x04 30. " SA_ERR ,SA error" "No error,Error" textline " " bitfld.long 0x04 29. " DESKEW_ERR ,DESKEW error" "No error,Error" bitfld.long 0x04 28. " TRAINING_ERR ,Training error" "No error,Error" textline " " bitfld.long 0x04 27. " DPLLP_CRC_ERR ,DPLLP CRC error" "No error,Error" bitfld.long 0x04 26. " 8B10B_ERR ,8B10B error" "No error,Error" textline " " bitfld.long 0x04 25. " REPLAY_STARTED_ERR ,REPLAY started error" "No error,Error" bitfld.long 0x04 24. " ROLLOVER_ERR ,ROLLOVER error" "No error,Error" textline " " bitfld.long 0x04 23. " PWH_UPDATE_FC_ERR ,PWH update FC error" "No error,Error" bitfld.long 0x04 22. " PWH_TOO_MANY_CREDITS_ERR ,PWH too many credits error" "No error,Error" textline " " bitfld.long 0x04 21. " PWD_UPDATE_FC_ERR ,PWD update FC error" "No error,Error" bitfld.long 0x04 20. " PWD_TOO_MANY_CREDITS_ERR ,PWD too many credits error" "No error,Error" textline " " bitfld.long 0x04 19. " NPH_UPDATE_FC_ERR ,NPH update FC error" "No error,Error" bitfld.long 0x04 18. " NPH_TOO_MANY_CREDITS_ERR ,NPH too many credits error" "No error,Error" textline " " bitfld.long 0x04 17. " NPD_UPDATE_FC_ERR ,NPD update FC error" "No error,Error" bitfld.long 0x04 16. " NPD_TOO_MANY_CREDITS_ERR ,NPD too many credits error" "No error,Error" textline " " bitfld.long 0x04 15. " CH_UPDATE_FC_ERR ,CH update FC error" "No error,Error" bitfld.long 0x04 14. " CH_TOO_MANY_CREDITS_ERR ,CH too many credits error" "No error,Error" textline " " bitfld.long 0x04 13. " CD_UPDATE_FC_ERR ,CD update FC error" "No error,Error" bitfld.long 0x04 12. " CD_TOO_MANY_CREDITS_ERR ,CD too many credits error" "No error,Error" textline " " bitfld.long 0x04 11. " REC_OVFL_ISOPW_DATA_ERR ,REC overflow ISOPW data error" "No error,Error" bitfld.long 0x04 10. " REC_OVFL_ISOPW_HDR_ERR ,REC overflow ISOPW HDR error" "No error,Error" textline " " bitfld.long 0x04 9. " REC_OVFL_ISONP_HDR_ERR ,REC overflow ISONP HDR error" "No error,Error" bitfld.long 0x04 8. " REC_OVFL_CPL_DATA_ERR ,REC overflow CPL data error" "No error,Error" textline " " bitfld.long 0x04 7. " REC_OVFL_PW_DATA_ERR ,REC overflow PW data error" "No error,Error" bitfld.long 0x04 6. " REC_OVFL_NP_DATA_ERR ,REC overflow NP data error" "No error,Error" textline " " bitfld.long 0x04 5. " REC_OVFL_CPL_HDR_ERR ,REC overflow CPL HDR error" "No error,Error" bitfld.long 0x04 4. " REC_OVFL_PW_HDR_ERR ,REC overflow PW HDR error" "No error,Error" textline " " bitfld.long 0x04 3. " REC_OVFL_NP_HDR_ERR ,REC_OVFL_NP_HDR_ERR error" "No error,Error" bitfld.long 0x04 2. " FRAMING_ERR ,Framing error" "No error,Error" textline " " bitfld.long 0x04 1. " SEQ_ERR ,SEQ error" "No error,Error" bitfld.long 0x04 0. " LCRC_ERR ,LCRC error" "No error,Error" rgroup.long 0xD68++0x03 line.long 0x00 "XP_DEBUG,XP Debug" bitfld.long 0x00 0.--1. " RX_CAL_STATUS ,Receiver CAL status" "Idle,Pending,Done,Disabled" endif tree.end tree "Vendor-Defined Registers" width 20. group.long 0xE00++0x2B line.long 0x00 "RX_HDR_LIMIT,RX HDR Limit" hexmask.long.byte 0x00 16.--23. 1. " CPL ,Completion header buffer size" hexmask.long.byte 0x00 8.--15. 1. " PW ,Posted write header buffer size" textline " " hexmask.long.byte 0x00 0.--7. 1. " NP ,Non-posted header buffer size" line.long 0x04 "RX_DATA_LIMIT,RX Data Limit" hexmask.long.byte 0x04 20.--27. 1. " CPL ,Completion data buffer size" hexmask.long.word 0x04 8.--19. 1. " PW ,Posted write data buffer size" textline " " hexmask.long.byte 0x04 0.--7. 1. " NP ,Non-posted write header buffer size" line.long 0x08 "TX_HDR_LIMIT,TX HDR Limit" sif (cpuis("TEGRAX2")) hexmask.long.byte 0x08 24.--31. 1. " NPT ,TX HDR limit NPT" textline " " hexmask.long.byte 0x08 16.--23. 1. " CPL ,Size of the downstream completions header buffer" else hexmask.long.byte 0x08 16.--23. 1. " NP ,Size of the downstream non posted header buffer" endif hexmask.long.byte 0x08 8.--15. 1. " PW ,Size of the downstream posted writes header buffer" textline " " hexmask.long.byte 0x08 0.--7. 1. " NP ,Size of the downstream non posted header buffer" line.long 0x0C "TX_DATA_LIMIT,TX Data Limit" hexmask.long.byte 0x0C 8.--15. 1. " PW ,Size of the downstream Posted Writes Data Buffer" hexmask.long.byte 0x0C 0.--7. 1. " NP ,Size of the downstream Non Posted Data Buffer" line.long 0x10 "UFPCI,Upstream FPCI Control Register" bitfld.long 0x10 23.--27. " ISO_WEIGHT ,ISO weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 22. " ISO_CONTROL_ENABLE ,ISO control enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " ISOPW2HPISO ,Convert posted writes" "Disabled,Enabled" bitfld.long 0x10 20. " ISONP2HPISO ,Convert non-posted reads" "Disabled,Enabled" textline " " hexmask.long.byte 0x10 12.--19. 1. " REQ_PEND_PERIOD ,Timers are reset when they hit the value" bitfld.long 0x10 10.--11. " WRR_GRANT_BURST ,Time for arbitration within a TMS" "0,1,2,3" textline " " bitfld.long 0x10 5.--9. " PW_PRI_OVR_COUNT ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. " PW_STARV_COUNT ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "MISC0,Miscellaneous Register 0" bitfld.long 0x14 31. " SHORT_RXL_TIMER ,Completion timeout feature in RXL test" "Disabled,Enabled" bitfld.long 0x14 30. " P2P_SMALL_ISA_HOLE ,P2P settings control" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " P2P_F ,Transactions (64'hF_XXXX)" "0,1" bitfld.long 0x14 28. " P2P_E ,Transactions (64'hE_XXXX)" "0,1" textline " " bitfld.long 0x14 27. " P2P_D ,Transactions (64'hD_XXXX)" "0,1" bitfld.long 0x14 26. " P2P_C ,Transactions (64'hC_XXXX)" "0,1" textline " " bitfld.long 0x14 25. " P2P_B ,Transactions (64'hB_XXXX)" "0,1" bitfld.long 0x14 24. " P2P_A ,Transactions (64'hA_XXXX)" "0,1" textline " " bitfld.long 0x14 23. " NISONC2HPISO ,Upgrade to HPISO Read" "Disabled,Enabled" bitfld.long 0x14 21. " AUTO_XCLK_FREQ_EN ,XCLK frequency dynamic switch" "Disabled,Enabled" textline " " bitfld.long 0x14 20. " RXL_CLEAR_DROP ,Receiver DROP ALL status clear" "Disabled,Enabled" sif (cpuis("TEGRAX2")) hexmask.long.word 0x14 4.--19. 1. " ISO_PW_ENABLE[1] ,Enables ISO PW [1] transactions for packets with TC >= TC2ISOMAP" endif textline " " bitfld.long 0x14 3. " ISO_PW_ENABLE ,Enables ISO PW transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " ISO_NP_ENABLE ,Enables ISO NP transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled" bitfld.long 0x14 1. " NATIVE_P2P_ENABLE ,Enables native peer2peer transactions" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " ENABLE_CLUMPING ,Enables unitid clumping" "Disabled,Enabled" line.long 0x18 "TXBA0,TXBA0 Register" hexmask.long.word 0x18 16.--31. 1. " REPLAY_TIMER_EXPIRY ,Replay timer expiry" bitfld.long 0x18 12. " USE_REPLAY_TIMER_OFFSET ,Use replay timer offset" "Disabled,Enabled" textline " " bitfld.long 0x18 11. " CMPL_MERGE_UPTO_64DW ,Merge completions upto 64DW payloads" "Disabled,Enabled" bitfld.long 0x18 10. " CMPL_MERGE_UPTO_32DW ,Merge completions upto 32DW payloads" "Disabled,Enabled" textline " " bitfld.long 0x18 9. " CMPL_MERGE_DISABLE ,Disables completion merging" "No,Yes" hexmask.long.word 0x18 0.--8. 1. " REPLAY_BUF_LIMIT ,Replay buffer limit" line.long 0x1C "TXBA1,TXBA1 Register" sif (cpuis("TEGRAX2")) hexmask.long.word 0x1C 8.--16. 1. " MERGE_THRESHOLD ,Merge threshold" else hexmask.long.byte 0x1C 8.--15. 1. " MERGE_THRESHOLD ,Merge threshold" textfld " " endif bitfld.long 0x1C 4.--7. " CM_OVER_PW_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rbitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x20 "FORCEFC,FC Priority Flip Threshold Register" hexmask.long.byte 0x20 24.--31. 1. " NPD_UNRET_THRESH ,NPD UNRET THRESH" hexmask.long.byte 0x20 16.--23. 1. " NPH_UNRET_THRESH ,NPH UNRET THRESH" textline " " hexmask.long.byte 0x20 8.--15. 1. " PWD_UNRET_THRESH ,PWD UNRET THRESH" hexmask.long.byte 0x20 0.--7. 1. " PWH_UNRET_THRESH ,PWH UNRET THRESH" line.long 0x24 "TIMEOUT0,LINK LTSSM Timeout 0 Register" hexmask.long.byte 0x24 24.--31. 1. " PAD_SPDCHNG_GEN2 ,Time to wait for pads to change speed from Gen1 to Gen2" hexmask.long.word 0x24 8.--23. 1. " PAD_PWRUP_CM ,Time to power up pads (no common-mode voltage during power down)" textline " " hexmask.long.byte 0x24 0.--7. 1. " PAD_PWRUP ,Time to power up pads (common-mode voltage during power down)" line.long 0x28 "TIMEOUT1,LINK LTSSM Timeout 1. Register" hexmask.long.byte 0x28 24.--31. 1. " RCVRY_SPD_UNSUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change" hexmask.long.byte 0x28 16.--23. 1. " RCVRY_SPD_SUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change" textline " " hexmask.long.word 0x28 0.--15. 1. " PAD_SPDCHNG_GEN1 ,Wait time for pads to change speed from Gen2 to Gen1" rgroup.long 0xE34++0x03 line.long 0x00 "PRBS,PRBS Results Register" hexmask.long.word 0x00 16.--31. 1. " LOCKED ,Locks lanes onto the incoming PRBS pattern" hexmask.long.word 0x00 0.--15. 1. " ERR_COUNT_OVERFLOW ,Number of bit mismatches during PRBS run" group.long 0xE38++0x03 line.long 0x00 "PRBS_ERR,PRBS Results Register" hexmask.long.word 0x00 16.--31. 1. " COUNT ,Number of bit errors detected in the incoming PRBS stream" bitfld.long 0x00 0.--3. " SELECT ,Selects which lane number's Error Count shows up in the ERR_COUNT register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " width 22. group.long 0xE3C++0x27 line.long 0x00 "EIDLE_INFER_TO_0,EIDLE Inference Timeout Register 0" hexmask.long.word 0x00 16.--31. 1. " RCVRCFG_SUC_SPEED ,Infer E-Idle after this amount of time while in recovery" hexmask.long.word 0x00 0.--15. 1. " L0_LPBK ,Infer E-Idle after this amount of time while in L0 or loopback" line.long 0x04 "EIDLE_INFER_TO_1,EIDLE Inference Timeout Register 1" hexmask.long.word 0x04 16.--31. 1. " UNSUC_SPEED_GEN2 ,Infer E-Idle after this amount of time while in recovery" hexmask.long.word 0x04 0.--15. 1. " UNSUC_SPEED_GEN1 ,Infer E-Idle after this amount of time while in recovery" line.long 0x08 "LTSSM_DBGREG,LTSSM Debug Register" eventfld.long 0x08 31. " LINKFSM[31] ,LINKFSM31" "Init,Clear" eventfld.long 0x08 30. " [30] ,LINKFSM30" "Init,Clear" textline " " eventfld.long 0x08 29. " [29] ,LINKFSM29" "Init,Clear" eventfld.long 0x08 28. " [28] ,LINKFSM28" "Init,Clear" textline " " eventfld.long 0x08 27. " [27] ,LINKFSM27" "Init,Clear" eventfld.long 0x08 26. " [26] ,LINKFSM26" "Init,Clear" textline " " eventfld.long 0x08 25. " [25] ,LINKFSM25" "Init,Clear" eventfld.long 0x08 24. " [24] ,LINKFSM24" "Init,Clear" textline " " eventfld.long 0x08 23. " [23] ,LINKFSM23" "Init,Clear" eventfld.long 0x08 22. " [22] ,LINKFSM22" "Init,Clear" textline " " eventfld.long 0x08 21. " [21] ,LINKFSM21" "Init,Clear" eventfld.long 0x08 20. " [20] ,LINKFSM20" "Init,Clear" textline " " eventfld.long 0x08 19. " [19] ,LINKFSM19" "Init,Clear" eventfld.long 0x08 18. " [18] ,LINKFSM18" "Init,Clear" textline " " eventfld.long 0x08 17. " [17] ,LINKFSM17" "Init,Clear" eventfld.long 0x08 16. " [16] ,LINKFSM16" "Init,Clear" textline " " eventfld.long 0x08 15. " [15] ,LINKFSM15" "Init,Clear" eventfld.long 0x08 14. " [14] ,LINKFSM14" "Init,Clear" textline " " eventfld.long 0x08 13. " [13] ,LINKFSM13" "Init,Clear" eventfld.long 0x08 12. " [12] ,LINKFSM12" "Init,Clear" textline " " eventfld.long 0x08 11. " [11] ,LINKFSM11" "Init,Clear" eventfld.long 0x08 10. " [10] ,LINKFSM10" "Init,Clear" textline " " eventfld.long 0x08 9. " [9] ,LINKFSM9" "Init,Clear" eventfld.long 0x08 8. " [8] ,LINKFSM8" "Init,Clear" textline " " eventfld.long 0x08 7. " [7] ,LINKFSM7" "Init,Clear" eventfld.long 0x08 6. " [6] ,LINKFSM6" "Init,Clear" textline " " eventfld.long 0x08 5. " [5] ,LINKFSM5" "Init,Clear" eventfld.long 0x08 4. " [4] ,LINKFSM4" "Init,Clear" textline " " eventfld.long 0x08 3. " [3] ,LINKFSM3" "Init,Clear" eventfld.long 0x08 2. " [2] ,LINKFSM2" "Init,Clear" textline " " eventfld.long 0x08 1. " [1] ,LINKFSM1" "Init,Clear" eventfld.long 0x08 0. " [0] ,LINKFSM0" "Init,Clear" line.long 0x0C "PRIV_ERRSTS,Detailed Private Error Status Register" eventfld.long 0x0C 31. " REPLAY_TIMER_EXPIRED_ERR ,Replay timer expired error" "No error,Error" eventfld.long 0x0C 30. " SA_ERR ,SA error" "No error,Error" textline " " eventfld.long 0x0C 29. " DESKEW_ERR ,DESKEW error" "No error,Error" eventfld.long 0x0C 28. " TRAINING_ERR ,Training error" "No error,Error" textline " " eventfld.long 0x0C 27. " DLLP_CRC_ERR ,DLLP CRC error" "No error,Error" eventfld.long 0x0C 26. " 8B10B_ERR ,8B10B error" "No error,Error" textline " " eventfld.long 0x0C 25. " REPLAY_STARTED_ERR ,Replay started error" "No error,Error" eventfld.long 0x0C 24. " REPLAY_ROLLOVER_ERR ,Replay rollover error" "No error,Error" textline " " eventfld.long 0x0C 23. " PWH_UPDATE_FC_ERR ,PWH update FC error" "No error,Error" eventfld.long 0x0C 22. " PWH_TOO_MANY_CREDITS_ERR ,PWH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 21. " PWD_UPDATE_FC_ERR ,PWD update FC error" "No error,Error" eventfld.long 0x0C 20. " PWD_TOO_MANY_CREDITS_ERR ,PWD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 19. " NPH_UPDATE_FC_ERR ,NPH update FC error" "No error,Error" eventfld.long 0x0C 18. " NPH_TOO_MANY_CREDITS_ERR ,NPH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 17. " NPD_UPDATE_FC_ERR ,NPD update FC error" "No error,Error" eventfld.long 0x0C 16. " NPD_TOO_MANY_CREDITS_ERR ,NPD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 15. " CH_UPDATE_FC_ERR ,CH update FC error" "No error,Error" eventfld.long 0x0C 14. " CH_TOO_MANY_CREDITS_ERR ,CH too many credits error" "No error,Error" textline " " eventfld.long 0x0C 13. " CD_UPDATE_FC_ERR ,CD update FC error" "No error,Error" eventfld.long 0x0C 12. " CD_TOO_MANY_CREDITS_ERR ,CD too many credits error" "No error,Error" textline " " eventfld.long 0x0C 11. " REC_OVFL_ISOPW_DATA_ERR ,REC overflow ISOPW data error" "No error,Error" eventfld.long 0x0C 10. " REC_OVFL_ISOPW_HDR_ERR ,REC overflow ISOPW HDR error" "No error,Error" textline " " eventfld.long 0x0C 9. " REC_OVFL_ISONP_HDR_ERR ,REC overflow ISONP HDR error" "No error,Error" eventfld.long 0x0C 8. " REC_OVFL_CPL_DATA_ERR ,REC overflow CPL data error" "No error,Error" textline " " eventfld.long 0x0C 7. " REC_OVFL_PW_DATA_ERR ,REC overflow PW data error" "No error,Error" eventfld.long 0x0C 6. " REC_OVFL_NP_DATA_ERR ,REC overflow NP data error" "No error,Error" textline " " eventfld.long 0x0C 5. " REC_OVFL_CPL_HDR_ERR ,REC overflow CPL HDR error" "No error,Error" eventfld.long 0x0C 4. " REC_OVFL_PW_HDR_ERR ,REC overflow PW HDR error" "No error,Error" textline " " eventfld.long 0x0C 3. " REC_OVFL_NP_HDR_ERR ,REC overflow NP HDR error" "No error,Error" eventfld.long 0x0C 2. " FRAMING_ERR ,Framing error" "No error,Error" textline " " eventfld.long 0x0C 1. " SEQ_ERR ,SEQ error" "No error,Error" eventfld.long 0x0C 0. " LCRC_ERR ,LCRC error" "No error,Error" line.long 0x10 "PRIV_ERRMSK,Detailed Private Error Mask Register" bitfld.long 0x10 31. " REPLAY_TIMER_EXPIRED_ERR_EN ,Replay timer expired error enable" "Disabled,Enabled" bitfld.long 0x10 30. " SA_ERR_EN ,SA error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " DLLP_CRC_ERR_EN ,DLLP CRC error enable" "Disabled,Enabled" bitfld.long 0x10 26. " 8B10B_ERR_EN ,8B10B error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 24. " REPLAY_ROLLOVER_ERR_EN ,Replay rollover error enable" "Disabled,Enabled" bitfld.long 0x10 23. " PWH_UPDATE_FC_ERR_EN ,PWH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " PWD_TOO_MANY_CREDITS_ERR_EN ,PWD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 21. " PWD_UPDATE_FC_ERR_EN ,PWD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 20. " PWD_TOO_MANY_CREDITS_ERR_EN ,PWD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 19. " NPH_UPDATE_FC_ERR_EN ,NPH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 18. " NPH_TOO_MANY_CREDITS_ERR_EN ,NPH too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 17. " NPD_UPDATE_FC_ERR_EN ,NPD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " NPD_TOO_MANY_CREDITS_ERR_EN ,NPD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 15. " CH_UPDATE_FC_ERR_EN ,CH update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 14. " CH_TOO_MANY_CREDITS_ERR_EN ,CH too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 13. " CD_UPDATE_FC_ERR_EN ,CD update FC error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 12. " CD_TOO_MANY_CREDITS_ERR_EN ,CD too many credits error enable" "Disabled,Enabled" bitfld.long 0x10 11. " DLL_PROTOCOL_ERR_EN ,DLL protocol error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " FRAMING_ERR_EN ,Framing error enable" "Disabled,Enabled" bitfld.long 0x10 1. " SEQ_ERR_EN ,SEQ error enable" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " LCRC_ERR_EN ,LCRC error enable" "Disabled,Enabled" line.long 0x14 "LTSSM_TRACE_CONTROL,LTSSM Trace Control Register" bitfld.long 0x14 11.--13. " TRIG_PRX_LTSSM_MINOR ,Trigger PRX LTSSM minor" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. " TRIG_PTX_LTSSM_MINOR ,Trigger PTX LTSSM minor" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 4.--7. " TRIG_LTSSM_MAJOR ,Trigger LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 3. " TRIG_ON_EVENT ,Trigger on event" "Not triggered,Triggered" textline " " bitfld.long 0x14 2. " CLEAR_RAM ,Clear RAM" "Not cleared,Cleared" bitfld.long 0x14 1. " WRAP_EN ,Wrap enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " STORE_EN ,Store enable" "Disabled,Enabled" line.long 0x18 "LTSSM_TRACE_STATUS,LTSSM Trace Status Register" rbitfld.long 0x18 19.--21. " PRX_LTSSM_MINOR ,PRX LTSSM minor" "0,1,2,3,4,5,6,7" rbitfld.long 0x18 16.--18. " PTX_LTSSM_MINOR ,PTX LTSSM minor" "0,1,2,3,4,5,6,7" textline " " rbitfld.long 0x18 12.--15. " LTSSM_MAJOR ,LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x18 11. " READ_DATA_VALID ,Read data valid" "Invalid,Valid" textline " " bitfld.long 0x18 6.--10. " READ_ADDR ,Read address to LTSSM trace RAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 1.--5. " WRITE_PTR ,Current location of write pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rbitfld.long 0x18 0. " RAM_FULL ,All entries in RAM has been written" "Not full,Full" line.long 0x1C "PG,PCIe Power Gate Register" bitfld.long 0x1C 2. " RCVD_PME_TO_ACK_INTR_EN ,Generation of interrupt on reception of PME TO ACK TLP" "Disabled,Enabled" eventfld.long 0x1C 1. " RCVD_PME_TO_ACK ,Root port received a PME TO ACK TLP" "Init,Clear" textline " " bitfld.long 0x1C 0. " SEND_PME_TO_MSG ,Send a PME TO message downstream" "Idle,Send now" line.long 0x20 "VAR_RANGE0,PCIe Legacy I/O Decode Range Control Register 0" hexmask.long.word 0x20 18.--31. 0x04 " LIMIT ,Top address for the variable range positive decode addresses" hexmask.long.word 0x20 2.--15. 0x04 " BASE ,Base address for the variable range positive decode addresses" textline " " bitfld.long 0x20 0. " ENABLE ,Enable" "Disabled,Enabled" line.long 0x24 "VAR_RANGE1,PCIe Legacy I/O Decode Range Control Register 1" hexmask.long.word 0x24 18.--31. 0x04 " LIMIT ,Top address for the variable range positive decode addresses" textline " " hexmask.long.word 0x24 2.--15. 0x04 " BASE ,Base address for the variable range positive decode addresses" bitfld.long 0x24 0. " ENABLE ,Enable" "Disabled,Enabled" sif (cpuis("TEGRAX1")) group.long 0xE80++0x1F line.long 0x00 "T_PCIE2_RP_ECTL_1_R1,T_PCIE2_RP_ECTL_1_R1" bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C ,T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--19. " T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C" "DEFAULT,1,2,3" textline " " bitfld.long 0x00 16.--17. " T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C" "DEFAULT,1,2,3" bitfld.long 0x00 12.--15. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "T_PCIE2_RP_ECTL_2_R1,T_PCIE2_RP_ECTL_1_R2" bitfld.long 0x04 18.--19. " T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C ,T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C" "DEFAULT,1,2,3" hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C ,T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C" line.long 0x08 "T_PCIE2_RP_ECTL_3_R1,T_PCIE2_RP_ECTL_3_R1" line.long 0x0C "T_PCIE2_RP_ECTL_4_R1,T_PCIE2_RP_ECTL_4_R1" hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C ,T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C" hexmask.long.byte 0x0C 0.--7. 1. " T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C ,T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C" line.long 0x10 "T_PCIE2_RP_ECTL_5_R1,T_PCIE2_RP_ECTL_5_R1" line.long 0x14 "T_PCIE2_RP_ECTL_6_R1,T_PCIE2_RP_ECTL_6_R1" line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1" bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xEA0++0x1B line.long 0x00 "T_PCIE2_RP_ECTL_1_R2,T_PCIE2_RP_ECTL_1_R2" bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C ,T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "T_PCIE2_RP_ECTL_2_R2,T_PCIE2_RP_ECTL_2_R2" hexmask.long.word 0x04 16.--31. 1. " T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C ,T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C" hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C ,T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C" line.long 0x08 "T_PCIE2_RP_ECTL_3_R2,T_PCIE2_RP_ECTL_3_R2" line.long 0x0C "T_PCIE2_RP_ECTL_4_R2,T_PCIE2_RP_ECTL_4_R2" hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C ,T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C" hexmask.long.byte 0x0C 0.--7. 1. " T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C ,T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C" line.long 0x10 "T_PCIE2_RP_ECTL_5_R2,T_PCIE2_RP_ECTL_5_R2" line.long 0x14 "T_PCIE2_RP_ECTL_6_R2,T_PCIE2_RP_ECTL_6_R2" line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1" bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C" "Default,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x18 0.--5. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Default,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0xF00++0x0B line.long 0x00 "VEND_XP,Vendor XP Register (NVIDIA's Implementation)" bitfld.long 0x00 31. " FORCE_COMPLIANCE ,Force compliance" "Disabled,Enabled" rbitfld.long 0x00 30. " DL_UP ,Status of data link layer in XP" "Down,Up" textline " " bitfld.long 0x00 29. " INTERLEAVE_DLLPS ,Interleave DLLPS" "Disabled,Enabled" bitfld.long 0x00 28. " OPPORTUNISTIC_UPDATEFC ,DL will send any pending UpdateFC packet" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " OPPORTUNISTIC_ACK ,DL will send pending Acks" "Disabled,Enabled" bitfld.long 0x00 26. " TRAIN_ERR_ENABLE ,Enables reporting of training errors" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 18.--25. 1. " UPDATE_FC_THRESHOLD ,Override for the UpdateFC frequency" hexmask.long.word 0x00 2.--17. 1. " PRBS_STAT ,Results of loopback mode testing" textline " " bitfld.long 0x00 1. " PRBS_EN ,Enables the root port as loopback master" "Disabled,Enabled" sif (!cpuis("TEGRAX1")&&!cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " EMULATION ,Enables emulation mode operation" "Disabled,Enabled" endif line.long 0x04 "VEND_XP1,Vendor XP Register 1 (NVIDIA's Implementation)" bitfld.long 0x04 29.--31. " L1_EXIT_LATENCY ,L1 exit latency for the given PCI express link" "< 1us,1us - 2us,2us - 4us,4us - 8us,8us - 16us,16us -32us,32us-64us,> 64us" bitfld.long 0x04 28. " FORCE_DOWNSTREAM_NO_SNOOP ,Force downstream no snoop" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " FORCE_UPSTREAM_NONCOH ,Force upstream non-coherent" "Disabled,Enabled" bitfld.long 0x04 26. " NP_REQ_TIMEOUT ,Disable downstream NP request timeout" "No,Yes" textline " " bitfld.long 0x04 23. " IGNORE_L0S ,Ignore L0S" "No,Yes" bitfld.long 0x04 22. " DONT_MERGE_PMASNAK ,Don't merge PMASNAK" "Merged,Not merged" textline " " bitfld.long 0x04 21. " L1_ASPM_SUPPORT ,Link capability register L1 ASPM support" "Not supported,Supported" bitfld.long 0x04 20. " L23_READY_NO_D3 ,L23 ready no D3" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " ACK_L1_NO_WAIT ,ACK L1 no wait" "Disabled,Enabled" hexmask.long.word 0x04 10.--18. 1. " ACK_TIMER_LIMIT ,Overrides the Ack timer limit for this root port" textline " " bitfld.long 0x04 8. " RNCTRL_GEN2_WAIT_FOR_FIRST_EIES ,RNCTRL GEN2 wait for first EIES" "Disabled,Enabled" rbitfld.long 0x04 7. " RNCTRL_EN ,Dynamic link width re-negotiation procedure in XP" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " GEN2_LINK_UPGRADE ,Selects the 2.0-compliant link width upgrade protocol" "Disabled,Enabled" bitfld.long 0x04 0.--5. " RNCTRL_MAXWIDTH ,Maximum link width required at the end of dynamic link width renegotiation process" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "VEND_XP2,Vendor XP Register 2 (NVIDIA's Implementation)" hexmask.long.byte 0x08 24.--31. 1. " L0S_UPDATE_WAKE ,L0S update wake" hexmask.long.word 0x08 8.--17. 1. " L0S_THRESHOLD ,Controls the idle time required for TxL0s entry from L0" textline " " hexmask.long.byte 0x08 0.--7. 1. " L0S_ACK_WAKE ,L0S ACK wake" sif (cpuis("TEGRAX1")) group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices" hexmask.long.word 0x00 20.--31. 1. " N100MS_DFPCI ,N100MS_DFPCI" hexmask.long.word 0x00 0.--9. 1. " MICROSECOND ,MICROSECOND" elif (cpuis("TEGRAX2")) group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Vendor XV Timeout Register (NVIDIA's Implementation)" hexmask.long.word 0x00 20.--31. 1. " 100MS_DFPCI ,Number of Dfpci_clk clocks in a given 100ms interval" hexmask.long.word 0x00 0.--9. 1. " MICROSECOND ,Various timers required by PCI-express specification" group.long 0xF14++0x07 line.long 0x00 "VEND_XV_CMN,Vendor XV CMN Register (NVIDIA's Implementation)" bitfld.long 0x00 29.--31. " ISO2TC_MAP ,TC to be used for FPCI ISO transactions" "0,1,2,3,4,5,6,7" line.long 0x04 "VEND_THERM_MGMT,Vendor THERM MGMT" hexmask.long.word 0x04 4.--15. 1. " PERIOD ,Defines period (in microseconds) for the purpose of throttling" bitfld.long 0x04 1.--3. " DUTY_CYCLE ,Defines fraction of PERIOD throttling is applied" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 0. " ENABLE ,Enables throttling of PCIe traffic" "Disabled,Enabled" else group.long 0xF0C++0x03 line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices" hexmask.long.tbyte 0x00 0.--23. 1. " VEND_XV_TIMEOUT ,VEND_XV_TIMEOUT" endif group.long 0xF20++0x03 line.long 0x00 "VEND_SLOT_STRAP,Vendor Slot Capabilities Register" sif (cpuis("TEGRAX2")) hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER ,Physical slot number" bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT ,No CMD completed support" "Not supported,Supported" textline " " bitfld.long 0x00 17. " ELECTROMECH_INTERLOCK_PRESENT ,Electromechanical interlock present" "Not present,Present" bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Slot power limit scale" "0,1,2,3" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Slot power limit value" bitfld.long 0x00 6. " HOT_PLUG_CAPABLE ,Supporting hot-plug operations" "Not capable,Capable" textline " " bitfld.long 0x00 5. " HOT_PLUG_SURPRISE ,Hot-plug surprise" "Disabled,Enabled" bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT ,Power indicator" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT ,Attention Indicator" "Not implemented,Implemented" bitfld.long 0x00 2. " MRL_SENSOR_PRESENT ,MRL Sensor" "Not implemented,Implemented" textline " " bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT ,Power Controller" "Not implemented,Implemented" bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT ,Attention Button" "Not implemented,Implemented" else hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER ,Physical slot number" bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE ,Slot power limit scale" "0,1,2,3" textline " " hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE ,Slot power limit value" endif sif (cpuis("TEGRAX1")) group.long 0xF30++0x03 line.long 0x00 "RP_XP_REF,This register contains diagnostic bits used in XP" hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE ,User-specified value to use for completion timeout" bitfld.long 0x00 13. " CPL_TO_OVERRIDE ,Enables the user override mode for completion timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ADVANCE_BY_2_CYA ,ADVANCE_BY_2_CYA" "Disabled,Enabled" bitfld.long 0x00 11. " NAK_SCHEDULE_CYA ,NAK_SCHEDULE_CYA" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA ,RXL2LINK_NPT_EMPTY_CYA" "Disabled,Enabled" bitfld.long 0x00 9. " L2_READ_FIX_EN ,L2_READ_FIX_EN" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MICROSECOND_ENABLE ,MICROSECOND_ENABLE" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " MICROSECOND_LIMIT ,MICROSECOND_LIMIT" elif (cpuis("TEGRAX2")) group.long 0xF30++0x03 line.long 0x00 "RP_XP_REF,RP XP Reference Register" hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE ,User-specified value to use for completion timeout" bitfld.long 0x00 13. " CPL_TO_OVERRIDE ,Enables the user override mode for completion timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ADVANCE_BY_2_CYA ,Advanced by 2 CYA" "Disabled,Enabled" bitfld.long 0x00 11. " NAK_SCHEDULE_CYA ,NAK schedule CYA" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA ,RXL2LINK NPT empty CYA" "Disabled,Enabled" bitfld.long 0x00 9. " L2_READ_FIX_EN ,L2 read fix enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MICROSECOND_ENABLE ,Microsecond enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " MICROSECOND_LIMIT ,Counter value to be used to reset the one microsecond counter used for update FC scheduling" group.long 0xF44++0x03 line.long 0x00 "VEND_CYA0,Vendor CYA0 Register" bitfld.long 0x00 30. " FORCE_RETRY_POSSIBLE ,Force retry possible" "No,Yes" bitfld.long 0x00 29. " UP_NC2C ,Forces all upstream non-coherent traffic to coherent" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " DROP_VDM_TYPE1 ,VDM messages with vendor ID other than NVIDIA drop enable" "Disabled,Enabled" bitfld.long 0x00 27. " DROP_NV_VDM_TYPE1 ,VDM messages with vendor ID NVIDIA(0x10DE) drop enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " REL_CRDT_4PKT_DRP_RXL ,Credits for the VDM packet dropped release enable" "Disabled,Enabled" bitfld.long 0x00 25. " LTR_EN ,Hide LTR capability enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ALLOW_ALL_DS_RO ,Allow all DS RO" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " NATIVE_P2P_STARVE_COUNT ,Native P2P starve count" textline " " bitfld.long 0x00 12.--15. " DSK_RESET_PULSE_WIDTH ,Number of symbol times Deskewer should hold RX fifos in hot_reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " FINISH_PKT_ON_RCVRY_EN ,Finish packet on recovery enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " UR_PW_DROP_ALL_MODE ,UR PW drop all mode" "No,Yes" bitfld.long 0x00 9. " DROP_ALL_MODE ,Drop all mode" "No,Yes" textline " " bitfld.long 0x00 6.--8. " MAX_PAYLOAD_SIZE ,Max payload size" "INIT,,,,,4KB,,Auto" bitfld.long 0x00 5. " ADR64 ,64-bit addressing mode" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IGNORE_BME ,Ignores BMS and accepts upstream PCIe transactions" "Not ignored,Ignored" bitfld.long 0x00 3. " UFPCI_BLOCK_B2B_NP ,UFPCI block back-to-back NP" "No,Yes" textline " " bitfld.long 0x00 2. " GPU_NISONC2HPISO ,GPU NISONC2HPISO" "Disabled,Enabled" bitfld.long 0x00 1. " PASSPW_RO ,PASSPW RO" "No,Yes" textline " " bitfld.long 0x00 0. " REL_CREDIT_UR_PW ,Credits for the ur_pw received release" "No,Yes" else group.long 0xF34++0x0F line.long 0x00 "ECTL_2_R1,ECTL_2_R1" hexmask.long.word 0x00 16.--31. 1. " RX_DFE_1C ,RX_DFE_1C" hexmask.long.byte 0x00 8.--15. 1. " RX_EQ_1C ,RX_EQ_1C" textline " " hexmask.long.byte 0x00 0.--7. 1. " CDR_CNTL_1C ,CDR_CNTL_1C" line.long 0x04 "ECTL_3_R1,ECTL_3_R1" bitfld.long 0x04 8.--11. " TX_PEAK_PRE_1C ,TX_PEAK_PRE_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--4. " TX_PEAK_1C ,TX_PEAK_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "ECTL_2_R2,ECTL_2_R2" hexmask.long.word 0x08 16.--31. 1. " RX_DFE_1C ,RX_DFE_1C" hexmask.long.word 0x08 0.--15. 1. " RX_EQ_1C ,RX_EQ_1C" line.long 0x0C "ECTL_3_R2,ECTL_3_R2" bitfld.long 0x0C 24.--27. " PRE_SEL1_1C ,PRE_SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--20. " SEL1_1C ,SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 8.--11. " PRE_SEL0_1C ,PRE_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--4. " SEL0_1C ,SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.long 0xF48++0x07 line.long 0x00 "VEND_CTL1,Vendor Control Register 1 (NVIDIA's Implementation)" bitfld.long 0x00 21. " POLLING_RESET_FIX_EN ,Polling reset fix enable" "Disabled,Enabled" bitfld.long 0x00 20. " HOTPLUG_IN_TRAFFIC_EN ,Hotplug in traffic enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " NISO2ISO ,All upstream non-ISO-PW and non-ISO-NP will be upgraded to ISO" "Disabled,Enabled" bitfld.long 0x00 18. " ALLOW_UPSTREAM_CMPL_OVERTAKE_PW ,UBFI allows CPL bypass PW regardless of RO bit" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " SPLIT_ARB_BLOCK_COH ,Split ARB block coherent" "Disabled,Enabled" bitfld.long 0x00 16. " HIDE_MSIMAP ,Hide MSIMAP" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " LINKACTV_REPORTING ,Setting the data link layer link active reporting capable bit" "Disabled,Enabled" bitfld.long 0x00 14. " P2P_ISO2NIS ,Forces upstream peer-to-peer ISO requests to be peer-to-peer NONISO" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ERPT ,ERPT" "Disabled,Enabled" bitfld.long 0x00 12. " HIDE_MSI_CAP ,Hides the entire MSI capability structure from the capabilities list" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ACCEPT_MSGD1 ,Allows acceptance of NVIDIA specific vendor type message with data" "Disabled,Enabled" bitfld.long 0x00 1.--3. " TC2ISO_MAP ,TC2ISO MAP" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0. " P2P_BLOCK_P2P_ONLY ,P2P block P2P only" "Disabled,Enabled" line.long 0x04 "VEND_XP_BIST,IOBIST And Characterization Control Register (NVIDIA's Implementation)" bitfld.long 0x04 30. " GOTO_DETECT_ON_SURPRISE_EIDLE ,Goto detect on surprise EIDLE" "Disabled,Enabled" bitfld.long 0x04 29. " ENABLE_SERR_REPORTING ,Enable SERR reporting" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " GOTO_L1_L2_AFTER_DLLP_DONE ,Goto L1 L2 after DLLP done" "Disabled,Enabled" bitfld.long 0x04 27. " CTRL_IGNORE_LPBK_EXIT ,Control ignore LPBK exit" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " CTRL_RELAX_LPBK_ENTRY ,Control relax LPBK entry" "Disabled,Enabled" bitfld.long 0x04 25. " CTRL_FORCE_PRBS_RST ,Control force PRBS reset" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " FORCE_DEEMPHASIS_ADVERTISED_EN ,Force Deemphasis advertised enable" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 23. " POWER_UP_BYPASS ,Power up bypass" "No bypass,Bypass" endif textline " " bitfld.long 0x04 22. " FORCE_RECEIVER_COMPLIANCE_EN ,Force reciver compliance enable" "Disabled,Enabled" bitfld.long 0x04 21. " FORCE_COMPLIANCE_GEN2_SPEED_EN ,Force compliance GEN2 speed enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " FORCE_COMPLIANCE_AND_ADVERTISE_MODE ,Force compliance and advertise mode" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 19. " PRESERVE_TX_PACKET_DURING_SPEED_CHANGE ,Preserve TX packet during speed change" "Not preserved,Preserved" bitfld.long 0x04 18. " GEN2_EXIT_USE_STAT_IDLE ,GEN2 exit use status idle" "Not idle,Idle" textline " " bitfld.long 0x04 17. " GEN2_LOOPBACK ,GEN2 loopback" "0,1" bitfld.long 0x04 16. " SA_EXTRA_RESET_EN_RANGE ,SA extra reset enable range" "Disabled,Enabled" textline " " hexmask.long.word 0x04 6.--15. 1. " CTRL_TX_PTRN_RANGE ,Control TX PTRN range" bitfld.long 0x04 4.--5. " TEST_MODE_RANGE ,Test mode range" "0,1,2,3" textline " " bitfld.long 0x04 3. " NOSCRAMBLE_RANGE ,No scramble range" "0,1" bitfld.long 0x04 2. " EIDLE_DATA_RANGE ,EIDLE data range" "0,1" textline " " bitfld.long 0x04 1. " EIDLE_OVERRIDE_RANGE ,EIDLE override range" "0,1" bitfld.long 0x04 0. " RDET_BYPASS_RANGE ,RDET bypass range" "0,1" endif textline " " sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) width 22. group.long 0xF50++0x03 line.long 0x00 "VEND_XP_PAD_PWRDN,Vendor XP PAD Powerdown (NVIDIA's Implementation)" bitfld.long 0x00 31. " IDLE_MODE_L1_CLKREQ ,Idle mode L1 clock request" "0,1" bitfld.long 0x00 30. " IDLE_MODE_DYNAMIC ,Idle mode dynamic" "0,1" textline " " bitfld.long 0x00 29. " IDLE_MODE_L1 ,Idle mode L1" "0,1" bitfld.long 0x00 28. " XVR_USE_DFPCI_DATA_UNINTR ,XVR use DFPCI data UNINTR" "Disabled,Enabled" textline " " hexmask.long.word 0x00 18.--27. 1. " MICROSECOND ,Various timers required by PCI-express specification" bitfld.long 0x00 16.--17. " SLEEP_MODE_L1_CLKREQ ,Defines the 2-bit sleep-mode coding when clkreq is deasserted in L1" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 15. " L1_CLKREQ ,Power down to SLEEP_MODE_L1_REQ enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--14. 1. " MINIMUM ,Minimum number of Gen1 xclks(4ns) that analog pads must remain powered down (or up) before the LTSSM attempts to power them back up/down again" textline " " bitfld.long 0x00 5.--6. " SLEEP_MODE_DYNAMIC ,2-bit sleep-mode coding in the pad when the lane shut down due to dynamic link downsizing" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 3.--4. " SLEEP_MODE_L1 ,2-bit sleep-mode coding in the pad when LTSSM is in the L1 state or DISABLED state" "L0,L1,L1P,L1PP" textline " " bitfld.long 0x00 2. " DISABLED ,Enable analog pads to power down in the DISABLED_DOWN state" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DYNAMIC ,Enable unused analog pads to power down after dynamic link width re-negotiation takes place" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " L1 ,Enable analog pads to power down when in L1 state" "Disabled,Enabled" endif textline " " width 22. group.long 0xF54++0x07 line.long 0x00 "VEND_XP_FTS,Vendor XP FTS (NVIDIA's Implementation)" hexmask.long.byte 0x00 24.--31. 1. " TS_DETECT_START ,TS detect start" hexmask.long.byte 0x00 16.--23. 1. " FTS_DETECT_START ,Number of symbol times we wait before the root port begins looking at FTS ordered sets when exiting L0s" textline " " hexmask.long.byte 0x00 8.--15. 1. " N_FTS_REMOTE ,N_FTS value advertised by the remote device" hexmask.long.byte 0x00 0.--7. 1. " N_FTS ,N_FTS value that we advertise to the device on the other side of the link" line.long 0x04 "VEND_XP_STATS0,Vendor XP States Register 0" bitfld.long 0x04 28. " FAILED_L0S_EXITS_INF ,Failed L0s exit counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 24. " FAILED_L0S_EXITS_LC ,Failed L0S exits LC" "No effect,Clear" textline " " bitfld.long 0x04 20. " NAKS_RCVD_INF ,NAKs received counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 16. " NAKS_RCVD_LC ,NAKS received LC" "No effect,Clear" textline " " bitfld.long 0x04 12. " CRC_ERRORS_INF ,CRC error counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 8. " CRC_ERRORS_LC ,Current value from the CRC error counter" "No effect,Clear" textline " " bitfld.long 0x04 4. " 8B10B_ERRORS_INF ,8b/10b error counter accumulates indefinitely" "No,Yes" eventfld.long 0x04 0. " 8B10B_ERRORS_LC ,Current value from the 8b/10b error counter" "No effect,Clear" rgroup.long 0xF5C++0x07 line.long 0x00 "VEND_XP_STATS1,Vendor XP States Register 1" sif (cpuis("TEGRAX2")) hexmask.long.byte 0x00 24.--31. 1. " FAILED_L0S_EXITS ,Counts the number of times the RX side of the XP went into Recovery in one millisecond" hexmask.long.byte 0x00 16.--23. 1. " NAKS_RCVD ,Counts the number of NAKs received from the endpoint in 64 microseconds" textline " " hexmask.long.byte 0x00 8.--15. 1. " CRC_ERRORS ,Counts the number of CRC errors detected in 64 microseconds" hexmask.long.byte 0x00 0.--7. 1. " 8B10B_ERRORS ,Counts the number of 8b/10b errors detected in one microsecond" else hexmask.long.byte 0x00 24.--31. 1. " 8B10B_ERRORS ,Counts the number of 8b/10b errors detected in one microsecond" hexmask.long.byte 0x00 16.--23. 1. " CRC_ERRORS ,Counts the number of CRC errors detected in 64 microseconds" textline " " hexmask.long.byte 0x00 8.--15. 1. " NAKS_RCVD ,Counts the number of NAKs received from the endpoint in 64 microseconds" hexmask.long.byte 0x00 0.--7. 1. " FAILED_L0S_EXITS ,Counts the number of times the RX side of the XP went into Recovery in one millisecond" endif line.long 0x04 "VEND_ERROR_COUNT,Vendor Error Count Register" hexmask.long.byte 0x04 16.--23. 1. " REPLAY ,Counts number of times TXBA replays" hexmask.long.byte 0x04 8.--15. 1. " BAD_TLP ,Counts bad tlps reported by RXL" textline " " hexmask.long.byte 0x04 0.--7. 1. " LCRC_ERR ,Counts LCRCL Errors reported by RXL" textline " " width 28. group.long 0xF64++0x0B line.long 0x00 "CFG_MISC,Config Miscellaneous Register (NVIDIA's Implementation)" hexmask.long.byte 0x00 0.--7. 1. " MUTE_IDLE ,Mute idle" line.long 0x04 "PRIV_XP_INIT_RECOVERY,Private XP Initialize Recovery Register (NVIDIA's Implementation)" bitfld.long 0x04 31. " 8B10B_ERROR_ENABLE ,8B10B feature enable" "Disabled,Enabled" hexmask.long.word 0x04 20.--30. 1. " 8B10B_ERROR_WINDOW ,CPrograms the time frame in multiples of 1 microsecond" textline " " hexmask.long.tbyte 0x04 0.--19. 1. " 8B10B_ERROR_THRESHOLD ,Programs the 8b10b error threshold" line.long 0x08 "PRIV_XP_LCTRL_2,Private XP LCTRL (NVIDIA's Implementation)" rbitfld.long 0x08 31. " UPCONFIGURE_CAPABLE ,Gen2 link width up-configure capability" "Not capable,Capable" bitfld.long 0x08 30. " REV2P0_COMPLIANCE_DIS ,Disable advertising rev2.0 support and link width up-configure capability" "Disabled,Enabled" textline " " bitfld.long 0x08 29. " EIDLE_INFERENCE_EN ,Disable electrical idle inference" "No,Yes" bitfld.long 0x08 28. " SURPRISE_IDLE_USE_STAT_IDLE ,Surprise idle use status idle" "Disabled,Enabled" textline " " bitfld.long 0x08 27. " ALLOW_SPEED_CHANGE_FROM_L1 ,Allow speed change to be initiated from the L1 or Rx_L0s link states" "Disabled,Enabled" bitfld.long 0x08 24.--26. " RECOVERY_SPEED_TIMEOUT_ADJ ,Adjust minimum length of time the transmitter stays in idle in the Recover Sped state" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 20.--23. " N_EIE_SYMBOLS ,Number of K28.7 symbols" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 19. " DEEMPHASIS_STRAP ,DEEMPHASIS_STRAP" "-6db,-3.5db" textline " " bitfld.long 0x08 18. " ENFORCE_DEEMPHASIS ,Forces root port to use de-emphasis value" "Disabled,Enabled" bitfld.long 0x08 17. " POLLING_PREDETERMINED_LANES ,Polling predetermined lanes" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " AUTONOMOUS_CHANGE ,Autonomous change" "No,Yes" rbitfld.long 0x08 12.--15. " DATA_RATE_SUPPORTED_REMOTE ,Gen2 data rate supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 8.--11. " DATA_RATE_SUPPORTED ,Supported link speed reported in the link capabilities" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " TARGET_LINK_SPEED ,Specifies the link rate to change to" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 3. " TX_MARGIN_OVERRIDE ,TX_MARGIN_OVERRIDE" "Disabled,Enabled" sif (cpuis("TEGRAX2")) bitfld.long 0x08 2. " CYA_DEEMPHASIS_OVERRIDE ,CYA deemphasis override" "No override,Override" endif bitfld.long 0x08 1. " ADVERTISED_RATE_CHANGE ,ADVERTISED_RATE_CHANGE" "No effect,Change" textline " " bitfld.long 0x08 0. " SPEED_CHANGE ,Link speed negotiation procedure" "No effect,Change" group.long 0xF74++0x03 line.long 0x00 "PRIV_XP_PAD_PWRUP,Private XP PAD_Powerup" hexmask.long.byte 0x00 16.--23. 1. " PMRX_PWRUP_THRESHOLD ,Time to hold CDR at reset in Recovery" sif (cpuis("TEGRAX2")) group.long 0xF78++0x03 line.long 0x00 "PRIV_XP_PAD_GEN2_PAD_PWRDN,Private XP PAD GEN2 PAD Powerdown" hexmask.long.byte 0x00 16.--23. 1. " MICROSECOND ,Number of xclks in 1 microsecond when running at gen2 speed" endif group.long 0xF84++0x03 line.long 0x00 "PRIV_XP_RECOVERY_REASONS,Register Records The Reasons We Went Into Recovery" textline " " width 30. sif (cpuis("TEGRAX2")) rgroup.long 0xF88++0x07 line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number Of RECOVERY STATE Entries In XP By The XVR" line.long 0x04 "PRIV_XP_L0S_ENTRY_COUNT,Number Of Entries From L0 To L0s At ltssm Side" rgroup.long 0xF94++0x0B line.long 0x00 "PRIV_XP_L1_ENTRY_COUNT,Number Of Entries From L0 To L1 It Is Reset Whenever It Is Read" line.long 0x04 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number Of Entries From L1 To Recovery" line.long 0x08 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number Of Entries From L0 To Recovery" bitfld.long 0x08 8. " REASON ,Reason" "All,Error" textline " " hexmask.long.byte 0x08 0.--7. 1. " VALUE ,Value" else rgroup.long 0xF88++0x13 line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number of RECOVERY STATE entries in XP by the XVR" line.long 0x04 "PRIV_XP_RX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm RX side" line.long 0x08 "PRIV_XP_TX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm TX side" line.long 0x0C "PRIV_XP_L1_ENTRY_COUNT,Number of entries from L0 to L1 It is reset whenever it is read" line.long 0x10 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number of entries from L1 to Recovery" group.long 0xF9C++0x03 line.long 0x00 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number of entries from L0 to Recovery" bitfld.long 0x00 8. " REASON ,REASON" "All,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " VALUE ,VALUE" endif rgroup.long 0xFA0++0x07 line.long 0x00 "PRIV_XP_L1P_ENTRY_COUNT,Number Of Entries From L0 To Deep L1" line.long 0x04 "PRIV_XP_ASLM_COUNT,Number Of Switching Between X1 And X16 for Gen2 Only" group.long 0xFA8++0x07 line.long 0x00 "VEND_CTL2,Vendor Control Register (Miscellaneous)" bitfld.long 0x00 24. " COMPLIANCE_X8_DELAY ,CTL for compliance delay pattern" "Wrap on n-1,Wrap on 8/16 mod 8" textline " " bitfld.long 0x00 23. " IGNORE_ATTENTION_BUTTON_MSG ,Ignore upstream attention button" "Not ignored,Ignored" textline " " bitfld.long 0x00 22. " UNBLOCK_UP_TRANSACTIONS ,Unblock up transaction" "Blocked,Unblocked" textline " " bitfld.long 0x00 21. " BLOCK_UP_TRANSACTIONS_ON_ERR ,Block all upstream transaction after an error" "Enabled,Disabled" textline " " bitfld.long 0x00 20. " HW_AUTO_WIDTH_DISABLE_DIS ,HW auto width disable disable" "False,True" textline " " bitfld.long 0x00 19. " BW_MANAGEMENT_INT_EN_DIS ,BW management INT enable disable" "False,True" textline " " bitfld.long 0x00 18. " AUTO_BANDWIDTH_INT_EN_DIS ,Auto bandwidth INT enable disable" "False,True" textline " " bitfld.long 0x00 17. " AUTO_BANDWIDTH_DIS ,Auto bandwidth disable" "False,True" textline " " bitfld.long 0x00 16. " BW_MANAGEMENT_DIS ,BW management disable" "False,True" textline " " bitfld.long 0x00 13. " SHADOW_LINK_BW_NOTIFY_CAP ,Shadow link BW notify capable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE ,GEN2 protocol disable" "No,Yes" else rbitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE ,GEN2 protocol disable" "No,Yes" endif textline " " bitfld.long 0x00 11. " SLOT_IMPLEMENTED ,Slot implemented" "Not implemented,Implemented" textline " " eventfld.long 0x00 9. " ERR_STS_HOTPLUG_PME ,Error STS hotplug PME" "No error,Error" textline " " eventfld.long 0x00 8. " ERR_STS_HOTPLUG_NMI ,Error STS hotplug NMI" "No error,Error" textline " " bitfld.long 0x00 7. " PCA_ENABLE ,Enable/disable the PCA in any TMS" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " GEN2_SPEED_DISABLE ,Gen 2 protocol speed disable" "No,Yes" textline " " bitfld.long 0x00 4. " GEN2_PROTOCOL_DISABLE ,Disable gen2 protocol and will force the use of Gen 1.1 protocol" "No,Yes" textline " " bitfld.long 0x00 2. " DEV_CAP_EXTENDED_TAG_FIELD_SIZE ,DEV capable extended tag field size" "5bit,8bit" textline " " bitfld.long 0x00 1. " DIS_MA_TA_EP_MERGE ,Disables the logic which takes care of merging of EP/MA/TA" "No,Yes" line.long 0x04 "PRIV_XP_CONFIG,Private XP Config" bitfld.long 0x04 0.--1. " LOW_PWR_DURATION ,information logging for the health and performance counters" "TX_L0S,RX_L0S,L1,Idle" textline " " width 35. rgroup.long 0xFB0++0x03 line.long 0x00 "PRIV_XP_DURATION_IN_LOW_PWR_100NS,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" textline " " sif (cpuis("TEGRAX2")) rgroup.long 0xFB4++0x03 line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2" hexmask.long.word 0x00 0.--12. 1. " THRESHOLD ,Threshold" else group.long 0xFB4++0x03 line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2" hexmask.long.word 0x00 0.--12. 1. " THRESHOLD ,Threshold" endif textline " " group.long 0xFB8++0x03 line.long 0x00 "PRIV_XP_EIDLE_INFERENCE_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information" hexmask.long.word 0x00 16.--31. 1. " TIMEOUT_B ,UI window for electrical idle exit not detected in the Recover" textline " " hexmask.long.word 0x00 0.--15. 1. " TIMEOUT_A ,UI window for COM not detected in the Recovery" textline " " width 25. sif (cpuis("TEGRAX2")) group.long 0xFBC++0x03 line.long 0x00 "SLOT_CONTROL_STATUS_HPC,Slot Control Status HPC Register" hexmask.long.word 0x00 16.--31. 1. " COMMAND ,Command" hexmask.long.byte 0x00 8.--15. 1. " STATE ,State" textline " " eventfld.long 0x00 7. " STATE_CHANGE7 ,State change 7" "Not changed,Changed" eventfld.long 0x00 6. " STATE_CHANGE6 ,State change 6" "Not changed,Changed" textline " " eventfld.long 0x00 5. " STATE_CHANGE5 ,State change 5" "Not changed,Changed" eventfld.long 0x00 4. " STATE_CHANGE4 ,State change 4" "Not changed,Changed" textline " " eventfld.long 0x00 3. " STATE_CHANGE3 ,State change 3" "Not changed,Changed" eventfld.long 0x00 2. " STATE_CHANGE2 ,State change 2" "Not changed,Changed" textline " " eventfld.long 0x00 1. " STATE_CHANGE1 ,State change 1" "Not changed,Changed" eventfld.long 0x00 0. " STATE_CHANGE0 ,State change 0" "Not changed,Changed" group.long 0xFC4++0x07 line.long 0x00 "VEND_XP_LANEMAP1,Vendor XP Lane MAP 1" bitfld.long 0x00 28.--31. " LANE_15 ,Lane 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. " LANE_14 ,Lane 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20.--23. " LANE_13 ,Lane 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " LANE_12 ,Lane 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " LANE_11 ,Lane 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " LANE_10 ,Lane 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " LANE_9 ,Lane 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " LANE_8 ,Lane 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "VEND_SS_1,Shadow Register Of SS 1" hexmask.long.word 0x04 16.--31. 1. " SSID ,SSID" hexmask.long.word 0x04 0.--15. 1. " SSVID ,SSVID" endif sif (!cpuis("TEGRAX2")) group.long 0xFC8++0x0B line.long 0x00 "VEND_SHADOW,Shadow register of SS_1" hexmask.long.word 0x00 16.--31. 1. " SS_1_SSID ,SS_1_SSID" textline " " hexmask.long.word 0x00 0.--15. 1. " SS_1_SSVID ,SS_1_SSVID" line.long 0x04 "TX_MARGIN_MAP0_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register" bitfld.long 0x04 30.--31. " CTL ,CTL" "0,1,2,3" textline " " bitfld.long 0x04 24.--29. " CODE3 ,CODE3" "Init,,,,,,,,Mobile,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 16.--21. " CODE2 ,CODE2" "Init,,,,,,,,,,Mobile,,,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 8.--13. " CODE1 ,CODE1" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,Desktop,?..." textline " " bitfld.long 0x04 0.--5. " CODE0 ,CODE0" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,,,,,Desktop,?..." line.long 0x08 "TX_MARGIN_MAP1_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register" bitfld.long 0x08 30.--31. " CTL ,CTL" "0,1,2,3" textline " " bitfld.long 0x08 24.--29. " CODE7 ,CODE7" "Mobile,,,,Desktop,?..." textline " " bitfld.long 0x08 16.--21. " CODE6 ,CODE6" "Init,,Mobile,,,,,,Desktop,?..." textline " " bitfld.long 0x08 8.--13. " CODE5 ,CODE5" "Init,,,,Mobile,,,,,,,,Desktop,?..." textline " " bitfld.long 0x08 0.--5. " CODE4 ,CODE4" "Init,,,,,,Mobile,,,,,,,,,,Desktop,?..." endif textline " " sif (cpuis("TEGRAK1")) group.long 0xFD4++0x03 line.long 0x00 "ECTL_1_R1,ECTL_1_R1" bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20. " RX_QEYE_EN_1C ,RX_ QEYE_EN_1C" "0,1" textline " " bitfld.long 0x00 16.--18. " RX_WANDER_1C ,RX_WANDER_1C" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C ,_RX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C ,TX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 8.--11. " TX_CMADJ_1C ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--5. " TX_AMP_1C ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xFD8++0x03 line.long 0x00 "ECTL_1_R2,ECTL_1_R2" bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 20. " RX_QEYE_EN_1C ,RX_ QEYE_EN_1C" "0,1" textline " " bitfld.long 0x00 16.--18. " RX_WANDER_1C ,RX_WANDER_1C" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C ,_RX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C ,TX_TERM_CNTL_1C" "0,1,2,3" textline " " bitfld.long 0x00 8.--11. " TX_CMADJ_1C ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--5. " TX_AMP_1C ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0xFDC++0x07 line.long 0x00 "TIMEOUT2,Timeout 2 Register" bitfld.long 0x00 0.--4. " MIN_L1_L2_IDLE_TIME ,Sets minimum amount of time we stay in L1/L2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "PRIV_MISC,Private Miscellaneous Register" bitfld.long 0x04 31. " TMS_CLK_CLAMP_ENABLE ,Enables per-TMS XCLK/XTXCLK clamping" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 24.--30. 1. " CLK_CLAMP_THRESHOLD ,Number of contiguous nbref_clks (25MHz) after clamping" textline " " bitfld.long 0x04 23. " CTLR_CLK_CLAMP_ENABLE ,Enables per-controller XCLK/XTXCLK clamping" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 16.--22. 1. " CTLR_CLK_CLAMP_THRESHOLD ,Number of contiguous nbref_clks (12MHz) after clamping" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x04 4. " USE_EXT_CLKREQ ,Use EXT CLKREQ" "Not used,Used" endif textline " " bitfld.long 0x04 0.--3. " PRSNT_MAP ,PRSNT MAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpuis("TEGRAX2")) group.long 0xFE4++0x03 line.long 0x00 "BIST_CTRL_2,BIST Control 2 Register" bitfld.long 0x00 31. " OVERRIDE_JTAG ,Internal JTAG register override" "No override,Override" textline " " bitfld.long 0x00 4.--7. " TX_CHAR_SPEED ,Speed of TXCHAR output" ",2.5Gbps,5.0Gbps,?..." textline " " bitfld.long 0x00 3. " TXCHAR_MIN_EIDLE ,Force LTSSM to spend minimum time in E-idle" "Not forced,Forced" textline " " bitfld.long 0x00 2. " TXCHAR_EIDLE_EXIT ,Transition from E-idle to compliance pattern" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TXCHAR_EIDLE_ENTRY ,Transition from compliance pattern to E-idle" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SHORT_LINK_TIMERS ,Shortened timers in LINK" "Disabled,Enabled" endif group.long 0xFE8++0x03 line.long 0x00 "VEND_XP3,Symbol Alignment Error Handling Register" hexmask.long.byte 0x00 0.--7. 1. " SA_ERROR_LIMIT ,Specifies number of misaligned COM symbols" group.long 0xFEC++0x03 line.long 0x00 "XP_CTL_1,Control Registers Used In XP" sif (cpuis("TEGRAX2")) bitfld.long 0x00 31. " CYA_RP_INITIATED_WAKE_ON_TLP ,Initiated wake one TLP" "Disabled,Enabled" textline " " endif sif (cpuis("TEGRAX1")) bitfld.long 0x00 29.--30. " SPARE ,SPARE" "0,1,2,3" textline " " else bitfld.long 0x00 28.--30. " SPARE ,Spare" "0,1,2,3,4,5,6,7" textline " " endif bitfld.long 0x00 27. " EXIT_L1_AT_CLKREQ_ASSERTION ,When set,ltssm will exit L1 when clkreq assertion happens" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " NEW_IOBIST_CTRL ,Enable control signals from iobist" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " OLD_IOBIST_EN ,When set will enable old iobist,else it will enable new iobist" "New,Old" textline " " bitfld.long 0x00 19.--24. " EIOS_DEBOUNCE_TIMER ,Number of xclk for which rx_data_en signals need to be deasserted before asserting it again" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 18. " DISABLE_RX_LANE_AFTER_EIOS ,Disable rx_lane_en after EIOS is seen in any of the enabled lane during recovery" "No,Yes" textline " " bitfld.long 0x00 17. " ENABLE_DESKEW_FOR_SPDCH_NEGOTIATION ,LTSSM enable deskew in recovery" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " BYPASS_CONFIG_PWRUP ,Bypass config powerup" "0,1" textline " " bitfld.long 0x00 15. " RESET_TS_CTRL_ON_ERROR ,Reset TS control on error" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " RX_EIDLE_EXIT_TIMER_IN_CONFIG ,RX EIDLE exit timer in config" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " FORCE_RESET_IN_CONFIG ,Force reset in config" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " LINK_RESIZE_PWRDN_CTL ,Link resize powerdown control" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " ALLOW_SPEED_CHANGE_FROM_L0S ,When set,LTSSM will initiate link speed/width/advertised rate change" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " PRESERVE_TX_PACKET_ON_DL_RETRAIN ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PRESERVE_TX_PACKET_ON_RECOVERY ,Preserve TX packet on recovery" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " PRESERVE_TX_PACKET_ON_WIDTH_CHANGE ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " PRESERVE_TX_PACKET_ON_SPEED_CHANGE ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RESET_LANE_ENABLE_ORIG_IN_DETECT ,allow lane_enable_original to be reset in Detect state" "Not allowed,Allowed" textline " " bitfld.long 0x00 2.--5. " IDLE_TO_L0_DELAY ,Number of clocks that the LTSSM will delay the transition from Recovery" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " LWLO_HUNT_ON_BAD_TS1 ,LWLO HUNT on bad TS1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FORCE_SA_IN_CONFIG ,Enables symbol alignment" "Disabled,Enabled" group.long 0xFF0++0x0F line.long 0x00 "PRIV_XP_L1BEACON,Private XP L1 Beacon" hexmask.long.byte 0x00 2.--9. 1. " N_EIE_SYMBOLS ,Number of EIE symbols sent in L1 Beacon Entry/Exist state" textline " " bitfld.long 0x00 1. " TX_BYP_CTRL ,TX bypass control" "Only L0,All Lanes" textline " " bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" line.long 0x04 "TIMEOUT3,Timeout 3 Register" hexmask.long.byte 0x04 24.--31. 1. " RX_L0S_IDLE_TIME_GEN2 ,Controls the amount of time LTSSM delays" textline " " hexmask.long.byte 0x04 16.--23. 1. " RX_L0S_IDLE_TIME_GEN1 ,Controls the amount of time LTSSM delays" textline " " hexmask.long.byte 0x04 8.--15. 1. " TX_L0S_IDLE_TIME ,Controls the minimum amount of time LTSSM stays in TX_L0S_IDLE state" textline " " bitfld.long 0x04 4.--7. " RX_EIDLE_EXIT_DELAY ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " TX_EIDLE_EXIT_DELAY ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RP_XP_CTL_2,XP Control 2 Register" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) sif cpuis("TEGRAX2") bitfld.long 0x08 24. " LOOPBACK_RATE_DEEMPH_CHECK_DIS ,Loopback rate deemph check disable" "No,Yes" textline " " endif bitfld.long 0x08 23. " RX_CAL_EN ,Hardware RX calibration in UPHY enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " AUX_RX_IDLE_EN ,RX idle enable" "Disabled,Enabled" textline " " bitfld.long 0x08 21. " OVERRIDE_AUX_RX_IDLE_EN ,Override for bit for AUX_RX_IDLE_EN enable" "Disabled,Enabled" textline " " bitfld.long 0x08 20. " WAIT_FOR_LOCKDET_DURING_L1_EXIT ,Wait for lockdet during L1 exit" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 12.--19. 1. " ECO351987_HOLDOFF_CNTR_LIMIT ,Holdoff counter limit for counter that was added in ECO 351987" textline " " bitfld.long 0x08 11. " USE_QUALIFIED_TS_CTL_BITS ,Qualifies the training control bits in the transmitted TS1s/TS2s with the LTSSM state" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " RELAXED_UNEXP_CPL_CHECK ,Relaxed unexpected completion" "Disabled,Enabled" textline " " bitfld.long 0x08 9. " LOOPBACK_FORCE_NOSCRAMBLE ,Loopback force nonscramble enable" "Disabled,Enabled" textline " " endif bitfld.long 0x08 8. " CONFIG_LINKSTART_REQUIRE_PAD_LANE_NUM ,Config link start require PAD lane num" "0,1" textline " " hexmask.long.byte 0x08 0.--7. 1. " LOOPBACK_EXIT_THRESHOLD ,Maximum amount of time spent in loopback" line.long 0x0C "VEND_XP_STATS2,Vendor XP States (NVIDIAs Implementation)" hexmask.long.word 0x0C 0.--15. 1. " 8B10B_ERR_LANEMASK ,Each bit represent the corresponding logical lane" tree.end width 0x0B tree.end ; tree "AFI Registers" ; base ad:??? ; %include tegrak1/afi.ph ad:??? ; tree.end tree.end tree "I2C Controller" tree "I2C" base ad:0x7000C000 width 20. if (((per.l(ad:0x7000C000))&0x10)==0x10) group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " CMD2 ,Read/Write Command for Slave 2" "Write,Read" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" else group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" endif if (((per.l(ad:0x7000C000))&0x01)==0x01) group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.word 0x00 0.--9. 1. " ADDR0 ,I2C Slave-1 Address" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.word 0x04 0.--9. 1. " ADDR1 ,I2C Slave-2 Address" else group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.byte 0x00 1.--7. 1. " ADDR0 ,I2C Slave-1 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " CMD_ADDR0[0] ,Indicates read/write transaction" "Write,Read" endif line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.byte 0x04 1.--7. 1. " ADDR1 ,I2C Slave-2 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x04 0. " CMD_ADDR1[0] ,Indicates read/write transaction" "Write,Read" endif endif group.long 0x0C++0x07 line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive" hexmask.long.byte 0x00 24.--31. 1. " DATA4 ,Fourth data byte to be sent/received" hexmask.long.byte 0x00 16.--23. 1. " DATA3 ,Third data byte to be sent/received" hexmask.long.byte 0x00 8.--15. 1. " DATA2 ,Second data byte to be sent/received" textline " " hexmask.long.byte 0x00 0.--7. 1. " DATA1 ,First data byte to be sent/received" line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive" hexmask.long.byte 0x04 24.--31. 1. " DATA8 ,Eighth data byte to be sent/received" hexmask.long.byte 0x04 16.--23. 1. " DATA7 ,Seventh data byte to be sent/received" hexmask.long.byte 0x04 8.--15. 1. " DATA6 ,Sixth data byte to be sent/received" textline " " hexmask.long.byte 0x04 0.--7. 1. " DATA5 ,Fifth data byte to be sent/received" rgroup.long 0x1C++0x03 line.long 0x00 "STATUS_0,I2C Controller Master Status" bitfld.long 0x00 8. " BUSY ,Master busy" "Not busy,Busy" bitfld.long 0x00 4.--7. " CMD2_STAT ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." bitfld.long 0x00 0.--3. " CMD1_STAT ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000C000+0x20))&0x100000)==0x100000) group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif group.long 0x24++0x03 line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data" hexmask.long.byte 0x00 0.--7. 1. " SL_DATA ,Slave received data" if (((per.l(ad:0x7000C000+0x28))&0x80)==0x80) group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR ,Hardware master address received via general call addressing" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" else group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" endif group.long 0x2C++0x03 line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register" hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1 ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)" hexmask.long.byte 0x00 0.--7. 1. " SL_ADDR0 ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)" if (((per.l(ad:0x7000C000+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000C000+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000C000+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000C000+0x30))&0x100)==0x100) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000C000+0x30))&0x01)==0x01)&&(((per.l(ad:0x7000C000+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" else group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" endif group.long 0x34++0x07 line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds" bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT ,Reset Slave state machine on time-out" "Disabled,Enabled" bitfld.long 0x00 26. " TLOW_MEXT_EN ,Enable TLOW_MEXT counter" "Disabled,Enabled" bitfld.long 0x00 25. " TLOW_SEXT_EN ,Enable TLOW_SEXT counter" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TIMEOUT_EN ,Enable TIMEOUT counter" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " TLOW_MEXT ,Cumulative clock low extend time (transfer period)" hexmask.long.byte 0x00 8.--15. 1. " TLOW_SEXT ,Cumulative clock low extend time (complete transfer)" textline " " hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT ,Clock low timeout period in milliseconds" group.long 0x3C++0x07 line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count" hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT ,Timing between address-data cycles or data-data cycles" line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask" bitfld.long 0x04 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled" bitfld.long 0x04 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled" bitfld.long 0x04 5. " RST_SL ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " END_TRANS ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled" bitfld.long 0x04 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled" bitfld.long 0x04 2. " RCVD ,RCVD (Transaction received) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ZA ,ZA (Zero address) Mask" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" group.long 0x48++0x03 line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" tree "Packet Mode" width 29. group.long 0x50++0x0F line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO" rgroup.long 0x54++0x07 line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data" line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,The packet transfer for which last packet is set has been completed" "Unset,Set" hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" textline " " hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" bitfld.long 0x04 3. " NOACK_FOR_ADDR ,No ACK received for the address byte" "ACK,No ACK" textline " " bitfld.long 0x04 2. " NOACK_FOR_DATA ,No ACK received for the data byte" "ACK,No ACK" bitfld.long 0x04 1. " ARB_LOST ,Arbitration lost for the current byte" "Not lost,Lost" textline " " bitfld.long 0x04 0. " CONTROLLER_BUSY ,Controller is busy" "Not busy,Busy" group.long 0x5C++0x03 line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register" bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG ,Slave Transmit FIFO trigger" "1 word,2 words,?..." bitfld.long 0x00 10.--12. " SLV_RX_FIFO_TRIG ,Slave Receive FIFO trigger" "1 word,2 words,?..." textline " " bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 8. " SLV_RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" textline " " bitfld.long 0x00 5.--7. " TX_FIFO_TRIG ,Transmit FIFO trigger level" "1 word,2 words,?..." bitfld.long 0x00 2.--4. " RX_FIFO_TRIG ,Receive FIFO trigger level" "1 word,2 words,?..." textline " " bitfld.long 0x00 1. " TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 0. " RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" rgroup.long 0x60++0x03 line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register" bitfld.long 0x00 25. " SLV_XFER_ERR_REASON ,Nature of the packet transfer error" "Terminated before end,Not terminated" bitfld.long 0x00 20.--23. " SLV_TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..." bitfld.long 0x00 4.--7. " TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..." textline " " group.long 0x64++0x03 line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " SLV_RD2WR_INT_EN ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SLV_WR2RD_INT_EN ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR_INT_EN ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " SLV_TFIFO_OVF_REQ_INT_EN ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ_INT_EN ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " BUS_CLEAR_DONE_INT_EN ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TIMEOUT_INT_EN ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TFIFO_OVF_INT_EN ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFIFO_UNF_INT_EN ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NOACK_INT_EN ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARB_LOST_INT_EN ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFIFO_DATA_REQ_INT_EN ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register" eventfld.long 0x00 28. " SLV_ACK_WITHHELD ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt" eventfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr" "No interrupt,Interrupt" textline " " eventfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd" "No interrupt,Interrupt" eventfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Request error" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty" "No interrupt,Interrupt" else eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full" "No interrupt,Interrupt" endif eventfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "No interrupt,Interrupt" eventfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 20. " SLV_RFIFO_UN ,Slave RX FIFO underflow" "No interrupt,Interrupt" rbitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data request" "No interrupt,Interrupt" eventfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done status" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "No interrupt,Interrupt" else eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,SMBUS sext time-out" "No interrupt,Interrupt" endif textline " " eventfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "No interrupt,Interrupt" eventfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "No interrupt,Interrupt" eventfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 3. " NOACK ,No ACK from slave" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "No interrupt,Interrupt" rbitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request" "No interrupt,Interrupt" group.long 0x6C++0x03 line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register" hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE ,Divisor - fast mode" hexmask.long.word 0x00 0.--15. 1. " I2C_CLK_DIVISOR_HSMODE ,Divisor - high speed mode" rgroup.long 0x70++0x03 line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source" "Unset,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "Unset,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "Unset,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave xfer - source" "Unset,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "Unset,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "Unset,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "Unset,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "Unset,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave RX FIFO data request - source" "Unset,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "Unset,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "Unset,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "Unset,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "Unset,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "Unset,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "Unset,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "Unset,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "Unset,Set" bitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request - source" "Unset,Set" group.long 0x74++0x07 line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source - source" "No effect,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "No effect,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "No effect,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave XFER - source" "No effect,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "No effect,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "No effect,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "No effect,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "No effect,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "No effect,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "No effect,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "No effect,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "No effect,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "No effect,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "No effect,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "No effect,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "No effect,Set" line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO" rgroup.long 0x7C++0x07 line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO" line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status" bitfld.long 0x04 25. " ACK_WITHHELD ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,All the packets have been transferred successfully" "Not completed,Completed" textline " " hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,Current packet ID for which the transaction is happening" hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,Number of bytes transferred in the current packet" group.long 0x84++0x03 line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure" hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD ,Send the clock pulses until this threshold is met" bitfld.long 0x00 2. " BC_STOP_COND ,Bus clear operation" "No stopped,Stopped" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE" else bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD" endif bitfld.long 0x00 0. " BC_ENABLE ,Starts bus clear operation" "Disabled,Enabled" rgroup.long 0x88++0x03 line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status" bitfld.long 0x00 0. " BC_STATUS ,Bus clear" "Not cleared,Cleared" group.long 0x8C++0x03 line.long 0x00 "CONFIG_LOAD_0,Spare Register" bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD ,Loads the timeout configuration" "Disabled,Enabled" bitfld.long 0x00 1. " SLV_CONFIG_LOAD ,Loads the slave configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSTR_CONFIG_LOAD ,Loads the master configuration" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0x90++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0" bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on" bitfld.long 0x00 3. " I2C_SLV_HIF_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on" textline " " bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on" bitfld.long 0x00 0. " I2C_MST_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on" endif group.long 0x94++0x0F line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0" bitfld.long 0x00 8.--13. " THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1" bitfld.long 0x04 24.--29. " TBUF ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8.--13. " THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0" bitfld.long 0x08 8.--13. " HS_THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " HS_TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1" bitfld.long 0x0C 16.--21. " HS_TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " HS_THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--5. " HS_TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif !cpuis("TEGRAX1") group.long 0xA8++0x07 line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" endif tree.end width 0x0B tree.end tree "I2C2" base ad:0x7000C400 width 20. if (((per.l(ad:0x7000C400))&0x10)==0x10) group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " CMD2 ,Read/Write Command for Slave 2" "Write,Read" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" else group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" endif if (((per.l(ad:0x7000C400))&0x01)==0x01) group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.word 0x00 0.--9. 1. " ADDR0 ,I2C Slave-1 Address" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.word 0x04 0.--9. 1. " ADDR1 ,I2C Slave-2 Address" else group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.byte 0x00 1.--7. 1. " ADDR0 ,I2C Slave-1 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " CMD_ADDR0[0] ,Indicates read/write transaction" "Write,Read" endif line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.byte 0x04 1.--7. 1. " ADDR1 ,I2C Slave-2 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x04 0. " CMD_ADDR1[0] ,Indicates read/write transaction" "Write,Read" endif endif group.long 0x0C++0x07 line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive" hexmask.long.byte 0x00 24.--31. 1. " DATA4 ,Fourth data byte to be sent/received" hexmask.long.byte 0x00 16.--23. 1. " DATA3 ,Third data byte to be sent/received" hexmask.long.byte 0x00 8.--15. 1. " DATA2 ,Second data byte to be sent/received" textline " " hexmask.long.byte 0x00 0.--7. 1. " DATA1 ,First data byte to be sent/received" line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive" hexmask.long.byte 0x04 24.--31. 1. " DATA8 ,Eighth data byte to be sent/received" hexmask.long.byte 0x04 16.--23. 1. " DATA7 ,Seventh data byte to be sent/received" hexmask.long.byte 0x04 8.--15. 1. " DATA6 ,Sixth data byte to be sent/received" textline " " hexmask.long.byte 0x04 0.--7. 1. " DATA5 ,Fifth data byte to be sent/received" rgroup.long 0x1C++0x03 line.long 0x00 "STATUS_0,I2C Controller Master Status" bitfld.long 0x00 8. " BUSY ,Master busy" "Not busy,Busy" bitfld.long 0x00 4.--7. " CMD2_STAT ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." bitfld.long 0x00 0.--3. " CMD1_STAT ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000C400+0x20))&0x100000)==0x100000) group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif group.long 0x24++0x03 line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data" hexmask.long.byte 0x00 0.--7. 1. " SL_DATA ,Slave received data" if (((per.l(ad:0x7000C400+0x28))&0x80)==0x80) group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR ,Hardware master address received via general call addressing" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" else group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" endif group.long 0x2C++0x03 line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register" hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1 ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)" hexmask.long.byte 0x00 0.--7. 1. " SL_ADDR0 ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)" if (((per.l(ad:0x7000C400+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000C400+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000C400+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000C400+0x30))&0x100)==0x100) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000C400+0x30))&0x01)==0x01)&&(((per.l(ad:0x7000C400+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" else group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" endif group.long 0x34++0x07 line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds" bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT ,Reset Slave state machine on time-out" "Disabled,Enabled" bitfld.long 0x00 26. " TLOW_MEXT_EN ,Enable TLOW_MEXT counter" "Disabled,Enabled" bitfld.long 0x00 25. " TLOW_SEXT_EN ,Enable TLOW_SEXT counter" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TIMEOUT_EN ,Enable TIMEOUT counter" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " TLOW_MEXT ,Cumulative clock low extend time (transfer period)" hexmask.long.byte 0x00 8.--15. 1. " TLOW_SEXT ,Cumulative clock low extend time (complete transfer)" textline " " hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT ,Clock low timeout period in milliseconds" group.long 0x3C++0x07 line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count" hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT ,Timing between address-data cycles or data-data cycles" line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask" bitfld.long 0x04 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled" bitfld.long 0x04 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled" bitfld.long 0x04 5. " RST_SL ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " END_TRANS ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled" bitfld.long 0x04 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled" bitfld.long 0x04 2. " RCVD ,RCVD (Transaction received) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ZA ,ZA (Zero address) Mask" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" group.long 0x48++0x03 line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" tree "Packet Mode" width 29. group.long 0x50++0x0F line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO" rgroup.long 0x54++0x07 line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data" line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,The packet transfer for which last packet is set has been completed" "Unset,Set" hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" textline " " hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" bitfld.long 0x04 3. " NOACK_FOR_ADDR ,No ACK received for the address byte" "ACK,No ACK" textline " " bitfld.long 0x04 2. " NOACK_FOR_DATA ,No ACK received for the data byte" "ACK,No ACK" bitfld.long 0x04 1. " ARB_LOST ,Arbitration lost for the current byte" "Not lost,Lost" textline " " bitfld.long 0x04 0. " CONTROLLER_BUSY ,Controller is busy" "Not busy,Busy" group.long 0x5C++0x03 line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register" bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG ,Slave Transmit FIFO trigger" "1 word,2 words,?..." bitfld.long 0x00 10.--12. " SLV_RX_FIFO_TRIG ,Slave Receive FIFO trigger" "1 word,2 words,?..." textline " " bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 8. " SLV_RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" textline " " bitfld.long 0x00 5.--7. " TX_FIFO_TRIG ,Transmit FIFO trigger level" "1 word,2 words,?..." bitfld.long 0x00 2.--4. " RX_FIFO_TRIG ,Receive FIFO trigger level" "1 word,2 words,?..." textline " " bitfld.long 0x00 1. " TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 0. " RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" rgroup.long 0x60++0x03 line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register" bitfld.long 0x00 25. " SLV_XFER_ERR_REASON ,Nature of the packet transfer error" "Terminated before end,Not terminated" bitfld.long 0x00 20.--23. " SLV_TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..." bitfld.long 0x00 4.--7. " TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..." textline " " group.long 0x64++0x03 line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " SLV_RD2WR_INT_EN ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SLV_WR2RD_INT_EN ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR_INT_EN ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " SLV_TFIFO_OVF_REQ_INT_EN ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ_INT_EN ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " BUS_CLEAR_DONE_INT_EN ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TIMEOUT_INT_EN ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TFIFO_OVF_INT_EN ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFIFO_UNF_INT_EN ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NOACK_INT_EN ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARB_LOST_INT_EN ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFIFO_DATA_REQ_INT_EN ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register" eventfld.long 0x00 28. " SLV_ACK_WITHHELD ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt" eventfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr" "No interrupt,Interrupt" textline " " eventfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd" "No interrupt,Interrupt" eventfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Request error" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty" "No interrupt,Interrupt" else eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full" "No interrupt,Interrupt" endif eventfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "No interrupt,Interrupt" eventfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 20. " SLV_RFIFO_UN ,Slave RX FIFO underflow" "No interrupt,Interrupt" rbitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data request" "No interrupt,Interrupt" eventfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done status" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "No interrupt,Interrupt" else eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,SMBUS sext time-out" "No interrupt,Interrupt" endif textline " " eventfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "No interrupt,Interrupt" eventfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "No interrupt,Interrupt" eventfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 3. " NOACK ,No ACK from slave" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "No interrupt,Interrupt" rbitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request" "No interrupt,Interrupt" group.long 0x6C++0x03 line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register" hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE ,Divisor - fast mode" hexmask.long.word 0x00 0.--15. 1. " I2C_CLK_DIVISOR_HSMODE ,Divisor - high speed mode" rgroup.long 0x70++0x03 line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source" "Unset,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "Unset,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "Unset,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave xfer - source" "Unset,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "Unset,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "Unset,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "Unset,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "Unset,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave RX FIFO data request - source" "Unset,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "Unset,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "Unset,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "Unset,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "Unset,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "Unset,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "Unset,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "Unset,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "Unset,Set" bitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request - source" "Unset,Set" group.long 0x74++0x07 line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source - source" "No effect,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "No effect,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "No effect,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave XFER - source" "No effect,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "No effect,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "No effect,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "No effect,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "No effect,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "No effect,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "No effect,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "No effect,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "No effect,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "No effect,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "No effect,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "No effect,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "No effect,Set" line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO" rgroup.long 0x7C++0x07 line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO" line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status" bitfld.long 0x04 25. " ACK_WITHHELD ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,All the packets have been transferred successfully" "Not completed,Completed" textline " " hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,Current packet ID for which the transaction is happening" hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,Number of bytes transferred in the current packet" group.long 0x84++0x03 line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure" hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD ,Send the clock pulses until this threshold is met" bitfld.long 0x00 2. " BC_STOP_COND ,Bus clear operation" "No stopped,Stopped" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE" else bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD" endif bitfld.long 0x00 0. " BC_ENABLE ,Starts bus clear operation" "Disabled,Enabled" rgroup.long 0x88++0x03 line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status" bitfld.long 0x00 0. " BC_STATUS ,Bus clear" "Not cleared,Cleared" group.long 0x8C++0x03 line.long 0x00 "CONFIG_LOAD_0,Spare Register" bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD ,Loads the timeout configuration" "Disabled,Enabled" bitfld.long 0x00 1. " SLV_CONFIG_LOAD ,Loads the slave configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSTR_CONFIG_LOAD ,Loads the master configuration" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0x90++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0" bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on" bitfld.long 0x00 3. " I2C_SLV_HIF_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on" textline " " bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on" bitfld.long 0x00 0. " I2C_MST_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on" endif group.long 0x94++0x0F line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0" bitfld.long 0x00 8.--13. " THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1" bitfld.long 0x04 24.--29. " TBUF ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8.--13. " THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0" bitfld.long 0x08 8.--13. " HS_THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " HS_TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1" bitfld.long 0x0C 16.--21. " HS_TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " HS_THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--5. " HS_TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif !cpuis("TEGRAX1") group.long 0xA8++0x07 line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" endif tree.end width 0x0B tree.end tree "I2C3" base ad:0x7000C500 width 20. if (((per.l(ad:0x7000C500))&0x10)==0x10) group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " CMD2 ,Read/Write Command for Slave 2" "Write,Read" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" else group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" endif if (((per.l(ad:0x7000C500))&0x01)==0x01) group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.word 0x00 0.--9. 1. " ADDR0 ,I2C Slave-1 Address" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.word 0x04 0.--9. 1. " ADDR1 ,I2C Slave-2 Address" else group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.byte 0x00 1.--7. 1. " ADDR0 ,I2C Slave-1 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " CMD_ADDR0[0] ,Indicates read/write transaction" "Write,Read" endif line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.byte 0x04 1.--7. 1. " ADDR1 ,I2C Slave-2 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x04 0. " CMD_ADDR1[0] ,Indicates read/write transaction" "Write,Read" endif endif group.long 0x0C++0x07 line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive" hexmask.long.byte 0x00 24.--31. 1. " DATA4 ,Fourth data byte to be sent/received" hexmask.long.byte 0x00 16.--23. 1. " DATA3 ,Third data byte to be sent/received" hexmask.long.byte 0x00 8.--15. 1. " DATA2 ,Second data byte to be sent/received" textline " " hexmask.long.byte 0x00 0.--7. 1. " DATA1 ,First data byte to be sent/received" line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive" hexmask.long.byte 0x04 24.--31. 1. " DATA8 ,Eighth data byte to be sent/received" hexmask.long.byte 0x04 16.--23. 1. " DATA7 ,Seventh data byte to be sent/received" hexmask.long.byte 0x04 8.--15. 1. " DATA6 ,Sixth data byte to be sent/received" textline " " hexmask.long.byte 0x04 0.--7. 1. " DATA5 ,Fifth data byte to be sent/received" rgroup.long 0x1C++0x03 line.long 0x00 "STATUS_0,I2C Controller Master Status" bitfld.long 0x00 8. " BUSY ,Master busy" "Not busy,Busy" bitfld.long 0x00 4.--7. " CMD2_STAT ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." bitfld.long 0x00 0.--3. " CMD1_STAT ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000C500+0x20))&0x100000)==0x100000) group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif group.long 0x24++0x03 line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data" hexmask.long.byte 0x00 0.--7. 1. " SL_DATA ,Slave received data" if (((per.l(ad:0x7000C500+0x28))&0x80)==0x80) group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR ,Hardware master address received via general call addressing" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" else group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" endif group.long 0x2C++0x03 line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register" hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1 ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)" hexmask.long.byte 0x00 0.--7. 1. " SL_ADDR0 ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)" if (((per.l(ad:0x7000C500+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000C500+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000C500+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000C500+0x30))&0x100)==0x100) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000C500+0x30))&0x01)==0x01)&&(((per.l(ad:0x7000C500+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" else group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" endif group.long 0x34++0x07 line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds" bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT ,Reset Slave state machine on time-out" "Disabled,Enabled" bitfld.long 0x00 26. " TLOW_MEXT_EN ,Enable TLOW_MEXT counter" "Disabled,Enabled" bitfld.long 0x00 25. " TLOW_SEXT_EN ,Enable TLOW_SEXT counter" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TIMEOUT_EN ,Enable TIMEOUT counter" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " TLOW_MEXT ,Cumulative clock low extend time (transfer period)" hexmask.long.byte 0x00 8.--15. 1. " TLOW_SEXT ,Cumulative clock low extend time (complete transfer)" textline " " hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT ,Clock low timeout period in milliseconds" group.long 0x3C++0x07 line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count" hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT ,Timing between address-data cycles or data-data cycles" line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask" bitfld.long 0x04 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled" bitfld.long 0x04 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled" bitfld.long 0x04 5. " RST_SL ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " END_TRANS ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled" bitfld.long 0x04 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled" bitfld.long 0x04 2. " RCVD ,RCVD (Transaction received) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ZA ,ZA (Zero address) Mask" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" group.long 0x48++0x03 line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" tree "Packet Mode" width 29. group.long 0x50++0x0F line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO" rgroup.long 0x54++0x07 line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data" line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,The packet transfer for which last packet is set has been completed" "Unset,Set" hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" textline " " hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" bitfld.long 0x04 3. " NOACK_FOR_ADDR ,No ACK received for the address byte" "ACK,No ACK" textline " " bitfld.long 0x04 2. " NOACK_FOR_DATA ,No ACK received for the data byte" "ACK,No ACK" bitfld.long 0x04 1. " ARB_LOST ,Arbitration lost for the current byte" "Not lost,Lost" textline " " bitfld.long 0x04 0. " CONTROLLER_BUSY ,Controller is busy" "Not busy,Busy" group.long 0x5C++0x03 line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register" bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG ,Slave Transmit FIFO trigger" "1 word,2 words,?..." bitfld.long 0x00 10.--12. " SLV_RX_FIFO_TRIG ,Slave Receive FIFO trigger" "1 word,2 words,?..." textline " " bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 8. " SLV_RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" textline " " bitfld.long 0x00 5.--7. " TX_FIFO_TRIG ,Transmit FIFO trigger level" "1 word,2 words,?..." bitfld.long 0x00 2.--4. " RX_FIFO_TRIG ,Receive FIFO trigger level" "1 word,2 words,?..." textline " " bitfld.long 0x00 1. " TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 0. " RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" rgroup.long 0x60++0x03 line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register" bitfld.long 0x00 25. " SLV_XFER_ERR_REASON ,Nature of the packet transfer error" "Terminated before end,Not terminated" bitfld.long 0x00 20.--23. " SLV_TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..." bitfld.long 0x00 4.--7. " TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..." textline " " group.long 0x64++0x03 line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " SLV_RD2WR_INT_EN ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SLV_WR2RD_INT_EN ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR_INT_EN ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " SLV_TFIFO_OVF_REQ_INT_EN ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ_INT_EN ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " BUS_CLEAR_DONE_INT_EN ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TIMEOUT_INT_EN ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TFIFO_OVF_INT_EN ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFIFO_UNF_INT_EN ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NOACK_INT_EN ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARB_LOST_INT_EN ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFIFO_DATA_REQ_INT_EN ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register" eventfld.long 0x00 28. " SLV_ACK_WITHHELD ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt" eventfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr" "No interrupt,Interrupt" textline " " eventfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd" "No interrupt,Interrupt" eventfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Request error" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty" "No interrupt,Interrupt" else eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full" "No interrupt,Interrupt" endif eventfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "No interrupt,Interrupt" eventfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 20. " SLV_RFIFO_UN ,Slave RX FIFO underflow" "No interrupt,Interrupt" rbitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data request" "No interrupt,Interrupt" eventfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done status" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "No interrupt,Interrupt" else eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,SMBUS sext time-out" "No interrupt,Interrupt" endif textline " " eventfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "No interrupt,Interrupt" eventfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "No interrupt,Interrupt" eventfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 3. " NOACK ,No ACK from slave" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "No interrupt,Interrupt" rbitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request" "No interrupt,Interrupt" group.long 0x6C++0x03 line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register" hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE ,Divisor - fast mode" hexmask.long.word 0x00 0.--15. 1. " I2C_CLK_DIVISOR_HSMODE ,Divisor - high speed mode" rgroup.long 0x70++0x03 line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source" "Unset,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "Unset,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "Unset,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave xfer - source" "Unset,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "Unset,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "Unset,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "Unset,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "Unset,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave RX FIFO data request - source" "Unset,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "Unset,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "Unset,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "Unset,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "Unset,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "Unset,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "Unset,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "Unset,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "Unset,Set" bitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request - source" "Unset,Set" group.long 0x74++0x07 line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source - source" "No effect,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "No effect,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "No effect,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave XFER - source" "No effect,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "No effect,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "No effect,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "No effect,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "No effect,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "No effect,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "No effect,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "No effect,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "No effect,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "No effect,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "No effect,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "No effect,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "No effect,Set" line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO" rgroup.long 0x7C++0x07 line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO" line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status" bitfld.long 0x04 25. " ACK_WITHHELD ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,All the packets have been transferred successfully" "Not completed,Completed" textline " " hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,Current packet ID for which the transaction is happening" hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,Number of bytes transferred in the current packet" group.long 0x84++0x03 line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure" hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD ,Send the clock pulses until this threshold is met" bitfld.long 0x00 2. " BC_STOP_COND ,Bus clear operation" "No stopped,Stopped" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE" else bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD" endif bitfld.long 0x00 0. " BC_ENABLE ,Starts bus clear operation" "Disabled,Enabled" rgroup.long 0x88++0x03 line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status" bitfld.long 0x00 0. " BC_STATUS ,Bus clear" "Not cleared,Cleared" group.long 0x8C++0x03 line.long 0x00 "CONFIG_LOAD_0,Spare Register" bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD ,Loads the timeout configuration" "Disabled,Enabled" bitfld.long 0x00 1. " SLV_CONFIG_LOAD ,Loads the slave configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSTR_CONFIG_LOAD ,Loads the master configuration" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0x90++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0" bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on" bitfld.long 0x00 3. " I2C_SLV_HIF_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on" textline " " bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on" bitfld.long 0x00 0. " I2C_MST_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on" endif group.long 0x94++0x0F line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0" bitfld.long 0x00 8.--13. " THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1" bitfld.long 0x04 24.--29. " TBUF ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8.--13. " THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0" bitfld.long 0x08 8.--13. " HS_THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " HS_TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1" bitfld.long 0x0C 16.--21. " HS_TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " HS_THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--5. " HS_TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif !cpuis("TEGRAX1") group.long 0xA8++0x07 line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" endif tree.end width 0x0B tree.end tree "I2C4" base ad:0x7000C700 width 20. if (((per.l(ad:0x7000C700))&0x10)==0x10) group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " CMD2 ,Read/Write Command for Slave 2" "Write,Read" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" else group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" endif if (((per.l(ad:0x7000C700))&0x01)==0x01) group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.word 0x00 0.--9. 1. " ADDR0 ,I2C Slave-1 Address" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.word 0x04 0.--9. 1. " ADDR1 ,I2C Slave-2 Address" else group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.byte 0x00 1.--7. 1. " ADDR0 ,I2C Slave-1 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " CMD_ADDR0[0] ,Indicates read/write transaction" "Write,Read" endif line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.byte 0x04 1.--7. 1. " ADDR1 ,I2C Slave-2 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x04 0. " CMD_ADDR1[0] ,Indicates read/write transaction" "Write,Read" endif endif group.long 0x0C++0x07 line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive" hexmask.long.byte 0x00 24.--31. 1. " DATA4 ,Fourth data byte to be sent/received" hexmask.long.byte 0x00 16.--23. 1. " DATA3 ,Third data byte to be sent/received" hexmask.long.byte 0x00 8.--15. 1. " DATA2 ,Second data byte to be sent/received" textline " " hexmask.long.byte 0x00 0.--7. 1. " DATA1 ,First data byte to be sent/received" line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive" hexmask.long.byte 0x04 24.--31. 1. " DATA8 ,Eighth data byte to be sent/received" hexmask.long.byte 0x04 16.--23. 1. " DATA7 ,Seventh data byte to be sent/received" hexmask.long.byte 0x04 8.--15. 1. " DATA6 ,Sixth data byte to be sent/received" textline " " hexmask.long.byte 0x04 0.--7. 1. " DATA5 ,Fifth data byte to be sent/received" rgroup.long 0x1C++0x03 line.long 0x00 "STATUS_0,I2C Controller Master Status" bitfld.long 0x00 8. " BUSY ,Master busy" "Not busy,Busy" bitfld.long 0x00 4.--7. " CMD2_STAT ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." bitfld.long 0x00 0.--3. " CMD1_STAT ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000C700+0x20))&0x100000)==0x100000) group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif group.long 0x24++0x03 line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data" hexmask.long.byte 0x00 0.--7. 1. " SL_DATA ,Slave received data" if (((per.l(ad:0x7000C700+0x28))&0x80)==0x80) group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR ,Hardware master address received via general call addressing" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" else group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" endif group.long 0x2C++0x03 line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register" hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1 ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)" hexmask.long.byte 0x00 0.--7. 1. " SL_ADDR0 ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)" if (((per.l(ad:0x7000C700+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000C700+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000C700+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000C700+0x30))&0x100)==0x100) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000C700+0x30))&0x01)==0x01)&&(((per.l(ad:0x7000C700+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" else group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" endif group.long 0x34++0x07 line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds" bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT ,Reset Slave state machine on time-out" "Disabled,Enabled" bitfld.long 0x00 26. " TLOW_MEXT_EN ,Enable TLOW_MEXT counter" "Disabled,Enabled" bitfld.long 0x00 25. " TLOW_SEXT_EN ,Enable TLOW_SEXT counter" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TIMEOUT_EN ,Enable TIMEOUT counter" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " TLOW_MEXT ,Cumulative clock low extend time (transfer period)" hexmask.long.byte 0x00 8.--15. 1. " TLOW_SEXT ,Cumulative clock low extend time (complete transfer)" textline " " hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT ,Clock low timeout period in milliseconds" group.long 0x3C++0x07 line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count" hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT ,Timing between address-data cycles or data-data cycles" line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask" bitfld.long 0x04 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled" bitfld.long 0x04 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled" bitfld.long 0x04 5. " RST_SL ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " END_TRANS ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled" bitfld.long 0x04 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled" bitfld.long 0x04 2. " RCVD ,RCVD (Transaction received) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ZA ,ZA (Zero address) Mask" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" group.long 0x48++0x03 line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" tree "Packet Mode" width 29. group.long 0x50++0x0F line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO" rgroup.long 0x54++0x07 line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data" line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,The packet transfer for which last packet is set has been completed" "Unset,Set" hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" textline " " hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" bitfld.long 0x04 3. " NOACK_FOR_ADDR ,No ACK received for the address byte" "ACK,No ACK" textline " " bitfld.long 0x04 2. " NOACK_FOR_DATA ,No ACK received for the data byte" "ACK,No ACK" bitfld.long 0x04 1. " ARB_LOST ,Arbitration lost for the current byte" "Not lost,Lost" textline " " bitfld.long 0x04 0. " CONTROLLER_BUSY ,Controller is busy" "Not busy,Busy" group.long 0x5C++0x03 line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register" bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG ,Slave Transmit FIFO trigger" "1 word,2 words,?..." bitfld.long 0x00 10.--12. " SLV_RX_FIFO_TRIG ,Slave Receive FIFO trigger" "1 word,2 words,?..." textline " " bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 8. " SLV_RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" textline " " bitfld.long 0x00 5.--7. " TX_FIFO_TRIG ,Transmit FIFO trigger level" "1 word,2 words,?..." bitfld.long 0x00 2.--4. " RX_FIFO_TRIG ,Receive FIFO trigger level" "1 word,2 words,?..." textline " " bitfld.long 0x00 1. " TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 0. " RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" rgroup.long 0x60++0x03 line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register" bitfld.long 0x00 25. " SLV_XFER_ERR_REASON ,Nature of the packet transfer error" "Terminated before end,Not terminated" bitfld.long 0x00 20.--23. " SLV_TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..." bitfld.long 0x00 4.--7. " TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..." textline " " group.long 0x64++0x03 line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " SLV_RD2WR_INT_EN ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SLV_WR2RD_INT_EN ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR_INT_EN ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " SLV_TFIFO_OVF_REQ_INT_EN ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ_INT_EN ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " BUS_CLEAR_DONE_INT_EN ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TIMEOUT_INT_EN ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TFIFO_OVF_INT_EN ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFIFO_UNF_INT_EN ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NOACK_INT_EN ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARB_LOST_INT_EN ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFIFO_DATA_REQ_INT_EN ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register" eventfld.long 0x00 28. " SLV_ACK_WITHHELD ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt" eventfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr" "No interrupt,Interrupt" textline " " eventfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd" "No interrupt,Interrupt" eventfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Request error" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty" "No interrupt,Interrupt" else eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full" "No interrupt,Interrupt" endif eventfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "No interrupt,Interrupt" eventfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 20. " SLV_RFIFO_UN ,Slave RX FIFO underflow" "No interrupt,Interrupt" rbitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data request" "No interrupt,Interrupt" eventfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done status" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "No interrupt,Interrupt" else eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,SMBUS sext time-out" "No interrupt,Interrupt" endif textline " " eventfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "No interrupt,Interrupt" eventfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "No interrupt,Interrupt" eventfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 3. " NOACK ,No ACK from slave" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "No interrupt,Interrupt" rbitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request" "No interrupt,Interrupt" group.long 0x6C++0x03 line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register" hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE ,Divisor - fast mode" hexmask.long.word 0x00 0.--15. 1. " I2C_CLK_DIVISOR_HSMODE ,Divisor - high speed mode" rgroup.long 0x70++0x03 line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source" "Unset,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "Unset,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "Unset,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave xfer - source" "Unset,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "Unset,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "Unset,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "Unset,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "Unset,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave RX FIFO data request - source" "Unset,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "Unset,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "Unset,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "Unset,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "Unset,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "Unset,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "Unset,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "Unset,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "Unset,Set" bitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request - source" "Unset,Set" group.long 0x74++0x07 line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source - source" "No effect,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "No effect,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "No effect,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave XFER - source" "No effect,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "No effect,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "No effect,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "No effect,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "No effect,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "No effect,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "No effect,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "No effect,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "No effect,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "No effect,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "No effect,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "No effect,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "No effect,Set" line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO" rgroup.long 0x7C++0x07 line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO" line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status" bitfld.long 0x04 25. " ACK_WITHHELD ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,All the packets have been transferred successfully" "Not completed,Completed" textline " " hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,Current packet ID for which the transaction is happening" hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,Number of bytes transferred in the current packet" group.long 0x84++0x03 line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure" hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD ,Send the clock pulses until this threshold is met" bitfld.long 0x00 2. " BC_STOP_COND ,Bus clear operation" "No stopped,Stopped" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE" else bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD" endif bitfld.long 0x00 0. " BC_ENABLE ,Starts bus clear operation" "Disabled,Enabled" rgroup.long 0x88++0x03 line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status" bitfld.long 0x00 0. " BC_STATUS ,Bus clear" "Not cleared,Cleared" group.long 0x8C++0x03 line.long 0x00 "CONFIG_LOAD_0,Spare Register" bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD ,Loads the timeout configuration" "Disabled,Enabled" bitfld.long 0x00 1. " SLV_CONFIG_LOAD ,Loads the slave configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSTR_CONFIG_LOAD ,Loads the master configuration" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0x90++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0" bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on" bitfld.long 0x00 3. " I2C_SLV_HIF_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on" textline " " bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on" bitfld.long 0x00 0. " I2C_MST_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on" endif group.long 0x94++0x0F line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0" bitfld.long 0x00 8.--13. " THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1" bitfld.long 0x04 24.--29. " TBUF ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8.--13. " THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0" bitfld.long 0x08 8.--13. " HS_THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " HS_TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1" bitfld.long 0x0C 16.--21. " HS_TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " HS_THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--5. " HS_TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif !cpuis("TEGRAX1") group.long 0xA8++0x07 line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" endif tree.end width 0x0B tree.end tree "I2C5" base ad:0x7000D000 width 20. if (((per.l(ad:0x7000D000))&0x10)==0x10) group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " CMD2 ,Read/Write Command for Slave 2" "Write,Read" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" else group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" endif if (((per.l(ad:0x7000D000))&0x01)==0x01) group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.word 0x00 0.--9. 1. " ADDR0 ,I2C Slave-1 Address" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.word 0x04 0.--9. 1. " ADDR1 ,I2C Slave-2 Address" else group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.byte 0x00 1.--7. 1. " ADDR0 ,I2C Slave-1 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " CMD_ADDR0[0] ,Indicates read/write transaction" "Write,Read" endif line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.byte 0x04 1.--7. 1. " ADDR1 ,I2C Slave-2 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x04 0. " CMD_ADDR1[0] ,Indicates read/write transaction" "Write,Read" endif endif group.long 0x0C++0x07 line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive" hexmask.long.byte 0x00 24.--31. 1. " DATA4 ,Fourth data byte to be sent/received" hexmask.long.byte 0x00 16.--23. 1. " DATA3 ,Third data byte to be sent/received" hexmask.long.byte 0x00 8.--15. 1. " DATA2 ,Second data byte to be sent/received" textline " " hexmask.long.byte 0x00 0.--7. 1. " DATA1 ,First data byte to be sent/received" line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive" hexmask.long.byte 0x04 24.--31. 1. " DATA8 ,Eighth data byte to be sent/received" hexmask.long.byte 0x04 16.--23. 1. " DATA7 ,Seventh data byte to be sent/received" hexmask.long.byte 0x04 8.--15. 1. " DATA6 ,Sixth data byte to be sent/received" textline " " hexmask.long.byte 0x04 0.--7. 1. " DATA5 ,Fifth data byte to be sent/received" rgroup.long 0x1C++0x03 line.long 0x00 "STATUS_0,I2C Controller Master Status" bitfld.long 0x00 8. " BUSY ,Master busy" "Not busy,Busy" bitfld.long 0x00 4.--7. " CMD2_STAT ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." bitfld.long 0x00 0.--3. " CMD1_STAT ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000D000+0x20))&0x100000)==0x100000) group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif group.long 0x24++0x03 line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data" hexmask.long.byte 0x00 0.--7. 1. " SL_DATA ,Slave received data" if (((per.l(ad:0x7000D000+0x28))&0x80)==0x80) group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR ,Hardware master address received via general call addressing" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" else group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" endif group.long 0x2C++0x03 line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register" hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1 ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)" hexmask.long.byte 0x00 0.--7. 1. " SL_ADDR0 ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)" if (((per.l(ad:0x7000D000+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000D000+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000D000+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000D000+0x30))&0x100)==0x100) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000D000+0x30))&0x01)==0x01)&&(((per.l(ad:0x7000D000+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" else group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" endif group.long 0x34++0x07 line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds" bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT ,Reset Slave state machine on time-out" "Disabled,Enabled" bitfld.long 0x00 26. " TLOW_MEXT_EN ,Enable TLOW_MEXT counter" "Disabled,Enabled" bitfld.long 0x00 25. " TLOW_SEXT_EN ,Enable TLOW_SEXT counter" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TIMEOUT_EN ,Enable TIMEOUT counter" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " TLOW_MEXT ,Cumulative clock low extend time (transfer period)" hexmask.long.byte 0x00 8.--15. 1. " TLOW_SEXT ,Cumulative clock low extend time (complete transfer)" textline " " hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT ,Clock low timeout period in milliseconds" group.long 0x3C++0x07 line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count" hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT ,Timing between address-data cycles or data-data cycles" line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask" bitfld.long 0x04 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled" bitfld.long 0x04 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled" bitfld.long 0x04 5. " RST_SL ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " END_TRANS ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled" bitfld.long 0x04 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled" bitfld.long 0x04 2. " RCVD ,RCVD (Transaction received) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ZA ,ZA (Zero address) Mask" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" group.long 0x48++0x03 line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" tree "Packet Mode" width 29. group.long 0x50++0x0F line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO" rgroup.long 0x54++0x07 line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data" line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,The packet transfer for which last packet is set has been completed" "Unset,Set" hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" textline " " hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" bitfld.long 0x04 3. " NOACK_FOR_ADDR ,No ACK received for the address byte" "ACK,No ACK" textline " " bitfld.long 0x04 2. " NOACK_FOR_DATA ,No ACK received for the data byte" "ACK,No ACK" bitfld.long 0x04 1. " ARB_LOST ,Arbitration lost for the current byte" "Not lost,Lost" textline " " bitfld.long 0x04 0. " CONTROLLER_BUSY ,Controller is busy" "Not busy,Busy" group.long 0x5C++0x03 line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register" bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG ,Slave Transmit FIFO trigger" "1 word,2 words,?..." bitfld.long 0x00 10.--12. " SLV_RX_FIFO_TRIG ,Slave Receive FIFO trigger" "1 word,2 words,?..." textline " " bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 8. " SLV_RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" textline " " bitfld.long 0x00 5.--7. " TX_FIFO_TRIG ,Transmit FIFO trigger level" "1 word,2 words,?..." bitfld.long 0x00 2.--4. " RX_FIFO_TRIG ,Receive FIFO trigger level" "1 word,2 words,?..." textline " " bitfld.long 0x00 1. " TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 0. " RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" rgroup.long 0x60++0x03 line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register" bitfld.long 0x00 25. " SLV_XFER_ERR_REASON ,Nature of the packet transfer error" "Terminated before end,Not terminated" bitfld.long 0x00 20.--23. " SLV_TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..." bitfld.long 0x00 4.--7. " TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..." textline " " group.long 0x64++0x03 line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " SLV_RD2WR_INT_EN ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SLV_WR2RD_INT_EN ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR_INT_EN ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " SLV_TFIFO_OVF_REQ_INT_EN ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ_INT_EN ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " BUS_CLEAR_DONE_INT_EN ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TIMEOUT_INT_EN ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TFIFO_OVF_INT_EN ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFIFO_UNF_INT_EN ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NOACK_INT_EN ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARB_LOST_INT_EN ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFIFO_DATA_REQ_INT_EN ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register" eventfld.long 0x00 28. " SLV_ACK_WITHHELD ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt" eventfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr" "No interrupt,Interrupt" textline " " eventfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd" "No interrupt,Interrupt" eventfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Request error" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty" "No interrupt,Interrupt" else eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full" "No interrupt,Interrupt" endif eventfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "No interrupt,Interrupt" eventfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 20. " SLV_RFIFO_UN ,Slave RX FIFO underflow" "No interrupt,Interrupt" rbitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data request" "No interrupt,Interrupt" eventfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done status" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "No interrupt,Interrupt" else eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,SMBUS sext time-out" "No interrupt,Interrupt" endif textline " " eventfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "No interrupt,Interrupt" eventfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "No interrupt,Interrupt" eventfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 3. " NOACK ,No ACK from slave" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "No interrupt,Interrupt" rbitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request" "No interrupt,Interrupt" group.long 0x6C++0x03 line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register" hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE ,Divisor - fast mode" hexmask.long.word 0x00 0.--15. 1. " I2C_CLK_DIVISOR_HSMODE ,Divisor - high speed mode" rgroup.long 0x70++0x03 line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source" "Unset,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "Unset,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "Unset,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave xfer - source" "Unset,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "Unset,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "Unset,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "Unset,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "Unset,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave RX FIFO data request - source" "Unset,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "Unset,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "Unset,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "Unset,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "Unset,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "Unset,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "Unset,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "Unset,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "Unset,Set" bitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request - source" "Unset,Set" group.long 0x74++0x07 line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source - source" "No effect,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "No effect,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "No effect,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave XFER - source" "No effect,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "No effect,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "No effect,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "No effect,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "No effect,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "No effect,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "No effect,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "No effect,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "No effect,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "No effect,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "No effect,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "No effect,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "No effect,Set" line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO" rgroup.long 0x7C++0x07 line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO" line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status" bitfld.long 0x04 25. " ACK_WITHHELD ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,All the packets have been transferred successfully" "Not completed,Completed" textline " " hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,Current packet ID for which the transaction is happening" hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,Number of bytes transferred in the current packet" group.long 0x84++0x03 line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure" hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD ,Send the clock pulses until this threshold is met" bitfld.long 0x00 2. " BC_STOP_COND ,Bus clear operation" "No stopped,Stopped" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE" else bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD" endif bitfld.long 0x00 0. " BC_ENABLE ,Starts bus clear operation" "Disabled,Enabled" rgroup.long 0x88++0x03 line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status" bitfld.long 0x00 0. " BC_STATUS ,Bus clear" "Not cleared,Cleared" group.long 0x8C++0x03 line.long 0x00 "CONFIG_LOAD_0,Spare Register" bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD ,Loads the timeout configuration" "Disabled,Enabled" bitfld.long 0x00 1. " SLV_CONFIG_LOAD ,Loads the slave configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSTR_CONFIG_LOAD ,Loads the master configuration" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0x90++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0" bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on" bitfld.long 0x00 3. " I2C_SLV_HIF_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on" textline " " bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on" bitfld.long 0x00 0. " I2C_MST_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on" endif group.long 0x94++0x0F line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0" bitfld.long 0x00 8.--13. " THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1" bitfld.long 0x04 24.--29. " TBUF ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8.--13. " THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0" bitfld.long 0x08 8.--13. " HS_THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " HS_TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1" bitfld.long 0x0C 16.--21. " HS_TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " HS_THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--5. " HS_TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif !cpuis("TEGRAX1") group.long 0xA8++0x07 line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" endif tree.end width 0x0B tree.end tree "I2C6" base ad:0x7000D100 width 20. if (((per.l(ad:0x7000D100))&0x10)==0x10) group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " CMD2 ,Read/Write Command for Slave 2" "Write,Read" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" else group.long 0x00++0x03 line.long 0x00 "CNFG_0,IC Controller Configuration Register" sif cpuis("TEGRAX1") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Disabled,Enabled" textline " " elif cpuis("TEGRAX2") bitfld.long 0x00 17. " MULTI_MASTER_MODE ,Select single or multi master mode" "Single,Multi" bitfld.long 0x00 16. " HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT ,I2C master force clock low on timeout" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DEBOUNCE_CNT ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T" textline " " bitfld.long 0x00 11. " NEW_MASTER_FSM ,Maintained for compatibility sake" "Disabled,Enabled" bitfld.long 0x00 10. " PACKET_MODE_EN ,Initiate transfer in packet mode" "NOP,GO" bitfld.long 0x00 9. " SEND ,Master initiates the transaction in normal mode" "NOP,GO" textline " " bitfld.long 0x00 8. " NOACK ,No ACK mode enable" "Disabled,Enabled" bitfld.long 0x00 6. " CMD1 ,Read/Write Command for Slave 1" "Write,Read" textline " " bitfld.long 0x00 5. " START ,Send Start byte" "Disabled,Enabled" bitfld.long 0x00 4. " SLV2 ,Enables a two slave transaction" "Disabled,Enabled" bitfld.long 0x00 1.--3. " LENGTH ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes" textline " " bitfld.long 0x00 0. " A_MOD ,7-bit or a 10-bit slave address" "7-bit address,10-bit address" endif if (((per.l(ad:0x7000D100))&0x01)==0x01) group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.word 0x00 0.--9. 1. " ADDR0 ,I2C Slave-1 Address" line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.word 0x04 0.--9. 1. " ADDR1 ,I2C Slave-2 Address" else group.long 0x04++0x07 line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address" hexmask.long.byte 0x00 1.--7. 1. " ADDR0 ,I2C Slave-1 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x00 0. " CMD_ADDR0[0] ,Indicates read/write transaction" "Write,Read" endif line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address" hexmask.long.byte 0x04 1.--7. 1. " ADDR1 ,I2C Slave-2 Address" sif (cpuis("TEGRAX1")||cpuis("TEGRAX2")) textline " " bitfld.long 0x04 0. " CMD_ADDR1[0] ,Indicates read/write transaction" "Write,Read" endif endif group.long 0x0C++0x07 line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive" hexmask.long.byte 0x00 24.--31. 1. " DATA4 ,Fourth data byte to be sent/received" hexmask.long.byte 0x00 16.--23. 1. " DATA3 ,Third data byte to be sent/received" hexmask.long.byte 0x00 8.--15. 1. " DATA2 ,Second data byte to be sent/received" textline " " hexmask.long.byte 0x00 0.--7. 1. " DATA1 ,First data byte to be sent/received" line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive" hexmask.long.byte 0x04 24.--31. 1. " DATA8 ,Eighth data byte to be sent/received" hexmask.long.byte 0x04 16.--23. 1. " DATA7 ,Seventh data byte to be sent/received" hexmask.long.byte 0x04 8.--15. 1. " DATA6 ,Sixth data byte to be sent/received" textline " " hexmask.long.byte 0x04 0.--7. 1. " DATA5 ,Fifth data byte to be sent/received" rgroup.long 0x1C++0x03 line.long 0x00 "STATUS_0,I2C Controller Master Status" bitfld.long 0x00 8. " BUSY ,Master busy" "Not busy,Busy" bitfld.long 0x00 4.--7. " CMD2_STAT ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." bitfld.long 0x00 0.--3. " CMD1_STAT ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..." sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000D100+0x20))&0x100000)==0x100000) group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" textline " " bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif else group.long 0x20++0x03 line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration" bitfld.long 0x00 20. " FIFO_XFER_EN ,FIFO transfer enabled" "Disabled,Enabled" hexmask.long.word 0x00 8.--19. 1. " BUFFER_SIZE ,Payload size in bytes" bitfld.long 0x00 7. " ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ACK_LAST_BYTE ,ACK the last byte" "Disabled,Enabled" bitfld.long 0x00 5. " ACK_WITHHOLD_EN ,Ack withhold feature enable" "Disabled,Enabled" bitfld.long 0x00 4. " PKT_MODE_EN ,Packet mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ENABLE_SL ,Enable slave" "Disabled,Enabled" bitfld.long 0x00 2. " NEWSL ,Use new slave" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RESP ,Slave response to general call address" "Disabled,Enabled" endif group.long 0x24++0x03 line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data" hexmask.long.byte 0x00 0.--7. 1. " SL_DATA ,Slave received data" if (((per.l(ad:0x7000D100+0x28))&0x80)==0x80) group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR ,Hardware master address received via general call addressing" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" else group.long 0x28++0x03 line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status" textline " " bitfld.long 0x00 7. " HW_MSTR_INT ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt" bitfld.long 0x00 6. " REPROG_SL ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt" bitfld.long 0x00 5. " RST_SL ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " END_TRANS ,Slave Transaction complete" "Completed,In progress" bitfld.long 0x00 3. " SL_IRQ ,Interrupt generated by slave" "Not interrupt,Interrupt" bitfld.long 0x00 2. " RCVD ,New transaction received status" "Not occurred,Occurred" textline " " rbitfld.long 0x00 1. " RNW ,Slave transaction status" "Write,Read" bitfld.long 0x00 0. " ZA ,Zero address status" "No response,Response" endif group.long 0x2C++0x03 line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register" hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1 ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)" hexmask.long.byte 0x00 0.--7. 1. " SL_ADDR0 ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)" if (((per.l(ad:0x7000D100+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000D100+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000D100+0x30))&0x01)==0x00)&&(((per.l(ad:0x7000D100+0x30))&0x100)==0x100) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" elif (((per.l(ad:0x7000D100+0x30))&0x01)==0x01)&&(((per.l(ad:0x7000D100+0x30))&0x100)==0x00) group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" else group.long 0x30++0x07 line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register" bitfld.long 0x00 16. " SELECT_SLAVE ,Select slave" "ADDR0,ADDR1" bitfld.long 0x00 9.--10. " SL1_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 8. " SL1_VLD ,Addressing mode" "7bit,10bit" bitfld.long 0x00 1.--2. " SL_ADDR_HI ,Two most significant bits of the address" "00,01,10,11" textline " " bitfld.long 0x00 0. " VLD ,Addressing mode" "7bit,10bit" endif group.long 0x34++0x07 line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds" bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT ,Reset Slave state machine on time-out" "Disabled,Enabled" bitfld.long 0x00 26. " TLOW_MEXT_EN ,Enable TLOW_MEXT counter" "Disabled,Enabled" bitfld.long 0x00 25. " TLOW_SEXT_EN ,Enable TLOW_SEXT counter" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TIMEOUT_EN ,Enable TIMEOUT counter" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " TLOW_MEXT ,Cumulative clock low extend time (transfer period)" hexmask.long.byte 0x00 8.--15. 1. " TLOW_SEXT ,Cumulative clock low extend time (complete transfer)" textline " " hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT ,Clock low timeout period in milliseconds" group.long 0x3C++0x07 line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count" hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT ,Timing between address-data cycles or data-data cycles" line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask" bitfld.long 0x04 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled" bitfld.long 0x04 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled" bitfld.long 0x04 5. " RST_SL ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " END_TRANS ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled" bitfld.long 0x04 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled" bitfld.long 0x04 2. " RCVD ,RCVD (Transaction received) Mask" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ZA ,ZA (Zero address) Mask" "Disabled,Enabled" rgroup.long 0x44++0x03 line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" group.long 0x48++0x03 line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set" bitfld.long 0x00 7. " HW_MSTR_INT ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set" bitfld.long 0x00 6. " REPROG_SL ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set" bitfld.long 0x00 5. " RST_SL ,RST_SL (General Call Address is 0x06) Source" "Unset,Set" textline " " bitfld.long 0x00 4. " END_TRANS ,END_TRANS (Transaction complete) Source" "Unset,Set" bitfld.long 0x00 3. " SL_IRQ ,SL_IRQ (Interrupt generated) Source" "Unset,Set" bitfld.long 0x00 2. " RCVD ,RCVD (Transaction received) Source" "Unset,Set" textline " " bitfld.long 0x00 0. " ZA ,ZA (Zero address) Source" "Unset,Set" tree "Packet Mode" width 29. group.long 0x50++0x0F line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO" rgroup.long 0x54++0x07 line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data" line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,The packet transfer for which last packet is set has been completed" "Unset,Set" hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,The current packet ID for which the transaction is happening on the bus" textline " " hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,The number of bytes transferred in the current packet" bitfld.long 0x04 3. " NOACK_FOR_ADDR ,No ACK received for the address byte" "ACK,No ACK" textline " " bitfld.long 0x04 2. " NOACK_FOR_DATA ,No ACK received for the data byte" "ACK,No ACK" bitfld.long 0x04 1. " ARB_LOST ,Arbitration lost for the current byte" "Not lost,Lost" textline " " bitfld.long 0x04 0. " CONTROLLER_BUSY ,Controller is busy" "Not busy,Busy" group.long 0x5C++0x03 line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register" bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG ,Slave Transmit FIFO trigger" "1 word,2 words,?..." bitfld.long 0x00 10.--12. " SLV_RX_FIFO_TRIG ,Slave Receive FIFO trigger" "1 word,2 words,?..." textline " " bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 8. " SLV_RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" textline " " bitfld.long 0x00 5.--7. " TX_FIFO_TRIG ,Transmit FIFO trigger level" "1 word,2 words,?..." bitfld.long 0x00 2.--4. " RX_FIFO_TRIG ,Receive FIFO trigger level" "1 word,2 words,?..." textline " " bitfld.long 0x00 1. " TX_FIFO_FLUSH ,Flush the TX FIFO" "No effect,Flush" bitfld.long 0x00 0. " RX_FIFO_FLUSH ,Flush the RX FIFO" "No effect,Flush" rgroup.long 0x60++0x03 line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register" bitfld.long 0x00 25. " SLV_XFER_ERR_REASON ,Nature of the packet transfer error" "Terminated before end,Not terminated" bitfld.long 0x00 20.--23. " SLV_TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..." bitfld.long 0x00 4.--7. " TX_FIFO_EMPTY_CNT ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..." textline " " bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..." textline " " group.long 0x64++0x03 line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 27. " SLV_RD2WR_INT_EN ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " SLV_WR2RD_INT_EN ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR_INT_EN ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " SLV_TFIFO_OVF_REQ_INT_EN ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ_INT_EN ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 11. " BUS_CLEAR_DONE_INT_EN ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TIMEOUT_INT_EN ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TFIFO_OVF_INT_EN ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFIFO_UNF_INT_EN ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NOACK_INT_EN ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " ARB_LOST_INT_EN ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFIFO_DATA_REQ_INT_EN ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register" eventfld.long 0x00 28. " SLV_ACK_WITHHELD ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt" eventfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr" "No interrupt,Interrupt" textline " " eventfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd" "No interrupt,Interrupt" eventfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Request error" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty" "No interrupt,Interrupt" else eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full" "No interrupt,Interrupt" endif eventfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full" "No interrupt,Interrupt" textline " " eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete" "No interrupt,Interrupt" eventfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 20. " SLV_RFIFO_UN ,Slave RX FIFO underflow" "No interrupt,Interrupt" rbitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave Rx FIFO data request" "No interrupt,Interrupt" eventfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done status" "No interrupt,Interrupt" textline " " sif (cpuis("TEGRAX2")) eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out" "No interrupt,Interrupt" else eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN ,SMBUS mext time-out" "No interrupt,Interrupt" eventfld.long 0x00 9. " TLOW_SEXT_TIMEOUT_EN ,SMBUS sext time-out" "No interrupt,Interrupt" endif textline " " eventfld.long 0x00 8. " TIMEOUT ,SMBUS time-out" "No interrupt,Interrupt" eventfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully" "No interrupt,Interrupt" eventfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow" "No interrupt,Interrupt" textline " " eventfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow" "No interrupt,Interrupt" eventfld.long 0x00 3. " NOACK ,No ACK from slave" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " ARB_LOST ,Arbitration lost" "No interrupt,Interrupt" rbitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request" "No interrupt,Interrupt" group.long 0x6C++0x03 line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register" hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE ,Divisor - fast mode" hexmask.long.word 0x00 0.--15. 1. " I2C_CLK_DIVISOR_HSMODE ,Divisor - high speed mode" rgroup.long 0x70++0x03 line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source" "Unset,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "Unset,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "Unset,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave xfer - source" "Unset,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "Unset,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "Unset,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "Unset,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "Unset,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 17. " SLV_TFIFO_DATA_REQ ,Slave TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ ,Slave RX FIFO data request - source" "Unset,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "Unset,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "Unset,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "Unset,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "Unset,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "Unset,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "Unset,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "Unset,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "Unset,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "Unset,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "Unset,Set" bitfld.long 0x00 1. " TFIFO_DATA_REQ ,TX FIFO data request - source" "Unset,Set" textline " " bitfld.long 0x00 0. " RFIFO_DATA_REQ ,RX FIFO data request - source" "Unset,Set" group.long 0x74++0x07 line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register" bitfld.long 0x00 28. " SLV_ACK_WITHHELD ,Waiting for sw explicit info about ack - source - source" "No effect,Set" bitfld.long 0x00 27. " SLV_RD2WR ,Transaction switching from rd to wr - source" "No effect,Set" textline " " bitfld.long 0x00 26. " SLV_WR2RD ,Transaction switching from wr to rd - source" "No effect,Set" bitfld.long 0x00 25. " SLV_PKT_XFER_ERR ,Error occurred during slave XFER - source" "No effect,Set" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is empty - source" "No effect,Set" else bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ ,Slave TX buffer is full - source" "No effect,Set" endif bitfld.long 0x00 23. " SLV_RX_BUFFER_FILLED ,Slave RX buffer is full - source" "No effect,Set" textline " " bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE ,Slave packet transfer complete - source" "No effect,Set" bitfld.long 0x00 21. " SLV_TFIFO_OVF ,Slave TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 20. " SLV_RFIFO_UNF ,Slave RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 11. " BUS_CLEAR_DONE ,Bus clear done - source" "No effect,Set" textline " " bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT ,SMBUS mext time-out - source" "No effect,Set" bitfld.long 0x00 9. " TLOW_SEXT_TIMEOUT ,SMBUS sext time-out - source" "No effect,Set" textline " " bitfld.long 0x00 8. " TIMEOUT ,SMBUS time-out - source" "No effect,Set" bitfld.long 0x00 7. " PACKET_XFER_COMPLETE ,Packet has been transferred successfully - source" "No effect,Set" textline " " bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE ,All the packets transferred successfully - source" "No effect,Set" bitfld.long 0x00 5. " TFIFO_OVF ,TX FIFO overflow - source" "No effect,Set" textline " " bitfld.long 0x00 4. " RFIFO_UNF ,RX FIFO underflow - source" "No effect,Set" bitfld.long 0x00 3. " NOACK ,No ACK from slave - source" "No effect,Set" textline " " bitfld.long 0x00 2. " ARB_LOST ,Arbitration lost - source" "No effect,Set" line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO" rgroup.long 0x7C++0x07 line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO" line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status" bitfld.long 0x04 25. " ACK_WITHHELD ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld" bitfld.long 0x04 24. " TRANSFER_COMPLETE ,All the packets have been transferred successfully" "Not completed,Completed" textline " " hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID ,Current packet ID for which the transaction is happening" hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM ,Number of bytes transferred in the current packet" group.long 0x84++0x03 line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure" hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD ,Send the clock pulses until this threshold is met" bitfld.long 0x00 2. " BC_STOP_COND ,Bus clear operation" "No stopped,Stopped" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE" else bitfld.long 0x00 1. " BC_TERMINATE ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD" endif bitfld.long 0x00 0. " BC_ENABLE ,Starts bus clear operation" "Disabled,Enabled" rgroup.long 0x88++0x03 line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status" bitfld.long 0x00 0. " BC_STATUS ,Bus clear" "Not cleared,Cleared" group.long 0x8C++0x03 line.long 0x00 "CONFIG_LOAD_0,Spare Register" bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD ,Loads the timeout configuration" "Disabled,Enabled" bitfld.long 0x00 1. " SLV_CONFIG_LOAD ,Loads the slave configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSTR_CONFIG_LOAD ,Loads the master configuration" "Disabled,Enabled" sif (cpuis("TEGRAX2")) group.long 0x90++0x03 line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0" bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on" bitfld.long 0x00 3. " I2C_SLV_HIF_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on" textline " " bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on" bitfld.long 0x00 0. " I2C_MST_CORE_CLKEN_OVR ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on" endif group.long 0x94++0x0F line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0" bitfld.long 0x00 8.--13. " THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1" bitfld.long 0x04 24.--29. " TBUF ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 8.--13. " THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0" bitfld.long 0x08 8.--13. " HS_THIGH ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 0.--5. " HS_TLOW ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1" bitfld.long 0x0C 16.--21. " HS_TSU_STO ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " HS_THD_STA ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--5. " HS_TSU_STA ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" sif !cpuis("TEGRAX1") group.long 0xA8++0x07 line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register" bitfld.long 0x00 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register" bitfld.long 0x04 0. " SOFT_RESET ,Soft reset" "Cleared,Asserted" endif tree.end width 0x0B tree.end tree.end tree "UART Controller" tree "UART-A" base ad:0x70006000 width 15. if (((per.l((ad:0x70006000+0x0C)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register" in textline " " group.long 0x04++0x03 line.long 0x00 "IER_DLAB,Interrupt Enable Register" bitfld.long 0x00 5. " IE_EORD ,Interrupt enable for end of received data" "Disabled,Enabled" bitfld.long 0x00 4. " IE_RX_TIMEOUT ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled" bitfld.long 0x00 3. " IE_MSI ,Interrupt enable for modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IE_RXS ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " IE_THR ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " IE_RHR ,Interrupt enable for received data interrupt" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers" bitfld.long 0x00 6.--7. " EN_FIFO ,FIFO mode status" "Mode 16450,Mode 16550,?..." textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1.--3. " IS_PRI ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..." else bitfld.long 0x00 1.--3. " IS_PRI ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..." endif textline " " bitfld.long 0x00 0. " IS_STA ,Interrupt pending" "No interrupt,Interrupt" else group.long 0x00++0x07 line.long 0x00 "THR_DLAB,UART Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DLL_A ,Divisor latch LSB" line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register" hexmask.long.byte 0x04 0.--7. 1. " DLM_A ,Divisor latch MSB" wgroup.long 0x08++0x03 line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers" bitfld.long 0x00 6.--7. " RX_TRIG ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16" bitfld.long 0x00 4.--5. " TX_TRIG ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1" bitfld.long 0x00 3. " DMA ,DMA mode change" "No effect,Change" textline " " bitfld.long 0x00 2. " TX_CLR ,Clears the contents of the transmit FIFO" "No effect,Clear" bitfld.long 0x00 1. " RX_CLR ,Clears the contents of the receive FIFO" "No effect,Clear" bitfld.long 0x00 0. " FCR_EN_FIFO ,Enable the transmit and receive FIFO" "Disable,Enable" endif group.long 0x0C++0x07 line.long 0x00 "LCR,UART Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " SET_B ,Set BREAK condition" "No break,Break" bitfld.long 0x00 5. " SET_P ,Set parity to value in LCR" "No parity,Parity" bitfld.long 0x00 4. " EVEN ,Even parity format" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PAR ,Parity sent" "No parity,Parity" bitfld.long 0x00 2. " STOP ,Stop bits" "Disabled,Enabled" bitfld.long 0x00 0.--1. " WD_SIZE ,Word length" "5 bit,6 bit,7 bit,8 bit" line.long 0x04 "MCR,UART Modem Control Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x04 10. " OLD_SIR_DECODE ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled" bitfld.long 0x04 8.--9. " RI_POLARITY ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..." bitfld.long 0x04 7. " DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled" textline " " endif bitfld.long 0x04 6. " RTS_EN ,RTS hardware flow control enable" "Disabled,Enabled" bitfld.long 0x04 5. " CTS_EN ,CTS hardware flow control enable" "Disabled,Enabled" bitfld.long 0x04 4. " LOOPBK ,Internal loop back enable" "Disabled,Enabled" bitfld.long 0x04 1. " RTS ,Force RTS" "Force hi,Force low" textline " " bitfld.long 0x04 0. " DTR ,Force DTR" "Force hi,Force low" rgroup.long 0x14++0x03 line.long 0x00 "LSR,UART Line Status Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 9. " RX_FIFO_EMPTY ,Receiver FIFO status" "Not empty,Empty" textline " " endif bitfld.long 0x00 8. " TX_FIFO_FULL ,Transmitter FIFO full status" "Not full,Full" bitfld.long 0x00 7. " FIFOE ,Receive FIFO error" "No error,Error" bitfld.long 0x00 6. " TMTY ,Transmit shift reg empty status" "Not empty,Empty" bitfld.long 0x00 5. " THRE ,Transmit holding register is empty" "Full,Empty" textline " " bitfld.long 0x00 4. " BRK ,BREAK condition detected on line" "No break,Break" bitfld.long 0x00 3. " FERR ,Framing error" "No error,Error" bitfld.long 0x00 2. " PERR ,Parity error" "No error,Error" bitfld.long 0x00 1. " OVRF ,Receiver overrun error" "No error,Error" textline " " bitfld.long 0x00 0. " RDR ,Receiver data ready" "No data in FIFO,Data in FIFO" group.long 0x18++0x13 line.long 0x00 "MSR,UART Modem Status Register" bitfld.long 0x00 7. " CD ,State of carrier detect pin" "Disabled,Enabled" bitfld.long 0x00 6. " RI ,State of ring indicator pin" "Disabled,Enabled" bitfld.long 0x00 5. " DSR ,State of data set ready pin" "Disabled,Enabled" bitfld.long 0x00 4. " CTS ,State of clear to send pin" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DCD ,Change (Delta) in CD state detected" "Disabled,Enabled" bitfld.long 0x00 2. " DRI ,Change (Delta) in RI state detected" "Disabled,Enabled" bitfld.long 0x00 1. " DDSR ,Change (Delta) in DSR state detected" "Disabled,Enabled" bitfld.long 0x00 0. " DCTS ,Change (Delta) in CTS state detected" "Disabled,Enabled" line.long 0x04 "SPR,UART Scratch Pad Register" hexmask.long.byte 0x04 0.--7. 1. " SPR_A ,Scratch pad" line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register" bitfld.long 0x08 7. " SIR_A ,Enable SIR coder" "Disabled,Enabled" bitfld.long 0x08 6. " PWT_A ,Baud pulse" "3/16,4/16" bitfld.long 0x08 3. " INVERT_RTS ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " INVERT_CTS ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled" bitfld.long 0x08 1. " INVERT_TXD ,Inverts the normally inactive high TXD pin" "Disabled,Enabled" bitfld.long 0x08 0. " INVERT_RXD ,Inverts the normally inactive high RXD pin" "Disabled,Enabled" line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register" bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled" bitfld.long 0x0C 0.--5. " RX_FIFO_TRIG ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x10 "MIE,UART Modem Interrupt Enable Register" bitfld.long 0x10 3. " DCD_INT_EN ,Interrupt enable for change in CD state detected" "Disabled,Enabled" bitfld.long 0x10 2. " DRI_INT_EN ,Interrupt enable for change in RI state detected" "Disabled,Enabled" bitfld.long 0x10 1. " DDSR_INT_EN ,Interrupt enable for change in DSR state detected" "Disabled,Enabled" bitfld.long 0x10 0. " DCTS_INT_EN ,Interrupt enable for change in CTS state detected" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "VENDOR_STATUS,UART Controller Status Register" bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 3. " TX_OVERRUN ,TX FIFO overrun" "No overrun,Overrun" bitfld.long 0x00 2. " RX_OVERRUN ,RX FIFO overrun" "No overrun,Overrun" textline " " sif cpuis("TEGRAX1") bitfld.long 0x00 1. " UART_RX_IDLE ,RX path idle status" "Busy,Idle" bitfld.long 0x00 0. " UART_TX_IDLE ,TX path idle status" "Busy,Idle" endif group.long 0x3C++0x03 line.long 0x00 "UART_ASR,UART Auto Sense Baud Register" bitfld.long 0x00 31. " VALID ,Counting the clocks between two successive clock edges finished" "Not finished,Finished" bitfld.long 0x00 30. " BUSY ,ASR busy" "Idle,Busy" hexmask.long.byte 0x00 8.--15. 1. " RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges" hexmask.long.byte 0x00 0.--7. 1. " RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges" width 0x0B tree.end tree "UART-B" base ad:0x70006040 width 15. if (((per.l((ad:0x70006040+0x0C)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register" in textline " " group.long 0x04++0x03 line.long 0x00 "IER_DLAB,Interrupt Enable Register" bitfld.long 0x00 5. " IE_EORD ,Interrupt enable for end of received data" "Disabled,Enabled" bitfld.long 0x00 4. " IE_RX_TIMEOUT ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled" bitfld.long 0x00 3. " IE_MSI ,Interrupt enable for modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IE_RXS ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " IE_THR ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " IE_RHR ,Interrupt enable for received data interrupt" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers" bitfld.long 0x00 6.--7. " EN_FIFO ,FIFO mode status" "Mode 16450,Mode 16550,?..." textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1.--3. " IS_PRI ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..." else bitfld.long 0x00 1.--3. " IS_PRI ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..." endif textline " " bitfld.long 0x00 0. " IS_STA ,Interrupt pending" "No interrupt,Interrupt" else group.long 0x00++0x07 line.long 0x00 "THR_DLAB,UART Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DLL_A ,Divisor latch LSB" line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register" hexmask.long.byte 0x04 0.--7. 1. " DLM_A ,Divisor latch MSB" wgroup.long 0x08++0x03 line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers" bitfld.long 0x00 6.--7. " RX_TRIG ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16" bitfld.long 0x00 4.--5. " TX_TRIG ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1" bitfld.long 0x00 3. " DMA ,DMA mode change" "No effect,Change" textline " " bitfld.long 0x00 2. " TX_CLR ,Clears the contents of the transmit FIFO" "No effect,Clear" bitfld.long 0x00 1. " RX_CLR ,Clears the contents of the receive FIFO" "No effect,Clear" bitfld.long 0x00 0. " FCR_EN_FIFO ,Enable the transmit and receive FIFO" "Disable,Enable" endif group.long 0x0C++0x07 line.long 0x00 "LCR,UART Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " SET_B ,Set BREAK condition" "No break,Break" bitfld.long 0x00 5. " SET_P ,Set parity to value in LCR" "No parity,Parity" bitfld.long 0x00 4. " EVEN ,Even parity format" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PAR ,Parity sent" "No parity,Parity" bitfld.long 0x00 2. " STOP ,Stop bits" "Disabled,Enabled" bitfld.long 0x00 0.--1. " WD_SIZE ,Word length" "5 bit,6 bit,7 bit,8 bit" line.long 0x04 "MCR,UART Modem Control Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x04 10. " OLD_SIR_DECODE ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled" bitfld.long 0x04 8.--9. " RI_POLARITY ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..." bitfld.long 0x04 7. " DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled" textline " " endif bitfld.long 0x04 6. " RTS_EN ,RTS hardware flow control enable" "Disabled,Enabled" bitfld.long 0x04 5. " CTS_EN ,CTS hardware flow control enable" "Disabled,Enabled" bitfld.long 0x04 4. " LOOPBK ,Internal loop back enable" "Disabled,Enabled" bitfld.long 0x04 1. " RTS ,Force RTS" "Force hi,Force low" textline " " bitfld.long 0x04 0. " DTR ,Force DTR" "Force hi,Force low" rgroup.long 0x14++0x03 line.long 0x00 "LSR,UART Line Status Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 9. " RX_FIFO_EMPTY ,Receiver FIFO status" "Not empty,Empty" textline " " endif bitfld.long 0x00 8. " TX_FIFO_FULL ,Transmitter FIFO full status" "Not full,Full" bitfld.long 0x00 7. " FIFOE ,Receive FIFO error" "No error,Error" bitfld.long 0x00 6. " TMTY ,Transmit shift reg empty status" "Not empty,Empty" bitfld.long 0x00 5. " THRE ,Transmit holding register is empty" "Full,Empty" textline " " bitfld.long 0x00 4. " BRK ,BREAK condition detected on line" "No break,Break" bitfld.long 0x00 3. " FERR ,Framing error" "No error,Error" bitfld.long 0x00 2. " PERR ,Parity error" "No error,Error" bitfld.long 0x00 1. " OVRF ,Receiver overrun error" "No error,Error" textline " " bitfld.long 0x00 0. " RDR ,Receiver data ready" "No data in FIFO,Data in FIFO" group.long 0x18++0x13 line.long 0x00 "MSR,UART Modem Status Register" bitfld.long 0x00 7. " CD ,State of carrier detect pin" "Disabled,Enabled" bitfld.long 0x00 6. " RI ,State of ring indicator pin" "Disabled,Enabled" bitfld.long 0x00 5. " DSR ,State of data set ready pin" "Disabled,Enabled" bitfld.long 0x00 4. " CTS ,State of clear to send pin" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DCD ,Change (Delta) in CD state detected" "Disabled,Enabled" bitfld.long 0x00 2. " DRI ,Change (Delta) in RI state detected" "Disabled,Enabled" bitfld.long 0x00 1. " DDSR ,Change (Delta) in DSR state detected" "Disabled,Enabled" bitfld.long 0x00 0. " DCTS ,Change (Delta) in CTS state detected" "Disabled,Enabled" line.long 0x04 "SPR,UART Scratch Pad Register" hexmask.long.byte 0x04 0.--7. 1. " SPR_A ,Scratch pad" line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register" bitfld.long 0x08 7. " SIR_A ,Enable SIR coder" "Disabled,Enabled" bitfld.long 0x08 6. " PWT_A ,Baud pulse" "3/16,4/16" bitfld.long 0x08 3. " INVERT_RTS ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " INVERT_CTS ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled" bitfld.long 0x08 1. " INVERT_TXD ,Inverts the normally inactive high TXD pin" "Disabled,Enabled" bitfld.long 0x08 0. " INVERT_RXD ,Inverts the normally inactive high RXD pin" "Disabled,Enabled" line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register" bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled" bitfld.long 0x0C 0.--5. " RX_FIFO_TRIG ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x10 "MIE,UART Modem Interrupt Enable Register" bitfld.long 0x10 3. " DCD_INT_EN ,Interrupt enable for change in CD state detected" "Disabled,Enabled" bitfld.long 0x10 2. " DRI_INT_EN ,Interrupt enable for change in RI state detected" "Disabled,Enabled" bitfld.long 0x10 1. " DDSR_INT_EN ,Interrupt enable for change in DSR state detected" "Disabled,Enabled" bitfld.long 0x10 0. " DCTS_INT_EN ,Interrupt enable for change in CTS state detected" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "VENDOR_STATUS,UART Controller Status Register" bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 3. " TX_OVERRUN ,TX FIFO overrun" "No overrun,Overrun" bitfld.long 0x00 2. " RX_OVERRUN ,RX FIFO overrun" "No overrun,Overrun" textline " " sif cpuis("TEGRAX1") bitfld.long 0x00 1. " UART_RX_IDLE ,RX path idle status" "Busy,Idle" bitfld.long 0x00 0. " UART_TX_IDLE ,TX path idle status" "Busy,Idle" endif group.long 0x3C++0x03 line.long 0x00 "UART_ASR,UART Auto Sense Baud Register" bitfld.long 0x00 31. " VALID ,Counting the clocks between two successive clock edges finished" "Not finished,Finished" bitfld.long 0x00 30. " BUSY ,ASR busy" "Idle,Busy" hexmask.long.byte 0x00 8.--15. 1. " RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges" hexmask.long.byte 0x00 0.--7. 1. " RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges" width 0x0B tree.end tree "UART-C" base ad:0x70006200 width 15. if (((per.l((ad:0x70006200+0x0C)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register" in textline " " group.long 0x04++0x03 line.long 0x00 "IER_DLAB,Interrupt Enable Register" bitfld.long 0x00 5. " IE_EORD ,Interrupt enable for end of received data" "Disabled,Enabled" bitfld.long 0x00 4. " IE_RX_TIMEOUT ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled" bitfld.long 0x00 3. " IE_MSI ,Interrupt enable for modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IE_RXS ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " IE_THR ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " IE_RHR ,Interrupt enable for received data interrupt" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers" bitfld.long 0x00 6.--7. " EN_FIFO ,FIFO mode status" "Mode 16450,Mode 16550,?..." textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1.--3. " IS_PRI ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..." else bitfld.long 0x00 1.--3. " IS_PRI ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..." endif textline " " bitfld.long 0x00 0. " IS_STA ,Interrupt pending" "No interrupt,Interrupt" else group.long 0x00++0x07 line.long 0x00 "THR_DLAB,UART Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DLL_A ,Divisor latch LSB" line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register" hexmask.long.byte 0x04 0.--7. 1. " DLM_A ,Divisor latch MSB" wgroup.long 0x08++0x03 line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers" bitfld.long 0x00 6.--7. " RX_TRIG ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16" bitfld.long 0x00 4.--5. " TX_TRIG ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1" bitfld.long 0x00 3. " DMA ,DMA mode change" "No effect,Change" textline " " bitfld.long 0x00 2. " TX_CLR ,Clears the contents of the transmit FIFO" "No effect,Clear" bitfld.long 0x00 1. " RX_CLR ,Clears the contents of the receive FIFO" "No effect,Clear" bitfld.long 0x00 0. " FCR_EN_FIFO ,Enable the transmit and receive FIFO" "Disable,Enable" endif group.long 0x0C++0x07 line.long 0x00 "LCR,UART Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " SET_B ,Set BREAK condition" "No break,Break" bitfld.long 0x00 5. " SET_P ,Set parity to value in LCR" "No parity,Parity" bitfld.long 0x00 4. " EVEN ,Even parity format" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PAR ,Parity sent" "No parity,Parity" bitfld.long 0x00 2. " STOP ,Stop bits" "Disabled,Enabled" bitfld.long 0x00 0.--1. " WD_SIZE ,Word length" "5 bit,6 bit,7 bit,8 bit" line.long 0x04 "MCR,UART Modem Control Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x04 10. " OLD_SIR_DECODE ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled" bitfld.long 0x04 8.--9. " RI_POLARITY ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..." bitfld.long 0x04 7. " DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled" textline " " endif bitfld.long 0x04 6. " RTS_EN ,RTS hardware flow control enable" "Disabled,Enabled" bitfld.long 0x04 5. " CTS_EN ,CTS hardware flow control enable" "Disabled,Enabled" bitfld.long 0x04 4. " LOOPBK ,Internal loop back enable" "Disabled,Enabled" bitfld.long 0x04 1. " RTS ,Force RTS" "Force hi,Force low" textline " " bitfld.long 0x04 0. " DTR ,Force DTR" "Force hi,Force low" rgroup.long 0x14++0x03 line.long 0x00 "LSR,UART Line Status Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 9. " RX_FIFO_EMPTY ,Receiver FIFO status" "Not empty,Empty" textline " " endif bitfld.long 0x00 8. " TX_FIFO_FULL ,Transmitter FIFO full status" "Not full,Full" bitfld.long 0x00 7. " FIFOE ,Receive FIFO error" "No error,Error" bitfld.long 0x00 6. " TMTY ,Transmit shift reg empty status" "Not empty,Empty" bitfld.long 0x00 5. " THRE ,Transmit holding register is empty" "Full,Empty" textline " " bitfld.long 0x00 4. " BRK ,BREAK condition detected on line" "No break,Break" bitfld.long 0x00 3. " FERR ,Framing error" "No error,Error" bitfld.long 0x00 2. " PERR ,Parity error" "No error,Error" bitfld.long 0x00 1. " OVRF ,Receiver overrun error" "No error,Error" textline " " bitfld.long 0x00 0. " RDR ,Receiver data ready" "No data in FIFO,Data in FIFO" group.long 0x18++0x13 line.long 0x00 "MSR,UART Modem Status Register" bitfld.long 0x00 7. " CD ,State of carrier detect pin" "Disabled,Enabled" bitfld.long 0x00 6. " RI ,State of ring indicator pin" "Disabled,Enabled" bitfld.long 0x00 5. " DSR ,State of data set ready pin" "Disabled,Enabled" bitfld.long 0x00 4. " CTS ,State of clear to send pin" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DCD ,Change (Delta) in CD state detected" "Disabled,Enabled" bitfld.long 0x00 2. " DRI ,Change (Delta) in RI state detected" "Disabled,Enabled" bitfld.long 0x00 1. " DDSR ,Change (Delta) in DSR state detected" "Disabled,Enabled" bitfld.long 0x00 0. " DCTS ,Change (Delta) in CTS state detected" "Disabled,Enabled" line.long 0x04 "SPR,UART Scratch Pad Register" hexmask.long.byte 0x04 0.--7. 1. " SPR_A ,Scratch pad" line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register" bitfld.long 0x08 7. " SIR_A ,Enable SIR coder" "Disabled,Enabled" bitfld.long 0x08 6. " PWT_A ,Baud pulse" "3/16,4/16" bitfld.long 0x08 3. " INVERT_RTS ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " INVERT_CTS ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled" bitfld.long 0x08 1. " INVERT_TXD ,Inverts the normally inactive high TXD pin" "Disabled,Enabled" bitfld.long 0x08 0. " INVERT_RXD ,Inverts the normally inactive high RXD pin" "Disabled,Enabled" line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register" bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled" bitfld.long 0x0C 0.--5. " RX_FIFO_TRIG ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x10 "MIE,UART Modem Interrupt Enable Register" bitfld.long 0x10 3. " DCD_INT_EN ,Interrupt enable for change in CD state detected" "Disabled,Enabled" bitfld.long 0x10 2. " DRI_INT_EN ,Interrupt enable for change in RI state detected" "Disabled,Enabled" bitfld.long 0x10 1. " DDSR_INT_EN ,Interrupt enable for change in DSR state detected" "Disabled,Enabled" bitfld.long 0x10 0. " DCTS_INT_EN ,Interrupt enable for change in CTS state detected" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "VENDOR_STATUS,UART Controller Status Register" bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 3. " TX_OVERRUN ,TX FIFO overrun" "No overrun,Overrun" bitfld.long 0x00 2. " RX_OVERRUN ,RX FIFO overrun" "No overrun,Overrun" textline " " sif cpuis("TEGRAX1") bitfld.long 0x00 1. " UART_RX_IDLE ,RX path idle status" "Busy,Idle" bitfld.long 0x00 0. " UART_TX_IDLE ,TX path idle status" "Busy,Idle" endif group.long 0x3C++0x03 line.long 0x00 "UART_ASR,UART Auto Sense Baud Register" bitfld.long 0x00 31. " VALID ,Counting the clocks between two successive clock edges finished" "Not finished,Finished" bitfld.long 0x00 30. " BUSY ,ASR busy" "Idle,Busy" hexmask.long.byte 0x00 8.--15. 1. " RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges" hexmask.long.byte 0x00 0.--7. 1. " RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges" width 0x0B tree.end tree "UART-D" base ad:0x70006300 width 15. if (((per.l((ad:0x70006300+0x0C)))&0x80)==0x00) hgroup.long 0x00++0x03 hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register" in textline " " group.long 0x04++0x03 line.long 0x00 "IER_DLAB,Interrupt Enable Register" bitfld.long 0x00 5. " IE_EORD ,Interrupt enable for end of received data" "Disabled,Enabled" bitfld.long 0x00 4. " IE_RX_TIMEOUT ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled" bitfld.long 0x00 3. " IE_MSI ,Interrupt enable for modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IE_RXS ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " IE_THR ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " IE_RHR ,Interrupt enable for received data interrupt" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers" bitfld.long 0x00 6.--7. " EN_FIFO ,FIFO mode status" "Mode 16450,Mode 16550,?..." textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 1.--3. " IS_PRI ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..." else bitfld.long 0x00 1.--3. " IS_PRI ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..." endif textline " " bitfld.long 0x00 0. " IS_STA ,Interrupt pending" "No interrupt,Interrupt" else group.long 0x00++0x07 line.long 0x00 "THR_DLAB,UART Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DLL_A ,Divisor latch LSB" line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register" hexmask.long.byte 0x04 0.--7. 1. " DLM_A ,Divisor latch MSB" wgroup.long 0x08++0x03 line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers" bitfld.long 0x00 6.--7. " RX_TRIG ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16" bitfld.long 0x00 4.--5. " TX_TRIG ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1" bitfld.long 0x00 3. " DMA ,DMA mode change" "No effect,Change" textline " " bitfld.long 0x00 2. " TX_CLR ,Clears the contents of the transmit FIFO" "No effect,Clear" bitfld.long 0x00 1. " RX_CLR ,Clears the contents of the receive FIFO" "No effect,Clear" bitfld.long 0x00 0. " FCR_EN_FIFO ,Enable the transmit and receive FIFO" "Disable,Enable" endif group.long 0x0C++0x07 line.long 0x00 "LCR,UART Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " SET_B ,Set BREAK condition" "No break,Break" bitfld.long 0x00 5. " SET_P ,Set parity to value in LCR" "No parity,Parity" bitfld.long 0x00 4. " EVEN ,Even parity format" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PAR ,Parity sent" "No parity,Parity" bitfld.long 0x00 2. " STOP ,Stop bits" "Disabled,Enabled" bitfld.long 0x00 0.--1. " WD_SIZE ,Word length" "5 bit,6 bit,7 bit,8 bit" line.long 0x04 "MCR,UART Modem Control Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x04 10. " OLD_SIR_DECODE ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled" bitfld.long 0x04 8.--9. " RI_POLARITY ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..." bitfld.long 0x04 7. " DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled" textline " " endif bitfld.long 0x04 6. " RTS_EN ,RTS hardware flow control enable" "Disabled,Enabled" bitfld.long 0x04 5. " CTS_EN ,CTS hardware flow control enable" "Disabled,Enabled" bitfld.long 0x04 4. " LOOPBK ,Internal loop back enable" "Disabled,Enabled" bitfld.long 0x04 1. " RTS ,Force RTS" "Force hi,Force low" textline " " bitfld.long 0x04 0. " DTR ,Force DTR" "Force hi,Force low" rgroup.long 0x14++0x03 line.long 0x00 "LSR,UART Line Status Register" sif cpuis("TEGRAX1")||cpuis("TEGRAX2") bitfld.long 0x00 9. " RX_FIFO_EMPTY ,Receiver FIFO status" "Not empty,Empty" textline " " endif bitfld.long 0x00 8. " TX_FIFO_FULL ,Transmitter FIFO full status" "Not full,Full" bitfld.long 0x00 7. " FIFOE ,Receive FIFO error" "No error,Error" bitfld.long 0x00 6. " TMTY ,Transmit shift reg empty status" "Not empty,Empty" bitfld.long 0x00 5. " THRE ,Transmit holding register is empty" "Full,Empty" textline " " bitfld.long 0x00 4. " BRK ,BREAK condition detected on line" "No break,Break" bitfld.long 0x00 3. " FERR ,Framing error" "No error,Error" bitfld.long 0x00 2. " PERR ,Parity error" "No error,Error" bitfld.long 0x00 1. " OVRF ,Receiver overrun error" "No error,Error" textline " " bitfld.long 0x00 0. " RDR ,Receiver data ready" "No data in FIFO,Data in FIFO" group.long 0x18++0x13 line.long 0x00 "MSR,UART Modem Status Register" bitfld.long 0x00 7. " CD ,State of carrier detect pin" "Disabled,Enabled" bitfld.long 0x00 6. " RI ,State of ring indicator pin" "Disabled,Enabled" bitfld.long 0x00 5. " DSR ,State of data set ready pin" "Disabled,Enabled" bitfld.long 0x00 4. " CTS ,State of clear to send pin" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DCD ,Change (Delta) in CD state detected" "Disabled,Enabled" bitfld.long 0x00 2. " DRI ,Change (Delta) in RI state detected" "Disabled,Enabled" bitfld.long 0x00 1. " DDSR ,Change (Delta) in DSR state detected" "Disabled,Enabled" bitfld.long 0x00 0. " DCTS ,Change (Delta) in CTS state detected" "Disabled,Enabled" line.long 0x04 "SPR,UART Scratch Pad Register" hexmask.long.byte 0x04 0.--7. 1. " SPR_A ,Scratch pad" line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register" bitfld.long 0x08 7. " SIR_A ,Enable SIR coder" "Disabled,Enabled" bitfld.long 0x08 6. " PWT_A ,Baud pulse" "3/16,4/16" bitfld.long 0x08 3. " INVERT_RTS ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " INVERT_CTS ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled" bitfld.long 0x08 1. " INVERT_TXD ,Inverts the normally inactive high TXD pin" "Disabled,Enabled" bitfld.long 0x08 0. " INVERT_RXD ,Inverts the normally inactive high RXD pin" "Disabled,Enabled" line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register" bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled" bitfld.long 0x0C 0.--5. " RX_FIFO_TRIG ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x10 "MIE,UART Modem Interrupt Enable Register" bitfld.long 0x10 3. " DCD_INT_EN ,Interrupt enable for change in CD state detected" "Disabled,Enabled" bitfld.long 0x10 2. " DRI_INT_EN ,Interrupt enable for change in RI state detected" "Disabled,Enabled" bitfld.long 0x10 1. " DDSR_INT_EN ,Interrupt enable for change in DSR state detected" "Disabled,Enabled" bitfld.long 0x10 0. " DCTS_INT_EN ,Interrupt enable for change in CTS state detected" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "VENDOR_STATUS,UART Controller Status Register" bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 3. " TX_OVERRUN ,TX FIFO overrun" "No overrun,Overrun" bitfld.long 0x00 2. " RX_OVERRUN ,RX FIFO overrun" "No overrun,Overrun" textline " " sif cpuis("TEGRAX1") bitfld.long 0x00 1. " UART_RX_IDLE ,RX path idle status" "Busy,Idle" bitfld.long 0x00 0. " UART_TX_IDLE ,TX path idle status" "Busy,Idle" endif group.long 0x3C++0x03 line.long 0x00 "UART_ASR,UART Auto Sense Baud Register" bitfld.long 0x00 31. " VALID ,Counting the clocks between two successive clock edges finished" "Not finished,Finished" bitfld.long 0x00 30. " BUSY ,ASR busy" "Idle,Busy" hexmask.long.byte 0x00 8.--15. 1. " RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges" hexmask.long.byte 0x00 0.--7. 1. " RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges" width 0x0B tree.end tree.end tree "SPI Controller" tree "2B-1" base ad:0x7000D400 width 12. if (((per.l(ad:0x7000D400))&0x40000000)==(0x40000000)) if (((per.l(ad:0x7000D400))&0x1F)==(0x03||0x07||0x0F||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" else bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" endif textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little Endian Bit Enable" "Disabled,Enabled" else bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" endif textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif endif else sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000D400))&0x1F)==(0x3||0x7||0xF||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif else if (((per.l(ad:0x7000D400))&0x1F)==(0x7||0xF||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" ",,Extern pull-down,Extern pull-high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" ",,Extern pull-down,Extern pull-high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif endif endif if (((per.l(ad:0x7000D400))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "COMMAND2_0,SPI Command2 Register" bitfld.long 0x00 6.--11. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hgroup.long 0x04++0x03 hide.long 0x00 "COMMAND2_0,SPI Command2 Register (Useful only in Master Mode)" endif width 19. textline " " group.long 0x08++0x03 line.long 0x00 "TIMING_REG1_0,CS Timing1 Register" bitfld.long 0x00 28.--31. " CS_SETUP_TIME3 ,Specifies the setup time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 24.--27. " CS_HOLD_TIME3 ,Specifies the hold time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 20.--23. " CS_SETUP_TIME2 ,Specifies the setup time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" textline " " bitfld.long 0x00 16.--19. " CS_HOLD_TIME2 ,Specifies the hold time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 12.--15. " CS_SETUP_TIME1 ,Specifies the setup time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 8.--11. " CS_HOLD_TIME1 ,Specifies the hold time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" textline " " bitfld.long 0x00 4.--7. " CS_SETUP_TIME0 ,Specifies the setup time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 0.--3. " CS_HOLD_TIME0 ,Specifies the hold time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" if (((per.l(ad:0x7000D400+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x7000D400))&0x80000000)==0x00) group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2_0,CS Timing2 Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 24.--28. " CYCLES_BETWEEN_PACKETS3 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" textline " " bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" bitfld.long 0x00 8.--12. " CYCLES_BETWEEN_PACKETS1 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" else bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" endif line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.byte 0x04 16.--23. 1. " SLV_IDLE_COUNT ,Slave Continuous Mode" else group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2_0,CS Timing2 Register" bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 24.--28. " CYCLES_BETWEEN_PACKETS3 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" textline " " bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" bitfld.long 0x00 8.--12. " CYCLES_BETWEEN_PACKETS1 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.byte 0x04 16.--23. 1. " SLV_IDLE_COUNT ,Slave continuous mode" hexmask.long.word 0x04 0.--15. 1. " BLOCK_COUNT ,Counts the number of packets in a transaction" endif textline " " if (((per.l(ad:0x7000D400))&0x40000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register" bitfld.long 0x00 31. " CS_INACTIVE ,CS deasserted error" "No error,Error" textline " " bitfld.long 0x00 30. " FRAME_END ,Continuous mode is terminated" "No,Yes" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Indicates the number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Indicates the number of slots in the transmit FIFO" textline " " bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush Rx FIFO" "In progress,Finished" bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush Tx FIFO" "In progress,Finished" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" textline " " eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO overflow" "No error,Error" eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "No error,Error" rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" else group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 31. " CS_INACTIVE ,CS deasserted error" "No error,Error" endif textline " " bitfld.long 0x00 30. " FRAME_END ,Continuous mode is terminated" "No,Yes" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Number of slots in the transmit FIFO" textline " " bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush Rx FIFO" "In progress,Finished" bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush Tx FIFO" "In progress,Finished" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" textline " " eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO Overflow" "No error,Error" eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "No error,Error" rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" endif rgroup.long 0x18++0x07 line.long 0x00 "TX_DATA_0,Transmit Data Register" line.long 0x04 "RX_DATA_0,Receive Data Register" group.long 0x20++0x03 line.long 0x00 "DMA_CTL_0,DMA Control Register" bitfld.long 0x00 31. " DMA ,Enable DMA mode transfer" "Disabled,Enabled" bitfld.long 0x00 30. " CONST ,Enable continuous mode transfer" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 29. " PAUSE ,Pause feature enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 19.--20. " RX_TRIG ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words" bitfld.long 0x00 15.--16. " TX_TRIG ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words" sif (cpuis("TEGRAX2")) group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Size of data block to be transferred" else if (((per.l(ad:0x7000D400+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x7000D400))&0x80000000)==0x00) hgroup.long 0x24++0x03 hide.long 0x00 "DMA_BLK_SIZE_0,Block Size Register (Useful only in PIO or DMA mode)" else group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Size of data block to be transferred" endif endif group.long 0x108++0x03 line.long 0x00 "TX_FIFO_0,TX FIFO Buffer Register" group.long 0x188++0x03 line.long 0x00 "RX_FIFO_0,RX FIFO Buffer Register" if (((per.l(ad:0x7000D400))&0x40000000)==0x40000000) group.long 0x18C++0x0F line.long 0x00 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" else group.long 0x18C++0x0F line.long 0x00 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x00 31. " CS_INTR_MASK ,Interrupt enable mask bit for CS deassertion" "Disabled,Enabled" bitfld.long 0x00 30. " FRAME_END_INTR_MASK ,Interrupt enable mask bit for frame end" "Disabled,Enabled" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" endif sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000D400))&0x40000000)==0x40000000) group.long 0x18C++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x00 8.--15. 1. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" else group.long 0x18C++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" endif else if (((per.l(ad:0x7000D400))&0x40000000)==0x40000000) group.long 0x190++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" bitfld.long 0x00 8.--10. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7" else hgroup.long 0x190++0x03 hide.long 0x00 "SPARE_CTLR,Spare Control Register (Useful only in Master Mode)" endif endif sif (cpuis("TEGRAX2")) group.long 0x194++0x07 line.long 0x00 "MISC_0,Miscellaneous Register" bitfld.long 0x00 31. " CLKEN_OVERRIDE ,Override for spi_clk" "Gated,Not gated" bitfld.long 0x00 30. " EXT_CLK_EN ,External master clock gate" "Gated,Not gated" line.long 0x04 "FATAL_INTR_EN_0,Fatal Interrupt Enable Register" bitfld.long 0x04 31. " CS_FATAL_INTR_EN ,Fatal interrupt enable bit for CS deassert in Slave Mode" "Disabled,Enabled" bitfld.long 0x04 30. " FRAME_END_FATAL_INTR_EN ,Fatal interrupt enable for FRAME_END" "Disabled,Enabled" bitfld.long 0x04 28. " TX_FIFO_OVF_FATAL_INTR_EN ,Fatal interrupt enable for TX_FIFO_OVF" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " TX_FIFO_UNF_FATAL_INTR_EN ,Fatal interrupt enable for TX_FIFO_UNF" "Disabled,Enabled" bitfld.long 0x04 26. " RX_FIFO_OVF_FATAL_INTR_EN ,Fatal interrupt enable for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x04 25. " RX_FIFO_UNF_FATAL_INTR_EN ,Fatal interrupt enable for RX_FIFO_UNF" "Disabled,Enabled" endif width 0x0B tree.end tree "2B-2" base ad:0x7000D600 width 12. if (((per.l(ad:0x7000D600))&0x40000000)==(0x40000000)) if (((per.l(ad:0x7000D600))&0x1F)==(0x03||0x07||0x0F||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" else bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" endif textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little Endian Bit Enable" "Disabled,Enabled" else bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" endif textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif endif else sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000D600))&0x1F)==(0x3||0x7||0xF||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif else if (((per.l(ad:0x7000D600))&0x1F)==(0x7||0xF||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" ",,Extern pull-down,Extern pull-high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" ",,Extern pull-down,Extern pull-high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif endif endif if (((per.l(ad:0x7000D600))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "COMMAND2_0,SPI Command2 Register" bitfld.long 0x00 6.--11. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hgroup.long 0x04++0x03 hide.long 0x00 "COMMAND2_0,SPI Command2 Register (Useful only in Master Mode)" endif width 19. textline " " group.long 0x08++0x03 line.long 0x00 "TIMING_REG1_0,CS Timing1 Register" bitfld.long 0x00 28.--31. " CS_SETUP_TIME3 ,Specifies the setup time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 24.--27. " CS_HOLD_TIME3 ,Specifies the hold time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 20.--23. " CS_SETUP_TIME2 ,Specifies the setup time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" textline " " bitfld.long 0x00 16.--19. " CS_HOLD_TIME2 ,Specifies the hold time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 12.--15. " CS_SETUP_TIME1 ,Specifies the setup time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 8.--11. " CS_HOLD_TIME1 ,Specifies the hold time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" textline " " bitfld.long 0x00 4.--7. " CS_SETUP_TIME0 ,Specifies the setup time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 0.--3. " CS_HOLD_TIME0 ,Specifies the hold time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" if (((per.l(ad:0x7000D600+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x7000D600))&0x80000000)==0x00) group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2_0,CS Timing2 Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 24.--28. " CYCLES_BETWEEN_PACKETS3 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" textline " " bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" bitfld.long 0x00 8.--12. " CYCLES_BETWEEN_PACKETS1 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" else bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" endif line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.byte 0x04 16.--23. 1. " SLV_IDLE_COUNT ,Slave Continuous Mode" else group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2_0,CS Timing2 Register" bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 24.--28. " CYCLES_BETWEEN_PACKETS3 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" textline " " bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" bitfld.long 0x00 8.--12. " CYCLES_BETWEEN_PACKETS1 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.byte 0x04 16.--23. 1. " SLV_IDLE_COUNT ,Slave continuous mode" hexmask.long.word 0x04 0.--15. 1. " BLOCK_COUNT ,Counts the number of packets in a transaction" endif textline " " if (((per.l(ad:0x7000D600))&0x40000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register" bitfld.long 0x00 31. " CS_INACTIVE ,CS deasserted error" "No error,Error" textline " " bitfld.long 0x00 30. " FRAME_END ,Continuous mode is terminated" "No,Yes" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Indicates the number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Indicates the number of slots in the transmit FIFO" textline " " bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush Rx FIFO" "In progress,Finished" bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush Tx FIFO" "In progress,Finished" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" textline " " eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO overflow" "No error,Error" eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "No error,Error" rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" else group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 31. " CS_INACTIVE ,CS deasserted error" "No error,Error" endif textline " " bitfld.long 0x00 30. " FRAME_END ,Continuous mode is terminated" "No,Yes" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Number of slots in the transmit FIFO" textline " " bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush Rx FIFO" "In progress,Finished" bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush Tx FIFO" "In progress,Finished" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" textline " " eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO Overflow" "No error,Error" eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "No error,Error" rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" endif rgroup.long 0x18++0x07 line.long 0x00 "TX_DATA_0,Transmit Data Register" line.long 0x04 "RX_DATA_0,Receive Data Register" group.long 0x20++0x03 line.long 0x00 "DMA_CTL_0,DMA Control Register" bitfld.long 0x00 31. " DMA ,Enable DMA mode transfer" "Disabled,Enabled" bitfld.long 0x00 30. " CONST ,Enable continuous mode transfer" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 29. " PAUSE ,Pause feature enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 19.--20. " RX_TRIG ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words" bitfld.long 0x00 15.--16. " TX_TRIG ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words" sif (cpuis("TEGRAX2")) group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Size of data block to be transferred" else if (((per.l(ad:0x7000D600+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x7000D600))&0x80000000)==0x00) hgroup.long 0x24++0x03 hide.long 0x00 "DMA_BLK_SIZE_0,Block Size Register (Useful only in PIO or DMA mode)" else group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Size of data block to be transferred" endif endif group.long 0x108++0x03 line.long 0x00 "TX_FIFO_0,TX FIFO Buffer Register" group.long 0x188++0x03 line.long 0x00 "RX_FIFO_0,RX FIFO Buffer Register" if (((per.l(ad:0x7000D600))&0x40000000)==0x40000000) group.long 0x18C++0x0F line.long 0x00 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" else group.long 0x18C++0x0F line.long 0x00 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x00 31. " CS_INTR_MASK ,Interrupt enable mask bit for CS deassertion" "Disabled,Enabled" bitfld.long 0x00 30. " FRAME_END_INTR_MASK ,Interrupt enable mask bit for frame end" "Disabled,Enabled" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" endif sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000D600))&0x40000000)==0x40000000) group.long 0x18C++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x00 8.--15. 1. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" else group.long 0x18C++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" endif else if (((per.l(ad:0x7000D600))&0x40000000)==0x40000000) group.long 0x190++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" bitfld.long 0x00 8.--10. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7" else hgroup.long 0x190++0x03 hide.long 0x00 "SPARE_CTLR,Spare Control Register (Useful only in Master Mode)" endif endif sif (cpuis("TEGRAX2")) group.long 0x194++0x07 line.long 0x00 "MISC_0,Miscellaneous Register" bitfld.long 0x00 31. " CLKEN_OVERRIDE ,Override for spi_clk" "Gated,Not gated" bitfld.long 0x00 30. " EXT_CLK_EN ,External master clock gate" "Gated,Not gated" line.long 0x04 "FATAL_INTR_EN_0,Fatal Interrupt Enable Register" bitfld.long 0x04 31. " CS_FATAL_INTR_EN ,Fatal interrupt enable bit for CS deassert in Slave Mode" "Disabled,Enabled" bitfld.long 0x04 30. " FRAME_END_FATAL_INTR_EN ,Fatal interrupt enable for FRAME_END" "Disabled,Enabled" bitfld.long 0x04 28. " TX_FIFO_OVF_FATAL_INTR_EN ,Fatal interrupt enable for TX_FIFO_OVF" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " TX_FIFO_UNF_FATAL_INTR_EN ,Fatal interrupt enable for TX_FIFO_UNF" "Disabled,Enabled" bitfld.long 0x04 26. " RX_FIFO_OVF_FATAL_INTR_EN ,Fatal interrupt enable for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x04 25. " RX_FIFO_UNF_FATAL_INTR_EN ,Fatal interrupt enable for RX_FIFO_UNF" "Disabled,Enabled" endif width 0x0B tree.end tree "2B-3" base ad:0x7000D800 width 12. if (((per.l(ad:0x7000D800))&0x40000000)==(0x40000000)) if (((per.l(ad:0x7000D800))&0x1F)==(0x03||0x07||0x0F||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" else bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" endif textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little Endian Bit Enable" "Disabled,Enabled" else bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" endif textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif endif else sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000D800))&0x1F)==(0x3||0x7||0xF||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif else if (((per.l(ad:0x7000D800))&0x1F)==(0x7||0xF||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" ",,Extern pull-down,Extern pull-high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" ",,Extern pull-down,Extern pull-high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif endif endif if (((per.l(ad:0x7000D800))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "COMMAND2_0,SPI Command2 Register" bitfld.long 0x00 6.--11. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hgroup.long 0x04++0x03 hide.long 0x00 "COMMAND2_0,SPI Command2 Register (Useful only in Master Mode)" endif width 19. textline " " group.long 0x08++0x03 line.long 0x00 "TIMING_REG1_0,CS Timing1 Register" bitfld.long 0x00 28.--31. " CS_SETUP_TIME3 ,Specifies the setup time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 24.--27. " CS_HOLD_TIME3 ,Specifies the hold time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 20.--23. " CS_SETUP_TIME2 ,Specifies the setup time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" textline " " bitfld.long 0x00 16.--19. " CS_HOLD_TIME2 ,Specifies the hold time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 12.--15. " CS_SETUP_TIME1 ,Specifies the setup time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 8.--11. " CS_HOLD_TIME1 ,Specifies the hold time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" textline " " bitfld.long 0x00 4.--7. " CS_SETUP_TIME0 ,Specifies the setup time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 0.--3. " CS_HOLD_TIME0 ,Specifies the hold time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" if (((per.l(ad:0x7000D800+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x7000D800))&0x80000000)==0x00) group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2_0,CS Timing2 Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 24.--28. " CYCLES_BETWEEN_PACKETS3 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" textline " " bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" bitfld.long 0x00 8.--12. " CYCLES_BETWEEN_PACKETS1 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" else bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" endif line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.byte 0x04 16.--23. 1. " SLV_IDLE_COUNT ,Slave Continuous Mode" else group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2_0,CS Timing2 Register" bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 24.--28. " CYCLES_BETWEEN_PACKETS3 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" textline " " bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" bitfld.long 0x00 8.--12. " CYCLES_BETWEEN_PACKETS1 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.byte 0x04 16.--23. 1. " SLV_IDLE_COUNT ,Slave continuous mode" hexmask.long.word 0x04 0.--15. 1. " BLOCK_COUNT ,Counts the number of packets in a transaction" endif textline " " if (((per.l(ad:0x7000D800))&0x40000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register" bitfld.long 0x00 31. " CS_INACTIVE ,CS deasserted error" "No error,Error" textline " " bitfld.long 0x00 30. " FRAME_END ,Continuous mode is terminated" "No,Yes" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Indicates the number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Indicates the number of slots in the transmit FIFO" textline " " bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush Rx FIFO" "In progress,Finished" bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush Tx FIFO" "In progress,Finished" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" textline " " eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO overflow" "No error,Error" eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "No error,Error" rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" else group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 31. " CS_INACTIVE ,CS deasserted error" "No error,Error" endif textline " " bitfld.long 0x00 30. " FRAME_END ,Continuous mode is terminated" "No,Yes" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Number of slots in the transmit FIFO" textline " " bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush Rx FIFO" "In progress,Finished" bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush Tx FIFO" "In progress,Finished" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" textline " " eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO Overflow" "No error,Error" eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "No error,Error" rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" endif rgroup.long 0x18++0x07 line.long 0x00 "TX_DATA_0,Transmit Data Register" line.long 0x04 "RX_DATA_0,Receive Data Register" group.long 0x20++0x03 line.long 0x00 "DMA_CTL_0,DMA Control Register" bitfld.long 0x00 31. " DMA ,Enable DMA mode transfer" "Disabled,Enabled" bitfld.long 0x00 30. " CONST ,Enable continuous mode transfer" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 29. " PAUSE ,Pause feature enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 19.--20. " RX_TRIG ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words" bitfld.long 0x00 15.--16. " TX_TRIG ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words" sif (cpuis("TEGRAX2")) group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Size of data block to be transferred" else if (((per.l(ad:0x7000D800+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x7000D800))&0x80000000)==0x00) hgroup.long 0x24++0x03 hide.long 0x00 "DMA_BLK_SIZE_0,Block Size Register (Useful only in PIO or DMA mode)" else group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Size of data block to be transferred" endif endif group.long 0x108++0x03 line.long 0x00 "TX_FIFO_0,TX FIFO Buffer Register" group.long 0x188++0x03 line.long 0x00 "RX_FIFO_0,RX FIFO Buffer Register" if (((per.l(ad:0x7000D800))&0x40000000)==0x40000000) group.long 0x18C++0x0F line.long 0x00 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" else group.long 0x18C++0x0F line.long 0x00 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x00 31. " CS_INTR_MASK ,Interrupt enable mask bit for CS deassertion" "Disabled,Enabled" bitfld.long 0x00 30. " FRAME_END_INTR_MASK ,Interrupt enable mask bit for frame end" "Disabled,Enabled" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" endif sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000D800))&0x40000000)==0x40000000) group.long 0x18C++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x00 8.--15. 1. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" else group.long 0x18C++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" endif else if (((per.l(ad:0x7000D800))&0x40000000)==0x40000000) group.long 0x190++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" bitfld.long 0x00 8.--10. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7" else hgroup.long 0x190++0x03 hide.long 0x00 "SPARE_CTLR,Spare Control Register (Useful only in Master Mode)" endif endif sif (cpuis("TEGRAX2")) group.long 0x194++0x07 line.long 0x00 "MISC_0,Miscellaneous Register" bitfld.long 0x00 31. " CLKEN_OVERRIDE ,Override for spi_clk" "Gated,Not gated" bitfld.long 0x00 30. " EXT_CLK_EN ,External master clock gate" "Gated,Not gated" line.long 0x04 "FATAL_INTR_EN_0,Fatal Interrupt Enable Register" bitfld.long 0x04 31. " CS_FATAL_INTR_EN ,Fatal interrupt enable bit for CS deassert in Slave Mode" "Disabled,Enabled" bitfld.long 0x04 30. " FRAME_END_FATAL_INTR_EN ,Fatal interrupt enable for FRAME_END" "Disabled,Enabled" bitfld.long 0x04 28. " TX_FIFO_OVF_FATAL_INTR_EN ,Fatal interrupt enable for TX_FIFO_OVF" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " TX_FIFO_UNF_FATAL_INTR_EN ,Fatal interrupt enable for TX_FIFO_UNF" "Disabled,Enabled" bitfld.long 0x04 26. " RX_FIFO_OVF_FATAL_INTR_EN ,Fatal interrupt enable for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x04 25. " RX_FIFO_UNF_FATAL_INTR_EN ,Fatal interrupt enable for RX_FIFO_UNF" "Disabled,Enabled" endif width 0x0B tree.end tree "2B-4" base ad:0x7000DA00 width 12. if (((per.l(ad:0x7000DA00))&0x40000000)==(0x40000000)) if (((per.l(ad:0x7000DA00))&0x1F)==(0x03||0x07||0x0F||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" else bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" endif textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little Endian Bit Enable" "Disabled,Enabled" else bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" endif textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " sif (cpuis("TEGRAX2")) bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif endif else sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000DA00))&0x1F)==(0x3||0x7||0xF||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 13. " BOTH_EN_BYTE ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif else if (((per.l(ad:0x7000DA00))&0x1F)==(0x7||0xF||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO Mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" ",,Extern pull-down,Extern pull-high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Unpacked mode,Packed mode" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND_0,SPI Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/Slave mode select" "Slave,Master" bitfld.long 0x00 28.--29. " MODE ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3" textline " " textline " " bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High" bitfld.long 0x00 24. " CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High" bitfld.long 0x00 23. " CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High" textline " " bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Software,Hardware" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" ",,Extern pull-down,Extern pull-high" bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 14. " BOTH_EN_BIT ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both" textline " " bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit" endif endif endif if (((per.l(ad:0x7000DA00))&0x40000000)==0x40000000) group.long 0x04++0x03 line.long 0x00 "COMMAND2_0,SPI Command2 Register" bitfld.long 0x00 6.--11. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hgroup.long 0x04++0x03 hide.long 0x00 "COMMAND2_0,SPI Command2 Register (Useful only in Master Mode)" endif width 19. textline " " group.long 0x08++0x03 line.long 0x00 "TIMING_REG1_0,CS Timing1 Register" bitfld.long 0x00 28.--31. " CS_SETUP_TIME3 ,Specifies the setup time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 24.--27. " CS_HOLD_TIME3 ,Specifies the hold time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 20.--23. " CS_SETUP_TIME2 ,Specifies the setup time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" textline " " bitfld.long 0x00 16.--19. " CS_HOLD_TIME2 ,Specifies the hold time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 12.--15. " CS_SETUP_TIME1 ,Specifies the setup time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 8.--11. " CS_HOLD_TIME1 ,Specifies the hold time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" textline " " bitfld.long 0x00 4.--7. " CS_SETUP_TIME0 ,Specifies the setup time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" bitfld.long 0x00 0.--3. " CS_HOLD_TIME0 ,Specifies the hold time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles" if (((per.l(ad:0x7000DA00+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x7000DA00))&0x80000000)==0x00) group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2_0,CS Timing2 Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 24.--28. " CYCLES_BETWEEN_PACKETS3 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" textline " " bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" bitfld.long 0x00 8.--12. " CYCLES_BETWEEN_PACKETS1 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" else bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" endif line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.byte 0x04 16.--23. 1. " SLV_IDLE_COUNT ,Slave Continuous Mode" else group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2_0,CS Timing2 Register" bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3 ,Specifies if CS stays active between two packets on CS3" "Inactive,Active" bitfld.long 0x00 24.--28. " CYCLES_BETWEEN_PACKETS3 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 21. " CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active" textline " " bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" bitfld.long 0x00 13. " CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active" bitfld.long 0x00 8.--12. " CYCLES_BETWEEN_PACKETS1 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" textline " " bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles" line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.byte 0x04 16.--23. 1. " SLV_IDLE_COUNT ,Slave continuous mode" hexmask.long.word 0x04 0.--15. 1. " BLOCK_COUNT ,Counts the number of packets in a transaction" endif textline " " if (((per.l(ad:0x7000DA00))&0x40000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register" bitfld.long 0x00 31. " CS_INACTIVE ,CS deasserted error" "No error,Error" textline " " bitfld.long 0x00 30. " FRAME_END ,Continuous mode is terminated" "No,Yes" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Indicates the number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Indicates the number of slots in the transmit FIFO" textline " " bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush Rx FIFO" "In progress,Finished" bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush Tx FIFO" "In progress,Finished" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" textline " " eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO overflow" "No error,Error" eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "No error,Error" rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" else group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register" sif (cpuis("TEGRAX2")) bitfld.long 0x00 31. " CS_INACTIVE ,CS deasserted error" "No error,Error" endif textline " " bitfld.long 0x00 30. " FRAME_END ,Continuous mode is terminated" "No,Yes" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Number of slots in the transmit FIFO" textline " " bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush Rx FIFO" "In progress,Finished" bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush Tx FIFO" "In progress,Finished" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" textline " " eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO Overflow" "No error,Error" eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "No error,Error" rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" endif rgroup.long 0x18++0x07 line.long 0x00 "TX_DATA_0,Transmit Data Register" line.long 0x04 "RX_DATA_0,Receive Data Register" group.long 0x20++0x03 line.long 0x00 "DMA_CTL_0,DMA Control Register" bitfld.long 0x00 31. " DMA ,Enable DMA mode transfer" "Disabled,Enabled" bitfld.long 0x00 30. " CONST ,Enable continuous mode transfer" "Disabled,Enabled" sif (cpuis("TEGRAX2")) textline " " bitfld.long 0x00 29. " PAUSE ,Pause feature enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 19.--20. " RX_TRIG ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words" bitfld.long 0x00 15.--16. " TX_TRIG ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words" sif (cpuis("TEGRAX2")) group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Size of data block to be transferred" else if (((per.l(ad:0x7000DA00+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x7000DA00))&0x80000000)==0x00) hgroup.long 0x24++0x03 hide.long 0x00 "DMA_BLK_SIZE_0,Block Size Register (Useful only in PIO or DMA mode)" else group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Size of data block to be transferred" endif endif group.long 0x108++0x03 line.long 0x00 "TX_FIFO_0,TX FIFO Buffer Register" group.long 0x188++0x03 line.long 0x00 "RX_FIFO_0,RX FIFO Buffer Register" if (((per.l(ad:0x7000DA00))&0x40000000)==0x40000000) group.long 0x18C++0x0F line.long 0x00 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" else group.long 0x18C++0x0F line.long 0x00 "INTR_MASK_0,Interrupt Mask Register" bitfld.long 0x00 31. " CS_INTR_MASK ,Interrupt enable mask bit for CS deassertion" "Disabled,Enabled" bitfld.long 0x00 30. " FRAME_END_INTR_MASK ,Interrupt enable mask bit for frame end" "Disabled,Enabled" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" endif sif (cpuis("TEGRAX2")) if (((per.l(ad:0x7000DA00))&0x40000000)==0x40000000) group.long 0x18C++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x00 8.--15. 1. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" else group.long 0x18C++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x00 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" endif else if (((per.l(ad:0x7000DA00))&0x40000000)==0x40000000) group.long 0x190++0x03 line.long 0x00 "SPARE_CTLR,Spare Control Register" bitfld.long 0x00 8.--10. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7" else hgroup.long 0x190++0x03 hide.long 0x00 "SPARE_CTLR,Spare Control Register (Useful only in Master Mode)" endif endif sif (cpuis("TEGRAX2")) group.long 0x194++0x07 line.long 0x00 "MISC_0,Miscellaneous Register" bitfld.long 0x00 31. " CLKEN_OVERRIDE ,Override for spi_clk" "Gated,Not gated" bitfld.long 0x00 30. " EXT_CLK_EN ,External master clock gate" "Gated,Not gated" line.long 0x04 "FATAL_INTR_EN_0,Fatal Interrupt Enable Register" bitfld.long 0x04 31. " CS_FATAL_INTR_EN ,Fatal interrupt enable bit for CS deassert in Slave Mode" "Disabled,Enabled" bitfld.long 0x04 30. " FRAME_END_FATAL_INTR_EN ,Fatal interrupt enable for FRAME_END" "Disabled,Enabled" bitfld.long 0x04 28. " TX_FIFO_OVF_FATAL_INTR_EN ,Fatal interrupt enable for TX_FIFO_OVF" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " TX_FIFO_UNF_FATAL_INTR_EN ,Fatal interrupt enable for TX_FIFO_UNF" "Disabled,Enabled" bitfld.long 0x04 26. " RX_FIFO_OVF_FATAL_INTR_EN ,Fatal interrupt enable for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x04 25. " RX_FIFO_UNF_FATAL_INTR_EN ,Fatal interrupt enable for RX_FIFO_UNF" "Disabled,Enabled" endif width 0x0B tree.end tree.end tree "Quad SPI" base ad:0x70410000 width 19. if (((per.l(ad:0x70410000))&0x200)==0x200)&&(((per.l(ad:0x70410000))&0x1F)==(0x07||0x0F||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND1,Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/slave mode select" ",Master mode" bitfld.long 0x00 28.--29. " MODE ,QSPI interface clock mode" "Mode 0,?..." textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,?..." bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices CS connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Hardware,Software" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." textline " " bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 9. " SDR_DDR_SEL ,Selects between SDR and DDR mode" "SDR,DDR" bitfld.long 0x00 7.--8. " INTERFACE_WIDTH ,QSPI interface width" "Single bit mode,Dual mode,Quad mode,?..." textline " " bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Number of bits in a packet to transmit/receive" ",,,,,,,8 bit,,,,,,,,16 bit,,,,,,,,,,,,,,,,32 bit" elif (((per.l(ad:0x70410000))&0x200)==0x00)&&(((per.l(ad:0x70410000))&0x1F)==(0x07||0x0F||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND1,Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/slave mode select" ",Master mode" bitfld.long 0x00 28.--29. " MODE ,QSPI interface clock mode" "Mode 0,?..." textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,?..." bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices CS connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Hardware,Software" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" textline " " bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 9. " SDR_DDR_SEL ,Selects between SDR and DDR mode" "SDR,DDR" bitfld.long 0x00 7.--8. " INTERFACE_WIDTH ,QSPI interface width" "Single bit mode,Dual mode,Quad mode,?..." textline " " bitfld.long 0x00 5. " PACKED ,Packed mode enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Number of bits in a packet to transmit/receive" ",,,,,,,8 bit,,,,,,,,16 bit,,,,,,,,,,,,,,,,32 bit" elif (((per.l(ad:0x70410000))&0x200)==0x200)&&(((per.l(ad:0x70410000))&0x1F)!=(0x07||0x0F||0x1F)) group.long 0x00++0x03 line.long 0x00 "COMMAND1,Command1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/slave mode select" ",Master mode" bitfld.long 0x00 28.--29. " MODE ,QSPI interface clock mode" "Mode 0,?..." textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,?..." bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices CS connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Hardware,Software" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." textline " " bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 9. " SDR_DDR_SEL ,Selects between SDR and DDR mode" "SDR,DDR" bitfld.long 0x00 7.--8. " INTERFACE_WIDTH ,QSPI interface width" "Single bit mode,Dual mode,Quad mode,?..." textline " " textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Number of bits in a packet to transmit/receive" ",,,,,,,8 bit,,,,,,,,16 bit,,,,,,,,,,,,,,,,32 bit" else group.long 0x00++0x03 line.long 0x00 "COMMAND1,Command 1 Register" bitfld.long 0x00 31. " PIO ,PIO mode" "Disabled,Enabled" bitfld.long 0x00 30. " MS ,Master/slave mode select" ",Master mode" bitfld.long 0x00 28.--29. " MODE ,QSPI interface clock mode" "Mode 0,?..." textline " " bitfld.long 0x00 26.--27. " CS_SEL ,Select a slave in the multi-slave environment" "CS0,?..." bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices CS connected to CS0" "Low,High" bitfld.long 0x00 21. " CS_SW_HW ,CS control source" "Hardware,Software" textline " " bitfld.long 0x00 20. " CS_SW_VAL ,CS signal value" "Low,High" bitfld.long 0x00 18.--19. " IDLE_SDA ,Inactive data signal format" "Drive low,Drive high,?..." bitfld.long 0x00 17. " BIDIR ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode" textline " " bitfld.long 0x00 16. " EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled" bitfld.long 0x00 15. " EN_LE_BYTE ,Little endian byte enable" "Disabled,Enabled" bitfld.long 0x00 12. " RX_EN ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TX_EN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 9. " SDR_DDR_SEL ,Selects between SDR and DDR mode" "SDR,DDR" bitfld.long 0x00 7.--8. " INTERFACE_WIDTH ,QSPI interface width" "Single bit mode,Dual mode,Quad mode,?..." textline " " textline " " bitfld.long 0x00 0.--4. " BIT_LEN ,Number of bits in a packet to transmit/receive" ",,,,,,,8 bit,,,,,,,,16 bit,,,,,,,,,,,,,,,,32 bit" endif group.long 0x04++0x07 line.long 0x00 "COMMAND2,Command2 Register" bitfld.long 0x00 10.--14. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--7. 1. " RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" line.long 0x04 "TIMING_REG1,CS Timing1 Register" bitfld.long 0x04 4.--7. " CS_SETUP ,Specifies the setup time of the chip select CS0" "1 clk cycle,2 clk cycles,3 clk cycles,4 clk cycles,5 clk cycles,6 clk cycles,7 clk cycles,8 clk cycles,9 clk cycles,10 clk cycles,11 clk cycles,12 clk cycles,13 clk cycles,14 clk cycles,15 clk cycles,16 clk cycles" bitfld.long 0x04 0.--3. " CS_HOLD ,Specifies the hold time of the chip select CS0" "1 clk cycle,2 clk cycles,3 clk cycles,4 clk cycles,5 clk cycles,6 clk cycles,7 clk cycles,8 clk cycles,9 clk cycles,10 clk cycles,11 clk cycles,12 clk cycles,13 clk cycles,14 clk cycles,15 clk cycles,16 clk cycles" if (((per.l(ad:0x70410000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x70410000))&0x80000000)==0x00) group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2,CS Timing2 Register" bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" line.long 0x04 "TRANSFER_STATUS,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" else group.long 0x0C++0x07 line.long 0x00 "TIMING_REG2,CS Timing2 Register" bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0 ,Specifies if CS stays active between two packets on CS0" "Inactive,Active" bitfld.long 0x00 0.--4. " CYCLES_BETWEEN_PACKETS0 ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "1 clk cycle,2 clk cycles,3 clk cycles,4 clk cycles,5 clk cycles,6 clk cycles,7 clk cycles,8 clk cycles,9 clk cycles,10 clk cycles,11 clk cycles,12 clk cycles,13 clk cycles,14 clk cycles,15 clk cycles,16 clk cycles,17 clk cycles,18 clk cycles,19 clk cycles,20 clk cycles,21 clk cycles,22 clk cycles,23 clk cycles,24 clk cycles,25 clk cycles,26 clk cycles,27 clk cycles,28 clk cycles,29 clk cycles,30 clk cycles,31 clk cycles,32 clk cycles" line.long 0x04 "TRANSFER_STATUS,TRANSFER Status Register" eventfld.long 0x04 30. " RDY ,Ready bit" "Not ready,Ready" hexmask.long.word 0x04 0.--15. 1. " BLOCK_COUNT ,Counts the number of packets in a transaction" endif group.long 0x14++0x03 line.long 0x00 "FIFO_STATUS,Control/status FIFO Status Register" hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT ,Number of slots in the receive FIFO" hexmask.long.byte 0x00 16.--22. 1. " TX_FIFO_EMPTY_COUNT ,Number of slots in the transmit FIFO" bitfld.long 0x00 15. " RX_FIFO_FLUSH ,Flush RX FIFO" "Not flushed,Flushed" textline " " bitfld.long 0x00 14. " TX_FIFO_FLUSH ,Flush TX FIFO" "Not flushed,Flushed" eventfld.long 0x00 8. " ERR ,Error flag" "No error,Error" eventfld.long 0x00 7. " TX_FIFO_OVF ,TX FIFO overflow" "No error,Error" textline " " eventfld.long 0x00 6. " TX_FIFO_UNR ,TX FIFO underrun" "No error,Error" eventfld.long 0x00 5. " RX_FIFO_OVF ,RX FIFO overflow" "Not error,Error" eventfld.long 0x00 4. " RX_FIFO_UNR ,RX FIFO underrun" "Not error,Error" textline " " rbitfld.long 0x00 3. " TX_FIFO_FULL ,TX FIFO full status" "Not full,Full" rbitfld.long 0x00 2. " TX_FIFO_EMPTY ,TX FIFO empty status" "Not empty,Empty" rbitfld.long 0x00 1. " RX_FIFO_FULL ,RX FIFO full status" "Not full,Full" textline " " rbitfld.long 0x00 0. " RX_FIFO_EMPTY ,RX FIFO empty status" "Not empty,Empty" textline " " hgroup.long 0x18++0x03 hide.long 0x00 "TX_DATA,Transmit Data Register" in hgroup.long 0x1C++0x03 hide.long 0x00 "RX_DATA,Receive Data Register" in textline " " group.long 0x20++0x03 line.long 0x00 "DMA_CTL,DMA Control Register" bitfld.long 0x00 31. " DMA_EN ,Enable DMA mode transfer" "Disabled,Enabled" bitfld.long 0x00 19.--20. " RX_TRIG ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words" bitfld.long 0x00 15.--16. " TX_TRIG ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words" if (((per.l(ad:0x70410000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x70410000))&0x80000000)==0x00) hgroup.long 0x24++0x03 hide.long 0x00 "DMA_BLK_SIZE,Block Size Register" else group.long 0x24++0x03 line.long 0x00 "DMA_BLK_SIZE,Block Size Register" hexmask.long.word 0x00 0.--15. 1. " DMA_BLOCK_SIZE ,Size of data block to be transferred" endif textline " " hgroup.long 0x108++0x03 hide.long 0x00 "TX_FIFO,TX FIFO Buffer Register" in hgroup.long 0x188++0x03 hide.long 0x00 "RX_FIFO,RX FIFO Buffer Register" in textline " " group.long 0x18C++0x0F line.long 0x00 "INTR_MASK,Interrupt Mask Register" bitfld.long 0x00 29. " RDY_INTR_MASK ,Interrupt enable mask bit for RDY" "Disabled,Enabled" bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 27. " TX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled" bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled" line.long 0x04 "SPARE_CTLR,Spare Control Register" sif (cpuis("TEGRAX2")) hexmask.long.byte 0x04 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x04 16.--23. 1. " SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers" textline " " hexmask.long.byte 0x04 8.--15. 1. " QSPI_SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" hexmask.long.byte 0x04 0.--7. 1. " QSPI_SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers" else bitfld.long 0x04 8.--10. " QSPI_SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7" endif line.long 0x08 "MISC,Miscellaneous Register" sif (cpuis("TEGRAX2")) bitfld.long 0x08 31. " CLKEN_OVERRIDE ,Override for QSPI clock" "Disabled,Enabled" textline " " endif hexmask.long.byte 0x08 0.--7. 1. " NUM_OF_DUMMY_CLK_CYCLES ,Number of dummy cycles required in case of fast read commands" line.long 0x0C "TIMING3,Timing3 Register" bitfld.long 0x0C 24.--28. " DATA3_LINE_TAP_DELAY ,Delays the data3 coming in from the external device with these tap values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 16.--20. " DATA2_LINE_TAP_DELAY ,Delays the data2 coming in from the external device with these tap values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 8.--12. " DATA1_LINE_TAP_DELAY ,Delays the data1 coming in from the external device with these tap values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. " DATA0_LINE_TAP_DELAY ,Delays the data0 coming in from the external device with these tap values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpuis("TEGRAX2")) group.long 0x19C++0x13 line.long 0x00 "CMB_SEQ_CMD,Combined Sequence Command Register" hexmask.long.byte 0x00 0.--7. 1. " COMMAND_VALUE ,Command value that goes out to flash" line.long 0x04 "CMB_SEQ_CMD_CFG,Combined Sequence Command Config Register" bitfld.long 0x04 13.--14. " COMMAND_X1_X2_X4 ,Interface width of CMD" "Single bit mode,Dual mode,Quad mode,?..." bitfld.long 0x04 12. " COMMAND_SDR_DDR ,Indicates whether CMD is in SDR or DDR mode" "SDR,DDR" hexmask.long.byte 0x04 0.--7. 1. " COMMAND_SIZE ,Command size in bits" line.long 0x08 "GLOBAL_CONFIG,Global Config Register" bitfld.long 0x08 0. " CMB_SEQ_EN ,Combined sequence mode enable" "Disabled,Enabled" line.long 0x0C "CMB_SEQ_ADDR,Combined Sequence Address Register" line.long 0x10 "CMB_SEQ_ADDR_CFG,Combined Sequence Address Config Register" bitfld.long 0x10 13.--14. " ADDRESS_X1_X2_X4 ,Indicates interface width of ADDR" "Single bit mode,Dual mode,Quad mode,?..." bitfld.long 0x10 12. " ADDRESS_SDR_DDR ,Indicates whether ADDR is in SDR or DDR mode" "SDR,DDR" hexmask.long.byte 0x10 0.--7. 1. " ADDRESS_SIZE ,Address size in bits" group.long 0x1EC++0x0B line.long 0x00 "QSPI_COMP_CONTROL,Comp Pad Control Register" hexmask.long.byte 0x00 20.--26. 1. " COMP_PAD_DRVUP_OVR ,Used to drive DRVUP input of COMP pad" hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR ,Used to drive DRVDN input of COMP pad" bitfld.long 0x00 3.--6. " QSPI_COMP_PAD_VREF_SEL ,Comp pad Vref select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " QSPI_COMP_PAD_E_INPUT_OR_E_PWRD ,Comp pad E input or E PWRD" "Start,Stop" rbitfld.long 0x00 0. " QSPI_COMP_CALIB_STATUS ,Comp calibration status" "Not calibrated,Calibrated" line.long 0x04 "AUTO_CAL_CONFIG,Pad Auto-Calibration Settings" bitfld.long 0x04 31. " AUTO_CAL_START ,Calibration state machine status" "Stopped,Started" bitfld.long 0x04 30. " AUTO_CAL_OVERRIDE ,AUTOCAL override" "No override,Override" bitfld.long 0x04 29. " AUTO_CAL_ENABLE ,AUTOCAL enable" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " AUTO_CAL_SLW_OVERRIDE ,AUTOCAL slew rate override" "No override,Override" bitfld.long 0x04 16.--18. " AUTO_CAL_STEP ,Calibration step interval (In microseconds)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 8.--14. 1. " AUTO_CAL_PD_OFFSET ,2's complement offset for pull-down value" textline " " hexmask.long.byte 0x04 0.--6. 1. " AUTO_CAL_PU_OFFSET ,2's complement offset for pull-up value" line.long 0x08 "AUTO_CAL_INTERVAL,Pad Calibration Interval" rgroup.long 0x1F8++0x03 line.long 0x00 "AUTO_CAL_STATUS,PAD Calibration Status" bitfld.long 0x00 31. " AUTO_CAL_ACTIVE ,Auto calibration status" "Inactive,Active" hexmask.long.byte 0x00 24.--30. 1. " AUTO_CAL_PULLDOWN_ADJ ,Pull-down code sent to pads" hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ ,Pull-up code sent to pads" textline " " hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PULLDOWN ,Pull-down code generated by auto-calibration" hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP ,Pull-up code generated by auto-calibration" endif width 0x0B tree.end tree "PWM Controller" base ad:0x7000A000 width 13. group.long 0x0++0x03 line.long 0x00 "PWM_CSR_0_0,PWM Output-0 Configuration Control Register" bitfld.long 0x00 31. " ENB ,Enable pulse width modulator" "Disabled,Enabled" hexmask.long.word 0x00 16.--30. 1. " PWM_0 ,Pulse width" hexmask.long.word 0x00 0.--12. 1. " PFM_0 ,Frequency divider" group.long 0x10++0x03 line.long 0x00 "PWM_CSR_1_0,PWM Output-1 Configuration Control Register" bitfld.long 0x00 31. " ENB ,Enable pulse width modulator" "Disabled,Enabled" hexmask.long.word 0x00 16.--30. 1. " PWM_1 ,Pulse width" hexmask.long.word 0x00 0.--12. 1. " PFM_1 ,Frequency divider" group.long 0x20++0x03 line.long 0x00 "PWM_CSR_2_0,PWM Output-2 Configuration Control Register" bitfld.long 0x00 31. " ENB ,Enable pulse width modulator" "Disabled,Enabled" hexmask.long.word 0x00 16.--30. 1. " PWM_2 ,Pulse width" hexmask.long.word 0x00 0.--12. 1. " PFM_2 ,Frequency divider" group.long 0x30++0x03 line.long 0x00 "PWM_CSR_3_0,PWM Output-3 Configuration Control Register" bitfld.long 0x00 31. " ENB ,Enable pulse width modulator" "Disabled,Enabled" hexmask.long.word 0x00 16.--30. 1. " PWM_3 ,Pulse width" hexmask.long.word 0x00 0.--12. 1. " PFM_3 ,Frequency divider" width 0x0B tree.end tree "THERMAL SENSOR AND THERMAL THROTTLING CONTROLLER" tree "SOC_THERM" base ad:0x7002000 width 41. group.long 0x0++0x0F line.long 0x00 "THERMCTL_LEVEL0_GROUP_CPU_0,THERMCTL_LEVEL0_GROUP_CPU_0" hexmask.long.word 0x00 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x00 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x00 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x00 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x00 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x00 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x04 "THERMCTL_LEVEL0_GROUP_GPU_0,THERMCTL_LEVEL0_GROUP_GPU_0" hexmask.long.word 0x04 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x04 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x04 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x04 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x04 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x04 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x04 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x08 "THERMCTL_LEVEL0_GROUP_MEM_0,THERMCTL_LEVEL0_GROUP_MEM_0" hexmask.long.word 0x08 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x08 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x08 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x08 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x08 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x08 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x08 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x0C "THERMCTL_LEVEL0_GROUP_TSENSE_0,THERMCTL_LEVEL0_GROUP_TSENSE_0" hexmask.long.word 0x0C 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x0C 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x0C 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" textline " " bitfld.long 0x0C 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x0C 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x0C 0.--1. " S ,Status" "Bellow,In,,Above" rgroup.long (0x0+0x10)++0x07 line.long 0x00 "THERMCTL_LEVEL0_UP_STATS_0,THERMCTL_LEVEL0_UP_STATS_0" line.long 0x04 "THERMCTL_LEVEL0_DN_STATS_0,THERMCTL_LEVEL0_DN_STATS_0" group.long 0x20++0x0F line.long 0x00 "THERMCTL_LEVEL1_GROUP_CPU_0,THERMCTL_LEVEL1_GROUP_CPU_0" hexmask.long.word 0x00 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x00 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x00 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x00 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x00 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x00 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x04 "THERMCTL_LEVEL1_GROUP_GPU_0,THERMCTL_LEVEL1_GROUP_GPU_0" hexmask.long.word 0x04 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x04 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x04 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x04 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x04 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x04 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x04 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x08 "THERMCTL_LEVEL1_GROUP_MEM_0,THERMCTL_LEVEL1_GROUP_MEM_0" hexmask.long.word 0x08 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x08 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x08 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x08 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x08 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x08 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x08 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x0C "THERMCTL_LEVEL1_GROUP_TSENSE_0,THERMCTL_LEVEL1_GROUP_TSENSE_0" hexmask.long.word 0x0C 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x0C 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x0C 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" textline " " bitfld.long 0x0C 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x0C 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x0C 0.--1. " S ,Status" "Bellow,In,,Above" rgroup.long (0x20+0x10)++0x07 line.long 0x00 "THERMCTL_LEVEL1_UP_STATS_0,THERMCTL_LEVEL1_UP_STATS_0" line.long 0x04 "THERMCTL_LEVEL1_DN_STATS_0,THERMCTL_LEVEL1_DN_STATS_0" group.long 0x40++0x0F line.long 0x00 "THERMCTL_LEVEL2_GROUP_CPU_0,THERMCTL_LEVEL2_GROUP_CPU_0" hexmask.long.word 0x00 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x00 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x00 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x00 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x00 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x00 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x04 "THERMCTL_LEVEL2_GROUP_GPU_0,THERMCTL_LEVEL2_GROUP_GPU_0" hexmask.long.word 0x04 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x04 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x04 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x04 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x04 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x04 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x04 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x08 "THERMCTL_LEVEL2_GROUP_MEM_0,THERMCTL_LEVEL2_GROUP_MEM_0" hexmask.long.word 0x08 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x08 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x08 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x08 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x08 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x08 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x08 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x0C "THERMCTL_LEVEL2_GROUP_TSENSE_0,THERMCTL_LEVEL2_GROUP_TSENSE_0" hexmask.long.word 0x0C 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x0C 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x0C 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" textline " " bitfld.long 0x0C 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x0C 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x0C 0.--1. " S ,Status" "Bellow,In,,Above" rgroup.long (0x40+0x10)++0x07 line.long 0x00 "THERMCTL_LEVEL2_UP_STATS_0,THERMCTL_LEVEL2_UP_STATS_0" line.long 0x04 "THERMCTL_LEVEL2_DN_STATS_0,THERMCTL_LEVEL2_DN_STATS_0" group.long 0x60++0x0F line.long 0x00 "THERMCTL_LEVEL3_GROUP_CPU_0,THERMCTL_LEVEL3_GROUP_CPU_0" hexmask.long.word 0x00 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x00 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x00 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x00 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x00 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x00 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x04 "THERMCTL_LEVEL3_GROUP_GPU_0,THERMCTL_LEVEL3_GROUP_GPU_0" hexmask.long.word 0x04 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x04 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x04 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x04 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x04 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x04 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x04 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x08 "THERMCTL_LEVEL3_GROUP_MEM_0,THERMCTL_LEVEL3_GROUP_MEM_0" hexmask.long.word 0x08 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x08 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x08 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" bitfld.long 0x08 7. " TS ,TSENSE modifier" "Disabled,Enabled" textline " " bitfld.long 0x08 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x08 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x08 0.--1. " S ,Status" "Bellow,In,,Above" line.long 0x0C "THERMCTL_LEVEL3_GROUP_TSENSE_0,THERMCTL_LEVEL3_GROUP_TSENSE_0" hexmask.long.word 0x0C 18.--26. 1. " UP_THRESH ,UP threshold value" hexmask.long.word 0x0C 9.--17. 1. " DN_THRESH ,Down threshold value" textline " " bitfld.long 0x0C 8. " EN ,Enable for temperature monitoring" "Disabled,Enabled" textline " " bitfld.long 0x0C 5.--6. " CPU ,Initiate CPU throttling" "None,Lite,Heavy,?..." bitfld.long 0x0C 3.--4. " GPU ,Initiate GPU" "None,Lite,Heavy,?..." textline " " rbitfld.long 0x0C 0.--1. " S ,Status" "Bellow,In,,Above" rgroup.long (0x60+0x10)++0x07 line.long 0x00 "THERMCTL_LEVEL3_UP_STATS_0,THERMCTL_LEVEL3_UP_STATS_0" line.long 0x04 "THERMCTL_LEVEL3_DN_STATS_0,THERMCTL_LEVEL3_DN_STATS_0" group.long 0x80++0x03 line.long 0x00 "THERMCTL_THERMTRIP_CTL_0,THERMCTL_THERMTRIP_CTL_0" bitfld.long 0x00 31. " ANY_EN ,Initiate THERMTRIP based on any monitoring group" "OFF,ON" bitfld.long 0x00 30. " MEM_EN ,Initiate THERMTRIP based on MEM monitoring group" "OFF,ON" textline " " bitfld.long 0x00 29. " GPU_EN ,Initiate THERMTRIP based on GPU monitoring group" "OFF,ON" bitfld.long 0x00 28. " CPU_EN ,Initiate THERMTRIP based on CPU monitoring group" "OFF,ON" textline " " bitfld.long 0x00 27. " TSENSE_EN ,Initiate THERMTRIP based on TSENSE monitoring group" "OFF,ON" hexmask.long.word 0x00 18.--26. 1. " GPU_N_MEM ,Threshold for thermal shutdown for GPU group - 1/2 degree precision" textline " " hexmask.long.word 0x00 9.--17. 1. " CPU ,Threshold for thermal shutdown for CPU group - 1/2 degree precision" hexmask.long.word 0x00 0.--8. 1. " TSENSE ,Threshold for thermal shutdown for TSENSE group - 1/2 degree precision" group.long 0x84++0x03 line.long 0x00 "THERMCTL_INTR_STATUS_0_SET/CLR,THERMCTL_INTR_STATUS_0_SET/CLR" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MD3 ,MEM group down threshold interrupt for level 3" "OFF,ON" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " MU3 ,MEM group up threshold interrupt for level 3" "OFF,ON" textline " " setclrfld.long 0x00 29. 0x04 29. 0x08 29. " MD2 ,MEM group down threshold interrupt for level 2" "OFF,ON" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " MU2 ,MEM group up threshold interrupt for level 2" "OFF,ON" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " MD1 ,MEM group down threshold interrupt for level 1" "OFF,ON" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " MU1 ,MEM group up threshold interrupt for level 1" "OFF,ON" textline " " setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MD0 ,MEM group down threshold interrupt for level 0" "OFF,ON" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " MU0 ,MEM group up threshold interrupt for level 0" "OFF,ON" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " GD3 ,GPU group down threshold interrupt for level 3" "OFF,ON" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GU3 ,GPU group up threshold interrupt for level 3" "OFF,ON" textline " " setclrfld.long 0x00 21. 0x04 21. 0x08 21. " GD2 ,GPU group down threshold interrupt for level 2" "OFF,ON" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " GU2 ,GPU group up threshold interrupt for level 2" "OFF,ON" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GD1 ,GPU group down threshold interrupt for level 1" "OFF,ON" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GU1 ,GPU group up threshold interrupt for level 1" "OFF,ON" textline " " setclrfld.long 0x00 17. 0x04 17. 0x08 17. " GD0 ,GPU group down threshold interrupt for level 0" "OFF,ON" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GU0 ,GPU group up threshold interrupt for level 0" "OFF,ON" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " CD3 ,CPU group down threshold interrupt for level 3" "OFF,ON" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " CU3 ,CPU group up threshold interrupt for level 3" "OFF,ON" textline " " setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CD2 ,CPU group down threshold interrupt for level 2" "OFF,ON" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " CU2 ,CPU group up threshold interrupt for level 2" "OFF,ON" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " CD1 ,CPU group down threshold interrupt for level 1" "OFF,ON" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CU1 ,CPU group up threshold interrupt for level 1" "OFF,ON" textline " " setclrfld.long 0x00 9. 0x04 9. 0x08 9. " CD0 ,CPU group down threshold interrupt for level 0" "OFF,ON" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " CU0 ,CPU group up threshold interrupt for level 0" "OFF,ON" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TD3 ,TSENSE group down threshold interrupt for level 3" "OFF,ON" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TU3 ,TSENSE group up threshold interrupt for level 3" "OFF,ON" textline " " setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TD2 ,TSENSE group down threshold interrupt for level 2" "OFF,ON" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TU2 ,TSENSE group up threshold interrupt for level 2" "OFF,ON" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " TD1 ,TSENSE group down threshold interrupt for level 1" "OFF,ON" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TU1 ,TSENSE group up threshold interrupt for level 1" "OFF,ON" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TD0 ,TSENSE group down threshold interrupt for level 0" "OFF,ON" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TU0 ,TSENSE group up threshold interrupt for level 0" "OFF,ON" group.long 0x94++0x0B line.long 0x00 "THERMCTL_STATS_CTL_0,THERMCTL_STATS_CTL_0" bitfld.long 0x00 3. " CLEAR_DN ,Clear DN statistics for all levels" "OFF,ON" bitfld.long 0x00 2. " ENB_DN ,Enable DN statistics collection for all levels" "OFF,ON" textline " " bitfld.long 0x00 1. " CLEAR_UP ,Clear statistics for all levels" "OFF,ON" bitfld.long 0x00 0. " ENB_UP ,Enable statistics collection for all levels" "OFF,ON" line.long 0x04 "THERMCTL_SLOWDOWN_THRESHOLD_0,THERMCTL_SLOWDOWN_THRESHOLD_0" hexmask.long.byte 0x04 24.--31. 1. " MEM ,Slowdown threshold for MEM group" hexmask.long.byte 0x04 16.--23. 1. " GPU ,Slowdown threshold for GPU group" textline " " hexmask.long.byte 0x04 8.--15. 1. " CPU ,Slowdown threshold for CPU group" hexmask.long.byte 0x04 0.--7. 1. " TSENSE ,Slowdown threshold for TSENSE group" line.long 0x08 "THERMCTL_SLOWDOWN_CTL_0,THERMCTL_SLOWDOWN_CTL_0" bitfld.long 0x08 30.--31. " SLOWDOWN_SELECT ,Selects which one to throttle" "NONE,CPU_ONLY,GPU_ONLY,BOTH" bitfld.long 0x08 4. " ANY_EN ,ANY enable" "OFF,ON" textline " " bitfld.long 0x08 3. " MEM_EN ,MEM enable" "OFF,ON" bitfld.long 0x08 2. " GPU_EN ,GPU enable" "OFF,ON" textline " " bitfld.long 0x08 1. " CPU_EN ,CPU enable" "OFF,ON" bitfld.long 0x08 0. " TSENSE_EN ,TSENSE enable" "OFF,ON" group.long 0xC0++0x0B line.long 0x00 "TSENSOR_CPU0_CONFIG0_0,TSENSOR_CPU0_CONFIG0_0" hexmask.long.tbyte 0x00 8.--27. 1. " TALL ,M count" bitfld.long 0x00 5. " STATUS_CLR ,Clears MIN/MAX statistics" "OFF,ON" textline " " bitfld.long 0x00 4. " TCALC_OVERFLOW ,Add operation overflow" "OFF,ON" bitfld.long 0x00 3. " OVERFLOW ,14-bit overflow" "OFF,ON" textline " " bitfld.long 0x00 2. " CPTR_OVERFLOW ,Capture overflow" "OFF,ON" bitfld.long 0x00 0. " STOP ,Sensor stop" "OFF,ON" line.long 0x04 "TSENSOR_CPU0_CONFIG1_0,TSENSOR_CPU0_CONFIG1_0" bitfld.long 0x04 31. " TEMP_ENABLE ,Temperature enable" "OFF,ON" bitfld.long 0x04 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 15.--20. " TIDDQ_EN ,Time between IDDQ and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 0.--9. 1. " TSAMPLE ,N count" line.long 0x08 "TSENSOR_CPU0_CONFIG2_0,TSENSOR_CPU0_CONFIG2_0" hexmask.long.word 0x08 16.--31. 1. " THERM_A ,THERM A" hexmask.long.word 0x08 0.--15. 1. " THERM_A ,THERM B" rgroup.long (0xC0+0xC)++0x0B line.long 0x00 "TSENSOR_CPU0_STATUS0_0,TSENSOR_CPU0_STATUS0_0" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_CPU0_STATUS1_0,TSENSOR_CPU0_STATUS1_0" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temperature" line.long 0x08 "TSENSOR_CPU0_STATUS2_0,TSENSOR_CPU$@_STATUS2_0" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Maximum temperature registered since last clear (reset to lowest possible temperature)" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Minimum temperature registered since last clear (reset to highest possible temperature)" group.long 0xE0++0x0B line.long 0x00 "TSENSOR_CPU1_CONFIG0_0,TSENSOR_CPU1_CONFIG0_0" hexmask.long.tbyte 0x00 8.--27. 1. " TALL ,M count" bitfld.long 0x00 5. " STATUS_CLR ,Clears MIN/MAX statistics" "OFF,ON" textline " " bitfld.long 0x00 4. " TCALC_OVERFLOW ,Add operation overflow" "OFF,ON" bitfld.long 0x00 3. " OVERFLOW ,14-bit overflow" "OFF,ON" textline " " bitfld.long 0x00 2. " CPTR_OVERFLOW ,Capture overflow" "OFF,ON" bitfld.long 0x00 0. " STOP ,Sensor stop" "OFF,ON" line.long 0x04 "TSENSOR_CPU1_CONFIG1_0,TSENSOR_CPU1_CONFIG1_0" bitfld.long 0x04 31. " TEMP_ENABLE ,Temperature enable" "OFF,ON" bitfld.long 0x04 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 15.--20. " TIDDQ_EN ,Time between IDDQ and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 0.--9. 1. " TSAMPLE ,N count" line.long 0x08 "TSENSOR_CPU1_CONFIG2_0,TSENSOR_CPU1_CONFIG2_0" hexmask.long.word 0x08 16.--31. 1. " THERM_A ,THERM A" hexmask.long.word 0x08 0.--15. 1. " THERM_A ,THERM B" rgroup.long (0xE0+0xC)++0x0B line.long 0x00 "TSENSOR_CPU1_STATUS0_0,TSENSOR_CPU1_STATUS0_0" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_CPU1_STATUS1_0,TSENSOR_CPU1_STATUS1_0" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temperature" line.long 0x08 "TSENSOR_CPU1_STATUS2_0,TSENSOR_CPU$@_STATUS2_0" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Maximum temperature registered since last clear (reset to lowest possible temperature)" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Minimum temperature registered since last clear (reset to highest possible temperature)" group.long 0x100++0x0B line.long 0x00 "TSENSOR_CPU2_CONFIG0_0,TSENSOR_CPU2_CONFIG0_0" hexmask.long.tbyte 0x00 8.--27. 1. " TALL ,M count" bitfld.long 0x00 5. " STATUS_CLR ,Clears MIN/MAX statistics" "OFF,ON" textline " " bitfld.long 0x00 4. " TCALC_OVERFLOW ,Add operation overflow" "OFF,ON" bitfld.long 0x00 3. " OVERFLOW ,14-bit overflow" "OFF,ON" textline " " bitfld.long 0x00 2. " CPTR_OVERFLOW ,Capture overflow" "OFF,ON" bitfld.long 0x00 0. " STOP ,Sensor stop" "OFF,ON" line.long 0x04 "TSENSOR_CPU2_CONFIG1_0,TSENSOR_CPU2_CONFIG1_0" bitfld.long 0x04 31. " TEMP_ENABLE ,Temperature enable" "OFF,ON" bitfld.long 0x04 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 15.--20. " TIDDQ_EN ,Time between IDDQ and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 0.--9. 1. " TSAMPLE ,N count" line.long 0x08 "TSENSOR_CPU2_CONFIG2_0,TSENSOR_CPU2_CONFIG2_0" hexmask.long.word 0x08 16.--31. 1. " THERM_A ,THERM A" hexmask.long.word 0x08 0.--15. 1. " THERM_A ,THERM B" rgroup.long (0x100+0xC)++0x0B line.long 0x00 "TSENSOR_CPU2_STATUS0_0,TSENSOR_CPU2_STATUS0_0" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_CPU2_STATUS1_0,TSENSOR_CPU2_STATUS1_0" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temperature" line.long 0x08 "TSENSOR_CPU2_STATUS2_0,TSENSOR_CPU$@_STATUS2_0" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Maximum temperature registered since last clear (reset to lowest possible temperature)" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Minimum temperature registered since last clear (reset to highest possible temperature)" group.long 0x120++0x0B line.long 0x00 "TSENSOR_CPU3_CONFIG0_0,TSENSOR_CPU3_CONFIG0_0" hexmask.long.tbyte 0x00 8.--27. 1. " TALL ,M count" bitfld.long 0x00 5. " STATUS_CLR ,Clears MIN/MAX statistics" "OFF,ON" textline " " bitfld.long 0x00 4. " TCALC_OVERFLOW ,Add operation overflow" "OFF,ON" bitfld.long 0x00 3. " OVERFLOW ,14-bit overflow" "OFF,ON" textline " " bitfld.long 0x00 2. " CPTR_OVERFLOW ,Capture overflow" "OFF,ON" bitfld.long 0x00 0. " STOP ,Sensor stop" "OFF,ON" line.long 0x04 "TSENSOR_CPU3_CONFIG1_0,TSENSOR_CPU3_CONFIG1_0" bitfld.long 0x04 31. " TEMP_ENABLE ,Temperature enable" "OFF,ON" bitfld.long 0x04 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 15.--20. " TIDDQ_EN ,Time between IDDQ and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 0.--9. 1. " TSAMPLE ,N count" line.long 0x08 "TSENSOR_CPU3_CONFIG2_0,TSENSOR_CPU3_CONFIG2_0" hexmask.long.word 0x08 16.--31. 1. " THERM_A ,THERM A" hexmask.long.word 0x08 0.--15. 1. " THERM_A ,THERM B" rgroup.long (0x120+0xC)++0x0B line.long 0x00 "TSENSOR_CPU3_STATUS0_0,TSENSOR_CPU3_STATUS0_0" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_CPU3_STATUS1_0,TSENSOR_CPU3_STATUS1_0" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temperature" line.long 0x08 "TSENSOR_CPU3_STATUS2_0,TSENSOR_CPU$@_STATUS2_0" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Maximum temperature registered since last clear (reset to lowest possible temperature)" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Minimum temperature registered since last clear (reset to highest possible temperature)" group.long 0x140++0x0B line.long 0x00 "TSENSOR_MEM0_CONFIG0_0,TSENSOR_MEM0_CONFIG0_0" hexmask.long.tbyte 0x00 8.--27. 1. " TALL ,M count" bitfld.long 0x00 5. " STATUS_CLR ,Clears MIN/MAX statistics" "OFF,ON" textline " " bitfld.long 0x00 4. " TCALC_OVERFLOW ,Add operation overflow" "OFF,ON" bitfld.long 0x00 3. " OVERFLOW ,14-bit overflow" "OFF,ON" textline " " bitfld.long 0x00 2. " CPTR_OVERFLOW ,Capture overflow" "OFF,ON" bitfld.long 0x00 0. " STOP ,Sensor stop" "OFF,ON" line.long 0x04 "TSENSOR_MEM0_CONFIG1_0,TSENSOR_MEM0_CONFIG1_0" bitfld.long 0x04 31. " TEMP_ENABLE ,Temperature enable" "OFF,ON" bitfld.long 0x04 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 15.--20. " TIDDQ_EN ,Time between IDDQ and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 0.--9. 1. " TSAMPLE ,N count" line.long 0x08 "TSENSOR_MEM0_CONFIG2_0,TSENSOR_MEM0_CONFIG2_0" hexmask.long.word 0x08 16.--31. 1. " THERM_A ,THERM A" hexmask.long.word 0x08 0.--15. 1. " THERM_A ,THERM B" rgroup.long (0x140+0xC)++0x0B line.long 0x00 "TSENSOR_MEM0_STATUS0_0,TSENSOR_MEM0_STATUS0_0" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_MEM0_STATUS1_0,TSENSOR_MEM0_STATUS1_0" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temperature" line.long 0x08 "TSENSOR_MEM0_STATUS2_0,TSENSOR_$@_STATUS2_0" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Maximum temperature registered since last clear (reset to lowest possible temperature)" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Minimum temperature registered since last clear (reset to highest possible temperature)" group.long 0x160++0x0B line.long 0x00 "TSENSOR_MEM1_CONFIG0_0,TSENSOR_MEM1_CONFIG0_0" hexmask.long.tbyte 0x00 8.--27. 1. " TALL ,M count" bitfld.long 0x00 5. " STATUS_CLR ,Clears MIN/MAX statistics" "OFF,ON" textline " " bitfld.long 0x00 4. " TCALC_OVERFLOW ,Add operation overflow" "OFF,ON" bitfld.long 0x00 3. " OVERFLOW ,14-bit overflow" "OFF,ON" textline " " bitfld.long 0x00 2. " CPTR_OVERFLOW ,Capture overflow" "OFF,ON" bitfld.long 0x00 0. " STOP ,Sensor stop" "OFF,ON" line.long 0x04 "TSENSOR_MEM1_CONFIG1_0,TSENSOR_MEM1_CONFIG1_0" bitfld.long 0x04 31. " TEMP_ENABLE ,Temperature enable" "OFF,ON" bitfld.long 0x04 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 15.--20. " TIDDQ_EN ,Time between IDDQ and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 0.--9. 1. " TSAMPLE ,N count" line.long 0x08 "TSENSOR_MEM1_CONFIG2_0,TSENSOR_MEM1_CONFIG2_0" hexmask.long.word 0x08 16.--31. 1. " THERM_A ,THERM A" hexmask.long.word 0x08 0.--15. 1. " THERM_A ,THERM B" rgroup.long (0x160+0xC)++0x0B line.long 0x00 "TSENSOR_MEM1_STATUS0_0,TSENSOR_MEM1_STATUS0_0" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_MEM1_STATUS1_0,TSENSOR_MEM1_STATUS1_0" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temperature" line.long 0x08 "TSENSOR_MEM1_STATUS2_0,TSENSOR_$@_STATUS2_0" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Maximum temperature registered since last clear (reset to lowest possible temperature)" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Minimum temperature registered since last clear (reset to highest possible temperature)" group.long 0x180++0x0B line.long 0x00 "TSENSOR_GPU_CONFIG0_0,TSENSOR_GPU_CONFIG0_0" hexmask.long.tbyte 0x00 8.--27. 1. " TALL ,M count" bitfld.long 0x00 5. " STATUS_CLR ,Clears MIN/MAX statistics" "OFF,ON" textline " " bitfld.long 0x00 4. " TCALC_OVERFLOW ,Add operation overflow" "OFF,ON" bitfld.long 0x00 3. " OVERFLOW ,14-bit overflow" "OFF,ON" textline " " bitfld.long 0x00 2. " CPTR_OVERFLOW ,Capture overflow" "OFF,ON" bitfld.long 0x00 0. " STOP ,Sensor stop" "OFF,ON" line.long 0x04 "TSENSOR_GPU_CONFIG1_0,TSENSOR_GPU_CONFIG1_0" bitfld.long 0x04 31. " TEMP_ENABLE ,Temperature enable" "OFF,ON" bitfld.long 0x04 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 15.--20. " TIDDQ_EN ,Time between IDDQ and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 0.--9. 1. " TSAMPLE ,N count" line.long 0x08 "TSENSOR_GPU_CONFIG2_0,TSENSOR_GPU_CONFIG2_0" hexmask.long.word 0x08 16.--31. 1. " THERM_A ,THERM A" hexmask.long.word 0x08 0.--15. 1. " THERM_A ,THERM B" rgroup.long (0x180+0xC)++0x0B line.long 0x00 "TSENSOR_GPU_STATUS0_0,TSENSOR_GPU_STATUS0_0" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_GPU_STATUS1_0,TSENSOR_GPU_STATUS1_0" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temperature" line.long 0x08 "TSENSOR_GPU_STATUS2_0,TSENSOR_$@_STATUS2_0" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Maximum temperature registered since last clear (reset to lowest possible temperature)" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Minimum temperature registered since last clear (reset to highest possible temperature)" group.long 0x1A0++0x0B line.long 0x00 "TSENSOR_PLLX_CONFIG0_0,TSENSOR_PLLX_CONFIG0_0" hexmask.long.tbyte 0x00 8.--27. 1. " TALL ,M count" bitfld.long 0x00 5. " STATUS_CLR ,Clears MIN/MAX statistics" "OFF,ON" textline " " bitfld.long 0x00 4. " TCALC_OVERFLOW ,Add operation overflow" "OFF,ON" bitfld.long 0x00 3. " OVERFLOW ,14-bit overflow" "OFF,ON" textline " " bitfld.long 0x00 2. " CPTR_OVERFLOW ,Capture overflow" "OFF,ON" bitfld.long 0x00 0. " STOP ,Sensor stop" "OFF,ON" line.long 0x04 "TSENSOR_PLLX_CONFIG1_0,TSENSOR_PLLX_CONFIG1_0" bitfld.long 0x04 31. " TEMP_ENABLE ,Temperature enable" "OFF,ON" bitfld.long 0x04 24.--29. " TEN_COUNT ,Time between en and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 15.--20. " TIDDQ_EN ,Time between IDDQ and en" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x04 0.--9. 1. " TSAMPLE ,N count" line.long 0x08 "TSENSOR_PLLX_CONFIG2_0,TSENSOR_PLLX_CONFIG2_0" hexmask.long.word 0x08 16.--31. 1. " THERM_A ,THERM A" hexmask.long.word 0x08 0.--15. 1. " THERM_A ,THERM B" rgroup.long (0x1A0+0xC)++0x0B line.long 0x00 "TSENSOR_PLLX_STATUS0_0,TSENSOR_PLLX_STATUS0_0" bitfld.long 0x00 31. " CAPTURE_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x00 0.--15. 1. " CAPTURE ,Last valid raw capture" line.long 0x04 "TSENSOR_PLLX_STATUS1_0,TSENSOR_PLLX_STATUS1_0" bitfld.long 0x04 31. " TEMP_VALID ,Valid capture available" "Not valid,Valid" hexmask.long.word 0x04 0.--15. 1. " TEMP ,Last valid translated temperature" line.long 0x08 "TSENSOR_PLLX_STATUS2_0,TSENSOR_$@_STATUS2_0" hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX ,Maximum temperature registered since last clear (reset to lowest possible temperature)" hexmask.long.word 0x08 0.--15. 1. " TEMP_MIN ,Minimum temperature registered since last clear (reset to highest possible temperature)" group.long 0x1C0++0x13 line.long 0x00 "TSENSOR_PDIV_0,TSENSOR_PDIV_0" bitfld.long 0x00 12.--15. " CPU_PDIV ,PDIV for TS_CPU0 TS_CPU3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " GPU_PDIV ,PDIV for TS_GPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " MEM_PDIV ,PDIV for TS_MEM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " PLLX_PDIV ,PDIV for TS_PLLX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TSENSOR_HOTSPOT_OFF_0,TSENSOR_HOTSPOT_OFF_0" hexmask.long.byte 0x04 16.--23. 1. " CPU_HOTSPOT_OFF ,CPU hotspot offset from PLLX" hexmask.long.byte 0x04 8.--15. 1. " GPU_HOTSPOT_OFF ,GPU hotspot offset from PLLX" textline " " hexmask.long.byte 0x04 0.--7. 1. " MEM_HOTSPOT_OFF ,MEM hotspot offset from PLLX" line.long 0x08 "TSENSOR_TEMP1_0,TSENSOR_TEMP1_0" hexmask.long.word 0x08 16.--31. 1. " CPU_TEMP ,Processed CPU temperature seen by thermal throttling logic" hexmask.long.word 0x08 0.--15. 1. " GPU_TEMP ,Processed GPU temperature seen by thermal throttling logic" line.long 0x0C "TSENSOR_TEMP2_0,TSENSOR_TEMP2_0" hexmask.long.word 0x0C 16.--31. 1. " MEM_TEMP ,Processed MEM temperature seen by thermal throttling logic" hexmask.long.word 0x0C 0.--15. 1. " SENSOR_TEMP ,Processed sensor (PLLX) temperature seen by thermal throttling logic" line.long 0x10 "TSENSOR_TSENSOR_PWR_VLD_OVERRIDE_0,TSENSOR_TSENSOR_PWR_VLD_OVERRIDE_0" bitfld.long 0x10 0. " INVALIDATE_ON_PWR_GATING ,Use CPU/GPU virtual power gating status to invalidate the CPU/GPU sensors" "OFF,ON" group.long 0x1D8++0x17 line.long 0x00 "TSENSOR_TEMP_SW_OVERRIDE_0,TSENSOR_TEMP_SW_OVERRIDE_0" bitfld.long 0x00 0. " SW_OVERRIDE_EN ,Enable software override of TSENSOR TEMP registers" "Disabled,Enabled" line.long 0x04 "TSENSOR_TSENSOR_CLKEN_0,TSENSOR_TSENSOR_CLKEN_0" bitfld.long 0x04 7. " CPU0_CLKEN ,Enable soc therm/tsensor clock for CPU0 tsensor logic" "OFF,ON" bitfld.long 0x04 6. " CPU1_CLKEN ,Enable soc therm/tsensor clock for CPU1 tsensor logic" "OFF,ON" textline " " bitfld.long 0x04 5. " CPU2_CLKEN ,Enable soc therm/tsensor clock for CPU2 tsensor logic" "OFF,ON" bitfld.long 0x04 4. " CPU3_CLKEN ,Enable soc therm/tsensor clock for CPU3 tsensor logic" "OFF,ON" textline " " bitfld.long 0x04 3. " GPU_CLKEN ,Enable soc therm/tsensor clock for GPU tsensor logic" "OFF,ON" bitfld.long 0x04 2. " MEM0_CLKEN ,Enable soc therm/tsensor clock for MEM0 tsensor logic" "OFF,ON" textline " " bitfld.long 0x04 1. " MEM1_CLKEN ,Enable soc therm/tsensor clock for MEM1 tsensor logic" "OFF,ON" bitfld.long 0x04 0. " PLLX_CLKEN ,Enable soc therm/tsensor clock for PLLX tsensor logic" "OFF,ON" line.long 0x08 "TSENSOR_VALID_0,TSENSOR_VALID_0" bitfld.long 0x08 11. " MEM1_INVALID ,Invalidate MEM1 TSOSC" "OFF,ON" bitfld.long 0x08 10. " MEM0_INVALID ,Invalidate MEM0 TSOSC" "OFF,ON" textline " " bitfld.long 0x08 9. " GPU_INVALID ,Invalidate GPU TSOSC" "OFF,ON" bitfld.long 0x08 8. " PLLX_INVALID ,Invalidate PLLX TSOSC" "OFF,ON" textline " " bitfld.long 0x08 3. " CPU3_INVALID ,Invalidate CPU3 TSOSC" "OFF,ON" bitfld.long 0x08 2. " CPU2_INVALID ,Invalidate CPU2 TSOSC" "OFF,ON" textline " " bitfld.long 0x08 1. " CPU1_INVALID ,Invalidate CPU1 TSOSC" "OFF,ON" bitfld.long 0x08 0. " CPU0_INVALID ,Invalidate CPU0 TSOSC" "OFF,ON" line.long 0x0C "TSENSOR_HW_PLLX_OFFSETTING_0,TSENSOR_HW_PLLX_OFFSETTING_0" bitfld.long 0x0C 2. " EN_HW_PLLX_OFFSET_MEM ,Enable hardware calculated PLLX offset for MEM TSOSC" "OFF,ON" bitfld.long 0x0C 1. " EN_HW_PLLX_OFFSET_GPU ,Enable hardware calculated PLLX offset for GPU TSOSC" "OFF,ON" textline " " bitfld.long 0x0C 0. " EN_HW_PLLX_OFFSET_CPU ,Enable hardware calculated PLLX offset for CPU TSOSC" "OFF,ON" line.long 0x10 "TSENSOR_PLLX_OFFSET_MIN_0,TSENSOR_PLLX_OFFSET_MIN_0" hexmask.long.byte 0x10 16.--23. 1. " MIN_MEM_OFFSET ,Minimum offset allowed for hardware calculated PLLX offset" hexmask.long.byte 0x10 8.--15. 1. " MIN_GPU_OFFSET ,Minimum offset allowed for hardware calculated PLLX offset" textline " " hexmask.long.byte 0x10 0.--7. 1. " MIN_CPU_OFFSET ,Minimum offset allowed for hardware calculated PLLX offset" line.long 0x14 "TSENSOR_PLLX_OFFSET_MAX_0,TSENSOR_PLLX_OFFSET_MAX_0" hexmask.long.byte 0x14 16.--23. 1. " MAX_MEM_OFFSET ,Maximum offset allowed for hardware calculated PLLX offset" hexmask.long.byte 0x14 8.--15. 1. " MAX_GPU_OFFSET ,Maximum offset allowed for hardware calculated PLLX offset" textline " " hexmask.long.byte 0x14 0.--7. 1. " MAX_CPU_OFFSET ,Maximum offset allowed for hardware calculated PLLX offset" group.long 0x310++0x0B line.long 0x00 "EDP_OC_ALARM_OC0_CFG_0,EDP_OC_ALARM_OC0_CFG_0" bitfld.long 0x00 6. " LONG_LATENCY_THROTTLE ,Hardware is expected to control the PLL for large amounts of time when this OC alarm is engaged" "OFF,ON" bitfld.long 0x00 5. " HW_RESTORE_EN ,Auto-restore system to unthrottled state after this alarm is deasserted" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PWRGOOD_MASK ,Mask the throttling if power is not good" "Not masked,Masked" bitfld.long 0x00 2.--3. " THROTTLE_MODE ,Throttling mode " "Disabled,Sticky,Brief,?..." textline " " bitfld.long 0x00 1. " ALARM_POLARITY ,Alarm polarity" "Low,High" bitfld.long 0x00 0. " EN_THROTTLE ,Enable the throttling on this over current alarm" "OFF,ON" line.long 0x04 "EDP_OC_ALARM_OC0_CNT_THRESHOLD_0,EDP_OC_ALARM_OC0_CNT_THRESHOLD_0" line.long 0x08 "EDP_OC_ALARM_OC0_THROTTLE_PERIOD_0,EDP_OC_ALARM_OC0_THROTTLE_PERIOD_0" rgroup.long (0x310+0x0C)++0x03 line.long 0x00 "EDP_OC_ALARM_OC0_COUNT_0,EDP_OC_ALARM_OC0_COUNT_0" group.long (0x310+0x10)++0x03 line.long 0x00 "EDP_OC_ALARM_OC0_FILTER_0,EDP_OC_ALARM_OC0_FILTER_0" group.long 0x324++0x0B line.long 0x00 "EDP_OC_ALARM_OC1_CFG_0,EDP_OC_ALARM_OC1_CFG_0" bitfld.long 0x00 6. " LONG_LATENCY_THROTTLE ,Hardware is expected to control the PLL for large amounts of time when this OC alarm is engaged" "OFF,ON" bitfld.long 0x00 5. " HW_RESTORE_EN ,Auto-restore system to unthrottled state after this alarm is deasserted" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PWRGOOD_MASK ,Mask the throttling if power is not good" "Not masked,Masked" bitfld.long 0x00 2.--3. " THROTTLE_MODE ,Throttling mode " "Disabled,Sticky,Brief,?..." textline " " bitfld.long 0x00 1. " ALARM_POLARITY ,Alarm polarity" "Low,High" bitfld.long 0x00 0. " EN_THROTTLE ,Enable the throttling on this over current alarm" "OFF,ON" line.long 0x04 "EDP_OC_ALARM_OC1_CNT_THRESHOLD_0,EDP_OC_ALARM_OC1_CNT_THRESHOLD_0" line.long 0x08 "EDP_OC_ALARM_OC1_THROTTLE_PERIOD_0,EDP_OC_ALARM_OC1_THROTTLE_PERIOD_0" rgroup.long (0x324+0x0C)++0x03 line.long 0x00 "EDP_OC_ALARM_OC1_COUNT_0,EDP_OC_ALARM_OC1_COUNT_0" group.long (0x324+0x10)++0x03 line.long 0x00 "EDP_OC_ALARM_OC1_FILTER_0,EDP_OC_ALARM_OC1_FILTER_0" group.long 0x338++0x0B line.long 0x00 "EDP_OC_ALARM_OC2_CFG_0,EDP_OC_ALARM_OC2_CFG_0" bitfld.long 0x00 6. " LONG_LATENCY_THROTTLE ,Hardware is expected to control the PLL for large amounts of time when this OC alarm is engaged" "OFF,ON" bitfld.long 0x00 5. " HW_RESTORE_EN ,Auto-restore system to unthrottled state after this alarm is deasserted" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PWRGOOD_MASK ,Mask the throttling if power is not good" "Not masked,Masked" bitfld.long 0x00 2.--3. " THROTTLE_MODE ,Throttling mode " "Disabled,Sticky,Brief,?..." textline " " bitfld.long 0x00 1. " ALARM_POLARITY ,Alarm polarity" "Low,High" bitfld.long 0x00 0. " EN_THROTTLE ,Enable the throttling on this over current alarm" "OFF,ON" line.long 0x04 "EDP_OC_ALARM_OC2_CNT_THRESHOLD_0,EDP_OC_ALARM_OC2_CNT_THRESHOLD_0" line.long 0x08 "EDP_OC_ALARM_OC2_THROTTLE_PERIOD_0,EDP_OC_ALARM_OC2_THROTTLE_PERIOD_0" rgroup.long (0x338+0x0C)++0x03 line.long 0x00 "EDP_OC_ALARM_OC2_COUNT_0,EDP_OC_ALARM_OC2_COUNT_0" group.long (0x338+0x10)++0x03 line.long 0x00 "EDP_OC_ALARM_OC2_FILTER_0,EDP_OC_ALARM_OC2_FILTER_0" group.long 0x34C++0x0B line.long 0x00 "EDP_OC_ALARM_OC3_CFG_0,EDP_OC_ALARM_OC3_CFG_0" bitfld.long 0x00 6. " LONG_LATENCY_THROTTLE ,Hardware is expected to control the PLL for large amounts of time when this OC alarm is engaged" "OFF,ON" bitfld.long 0x00 5. " HW_RESTORE_EN ,Auto-restore system to unthrottled state after this alarm is deasserted" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PWRGOOD_MASK ,Mask the throttling if power is not good" "Not masked,Masked" bitfld.long 0x00 2.--3. " THROTTLE_MODE ,Throttling mode " "Disabled,Sticky,Brief,?..." textline " " bitfld.long 0x00 1. " ALARM_POLARITY ,Alarm polarity" "Low,High" bitfld.long 0x00 0. " EN_THROTTLE ,Enable the throttling on this over current alarm" "OFF,ON" line.long 0x04 "EDP_OC_ALARM_OC3_CNT_THRESHOLD_0,EDP_OC_ALARM_OC3_CNT_THRESHOLD_0" line.long 0x08 "EDP_OC_ALARM_OC3_THROTTLE_PERIOD_0,EDP_OC_ALARM_OC3_THROTTLE_PERIOD_0" rgroup.long (0x34C+0x0C)++0x03 line.long 0x00 "EDP_OC_ALARM_OC3_COUNT_0,EDP_OC_ALARM_OC3_COUNT_0" group.long (0x34C+0x10)++0x03 line.long 0x00 "EDP_OC_ALARM_OC3_FILTER_0,EDP_OC_ALARM_OC3_FILTER_0" group.long 0x360++0x0B line.long 0x00 "EDP_OC_ALARM_OC4_CFG_0,EDP_OC_ALARM_OC4_CFG_0" bitfld.long 0x00 6. " LONG_LATENCY_THROTTLE ,Hardware is expected to control the PLL for large amounts of time when this OC alarm is engaged" "OFF,ON" bitfld.long 0x00 5. " HW_RESTORE_EN ,Auto-restore system to unthrottled state after this alarm is deasserted" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PWRGOOD_MASK ,Mask the throttling if power is not good" "Not masked,Masked" bitfld.long 0x00 2.--3. " THROTTLE_MODE ,Throttling mode " "Disabled,Sticky,Brief,?..." textline " " bitfld.long 0x00 1. " ALARM_POLARITY ,Alarm polarity" "Low,High" bitfld.long 0x00 0. " EN_THROTTLE ,Enable the throttling on this over current alarm" "OFF,ON" line.long 0x04 "EDP_OC_ALARM_OC4_CNT_THRESHOLD_0,EDP_OC_ALARM_OC4_CNT_THRESHOLD_0" line.long 0x08 "EDP_OC_ALARM_OC4_THROTTLE_PERIOD_0,EDP_OC_ALARM_OC4_THROTTLE_PERIOD_0" rgroup.long (0x360+0x0C)++0x03 line.long 0x00 "EDP_OC_ALARM_OC4_COUNT_0,EDP_OC_ALARM_OC4_COUNT_0" group.long (0x360+0x10)++0x03 line.long 0x00 "EDP_OC_ALARM_OC4_FILTER_0,EDP_OC_ALARM_OC4_FILTER_0" group.long 0x39C++0x03 line.long 0x00 "EDP_OC_INTR_STATUS_0_SET/CLR,EDP_OC_INTR_STATUS_0" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " CLDVFS_DIDT ,CLDVFS interrupt status" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " OC4 ,OC event 4 interrupt status" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " OC3 ,OC event 3 interrupt status" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " OC2 ,OC event 2 interrupt status" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " OC1 ,OC event 1 interrupt status" "No interrupt,Interrupt" rgroup.long 0x3A8++0x0F line.long 0x00 "EDP_OC_ALARM_OC1_STATS_0,EDP_OC_ALARM_OC1_STATS_0" line.long 0x04 "EDP_OC_ALARM_OC2_STATS_0,EDP_OC_ALARM_OC2_STATS_0" line.long 0x08 "EDP_OC_ALARM_OC3_STATS_0,EDP_OC_ALARM_OC3_STATS_0" line.long 0x0C "EDP_OC_ALARM_OC4_STATS_0,EDP_OC_ALARM_OC4_STATS_0" group.long 0x3C4++0x07 line.long 0x00 "EDP_OC_ALARM_STATS_CTRL_0,EDP_OC_ALARM_STATS_CTRL_0" bitfld.long 0x00 1. " CLEAR_ALL ,Clear all statistics" "Not cleared,Cleared" bitfld.long 0x00 0. " ENB_ALL ,Enable all statistics collections for all counters" "Disabled,Enabled" line.long 0x04 "EDP_OC_CLDVFS_DIDT_CNT_THRESHOLD_0,EDP_OC_CLDVFS_DIDT_CNT_THRESHOLD_0" rgroup.long 0x3CC++0x03 line.long 0x00 "EDP_OC_CLDVFS_DIDT_EVENT_COUNT_0,EDP_OC_CLDVFS_DIDT_EVENT_COUNT_0" group.long 0x3D0++0x03 line.long 0x00 "EDP_OC_CLDVFS_DIDT_EVENT_CNT_FILTER_0,EDP_OC_CLDVFS_DIDT_EVENT_CNT_FILTER_0" rgroup.long 0x3D4++0x03 line.long 0x00 "EDP_OC_CLDVFS_DIDT_EVENT_STATS_0,EDP_OC_CLDVFS_DIDT_EVENT_STATS_0" group.long 0x3D8++0x0F line.long 0x00 "EDP_OC_ALARM_THROTTLE_PERIOD_CTL_0,EDP_OC_ALARM_THROTTLE_PERIOD_CTL_0" hexmask.long.byte 0x00 0.--7. 1. " NUM_CLKS_IN_1US ,Number of soc_therm clocks in 1us used to determine brief throttle length" line.long 0x04 "EDP_OC_OC2_MODEM_EDP_VALUE_0,EDP_OC_OC2_MODEM_EDP_VALUE_0" line.long 0x08 "EDP_OC_OC3_MODEM_EDP_VALUE_0,EDP_OC_OC3_MODEM_EDP_VALUE_0" line.long 0x0C "EDP_OC_OC4_MODEM_EDP_VALUE_0,EDP_OC_OC4_MODEM_EDP_VALUE_0" group.long 0x400++0x03 line.long 0x00 "THROTTLECTL_GLOBAL_THROTTLE_CFG_0,THROTTLECTL_GLOBAL_THROTTLE_CFG_0" bitfld.long 0x00 4. " LEGACY_PSKIP_MODE ,Pulse skipper" "OFF,ON" bitfld.long 0x00 3. " DFLL_PSKIP_CTRL ,Pause CPU pulse skipper" "Not paused,Paused" textline " " bitfld.long 0x00 2. " PSKIP_RESTORE_CTRL ,Pulse skipper restore" "Disabled,Enabled" bitfld.long 0x00 1. " SW_OVERRIDE_MODE ,Pulse skipper software override" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENB ,Single bit to disable all throttling" "Disabled,Enabled" group.long 0x408++0x0F line.long 0x00 "THROTTLECTL_SW_CPU_PSKIP_CTRL_0,THROTTLECTL_SW_CPU_PSKIP_CTRL_0" bitfld.long 0x00 31. " ENB ,Enable the throttling" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x04 "THROTTLECTL_SW_CPU_PSKIP_RAMP_RATE_0,THROTTLECTL_SW_CPU_PSKIP_RAMP_RATE_0" bitfld.long 0x04 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x04 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x04 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" line.long 0x08 "THROTTLECTL_SW_GPU_PSKIP_CTRL_0,THROTTLECTL_SW_GPU_PSKIP_CTRL_0" rbitfld.long 0x08 30. " LOW_MED_HIGH ,Style of GPU throttling" "GPU with PSKIP,Low/Medium/High" bitfld.long 0x08 16.--18. " THROTTLE_DEPTH ,Configures LOW/MEDIUM/HIGH throttling (zero-one-hot encoding)" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x08 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" hexmask.long.byte 0x08 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x0C "THROTTLECTL_SW_GPU_PSKIP_RAMP_RATE_0,THROTTLECTL_SW_GPU_PSKIP_RAMP_RATE_0" bitfld.long 0x0C 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x0C 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" group.long 0x418++0x07 line.long 0x00 "THROTTLECTL_CPU_PSKIP_STATUS_0,THROTTLECTL_CPU_PSKIP_STATUS_0" hexmask.long.byte 0x00 12.--19. 1. " CURR_PULSE_SKIP_M ,CURR_PULSE_SKIP_M" hexmask.long.byte 0x00 4.--11. 1. " CURR_PULSE_SKIP_N ,CURR_PULSE_SKIP_N" textline " " bitfld.long 0x00 1. " SW_OVERRIDE_STATUS ,SW_OVERRIDE_STATUS" "Disabled,Enabled" bitfld.long 0x00 0. " ENB_STATUS ,ENB_STATUS" "Disabled,Enabled" line.long 0x04 "THROTTLECTL_GPU_PSKIP_STATUS_0,THROTTLECTL_GPU_PSKIP_STATUS_0" bitfld.long 0x04 20.--22. " THROTTLE_DEPTH ,THROTTLE_DEPTH" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 12.--19. 1. " CURR_PULSE_SKIP_M ,CURR_PULSE_SKIP_M" textline " " hexmask.long.byte 0x04 04.--11. 1. " CURR_PULSE_SKIP_N ,CURR_PULSE_SKIP_N" textline " " bitfld.long 0x04 1. " SW_OVERRIDE_STATUS ,SW_OVERRIDE_STATUS" "Disabled,Enabled" bitfld.long 0x04 0. " ENB_STATUS ,ENB_STATUS" "Disabled,Enabled" group.long 0x424++0x0B line.long 0x00 "THROTTLECTL_PRIORITY_LOCK_0,THROTTLECTL_PRIORITY_LOCK_0" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Maximum priority allowed for software programmable vectors" rgroup.long 0x428++0x07 line.long 0x00 "THROTTLECTL_THROTTLE_STATUS_0,THROTTLECTL_THROTTLE_STATUS_0" bitfld.long 0x00 12. " PRIORITY_LOCK_BREACH ,Selected throttle vector is of higher priority than the limit specified by the Boot Load" "Disabled,Enabled" hexmask.long.byte 0x00 4.--11. 1. " THROTTLE_SEQ_STATE ,118 = gpu sqr,74 = cpu sqr" textline " " bitfld.long 0x00 0. " ENB_STATUS ,Global enable status" "Disabled,Enabled" line.long 0x04 "THROTTLECTL_CPU_DFLL_STATUS_0,THROTTLECTL_CPU_DFLL_STATUS_0" bitfld.long 0x04 5.--7. " THROTTLE_INDEX_STATUS ,THROTTLE_INDEX_STATUS" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4. " HW_RESTORE_EN ,HW_RESTORE_EN" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " HW_THROTTLE_EN ,HW_THROTTLE_EN" "Disabled,Enabled" bitfld.long 0x04 2. " HW_RAMP_STATUS ,HW_RAMP_STATUS" "Done,In progress" textline " " bitfld.long 0x04 1. " SW_OVERRIDE_STATUS ,SW_OVERRIDE_STATUS" "Disabled,Enabled" bitfld.long 0x04 0. " ENB_STATUS ,ENB_STATUS" "Disabled,Enabled" group.long 0x430++0x0F line.long 0x00 "THROTTLECTL_LITE_CPU_PSKIP_CTRL_0,THROTTLECTL_LITE_CPU_PSKIP_CTRL_0" bitfld.long 0x00 31. " ENB ,Enable the throttling" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER CDIV DIVISOR" line.long 0x04 "THROTTLECTL_SW_CPU_PSKIP_RAMP_RATE_0,SOC_THERM_THROTTLECTL_SW_CPU_PSKIP_RAMP_RATE_0" bitfld.long 0x04 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x04 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles " textline " " hexmask.long.byte 0x04 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" line.long 0x08 "THROTTLECTL_LITE_GPU_PSKIP_CTRL_0,THROTTLECTL_LITE_GPU_PSKIP_CTRL_0" bitfld.long 0x08 31. " ENB ,Enable the throttling" "Disabled,Enabled" rbitfld.long 0x08 30. " LOW_MED_HIGH ,Throttling configured through THROTTLE_DEPTH" "Disabled,Enabled" textline " " bitfld.long 0x08 16.--18. " THROTTLE_DEPTH ,Configures LOW/MEDIUM/HIGH throttling (zero-one-hot encoding)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x08 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x0C "THROTTLECTL_LITE_GPU_PSKIP_RAMP_RATE_0,THROTTLECTL_LITE_GPU_PSKIP_RAMP_RATE_0" bitfld.long 0x0C 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x0C 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" group.long 0x444++0x0B line.long 0x00 "THROTTLECTL_LITE_THROTTLE_PRIORITY_0,THROTTLECTL_LITE_THROTTLE_PRIORITY_0" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Bigger value indicates higher priority" line.long 0x04 "THROTTLECTL_LITE_THROTTLE_DELAY_0,THROTTLECTL_LITE_THROTTLE_DELAY_0" line.long 0x08 "THROTTLECTL_LITE_CPU_DFLL_CTRL_0,THROTTLECTL_LITE_CPU_DFLL_CTRL_0" bitfld.long 0x08 4.--6. " DFLL_THROTTLE_INDEX ,One hot indication of how much throttling to perform" "No throttling,Light,Medium,,Heavy,?..." bitfld.long 0x08 2. " SW_OVERRIDE_MODE ,Enable software override mode" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " DFLL_RAMP_MODE ,Waiting for ramp_done signal" "Ignored,Waiting" bitfld.long 0x08 0. " ENB ,Enable DFLL throttling for this indicator" "Disabled,Enabled" group.long 0x460++0x1B line.long 0x00 "THROTTLECTL_HEAVY_CPU_PSKIP_CTRL_0,THROTTLECTL_HEAVY_CPU_PSKIP_CTRL_0" bitfld.long 0x00 31. " ENB ,Enable the throttling" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x04 "THROTTLECTL_HEAVY_CPU_PSKIP_RAMP_RATE_0,THROTTLECTL_HEAVY_CPU_PSKIP_RAMP_RATE_0" bitfld.long 0x04 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x04 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x04 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" line.long 0x08 "THROTTLECTL_HEAVY_GPU_PSKIP_CTRL_0,THROTTLECTL_HEAVY_GPU_PSKIP_CTRL_0" bitfld.long 0x08 31. " ENB ,Enable the throttling" "Disabled,Enabled" rbitfld.long 0x08 30. " LOW_MED_HIGH ,Throttling configured through THROTTLE_DEPTH" "Disabled,Enabled" textline " " bitfld.long 0x08 16.--18. " THROTTLE_DEPTH ,Configures LOW/MEDIUM/HIGH throttling (zero-one-hot encoding)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x08 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x0C "THROTTLECTL_HEAVY_GPU_PSKIP_RAMP_RATE_0,THROTTLECTL_HEAVY_GPU_PSKIP_RAMP_RATE_0" bitfld.long 0x0C 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x0C 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" group.long 0x474++0x1B line.long 0x00 "THROTTLECTL_HEAVY_THROTTLE_PRIORITY_0,THROTTLECTL_HEAVY_THROTTLE_PRIORITY_0" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Bigger value indicates higher priority" line.long 0x04 "THROTTLECTL_HEAVY_THROTTLE_DELAY_0,THROTTLECTL_HEAVY_THROTTLE_DELAY_0" line.long 0x08 "THROTTLECTL_HEAVY_CPU_DFLL_CTRL_0,THROTTLECTL_HEAVY_CPU_DFLL_CTRL_0" bitfld.long 0x08 4.--6. " DFLL_THROTTLE_INDEX ,One hot indication of how much throttling to perform" "No throttling,Light,Medium,,Heavy,?..." bitfld.long 0x08 2. " SW_OVERRIDE_MODE ,Enable software override mode" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " DFLL_RAMP_MODE ,Waiting for ramp_done signal" "Ignored,Waiting" bitfld.long 0x08 0. " ENB ,Enable DFLL throttling for this indicator" "Disabled,Enabled" group.long 0x490++0x0F line.long 0x00 "THROTTLECTL_OC1_CPU_PSKIP_CTRL_0,THROTTLECTL_OC1_CPU_PSKIP_CTRL_0" bitfld.long 0x00 31. " ENB ,Enable the throttling" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x04 "THROTTLECTL_OC1_CPU_PSKIP_RAMP_RATE_0,THROTTLECTL_OC1_CPU_PSKIP_RAMP_RATE_0" bitfld.long 0x04 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x04 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x04 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" line.long 0x08 "THROTTLECTL_OC1_GPU_PSKIP_CTRL_0,THROTTLECTL_OC1_GPU_PSKIP_CTRL_0" bitfld.long 0x08 31. " ENB ,Enable the throttling" "Disabled,Enabled" rbitfld.long 0x08 30. " LOW_MED_HIGH ,Throttling configured through THROTTLE_DEPTH" "Disabled,Enabled" textline " " bitfld.long 0x08 16.--18. " THROTTLE_DEPTH ,Configures LOW/MEDIUM/HIGH throttling (zero-one-hot encoding)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x08 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x0C "THROTTLECTL_OC1_GPU_PSKIP_RAMP_RATE_0,THROTTLECTL_OC1_GPU_PSKIP_RAMP_RATE_0" bitfld.long 0x0C 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x0C 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" group.long (0x490+0x14)++0x0B line.long 0x00 "THROTTLECTL_OC1_THROTTLE_PRIORITY_0,THROTTLECTL_OC1_THROTTLE_PRIORITY_0" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Bigger value indicates higher priority" line.long 0x04 "THROTTLECTL_OC1_THROTTLE_DELAY_0,THROTTLECTL_OC1_THROTTLE_DELAY_0" line.long 0x08 "THROTTLECTL_OC1_CPU_DFLL_CTRL_0,THROTTLECTL_OC1_CPU_DFLL_CTRL_0" bitfld.long 0x08 4.--6. " DFLL_THROTTLE_INDEX ,One hot Indication of how much throttling to perform" "No throttling,Light,Medium,,Heavy,?..." bitfld.long 0x08 2. " SW_OVERRIDE_MODE ,Enable software override mode" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " DFLL_RAMP_MODE ,Waiting for ramp_done signal" "Ignored,Waiting" bitfld.long 0x08 0. " ENB ,Enable DFLL throttling for this indicator" "Disabled,Enabled" group.long 0x4C0++0x0F line.long 0x00 "THROTTLECTL_OC2_CPU_PSKIP_CTRL_0,THROTTLECTL_OC2_CPU_PSKIP_CTRL_0" bitfld.long 0x00 31. " ENB ,Enable the throttling" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x04 "THROTTLECTL_OC2_CPU_PSKIP_RAMP_RATE_0,THROTTLECTL_OC2_CPU_PSKIP_RAMP_RATE_0" bitfld.long 0x04 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x04 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x04 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" line.long 0x08 "THROTTLECTL_OC2_GPU_PSKIP_CTRL_0,THROTTLECTL_OC2_GPU_PSKIP_CTRL_0" bitfld.long 0x08 31. " ENB ,Enable the throttling" "Disabled,Enabled" rbitfld.long 0x08 30. " LOW_MED_HIGH ,Throttling configured through THROTTLE_DEPTH" "Disabled,Enabled" textline " " bitfld.long 0x08 16.--18. " THROTTLE_DEPTH ,Configures LOW/MEDIUM/HIGH throttling (zero-one-hot encoding)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x08 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x0C "THROTTLECTL_OC2_GPU_PSKIP_RAMP_RATE_0,THROTTLECTL_OC2_GPU_PSKIP_RAMP_RATE_0" bitfld.long 0x0C 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x0C 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" group.long (0x4C0+0x14)++0x0B line.long 0x00 "THROTTLECTL_OC2_THROTTLE_PRIORITY_0,THROTTLECTL_OC2_THROTTLE_PRIORITY_0" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Bigger value indicates higher priority" line.long 0x04 "THROTTLECTL_OC2_THROTTLE_DELAY_0,THROTTLECTL_OC2_THROTTLE_DELAY_0" line.long 0x08 "THROTTLECTL_OC2_CPU_DFLL_CTRL_0,THROTTLECTL_OC2_CPU_DFLL_CTRL_0" bitfld.long 0x08 4.--6. " DFLL_THROTTLE_INDEX ,One hot Indication of how much throttling to perform" "No throttling,Light,Medium,,Heavy,?..." bitfld.long 0x08 2. " SW_OVERRIDE_MODE ,Enable software override mode" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " DFLL_RAMP_MODE ,Waiting for ramp_done signal" "Ignored,Waiting" bitfld.long 0x08 0. " ENB ,Enable DFLL throttling for this indicator" "Disabled,Enabled" group.long 0x4F0++0x0F line.long 0x00 "THROTTLECTL_OC3_CPU_PSKIP_CTRL_0,THROTTLECTL_OC3_CPU_PSKIP_CTRL_0" bitfld.long 0x00 31. " ENB ,Enable the throttling" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x04 "THROTTLECTL_OC3_CPU_PSKIP_RAMP_RATE_0,THROTTLECTL_OC3_CPU_PSKIP_RAMP_RATE_0" bitfld.long 0x04 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x04 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x04 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" line.long 0x08 "THROTTLECTL_OC3_GPU_PSKIP_CTRL_0,THROTTLECTL_OC3_GPU_PSKIP_CTRL_0" bitfld.long 0x08 31. " ENB ,Enable the throttling" "Disabled,Enabled" rbitfld.long 0x08 30. " LOW_MED_HIGH ,Throttling configured through THROTTLE_DEPTH" "Disabled,Enabled" textline " " bitfld.long 0x08 16.--18. " THROTTLE_DEPTH ,Configures LOW/MEDIUM/HIGH throttling (zero-one-hot encoding)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x08 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x0C "THROTTLECTL_OC3_GPU_PSKIP_RAMP_RATE_0,THROTTLECTL_OC3_GPU_PSKIP_RAMP_RATE_0" bitfld.long 0x0C 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x0C 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" group.long (0x4F0+0x14)++0x0B line.long 0x00 "THROTTLECTL_OC3_THROTTLE_PRIORITY_0,THROTTLECTL_OC3_THROTTLE_PRIORITY_0" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Bigger value indicates higher priority" line.long 0x04 "THROTTLECTL_OC3_THROTTLE_DELAY_0,THROTTLECTL_OC3_THROTTLE_DELAY_0" line.long 0x08 "THROTTLECTL_OC3_CPU_DFLL_CTRL_0,THROTTLECTL_OC3_CPU_DFLL_CTRL_0" bitfld.long 0x08 4.--6. " DFLL_THROTTLE_INDEX ,One hot Indication of how much throttling to perform" "No throttling,Light,Medium,,Heavy,?..." bitfld.long 0x08 2. " SW_OVERRIDE_MODE ,Enable software override mode" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " DFLL_RAMP_MODE ,Waiting for ramp_done signal" "Ignored,Waiting" bitfld.long 0x08 0. " ENB ,Enable DFLL throttling for this indicator" "Disabled,Enabled" group.long 0x520++0x0F line.long 0x00 "THROTTLECTL_OC4_CPU_PSKIP_CTRL_0,THROTTLECTL_OC4_CPU_PSKIP_CTRL_0" bitfld.long 0x00 31. " ENB ,Enable the throttling" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x04 "THROTTLECTL_OC4_CPU_PSKIP_RAMP_RATE_0,THROTTLECTL_OC4_CPU_PSKIP_RAMP_RATE_0" bitfld.long 0x04 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x04 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x04 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" line.long 0x08 "THROTTLECTL_OC4_GPU_PSKIP_CTRL_0,THROTTLECTL_OC4_GPU_PSKIP_CTRL_0" bitfld.long 0x08 31. " ENB ,Enable the throttling" "Disabled,Enabled" rbitfld.long 0x08 30. " LOW_MED_HIGH ,Throttling configured through THROTTLE_DEPTH" "Disabled,Enabled" textline " " bitfld.long 0x08 16.--18. " THROTTLE_DEPTH ,Configures LOW/MEDIUM/HIGH throttling (zero-one-hot encoding)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x08 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x0C "THROTTLECTL_OC4_GPU_PSKIP_RAMP_RATE_0,THROTTLECTL_OC4_GPU_PSKIP_RAMP_RATE_0" bitfld.long 0x0C 31. " SEQ_BYPASS_MODE ,Bypass throttle seq and directly apply settings" "Disabled,Enabled" hexmask.long.word 0x0C 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" textline " " hexmask.long.byte 0x0C 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" group.long (0x520+0x14)++0x0B line.long 0x00 "THROTTLECTL_OC4_THROTTLE_PRIORITY_0,THROTTLECTL_OC4_THROTTLE_PRIORITY_0" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Bigger value indicates higher priority" line.long 0x04 "THROTTLECTL_OC4_THROTTLE_DELAY_0,THROTTLECTL_OC4_THROTTLE_DELAY_0" line.long 0x08 "THROTTLECTL_OC4_CPU_DFLL_CTRL_0,THROTTLECTL_OC4_CPU_DFLL_CTRL_0" bitfld.long 0x08 4.--6. " DFLL_THROTTLE_INDEX ,One hot Indication of how much throttling to perform" "No throttling,Light,Medium,,Heavy,?..." bitfld.long 0x08 2. " SW_OVERRIDE_MODE ,Enable software override mode" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " DFLL_RAMP_MODE ,Waiting for ramp_done signal" "Ignored,Waiting" bitfld.long 0x08 0. " ENB ,Enable DFLL throttling for this indicator" "Disabled,Enabled" group.long 0x5E0++0x03 line.long 0x00 "THROTTLECTL2_CPU_DFLL_RAMP_TIMER_0,THROTTLECTL2_CPU_DFLL_RAMP_TIMER_0" hexmask.long.word 0x00 0.--15. 1. " DFLL_RAMP_TIME ,Time in soc_therm_clks to wait for DFLL throttling to engage" group.long 0x610++0x07 line.long 0x00 "EDP_OC2_BBC_MAP_0,EDP_OC2_BBC_MAP_0" bitfld.long 0x00 30.--31. " BBC_STS_1111 ,Mapping of BBC 1111->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" bitfld.long 0x00 28.--29. " BBC_STS_1110 ,Mapping of BBC 1110->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" textline " " bitfld.long 0x00 26.--27. " BBC_STS_1101 ,Mapping of BBC 1101->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" bitfld.long 0x00 24.--25. " BBC_STS_1100 ,Mapping of BBC 1100->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" textline " " bitfld.long 0x00 22.--23. " BBC_STS_1011 ,Mapping of BBC 1011->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" bitfld.long 0x00 20.--21. " BBC_STS_1010 ,Mapping of BBC 1010->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" textline " " bitfld.long 0x00 18.--19. " BBC_STS_1001 ,Mapping of BBC 1001->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" bitfld.long 0x00 16.--17. " BBC_STS_1000 ,Mapping of BBC 1000->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" textline " " bitfld.long 0x00 14.--15. " BBC_STS_0111 ,Mapping of BBC 0111->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" textline " " bitfld.long 0x00 12.--13. " BBC_STS_0110 ,Mapping of BBC 0110->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" bitfld.long 0x00 10.--11. " BBC_STS_0101 ,Mapping of BBC 0101->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" textline " " bitfld.long 0x00 8.--9. " BBC_STS_0100 ,Mapping of BBC 0100->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" bitfld.long 0x00 6.--7. " BBC_STS_0011 ,Mapping of BBC 0011->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" textline " " bitfld.long 0x00 4.--5. " BBC_STS_0010 ,Mapping of BBC 0010->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" bitfld.long 0x00 2.--3. " BBC_STS_0001 ,Mapping of BBC 0001->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" textline " " bitfld.long 0x00 0.--1. " BBC_STS_0000 ,Mapping of BBC 0000->OC alarm" "Disabled,ALARM_A,ALARM_B,ALARM_C" line.long 0x04 "EDP_OC2_BBC_MAP_CTRL_0,EDP_OC2_BBC_MAP_CTRL_0" bitfld.long 0x04 0. " MAPPING_ENABLE ,Enable bbc oc alarm mapping" "Disabled,Enabled" group.long 0x760++0x07 line.long 0x00 "THROTTLECTL_HVC_PSKIP_CTRL_0,THROTTLECTL_HVC_PSKIP_CTRL_0" bitfld.long 0x00 31. " ENB ,Enable the throttling" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " SUPER_CDIV_DIVIDEND ,SUPER_CDIV_DIVIDEND" textline " " hexmask.long.byte 0x00 0.--7. 1. " SUPER_CDIV_DIVISOR ,SUPER_CDIV_DIVISOR" line.long 0x04 "THROTTLECTL_HVC_PSKIP_RAMP_RATE_0,THROTTLECTL_HVC_PSKIP_RAMP_RATE_0" hexmask.long.word 0x04 8.--23. 1. " PULSE_SKIP_DURATION ,Duration in soc_therm_clk cycles" hexmask.long.byte 0x04 0.--7. 1. " PULSE_SKIP_STEP ,Pulse skip step size 0:+/-1" rgroup.long 0x768++0x03 line.long 0x00 "THROTTLECTL_HVC_PSKIP_STATUS_0,THROTTLECTL_HVC_PSKIP_STATUS_0" hexmask.long.byte 0x00 12.--19. 1. " CURR_PULSE_SKIP_M ,CURR_PULSE_SKIP_M" hexmask.long.byte 0x00 4.--11. 1. " CURR_PULSE_SKIP_N ,CURR_PULSE_SKIP_N" textline " " bitfld.long 0x00 0. " ENB_STATUS ,ENB_STATUS" "Disabled,Enabled" group.long 0x900++0x07 line.long 0x00 "SIMON_AMASTER_ACCESS0_0,SIMON_AMASTER_ACCESS0_0" line.long 0x04 "SIMON_AMASTER_DATA0_0,SIMON_AMASTER_DATA0_0" width 0x0B tree.end tree "FUSE_THERM" base ad:0x7002000 width 30. group.long 0x184++0x07 line.long 0x00 "FUSE_TSENSOR1_CALIB_0,FUSE TSENSOR1 CALIB 0" hexmask.long 0x00 0.--25. 1. " TSENSOR1_CALIB ,TSENSOR1 CALIB" line.long 0x04 "FUSE_TSENSOR2_CALIB_0,FUSE_TSENSOR2_CALIB_0" hexmask.long 0x04 0.--25. 1. " TSENSOR2_CALIB ,TSENSOR2 CALIB" group.long 0x198++0x03 line.long 0x00 "FUSE_TSENSOR0_CALIB_0,FUSE TSENSOR3 CALIB 0" hexmask.long 0x00 0.--25. 1. " TSENSOR0_CALIB ,TSENSOR0 CALIB" group.long 0x22C++0x03 line.long 0x00 "FUSE_TSENSOR3_CALIB_0,FUSE TSENSOR3 CALIB 0" hexmask.long 0x00 0.--25. 1. " TSENSOR0_CALIB ,TSENSOR0 CALIB" group.long 0x254++0x0F line.long 0x00 "FUSE_TSENSOR4_CALIB_0,FUSE TSENSOR4 CALIB 0" hexmask.long 0x00 0.--25. 1. " TSENSOR4_CALIB ,TSENSOR4 CALIB" line.long 0x04 "FUSE_TSENSOR5_CALIB_0,FUSE TSENSOR4 CALIB 0" hexmask.long 0x04 0.--25. 1. " TSENSOR5_CALIB ,TSENSOR5 CALIB" line.long 0x08 "FUSE_TSENSOR6_CALIB_0,FUSE TSENSOR6 CALIB 0" hexmask.long 0x08 0.--25. 1. " TSENSOR6_CALIB ,TSENSOR6 CALIB" line.long 0xC "FUSE_TSENSOR7_CALIB_0,FUSE TSENSOR7 CALIB 0" hexmask.long 0x0C 0.--25. 1. " TSENSOR7_CALIB ,TSENSOR7 CALIB" group.long 0x280++0x03 line.long 0x00 "FUSE_TSENSOR_COMMON_0,FUSE TSENSOR COMMON 0" hexmask.long 0x00 0.--25. 1. " TSENSOR_COMMON ,TSENSOR COMMON" group.long 0x2D4++0x0B line.long 0x00 "FUSE_TSENSOR9_CALIB_0,FUSE TSENSOR9 CALIB 0" hexmask.long 0x00 0.--25. 1. " TSENSOR9_CALIB ,TSENSOR9 CALIB" group.long 0x31C++0x0B line.long 0x00 "FUSE_TSENSOR10_CALIB_0,FUSE TSENSOR10 CALIB 0" hexmask.long 0x00 0.--25. 1. " TSENSOR10_CALIB ,TSENSOR10 CALIB" group.long 0x37C++0x0B line.long 0x00 "FUSE_SPARE_REALIGNMENT_REG_0,FUSE SPARE REALIGNMENT REG 0" bitfld.long 0x00 0. " SPARE_REALIGNMENT_REG ,SPARE REALIGNMENT REG" "Disabled,Enabled" width 0x0B tree.end tree.end tree "Boot and Power Management Processor Lite" base ad:0x50040000 width 25. group.long 0x00++0x0F line.long 0x00 "ARB_PRIO_CPU_PRIORITY_0,Shared Resource Priority for CPU Register" bitfld.long 0x00 24.--26. " HOST1X ,HOST1X" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 21.--23. " APB ,Access privilege to APB bus register" "Highest,1,2,Lowest,?..." bitfld.long 0x00 18.--20. " PSB ,Access privilege to PSB register" "Highest,1,2,Lowest,?..." bitfld.long 0x00 12.--14. " IROM0 ,IROM0" "Highest,1,2,3,4,5,6,Lowest" textline " " bitfld.long 0x00 9.--11. " IRAM3 ,IRAM3" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 6.--8. " IRAM2 ,IRAM2" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 3.--5. " IRAM1 ,IRAM1" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 0.--2. " IRAM0 ,IRAM0" "Highest,1,2,3,4,5,6,Lowest" line.long 0x04 "ARB_PRIO_COP_PRIORITY_0,Shared Resource Priority for COP Register" bitfld.long 0x04 24.--26. " HOST1X ,HOST1X" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x04 21.--23. " APB ,Access privilege to APB bus register" "Highest,1,2,Lowest,?..." bitfld.long 0x04 18.--20. " PSB ,Access privilege to PSB register" "Highest,1,2,Lowest,?..." bitfld.long 0x04 12.--14. " IROM0 ,IROM0" "Highest,1,2,3,4,5,6,Lowest" textline " " bitfld.long 0x04 9.--11. " IRAM3 ,IRAM3" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x04 6.--8. " IRAM2 ,IRAM2" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x04 3.--5. " IRAM1 ,IRAM1" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x04 0.--2. " IRAM0 ,IRAM0" "Highest,1,2,3,4,5,6,Lowest" line.long 0x08 "ARB_PRIO_VCP_PRIORITY_0,Shared Resource Priority for VCP Register" bitfld.long 0x08 24.--26. " HOST1X ,HOST1X" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x08 21.--23. " APB ,Access privilege to APB bus register" "Highest,1,2,Lowest,?..." bitfld.long 0x08 18.--20. " PSB ,Access privilege to PSB register" "Highest,1,2,Lowest,?..." bitfld.long 0x08 12.--14. " IROM0 ,IROM0" "Highest,1,2,3,4,5,6,Lowest" textline " " bitfld.long 0x08 9.--11. " IRAM3 ,IRAM3" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x08 6.--8. " IRAM2 ,IRAM2" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x08 3.--5. " IRAM1 ,IRAM1" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x08 0.--2. " IRAM0 ,IRAM0" "Highest,1,2,3,4,5,6,Lowest" line.long 0x0C "ARB_PRIO_DMA_PRIORITY_0,Shared Resource Priority for DMA Register" bitfld.long 0x0C 24.--26. " HOST1X ,HOST1X" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x0C 21.--23. " APB ,Access privilege to APB bus register" "Highest,1,2,Lowest,?..." bitfld.long 0x0C 18.--20. " PSB ,Access privilege to PSB register" "Highest,1,2,Lowest,?..." bitfld.long 0x0C 12.--14. " IROM0 ,IROM0" "Highest,1,2,3,4,5,6,Lowest" textline " " bitfld.long 0x0C 9.--11. " IRAM3 ,IRAM3" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x0C 6.--8. " IRAM2 ,IRAM2" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x0C 3.--5. " IRAM1 ,IRAM1" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x0C 0.--2. " IRAM0 ,IRAM0" "Highest,1,2,3,4,5,6,Lowest" group.long 0x14++0x03 line.long 0x00 "ARB_PRIO_UCQ_PRIORITY_0,Shared Resource Priority for DMA Register" bitfld.long 0x00 24.--26. " HOST1X ,HOST1X" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 21.--23. " APB ,Access privilege to APB bus register" "Highest,1,2,Lowest,?..." bitfld.long 0x00 18.--20. " PSB ,Access privilege to PSB register" "Highest,1,2,Lowest,?..." textline " " bitfld.long 0x00 12.--14. " IROM0 ,IROM0" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 9.--11. " IRAM3 ,IRAM3" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 6.--8. " IRAM2 ,IRAM2" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 3.--5. " IRAM1 ,IRAM1" "Highest,1,2,3,4,5,6,Lowest" textline " " bitfld.long 0x00 0.--2. " IRAM0 ,IRAM0" "Highest,1,2,3,4,5,6,Lowest" width 0x0B tree.end textline ""